From 106a7f7d7fd2ff5529e6899d1856430f5140bc08 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Tue, 7 Apr 2026 12:34:24 +0200 Subject: [PATCH] board: xilinx: zynqmp: Register alternate FPGA device for zu63dr_SE The zu63dr_SE and zu67dr_SE devices share the same silicon ID code 0x046D7093 and cannot be distinguished at runtime. The SOC driver reports zu67dr_SE for this ID, which causes fpga loadb to reject zu63dr_SE bitstreams. Register zu63dr_SE as an alternate FPGA device when zu67dr_SE is detected. This allows users to load either bitstream by selecting the appropriate device number: - Device 0 (zu67dr_SE): fpga loadb 0 ${loadaddr} ${filesize} - Device 1 (zu63dr_SE): fpga loadb 1 ${loadaddr} ${filesize} Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/591134b1c66701fa14a21fecac4f7a772ddba876.1775558062.git.michal.simek@amd.com --- board/xilinx/zynqmp/zynqmp.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c index 769e52bcfb5..a1d8ae26673 100644 --- a/board/xilinx/zynqmp/zynqmp.c +++ b/board/xilinx/zynqmp/zynqmp.c @@ -183,6 +183,23 @@ int board_init(void) zynqmppl.name = strdup(name); fpga_init(); fpga_add(fpga_xilinx, &zynqmppl); + + /* + * zu63dr_SE and zu67dr_SE share ID 0x046D7093. + * Register zu63dr_SE as alternate device. + */ + if (!strcmp(name, "zu67dr_SE")) { + xilinx_desc *alt; + + alt = calloc(1, sizeof(*alt)); + if (!alt) { + log_err("Failed to allocate alt FPGA descriptor\n"); + } else { + *alt = zynqmppl; + alt->name = "zu63dr_SE"; + fpga_add(fpga_xilinx, alt); + } + } } } #endif