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pinctrl: qcom: add qcm2290 pinctrl driver

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This SoC has a basic pinctrl block with no tiles.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Acked-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
This commit is contained in:
Caleb Connolly 2024-04-10 19:52:36 +02:00
parent 07b71b5f7d
commit 0ecb8cfcb9
No known key found for this signature in database
GPG Key ID: 0583312B195F64B6
3 changed files with 78 additions and 0 deletions
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7
drivers/pinctrl/qcom/Kconfig
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@ -27,6 +27,13 @@ config PINCTRL_QCOM_IPQ4019
Say Y here to enable support for pinctrl on the IPQ4019 SoC,
as well as the associated GPIO driver.
config PINCTRL_QCOM_QCM2290
bool "Qualcomm QCM2290 GCC"
select PINCTRL_QCOM
help
Say Y here to enable support for pinctrl on the Snapdragon QCM2290 SoC,
as well as the associated GPIO driver.
config PINCTRL_QCOM_QCS404
bool "Qualcomm QCS404 GCC"
select PINCTRL_QCOM

1
drivers/pinctrl/qcom/Makefile
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@ -6,6 +6,7 @@ obj-$(CONFIG_PINCTRL_QCOM) += pinctrl-qcom.o
obj-$(CONFIG_PINCTRL_QCOM_APQ8016) += pinctrl-apq8016.o
obj-$(CONFIG_PINCTRL_QCOM_IPQ4019) += pinctrl-ipq4019.o
obj-$(CONFIG_PINCTRL_QCOM_APQ8096) += pinctrl-apq8096.o
obj-$(CONFIG_PINCTRL_QCOM_QCM2290) += pinctrl-qcm2290.o
obj-$(CONFIG_PINCTRL_QCOM_QCS404) += pinctrl-qcs404.o
obj-$(CONFIG_PINCTRL_QCOM_SDM845) += pinctrl-sdm845.o
obj-$(CONFIG_PINCTRL_QCOM_SM8550) += pinctrl-sm8550.o

70
drivers/pinctrl/qcom/pinctrl-qcm2290.c Normal file
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@ -0,0 +1,70 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Qualcomm qcm2290 pinctrl
*
* (C) Copyright 2024 Linaro Ltd.
*
*/
#include <dm.h>
#include "pinctrl-qcom.h"
#define MAX_PIN_NAME_LEN 32
static char pin_name[MAX_PIN_NAME_LEN] __section(".data");
static const struct pinctrl_function msm_pinctrl_functions[] = {
{ "qup4", 1 },
{ "gpio", 0 },
};
static const char *qcm2290_get_function_name(struct udevice *dev, unsigned int selector)
{
return msm_pinctrl_functions[selector].name;
}
static const char *qcm2290_get_pin_name(struct udevice *dev, unsigned int selector)
{
static const char *const special_pins_names[] = {
"sdc1_rclk", "sdc1_clk", "sdc1_cmd", "sdc1_data",
"sdc2_clk", "sdc2_cmd", "sdc2_data",
};
if (selector >= 127 && selector <= 133)
snprintf(pin_name, MAX_PIN_NAME_LEN, special_pins_names[selector - 127]);
else
snprintf(pin_name, MAX_PIN_NAME_LEN, "gpio%u", selector);
return pin_name;
}
static unsigned int qcm2290_get_function_mux(__maybe_unused unsigned int pin, unsigned int selector)
{
return msm_pinctrl_functions[selector].val;
}
struct msm_pinctrl_data qcm2290_data = {
.pin_data = {
.pin_count = 133,
.special_pins_start = 127,
},
.functions_count = ARRAY_SIZE(msm_pinctrl_functions),
.get_function_name = qcm2290_get_function_name,
.get_function_mux = qcm2290_get_function_mux,
.get_pin_name = qcm2290_get_pin_name,
};
static const struct udevice_id msm_pinctrl_ids[] = {
{
.compatible = "qcom,qcm2290-tlmm",
.data = (ulong)&qcm2290_data
},
{ /* Sentinel */ } };
U_BOOT_DRIVER(pinctrl_qcm2290) = {
.name = "pinctrl_qcm2290",
.id = UCLASS_NOP,
.of_match = msm_pinctrl_ids,
.ops = &msm_pinctrl_ops,
.bind = msm_pinctrl_bind,
};