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mtd: rawnand: sunxi: introduce reg_spare_area in sunxi_nfc_caps

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Introduce NDFC Spare Area Register offset in SoC capabilities

The H6/H616 spare area register is not at the same offset as the
A10/A23 one, so move its offset into sunxi_nfc_caps.

No functional change.

Signed-off-by: Richard Genoud <richard.genoud@bootlin.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
This commit is contained in:
Richard Genoud 2026-01-23 12:44:51 +01:00 committed by Michael Trimarchi
parent d46bdfe086
commit 0a80eb8146
3 changed files with 9 additions and 4 deletions
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3
drivers/mtd/nand/raw/sunxi_nand.c
View File

@ -328,7 +328,7 @@ static void sunxi_nfc_select_chip(struct mtd_info *mtd, int chip)
ctl |= NFC_RB_SEL(sel->rb.info.nativeid);
}
writel(mtd->writesize, nfc->regs + NFC_REG_SPARE_AREA);
writel(mtd->writesize, nfc->regs + NFC_REG_SPARE_AREA(nfc));
if (nfc->clk_rate != sunxi_nand->clk_rate) {
sunxi_nfc_set_clk_rate(sunxi_nand->clk_rate);
@ -1727,6 +1727,7 @@ static const struct sunxi_nfc_caps sunxi_nfc_a10_caps = {
.reg_ecc_err_cnt = NFC_REG_A10_ECC_ERR_CNT,
.reg_user_data = NFC_REG_A10_USER_DATA,
.reg_pat_found = NFC_REG_ECC_ST,
.reg_spare_area = NFC_REG_A10_SPARE_AREA,
.reg_pat_id = NFC_REG_A10_PAT_ID,
.pat_found_mask = GENMASK(31, 16),
.ecc_mode_mask = GENMASK(15, 12),

7
drivers/mtd/nand/raw/sunxi_nand.h
View File

@ -49,8 +49,9 @@
#define NFC_REG_ECC_ERR_CNT(nfc, x) (((nfc)->caps->reg_ecc_err_cnt + (x)) & ~0x3)
#define NFC_REG_A10_USER_DATA 0x0050
#define NFC_REG_USER_DATA(nfc, x) ((nfc)->caps->reg_user_data + ((x) * 4))
#define NFC_REG_SPARE_AREA 0x00A0
#define NFC_REG_PAT_ID(nfc) ((nfc)->caps->reg_pat_id)
#define NFC_REG_SPARE_AREA(nfc) ((nfc)->caps->reg_spare_area)
#define NFC_REG_A10_SPARE_AREA 0x00A0
#define NFC_REG_PAT_ID(nfc) ((nfc)->caps->reg_pat_id)
#define NFC_REG_A10_PAT_ID 0x00A4
#define NFC_RAM0_BASE 0x0400
#define NFC_RAM1_BASE 0x0800
@ -173,6 +174,7 @@
* @nstrengths: Number of element of ECC strengths array
* @reg_ecc_err_cnt: ECC error counter register
* @reg_user_data: User data register
* @reg_spare_area: Spare Area Register
* @reg_pat_id: Pattern ID Register
* @reg_pat_found: Data Pattern Status Register
* @pat_found_mask: ECC_PAT_FOUND mask in NFC_REG_PAT_FOUND register
@ -184,6 +186,7 @@ struct sunxi_nfc_caps {
unsigned int nstrengths;
unsigned int reg_ecc_err_cnt;
unsigned int reg_user_data;
unsigned int reg_spare_area;
unsigned int reg_pat_id;
unsigned int reg_pat_found;
unsigned int pat_found_mask;

3
drivers/mtd/nand/raw/sunxi_nand_spl.c
View File

@ -54,6 +54,7 @@ const uint16_t random_seed[128] = {
__maybe_unused static const struct sunxi_nfc_caps sunxi_nfc_a10_caps = {
.has_ecc_block_512 = true,
.reg_spare_area = NFC_REG_A10_SPARE_AREA,
.random_en_mask = BIT(9),
};
@ -151,7 +152,7 @@ static void nand_apply_config(const struct nfc_config *conf)
writel(val | NFC_PAGE_SIZE(conf->page_size),
SUNXI_NFC_BASE + NFC_REG_CTL);
writel(conf->ecc_size, SUNXI_NFC_BASE + NFC_REG_CNT);
writel(conf->page_size, SUNXI_NFC_BASE + NFC_REG_SPARE_AREA);
writel(conf->page_size, SUNXI_NFC_BASE + NFC_REG_SPARE_AREA(conf));
}
static int nand_load_page(const struct nfc_config *conf, u32 offs)