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ARM: at91: Add the chip ID for SAMA5D2 LPDDR2 SiP
The SAMA5D2 LPDDR2 SiP (System in Package) is added for SoC identification. Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
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@ -57,8 +57,16 @@ char *get_cpu_name(void)
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return "SAMA5D27 512M bits DDR2 SDRAM";
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return "SAMA5D27 512M bits DDR2 SDRAM";
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case ARCH_EXID_SAMA5D27C_D1G:
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case ARCH_EXID_SAMA5D27C_D1G:
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return "SAMA5D27 1G bits DDR2 SDRAM";
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return "SAMA5D27 1G bits DDR2 SDRAM";
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case ARCH_EXID_SAMA5D27C_LD1G:
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return "SAMA5D27 1G bits LPDDR2 SDRAM";
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case ARCH_EXID_SAMA5D27C_LD2G:
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return "SAMA5D27 2G bits LPDDR2 SDRAM";
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case ARCH_EXID_SAMA5D28C_D1G:
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case ARCH_EXID_SAMA5D28C_D1G:
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return "SAMA5D28 1G bits DDR2 SDRAM";
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return "SAMA5D28 1G bits DDR2 SDRAM";
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case ARCH_EXID_SAMA5D28C_LD1G:
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return "SAMA5D28 1G bits LPDDR2 SDRAM";
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case ARCH_EXID_SAMA5D28C_LD2G:
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return "SAMA5D28 2G bits LPDDR2 SDRAM";
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}
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}
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}
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}
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@ -220,7 +220,11 @@
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#define ARCH_EXID_SAMA5D225C_D1M 0x00000053
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#define ARCH_EXID_SAMA5D225C_D1M 0x00000053
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#define ARCH_EXID_SAMA5D27C_D5M 0x00000032
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#define ARCH_EXID_SAMA5D27C_D5M 0x00000032
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#define ARCH_EXID_SAMA5D27C_D1G 0x00000033
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#define ARCH_EXID_SAMA5D27C_D1G 0x00000033
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#define ARCH_EXID_SAMA5D27C_LD1G 0x00000061
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#define ARCH_EXID_SAMA5D27C_LD2G 0x00000062
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#define ARCH_EXID_SAMA5D28C_D1G 0x00000013
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#define ARCH_EXID_SAMA5D28C_D1G 0x00000013
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#define ARCH_EXID_SAMA5D28C_LD1G 0x00000071
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#define ARCH_EXID_SAMA5D28C_LD2G 0x00000072
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/* Checked if defined in ethernet driver macb */
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/* Checked if defined in ethernet driver macb */
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#define cpu_is_sama5d2 _cpu_is_sama5d2
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#define cpu_is_sama5d2 _cpu_is_sama5d2
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