Drop config and patches for Linux 6.6.
Signed-off-by: Thomas Richard <thomas.richard@bootlin.com>
Link: https://github.com/openwrt/openwrt/pull/20468
Signed-off-by: Nick Hainke <vincent@systemli.org>
Switch to Linux kernel 6.12.
Signed-off-by: Thomas Richard <thomas.richard@bootlin.com>
Link: https://github.com/openwrt/openwrt/pull/20468
Signed-off-by: Nick Hainke <vincent@systemli.org>
Backport upstream patch for AN7583 Ethernet support. While at it also
backport some additional fixes required to apply the AN7583 patches
cleanly.
Refresh all affected patch automatically (aside from the XSI patch that
changed the implementation)
Link: https://github.com/openwrt/openwrt/pull/20489
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Backport phylink patches for PCS/PHY caps OPs. This makes it easier to
align future generic PCS patch and permit supporting special PHY that
needs specific tune if "in-band" mode is enabled (for example Aeonsemi
PHYs)
This is also mainly using the upstream version of the Mediatek patch
739-net-add-negotiation-of-in-band-capabilities.
All affected patch automatically refreshed.
Link: https://github.com/openwrt/openwrt/pull/20461
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Now that we have a board file, add calibration variant for TP-Link
Archer C60 v2 and add ipq-wifi package for it.
Tested-by: Semih Baskan <strstgs@gmail.com>
Signed-off-by: Christoph Krapp <achterin@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20496
Signed-off-by: Robert Marko <robimarko@gmail.com>
L3 Offloading caused DHCP packets to be dropped at hardware level
And potentially buggy route implementation can cause a crash
Signed-off-by: Harshal Gohel <hg@simonwunderlich.de>
Co-developed-by: Sven Eckelmann <se@simonwunderlich.de>
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20208
Signed-off-by: Robert Marko <robimarko@gmail.com>
The RTL931x is not supporting L3 offloading at the moment. To avoid crashes
when using this switch, simply disable L3 offloading completely.
Signed-off-by: Harshal Gohel <hg@simonwunderlich.de>
Co-developed-by: Sven Eckelmann <se@simonwunderlich.de>
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20208
Signed-off-by: Robert Marko <robimarko@gmail.com>
a33d59f7af8f (2025-10-14) restored dts files for kernel 6.6 to files-6.6
after the preceding 15fa59c41f0d moved files-6.6 to files-6.12 to be
used by the new testing kernel, 6.12. This restoration omitted
1a3f05eb2b8e (2025-10-08), which fixed important aspects of the wifi
device definitions in qcom-ipq8064-eax500.dtsi and
qcom-ipq8064-unifi-ac-hd.dts.
The 1a3f05eb2b8e fix persisted into the 6.12 dts files. This change now
restores it for 6.6. Note that ipq806x is currently using kernel 6.6 for
most purposes, as 6.12 is only in testing status for this target.
This change was prepared with `git diff
a33d59f7af8f:target/linux/ipq806x/files-6.6
15fa59c41f0d^:target/linux/ipq806x/files-6.6`. This identified
c186d17fa518 (2025-10-08) as another change that was not present in the
restored files-6.6, but it has since been superseded by 2a709d108e80
(2025-10-20), so no action is necessary to restore it. There were no
diffs present between these revisions in config-6.6 or patches-6.6,
which were also moved and restored in the 6.12 bring-up.
Signed-off-by: Mark Mentovai <mark@mentovai.com>
Cc: Shiji Yang <yangshiji66@outlook.com>
Cc: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20464
Signed-off-by: Robert Marko <robimarko@gmail.com>
SQUASHFS_DECOMP_MULTI_PERCPU is selected by
SQUASHFS_COMPILE_DECOMP_MULTI_PERCPU, so add it.
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Link: https://github.com/openwrt/openwrt/pull/20140
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The pinctrl driver should be enabled based on the SoC supported
by the subtarget, rather than enabling all by default.
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Link: https://github.com/openwrt/openwrt/pull/20140
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Add the common kernel config found when 'make kernel_oldconfig'.
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Link: https://github.com/openwrt/openwrt/pull/20140
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The cortexa53 target currently uses cpu erratums for Cortex-A510,
Cortex-A710, and Neoverse-N2. Remove them and enable cpu erratums
for Cortex-A53.
Fixes: f01982e ("sunxi: add testing kernel 6.1")
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Link: https://github.com/openwrt/openwrt/pull/20140
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The SPI chip select GPIO polarity is active low by default. We must
use "spi-cs-high" dts property to toggle the polarity. The polarity
on "cs-gpios" won't take effect at all[1]. Fix these incorrect GPIO
polarities to silence the kernel warnings.
[1] Refer to Linux/Documentation/devicetree/bindings/spi/spi-controller.yaml
```
device node | cs-gpio | CS pin state active | Note
================+===============+=====================+=====
spi-cs-high | - | H |
- | - | L |
spi-cs-high | ACTIVE_HIGH | H |
- | ACTIVE_HIGH | L | 1
spi-cs-high | ACTIVE_LOW | H | 2
- | ACTIVE_LOW | L |
Notes:
1) Should print a warning about polarity inversion.
Here it would be wise to avoid and define the gpio as
ACTIVE_LOW.
2) Should print a warning about polarity inversion
because ACTIVE_LOW is overridden by spi-cs-high.
Should be generally avoided and be replaced by
spi-cs-high + ACTIVE_HIGH.
```
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/19845
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
There is no need to add a "cs-gpios" property if chip select pin is
directly controlled by the SPI host hardware.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/19845
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
These devices only have one SPI peripheral. And the chip select pin is
directly controlled by the SPI host hardware. Hence we don't need to
assign empty GPIO phandle for them. This patch also adjust the reg
address of the SPI peripheral node to follow the cs-gpios changes.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/19845
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The SPI chip select GPIO polarity is active low by default. We must
use "spi-cs-high" dts property to toggle the polarity. The polarity
on "cs-gpios" won't take effect at all[1]. Fix these incorrect GPIO
polarities to silence the kernel warnings.
[1] Refer to Linux/Documentation/devicetree/bindings/spi/spi-controller.yaml
```
device node | cs-gpio | CS pin state active | Note
================+===============+=====================+=====
spi-cs-high | - | H |
- | - | L |
spi-cs-high | ACTIVE_HIGH | H |
- | ACTIVE_HIGH | L | 1
spi-cs-high | ACTIVE_LOW | H | 2
- | ACTIVE_LOW | L |
Notes:
1) Should print a warning about polarity inversion.
Here it would be wise to avoid and define the gpio as
ACTIVE_LOW.
2) Should print a warning about polarity inversion
because ACTIVE_LOW is overridden by spi-cs-high.
Should be generally avoided and be replaced by
spi-cs-high + ACTIVE_HIGH.
```
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/19845
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The SPI chip select GPIO polarity is active low by default. We must
use "spi-cs-high" dts property to toggle the polarity. The polarity
on "cs-gpios" won't take effect at all[1]. Fix these incorrect GPIO
polarities to silence the kernel warnings.
[1] Refer to Linux/Documentation/devicetree/bindings/spi/spi-controller.yaml
```
device node | cs-gpio | CS pin state active | Note
================+===============+=====================+=====
spi-cs-high | - | H |
- | - | L |
spi-cs-high | ACTIVE_HIGH | H |
- | ACTIVE_HIGH | L | 1
spi-cs-high | ACTIVE_LOW | H | 2
- | ACTIVE_LOW | L |
Notes:
1) Should print a warning about polarity inversion.
Here it would be wise to avoid and define the gpio as
ACTIVE_LOW.
2) Should print a warning about polarity inversion
because ACTIVE_LOW is overridden by spi-cs-high.
Should be generally avoided and be replaced by
spi-cs-high + ACTIVE_HIGH.
```
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/19845
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This is a useless property on ath79 target. Both spi-ar934x and
spi-ath79 drivers don't check num-cs property. They always set
chip select number to 3.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/19845
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Both devices seem to be completely identical and D-Link doesnt even
mention the DIR-X1550 A1 in the GPL source. Furthermore the supported
devices header also just contains DIR-X1860 B1. The cherry on top is the
FCC filing, which features the manual for DIR-X1550 A1 but the label
info for DIR-X1860 B1. I guess someone at D-Link was just as confused as
me.
Hardware
--------
SOC: MediaTek MT7621AT
FLASH: 128MB (Spansion S34ML01G200TF100)
RAM: 256MB (Winbond W632GU6NB-12)
WIFI: MediaTek MT7915DAN + MT7975DN DBDC 2x2 802.11ax
ETH: 1x WAN, 3x LAN
LED: 6 (4 GPIO controllable, 2 WIFI hardwired)
BTN: WPS, Reset
UART: 115200 8N1 (Pinout silkscreened) - ignore VCC
MAC addresses
-------------
LAN Label MAC (stored in config2 partition as ASCII (entry
factory_mac=xx:xx:xx:xx:xx:xx))
WAN LAN + 3
2.4G LAN + 1
5G LAN + 2
Installation
------------
Vendor UI
---------
1. Browse to http://192.168.0.1 and login.
2. Navigate to "Management" -> "Upgrade".
3. Press the "Select File" button and upload
openwrt-ramips-mt7621-dlink_dir-x1860-b1-squashfs-factory.bin
4. Confirm the security questions, wait for a reboot and enjoy OpenWrt.
Recovery UI
-----------
1. Set your IP address to 192.168.0.101, subnet 255.255.255.0.
2. Power on the device while holding reset.
3. Release reset once the status led starts to blink orange.
4. Open a chrome- or firefox based browser and browse to
https://192.168.0.1
5. Upload openwrt-ramips-mt7621-dlink_dir-x1860-b1-squashfs-recovery.bin
wait for a reboot and enjoy OpenWrt.
Back to stock
-------------
1. Set your IP address to 192.168.0.101, subnet 255.255.255.0.
2. Power on the device while holding reset.
3. Release reset once the status led starts to blink orange.
4. Open a chrome- or firefox based browser and browse to
https://192.168.0.1
5. Upload a decrypted vendor image, wait for a reboot and regret your
decision.
Decrypt vendor image
--------------------
1. Download dlink-sge-image.c and dlink-sge-image.h from the
firmware-utils openwrt repository.
2. Compile a binary from the downloaded file
e.g. gcc dlink-sge-image.c -lcrypto -o dlink-sge-image
3. Run
./dlink-sge-image DIR-X1860-B1 <vendor_image> <decrypted_image> -d
Signed-off-by: Christoph Krapp <achterin@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20410
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Originally, phylink_mac_config first disabled the MAC, then triggered
the SerDes setup and then re-enabled MAC. SerDes setup has been moved to
the PCS driver now but pcs_config is called AFTER phylink_mac_config by
phylink subsystem.
Thus, just disable the MAC in phylink_mac_config. After PCS has setup
the SerDes, the MAC should be properly brought up in a mac_link_up call
coming from the phylink subsystem.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20369
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Remove SerDes initialization/configuration calls from the DSA driver in
'rtl931x_phylink_mac_config' and let our PCS driver setup the SerDes now
that the driver is able to do that.
pcs_config of the PCS driver is automatically called by phylink, thus
there's no need to call it on our own.
Note that in rtl931x_phylink_mac_config the MAC is enabled before
pcs_config is called. While this seems to work, it isn't good and needs
to be fixed.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20369
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
In rtpcs_931x_setup_serdes, quit early on USXGMII mode. This restores
the behaviour introduced in c18476d0c5 to prevent the current buggy
procedure to destroy a working configuration established by U-Boot
before.
Also include the valuable comment from the code to keep the information.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20369
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Adjust the SerDes page numbers to account for the different mapping used
by 'mdio-realtek-otto' and 'mdio-realtek-otto-serdes' drivers.
While importing the SerDes configuration code from PHY driver to PCS
driver, all helper calls to access the SerDes registers had to be
adjusted to use the proper helpers within the PCS driver. However, there
is one important implication of this: 'mdio-realtek-otto' and
'mdio-realtek-otto-serdes' use a slightly different page mapping.
While the old helpers in 'mdio-realtek-otto' used a page mapping of
0x00/0x100/0x200, 'mdio-realtek-otto-serdes' uses a mapping of
0x00/0x40/0x80 to provide consumers with the ability to only operate on
frontend SerDes. Thus, all page numbers > 63/0x3f have to be adjusted
like the following:
before: rtsds_931x_write_field(sds, 0x101, ... // old helper calls
after: rtpcs_sds_write(ctrl, sds, 0x41, ...
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20369
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Replaces the "old" way of accessing registers using the macros
sw_r32/sw_w32 from mach-rtl83xx.h. The "new" way to access register is
through the regmap API.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20369
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Let's start this transition with RTL931X.
Import all functions starting with 'rtl931x_' or 'rtsds_931x' from PHY
driver into the PCS driver, rename all functions to match a common
naming scheme and adjust signature, helper calls and function calls
accordingly to make it work within the PCS driver.
This is just copy&paste and tries to do only mandatory adjustments. The
code will be refactored in succeeding commits.
Also remove 'unused' attribute from helpers as they are used now.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20369
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
RTL8261N is not used by any device in this target. If necessary, newly added
devices should add the kmod-phy-rtl8261n package.
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Link: https://github.com/openwrt/openwrt/pull/20444
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This option will only take effect when the "separate_ramdisk"
feature was enabled. However, this target does not support
this feature. It is an obvious copy and paste issue.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/17832
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This option will only take effect when the "separate_ramdisk"
feature was enabled. However, this target does not support
this feature. It is an obvious copy and paste issue.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/17832
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The Nokia G-240G-E is an xPON device with an EN7526G, 256M of
memory and 128M of flash. It has 1 USB2 port as well as phone and
ethernet but no wifi. Flashing instructions are per the typical
process using xmodem in the bootloader. This and other things
are described here: https://openwrt.org/inbox/toh/bt/g-240g-e_1
In addition, a generic image is offered, this image can be loaded
into memory from within the bootloader and launched directly. It
is recommended on the wiki of G-240G-E and other EcoNet devices
to be used for backing up the flash before flashing OpenWRT.
Signed-off-by: Caleb James DeLisle <cjd@cjdns.fr>
Link: https://github.com/openwrt/openwrt/pull/20338
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The #address-cells should be 1 according to the dt-binding document.
This patch fixes the following dtc warnings:
../dts/mt7621_gemtek_wvrtm-130acn.dts:46.4-14: Warning (reg_format): /pcie@1e140000/pcie@0,0/wifi@0,0/band@0:reg: property has invalid length (4 bytes) (#address-cells == 2, #size-cells == 0)
../dts/mt7621_gemtek_wvrtm-130acn.dts:54.4-14: Warning (reg_format): /pcie@1e140000/pcie@0,0/wifi@0,0/band@1:reg: property has invalid length (4 bytes) (#address-cells == 2, #size-cells == 0)
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/18242
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Set the reg property value based on node name "pca9547@77". This
patch fixes the following dtc warning:
watchguard-firebox-m300.dts:364.14-366.5: Warning (i2c_bus_reg): /soc@ffe000000/i2c@118000/pca9547@77: missing or empty reg property
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/18242
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Trim unnecessary 0s from the node name to fix the dtc warnings:
cn9131-puzzle-m901.dts:43.18-46.4: Warning (unit_address_format): /memory@00000000: unit name should not have leading 0s
cn9130-clearfog-pro.dts:33.18-36.4: Warning (unit_address_format): /memory@00000000: unit name should not have leading 0s
cn9132-puzzle-m902.dts:50.18-53.4: Warning (unit_address_format): /memory@00000000: unit name should not have leading 0s
armada-385-wd_cloud-mirror-gen2.dts:148.26-152.9: Warning (unit_address_format): /soc/internal-regs/nand-controller@d0000/nand@0/partitions/partition@00000000: unit name should not have leading 0s
armada-385-wd_cloud-mirror-gen2.dts:154.26-157.9: Warning (unit_address_format): /soc/internal-regs/nand-controller@d0000/nand@0/partitions/partition@00500000: unit name should not have leading 0s
armada-385-wd_cloud-mirror-gen2.dts:159.26-163.9: Warning (unit_address_format): /soc/internal-regs/nand-controller@d0000/nand@0/partitions/partition@00a00000: unit name should not have leading 0s
armada-385-wd_cloud-mirror-gen2.dts:165.26-168.9: Warning (unit_address_format): /soc/internal-regs/nand-controller@d0000/nand@0/partitions/partition@00f00000: unit name should not have leading 0s
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/18242
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
- Add the missing ranges property for PCIe bridge node.
- Correct the PCIe device node name.
This patch fix the following dtc warning:
../dts/bcm6328-dlink-dsl-2750b-b1.dts:203.9-220.4: Warning (pci_bridge): /ubus/pcie@10e40000/pcie@0: missing ranges for PCI bridge (or not a bridge)
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/18242
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The DTC recommends using wifi@0,0 as the node name to match the reg
property structure. Fix warning:
../dts/qca9557_fortinet_fap-221-c.dts:208.13-213.4: Warning (pci_device_reg): /ahb/pcie@180c0000/wifi@0,0,0: PCI unit address format error, expected "0,0"
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/18242
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
