Zhihao Xu
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2e51fafc14
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starfive: enable 6.18 testing kernel
Enable 6.18 as testing kernel.
Link: https://github.com/openwrt/openwrt/pull/22063
Signed-off-by: Zhihao Xu <ngc7331@outlook.com>
[Tested on VF1/VF2:]
Tested-by: Zoltan HERPAI <wigyori@uid0.hu>
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2026-04-21 14:49:35 +02:00 |
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Zoltan HERPAI
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4801c5bec3
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starfive: use kernel 6.12 by default
Switch to Linux kernel version 6.12.
Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
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2025-06-14 00:53:19 +02:00 |
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Zoltan HERPAI
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ee129da777
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starfive: add 6.12 as testing kernel
Runtime-tested on:
- Visionfive v2-1.3b (JH7110)
- Visionfive v1 (JH7100)
Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
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2025-06-05 16:39:15 +02:00 |
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Zoltan HERPAI
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fc582aa049
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starfive: switch default to 6.6
Switch the default kernel to 6.6.
Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
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2024-09-10 12:04:07 +02:00 |
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Zoltan HERPAI
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decd5e0cff
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starfive: enable 6.6 testing kernel
starfive now supports 6.6 kernel as testing.
Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
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2024-09-03 00:03:19 +02:00 |
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Zoltan HERPAI
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4070e2a64c
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starfive: add new target for StarFive JH7100/7110 SoC
This target adds support for the StarFive JH7100 and JH7110 SoCs, based on
6.1, as well as a couple boards equipped with these.
Specifications:
SoCs:
JH7100:
- StarFive JH7100 dual-core RISC-V (U74, RC64GC)
- additional monitoring (S7) and control (E24) cores
- 2Mb L2 cache
JH7110:
- StarFive JH7110 quad-core RISC-V (U74, RV64GC)
- additional monitoring (S7) and control (E24) cores
- 2Mb L2 cache
Boards:
VisionFive1:
- JH7100 @ 1GHz
- Memory: 8Gb LPDDR4
- 4x USB3.0
- 1x GBit ethernet
- AMPak 6236 wifi / bluetooth
- audio
- powered via USB-C
VisionFive2:
- JH7110 @ 1.5GHz
- Memory: 2/4/8Gb DDR4
- 2x Gbit ethernet
- 2x USB3.0 / 2x USB2.0
- eMMC / SDIO
- various multimedia input/outputs (MIPI CSI, HDMI, audio)
- M.2 key M slot
- PoE support
- powered via USB-C
Installation:
Standard SD-card installation via dd-ing the generated image to
an SD-card of at least 256Mb.
Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
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2024-03-10 18:21:46 +01:00 |
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