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realtek: mdio: add define for phy 24-27 link detection

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Add a meaningful define for RTL838x port 24-27 link status detection.

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23204
Signed-off-by: Robert Marko <robimarko@gmail.com>
This commit is contained in:
Markus Stockhausen 2026-05-03 22:26:40 +02:00 committed by Robert Marko
parent b793640f09
commit e33cd7937e
1 changed files with 3 additions and 1 deletions
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4
target/linux/realtek/files-6.18/drivers/net/mdio/mdio-realtek-otto.c
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@ -52,6 +52,7 @@
#define RTMDIO_838X_C22_DATA(page, reg) ((reg) << 20 | RTMDIO_PAGE_SELECT << 15 | (page) << 3)
#define RTMDIO_838X_PHY_PATCH_DONE BIT(15)
#define RTMDIO_838X_SMI_GLB_CTRL (0xa100)
#define RTMDIO_838X_SMI_GLB_PHY_MAN_24_27 BIT(7)
#define RTMDIO_838X_SMI_ACCESS_PHY_CTRL_0 (0xa1b8)
#define RTMDIO_838X_SMI_ACCESS_PHY_CTRL_1 (0xa1bc)
#define RTMDIO_838X_CMD_FAIL 0 /* No hardware support */
@ -718,7 +719,8 @@ static void rtmdio_838x_setup_polling(struct rtmdio_ctrl *ctrl)
* give the real media status (0=copper, 1=fibre). For now assume that if address 24 is
* PHY driven, it must be a combo PHY and media detection is needed.
*/
regmap_assign_bits(ctrl->map, RTMDIO_838X_SMI_GLB_CTRL, BIT(7),
regmap_assign_bits(ctrl->map, RTMDIO_838X_SMI_GLB_CTRL,
RTMDIO_838X_SMI_GLB_PHY_MAN_24_27,
test_bit(24, ctrl->valid_ports));
}