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ramips: 6.18: remove obsolete patches
Remove obsolete patches already included in kernel 6.18. - 001-v6.13-clocksource-drivers-ralink-Add-Ralink-System-Tick-Co.patch[1] - 002-03-v6.13-clk-ralink-mtmips-add-mmc-related-clocks-for-SoCs-MT.patch[2] - 003-v6.13-mmc-mtk-sd-Implement-Host-Software-Queue-for-eMMC.patch[3] - 004-v6.15-dt-bindings-clock-add-clock-definitions-for-Ralink-S.patch[4] - 860-ramips-add-eip93-driver.patch[5] - 900-pci-rt2880-static-pcibios_init.patch[6] - 931-mips-ralink-add-missing-include.patch[7] [1] https://web.git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=linux-6.18.y&id=cd5375610baadd3a0842a9e83ca502684f938be8 [2] https://web.git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=linux-6.18.y&id=198675bbc03d437fb80a35d781ad13d622d0ff68 [3] https://web.git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=linux-6.18.y&id=7e9ddd7d45897b15a64c4a3c88f2f7909bf49749 [4] https://web.git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=linux-6.18.y&id=adb2424d0d05506c2f36fcba66101d34f7409e45 [5] https://web.git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=linux-6.18.y&id=9739f5f93b7806a684713ba42e6ed2d1df7c8100 [6] https://web.git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=linux-6.18.y&id=de94259d064814b7eacd6d1f4b26e934eed02590 [7] https://web.git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=linux-6.18.y&id=f13e645e15f1a4a33f0709844dac1a962b335b16 Signed-off-by: Mieczyslaw Nalewaj <namiltd@yahoo.com> Link: https://github.com/openwrt/openwrt/pull/21418 Signed-off-by: Robert Marko <robimarko@gmail.com>
This commit is contained in:
Mieczyslaw Nalewaj
Robert Marko
parent
628f46ccb1
commit
7429b5a8d6
@ -1,384 +0,0 @@
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From 57cbfd333c9d65bfab1a06b49c75536ee28dc2ce Mon Sep 17 00:00:00 2001
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From: Sergio Paracuellos <sergio.paracuellos@gmail.com>
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Date: Mon, 28 Oct 2024 21:36:43 +0100
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Subject: clocksource/drivers/ralink: Add Ralink System Tick Counter driver
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System Tick Counter is present on Ralink SoCs RT3352 and MT7620. This
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driver has been in 'arch/mips/ralink' directory since the beggining of
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Ralink architecture support. However, it can be moved into a more proper
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place in 'drivers/clocksource'. Hence add it here adding also support for
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compile test targets and reducing LOC in architecture code folder.
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Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
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Link: https://lore.kernel.org/r/20241028203643.191268-2-sergio.paracuellos@gmail.com
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Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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---
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arch/mips/ralink/Kconfig | 7 --
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arch/mips/ralink/Makefile | 2 -
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arch/mips/ralink/cevt-rt3352.c | 153 -------------------------------------
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drivers/clocksource/Kconfig | 9 +++
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drivers/clocksource/Makefile | 1 +
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drivers/clocksource/timer-ralink.c | 150 ++++++++++++++++++++++++++++++++++++
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6 files changed, 160 insertions(+), 162 deletions(-)
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delete mode 100644 arch/mips/ralink/cevt-rt3352.c
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create mode 100644 drivers/clocksource/timer-ralink.c
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--- a/arch/mips/ralink/Kconfig
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+++ b/arch/mips/ralink/Kconfig
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@@ -1,13 +1,6 @@
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# SPDX-License-Identifier: GPL-2.0
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if RALINK
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-config CLKEVT_RT3352
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- bool
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- depends on SOC_RT305X || SOC_MT7620
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- default y
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- select TIMER_OF
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- select CLKSRC_MMIO
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-
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config RALINK_ILL_ACC
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bool
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depends on SOC_RT305X
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--- a/arch/mips/ralink/Makefile
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+++ b/arch/mips/ralink/Makefile
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@@ -10,8 +10,6 @@ ifndef CONFIG_MIPS_GIC
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obj-y += clk.o timer.o
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endif
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-obj-$(CONFIG_CLKEVT_RT3352) += cevt-rt3352.o
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-
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obj-$(CONFIG_RALINK_ILL_ACC) += ill_acc.o
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obj-$(CONFIG_IRQ_INTC) += irq.o
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--- a/arch/mips/ralink/cevt-rt3352.c
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+++ /dev/null
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@@ -1,153 +0,0 @@
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-/*
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- * This file is subject to the terms and conditions of the GNU General Public
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- * License. See the file "COPYING" in the main directory of this archive
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- * for more details.
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- *
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- * Copyright (C) 2013 by John Crispin <john@phrozen.org>
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- */
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-
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-#include <linux/clockchips.h>
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-#include <linux/clocksource.h>
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-#include <linux/interrupt.h>
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-#include <linux/reset.h>
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-#include <linux/init.h>
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-#include <linux/time.h>
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-#include <linux/of.h>
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-#include <linux/of_irq.h>
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-#include <linux/of_address.h>
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-
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-#include <asm/mach-ralink/ralink_regs.h>
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-
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-#define SYSTICK_FREQ (50 * 1000)
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-
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-#define SYSTICK_CONFIG 0x00
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-#define SYSTICK_COMPARE 0x04
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-#define SYSTICK_COUNT 0x08
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-
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-/* route systick irq to mips irq 7 instead of the r4k-timer */
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-#define CFG_EXT_STK_EN 0x2
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-/* enable the counter */
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-#define CFG_CNT_EN 0x1
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-
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-struct systick_device {
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- void __iomem *membase;
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- struct clock_event_device dev;
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- int irq_requested;
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- int freq_scale;
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-};
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-
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-static int systick_set_oneshot(struct clock_event_device *evt);
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-static int systick_shutdown(struct clock_event_device *evt);
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-
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-static int systick_next_event(unsigned long delta,
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- struct clock_event_device *evt)
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-{
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- struct systick_device *sdev;
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- u32 count;
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-
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- sdev = container_of(evt, struct systick_device, dev);
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- count = ioread32(sdev->membase + SYSTICK_COUNT);
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- count = (count + delta) % SYSTICK_FREQ;
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- iowrite32(count, sdev->membase + SYSTICK_COMPARE);
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-
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- return 0;
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-}
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-
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-static void systick_event_handler(struct clock_event_device *dev)
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-{
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- /* noting to do here */
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-}
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-
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-static irqreturn_t systick_interrupt(int irq, void *dev_id)
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-{
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- struct clock_event_device *dev = (struct clock_event_device *) dev_id;
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-
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- dev->event_handler(dev);
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-
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- return IRQ_HANDLED;
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-}
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-
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-static struct systick_device systick = {
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- .dev = {
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- /*
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- * cevt-r4k uses 300, make sure systick
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- * gets used if available
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- */
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- .rating = 310,
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- .features = CLOCK_EVT_FEAT_ONESHOT,
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- .set_next_event = systick_next_event,
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- .set_state_shutdown = systick_shutdown,
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- .set_state_oneshot = systick_set_oneshot,
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- .event_handler = systick_event_handler,
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- },
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-};
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-
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-static int systick_shutdown(struct clock_event_device *evt)
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-{
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- struct systick_device *sdev;
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-
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- sdev = container_of(evt, struct systick_device, dev);
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-
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- if (sdev->irq_requested)
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- free_irq(systick.dev.irq, &systick.dev);
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- sdev->irq_requested = 0;
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- iowrite32(0, systick.membase + SYSTICK_CONFIG);
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-
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- return 0;
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-}
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-
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-static int systick_set_oneshot(struct clock_event_device *evt)
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-{
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- const char *name = systick.dev.name;
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- struct systick_device *sdev;
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- int irq = systick.dev.irq;
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-
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- sdev = container_of(evt, struct systick_device, dev);
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-
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- if (!sdev->irq_requested) {
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- if (request_irq(irq, systick_interrupt,
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- IRQF_PERCPU | IRQF_TIMER, name, &systick.dev))
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- pr_err("Failed to request irq %d (%s)\n", irq, name);
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- }
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- sdev->irq_requested = 1;
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- iowrite32(CFG_EXT_STK_EN | CFG_CNT_EN,
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- systick.membase + SYSTICK_CONFIG);
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-
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- return 0;
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-}
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-
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-static int __init ralink_systick_init(struct device_node *np)
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-{
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- int ret;
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-
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- systick.membase = of_iomap(np, 0);
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- if (!systick.membase)
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- return -ENXIO;
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-
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- systick.dev.name = np->name;
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- clockevents_calc_mult_shift(&systick.dev, SYSTICK_FREQ, 60);
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- systick.dev.max_delta_ns = clockevent_delta2ns(0x7fff, &systick.dev);
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- systick.dev.max_delta_ticks = 0x7fff;
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- systick.dev.min_delta_ns = clockevent_delta2ns(0x3, &systick.dev);
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- systick.dev.min_delta_ticks = 0x3;
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- systick.dev.irq = irq_of_parse_and_map(np, 0);
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- if (!systick.dev.irq) {
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- pr_err("%pOFn: request_irq failed", np);
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- return -EINVAL;
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- }
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-
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- ret = clocksource_mmio_init(systick.membase + SYSTICK_COUNT, np->name,
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- SYSTICK_FREQ, 301, 16,
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- clocksource_mmio_readl_up);
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- if (ret)
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- return ret;
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-
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- clockevents_register_device(&systick.dev);
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-
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- pr_info("%pOFn: running - mult: %d, shift: %d\n",
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- np, systick.dev.mult, systick.dev.shift);
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-
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- return 0;
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-}
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-
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-TIMER_OF_DECLARE(systick, "ralink,cevt-systick", ralink_systick_init);
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--- a/drivers/clocksource/Kconfig
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+++ b/drivers/clocksource/Kconfig
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@@ -755,4 +755,13 @@ config EP93XX_TIMER
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Enables support for the Cirrus Logic timer block
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EP93XX.
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+config RALINK_TIMER
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+ bool "Ralink System Tick Counter"
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+ depends on SOC_RT305X || SOC_MT7620 || COMPILE_TEST
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+ select CLKSRC_MMIO
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+ select TIMER_OF
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+ help
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+ Enables support for system tick counter present on
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+ Ralink SoCs RT3352 and MT7620.
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+
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endmenu
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--- a/drivers/clocksource/Makefile
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+++ b/drivers/clocksource/Makefile
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@@ -91,3 +91,4 @@ obj-$(CONFIG_GOLDFISH_TIMER) += timer-g
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obj-$(CONFIG_GXP_TIMER) += timer-gxp.o
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obj-$(CONFIG_CLKSRC_LOONGSON1_PWM) += timer-loongson1-pwm.o
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obj-$(CONFIG_EP93XX_TIMER) += timer-ep93xx.o
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+obj-$(CONFIG_RALINK_TIMER) += timer-ralink.o
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--- /dev/null
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+++ b/drivers/clocksource/timer-ralink.c
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@@ -0,0 +1,150 @@
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+// SPDX-License-Identifier: GPL-2.0
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+/*
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+ * Ralink System Tick Counter driver present on RT3352 and MT7620 SoCs.
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+ *
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+ * Copyright (C) 2013 by John Crispin <john@phrozen.org>
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+ */
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+
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+#include <linux/clockchips.h>
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+#include <linux/clocksource.h>
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+#include <linux/interrupt.h>
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+#include <linux/reset.h>
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+#include <linux/init.h>
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+#include <linux/time.h>
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+#include <linux/of.h>
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+#include <linux/of_irq.h>
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+#include <linux/of_address.h>
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+
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+#define SYSTICK_FREQ (50 * 1000)
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+
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+#define SYSTICK_CONFIG 0x00
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+#define SYSTICK_COMPARE 0x04
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+#define SYSTICK_COUNT 0x08
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+
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+/* route systick irq to mips irq 7 instead of the r4k-timer */
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+#define CFG_EXT_STK_EN 0x2
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+/* enable the counter */
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+#define CFG_CNT_EN 0x1
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+
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+struct systick_device {
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+ void __iomem *membase;
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+ struct clock_event_device dev;
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+ int irq_requested;
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+ int freq_scale;
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+};
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+
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+static int systick_set_oneshot(struct clock_event_device *evt);
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+static int systick_shutdown(struct clock_event_device *evt);
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+
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+static int systick_next_event(unsigned long delta,
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+ struct clock_event_device *evt)
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+{
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+ struct systick_device *sdev;
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+ u32 count;
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+
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+ sdev = container_of(evt, struct systick_device, dev);
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+ count = ioread32(sdev->membase + SYSTICK_COUNT);
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+ count = (count + delta) % SYSTICK_FREQ;
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+ iowrite32(count, sdev->membase + SYSTICK_COMPARE);
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+
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+ return 0;
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+}
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+
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+static void systick_event_handler(struct clock_event_device *dev)
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+{
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+ /* noting to do here */
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+}
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+
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+static irqreturn_t systick_interrupt(int irq, void *dev_id)
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+{
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+ struct clock_event_device *dev = (struct clock_event_device *)dev_id;
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+
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+ dev->event_handler(dev);
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+
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+ return IRQ_HANDLED;
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+}
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+
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+static struct systick_device systick = {
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+ .dev = {
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+ /*
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+ * cevt-r4k uses 300, make sure systick
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+ * gets used if available
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+ */
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+ .rating = 310,
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+ .features = CLOCK_EVT_FEAT_ONESHOT,
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+ .set_next_event = systick_next_event,
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+ .set_state_shutdown = systick_shutdown,
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+ .set_state_oneshot = systick_set_oneshot,
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+ .event_handler = systick_event_handler,
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+ },
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+};
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+
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+static int systick_shutdown(struct clock_event_device *evt)
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+{
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+ struct systick_device *sdev;
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+
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+ sdev = container_of(evt, struct systick_device, dev);
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+
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+ if (sdev->irq_requested)
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+ free_irq(systick.dev.irq, &systick.dev);
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+ sdev->irq_requested = 0;
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+ iowrite32(0, systick.membase + SYSTICK_CONFIG);
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+
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+ return 0;
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+}
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+
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+static int systick_set_oneshot(struct clock_event_device *evt)
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+{
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+ const char *name = systick.dev.name;
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+ struct systick_device *sdev;
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+ int irq = systick.dev.irq;
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+
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+ sdev = container_of(evt, struct systick_device, dev);
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+
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+ if (!sdev->irq_requested) {
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+ if (request_irq(irq, systick_interrupt,
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+ IRQF_PERCPU | IRQF_TIMER, name, &systick.dev))
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+ pr_err("Failed to request irq %d (%s)\n", irq, name);
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+ }
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+ sdev->irq_requested = 1;
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+ iowrite32(CFG_EXT_STK_EN | CFG_CNT_EN,
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+ systick.membase + SYSTICK_CONFIG);
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+
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+ return 0;
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+}
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+
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+static int __init ralink_systick_init(struct device_node *np)
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+{
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+ int ret;
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+
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+ systick.membase = of_iomap(np, 0);
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+ if (!systick.membase)
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+ return -ENXIO;
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+
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+ systick.dev.name = np->name;
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+ clockevents_calc_mult_shift(&systick.dev, SYSTICK_FREQ, 60);
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+ systick.dev.max_delta_ns = clockevent_delta2ns(0x7fff, &systick.dev);
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+ systick.dev.max_delta_ticks = 0x7fff;
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+ systick.dev.min_delta_ns = clockevent_delta2ns(0x3, &systick.dev);
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+ systick.dev.min_delta_ticks = 0x3;
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+ systick.dev.irq = irq_of_parse_and_map(np, 0);
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+ if (!systick.dev.irq) {
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+ pr_err("%pOFn: request_irq failed", np);
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+ return -EINVAL;
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+ }
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+
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+ ret = clocksource_mmio_init(systick.membase + SYSTICK_COUNT, np->name,
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+ SYSTICK_FREQ, 301, 16,
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+ clocksource_mmio_readl_up);
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+ if (ret)
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+ return ret;
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+
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+ clockevents_register_device(&systick.dev);
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+
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+ pr_info("%pOFn: running - mult: %d, shift: %d\n",
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+ np, systick.dev.mult, systick.dev.shift);
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+
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+ return 0;
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+}
|
||||
+
|
||||
+TIMER_OF_DECLARE(systick, "ralink,cevt-systick", ralink_systick_init);
|
||||
@ -1,101 +0,0 @@
|
||||
From 198675bbc03d437fb80a35d781ad13d622d0ff68 Mon Sep 17 00:00:00 2001
|
||||
From: Sergio Paracuellos <sergio.paracuellos@gmail.com>
|
||||
Date: Tue, 10 Sep 2024 06:40:24 +0200
|
||||
Subject: [PATCH 3/3] clk: ralink: mtmips: add mmc related clocks for SoCs
|
||||
MT7620, MT7628 and MT7688
|
||||
|
||||
Original architecture clock code from where this driver was derived did not
|
||||
include nothing related to mmc clocks. OpenWRT people started to use mtk-sd
|
||||
upstream driver recently and they were forced to use a dts 'fixed-clock'
|
||||
node with 48 MHz clock:
|
||||
- https://github.com/openwrt/openwrt/pull/15896
|
||||
The proper thing to do to avoid that is to add the mmc related clocks to the
|
||||
driver to avoid a dts with fixed clocks nodes. The minimal documentation in
|
||||
the mt7620 programming guide says that there is a BBP_PLL clock of 480 MHz
|
||||
derived from the 40 MHz XTAL and from there a clock divider by ten produces
|
||||
the desired SDHC clock of 48 MHz for the mmc. Hence add a fixed clock 'bbppll'
|
||||
and factor clock 'sdhc' ten divider child to properly set the 'mmc' peripheral
|
||||
clock with the desired 48 Mhz rate.
|
||||
|
||||
Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
|
||||
Link: https://lore.kernel.org/r/20240910044024.120009-4-sergio.paracuellos@gmail.com
|
||||
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
|
||||
---
|
||||
drivers/clk/ralink/clk-mtmips.c | 30 +++++++++++++++++++++++-------
|
||||
1 file changed, 23 insertions(+), 7 deletions(-)
|
||||
|
||||
--- a/drivers/clk/ralink/clk-mtmips.c
|
||||
+++ b/drivers/clk/ralink/clk-mtmips.c
|
||||
@@ -207,6 +207,7 @@ static struct mtmips_clk mt7620_pherip_c
|
||||
{ CLK_PERIPH("10000b00.spi", "bus") },
|
||||
{ CLK_PERIPH("10000b40.spi", "bus") },
|
||||
{ CLK_PERIPH("10000c00.uartlite", "periph") },
|
||||
+ { CLK_PERIPH("10130000.mmc", "sdhc") },
|
||||
{ CLK_PERIPH("10180000.wmac", "xtal") }
|
||||
};
|
||||
|
||||
@@ -220,6 +221,7 @@ static struct mtmips_clk mt76x8_pherip_c
|
||||
{ CLK_PERIPH("10000c00.uart0", "periph") },
|
||||
{ CLK_PERIPH("10000d00.uart1", "periph") },
|
||||
{ CLK_PERIPH("10000e00.uart2", "periph") },
|
||||
+ { CLK_PERIPH("10130000.mmc", "sdhc") },
|
||||
{ CLK_PERIPH("10300000.wmac", "xtal") }
|
||||
};
|
||||
|
||||
@@ -271,8 +273,13 @@ static struct mtmips_clk_fixed rt3352_fi
|
||||
CLK_FIXED("periph", "xtal", 40000000)
|
||||
};
|
||||
|
||||
+static struct mtmips_clk_fixed mt7620_fixed_clocks[] = {
|
||||
+ CLK_FIXED("bbppll", "xtal", 480000000)
|
||||
+};
|
||||
+
|
||||
static struct mtmips_clk_fixed mt76x8_fixed_clocks[] = {
|
||||
- CLK_FIXED("pcmi2s", "xtal", 480000000),
|
||||
+ CLK_FIXED("bbppll", "xtal", 480000000),
|
||||
+ CLK_FIXED("pcmi2s", "bbppll", 480000000),
|
||||
CLK_FIXED("periph", "xtal", 40000000)
|
||||
};
|
||||
|
||||
@@ -327,6 +334,15 @@ static struct mtmips_clk_factor rt305x_f
|
||||
CLK_FACTOR("bus", "cpu", 1, 3)
|
||||
};
|
||||
|
||||
+static struct mtmips_clk_factor mt7620_factor_clocks[] = {
|
||||
+ CLK_FACTOR("sdhc", "bbppll", 1, 10)
|
||||
+};
|
||||
+
|
||||
+static struct mtmips_clk_factor mt76x8_factor_clocks[] = {
|
||||
+ CLK_FACTOR("bus", "cpu", 1, 3),
|
||||
+ CLK_FACTOR("sdhc", "bbppll", 1, 10)
|
||||
+};
|
||||
+
|
||||
static int mtmips_register_factor_clocks(struct clk_hw_onecell_data *clk_data,
|
||||
struct mtmips_clk_priv *priv)
|
||||
{
|
||||
@@ -810,10 +826,10 @@ static const struct mtmips_clk_data rt53
|
||||
static const struct mtmips_clk_data mt7620_clk_data = {
|
||||
.clk_base = mt7620_clks_base,
|
||||
.num_clk_base = ARRAY_SIZE(mt7620_clks_base),
|
||||
- .clk_fixed = NULL,
|
||||
- .num_clk_fixed = 0,
|
||||
- .clk_factor = NULL,
|
||||
- .num_clk_factor = 0,
|
||||
+ .clk_fixed = mt7620_fixed_clocks,
|
||||
+ .num_clk_fixed = ARRAY_SIZE(mt7620_fixed_clocks),
|
||||
+ .clk_factor = mt7620_factor_clocks,
|
||||
+ .num_clk_factor = ARRAY_SIZE(mt7620_factor_clocks),
|
||||
.clk_periph = mt7620_pherip_clks,
|
||||
.num_clk_periph = ARRAY_SIZE(mt7620_pherip_clks),
|
||||
};
|
||||
@@ -823,8 +839,8 @@ static const struct mtmips_clk_data mt76
|
||||
.num_clk_base = ARRAY_SIZE(mt76x8_clks_base),
|
||||
.clk_fixed = mt76x8_fixed_clocks,
|
||||
.num_clk_fixed = ARRAY_SIZE(mt76x8_fixed_clocks),
|
||||
- .clk_factor = rt305x_factor_clocks,
|
||||
- .num_clk_factor = ARRAY_SIZE(rt305x_factor_clocks),
|
||||
+ .clk_factor = mt76x8_factor_clocks,
|
||||
+ .num_clk_factor = ARRAY_SIZE(mt76x8_factor_clocks),
|
||||
.clk_periph = mt76x8_pherip_clks,
|
||||
.num_clk_periph = ARRAY_SIZE(mt76x8_pherip_clks),
|
||||
};
|
||||
@ -1,188 +0,0 @@
|
||||
From 7e9ddd7d45897b15a64c4a3c88f2f7909bf49749 Mon Sep 17 00:00:00 2001
|
||||
From: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
|
||||
Date: Mon, 30 Sep 2024 11:01:56 +0200
|
||||
Subject: [PATCH] mmc: mtk-sd: Implement Host Software Queue for eMMC and SD
|
||||
Card
|
||||
|
||||
Add support for Host Software Queue (HSQ) and enable it when the
|
||||
controller instance does not have Command Queue Engine HW support.
|
||||
|
||||
It was chosen to enable HSQ only for eMMC and SD/MicroSD cards
|
||||
and not for SDIO as performance improvements are seen only for
|
||||
the former.
|
||||
|
||||
Performance was measured with a SanDisk Extreme Ultra A2 MicroSD
|
||||
card in a MediaTek MT8195T Acer Chromebook Spin 513 (CP513-2H),
|
||||
by running FIO (bs=4k) on an ArchLinux userspace.
|
||||
|
||||
.... Summarizing ....
|
||||
Random read: +24.28% IOPS, +24.29% BW
|
||||
Sequential read: +3.14% IOPS, +3.49% BW
|
||||
Random RW (avg): +50.53% IOPS, +50.68% BW
|
||||
|
||||
Below, more data from the benchmarks.
|
||||
|
||||
Before:
|
||||
- Random read: IOPS=1643, BW=6574KiB/s
|
||||
bw ( KiB/s): min= 4578, max= 7440, per=99.95%, avg=6571.55, stdev=74.16, samples=953
|
||||
iops : min= 1144, max= 1860, avg=1642.14, stdev=18.54, samples=953
|
||||
lat (msec) : 100=0.01%, 250=0.12%, 500=0.38%, 750=97.89%, 1000=1.44%, 2000=0.16%
|
||||
- Sequential read: IOPS=19.1k, BW=74.4MiB/s
|
||||
bw ( KiB/s): min=12288, max=118483, per=100.00%, avg=76293.38, stdev=1971.42, samples=956
|
||||
iops : min= 3072, max=29620, avg=19072.14, stdev=492.87, samples=956
|
||||
lat (msec) : 4=0.01%, 10=0.01%, 20=0.21%, 50=23.95%, 100=75.67%, 250=0.05%, 500=0.03%, 750=0.08%
|
||||
- Random R/W: read: IOPS=282, BW=1129KiB/s (1156kB/s) write: IOPS=284, BW=1136KiB/s
|
||||
read bw ( KiB/s): min= 31, max= 3496, per=100.00%, avg=1703.67, stdev=155.42, samples=630
|
||||
read iops : min= 7, max= 873, avg=425.22, stdev=38.85, samples=630
|
||||
wri bw ( KiB/s): min= 31, max= 3443, per=100.00%, avg=1674.27, stdev=164.23, samples=644
|
||||
wri iops : min= 7, max= 860, avg=417.87, stdev=41.03, samples=644
|
||||
lat (msec) : 250=0.13%, 500=0.44%, 750=0.84%, 1000=22.29%, 2000=74.01%, >=2000=2.30%
|
||||
|
||||
After:
|
||||
- Random read: IOPS=2042, BW=8171KiB/s
|
||||
bw ( KiB/s): min= 4907, max= 9072, per=99.94%, avg=8166.80, stdev=93.77, samples=954
|
||||
iops : min= 1226, max= 2268, avg=2040.78, stdev=23.41, samples=954
|
||||
lat (msec) : 100=0.03%, 250=0.13%, 500=52.88%, 750=46.64%, 1000=0.32%
|
||||
- Sequential read: IOPS=19.7k, BW=77.0MiB/s
|
||||
bw ( KiB/s): min=67980, max=94248, per=100.00%, avg=78894.27, stdev=1475.07, samples=956
|
||||
iops : min=16994, max=23562, avg=19722.45, stdev=368.76, samples=956
|
||||
lat (msec) : 4=0.01%, 10=0.01%, 20=0.05%, 50=28.78%, 100=71.14%, 250=0.01%, 500=0.02%
|
||||
- Random R/W: read: IOPS=424, BW=1699KiB/s write: IOPS=428, BW=1714KiB/s
|
||||
read bw ( KiB/s): min= 228, max= 2856, per=100.00%, avg=1796.60, stdev=112.59, samples=901
|
||||
read iops : min= 54, max= 712, avg=447.81, stdev=28.21, samples=901
|
||||
wri bw ( KiB/s): min= 28, max= 2904, per=100.00%, avg=1780.11, stdev=128.27, samples=916
|
||||
wri iops : min= 4, max= 724, avg=443.69, stdev=32.14, samples=916
|
||||
|
||||
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
|
||||
Link: https://lore.kernel.org/r/20240930090156.33537-1-angelogioacchino.delregno@collabora.com
|
||||
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
|
||||
---
|
||||
drivers/mmc/host/Kconfig | 1 +
|
||||
drivers/mmc/host/mtk-sd.c | 49 +++++++++++++++++++++++++++++++++++++--
|
||||
2 files changed, 48 insertions(+), 2 deletions(-)
|
||||
|
||||
--- a/drivers/mmc/host/Kconfig
|
||||
+++ b/drivers/mmc/host/Kconfig
|
||||
@@ -1009,6 +1009,7 @@ config MMC_MTK
|
||||
depends on COMMON_CLK
|
||||
select REGULATOR
|
||||
select MMC_CQHCI
|
||||
+ select MMC_HSQ
|
||||
help
|
||||
This selects the MediaTek(R) Secure digital and Multimedia card Interface.
|
||||
If you have a machine with a integrated SD/MMC card reader, say Y or M here.
|
||||
--- a/drivers/mmc/host/mtk-sd.c
|
||||
+++ b/drivers/mmc/host/mtk-sd.c
|
||||
@@ -33,6 +33,7 @@
|
||||
#include <linux/mmc/slot-gpio.h>
|
||||
|
||||
#include "cqhci.h"
|
||||
+#include "mmc_hsq.h"
|
||||
|
||||
#define MAX_BD_NUM 1024
|
||||
#define MSDC_NR_CLOCKS 3
|
||||
@@ -475,6 +476,7 @@ struct msdc_host {
|
||||
bool hs400_tuning; /* hs400 mode online tuning */
|
||||
bool internal_cd; /* Use internal card-detect logic */
|
||||
bool cqhci; /* support eMMC hw cmdq */
|
||||
+ bool hsq_en; /* Host Software Queue is enabled */
|
||||
struct msdc_save_para save_para; /* used when gate HCLK */
|
||||
struct msdc_tune_para def_tune_para; /* default tune setting */
|
||||
struct msdc_tune_para saved_tune_para; /* tune result of CMD21/CMD19 */
|
||||
@@ -1171,7 +1173,9 @@ static void msdc_track_cmd_data(struct m
|
||||
|
||||
static void msdc_request_done(struct msdc_host *host, struct mmc_request *mrq)
|
||||
{
|
||||
+ struct mmc_host *mmc = mmc_from_priv(host);
|
||||
unsigned long flags;
|
||||
+ bool hsq_req_done;
|
||||
|
||||
/*
|
||||
* No need check the return value of cancel_delayed_work, as only ONE
|
||||
@@ -1179,6 +1183,27 @@ static void msdc_request_done(struct msd
|
||||
*/
|
||||
cancel_delayed_work(&host->req_timeout);
|
||||
|
||||
+ /*
|
||||
+ * If the request was handled from Host Software Queue, there's almost
|
||||
+ * nothing to do here, and we also don't need to reset mrq as any race
|
||||
+ * condition would not have any room to happen, since HSQ stores the
|
||||
+ * "scheduled" mrqs in an internal array of mrq slots anyway.
|
||||
+ * However, if the controller experienced an error, we still want to
|
||||
+ * reset it as soon as possible.
|
||||
+ *
|
||||
+ * Note that non-HSQ requests will still be happening at times, even
|
||||
+ * though it is enabled, and that's what is going to reset host->mrq.
|
||||
+ * Also, msdc_unprepare_data() is going to be called by HSQ when needed
|
||||
+ * as HSQ request finalization will eventually call the .post_req()
|
||||
+ * callback of this driver which, in turn, unprepares the data.
|
||||
+ */
|
||||
+ hsq_req_done = host->hsq_en ? mmc_hsq_finalize_request(mmc, mrq) : false;
|
||||
+ if (hsq_req_done) {
|
||||
+ if (host->error)
|
||||
+ msdc_reset_hw(host);
|
||||
+ return;
|
||||
+ }
|
||||
+
|
||||
spin_lock_irqsave(&host->lock, flags);
|
||||
host->mrq = NULL;
|
||||
spin_unlock_irqrestore(&host->lock, flags);
|
||||
@@ -1188,7 +1213,7 @@ static void msdc_request_done(struct msd
|
||||
msdc_unprepare_data(host, mrq->data);
|
||||
if (host->error)
|
||||
msdc_reset_hw(host);
|
||||
- mmc_request_done(mmc_from_priv(host), mrq);
|
||||
+ mmc_request_done(mmc, mrq);
|
||||
if (host->dev_comp->recheck_sdio_irq)
|
||||
msdc_recheck_sdio_irq(host);
|
||||
}
|
||||
@@ -1348,7 +1373,7 @@ static void msdc_ops_request(struct mmc_
|
||||
struct msdc_host *host = mmc_priv(mmc);
|
||||
|
||||
host->error = 0;
|
||||
- WARN_ON(host->mrq);
|
||||
+ WARN_ON(!host->hsq_en && host->mrq);
|
||||
host->mrq = mrq;
|
||||
|
||||
if (mrq->data) {
|
||||
@@ -2925,6 +2950,19 @@ static int msdc_drv_probe(struct platfor
|
||||
mmc->max_seg_size = 64 * 1024;
|
||||
/* Reduce CIT to 0x40 that corresponds to 2.35us */
|
||||
msdc_cqe_cit_cal(host, 2350);
|
||||
+ } else if (mmc->caps2 & MMC_CAP2_NO_SDIO) {
|
||||
+ /* Use HSQ on eMMC/SD (but not on SDIO) if HW CQE not supported */
|
||||
+ struct mmc_hsq *hsq = devm_kzalloc(&pdev->dev, sizeof(*hsq), GFP_KERNEL);
|
||||
+ if (!hsq) {
|
||||
+ ret = -ENOMEM;
|
||||
+ goto release;
|
||||
+ }
|
||||
+
|
||||
+ ret = mmc_hsq_init(hsq, mmc);
|
||||
+ if (ret)
|
||||
+ goto release;
|
||||
+
|
||||
+ host->hsq_en = true;
|
||||
}
|
||||
|
||||
ret = devm_request_irq(&pdev->dev, host->irq, msdc_irq,
|
||||
@@ -3050,6 +3088,9 @@ static int __maybe_unused msdc_runtime_s
|
||||
struct mmc_host *mmc = dev_get_drvdata(dev);
|
||||
struct msdc_host *host = mmc_priv(mmc);
|
||||
|
||||
+ if (host->hsq_en)
|
||||
+ mmc_hsq_suspend(mmc);
|
||||
+
|
||||
msdc_save_reg(host);
|
||||
|
||||
if (sdio_irq_claimed(mmc)) {
|
||||
@@ -3080,6 +3121,10 @@ static int __maybe_unused msdc_runtime_r
|
||||
pinctrl_select_state(host->pinctrl, host->pins_uhs);
|
||||
enable_irq(host->irq);
|
||||
}
|
||||
+
|
||||
+ if (host->hsq_en)
|
||||
+ mmc_hsq_resume(mmc);
|
||||
+
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -1,188 +0,0 @@
|
||||
From adb2424d0d05506c2f36fcba66101d34f7409e45 Mon Sep 17 00:00:00 2001
|
||||
From: Sergio Paracuellos <sergio.paracuellos@gmail.com>
|
||||
Date: Mon, 20 Jan 2025 10:21:41 +0100
|
||||
Subject: [PATCH] dt-bindings: clock: add clock definitions for Ralink SoCs
|
||||
|
||||
Add clock missing definitions for RT2880, RT305X, RT3352, RT3383, RT5350,
|
||||
MT7620 and MT76X8 Ralink SoCs. Update bindings to clarify clock depending
|
||||
on these new introduced constants so consumer nodes can easily use the
|
||||
correct one in DTS files matching properly what is being used in driver
|
||||
code (clock IDs are implicitly used there).
|
||||
|
||||
Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
|
||||
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
|
||||
Acked-by: Stephen Boyd <sboyd@kernel.org>
|
||||
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
|
||||
---
|
||||
.../bindings/clock/mediatek,mtmips-sysc.yaml | 11 +-
|
||||
.../dt-bindings/clock/mediatek,mtmips-sysc.h | 130 ++++++++++++++++++
|
||||
2 files changed, 140 insertions(+), 1 deletion(-)
|
||||
create mode 100644 include/dt-bindings/clock/mediatek,mtmips-sysc.h
|
||||
|
||||
--- a/Documentation/devicetree/bindings/clock/mediatek,mtmips-sysc.yaml
|
||||
+++ b/Documentation/devicetree/bindings/clock/mediatek,mtmips-sysc.yaml
|
||||
@@ -18,6 +18,12 @@ description: |
|
||||
These SoCs have an XTAL from where the cpu clock is
|
||||
provided as well as derived clocks for the bus and the peripherals.
|
||||
|
||||
+ Each clock is assigned an identifier and client nodes use this identifier
|
||||
+ to specify the clock which they consume.
|
||||
+
|
||||
+ All these identifiers could be found in:
|
||||
+ [1]: <include/dt-bindings/clock/mediatek,mtmips-sysc.h>.
|
||||
+
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
@@ -38,7 +44,8 @@ properties:
|
||||
|
||||
'#clock-cells':
|
||||
description:
|
||||
- The first cell indicates the clock number.
|
||||
+ The first cell indicates the clock number, see [1] for available
|
||||
+ clocks.
|
||||
const: 1
|
||||
|
||||
'#reset-cells':
|
||||
@@ -56,6 +63,8 @@ additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
+ #include <dt-bindings/clock/mediatek,mtmips-sysc.h>
|
||||
+
|
||||
syscon@0 {
|
||||
compatible = "ralink,rt5350-sysc", "syscon";
|
||||
reg = <0x0 0x100>;
|
||||
--- /dev/null
|
||||
+++ b/include/dt-bindings/clock/mediatek,mtmips-sysc.h
|
||||
@@ -0,0 +1,130 @@
|
||||
+/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
|
||||
+/*
|
||||
+ * Author: Sergio Paracuellos <sergio.paracuellos@gmail.com>
|
||||
+ */
|
||||
+
|
||||
+#ifndef _DT_BINDINGS_CLK_MTMIPS_H
|
||||
+#define _DT_BINDINGS_CLK_MTMIPS_H
|
||||
+
|
||||
+/* Ralink RT-2880 clocks */
|
||||
+
|
||||
+#define RT2880_CLK_XTAL 0
|
||||
+#define RT2880_CLK_CPU 1
|
||||
+#define RT2880_CLK_BUS 2
|
||||
+#define RT2880_CLK_TIMER 3
|
||||
+#define RT2880_CLK_WATCHDOG 4
|
||||
+#define RT2880_CLK_UART 5
|
||||
+#define RT2880_CLK_I2C 6
|
||||
+#define RT2880_CLK_UARTLITE 7
|
||||
+#define RT2880_CLK_ETHERNET 8
|
||||
+#define RT2880_CLK_WMAC 9
|
||||
+
|
||||
+/* Ralink RT-305X clocks */
|
||||
+
|
||||
+#define RT305X_CLK_XTAL 0
|
||||
+#define RT305X_CLK_CPU 1
|
||||
+#define RT305X_CLK_BUS 2
|
||||
+#define RT305X_CLK_TIMER 3
|
||||
+#define RT305X_CLK_WATCHDOG 4
|
||||
+#define RT305X_CLK_UART 5
|
||||
+#define RT305X_CLK_I2C 6
|
||||
+#define RT305X_CLK_I2S 7
|
||||
+#define RT305X_CLK_SPI1 8
|
||||
+#define RT305X_CLK_SPI2 9
|
||||
+#define RT305X_CLK_UARTLITE 10
|
||||
+#define RT305X_CLK_ETHERNET 11
|
||||
+#define RT305X_CLK_WMAC 12
|
||||
+
|
||||
+/* Ralink RT-3352 clocks */
|
||||
+
|
||||
+#define RT3352_CLK_XTAL 0
|
||||
+#define RT3352_CLK_CPU 1
|
||||
+#define RT3352_CLK_PERIPH 2
|
||||
+#define RT3352_CLK_BUS 3
|
||||
+#define RT3352_CLK_TIMER 4
|
||||
+#define RT3352_CLK_WATCHDOG 5
|
||||
+#define RT3352_CLK_UART 6
|
||||
+#define RT3352_CLK_I2C 7
|
||||
+#define RT3352_CLK_I2S 8
|
||||
+#define RT3352_CLK_SPI1 9
|
||||
+#define RT3352_CLK_SPI2 10
|
||||
+#define RT3352_CLK_UARTLITE 11
|
||||
+#define RT3352_CLK_ETHERNET 12
|
||||
+#define RT3352_CLK_WMAC 13
|
||||
+
|
||||
+/* Ralink RT-3883 clocks */
|
||||
+
|
||||
+#define RT3883_CLK_XTAL 0
|
||||
+#define RT3883_CLK_CPU 1
|
||||
+#define RT3883_CLK_BUS 2
|
||||
+#define RT3883_CLK_PERIPH 3
|
||||
+#define RT3883_CLK_TIMER 4
|
||||
+#define RT3883_CLK_WATCHDOG 5
|
||||
+#define RT3883_CLK_UART 6
|
||||
+#define RT3883_CLK_I2C 7
|
||||
+#define RT3883_CLK_I2S 8
|
||||
+#define RT3883_CLK_SPI1 9
|
||||
+#define RT3883_CLK_SPI2 10
|
||||
+#define RT3883_CLK_UARTLITE 11
|
||||
+#define RT3883_CLK_ETHERNET 12
|
||||
+#define RT3883_CLK_WMAC 13
|
||||
+
|
||||
+/* Ralink RT-5350 clocks */
|
||||
+
|
||||
+#define RT5350_CLK_XTAL 0
|
||||
+#define RT5350_CLK_CPU 1
|
||||
+#define RT5350_CLK_BUS 2
|
||||
+#define RT5350_CLK_PERIPH 3
|
||||
+#define RT5350_CLK_TIMER 4
|
||||
+#define RT5350_CLK_WATCHDOG 5
|
||||
+#define RT5350_CLK_UART 6
|
||||
+#define RT5350_CLK_I2C 7
|
||||
+#define RT5350_CLK_I2S 8
|
||||
+#define RT5350_CLK_SPI1 9
|
||||
+#define RT5350_CLK_SPI2 10
|
||||
+#define RT5350_CLK_UARTLITE 11
|
||||
+#define RT5350_CLK_ETHERNET 12
|
||||
+#define RT5350_CLK_WMAC 13
|
||||
+
|
||||
+/* Ralink MT-7620 clocks */
|
||||
+
|
||||
+#define MT7620_CLK_XTAL 0
|
||||
+#define MT7620_CLK_PLL 1
|
||||
+#define MT7620_CLK_CPU 2
|
||||
+#define MT7620_CLK_PERIPH 3
|
||||
+#define MT7620_CLK_BUS 4
|
||||
+#define MT7620_CLK_BBPPLL 5
|
||||
+#define MT7620_CLK_SDHC 6
|
||||
+#define MT7620_CLK_TIMER 7
|
||||
+#define MT7620_CLK_WATCHDOG 8
|
||||
+#define MT7620_CLK_UART 9
|
||||
+#define MT7620_CLK_I2C 10
|
||||
+#define MT7620_CLK_I2S 11
|
||||
+#define MT7620_CLK_SPI1 12
|
||||
+#define MT7620_CLK_SPI2 13
|
||||
+#define MT7620_CLK_UARTLITE 14
|
||||
+#define MT7620_CLK_MMC 15
|
||||
+#define MT7620_CLK_WMAC 16
|
||||
+
|
||||
+/* Ralink MT-76X8 clocks */
|
||||
+
|
||||
+#define MT76X8_CLK_XTAL 0
|
||||
+#define MT76X8_CLK_CPU 1
|
||||
+#define MT76X8_CLK_BBPPLL 2
|
||||
+#define MT76X8_CLK_PCMI2S 3
|
||||
+#define MT76X8_CLK_PERIPH 4
|
||||
+#define MT76X8_CLK_BUS 5
|
||||
+#define MT76X8_CLK_SDHC 6
|
||||
+#define MT76X8_CLK_TIMER 7
|
||||
+#define MT76X8_CLK_WATCHDOG 8
|
||||
+#define MT76X8_CLK_I2C 9
|
||||
+#define MT76X8_CLK_I2S 10
|
||||
+#define MT76X8_CLK_SPI1 11
|
||||
+#define MT76X8_CLK_SPI2 12
|
||||
+#define MT76X8_CLK_UART0 13
|
||||
+#define MT76X8_CLK_UART1 14
|
||||
+#define MT76X8_CLK_UART2 15
|
||||
+#define MT76X8_CLK_MMC 16
|
||||
+#define MT76X8_CLK_WMAC 17
|
||||
+
|
||||
+#endif /* _DT_BINDINGS_CLK_MTMIPS_H */
|
||||
File diff suppressed because it is too large
Load Diff
@ -1,29 +0,0 @@
|
||||
From 6688b218552c6fd3178b40d7d106bf732caec3aa Mon Sep 17 00:00:00 2001
|
||||
From: Mieczyslaw Nalewaj <namiltd@yahoo.com>
|
||||
Date: Sat, 28 Dec 2024 18:09:17 +0100
|
||||
Subject: [PATCH] pci-rt2880: static pcibios_init
|
||||
|
||||
Fixes error:
|
||||
arch/mips/pci/pci-rt2880.c:267:12: error: no previous prototype for 'pcibios_init' [-Werror=missing-prototypes]
|
||||
267 | int __init pcibios_init(void)
|
||||
| ^~~~~~~~~~~~
|
||||
cc1: all warnings being treated as errors
|
||||
make[8]: *** [scripts/Makefile.build:229: arch/mips/pci/pci-rt2880.o] Error 1
|
||||
make[7]: *** [scripts/Makefile.build:478: arch/mips/pci] Error 2
|
||||
|
||||
Signed-off-by: Mieczyslaw Nalewaj <namiltd@yahoo.com>
|
||||
---
|
||||
arch/mips/pci/pci-rt2880.c | 7 +++++++
|
||||
1 file changed, 7 insertions(+)
|
||||
|
||||
--- a/arch/mips/pci/pci-rt2880.c
|
||||
+++ b/arch/mips/pci/pci-rt2880.c
|
||||
@@ -264,7 +264,7 @@ static struct platform_driver rt288x_pci
|
||||
},
|
||||
};
|
||||
|
||||
-int __init pcibios_init(void)
|
||||
+static int __init pcibios_init(void)
|
||||
{
|
||||
int ret = platform_driver_register(&rt288x_pci_driver);
|
||||
|
||||
@ -1,25 +0,0 @@
|
||||
From: Mieczyslaw Nalewaj <namiltd@yahoo.com>
|
||||
Date: Mon, 18 Nov 2024 21:28:05 +0100
|
||||
Subject: mips: ralink: add missing include
|
||||
|
||||
Missing headers causes an error on kernel 6.12:
|
||||
arch/mips/ralink/irq.c:86:5: error: no previous prototype for 'get_c0_perfcount_int' [-Werror=missing-prototypes]
|
||||
86 | int get_c0_perfcount_int(void)
|
||||
| ^~~~~~~~~~~~~~~~~~~~
|
||||
arch/mips/ralink/irq.c:92:14: error: no previous prototype for 'get_c0_compare_int' [-Werror=missing-prototypes]
|
||||
92 | unsigned int get_c0_compare_int(void)
|
||||
| ^~~~~~~~~~~~~~~~~~
|
||||
cc1: all warnings being treated as errors
|
||||
|
||||
Signed-off-by: Mieczyslaw Nalewaj <namiltd@yahoo.com>
|
||||
---
|
||||
--- a/arch/mips/ralink/irq.c
|
||||
+++ b/arch/mips/ralink/irq.c
|
||||
@@ -15,6 +15,7 @@
|
||||
|
||||
#include <asm/irq_cpu.h>
|
||||
#include <asm/mipsregs.h>
|
||||
+#include <asm/time.h>
|
||||
|
||||
#include "common.h"
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user