From ae0c287060749dc72c866484d12bd3cade8c517d Mon Sep 17 00:00:00 2001
From: Mathias Kresin <dev@kresin.me>
Date: Fri, 19 Jan 2018 20:19:06 +0100
Subject: [PATCH] MIPS: lantiq: autoselect matching vr9 rev gphy firmware

Add a custom xrx200 ethernet phy compatible to load the firmware matching
the vr9 revision without specifing an expected revision.

We have quite a few boards in the tree were later produced ones are using
a more recent vr9. It is impossible to distinguish which revision of the
vr9 is used without opening the case and removing a heatsink for some of
them.

Signed-off-by: Mathias Kresin <dev@kresin.me>
---
 drivers/soc/lantiq/gphy.c | 11 +++++++++++
 1 file changed, 11 insertions(+)

--- a/drivers/soc/lantiq/gphy.c
+++ b/drivers/soc/lantiq/gphy.c
@@ -55,6 +55,7 @@ static const struct xway_gphy_match_data
 };
 
 static const struct of_device_id xway_gphy_match[] = {
+	{ .compatible = "lantiq,xrx200-gphy", .data = NULL },
 	{ .compatible = "lantiq,xrx200a1x-gphy", .data = &xrx200a1x_gphy_data },
 	{ .compatible = "lantiq,xrx200a2x-gphy", .data = &xrx200a2x_gphy_data },
 	{ .compatible = "lantiq,xrx300-gphy", .data = &xrx300_gphy_data },
@@ -111,6 +112,16 @@ static int xway_gphy_of_probe(struct pla
 
 	gphy_fw_name_cfg = of_device_get_match_data(dev);
 
+	if (of_device_is_compatible(pdev->dev.of_node, "lantiq,xrx200-gphy"))
+		switch (ltq_soc_type()) {
+		case SOC_TYPE_VR9:
+			gphy_fw_name_cfg = &xrx200a1x_gphy_data;
+			break;
+		case SOC_TYPE_VR9_2:
+			gphy_fw_name_cfg = &xrx200a2x_gphy_data;
+			break;
+		}
+
 	priv->gphy_clk_gate = devm_clk_get(dev, NULL);
 	if (IS_ERR(priv->gphy_clk_gate)) {
 		dev_err(dev, "Failed to lookup gate clock\n");
