// SPDX-License-Identifier: (GPL-2.0-or-later or MIT)
/dts-v1/;

#include "rtl930x.dtsi"
#include "rtl93xx_linksys_lgs3xxc_nand_common.dtsi"

/ {
	compatible = "linksys,lgs328c", "realtek,rtl9301-soc";
	model = "Linksys LGS328C";

	memory@0 {
		device_type = "memory";
		reg = <0x00000000 0x10000000>, /* 256 MiB lowmem */
		      <0x20000000 0x10000000>; /* 256 MiB highmem */
	};
};

&i2c_mst1 {
	status = "okay";

	i2c2: i2c@2 {
		reg = <2>;
	};
	i2c3: i2c@3 {
		reg = <3>;
	};
	i2c4: i2c@4 {
		reg = <4>;
	};
	i2c5: i2c@5 {
		reg = <5>;
	};
};

&sfp0 {
	i2c-bus = <&i2c2>;
};

&sfp1 {
	i2c-bus = <&i2c3>;
};

&sfp2 {
	i2c-bus = <&i2c4>;
};

&sfp3 {
	i2c-bus = <&i2c5>;
};

&mdio_aux {
	status = "okay";
	gpio1: expander@0 {
		compatible = "realtek,rtl8231";
		reg = <0>;

		gpio-controller;
		#gpio-cells = <2>;
		gpio-ranges = <&gpio1 0 0 37>;

		led-controller {
			compatible = "realtek,rtl8231-leds";
			status = "disabled";
		};
	};
};

&mdio_bus0 {
	phy0: ethernet-phy@0 {
		reg = <0>;
		compatible = "ethernet-phy-ieee802.3-c22";
		realtek,smi-address = <0 0>;
	};
	phy1: ethernet-phy@1 {
		reg = <1>;
		compatible = "ethernet-phy-ieee802.3-c22";
		realtek,smi-address = <0 1>;
	};		
	phy2: ethernet-phy@2 {
		reg = <2>;
		compatible = "ethernet-phy-ieee802.3-c22";
		realtek,smi-address = <0 2>;
	};		
	phy3: ethernet-phy@3 {
		reg = <3>;
		compatible = "ethernet-phy-ieee802.3-c22";
		realtek,smi-address = <0 3>;
	};		
	phy4: ethernet-phy@4 {
		reg = <4>;
		compatible = "ethernet-phy-ieee802.3-c22";
		realtek,smi-address = <0 4>;
	};		
	phy5: ethernet-phy@5 {
		reg = <5>;
		compatible = "ethernet-phy-ieee802.3-c22";
		realtek,smi-address = <0 5>;
	};		
	phy6: ethernet-phy@6 {
		reg = <6>;
		compatible = "ethernet-phy-ieee802.3-c22";
		realtek,smi-address = <0 6>;
	};		
	phy7: ethernet-phy@7 {
		reg = <7>;
		compatible = "ethernet-phy-ieee802.3-c22";
		realtek,smi-address = <0 7>;
	};		
	phy8: ethernet-phy@8 {
		reg = <8>;
		compatible = "ethernet-phy-ieee802.3-c22";
		realtek,smi-address = <1 8>;
	};
	phy9: ethernet-phy@9 {
		reg = <9>;
		compatible = "ethernet-phy-ieee802.3-c22";
		realtek,smi-address = <1 9>;
	};
	phy10: ethernet-phy@10 {
		reg = <10>;
		compatible = "ethernet-phy-ieee802.3-c22";
		realtek,smi-address = <1 10>;
	};
	phy11: ethernet-phy@11 {
		reg = <11>;
		compatible = "ethernet-phy-ieee802.3-c22";
		realtek,smi-address = <1 11>;
	};
	phy12: ethernet-phy@12 {
		reg = <12>;
		compatible = "ethernet-phy-ieee802.3-c22";
		realtek,smi-address = <1 12>;
	};
	phy13: ethernet-phy@13 {
		reg = <13>;
		compatible = "ethernet-phy-ieee802.3-c22";
		realtek,smi-address = <1 13>;
	};
	phy14: ethernet-phy@14 {
		reg = <14>;
		compatible = "ethernet-phy-ieee802.3-c22";
		realtek,smi-address = <1 14>;
	};
	phy15: ethernet-phy@15 {
		reg = <15>;
		compatible = "ethernet-phy-ieee802.3-c22";
		realtek,smi-address = <1 15>;
	};
	phy16: ethernet-phy@16 {
		reg = <16>;
		compatible = "ethernet-phy-ieee802.3-c22";
		realtek,smi-address = <2 16>;
	};
	phy17: ethernet-phy@17 {
		reg = <17>;
		compatible = "ethernet-phy-ieee802.3-c22";
		realtek,smi-address = <2 17>;
	};		
	phy18: ethernet-phy@18 {
		reg = <18>;
		compatible = "ethernet-phy-ieee802.3-c22";
		realtek,smi-address = <2 18>;
	};		
	phy19: ethernet-phy@19 {
		reg = <19>;
		compatible = "ethernet-phy-ieee802.3-c22";
		realtek,smi-address = <2 19>;
	};		
	phy20: ethernet-phy@20 {
		reg = <20>;
		compatible = "ethernet-phy-ieee802.3-c22";
		realtek,smi-address = <2 20>;
	};		
	phy21: ethernet-phy@21 {
		reg = <21>;
		compatible = "ethernet-phy-ieee802.3-c22";
		realtek,smi-address = <2 21>;
	};		
	phy22: ethernet-phy@22 {
		reg = <22>;
		compatible = "ethernet-phy-ieee802.3-c22";
		realtek,smi-address = <2 22>;
	};		
	phy23: ethernet-phy@23 {
		reg = <23>;
		compatible = "ethernet-phy-ieee802.3-c22";
		realtek,smi-address = <2 23>;
	};	
};

&switch0 {
	ports {
		#address-cells = <1>;
		#size-cells = <0>;

		SWITCH_PORT_SDS(0, 1, 0, qsgmii)
		SWITCH_PORT_SDS(1, 2, 0, qsgmii)
		SWITCH_PORT_SDS(2, 3, 0, qsgmii)
		SWITCH_PORT_SDS(3, 4, 0, qsgmii)
		SWITCH_PORT_SDS(4, 5, 1, qsgmii)
		SWITCH_PORT_SDS(5, 6, 1, qsgmii)
		SWITCH_PORT_SDS(6, 7, 1, qsgmii)
		SWITCH_PORT_SDS(7, 8, 1, qsgmii)
		
		SWITCH_PORT_SDS(8, 9, 2, usxgmii)
		SWITCH_PORT_SDS(9, 10, 2, usxgmii)
		SWITCH_PORT_SDS(10, 11, 2, usxgmii)
		SWITCH_PORT_SDS(11, 12, 2, usxgmii)
		SWITCH_PORT_SDS(12, 13, 2, usxgmii)
		SWITCH_PORT_SDS(13, 14, 2, usxgmii)
		SWITCH_PORT_SDS(14, 15, 2, usxgmii)
		SWITCH_PORT_SDS(15, 16, 2, usxgmii)
		
		SWITCH_PORT_SDS(16, 17, 3, usxgmii)
		SWITCH_PORT_SDS(17, 18, 3, usxgmii)
		SWITCH_PORT_SDS(18, 19, 3, usxgmii)
		SWITCH_PORT_SDS(19, 20, 3, usxgmii)
		SWITCH_PORT_SDS(21, 22, 3, usxgmii)
		SWITCH_PORT_SDS(22, 23, 3, usxgmii)
		SWITCH_PORT_SDS(23, 24, 3, usxgmii)
		
		port@24 {
			reg = <24>;
			label = "lan25";
			pcs-handle = <&serdes4>;
			phy-mode = "1000base-x";
			managed = "in-band-status";
			sfp = <&sfp0>;
		};
		port@25 {
			reg = <25>;
			label = "lan26";
			pcs-handle = <&serdes6>;
			phy-mode = "1000base-x";
			managed = "in-band-status";
			sfp = <&sfp1>;
		};
		port@26 {
			reg = <26>;
			label = "lan27";
			pcs-handle = <&serdes8>;
			phy-mode = "1000base-x";
			managed = "in-band-status";
			sfp = <&sfp2>;
		};
		port@27 {
			reg = <27>;
			label = "lan28";
			pcs-handle = <&serdes9>;
			phy-mode = "1000base-x";
			managed = "in-band-status";
			sfp = <&sfp3>;
		};
		
		port@28 {
			reg = <28>;
			ethernet = <&ethernet0>;
			phy-mode = "internal";
			fixed-link {
				speed = <10000>;
				full-duplex;
			};
		};
	};
};
