// SPDX-License-Identifier: GPL-2.0-or-later OR MIT

#include "vr9_avm_fritz736x.dtsi"

/ {
	compatible = "avm,fritz7362sl", "avm,fritz736x", "lantiq,xway", "lantiq,vr9";
	model = "AVM FRITZ!Box 7362 SL";
};

&gpio {
	pinctrl-names = "default";
	pinctrl-0 = <&state_default>;

	state_default: pinmux {
		pcie-rst {
			lantiq,pins = "io21";
			lantiq,pull = <0>;
			lantiq,output = <1>;
		};

		phy-rst {
			lantiq,pins = "io44", "io45";
			lantiq,pull = <0>;
			lantiq,open-drain;
			lantiq,output = <1>;
		};
	};

};

&spi {
	status = "okay";

	flash@4 {
		compatible = "jedec,spi-nor";
		reg = <4>;
		spi-max-frequency = <1000000>;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			urlader: partition@0 {
				reg = <0x0 0x40000>;
				label = "urlader";
				read-only;

				nvmem-layout {
					compatible = "fixed-layout";
					#address-cells = <1>;
					#size-cells = <1>;

					macaddr_urlader_a91: macaddr@a91 {
						compatible = "mac-base";
						reg = <0xa91 0x6>;
						#nvmem-cell-cells = <1>;
					};
				};
			};

			partition@40000 {
				reg = <0x40000 0x60000>;
				label = "tffs (1)";
				read-only;
			};

			partition@A0000 {
				reg = <0xA0000 0x60000>;
				label = "tffs (2)";
				read-only;
			};
		};
	};
};

&localbus {
	flash1: flash@1 {
		compatible = "lantiq,nand-xway";
		lantiq,cs1 = <1>;
		bank-width = <1>;
		reg = <1 0x0 0x2000000>;

		pinctrl-0 = <&nand_pins>, <&nand_cs1_pins>;
		pinctrl-names = "default";

		nand-ecc-engine = <&flash1>;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			partition@0 {
				label = "kernel";
				reg = <0x0 0x400000>;
			};

			partition@400000 {
				label = "ubi";
				reg = <0x400000 0x7c00000>;
			};
		};
	};
};

&pcie0 {
	gpio-reset = <&gpio 21 GPIO_ACTIVE_LOW>;

	pcie@0 {
		#size-cells = <1>;
		#address-cells = <2>;
	};
};

&eth0 {
	nvmem-cells = <&macaddr_urlader_a91 (-2)>;
	nvmem-cell-names = "mac-address";
};

&phy0 {
	reset-gpios = <&gpio 45 GPIO_ACTIVE_LOW>;
};

&phy1 {
	reset-gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
};

&wifi {
	compatible = "pci168c,0030";
	qca,no-eeprom; /* load from ath9k-eeprom-pci-0000:01:00.0.bin */
};
