// SPDX-License-Identifier: (GPL-2.0 OR MIT)

/dts-v1/;
#include "mt7988a-rfb.dts"
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/leds/common.h>

/ {
	compatible = "arcadyan,mozart", "mediatek,mt7988a";
	model = "MediaTek / Arcadyan - Mozart";

	aliases {
		serial0 = &serial0;
		led-boot = &led_status_blue;
		led-failsafe = &led_status_red;
		led-running = &led_status_green;
		led-upgrade = &led_status_green;
	};

	chosen {
		rootdisk = <&emmc_rootfs>;
	};

	gpio-leds {
		compatible = "gpio-leds";

		wifi_white {
			color = <LED_COLOR_ID_WHITE>;
			function = LED_FUNCTION_STATUS;
			gpios = <&pio 68 GPIO_ACTIVE_HIGH>;
		};

		led_status_red: wifi_red {
			color = <LED_COLOR_ID_RED>;
			function = LED_FUNCTION_STATUS;
			gpios = <&pio 29 GPIO_ACTIVE_HIGH>;
		};

		led_status_green: wifi_green {
			color = <LED_COLOR_ID_GREEN>;
			function = LED_FUNCTION_STATUS;
			gpios = <&pio 30 GPIO_ACTIVE_HIGH>;
		};

		led_status_blue: wifi_blue {
			color = <LED_COLOR_ID_BLUE>;
			function = LED_FUNCTION_STATUS;
			gpios = <&pio 31 GPIO_ACTIVE_HIGH>;
		};
	};

	keys {
		compatible = "gpio-keys";

		button-reset {
			label = "reset";
			linux,code = <KEY_RESTART>;
			gpios = <&pio 13 GPIO_ACTIVE_LOW>;
		};
	};

	fan: pwm-fan {
		compatible = "pwm-fan";
		#cooling-cells = <2>;
		#thermal-sensor-cells = <1>;
		/* cooling level (0, 1, 2) : (0% duty, 50% duty, 100% duty) */
		cooling-levels = <0 128 255>;
		pwms = <&pwm 1 40000 0>;
	};
};

&usxgmiisys0 {
	mediatek,pnswap-rx;
};

&usxgmiisys1 {
	mediatek,pnswap-rx;
};

&mdio_bus {
	reset-gpios = <&pio 72 GPIO_ACTIVE_LOW>;
	reset-assert-us = <100000>;
	reset-deassert-us = <100000>;

	phy0: ethernet-phy@0 {
		reg = <0>;
		compatible = "ethernet-phy-ieee802.3-c45";
	};

	phy8: ethernet-phy@8 {
		reg = <8>;
		compatible = "ethernet-phy-ieee802.3-c45";
	};
};

&gmac0 {
	nvmem-cells = <&macaddr_factory_4 3>;
	nvmem-cell-names = "mac-address";
};

&gmac1 {
	phy-mode = "usxgmii";
	phy-connection-type = "usxgmii";
	phy = <&phy0>;
	nvmem-cells = <&macaddr_factory_4 4>;
	nvmem-cell-names = "mac-address";
	status = "okay";
};

&gmac2 {
	phy-mode = "usxgmii";
	phy-connection-type = "usxgmii";
	phy = <&phy8>;
	nvmem-cells = <&macaddr_factory_4 5>;
	nvmem-cell-names = "mac-address";
	status = "okay";
};

&switch {
	/delete-node/ports;

	ports {
		#address-cells = <1>;
		#size-cells = <0>;

		gsw_port0: port@0 {
			reg = <0>;
			label = "lan0";
			phy-mode = "internal";
			phy-handle = <&gsw_phy0>;
		};

		port@6 {
			reg = <6>;
			ethernet = <&gmac0>;
			phy-mode = "internal";

			fixed-link {
				speed = <10000>;
				full-duplex;
				pause;
			};
		};
	};
};

&i2c1 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c1_pins>;
	clock-frequency = <100000>;
	status = "okay";

	icp201xx@63{
		compatible = "invensense,icp201xx";
		reg = <0x63>;
		#address-cells = <1>;
		#size-cells = <0>;
	};
};

&pwm {
	status = "okay";
};

&serial1 {
	status = "okay";
};

&spi1 {
	pinctrl-names = "default";
	/* pin shared with snfi */
	pinctrl-0 = <&spi1_pins>;
	status = "disabled";
};

&mmc0 {
	pinctrl-names = "default", "state_uhs";
	pinctrl-0 = <&mmc0_pins_emmc_51>;
	pinctrl-1 = <&mmc0_pins_emmc_51>;
	bus-width = <8>;
	max-frequency = <200000000>;
	cap-mmc-highspeed;
	mmc-hs200-1_8v;
	mmc-hs400-1_8v;
	hs400-ds-delay = <0x12814>;
	vqmmc-supply = <&reg_1p8v>;
	vmmc-supply = <&reg_3p3v>;
	non-removable;
	no-sd;
	no-sdio;
	status = "okay";

	card@0 {
		compatible = "mmc-card";
		reg = <0>;

		block {
			compatible = "block-device";
			partitions {
				block-partition-env {
					partname = "u-boot-env";
					nvmem-layout {
						compatible = "u-boot,env-layout";
					};
				};

				emmc_rootfs: block-partition-production {
					partname = "production";
				};

				block-partition-factory {
					partname = "factory";

					nvmem-layout {
						compatible = "fixed-layout";
						#address-cells = <1>;
						#size-cells = <1>;

						eeprom_factory_0: eeprom@0 {
							reg = <0x0 0x1e00>;
						};

						macaddr_factory_4: macaddr@a {
							compatible = "mac-base";
							reg = <0x4 0x6>;
							#nvmem-cell-cells = <1>;
						};
					};
				};
			};
		};
	};
};

&cpu_thermal {
	/delete-node/cooling-maps;
	/delete-node/trips;

	trips {
		cpu_trip_crit: crit {
			temperature = <125000>;
			hysteresis = <2000>;
			type = "critical";
		};

		cpu_trip_hot: hot {
			temperature = <120000>;
			hysteresis = <2000>;
			type = "hot";
		};

		cpu_trip_active_high: active-high {
			temperature = <110000>;
			hysteresis = <2000>;
			type = "active";
		};

		cpu_trip_active_med: active-med {
			temperature = <80000>;
			hysteresis = <2000>;
			type = "active";
		};

		cpu_trip_active_low: active-low {
			temperature = <60000>;
			hysteresis = <2000>;
			type = "active";
		};

		cpu_trip_active_silent: active-silent {
			temperature = <40000>;
			hysteresis = <2000>;
			type = "active";
		};
	};

	cooling-maps {
		cpu-active-high {
			/* active: set fan to cooling level 3 */
			cooling-device = <&fan 3 3>;
			trip = <&cpu_trip_active_high>;
		};

		cpu-active-med {
			/* active: set fan to cooling level 2 */
			cooling-device = <&fan 2 2>;
			trip = <&cpu_trip_active_med>;
		};

		cpu-active-low {
			/* active: set fan to cooling level 1 */
			cooling-device = <&fan 1 1>;
			trip = <&cpu_trip_active_low>;
		};

		cpu-active-silent {
			/* active: set fan to cooling level 0 */
			cooling-device = <&fan 0 0>;
			trip = <&cpu_trip_active_silent>;
		};
	};
};

&pcie0 {
	status = "okay";

	pcie@0,0 {
		reg = <0x0000 0 0 0 0>;
		#address-cells = <3>;
		#size-cells = <2>;

		mt7996@0,0 {
			reg = <0x0000 0 0 0 0>;
			nvmem-cells = <&eeprom_factory_0>;
			nvmem-cell-names = "eeprom";
		};
	};
};
