Andrey Smirnov b379bf2cd2
feat: switch schematic cache to LRU and negative TTL
Fixes #408

Now we have proper cache capacity, LRU, and also negative cache TTL to
help with case when multiple instance might disagree on whether cache
contains not found or not.

Signed-off-by: Andrey Smirnov <andrey.smirnov@siderolabs.com>
2026-02-27 16:17:26 +04:00
..