diff --git a/src/sample.c b/src/sample.c index a1e1c74ae..bc9dadff4 100644 --- a/src/sample.c +++ b/src/sample.c @@ -266,39 +266,39 @@ const unsigned int fetch_cap[SMP_SRC_ENTRIES] = { SMP_VAL___________ | SMP_VAL_BE_CHK_RUL | SMP_VAL___________ | SMP_VAL___________ ), - [SMP_SRC_RQFIN] = (SMP_VAL___________ | SMP_VAL___________ | SMP_VAL___________ | - SMP_VAL___________ | SMP_VAL___________ | SMP_VAL___________ | - SMP_VAL___________ | SMP_VAL___________ | SMP_VAL___________ | - SMP_VAL___________ | SMP_VAL___________ | SMP_VAL___________ | - SMP_VAL___________ | SMP_VAL___________ | SMP_VAL___________ | - SMP_VAL___________ | SMP_VAL___________ | SMP_VAL___________ | + [SMP_SRC_RQFIN] = (SMP_VAL___________ | SMP_VAL___________ | SMP_VAL_FE_REQ_CNT | + SMP_VAL_FE_HRQ_HDR | SMP_VAL_FE_HRQ_BDY | SMP_VAL_FE_SET_BCK | + SMP_VAL_BE_REQ_CNT | SMP_VAL_BE_HRQ_HDR | SMP_VAL_BE_HRQ_BDY | + SMP_VAL_BE_SET_SRV | SMP_VAL_BE_SRV_CON | SMP_VAL_BE_RES_CNT | + SMP_VAL_BE_HRS_HDR | SMP_VAL_BE_HRS_BDY | SMP_VAL_BE_STO_RUL | + SMP_VAL_FE_RES_CNT | SMP_VAL_FE_HRS_HDR | SMP_VAL_FE_HRS_BDY | SMP_VAL_FE_LOG_END | SMP_VAL___________ | SMP_VAL___________ | SMP_VAL___________ ), [SMP_SRC_RSFIN] = (SMP_VAL___________ | SMP_VAL___________ | SMP_VAL___________ | SMP_VAL___________ | SMP_VAL___________ | SMP_VAL___________ | SMP_VAL___________ | SMP_VAL___________ | SMP_VAL___________ | - SMP_VAL___________ | SMP_VAL___________ | SMP_VAL___________ | - SMP_VAL___________ | SMP_VAL___________ | SMP_VAL___________ | - SMP_VAL___________ | SMP_VAL___________ | SMP_VAL___________ | + SMP_VAL_BE_SET_SRV | SMP_VAL_BE_SRV_CON | SMP_VAL_BE_RES_CNT | + SMP_VAL_BE_HRS_HDR | SMP_VAL_BE_HRS_BDY | SMP_VAL_BE_STO_RUL | + SMP_VAL_FE_RES_CNT | SMP_VAL_FE_HRS_HDR | SMP_VAL_FE_HRS_BDY | SMP_VAL_FE_LOG_END | SMP_VAL___________ | SMP_VAL___________ | SMP_VAL___________ ), - [SMP_SRC_TXFIN] = (SMP_VAL___________ | SMP_VAL___________ | SMP_VAL___________ | - SMP_VAL___________ | SMP_VAL___________ | SMP_VAL___________ | - SMP_VAL___________ | SMP_VAL___________ | SMP_VAL___________ | - SMP_VAL___________ | SMP_VAL___________ | SMP_VAL___________ | - SMP_VAL___________ | SMP_VAL___________ | SMP_VAL___________ | - SMP_VAL___________ | SMP_VAL___________ | SMP_VAL___________ | + [SMP_SRC_TXFIN] = (SMP_VAL___________ | SMP_VAL___________ | SMP_VAL_FE_REQ_CNT | + SMP_VAL_FE_HRQ_HDR | SMP_VAL_FE_HRQ_BDY | SMP_VAL_FE_SET_BCK | + SMP_VAL_BE_REQ_CNT | SMP_VAL_BE_HRQ_HDR | SMP_VAL_BE_HRQ_BDY | + SMP_VAL_BE_SET_SRV | SMP_VAL_BE_SRV_CON | SMP_VAL_BE_RES_CNT | + SMP_VAL_BE_HRS_HDR | SMP_VAL_BE_HRS_BDY | SMP_VAL_BE_STO_RUL | + SMP_VAL_FE_RES_CNT | SMP_VAL_FE_HRS_HDR | SMP_VAL_FE_HRS_BDY | SMP_VAL_FE_LOG_END | SMP_VAL___________ | SMP_VAL___________ | SMP_VAL___________ ), - [SMP_SRC_SSFIN] = (SMP_VAL___________ | SMP_VAL___________ | SMP_VAL___________ | - SMP_VAL___________ | SMP_VAL___________ | SMP_VAL___________ | - SMP_VAL___________ | SMP_VAL___________ | SMP_VAL___________ | - SMP_VAL___________ | SMP_VAL___________ | SMP_VAL___________ | - SMP_VAL___________ | SMP_VAL___________ | SMP_VAL___________ | - SMP_VAL___________ | SMP_VAL___________ | SMP_VAL___________ | + [SMP_SRC_SSFIN] = (SMP_VAL_FE_CON_ACC | SMP_VAL_FE_SES_ACC | SMP_VAL_FE_REQ_CNT | + SMP_VAL_FE_HRQ_HDR | SMP_VAL_FE_HRQ_BDY | SMP_VAL_FE_SET_BCK | + SMP_VAL_BE_REQ_CNT | SMP_VAL_BE_HRQ_HDR | SMP_VAL_BE_HRQ_BDY | + SMP_VAL_BE_SET_SRV | SMP_VAL_BE_SRV_CON | SMP_VAL_BE_RES_CNT | + SMP_VAL_BE_HRS_HDR | SMP_VAL_BE_HRS_BDY | SMP_VAL_BE_STO_RUL | + SMP_VAL_FE_RES_CNT | SMP_VAL_FE_HRS_HDR | SMP_VAL_FE_HRS_BDY | SMP_VAL_FE_LOG_END | SMP_VAL___________ | SMP_VAL___________ | SMP_VAL___________ ), };