mirror of
https://github.com/armbian/build.git
synced 2025-08-13 22:56:57 +02:00
3b3d85e25c
* Bump imx6 edge to 5.12.y * Bump odroid xu4 edge to 5.12.y * Bump Jetson nano edge to 5.12.y * WIP: Bump sunxi to 5.12.y - create a copy of patches and make a new link - wireless patches needs adjutement to 5.12 - some patches are still failing * Adjust wireless patches to build on 5.12.y * Remove template wireless patch * Move Espressobin edge to 5.12.y * Bump mvebu to 5.12 - patch 92-mvebu-gpio-remove-hardcoded-timer-assignment.patch was disabled @heisath - adjusted wireless driver for 8723ds * Adjust sunxi / sunxi64 edge to compile * Fix kernel config for Jetson nano edge * bump meson64 to 5.12.y * bump rockchip edge to 5.12.y * Bump rockchip64 to 5.12.y * Bump rk322x edge to 5.12.y @paolosabatino * Cleanup im6, re-add 5.10.y patches since one is missing in 5.12.y * Update odroidxu4 edge links * rk322x: moved rk322x-edge to kernel 5.12, fix overlay compilation, retouched included kernel modules * Cleanup: remove deprecated config Co-authored-by: Paolo Sabatino <paolo.sabatino@gmail.com>
108 lines
2.6 KiB
Diff
108 lines
2.6 KiB
Diff
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
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index dc785da9c..141fd186b 100644
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--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
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+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
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@@ -374,6 +381,17 @@
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#dma-cells = <1>;
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};
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+ gic: interrupt-controller@3021000 {
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+ compatible = "arm,gic-400";
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+ reg = <0x03021000 0x1000>,
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+ <0x03022000 0x2000>,
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+ <0x03024000 0x2000>,
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+ <0x03026000 0x2000>;
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+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
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+ interrupt-controller;
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+ #interrupt-cells = <3>;
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+ };
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+
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sid: efuse@3006000 {
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compatible = "allwinner,sun50i-h6-sid";
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reg = <0x03006000 0x400>;
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@@ -279,6 +305,7 @@
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interrupt-controller;
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#interrupt-cells = <3>;
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+ /omit-if-no-ref/
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ext_rgmii_pins: rgmii-pins {
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pins = "PD0", "PD1", "PD2", "PD3", "PD4",
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"PD5", "PD7", "PD8", "PD9", "PD10",
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@@ -309,6 +354,7 @@
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bias-pull-up;
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};
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+ /omit-if-no-ref/
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mmc2_pins: mmc2-pins {
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pins = "PC1", "PC4", "PC5", "PC6",
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"PC7", "PC8", "PC9", "PC10",
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@@ -511,17 +540,26 @@
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pins = "PG8", "PG9";
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function = "uart1";
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};
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- };
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- gic: interrupt-controller@3021000 {
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- compatible = "arm,gic-400";
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- reg = <0x03021000 0x1000>,
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- <0x03022000 0x2000>,
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- <0x03024000 0x2000>,
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- <0x03026000 0x2000>;
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- interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
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- interrupt-controller;
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- #interrupt-cells = <3>;
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+ uart2_pins: uart2-pins {
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+ pins = "PD19", "PD20";
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+ function = "uart2";
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+ };
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+
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+ uart2_rts_cts_pins: uart2-rts-cts-pins {
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+ pins = "PD21", "PD22";
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+ function = "uart2";
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+ };
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+
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+ uart3_pins: uart3-pins {
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+ pins = "PD23", "PD24";
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+ function = "uart3";
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+ };
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+
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+ uart3_rts_cts_pins: uart3-rts-cts-pins {
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+ pins = "PD25", "PD26";
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+ function = "uart3";
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+ };
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};
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mmc0: mmc@4020000 {
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@@ -963,6 +1033,19 @@
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};
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};
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+ r_uart: serial@7080000 {
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+ compatible = "snps,dw-apb-uart";
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+ reg = <0x07080000 0x400>;
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+ interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
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+ reg-shift = <2>;
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+ reg-io-width = <4>;
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+ clocks = <&r_ccu CLK_R_APB2_UART>;
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+ resets = <&r_ccu RST_R_APB2_UART>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&r_uart_pins>;
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+ status = "disabled";
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+ };
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+
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rtc: rtc@7000000 {
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compatible = "allwinner,sun50i-h6-rtc";
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reg = <0x07000000 0x400>;
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@@ -1021,6 +1104,11 @@
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pins = "PL9";
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function = "s_cir_rx";
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};
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+
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+ r_uart_pins: r-uart-pins {
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+ pins = "PL2", "PL3";
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+ function = "s_uart";
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+ };
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};
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r_ir: ir@7040000 {
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