armbian_build/patch/kernel/archive/meson64-5.10/0101-fix-mesongxm-cpu-scheduling.patch
Igor Pečovnik 0cdffb29b0
Renaming DEV branch to EDGE (#2704)
* Change DEV to EDGE
* Renaming patches dev folder to edge
* Move patches into subdir where they will be archived.
* Relink patch directories properly
2021-03-24 19:01:53 +01:00

65 lines
1.6 KiB
Diff

[0] https://github.com/torvalds/linux/commit/6eeaf4d2452ec8b1ece58776812140734fc2e088
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
---
arch/arm64/boot/dts/amlogic/meson-gxm.dtsi | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxm.dtsi
index fe4145112295c..411cc312fc62b 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxm.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gxm.dtsi
@@ -42,11 +42,28 @@
};
};
+ cpu0: cpu@0 {
+ capacity-dmips-mhz = <1024>;
+ };
+
+ cpu1: cpu@1 {
+ capacity-dmips-mhz = <1024>;
+ };
+
+ cpu2: cpu@2 {
+ capacity-dmips-mhz = <1024>;
+ };
+
+ cpu3: cpu@3 {
+ capacity-dmips-mhz = <1024>;
+ };
+
cpu4: cpu@100 {
device_type = "cpu";
compatible = "arm,cortex-a53";
reg = <0x0 0x100>;
enable-method = "psci";
+ capacity-dmips-mhz = <1024>;
next-level-cache = <&l2>;
clocks = <&scpi_dvfs 1>;
#cooling-cells = <2>;
@@ -57,6 +74,7 @@
compatible = "arm,cortex-a53";
reg = <0x0 0x101>;
enable-method = "psci";
+ capacity-dmips-mhz = <1024>;
next-level-cache = <&l2>;
clocks = <&scpi_dvfs 1>;
#cooling-cells = <2>;
@@ -67,6 +85,7 @@
compatible = "arm,cortex-a53";
reg = <0x0 0x102>;
enable-method = "psci";
+ capacity-dmips-mhz = <1024>;
next-level-cache = <&l2>;
clocks = <&scpi_dvfs 1>;
#cooling-cells = <2>;
@@ -77,6 +96,7 @@
compatible = "arm,cortex-a53";
reg = <0x0 0x103>;
enable-method = "psci";
+ capacity-dmips-mhz = <1024>;
next-level-cache = <&l2>;
clocks = <&scpi_dvfs 1>;
#cooling-cells = <2>;