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* rockchip64: Add board "ASUS Tinker-Edge-R" * rockchip64: Add board "ASUS Tinker-Edge-R": hammer for 6.6 current & 6.7 edge - cleanup - squash dtsi and dt into a single thing, rename to dashes - change dtb reference in board file - drop the 6.1 patch that has junk in it --------- Co-authored-by: Ricardo Pardini <ricardo@pardini.net>
1249 lines
27 KiB
Diff
1249 lines
27 KiB
Diff
From b42bc24df114cab6a110dab74c8fbdcc07f8ca5c Mon Sep 17 00:00:00 2001
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From: ARC-MX <wmx129674@126.com>
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Date: Fri, 12 Jan 2024 13:32:39 +0800
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Subject: [PATCH] add new borad tinker-edge-r, but HDMI 4K still appear half
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grainy screen
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---
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arch/arm/dts/Makefile | 3 +-
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.../dts/rk3399pro-tinker_edge_r-u-boot.dtsi | 28 +
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arch/arm/dts/rk3399pro-tinker_edge_r.dts | 18 +
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arch/arm/dts/rk3399pro-tinker_edge_r.dtsi | 1069 +++++++++++++++++
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configs/tinker-edge-r_rk3399pro_defconfig | 73 ++
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5 files changed, 1190 insertions(+), 1 deletion(-)
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create mode 100644 arch/arm/dts/rk3399pro-tinker_edge_r-u-boot.dtsi
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create mode 100644 arch/arm/dts/rk3399pro-tinker_edge_r.dts
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create mode 100644 arch/arm/dts/rk3399pro-tinker_edge_r.dtsi
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create mode 100644 configs/tinker-edge-r_rk3399pro_defconfig
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diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
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index a7e0d9f6c0..2cf63ec51c 100644
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--- a/arch/arm/dts/Makefile
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+++ b/arch/arm/dts/Makefile
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@@ -161,7 +161,8 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \
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rk3399-rock-pi-4c.dtb \
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rk3399-rock960.dtb \
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rk3399-rockpro64.dtb \
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- rk3399pro-rock-pi-n10.dtb
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+ rk3399pro-rock-pi-n10.dtb \
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+ rk3399pro-tinker_edge_r.dtb
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dtb-$(CONFIG_ROCKCHIP_RK3568) += \
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rk3568-evb.dtb
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diff --git a/arch/arm/dts/rk3399pro-tinker_edge_r-u-boot.dtsi b/arch/arm/dts/rk3399pro-tinker_edge_r-u-boot.dtsi
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new file mode 100644
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index 0000000000..d5d183d36c
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--- /dev/null
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+++ b/arch/arm/dts/rk3399pro-tinker_edge_r-u-boot.dtsi
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@@ -0,0 +1,28 @@
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+// SPDX-License-Identifier: GPL-2.0+
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+/*
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+ * Copyright (C) 2019 Jagan Teki <jagan@amarulasolutions.com>
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+ */
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+
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+#include "rk3399-u-boot.dtsi"
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+#include "rk3399-sdram-lpddr4-100.dtsi"
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+/ {
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+ chosen {
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+ u-boot,spl-boot-order = "same-as-spl", &sdmmc, &sdhci;
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+ };
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+
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+};
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+
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+// &spi1 {
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+// spi_flash: flash@0 {
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+// u-boot,dm-pre-reloc;
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+// };
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+// };
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+
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+&vdd_center {
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+ regulator-min-microvolt = <950000>;
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+ regulator-max-microvolt = <950000>;
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+};
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+
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+// &vdd_log {
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+// regulator-init-microvolt = <950000>;
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+// };
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diff --git a/arch/arm/dts/rk3399pro-tinker_edge_r.dts b/arch/arm/dts/rk3399pro-tinker_edge_r.dts
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new file mode 100644
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index 0000000000..8f5397fab8
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--- /dev/null
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+++ b/arch/arm/dts/rk3399pro-tinker_edge_r.dts
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@@ -0,0 +1,18 @@
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+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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+/*
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+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
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+ * Copyright (c) 2019 Radxa Limited
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+ * Copyright (c) 2019 Amarula Solutions(India)
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+ */
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+
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+/dts-v1/;
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+#include "rk3399pro-tinker_edge_r.dtsi"
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+
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+/ {
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+ model = "AUSU Tinker Edge R";
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+ compatible = "AUSU,rk3399-tinker_edge_r", "rockchip,rk3399pro";
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+
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+ chosen {
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+ stdout-path = "serial0:115200n8";
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+ };
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+};
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diff --git a/arch/arm/dts/rk3399pro-tinker_edge_r.dtsi b/arch/arm/dts/rk3399pro-tinker_edge_r.dtsi
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new file mode 100644
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index 0000000000..1895fd71c7
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--- /dev/null
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+++ b/arch/arm/dts/rk3399pro-tinker_edge_r.dtsi
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@@ -0,0 +1,1069 @@
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+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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+/*
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+ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd.
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+ * Copyright (c) 2024 ARCW <wmx129674@126.com> rk3399pro-tinker_edge_r
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+ */
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+
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+#include <dt-bindings/input/linux-event-codes.h>
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+#include <dt-bindings/pwm/pwm.h>
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+#include "rk3399pro.dtsi"
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+#include "rk3399-opp.dtsi"
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+
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+/ {
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+
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+ clkin_gmac: external-gmac-clock {
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+ compatible = "fixed-clock";
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+ clock-frequency = <125000000>;
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+ clock-output-names = "clkin_gmac";
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+ #clock-cells = <0>;
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+ };
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+
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+ gpio-leds {
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+ compatible = "gpio-leds";
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+
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+ pwr-led {
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+ gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
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+ linux,default-trigger = "default-on";
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+ retain-state-suspended = <1>;
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+ };
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+
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+ act-led {
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+ gpios = <&gpio0 RK_PA3 GPIO_ACTIVE_HIGH>;
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+ linux,default-trigger="mmc0";
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+ };
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+
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+ rsv-led {
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+ gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>;
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+ linux,default-trigger="none";
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+ };
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+ };
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+
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+ sdio_pwrseq: sdio-pwrseq {
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+ compatible = "mmc-pwrseq-simple";
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+ clocks = <&rk809 1>;
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+ clock-names = "ext_clock";
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&wifi_enable_h>;
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+
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+ /*
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+ * On the module itself this is one of these (depending
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+ * on the actual card populated):
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+ * - SDIO_RESET_L_WL_REG_ON
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+ * - PDN (power down when low)
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+ */
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+ reset-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>;
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+ };
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+
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+ rk_headset {
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+ compatible = "rockchip_headset";
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+ headset_gpio = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&hp_det>;
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+ io-channels = <&saradc 3>;
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+ };
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+
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+ sdhci_pwrseq: sdhci-pwrseq {
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+ compatible = "mmc-pwrseq-emmc";
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+ pinctrl-0 = <&sdhci_reset>;
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+ pinctrl-names = "default";
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+ reset-gpios = <&gpio2 RK_PA4 GPIO_ACTIVE_HIGH>;
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+ };
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+
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+ display-subsystem{
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+ status = "okay";
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+ };
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+
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+ vdd_3v3_reg: fixedregulator_3v3 {
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+ compatible = "regulator-fixed";
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+ regulator-name = "3v3";
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ regulator-always-on;
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+ };
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+
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+ vcc_phy: vcc-phy-regulator {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc_phy";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ };
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+
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+ vcc5v0_sys: vccsys {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc5v0_sys";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ };
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+
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+ vbus_typec: vbus-typec {
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+ compatible = "regulator-fixed";
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ regulator-name = "vbus_typec";
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+ };
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+
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+ backlight: backlight {
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+ status = "disabled";
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+ compatible = "pwm-backlight";
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+ pwms = <&pwm0 0 400000 0>;//f=2500 t=400,000ns
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+ brightness-levels = <
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+ 0 1 2 3 4 5 6 7
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+ 9 10 11 12 13 14 15 16
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+ 17 18 19 20 21 22 23 24
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+ 25 26 27 28 29 30 31 32
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+ 33 34 35 37 37 38 38 39
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+ 40 41 42 43 44 45 46 47
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+ 48 49 50 51 52 53 54 55
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+ 56 57 58 59 60 61 62 63
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+ 64 65 66 67 68 69 70 71
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+ 72 73 74 75 76 77 78 79
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+ 80 81 82 83 84 85 86 87
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+ 88 89 90 91 92 93 94 95
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+ 96 97 98 99 100 101 102 103
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+ 104 105 106 107 108 109 110 111
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+ 112 113 114 115 116 117 118 119
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+ 120 121 122 123 124 125 126 127
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+ 128 129 130 131 132 133 134 135
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+ 136 137 138 139 140 141 142 143
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+ 144 145 146 147 148 149 150 151
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+ 152 153 154 155 156 157 158 159
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+ 160 161 162 163 164 165 166 167
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+ 168 169 170 171 172 173 174 175
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+ 176 177 178 179 180 181 182 183
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+ 184 185 186 187 188 189 190 191
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+ 192 193 194 195 196 197 198 199
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+ 200 201 202 203 204 205 206 207
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+ 208 209 210 211 212 213 214 215
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+ 216 217 218 219 220 221 222 223
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+ 224 225 226 227 228 229 230 231
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+ 232 233 234 235 236 237 238 239
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+ 240 241 242 243 244 245 246 247
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+ 248 249 250 251 252 253 254 255
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+ >;
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+ default-brightness-level = <200>;
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+ minimal-brightness-level = <26>;
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+ soc_enablekl-gpios = <&gpio1 RK_PB0 GPIO_ACTIVE_HIGH>;
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+ enable_delay = <15>;
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+ disable_delay = <5>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pinctrl_lvds_bl_en>;
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+ };
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+
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+ rk809-sound {
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+ compatible = "simple-audio-card";
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+ simple-audio-card,format = "i2s";
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+ simple-audio-card,name = "rockchip,rk809";
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+ simple-audio-card,mclk-fs = <256>;
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+ simple-audio-card,widgets =
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+ "Microphone", "Mic Jack",
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+ "Headphone", "Headphone Jack";
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+ simple-audio-card,routing =
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+ "Mic Jack", "MICBIAS1",
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+ "IN1P", "Mic Jack",
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+ "Headphone Jack", "HPOL",
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+ "Headphone Jack", "HPOR";
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+ simple-audio-card,cpu {
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+ sound-dai = <&i2s1>;
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+ };
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+ simple-audio-card,codec {
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+ sound-dai = <&rk809_codec>;
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+ };
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+ };
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+
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+ spdif-sound {
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+ status = "okay";
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+ compatible = "simple-audio-card";
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+ simple-audio-card,name = "rockchip,spdif";
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+ simple-audio-card,cpu {
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+ sound-dai = <&spdif>;
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+ };
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+ simple-audio-card,codec {
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+ sound-dai = <&spdif_out>;
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+ };
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+ };
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+
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+ spdif_out: spdif-out {
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+ status = "okay";
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+ compatible = "linux,spdif-dit";
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+ #sound-dai-cells = <0>;
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+ };
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+
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+ hdmi_dp_sound: hdmi-dp-sound {
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+ status = "okay";
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+ compatible = "rockchip,rk3399-hdmi-dp";
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+ rockchip,cpu = <&i2s2>;
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+ rockchip,codec = <&hdmi>, <&cdn_dp>;
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+ };
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+
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+ route_hdmi: route-hdmi {
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+ status = "okay";
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+ logo,mode = "center";
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+ charge_logo,mode = "center";
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+ connect = <&vopb_out_hdmi>;
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+ };
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+};
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+
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+&cpu_l0 {
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+ cpu-supply = <&vdd_cpu_l>;
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+};
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+
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+&cpu_l1 {
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+ cpu-supply = <&vdd_cpu_l>;
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+};
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+
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+&cpu_l2 {
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+ cpu-supply = <&vdd_cpu_l>;
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+};
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+
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+&cpu_l3 {
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+ cpu-supply = <&vdd_cpu_l>;
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+};
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+
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+&cpu_b0 {
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+ cpu-supply = <&vdd_cpu_b>;
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+};
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+
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+&cpu_b1 {
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+ cpu-supply = <&vdd_cpu_b>;
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+};
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+
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+&emmc_phy {
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+ status = "okay";
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+};
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+
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+&gmac {
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+ assigned-clocks = <&cru SCLK_RMII_SRC>;
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+ assigned-clock-parents = <&clkin_gmac>;
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+ clock_in_out = "input";
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+ phy-supply = <&vcc_phy>;
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+ phy-mode = "rgmii";
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+ snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
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+ snps,reset-active-low;
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+ snps,reset-delays-us = <0 16000 72000>;
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+ wolirq-gpio = <&gpio3 16 GPIO_ACTIVE_LOW>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&rgmii_pins>;
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+ tx_delay = <0x23>;
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+ rx_delay = <0x22>;
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+ wakeup-enable = "0";
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+ status = "okay";
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+};
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+
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+&gpu {
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+ mali-supply = <&vdd_gpu>;
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+ status = "okay";
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+};
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+
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+&hdmi {
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+ status = "okay";
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+ ddc-i2c-bus = <&i2c3>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&hdmi_cec>;
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+ #sound-dai-cells = <0>; // must exist
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+ rockchip,phy-table =
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+ <74250000 0x8009 0x0004 0x0272>,
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+ <165000000 0x802b 0x0004 0x0209>,
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+ <297000000 0x8039 0x0005 0x028d>,
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+ <594000000 0x8039 0x0000 0x019d>,
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+ <000000000 0x0000 0x0000 0x0000>;
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+};
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+
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+&hdmi_in_vopl {
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+ status = "disabled";
|
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+};
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+
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+&vopb {
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+ status = "okay";
|
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+ // assigned-clocks = <&cru DCLK_VOP0_DIV>;
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+ // assigned-clock-parents = <&cru PLL_VPLL>;
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+};
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+
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+&vopb_mmu {
|
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+ status = "okay";
|
|
+};
|
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+
|
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+&vopl {
|
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+ status = "okay";
|
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+ // assigned-clocks = <&cru DCLK_VOP1_DIV>;
|
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+ // assigned-clock-parents = <&cru PLL_CPLL>;
|
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+};
|
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+
|
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+&vopl_mmu {
|
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+ status = "okay";
|
|
+};
|
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+
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+&i2c0 {
|
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+ status = "okay";
|
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+ i2c-scl-rising-time-ns = <180>;
|
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+ i2c-scl-falling-time-ns = <30>;
|
|
+ clock-frequency = <400000>;
|
|
+
|
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+ rk809: pmic@20 {
|
|
+ compatible = "rockchip,rk809";
|
|
+ reg = <0x20>;
|
|
+ interrupt-parent = <&gpio1>;
|
|
+ interrupts = <RK_PC2 IRQ_TYPE_LEVEL_LOW>;
|
|
+ pinctrl-names = "default", "pmic-sleep",
|
|
+ "pmic-power-off", "pmic-reset";
|
|
+ pinctrl-0 = <&pmic_int_l>;
|
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+ pinctrl-1 = <&soc_slppin_slp>, <&rk809_slppin_slp>;
|
|
+ pinctrl-2 = <&soc_slppin_gpio>, <&rk809_slppin_pwrdn>;
|
|
+ pinctrl-3 = <&soc_slppin_gpio>, <&rk809_slppin_null>;
|
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+ rockchip,system-power-controller;
|
|
+ pmic-reset-func = <0>;
|
|
+ wakeup-source;
|
|
+ #clock-cells = <1>;
|
|
+ clock-output-names = "rk808-clkout1", "rk808-clkout2";
|
|
+
|
|
+ vcc1-supply = <&vcc5v0_sys>;
|
|
+ vcc2-supply = <&vcc5v0_sys>;
|
|
+ vcc3-supply = <&vcc5v0_sys>;
|
|
+ vcc4-supply = <&vcc5v0_sys>;
|
|
+ vcc5-supply = <&vcc_buck5>;
|
|
+ vcc6-supply = <&vcc_buck5>;
|
|
+ vcc7-supply = <&vcc3v3_sys>;
|
|
+ vcc8-supply = <&vcc3v3_sys>;
|
|
+ vcc9-supply = <&vcc5v0_sys>;
|
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+
|
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+ pwrkey {
|
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+ status = "okay";
|
|
+ };
|
|
+
|
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+ rtc {
|
|
+ status = "okay";
|
|
+ };
|
|
+
|
|
+ pinctrl_rk8xx: pinctrl_rk8xx {
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+
|
|
+ rk809_slppin_null: rk809_slppin_null {
|
|
+ pins = "gpio_slp";
|
|
+ function = "pin_fun0";
|
|
+ };
|
|
+
|
|
+ rk809_slppin_slp: rk809_slppin_slp {
|
|
+ pins = "gpio_slp";
|
|
+ function = "pin_fun1";
|
|
+ };
|
|
+
|
|
+ rk809_slppin_pwrdn: rk809_slppin_pwrdn {
|
|
+ pins = "gpio_slp";
|
|
+ function = "pin_fun2";
|
|
+ };
|
|
+
|
|
+ rk809_slppin_rst: rk809_slppin_rst {
|
|
+ pins = "gpio_slp";
|
|
+ function = "pin_fun3";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ regulators {
|
|
+ vdd_center: DCDC_REG1 {
|
|
+ regulator-name = "vdd_center";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <925000>;
|
|
+ regulator-max-microvolt = <1025000>;
|
|
+ regulator-initial-mode = <0x2>;
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ regulator-suspend-microvolt = <925000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vdd_cpu_l: DCDC_REG2 {
|
|
+ regulator-name = "vdd_cpu_l";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <925000>;
|
|
+ regulator-max-microvolt = <1225000>;
|
|
+ regulator-ramp-delay = <6001>;
|
|
+ regulator-initial-mode = <0x2>;
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcc_ddr: DCDC_REG3 {
|
|
+ regulator-name = "vcc_ddr";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-initial-mode = <0x2>;
|
|
+ regulator-state-mem {
|
|
+ regulator-on-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcc3v3_sys: DCDC_REG4 {
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <3300000>;
|
|
+ regulator-max-microvolt = <3300000>;
|
|
+ regulator-initial-mode = <0x2>;
|
|
+ regulator-name = "vcc3v3_sys";
|
|
+ regulator-state-mem {
|
|
+ regulator-on-in-suspend;
|
|
+ regulator-suspend-microvolt = <3300000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcc_buck5: DCDC_REG5 {
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <3300000>;
|
|
+ regulator-max-microvolt = <3300000>;
|
|
+ regulator-name = "vcc_buck5";
|
|
+ regulator-state-mem {
|
|
+ regulator-on-in-suspend;
|
|
+ regulator-suspend-microvolt = <3300000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcca_0v9: LDO_REG1 {
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <925000>;
|
|
+ regulator-max-microvolt = <925000>;
|
|
+ regulator-name = "vcca_0v9";
|
|
+ regulator-state-mem {
|
|
+ regulator-on-in-suspend;
|
|
+ regulator-suspend-microvolt = <925000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcc_1v8: LDO_REG2 {
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <1850000>;
|
|
+ regulator-max-microvolt = <1850000>;
|
|
+
|
|
+ regulator-name = "vcc_1v8";
|
|
+ regulator-state-mem {
|
|
+ regulator-on-in-suspend;
|
|
+ regulator-suspend-microvolt = <1850000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcc0v9_soc: LDO_REG3 {
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <950000>;
|
|
+ regulator-max-microvolt = <950000>;
|
|
+
|
|
+ regulator-name = "vcc0v9_soc";
|
|
+ regulator-state-mem {
|
|
+ regulator-on-in-suspend;
|
|
+ regulator-suspend-microvolt = <950000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcca_1v8: LDO_REG4 {
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <1850000>;
|
|
+ regulator-max-microvolt = <1850000>;
|
|
+
|
|
+ regulator-name = "vcca_1v8";
|
|
+ regulator-state-mem {
|
|
+ regulator-on-in-suspend;
|
|
+ regulator-suspend-microvolt = <1850000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vdd1v5_dvp: LDO_REG5 {
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <1850000>;
|
|
+ regulator-max-microvolt = <1850000>;
|
|
+
|
|
+ regulator-name = "vdd1v5_dvp";
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcc_1v5: LDO_REG6 {
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <1550000>;
|
|
+ regulator-max-microvolt = <1550000>;
|
|
+
|
|
+ regulator-name = "vcc_1v5";
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcc_3v0: LDO_REG7 {
|
|
+ regulator-name = "vcc_3v0";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <3075000>;
|
|
+ regulator-max-microvolt = <3075000>;
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vccio_sd: LDO_REG8 {
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <1850000>;
|
|
+ regulator-max-microvolt = <3375000>;
|
|
+
|
|
+ regulator-name = "vccio_sd";
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcc_sd: LDO_REG9 {
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <3375000>;
|
|
+ regulator-max-microvolt = <3375000>;
|
|
+
|
|
+ regulator-name = "vcc_sd";
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcc5v0_usb: SWITCH_REG1 {
|
|
+ regulator-min-microvolt = <5000000>;
|
|
+ regulator-max-microvolt = <5000000>;
|
|
+
|
|
+ regulator-name = "vcc5v0_usb";
|
|
+ regulator-state-mem {
|
|
+ regulator-on-in-suspend;
|
|
+ regulator-suspend-microvolt = <5000000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vccio_3v3: SWITCH_REG2 {
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <3300000>;
|
|
+ regulator-max-microvolt = <3300000>;
|
|
+
|
|
+ regulator-name = "vccio_3v3";
|
|
+ regulator-state-mem {
|
|
+ regulator-on-in-suspend;
|
|
+ regulator-suspend-microvolt = <3300000>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ rk809_codec: codec {
|
|
+ #sound-dai-cells = <0>;
|
|
+ compatible = "rockchip,rk809-codec", "rockchip,rk817-codec";
|
|
+ clocks = <&cru SCLK_I2S_8CH_OUT>;
|
|
+ clock-names = "mclk";
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&i2s_8ch_mclk>;
|
|
+ hp-volume = <20>;
|
|
+ spk-volume = <3>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vdd_cpu_b: fan53555@60 {
|
|
+ compatible = "fcs,fan53555";
|
|
+ reg = <0x60>;
|
|
+ vin-supply = <&vcc5v0_sys>;
|
|
+ regulator-compatible = "fan53555-reg";
|
|
+ pinctrl-0 = <&vsel1_gpio>;
|
|
+ vsel-gpios = <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>;
|
|
+ regulator-name = "vdd_cpu_b";
|
|
+ regulator-min-microvolt = <925000>;
|
|
+ regulator-max-microvolt = <1275000>;
|
|
+ regulator-ramp-delay = <1000>;
|
|
+ fcs,suspend-voltage-selector = <1>;
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-initial-state = <3>;
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ bq25700: bq25700@6b {
|
|
+ compatible = "ti,bq25703";
|
|
+ reg = <0x6b>;
|
|
+ extcon = <&fusb0>;
|
|
+ interrupt-parent = <&gpio1>;
|
|
+ interrupts = <RK_PA1 IRQ_TYPE_LEVEL_LOW>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&charger_ok_int>;
|
|
+ ti,charge-current = <1500000>;
|
|
+ ti,max-charge-voltage = <8704000>;
|
|
+ ti,max-input-voltage = <20000000>;
|
|
+ ti,max-input-current = <6000000>;
|
|
+ ti,input-current-sdp = <500000>;
|
|
+ ti,input-current-dcp = <2000000>;
|
|
+ ti,input-current-cdp = <2000000>;
|
|
+ ti,input-current-dc = <2000000>;
|
|
+ ti,minimum-sys-voltage = <6700000>;
|
|
+ ti,otg-voltage = <5000000>;
|
|
+ ti,otg-current = <500000>;
|
|
+ ti,input-current = <500000>;
|
|
+ pd-charge-only = <0>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+};
|
|
+
|
|
+&spdif {
|
|
+ status = "disabled";
|
|
+ pinctrl-0 = <&spdif_bus>;
|
|
+ i2c-scl-rising-time-ns = <450>;
|
|
+ i2c-scl-falling-time-ns = <15>;
|
|
+};
|
|
+
|
|
+&i2c1 {
|
|
+ status = "okay";
|
|
+ i2c-scl-rising-time-ns = <140>;
|
|
+ i2c-scl-falling-time-ns = <30>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&i2c2 {
|
|
+ status = "okay";
|
|
+ i2c-scl-rising-time-ns = <140>;
|
|
+ i2c-scl-falling-time-ns = <30>;
|
|
+};
|
|
+
|
|
+&i2c3 {
|
|
+ i2c-scl-rising-time-ns = <450>;
|
|
+ i2c-scl-falling-time-ns = <15>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&i2c4 {
|
|
+ i2c-scl-rising-time-ns = <345>;
|
|
+ i2c-scl-falling-time-ns = <11>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&i2c8 {
|
|
+ status = "okay";
|
|
+ i2c-scl-rising-time-ns = <345>;
|
|
+ i2c-scl-falling-time-ns = <11>;
|
|
+ clock-frequency = <100000>;
|
|
+
|
|
+ fusb0: typec-portc@22 {
|
|
+ compatible = "fcs,fusb302";
|
|
+ reg = <0x22>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&fusb0_int>;
|
|
+ int-n-gpios = <&gpio1 RK_PA2 GPIO_ACTIVE_HIGH>;
|
|
+ vbus-5v-gpios = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>;
|
|
+ vbus2-5v-gpios = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>;
|
|
+ status = "okay";
|
|
+ };
|
|
+
|
|
+ vdd_gpu: fan53555@60 {
|
|
+ compatible = "fcs,fan53555";
|
|
+ reg = <0x60>;
|
|
+ vin-supply = <&vcc5v0_sys>;
|
|
+ regulator-compatible = "fan53555-reg";
|
|
+ pinctrl-0 = <&vsel2_gpio>;
|
|
+ vsel-gpios = <&gpio1 RK_PB6 GPIO_ACTIVE_HIGH>;
|
|
+ regulator-name = "vdd_gpu";
|
|
+ regulator-min-microvolt = <925000>;
|
|
+ regulator-max-microvolt = <1225000>;
|
|
+ regulator-ramp-delay = <1000>;
|
|
+ fcs,suspend-voltage-selector = <1>;
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-initial-state = <3>;
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+};
|
|
+
|
|
+&i2s0 {
|
|
+ i2s_8ch_mclk: i2s-8ch-mclk {
|
|
+ rockchip,pins = <4 RK_PA0 1 &pcfg_pull_none>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&i2s1 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&i2s2 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&io_domains {
|
|
+ status = "okay";
|
|
+ bt656-supply = <&vcca_1v8>;
|
|
+ audio-supply = <&vcca_1v8>;
|
|
+ sdmmc-supply = <&vccio_sd>;
|
|
+ gpio1830-supply = <&vcc_3v0>;
|
|
+};
|
|
+
|
|
+&isp0_mmu {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&isp1_mmu {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&pcie_phy {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&pcie0 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&pmu_io_domains {
|
|
+ status = "okay";
|
|
+ pmu1830-supply = <&vcc_1v8>;
|
|
+};
|
|
+
|
|
+&pwm2 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+// &isp0 {
|
|
+// status = "okay";
|
|
+
|
|
+// port {
|
|
+// #address-cells = <1>;
|
|
+// #size-cells = <0>;
|
|
+
|
|
+// isp0_mipi_in: endpoint@0 {
|
|
+// reg = <0>;
|
|
+// remote-endpoint = <&dphy_rx0_out>;
|
|
+// };
|
|
+// };
|
|
+// };
|
|
+
|
|
+// &isp1 {
|
|
+// status = "okay";
|
|
+
|
|
+// port {
|
|
+// #address-cells = <1>;
|
|
+// #size-cells = <0>;
|
|
+
|
|
+// isp1_mipi_in: endpoint@0 {
|
|
+// reg = <0>;
|
|
+// remote-endpoint = <&dphy_tx1rx1_out>;
|
|
+// };
|
|
+// };
|
|
+// };
|
|
+
|
|
+&saradc {
|
|
+ status = "okay";
|
|
+ vref-supply = <&vcc_1v8>;
|
|
+};
|
|
+
|
|
+&sdio0 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&sdmmc {
|
|
+ status = "okay";
|
|
+ supports-emmc;
|
|
+ sd-uhs-sdr12;
|
|
+ sd-uhs-sdr25;
|
|
+ sd-uhs-sdr50;
|
|
+ sd-uhs-sdr104;
|
|
+};
|
|
+
|
|
+&sdhci {
|
|
+ mmc-pwrseq = <&sdhci_pwrseq>;
|
|
+ bus-width = <8>;
|
|
+ mmc-hs200-1_8v;
|
|
+ non-removable;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&spi1 {
|
|
+ status = "disable";
|
|
+ max-freq = <48000000>; /* spi internal clk, don't modify */
|
|
+ spi_dev@0 {
|
|
+ compatible = "rockchip,spidev";
|
|
+ reg = <0>;
|
|
+ spi-max-frequency = <48000000>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&spi5 {
|
|
+ status = "disable";
|
|
+ max-freq = <48000000>; //spi internal clk, don't modify
|
|
+ spi_dev@0 {
|
|
+ compatible = "rockchip,spidev";
|
|
+ reg = <0>; //chip select 0:cs0 1:cs1
|
|
+ id = <0>;
|
|
+ spi-max-frequency = <48000000>; //spi output clock
|
|
+ };
|
|
+};
|
|
+
|
|
+&tcphy0 {
|
|
+ extcon = <&fusb0>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&tcphy1 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&tsadc {
|
|
+ /* tshut mode 0:CRU 1:GPIO */
|
|
+ rockchip,hw-tshut-mode = <1>;
|
|
+ /* tshut polarity 0:LOW 1:HIGH */
|
|
+ rockchip,hw-tshut-polarity = <1>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&u2phy0 {
|
|
+ status = "okay";
|
|
+ extcon = <&fusb0>;
|
|
+
|
|
+ u2phy0_otg: otg-port {
|
|
+ status = "okay";
|
|
+ };
|
|
+
|
|
+ u2phy0_host: host-port {
|
|
+ phy-supply = <&vcc5v0_usb>;
|
|
+ status = "okay";
|
|
+ };
|
|
+};
|
|
+
|
|
+&u2phy1 {
|
|
+ status = "okay";
|
|
+
|
|
+ u2phy1_otg: otg-port {
|
|
+ status = "okay";
|
|
+ };
|
|
+
|
|
+ u2phy1_host: host-port {
|
|
+ phy-supply = <&vcc5v0_usb>;
|
|
+ status = "okay";
|
|
+ };
|
|
+};
|
|
+
|
|
+&uart0 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+// &uart4 {
|
|
+// status = "disable";
|
|
+// };
|
|
+
|
|
+&usb_host0_ehci {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usb_host1_ehci {
|
|
+ status = "okay";
|
|
+};
|
|
+&usb_host0_ohci {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usb_host1_ohci {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usbdrd3_0 {
|
|
+ extcon = <&fusb0>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usbdrd3_1 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usbdrd_dwc3_0 {
|
|
+ dr_mode = "otg";
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usbdrd_dwc3_1 {
|
|
+ status = "okay";
|
|
+ dr_mode = "host";
|
|
+};
|
|
+
|
|
+&vpu {
|
|
+ status = "okay";
|
|
+ /* 0 means ion, 1 means drm */
|
|
+ //allocator = <0>;
|
|
+};
|
|
+
|
|
+&pinctrl {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&npu_ref_clk &gpio_init>;
|
|
+
|
|
+ mipi_to_lvds {
|
|
+ /*pinctrl_lvds_hdmi_sel: lvds_hdmi_sel {
|
|
+ rockchip,pins = <0 5 0 &pcfg_pull_none>;
|
|
+ };*/
|
|
+
|
|
+ pinctrl_sn65dsi84_irq: sn65dsi84_irq{
|
|
+ rockchip,pins = <1 RK_PB2 0 &pcfg_pull_none>;
|
|
+ };
|
|
+
|
|
+ pinctrl_lvds_bl_en: lvds_bl_en {
|
|
+ rockchip,pins = <1 RK_PB0 0 &pcfg_pull_none>;
|
|
+ };
|
|
+
|
|
+ pinctrl_sn65dsi84_en: sn65dsi84_en {
|
|
+ rockchip,pins = <1 RK_PA7 0 &pcfg_pull_none>;
|
|
+ };
|
|
+
|
|
+ pinctrl_lvds_vdd_en: lvds_vdd_en {
|
|
+ rockchip,pins = <1 RK_PB1 0 &pcfg_pull_none>;
|
|
+ };
|
|
+
|
|
+ pinctrl_pwr_source: pwr_source {
|
|
+ rockchip,pins = <0 RK_PA6 0 &pcfg_pull_none>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ bq2570 {
|
|
+ charger_ok_int: charger-ok-int {
|
|
+ rockchip,pins = <1 RK_PA1 0 &pcfg_pull_up>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fusb30x {
|
|
+ fusb0_int: fusb0-int {
|
|
+ rockchip,pins = <1 RK_PA2 0 &pcfg_pull_up>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ headphone {
|
|
+ hp_det: hp-det {
|
|
+ rockchip,pins = <0 RK_PB5 0 &pcfg_pull_up>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ lcd_rst {
|
|
+ lcd_rst_gpio: lcd-rst-gpio {
|
|
+ rockchip,pins = <3 RK_PA4 0 &pcfg_pull_none>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ gpio_init_config {
|
|
+ gpio_init: gpio_init {
|
|
+ rockchip,pins =
|
|
+ <1 9 0 &pcfg_pull_none>,
|
|
+ <1 10 0 &pcfg_pull_none>,
|
|
+ <1 7 0 &pcfg_pull_none>,
|
|
+ <1 8 0 &pcfg_pull_none>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ npu_clk {
|
|
+ npu_ref_clk: npu-ref-clk {
|
|
+ rockchip,pins =
|
|
+ <0 RK_PA2 1 &pcfg_pull_none>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ pmic {
|
|
+ pmic_int_l: pmic-int-l {
|
|
+ rockchip,pins =
|
|
+ <1 RK_PC2 0 &pcfg_pull_up>;
|
|
+ };
|
|
+ vsel1_gpio: vsel1-gpio {
|
|
+ rockchip,pins =
|
|
+ <1 RK_PC1 0 &pcfg_pull_down>;
|
|
+ };
|
|
+ vsel2_gpio: vsel2-gpio {
|
|
+ rockchip,pins =
|
|
+ <1 RK_PB6 0 &pcfg_pull_down>;
|
|
+ };
|
|
+
|
|
+ soc_slppin_gpio: soc-slppin-gpio {
|
|
+ rockchip,pins =
|
|
+ <1 RK_PA5 0 &pcfg_output_low>;
|
|
+ };
|
|
+
|
|
+ soc_slppin_slp: soc-slppin-slp {
|
|
+ rockchip,pins =
|
|
+ <1 RK_PA5 1 &pcfg_pull_down>;
|
|
+ };
|
|
+
|
|
+ soc_slppin_rst: soc-slppin-rst {
|
|
+ rockchip,pins =
|
|
+ <1 RK_PA5 2 &pcfg_pull_none>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ sdhci-pwrseq {
|
|
+ sdhci_reset: sdhci-reset {
|
|
+ rockchip,pins = <2 4 0 &pcfg_pull_none>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ sdio-pwrseq {
|
|
+ wifi_enable_h: wifi-enable-h {
|
|
+ rockchip,pins =
|
|
+ <2 RK_PD3 0 &pcfg_pull_none>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ sdmmc {
|
|
+ sdmmc_bus1: sdmmc-bus1 {
|
|
+ rockchip,pins =
|
|
+ <4 RK_PB0 1 &pcfg_pull_up>;
|
|
+ };
|
|
+
|
|
+ sdmmc_bus4: sdmmc-bus4 {
|
|
+ rockchip,pins =
|
|
+ <4 RK_PB0 1 &pcfg_pull_up>,
|
|
+ <4 RK_PB1 1 &pcfg_pull_up>,
|
|
+ <4 RK_PB2 1 &pcfg_pull_up>,
|
|
+ <4 RK_PB3 1 &pcfg_pull_up>;
|
|
+ };
|
|
+
|
|
+ sdmmc_clk: sdmmc-clk {
|
|
+ rockchip,pins =
|
|
+ <4 RK_PB4 1 &pcfg_pull_none>;
|
|
+ };
|
|
+
|
|
+ sdmmc_cmd: sdmmc-cmd {
|
|
+ rockchip,pins =
|
|
+ <4 RK_PB5 1 &pcfg_pull_up>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ tp_irq {
|
|
+ tp_irq_gpio: tp-irq-gpio {
|
|
+ rockchip,pins =
|
|
+ <3 RK_PB0 0 &pcfg_pull_up>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // wireless-bluetooth {
|
|
+ // bt_irq_gpio: bt-irq-gpio {
|
|
+ // rockchip,pins =
|
|
+ // <0 RK_PA5 0 &pcfg_pull_down>;
|
|
+ // };
|
|
+
|
|
+ //uart0_gpios: uart0-gpios {
|
|
+ // rockchip,pins =
|
|
+ // <2 RK_PC3 0 &pcfg_pull_none>;
|
|
+ //};
|
|
+ // };
|
|
+
|
|
+ // isp {
|
|
+ // test_clkout2: cif-test_clkout2 {
|
|
+ // rockchip,pins =
|
|
+ // /* test_clkout2 */
|
|
+ // <0 8 3 &pcfg_pull_none>;
|
|
+ // };
|
|
+ // };
|
|
+};
|
|
\ No newline at end of file
|
|
diff --git a/configs/tinker-edge-r_rk3399pro_defconfig b/configs/tinker-edge-r_rk3399pro_defconfig
|
|
new file mode 100644
|
|
index 0000000000..b9317ebba1
|
|
--- /dev/null
|
|
+++ b/configs/tinker-edge-r_rk3399pro_defconfig
|
|
@@ -0,0 +1,73 @@
|
|
+CONFIG_ARM=y
|
|
+CONFIG_SKIP_LOWLEVEL_INIT=y
|
|
+CONFIG_COUNTER_FREQUENCY=24000000
|
|
+CONFIG_ARCH_ROCKCHIP=y
|
|
+CONFIG_SYS_TEXT_BASE=0x00200000
|
|
+CONFIG_SPL_GPIO=y
|
|
+CONFIG_NR_DRAM_BANKS=1
|
|
+CONFIG_ENV_OFFSET=0x3F8000
|
|
+CONFIG_DEFAULT_DEVICE_TREE="rk3399pro-tinker_edge_r"
|
|
+CONFIG_ROCKCHIP_RK3399=y
|
|
+CONFIG_TARGET_EVB_RK3399=y
|
|
+CONFIG_DEBUG_UART_BASE=0xFF180000
|
|
+CONFIG_DEBUG_UART_CLOCK=24000000
|
|
+CONFIG_SYS_LOAD_ADDR=0x800800
|
|
+CONFIG_DEBUG_UART=y
|
|
+# CONFIG_ANDROID_BOOT_IMAGE is not set
|
|
+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399pro-tinker_edge_r.dtb"
|
|
+# CONFIG_CONSOLE_MUX is not set
|
|
+CONFIG_DISPLAY_BOARDINFO_LATE=y
|
|
+CONFIG_MISC_INIT_R=y
|
|
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
|
|
+CONFIG_SPL_STACK_R=y
|
|
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
|
|
+CONFIG_TPL=y
|
|
+CONFIG_CMD_BOOTZ=y
|
|
+CONFIG_CMD_GPT=y
|
|
+CONFIG_CMD_MMC=y
|
|
+CONFIG_CMD_PCI=y
|
|
+CONFIG_CMD_USB=y
|
|
+# CONFIG_CMD_SETEXPR is not set
|
|
+CONFIG_CMD_TIME=y
|
|
+CONFIG_SPL_OF_CONTROL=y
|
|
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
|
|
+CONFIG_ENV_IS_IN_MMC=y
|
|
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
|
+CONFIG_ROCKCHIP_GPIO=y
|
|
+CONFIG_SYS_I2C_ROCKCHIP=y
|
|
+CONFIG_MISC=y
|
|
+CONFIG_MMC_DW=y
|
|
+CONFIG_MMC_DW_ROCKCHIP=y
|
|
+CONFIG_MMC_SDHCI=y
|
|
+CONFIG_MMC_SDHCI_ROCKCHIP=y
|
|
+CONFIG_DM_ETH=y
|
|
+CONFIG_ETH_DESIGNWARE=y
|
|
+CONFIG_GMAC_ROCKCHIP=y
|
|
+CONFIG_NVME_PCI=y
|
|
+CONFIG_PCI=y
|
|
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
|
|
+CONFIG_PHY_ROCKCHIP_TYPEC=y
|
|
+CONFIG_PMIC_RK8XX=y
|
|
+CONFIG_REGULATOR_PWM=y
|
|
+CONFIG_REGULATOR_RK8XX=y
|
|
+CONFIG_PWM_ROCKCHIP=y
|
|
+CONFIG_RAM_RK3399_LPDDR4=y
|
|
+CONFIG_DM_RESET=y
|
|
+CONFIG_BAUDRATE=115200
|
|
+CONFIG_DEBUG_UART_SHIFT=2
|
|
+CONFIG_SYSRESET=y
|
|
+CONFIG_USB=y
|
|
+CONFIG_USB_XHCI_HCD=y
|
|
+CONFIG_USB_XHCI_DWC3=y
|
|
+CONFIG_USB_EHCI_HCD=y
|
|
+CONFIG_USB_EHCI_GENERIC=y
|
|
+CONFIG_USB_DWC3=y
|
|
+CONFIG_USB_DWC3_GENERIC=y
|
|
+CONFIG_USB_KEYBOARD=y
|
|
+# CONFIG_USB_KEYBOARD_FN_KEYS is not set
|
|
+CONFIG_USB_GADGET=y
|
|
+CONFIG_DM_VIDEO=y
|
|
+CONFIG_DISPLAY=y
|
|
+CONFIG_VIDEO_ROCKCHIP=y
|
|
+CONFIG_DISPLAY_ROCKCHIP_HDMI=y
|
|
+CONFIG_ERRNO_STR=y
|
|
--
|
|
2.25.1
|
|
|