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d1186b8a0e
I have changed the way the patches are generated a bit. Instead of using orange-pi branch from megous tree for 6.6 kernel, I have used the following kernel branches a83t-suspend, af8133j, anx, audio, axp, cam, drm, err, fixes, mbus, modem, opi3, pb, pinetab, pp, ppkb, samuel, speed, tbs-a711, ths These branches were carefully chosen to include only allwinner related patches and remove importing of the rockchip related patches into the allwinner kernel. Following patches are modified to fix patch application failure - patches.armbian/arm64-dts-sun50i-h616-orangepi-zero2-reg_usb1_vbus-status-ok.patch - patches.armbian/arm64-dts-sun50i-h616-orangepi-zero2-Enable-GPU-mali.patch - patches.armbian/arm64-dts-allwinner-h616-Add-efuse_xlate-cpu-frequency-scaling-v1_6_2.patch - patches.armbian/arm64-dts-allwinner-h616-LED-green_power_on-red_status_heartbeat.patch - patches.armbian/arm64-dts-allwinner-overlay-Add-Overlays-for-sunxi64.patch - patches.armbian/arm64-dts-sun50i-h616-bigtreetech-cb1.patch Following patches are modified because of kernel api change to fix compilation failure - patches.armbian/drv-gpu-drm-sun4i-Add-HDMI-audio-sun4i-hdmi-encoder.patch - patches.armbian/drv-of-Device-Tree-Overlay-ConfigFS-interface.patch
207 lines
6.1 KiB
Diff
207 lines
6.1 KiB
Diff
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
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From: The-going <48602507+The-going@users.noreply.github.com>
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Date: Wed, 2 Feb 2022 21:29:16 +0300
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Subject: arm:dts:overlay: sun8i-h3-cpu-clock add overclock
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---
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arch/arm/boot/dts/allwinner/overlay/Makefile | 3 +
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arch/arm/boot/dts/allwinner/overlay/sun8i-h3-cpu-clock-1.2GHz-1.3v.dtso | 31 +++++
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arch/arm/boot/dts/allwinner/overlay/sun8i-h3-cpu-clock-1.368GHz-1.3v.dtso | 67 ++++++++++
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arch/arm/boot/dts/allwinner/overlay/sun8i-h3-cpu-clock-1.3GHz-1.3v.dtso | 61 +++++++++
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4 files changed, 162 insertions(+)
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diff --git a/arch/arm/boot/dts/allwinner/overlay/Makefile b/arch/arm/boot/dts/allwinner/overlay/Makefile
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index 0c47e8fda8fc..560f926b7018 100644
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--- a/arch/arm/boot/dts/allwinner/overlay/Makefile
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+++ b/arch/arm/boot/dts/allwinner/overlay/Makefile
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@@ -60,6 +60,9 @@ dtb-$(CONFIG_MACH_SUN7I) += \
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dtb-$(CONFIG_MACH_SUN8I) += \
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sun8i-h3-analog-codec.dtbo \
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sun8i-h3-cir.dtbo \
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+ sun8i-h3-cpu-clock-1.2GHz-1.3v.dtbo \
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+ sun8i-h3-cpu-clock-1.368GHz-1.3v.dtbo \
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+ sun8i-h3-cpu-clock-1.3GHz-1.3v.dtbo \
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sun8i-h3-i2c0.dtbo \
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sun8i-h3-i2c1.dtbo \
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sun8i-h3-i2c2.dtbo \
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diff --git a/arch/arm/boot/dts/allwinner/overlay/sun8i-h3-cpu-clock-1.2GHz-1.3v.dtso b/arch/arm/boot/dts/allwinner/overlay/sun8i-h3-cpu-clock-1.2GHz-1.3v.dtso
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new file mode 100644
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index 000000000000..b07e694c781a
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--- /dev/null
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+++ b/arch/arm/boot/dts/allwinner/overlay/sun8i-h3-cpu-clock-1.2GHz-1.3v.dtso
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@@ -0,0 +1,31 @@
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+// DT overlay for CPU frequency operating points to up to 1.2GHz at a maximum CPU voltage of 1.3v
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+
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+/dts-v1/;
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+/plugin/;
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+
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+/ {
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+ fragment@0 {
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+ target = <&cpu0_opp_table>;
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+
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+ __overlay__ {
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+ compatible = "operating-points-v2";
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+ opp-shared;
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+
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+ // in order to match the existing DT cooling-maps, update the existing OP table in-place
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+ // with the new voltages
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+
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+ opp-1104000000 {
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+ opp-hz = /bits/ 64 <1104000000>;
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+ opp-microvolt = <1300000 1300000 1300000>;
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+ clock-latency-ns = <244144>; /* 8 32k periods */
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+ };
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+
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+ opp-1200000000 {
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+ opp-hz = /bits/ 64 <1200000000>;
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+ opp-microvolt = <1300000 1300000 1300000>;
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+ clock-latency-ns = <244144>; /* 8 32k periods */
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+ };
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+ };
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+ };
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+};
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+
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diff --git a/arch/arm/boot/dts/allwinner/overlay/sun8i-h3-cpu-clock-1.368GHz-1.3v.dtso b/arch/arm/boot/dts/allwinner/overlay/sun8i-h3-cpu-clock-1.368GHz-1.3v.dtso
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new file mode 100644
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index 000000000000..e3fd7e5c85a6
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--- /dev/null
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+++ b/arch/arm/boot/dts/allwinner/overlay/sun8i-h3-cpu-clock-1.368GHz-1.3v.dtso
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@@ -0,0 +1,67 @@
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+// DT overlay for CPU frequency operating points to 1.3GHz at a maximum CPU voltage of 1.3v
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+
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+/dts-v1/;
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+/plugin/;
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+
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+/ {
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+ fragment@0 {
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+ target = <&cpu0_opp_table>;
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+
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+ __overlay__ {
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+ compatible = "operating-points-v2";
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+ opp-shared;
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+
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+ // in order to match the DT cooling-maps, update the existing OP table in-place
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+ // with the new voltages
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+
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+ opp-1056000000 {
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+ opp-hz = /bits/ 64 <1056000000>;
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+ opp-microvolt = <1300000 1300000 1300000>;
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+ clock-latency-ns = <244144>; /* 8 32k periods */
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+ };
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+
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+ opp-1104000000 {
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+ opp-hz = /bits/ 64 <1104000000>;
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+ opp-microvolt = <1300000 1300000 1300000>;
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+ clock-latency-ns = <244144>; /* 8 32k periods */
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+ };
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+
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+ opp-1152000000 {
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+ opp-hz = /bits/ 64 <1152000000>;
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+ opp-microvolt = <1300000 1300000 1300000>;
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+ clock-latency-ns = <244144>; /* 8 32k periods */
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+ };
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+
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+ opp-1200000000 {
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+ opp-hz = /bits/ 64 <1200000000>;
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+ opp-microvolt = <1300000 1300000 1300000>;
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+ clock-latency-ns = <244144>; /* 8 32k periods */
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+ };
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+
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+ opp-1224000000 {
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+ opp-hz = /bits/ 64 <1224000000>;
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+ opp-microvolt = <1300000 1300000 1300000>;
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+ clock-latency-ns = <244144>; /* 8 32k periods */
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+ };
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+
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+ opp-1248000000 {
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+ opp-hz = /bits/ 64 <1248000000>;
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+ opp-microvolt = <1300000 1300000 1300000>;
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+ clock-latency-ns = <244144>; /* 8 32k periods */
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+ };
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+
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+ opp-1296000000 {
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+ opp-hz = /bits/ 64 <1296000000>;
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+ opp-microvolt = <1300000 1300000 1300000>;
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+ clock-latency-ns = <244144>; /* 8 32k periods */
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+ };
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+
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+ opp-1368000000 {
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+ opp-hz = /bits/ 64 <1368000000>;
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+ opp-microvolt = <1300000 1300000 1300000>;
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+ clock-latency-ns = <244144>; /* 8 32k periods */
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+ };
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+ };
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+ };
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+};
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+
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diff --git a/arch/arm/boot/dts/allwinner/overlay/sun8i-h3-cpu-clock-1.3GHz-1.3v.dtso b/arch/arm/boot/dts/allwinner/overlay/sun8i-h3-cpu-clock-1.3GHz-1.3v.dtso
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new file mode 100644
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index 000000000000..413222831eab
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--- /dev/null
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+++ b/arch/arm/boot/dts/allwinner/overlay/sun8i-h3-cpu-clock-1.3GHz-1.3v.dtso
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@@ -0,0 +1,61 @@
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+// DT overlay for CPU frequency operating points to 1.3GHz at a maximum CPU voltage of 1.3v
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+
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+/dts-v1/;
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+/plugin/;
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+
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+/ {
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+ fragment@0 {
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+ target = <&cpu0_opp_table>;
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+
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+ __overlay__ {
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+ compatible = "operating-points-v2";
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+ opp-shared;
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+
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+ // in order to match the DT cooling-maps, update the existing OP table in-place
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+ // with the new voltages
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+
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+ opp-1056000000 {
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+ opp-hz = /bits/ 64 <1056000000>;
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+ opp-microvolt = <1300000 1300000 1300000>;
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+ clock-latency-ns = <244144>; /* 8 32k periods */
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+ };
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+
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+ opp-1104000000 {
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+ opp-hz = /bits/ 64 <1104000000>;
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+ opp-microvolt = <1300000 1300000 1300000>;
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+ clock-latency-ns = <244144>; /* 8 32k periods */
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+ };
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+
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+ opp-1152000000 {
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+ opp-hz = /bits/ 64 <1152000000>;
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+ opp-microvolt = <1300000 1300000 1300000>;
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+ clock-latency-ns = <244144>; /* 8 32k periods */
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+ };
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+
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+ opp-1200000000 {
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+ opp-hz = /bits/ 64 <1200000000>;
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+ opp-microvolt = <1300000 1300000 1300000>;
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+ clock-latency-ns = <244144>; /* 8 32k periods */
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+ };
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+
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+ opp-1224000000 {
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+ opp-hz = /bits/ 64 <1224000000>;
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+ opp-microvolt = <1300000 1300000 1300000>;
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+ clock-latency-ns = <244144>; /* 8 32k periods */
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+ };
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+
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+ opp-1248000000 {
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+ opp-hz = /bits/ 64 <1248000000>;
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+ opp-microvolt = <1300000 1300000 1300000>;
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+ clock-latency-ns = <244144>; /* 8 32k periods */
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+ };
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+
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+ opp-1296000000 {
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+ opp-hz = /bits/ 64 <1296000000>;
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+ opp-microvolt = <1300000 1300000 1300000>;
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+ clock-latency-ns = <244144>; /* 8 32k periods */
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+ };
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+ };
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+ };
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+};
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+
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--
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Armbian
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