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63 lines
2.6 KiB
Diff
63 lines
2.6 KiB
Diff
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
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From: Abhinav Kumar <quic_abhinavk@quicinc.com>
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Date: Mon, 11 Sep 2023 15:16:27 -0700
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Subject: drm/msm/dpu: try multirect based on mdp clock limits
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It's certainly possible that for large resolutions a single DPU SSPP
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cannot process the image without exceeding the MDP clock limits but
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it can still process it in multirect mode because the source rectangles
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will get divided and can fall within the MDP clock limits.
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If the SSPP cannot process the image even in multirect mode, then it
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will be rejected in dpu_plane_atomic_check_pipe().
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Hence try using multirect for resolutions which cannot be processed
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by a single SSPP without exceeding the MDP clock limits.
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changes in v2:
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- use crtc_state's adjusted_mode instead of mode
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- fix the UBWC condition to check maxlinewidth
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Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
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Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
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Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
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---
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drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 8 ++++++--
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1 file changed, 6 insertions(+), 2 deletions(-)
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diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
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index 3eef5e025e12..1e0da38c6f2a 100644
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--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
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+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
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@@ -824,6 +824,8 @@ static int dpu_plane_atomic_check(struct drm_plane *plane,
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plane);
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int ret = 0, min_scale;
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struct dpu_plane *pdpu = to_dpu_plane(plane);
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+ struct dpu_kms *kms = _dpu_plane_get_kms(&pdpu->base);
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+ u64 max_mdp_clk_rate = kms->perf.max_core_clk_rate;
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struct dpu_plane_state *pstate = to_dpu_plane_state(new_plane_state);
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struct dpu_sw_pipe *pipe = &pstate->pipe;
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struct dpu_sw_pipe *r_pipe = &pstate->r_pipe;
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@@ -892,14 +894,16 @@ static int dpu_plane_atomic_check(struct drm_plane *plane,
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max_linewidth = pdpu->catalog->caps->max_linewidth;
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- if (drm_rect_width(&pipe_cfg->src_rect) > max_linewidth) {
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+ if ((drm_rect_width(&pipe_cfg->src_rect) > max_linewidth) ||
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+ _dpu_plane_calc_clk(&crtc_state->adjusted_mode, pipe_cfg) > max_mdp_clk_rate) {
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/*
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* In parallel multirect case only the half of the usual width
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* is supported for tiled formats. If we are here, we know that
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* full width is more than max_linewidth, thus each rect is
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* wider than allowed.
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*/
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- if (DPU_FORMAT_IS_UBWC(fmt)) {
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+ if (DPU_FORMAT_IS_UBWC(fmt) &&
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+ drm_rect_width(&pipe_cfg->src_rect) > max_linewidth) {
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DPU_DEBUG_PLANE(pdpu, "invalid src " DRM_RECT_FMT " line:%u, tiled format\n",
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DRM_RECT_ARG(&pipe_cfg->src_rect), max_linewidth);
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return -E2BIG;
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--
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Armbian
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