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2d7cbfa7c1
Fix: dtb dtbo install, wrong select media sensors Disable incorrectly designed patches. They need to be aligned with the kernel code.
120 lines
3.1 KiB
Diff
120 lines
3.1 KiB
Diff
From 96705efb949b02efd1a72cdbce95bbe4d21d0b97 Mon Sep 17 00:00:00 2001
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From: The-going <48602507+The-going@users.noreply.github.com>
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Date: Sun, 23 Jan 2022 20:49:27 +0300
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Subject: [PATCH 074/158] arm64:dts: sun50i-h6 Add r_uart uart2-3 pins
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---
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arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 60 ++++++++++++++++----
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1 file changed, 50 insertions(+), 10 deletions(-)
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diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
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index 80d7f4854..160fe50bd 100644
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--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
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+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
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@@ -309,6 +309,17 @@ msgbox: mailbox@3003000 {
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#mbox-cells = <1>;
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};
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+ gic: interrupt-controller@3021000 {
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+ compatible = "arm,gic-400";
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+ reg = <0x03021000 0x1000>,
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+ <0x03022000 0x2000>,
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+ <0x03024000 0x2000>,
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+ <0x03026000 0x2000>;
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+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
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+ interrupt-controller;
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+ #interrupt-cells = <3>;
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+ };
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+
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sid: efuse@3006000 {
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compatible = "allwinner,sun50i-h6-sid";
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reg = <0x03006000 0x400>;
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@@ -368,6 +379,7 @@ pio: pinctrl@300b000 {
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interrupt-controller;
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#interrupt-cells = <3>;
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+ /omit-if-no-ref/
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ext_rgmii_pins: rgmii-pins {
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pins = "PD0", "PD1", "PD2", "PD3", "PD4",
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"PD5", "PD7", "PD8", "PD9", "PD10",
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@@ -413,6 +425,7 @@ mmc1_pins: mmc1-pins {
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bias-pull-up;
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};
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+ /omit-if-no-ref/
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mmc2_pins: mmc2-pins {
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pins = "PC1", "PC4", "PC5", "PC6",
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"PC7", "PC8", "PC9", "PC10",
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@@ -467,17 +480,26 @@ uart1_rts_cts_pins: uart1-rts-cts-pins {
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pins = "PG8", "PG9";
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function = "uart1";
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};
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- };
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- gic: interrupt-controller@3021000 {
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- compatible = "arm,gic-400";
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- reg = <0x03021000 0x1000>,
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- <0x03022000 0x2000>,
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- <0x03024000 0x2000>,
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- <0x03026000 0x2000>;
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- interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
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- interrupt-controller;
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- #interrupt-cells = <3>;
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+ uart2_pins: uart2-pins {
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+ pins = "PD19", "PD20";
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+ function = "uart2";
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+ };
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+
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+ uart2_rts_cts_pins: uart2-rts-cts-pins {
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+ pins = "PD21", "PD22";
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+ function = "uart2";
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+ };
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+
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+ uart3_pins: uart3-pins {
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+ pins = "PD23", "PD24";
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+ function = "uart3";
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+ };
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+
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+ uart3_rts_cts_pins: uart3-rts-cts-pins {
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+ pins = "PD25", "PD26";
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+ function = "uart3";
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+ };
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};
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iommu: iommu@30f0000 {
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@@ -962,6 +984,19 @@ tcon_tv_out_tcon_top: endpoint@1 {
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};
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};
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+ r_uart: serial@7080000 {
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+ compatible = "snps,dw-apb-uart";
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+ reg = <0x07080000 0x400>;
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+ interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
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+ reg-shift = <2>;
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+ reg-io-width = <4>;
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+ clocks = <&r_ccu CLK_R_APB2_UART>;
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+ resets = <&r_ccu RST_R_APB2_UART>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&r_uart_pins>;
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+ status = "disabled";
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+ };
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+
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rtc: rtc@7000000 {
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compatible = "allwinner,sun50i-h6-rtc";
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reg = <0x07000000 0x400>;
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@@ -1027,6 +1062,11 @@ r_rsb_pins: r-rsb-pins {
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pins = "PL0", "PL1";
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function = "s_rsb";
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};
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+
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+ r_uart_pins: r-uart-pins {
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+ pins = "PL2", "PL3";
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+ function = "s_uart";
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+ };
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};
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r_ir: ir@7040000 {
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--
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2.35.3
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