armbian_build/patch/kernel/archive/spacemit-6.1/049-include-uapi.patch

From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Patrick Yavitz <pyavitz@armbian.com>
Date: Fri, 21 Jun 2024 11:54:06 -0400
Subject: add spacemit patch set

source: https://gitee.com/bianbu-linux/linux-6.1

Signed-off-by: Patrick Yavitz <pyavitz@armbian.com>
---
 include/uapi/linux/elf.h                      |   1 +
 include/uapi/media/k1x/cam_sensor_uapi.h      | 117 +++++
 include/uapi/media/k1x/k1x_cpp_uapi.h         | 157 ++++++
 include/uapi/media/k1x/k1x_isp_drv_uapi.h     | 248 ++++++++++
 include/uapi/media/k1x/k1x_media_bus_format.h |  45 ++
 include/uapi/media/k1x/k1x_plat_cam.h         |  19 +
 include/uapi/media/k1x/k1x_videodev2.h        | 125 +++++
 7 files changed, 712 insertions(+)

diff --git a/include/uapi/linux/elf.h b/include/uapi/linux/elf.h
index 111111111111..222222222222 100644
--- a/include/uapi/linux/elf.h
+++ b/include/uapi/linux/elf.h
@@ -439,6 +439,7 @@ typedef struct elf64_shdr {
 #define NT_MIPS_DSP	0x800		/* MIPS DSP ASE registers */
 #define NT_MIPS_FP_MODE	0x801		/* MIPS floating-point mode */
 #define NT_MIPS_MSA	0x802		/* MIPS SIMD registers */
+#define NT_RISCV_VECTOR	0x900		/* RISC-V vector registers */
 #define NT_LOONGARCH_CPUCFG	0xa00	/* LoongArch CPU config registers */
 #define NT_LOONGARCH_CSR	0xa01	/* LoongArch control and status registers */
 #define NT_LOONGARCH_LSX	0xa02	/* LoongArch Loongson SIMD Extension registers */
diff --git a/include/uapi/media/k1x/cam_sensor_uapi.h b/include/uapi/media/k1x/cam_sensor_uapi.h
new file mode 100644
index 000000000000..111111111111
--- /dev/null
+++ b/include/uapi/media/k1x/cam_sensor_uapi.h
@@ -0,0 +1,117 @@
+/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
+/*
+ * cam_sensor_uapi.h.c - Driver uapi for camera sensor driver
+ *
+ * Copyright (C) 2022 SPACEMIT Micro Limited
+ * All Rights Reserved.
+ */
+#ifndef __CAM_SENSOR_UAPI_H__
+#define __CAM_SENSOR_UAPI_H__
+
+#if defined(__cplusplus)
+extern "C" {
+#endif
+
+#define CAM_SNS_MAX_DEV_NUM    3
+
+#define CAM_SENSOR_DEV_NAME "/dev/cam_sensor"
+
+#define CAM_SENSOR_IOC_MAGIC 'I'
+
+typedef enum CAM_SENSOR_IOC {
+	SENSOR_IOC_RESET = 1,
+	SENSOR_IOC_UNRESET,
+	SENSOR_IOC_I2C_WRITE,
+	SENSOR_IOC_I2C_READ,
+	SENSOR_IOC_I2C_BURST_WRITE,
+	SENSOR_IOC_I2C_BURST_READ,
+	SENSOR_IOC_GET_INFO,
+	SENSOR_IOC_SET_MIPI_CLOCK,
+	SENSOR_IOC_SET_POWER_VOLTAGE,
+	SENSOR_IOC_SET_POWER_ON,
+	SENSOR_IOC_SET_GPIO_ENABLE,
+	SENSOR_IOC_SET_MCLK_ENABLE,
+	SENSOR_IOC_SET_MCLK_RATE,
+} CAM_SENSOR_IOC_E;
+
+typedef unsigned int sns_rst_source_t;
+typedef unsigned int sns_mipi_clock_t;
+
+struct regval_tab {
+	uint16_t reg;
+	uint16_t val;
+};
+
+enum sensor_i2c_len {
+	I2C_8BIT = 1,
+	I2C_16BIT = 2,
+	//I2C_24BIT = 3,
+	//I2C_32BIT = 4,
+};
+
+struct cam_i2c_data {
+	//uint8_t twsi_no;
+	enum sensor_i2c_len reg_len;
+	enum sensor_i2c_len val_len;
+	uint8_t addr; /* 7 bit i2c address*/
+	struct regval_tab tab;
+};
+
+struct cam_burst_i2c_data {
+	//uint8_t twsi_no;
+	enum sensor_i2c_len reg_len;
+	enum sensor_i2c_len val_len;
+	uint8_t addr; /* 7 bit i2c address*/
+	struct regval_tab *tab;
+	uint32_t num; /* the number of sensor regs*/
+};
+
+struct cam_sensor_info {
+	uint8_t twsi_no;
+};
+
+typedef enum {
+	SENSOR_REGULATOR_AFVDD,
+	SENSOR_REGULATOR_AVDD,
+	SENSOR_REGULATOR_DOVDD,
+	SENSOR_REGULATOR_DVDD,
+} cam_sensor_power_regulator_id;
+
+typedef enum {
+	SENSOR_GPIO_PWDN,
+	SENSOR_GPIO_RST,
+	SENSOR_GPIO_DVDDEN,
+	SENSOR_GPIO_DCDCEN,
+} cam_sensor_gpio_id;
+
+struct cam_sensor_power {
+	cam_sensor_power_regulator_id regulator_id;
+	uint32_t voltage;
+	uint8_t on;
+};
+
+struct cam_sensor_gpio {
+	cam_sensor_gpio_id gpio_id;
+	uint8_t enable;
+};
+
+#define CAM_SENSOR_RESET _IOW(CAM_SENSOR_IOC_MAGIC, SENSOR_IOC_RESET, sns_rst_source_t)
+#define CAM_SENSOR_UNRESET _IOW(CAM_SENSOR_IOC_MAGIC, SENSOR_IOC_UNRESET, sns_rst_source_t)
+#define CAM_SENSOR_I2C_WRITE _IOW(CAM_SENSOR_IOC_MAGIC, SENSOR_IOC_I2C_WRITE, struct cam_i2c_data)
+#define CAM_SENSOR_I2C_READ _IOW(CAM_SENSOR_IOC_MAGIC, SENSOR_IOC_I2C_READ, struct cam_i2c_data)
+#define CAM_SENSOR_I2C_BURST_WRITE _IOW(CAM_SENSOR_IOC_MAGIC, SENSOR_IOC_I2C_BURST_WRITE, struct cam_burst_i2c_data)
+#define CAM_SENSOR_I2C_BURST_READ _IOW(CAM_SENSOR_IOC_MAGIC, SENSOR_IOC_I2C_BURST_READ, struct cam_burst_i2c_data)
+#define CAM_SENSOR_GET_INFO _IOW(CAM_SENSOR_IOC_MAGIC, SENSOR_IOC_GET_INFO, struct cam_sensor_info)
+#define CAM_SENSOR_SET_MIPI_CLOCK _IOW(CAM_SENSOR_IOC_MAGIC, SENSOR_IOC_SET_MIPI_CLOCK, sns_mipi_clock_t)
+
+#define CAM_SENSOR_SET_POWER_VOLTAGE _IOW(CAM_SENSOR_IOC_MAGIC, SENSOR_IOC_SET_POWER_VOLTAGE, struct cam_sensor_power)
+#define CAM_SENSOR_SET_POWER_ON _IOW(CAM_SENSOR_IOC_MAGIC, SENSOR_IOC_SET_POWER_ON, struct cam_sensor_power)
+#define CAM_SENSOR_SET_GPIO_ENABLE _IOW(CAM_SENSOR_IOC_MAGIC, SENSOR_IOC_SET_GPIO_ENABLE, struct cam_sensor_gpio)
+#define CAM_SENSOR_SET_MCLK_ENABLE _IOW(CAM_SENSOR_IOC_MAGIC, SENSOR_IOC_SET_MCLK_ENABLE, uint32_t)
+#define CAM_SENSOR_SET_MCLK_RATE _IOW(CAM_SENSOR_IOC_MAGIC, SENSOR_IOC_SET_MCLK_RATE, uint32_t)
+
+#if defined(__cplusplus)
+}
+#endif
+
+#endif /* __CAM_SENSOR_UAPI_H__ */
diff --git a/include/uapi/media/k1x/k1x_cpp_uapi.h b/include/uapi/media/k1x/k1x_cpp_uapi.h
new file mode 100644
index 000000000000..111111111111
--- /dev/null
+++ b/include/uapi/media/k1x/k1x_cpp_uapi.h
@@ -0,0 +1,157 @@
+/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
+/*
+ * k1x_cpp_uapi.h - Driver uapi for SPACEMIT K1X Camera Post Process
+ *
+ * Copyright (C) 2022 SPACEMIT Micro Limited
+ */
+
+#ifndef __K1X_CPP_UAPI_H__
+#define __K1X_CPP_UAPI_H__
+
+#include <linux/videodev2.h>
+
+/*
+ * hw version info:
+ * 31:16  Version bits
+ * 15:0   Revision bits
+ */
+#define CPP_HW_VERSION_1_0 (0x00010000)
+#define CPP_HW_VERSION_1_1 (0x00010001)
+#define CPP_HW_VERSION_2_0 (0x00020000)
+#define CPP_HW_VERSION_2_1 (0x00020001)
+
+typedef struct reg_val_mask_info {
+	uint32_t reg_offset;
+	uint32_t val;
+	uint32_t mask;
+} hw_reg_t;
+
+enum cpp_reg_cfg_type {
+	CPP_WRITE32,
+	CPP_READ32,
+	CPP_WRITE32_RLX,
+	CPP_WRITE32_NOP,
+};
+
+enum cpp_pix_format {
+	PIXFMT_NV12_DWT = 0,
+	PIXFMT_FBC_DWT,
+};
+
+#define CPP_MAX_PLANAR (2)
+#define CPP_MAX_LAYERS (5)
+
+typedef struct cpp_reg_cfg_cmd {
+	enum cpp_reg_cfg_type reg_type;
+	uint32_t reg_len;
+	struct reg_val_mask_info *reg_data;
+} cpp_reg_cfg_cmd_t;
+
+typedef struct cpp_plane_info {
+	uint32_t		type;
+	uint32_t		bytesused;
+	uint32_t		length;
+	union {
+		uint64_t	userptr;
+		int32_t		fd;
+		uint64_t    phyAddr;
+	} m;
+	uint32_t		data_offset;
+} cpp_plane_info_t;
+
+typedef struct cpp_buffer_info {
+	unsigned int index;
+	unsigned int num_layers;
+	unsigned int kgain_used;
+	enum cpp_pix_format format;
+	struct cpp_plane_info dwt_planes[CPP_MAX_LAYERS][CPP_MAX_PLANAR];
+	struct cpp_plane_info kgain_planes[CPP_MAX_LAYERS];
+} cpp_buffer_info_t;
+
+#define MAX_REG_CMDS (3)
+#define MAX_REG_DATA (640)
+typedef struct cpp_frame_info {
+	uint32_t frame_id;
+	uint32_t client_id;
+	struct cpp_reg_cfg_cmd regs[MAX_REG_CMDS];
+	struct cpp_buffer_info src_buf_info;
+	struct cpp_buffer_info dst_buf_info;
+	struct cpp_buffer_info pre_buf_info;
+} cpp_frame_info_t;
+
+struct k1x_cpp_reg_cfg {
+	enum cpp_reg_cfg_type cmd_type;
+	union {
+		struct reg_val_mask_info rw_info;
+	} u;
+};
+
+struct cpp_hw_info {
+	uint32_t cpp_hw_version;
+	uint32_t low_pwr_mode;
+};
+
+struct cpp_bandwidth_info {
+	int32_t rsum;
+	int32_t wsum;
+};
+
+struct cpp_clock_info {
+	uint32_t func_rate;
+};
+
+#define VIDIOC_K1X_CPP_REG_CFG \
+	_IOWR('V', BASE_VIDIOC_PRIVATE, struct k1x_cpp_reg_cfg)
+
+#define VIDIOC_K1X_CPP_PROCESS_FRAME \
+	_IOWR('V', BASE_VIDIOC_PRIVATE + 1, struct cpp_frame_info)
+
+#define VIDIOC_K1X_CPP_HW_RST \
+	_IO('V', BASE_VIDIOC_PRIVATE + 2)
+
+#define VIDIOC_K1X_CPP_LOW_PWR \
+	_IOWR('V', BASE_VIDIOC_PRIVATE + 3, int)
+
+#define VIDIOC_K1X_CPP_FLUSH_QUEUE \
+	_IO('V', BASE_VIDIOC_PRIVATE + 4)
+
+#define VIDIOC_K1X_CPP_HW_INFO \
+	_IOWR('V', BASE_VIDIOC_PRIVATE + 5, struct cpp_hw_info)
+
+#define VIDIOC_K1X_CPP_IOMMU_ATTACH \
+	_IO('V', BASE_VIDIOC_PRIVATE + 6)
+
+#define VIDIOC_K1X_CPP_IOMMU_DETACH \
+	_IO('V', BASE_VIDIOC_PRIVATE + 7)
+
+#define VIDIOC_K1X_CPP_UPDATE_BANDWIDTH \
+	_IOWR('V', BASE_VIDIOC_PRIVATE + 8, struct cpp_bandwidth_info)
+
+#define VIDIOC_K1X_CPP_UPDATE_CLOCKRATE \
+	_IOWR('V', BASE_VIDIOC_PRIVATE + 9, struct cpp_clock_info)
+
+struct k1x_cpp_done_info {
+	uint32_t frame_id;
+	uint32_t client_id;
+	uint64_t seg_reg_cfg;
+	uint64_t seg_stream;
+	uint8_t success;
+};
+
+struct k1x_cpp_error_info {
+	uint32_t frame_id;
+	uint32_t client_id;
+	uint32_t err_type;
+};
+
+struct k1x_cpp_event_data {
+	union {
+		struct k1x_cpp_done_info done_info;
+		struct k1x_cpp_error_info err_info;
+	} u; /* union can have max 64 bytes */
+};
+
+#define V4L2_EVENT_CPP_FRAME_DONE (V4L2_EVENT_PRIVATE_START + 0)
+#define V4L2_EVENT_CPP_FRAME_ERR (V4L2_EVENT_PRIVATE_START + 1)
+
+#endif /* __K1X_CPP_UAPI_H__ */
diff --git a/include/uapi/media/k1x/k1x_isp_drv_uapi.h b/include/uapi/media/k1x/k1x_isp_drv_uapi.h
new file mode 100644
index 000000000000..111111111111
--- /dev/null
+++ b/include/uapi/media/k1x/k1x_isp_drv_uapi.h
@@ -0,0 +1,248 @@
+/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
+
+#ifndef K1XISP_DEV_DRV_API_H
+#define K1XISP_DEV_DRV_API_H
+
+#include <linux/types.h>
+
+#define IOC_K1X_ISP_TYPE       'D'
+//#define K1X_ISP_DEV_NAME         "k1xisp"
+//#define K1X_ISP_PIPE_DEV_NAME    "k1xisp-pipe"
+#define K1X_ISP_DEV_NAME         "mars11isp"
+#define K1X_ISP_PIPE_DEV_NAME    "mars11isp-pipe"
+
+#define K1X_ISP_MAX_PLANE_NUM 4
+#define K1X_ISP_MAX_BUFFER_NUM 4
+
+#define K1X_ISP_PDC_CHANNEL_NUM 4
+
+#define K1XISP_SLICE_MAX_NUM 6
+#define K1XISP_SLICE_REG_MAX_NUM 30
+
+/*----------------------- struct define ----------------------- */
+enum isp_pipe_work_type {
+	ISP_PIPE_WORK_TYPE_INIT,
+	ISP_PIPE_WORK_TYPE_PREVIEW,
+	ISP_PIPE_WORK_TYPE_CAPTURE,
+	ISP_PIPE_WORK_TYPE_MAX,
+};
+
+enum isp_hw_pipeline_id {
+	ISP_HW_PIPELINE_ID_0,
+	ISP_HW_PIPELINE_ID_1,
+	ISP_HW_PIPELINE_ID_MAX,
+};
+
+enum isp_stat_id {
+	ISP_STAT_ID_AE,
+	ISP_STAT_ID_AWB,
+	ISP_STAT_ID_LTM,
+	ISP_STAT_ID_AF,
+	ISP_STAT_ID_PDC,
+	ISP_STAT_ID_EIS, //5
+	ISP_STAT_ID_MAX,
+};
+
+enum isp_pipe_task_type {
+	ISP_PIPE_TASK_TYPE_SOF, //firmware calc task at sof
+	ISP_PIPE_TASK_TYPE_EOF, //firmware calc task at eof
+	ISP_PIPE_TASK_TYPE_AF, //firmware calc AF stat task
+	ISP_PIPE_TASK_TYPE_MAX,
+};
+
+/**
+ * struct isp_buffer_plane - description of buffer plane used in k1xisp.
+ *
+ * @m: the id of the buffer, phy_addr(physical address) or fd(ion buffer).
+ * @pitch: the pitch of this plane
+ * @offset: the plane's offset of this buffer, usually is zero; .
+ * @length: the length of this plane.
+ * @reserved: reserve for private use, such as pdc can use for channel_cnt(0) and channel_width(1).
+ */
+struct isp_buffer_plane {
+	union {
+		__u64 phy_addr;
+		__s32 fd;
+	} m;
+	__u32 pitch;
+	__u32 offset;
+	__u32 length;
+	__u32 reserved[2];
+};
+
+/**
+ * struct isp_ubuf_uint - the description of buffer used in user space.
+ *
+ * @plane_count: the count of planes in this buffer.
+ * @buf_index: the index of this buffer in the queue.
+ * @buf_planes: planes in this buffer.
+ */
+struct isp_ubuf_uint {
+	__u32 plane_count;
+	__s32 buf_index; /* the index of this buffer in the queue. */
+	struct isp_buffer_plane buf_planes[K1X_ISP_MAX_PLANE_NUM];
+};
+
+/**
+ * struct isp_buffer_enqueue_info - the info of buffer enqueued by user space.
+ *
+ * @ubuf_uint: the buffer info enqueued by user space.
+ */
+struct isp_buffer_enqueue_info {
+	struct isp_ubuf_uint ubuf_uint[ISP_STAT_ID_MAX];
+};
+
+/**
+ * struct isp_buffer_request_info - the info of buffer requested by user space.
+ *
+ * @stat_buf_count: count of buffer used in the stat's queue.
+ */
+struct isp_buffer_request_info {
+	__u32 stat_buf_count[ISP_STAT_ID_MAX];
+};
+
+struct isp_reg_unit {
+	__u32 reg_addr;
+	__u32 reg_value;
+	__u32 reg_mask;
+};
+
+struct isp_regs_info {
+	union {
+		__u64 phy_addr;
+		__s32 fd;
+	} mem;
+	__u32 size;
+	void *data; /* contains some isp_reg_unit */
+	__u32 mem_index;
+};
+
+struct isp_slice_regs {
+	__u32 reg_count;
+	void *data; /* contains some isp_reg_unit */
+};
+
+struct isp_capture_slice_pack {
+	__s32 slice_width;
+	__s32 raw_read_offset;
+	__s32 yuv_out_offset;
+	__s32 dwt_offset[4];
+	struct isp_slice_regs slice_reg;
+};
+
+struct isp_capture_package {
+	__u32 slice_count;
+	struct isp_capture_slice_pack capture_slice_packs[K1XISP_SLICE_MAX_NUM];
+};
+
+enum isp_work_status {
+	ISP_WORK_STATUS_INIT,
+	ISP_WORK_STATUS_START,
+	ISP_WORK_STATUS_STOP,
+	ISP_WORK_STATUS_DONE, //for once work, licke capture
+	ISP_WORK_STATUS_RESTART,//isp hardware error happen, need to reset
+};
+
+enum isp_job_action {
+	ISP_JOB_ACTION_START,
+	ISP_JOB_ACTION_SWITCH,
+	ISP_JOB_ACTION_STOP,
+	ISP_JOB_ACTION_RESTART,
+};
+
+/**
+ * struct isp_job_describer - the job info of isp determined by user space.
+ *
+ * @work_type: the work type of the hw pipeline, which is defined by &enum isp_pipe_work_type
+ * @action: the action of job, which is defined by &enum isp_job_action.
+ */
+struct isp_job_describer {
+	__u32 work_type;
+	__u32 action;
+};
+
+/**
+ * struct isp_drv_deployment - the setting of isp driver setted by user space.
+ *
+ * @reg_mem: the ID of the buffer(fd or phy addr).
+ * @fd_buffer: the buffer use fd to transfer if true.
+ * @reg_mem_size: the size of buffer filled with registers.
+ * @reg_mem_index: the index of reg memory.
+ */
+struct isp_drv_deployment {
+	union {
+		__u64 phy_addr;
+		__s32 fd;
+	} reg_mem;
+	__u32 fd_buffer;
+	__u32 reg_mem_size;
+	__u32 work_type;
+	__u32 reg_mem_index;
+};
+
+/**
+ * struct isp_user_task_info - the info of task run user space.
+ *
+ * @task_type: the type fo this user task, whose value defined by &enum isp_pipe_task_type
+ * @frame_number: the current frame number of the hw pipeline
+ * @work_status: the current work status of the hw pipeline, defined by &isp_work_status
+ */
+struct isp_user_task_info {
+	__u32 task_type;
+	__u32 frame_number;
+	__u32 work_status;
+	__u8 result_valid;
+	union {
+		struct {
+			struct isp_ubuf_uint ltm_result;
+			struct isp_ubuf_uint awb_result;
+			struct isp_ubuf_uint eis_result;
+			struct isp_ubuf_uint ae_result;
+			// __u32 rgbir_avg[2]; /* AVG0 and AVG1 */
+		} sof_task;
+		struct {
+			struct isp_ubuf_uint ae_result;
+		} eof_task;
+		struct {
+			struct isp_ubuf_uint af_result;
+			struct isp_ubuf_uint pdc_result;
+		} af_task;
+	} stats_result;
+};
+
+struct isp_endframe_work_info {
+	__u32 process_ae_by_sof;
+	__u32 get_frameinfo_by_eof;
+};
+
+/*----------------------- ioctl command ----------------------- */
+typedef enum ISP_IOC_NR {
+	ISP_IOC_NR_DEPLOY_DRV = 1,
+	ISP_IOC_NR_UNDEPLOY_DRV,
+	ISP_IOC_NR_SET_REG,
+	ISP_IOC_NR_GET_REG,
+	ISP_IOC_NR_ENABLE_PDC,
+	ISP_IOC_NR_SET_JOB,
+	ISP_IOC_NR_GET_INTERRUPT,
+	ISP_IOC_NR_REQUEST_BUFFER,
+	ISP_IOC_NR_ENQUEUE_BUFFER,
+	ISP_IOC_NR_FLUSH_BUFFER,
+	ISP_IOC_NR_TRIGGER_CAPTURE,
+	ISP_IOC_NR_SET_SINGLE_REG,
+	ISP_IOC_NR_SET_END_FRAME_WORK,
+} ISP_IOC_NR_E;
+
+#define ISP_IOC_DEPLOY_DRV _IOWR(IOC_K1X_ISP_TYPE, ISP_IOC_NR_DEPLOY_DRV, struct isp_drv_deployment)
+#define ISP_IOC_UNDEPLOY_DRV _IOWR(IOC_K1X_ISP_TYPE, ISP_IOC_NR_UNDEPLOY_DRV, __u32)
+#define ISP_IOC_SET_REG _IOW(IOC_K1X_ISP_TYPE, ISP_IOC_NR_SET_REG, struct isp_regs_info)
+#define ISP_IOC_GET_REG _IOWR(IOC_K1X_ISP_TYPE, ISP_IOC_NR_GET_REG, struct isp_regs_info)
+#define ISP_IOC_SET_PDC _IOW(IOC_K1X_ISP_TYPE, ISP_IOC_NR_ENABLE_PDC, __u32)
+#define ISP_IOC_SET_JOB _IOW(IOC_K1X_ISP_TYPE, ISP_IOC_NR_SET_JOB, struct isp_job_describer)
+#define ISP_IOC_GET_INTERRUPT _IOWR(IOC_K1X_ISP_TYPE, ISP_IOC_NR_GET_INTERRUPT, struct isp_user_task_info)
+#define ISP_IOC_REQUEST_BUFFER _IOWR(IOC_K1X_ISP_TYPE, ISP_IOC_NR_REQUEST_BUFFER, struct isp_buffer_request_info)
+#define ISP_IOC_ENQUEUE_BUFFER _IOWR(IOC_K1X_ISP_TYPE, ISP_IOC_NR_ENQUEUE_BUFFER, struct isp_buffer_enqueue_info)
+#define ISP_IOC_FLUSH_BUFFER _IOWR(IOC_K1X_ISP_TYPE, ISP_IOC_NR_FLUSH_BUFFER, __u32)
+#define ISP_IOC_TRIGGER_CAPTURE _IOWR(IOC_K1X_ISP_TYPE, ISP_IOC_NR_TRIGGER_CAPTURE, struct isp_capture_package)
+#define ISP_IOC_SET_SINGLE_REG _IOW(IOC_K1X_ISP_TYPE, ISP_IOC_NR_SET_SINGLE_REG, struct isp_reg_unit)
+#define ISP_IOC_SET_END_FRAME_WORK _IOW(IOC_K1X_ISP_TYPE, ISP_IOC_NR_SET_END_FRAME_WORK, struct isp_endframe_work_info)
+#endif
diff --git a/include/uapi/media/k1x/k1x_media_bus_format.h b/include/uapi/media/k1x/k1x_media_bus_format.h
new file mode 100644
index 000000000000..111111111111
--- /dev/null
+++ b/include/uapi/media/k1x/k1x_media_bus_format.h
@@ -0,0 +1,45 @@
+/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
+/*
+ * k1x_videodev2 - Driver uapi for SPACEMIT K1X media bus format
+ *
+ * Copyright (C) 2019 SPACEMIT Micro Limited
+ */
+
+#ifndef __LINUX_K1X_MEDIA_BUS_FORMAT_H
+#define __LINUX_K1X_MEDIA_BUS_FORMAT_H
+
+#ifndef BIT
+#define BIT(nr)         (1 << (nr))
+#endif
+#define SPACEMIT_VI_SWITCH_FLAGS_SHIFT		(8)
+#define SPACEMIT_VI_FLAG_BACK_TO_PREVIEW	BIT(0)
+#define SPACEMIT_VI_FLAG_CLK_HIGH		BIT(1)
+#define SPACEMIT_VI_FLAG_FORCE_SW_GAP		BIT(2)
+#define SPACEMIT_VI_PRI_DATA_MASK		(0xff)
+#define SPACEMIT_VI_MIPI_LANE_MASK		(BIT(0) | BIT(1) | BIT(2))
+#define SPACEMIT_VI_SENSOR_ID_SHIFT		(3)
+#define SPACEMIT_VI_SENSOR_ID_MASK		(BIT(3) | BIT(4))
+
+#define MEDIA_BUS_FMT_UYVY10_1_5X10			0x3104
+#define MEDIA_BUS_FMT_VYUY10_1_5X10			0x3105
+#define MEDIA_BUS_FMT_YUYV10_1_5X10			0x3106
+#define MEDIA_BUS_FMT_YVYU10_1_5X10			0x3107
+//nv12 dwt
+#define MEDIA_BUS_FMT_YUYV10_1_5X10_D1		0x3108
+#define MEDIA_BUS_FMT_YUYV10_1_5X10_D2		0x3109
+#define MEDIA_BUS_FMT_YUYV10_1_5X10_D3		0x310A
+#define MEDIA_BUS_FMT_YUYV10_1_5X10_D4		0x310B
+//Bayer raw
+#define MEDIA_BUS_FMT_SRGB8_SPACEMITPACK_1X8				0x310C
+#define MEDIA_BUS_FMT_SRGB10_SPACEMITPACK_1X10			0x310D
+#define MEDIA_BUS_FMT_SRGB12_SPACEMITPACK_1X12			0x310E
+#define MEDIA_BUS_FMT_SRGB14_SPACEMITPACK_1X14			0x310F
+//afbc
+#define MEDIA_BUS_FMT_YUYV8_1_5X8_AFBC		0x3110
+//nv21 dwt
+#define MEDIA_BUS_FMT_YVYU10_1_5X10_D1		0x3111
+#define MEDIA_BUS_FMT_YVYU10_1_5X10_D2		0x3112
+#define MEDIA_BUS_FMT_YVYU10_1_5X10_D3		0x3113
+#define MEDIA_BUS_FMT_YVYU10_1_5X10_D4		0x3114
+
+#endif
diff --git a/include/uapi/media/k1x/k1x_plat_cam.h b/include/uapi/media/k1x/k1x_plat_cam.h
new file mode 100644
index 000000000000..111111111111
--- /dev/null
+++ b/include/uapi/media/k1x/k1x_plat_cam.h
@@ -0,0 +1,19 @@
+/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
+#ifndef _UAPI_K1X_PLAT_CAM_H
+#define _UAPI_K1X_PLAT_CAM_H
+
+#define PLAT_CAM_NAME "platform-cam"
+
+/*
+ * Base number ranges for k1x entity functions
+ * belong to either MEDIA_ENT_F_OLD_BASE or MEDIA_ENT_F_TUNER
+ * ranges
+ */
+#define MEDIA_ENT_F_K1X_BASE		0x00010000
+
+#define MEDIA_ENT_F_K1X_VI		(MEDIA_ENT_F_K1X_BASE + 0x1001)
+#define MEDIA_ENT_F_K1X_CPP		(MEDIA_ENT_F_K1X_BASE + 0x1002)
+#define MEDIA_ENT_F_K1X_VBE		(MEDIA_ENT_F_K1X_BASE + 0x1003)
+#define MEDIA_ENT_F_K1X_SENSOR	(MEDIA_ENT_F_K1X_BASE + 0x1004)
+
+#endif /* _UAPI_K1X_PLAT_CAM_H */
diff --git a/include/uapi/media/k1x/k1x_videodev2.h b/include/uapi/media/k1x/k1x_videodev2.h
new file mode 100644
index 000000000000..111111111111
--- /dev/null
+++ b/include/uapi/media/k1x/k1x_videodev2.h
@@ -0,0 +1,125 @@
+/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
+/*
+ * k1x_videodev2.h - Driver uapi for SPACEMIT K1X videvdev2
+ *
+ * Copyright (C) 2019 SPACEMIT Micro Limited
+ */
+
+#ifndef _UAPI_LINUX_K1X_VIDEODEV2_H_
+#define _UAPI_LINUX_K1X_VIDEODEV2_H_
+#include <linux/videodev2.h>
+
+/* afbc yuv */
+#define V4L2_PIX_FMT_NV12_AFBC	v4l2_fourcc('A', 'F', '1', '2')
+/* 10bit yuv */
+#define V4L2_PIX_FMT_Y210	v4l2_fourcc('Y', '2', '1', '0')
+#define V4L2_PIX_FMT_P210	v4l2_fourcc('P', '2', '1', '0')
+#define V4L2_PIX_FMT_P010	v4l2_fourcc('P', '0', '1', '0')
+#define V4L2_PIX_FMT_D010_1	v4l2_fourcc('D', '0', '1', '1')
+#define V4L2_PIX_FMT_D010_2	v4l2_fourcc('D', '0', '1', '2')
+#define V4L2_PIX_FMT_D010_3	v4l2_fourcc('D', '0', '1', '3')
+#define V4L2_PIX_FMT_D010_4	v4l2_fourcc('D', '0', '1', '4')
+#define V4L2_PIX_FMT_D210_1	v4l2_fourcc('D', '2', '1', '1')
+#define V4L2_PIX_FMT_D210_2	v4l2_fourcc('D', '2', '1', '2')
+#define V4L2_PIX_FMT_D210_3	v4l2_fourcc('D', '2', '1', '3')
+#define V4L2_PIX_FMT_D210_4	v4l2_fourcc('D', '2', '1', '4')
+/* Bayer raw spacemit packed */
+#define V4L2_PIX_FMT_SPACEMITGB8P	v4l2_fourcc('p', 'R', 'W', '8')
+#define V4L2_PIX_FMT_SPACEMITGB10P	v4l2_fourcc('p', 'R', 'W', 'A')
+#define V4L2_PIX_FMT_SPACEMITGB12P	v4l2_fourcc('p', 'R', 'W', 'C')
+#define V4L2_PIX_FMT_SPACEMITGB14P	v4l2_fourcc('p', 'R', 'W', 'E')
+
+#define V4L2_BUF_FLAG_IGNOR			(1 << 31)
+#define V4L2_BUF_FLAG_ERROR_HW		(1 << 30)
+#define V4L2_BUF_FLAG_IDI_OVERRUN	(1 << 29)
+#define V4L2_BUF_FLAG_SLICES_DONE	(1 << 28)
+#define V4L2_BUF_FLAG_CLOSE_DOWN	(1 << 27)
+#define V4l2_BUF_FLAG_FORCE_SHADOW	(1 << 26)
+#define V4L2_BUF_FLAG_ERROR_SW		(0)
+
+#define V4L2_VI_PORT_USAGE_SNAPSHOT			(1 << 0)
+
+struct v4l2_vi_port_cfg {
+	unsigned int port_entity_id;
+	unsigned int offset;
+	unsigned int depth;
+	unsigned int weight;
+	unsigned int div_mode;
+	unsigned int usage;
+};
+
+#define SPACEMIT_VI_ENTITY_NAME_LEN	(32)
+
+struct v4l2_vi_entity_info {
+	unsigned int id;
+	char name[SPACEMIT_VI_ENTITY_NAME_LEN];
+};
+
+struct v4l2_vi_dbg_reg {
+	unsigned int addr;
+	unsigned int value;
+	unsigned int mask;
+};
+
+struct v4l2_vi_input_interface {
+	unsigned int type;
+	unsigned int ccic_idx;
+	unsigned int ccic_trigger_line;
+};
+
+struct v4l2_vi_selection {
+	unsigned int pad;
+	struct v4l2_selection v4l2_sel;
+};
+
+enum {
+	VI_INPUT_INTERFACE_OFFLINE = 0,
+	VI_INPUT_INTERFACE_OFFLINE_SLICE,
+	VI_INPUT_INTERFACE_MIPI,
+};
+
+enum {
+	VI_PIPE_RESET_STAGE1 = 0,
+	VI_PIPE_RESET_STAGE2,
+	VI_PIPE_RESET_STAGE3,
+	VI_PIPE_RESET_STAGE_CNT,
+};
+
+struct v4l2_vi_bandwidth_info {
+	int rsum;
+	int wsum;
+};
+
+struct v4l2_vi_slice_info {
+	unsigned int timeout;
+	int slice_id;
+	int total_slice_cnt;
+};
+
+struct v4l2_vi_debug_dump {
+	int reason;
+};
+
+#define BASE_VIDIOC_VI			(BASE_VIDIOC_PRIVATE + 20)
+#define VIDIOC_GET_PIPELINE		_IO('V', BASE_VIDIOC_VI + 1)
+#define VIDIOC_PUT_PIPELINE		_IOW('V', BASE_VIDIOC_VI + 2, int)
+#define VIDIOC_APPLY_PIPELINE	_IO('V', BASE_VIDIOC_VI + 3)
+#define VIDIOC_START_PIPELINE	_IO('V', BASE_VIDIOC_VI + 4)
+#define VIDIOC_STOP_PIPELINE	_IO('V', BASE_VIDIOC_VI + 5)
+#define VIDIOC_S_PORT_CFG		_IOW('V', BASE_VIDIOC_VI + 6, struct v4l2_vi_port_cfg)
+#define VIDIOC_DBG_REG_WRITE	_IOWR('V', BASE_VIDIOC_VI + 7, struct v4l2_vi_dbg_reg)
+#define VIDIOC_DBG_REG_READ		_IOWR('V', BASE_VIDIOC_VI + 8, struct v4l2_vi_dbg_reg)
+#define VIDIOC_CFG_INPUT_INTF	_IOW('V', BASE_VIDIOC_VI + 9, struct v4l2_vi_input_interface)
+#define VIDIOC_RESET_PIPELINE	_IOW('V', BASE_VIDIOC_VI + 10, int)
+#define VIDIOC_G_PIPE_STATUS	_IOR('V', BASE_VIDIOC_VI + 11, unsigned int)
+#define VIDIOC_SET_SELECTION	_IOW('V', BASE_VIDIOC_VI + 12, struct v4l2_vi_selection)
+#define VIDIOC_G_SLICE_MODE		_IOR('V', BASE_VIDIOC_VI + 13, int)
+#define VIDIOC_QUERY_SLICE_READY	_IOWR('V', BASE_VIDIOC_VI + 14, struct v4l2_vi_slice_info)
+#define VIDIOC_S_SLICE_DONE		_IOW('V', BASE_VIDIOC_VI + 15, int)
+#define VIDIOC_GLOBAL_RESET		_IO('V', BASE_VIDIOC_VI + 16)
+#define VIDIOC_FLUSH_BUFFERS	_IO('V', BASE_VIDIOC_VI + 17)
+#define VIDIOC_CPU_Z1			_IOR('V', BASE_VIDIOC_VI + 18, int)
+#define VIDIOC_DEBUG_DUMP		_IOWR('V', BASE_VIDIOC_VI + 19, struct v4l2_vi_debug_dump)
+#define VIDIOC_S_BANDWIDTH		_IOW('V', BASE_VIDIOC_VI + 39, struct v4l2_vi_bandwidth_info)
+#define VIDIOC_G_ENTITY_INFO	_IOWR('V', BASE_VIDIOC_VI + 40, struct v4l2_vi_entity_info)
+#endif
-- 
Armbian