armbian_build/patch/kernel/archive/sunxi-5.16/patches.megous/drm-debugging-code.patch
The-going f80117f21c
Recycling of megous v5.16.4 patches (#3449)
* Recycling of megous v5.16.4 patches

The patches were sorted as far as possible. Some patches are renamed
according to their place of application. The length of the patch name
has been changed to improve readability using
the `git format-patch --filename-max-length=75` method.

The folder containing the patches will have the name `patches.name`
and the corresponding file `series.name` for the convenience
of processing and moving them upstream. But the control file remains
`series.conf`.


Signed-off-by: The-going <48602507+The-going@users.noreply.github.com>

* Add a series of armbian patches for 5.16

Signed-off-by: The-going <48602507+The-going@users.noreply.github.com>

* Remove patches whose fixes are already in the kernel

Signed-off-by: The-going <48602507+The-going@users.noreply.github.com>
2022-02-02 11:03:44 +01:00

138 lines
4.8 KiB
Diff

From 6942ce22da7b43eabf29199ac1cbb3f37965255f Mon Sep 17 00:00:00 2001
From: Ondrej Jirman <megous@megous.com>
Date: Wed, 3 Jun 2020 11:06:05 +0200
Subject: [PATCH 149/446] drm debugging code
---
drivers/gpu/drm/sun4i/sun8i_ui_layer.c | 14 ++++++++++++++
drivers/gpu/drm/sun4i/sun8i_vi_layer.c | 22 ++++++++++++++++++++++
2 files changed, 36 insertions(+)
diff --git a/drivers/gpu/drm/sun4i/sun8i_ui_layer.c b/drivers/gpu/drm/sun4i/sun8i_ui_layer.c
index ccbf36800..9c2afbfd5 100644
--- a/drivers/gpu/drm/sun4i/sun8i_ui_layer.c
+++ b/drivers/gpu/drm/sun4i/sun8i_ui_layer.c
@@ -29,6 +29,7 @@ static void sun8i_ui_layer_enable(struct sun8i_mixer *mixer, int channel,
{
u32 val, bld_base, ch_base;
unsigned int old_pipe_ch;
+ unsigned tmp;
bld_base = sun8i_blender_base(mixer);
ch_base = sun8i_channel_base(mixer, channel);
@@ -101,6 +102,10 @@ static void sun8i_ui_layer_enable(struct sun8i_mixer *mixer, int channel,
DRM_DEBUG_DRIVER(" enable pipe %d <- ch %d\n", zpos, channel);
}
+
+ regmap_read(mixer->engine.regs,
+ SUN8I_MIXER_CHAN_UI_LAYER_ATTR(ch_base, overlay), &tmp);
+ DRM_DEBUG_DRIVER(" post-en-dis %08x\n", tmp);
}
static void sun8i_ui_layer_update_alpha(struct sun8i_mixer *mixer, int channel,
@@ -228,6 +233,7 @@ static int sun8i_ui_layer_update_formats(struct sun8i_mixer *mixer, int channel,
struct drm_plane_state *state = plane->state;
const struct drm_format_info *fmt;
u32 val, ch_base, hw_fmt;
+ unsigned tmp;
int ret;
ch_base = sun8i_channel_base(mixer, channel);
@@ -239,11 +245,19 @@ static int sun8i_ui_layer_update_formats(struct sun8i_mixer *mixer, int channel,
return -EINVAL;
}
+ regmap_read(mixer->engine.regs,
+ SUN8I_MIXER_CHAN_UI_LAYER_ATTR(ch_base, overlay), &tmp);
+ DRM_DEBUG_DRIVER(" pre-format %08x\n", tmp);
+
val = hw_fmt << SUN8I_MIXER_CHAN_UI_LAYER_ATTR_FBFMT_OFFSET;
regmap_update_bits(mixer->engine.regs,
SUN8I_MIXER_CHAN_UI_LAYER_ATTR(ch_base, overlay),
SUN8I_MIXER_CHAN_UI_LAYER_ATTR_FBFMT_MASK, val);
+ regmap_read(mixer->engine.regs,
+ SUN8I_MIXER_CHAN_UI_LAYER_ATTR(ch_base, overlay), &tmp);
+ DRM_DEBUG_DRIVER(" post-format %08x\n", tmp);
+
return 0;
}
diff --git a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c b/drivers/gpu/drm/sun4i/sun8i_vi_layer.c
index 7d20fe583..cd394b883 100644
--- a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c
+++ b/drivers/gpu/drm/sun4i/sun8i_vi_layer.c
@@ -23,6 +23,7 @@ static void sun8i_vi_layer_enable(struct sun8i_mixer *mixer, int channel,
{
u32 val, bld_base, ch_base;
unsigned int old_pipe_ch;
+ unsigned tmp;
bld_base = sun8i_blender_base(mixer);
ch_base = sun8i_channel_base(mixer, channel);
@@ -95,6 +96,10 @@ static void sun8i_vi_layer_enable(struct sun8i_mixer *mixer, int channel,
DRM_DEBUG_DRIVER(" enable pipe %d <- ch %d\n", zpos, channel);
}
+
+ regmap_read(mixer->engine.regs,
+ SUN8I_MIXER_CHAN_VI_LAYER_ATTR(ch_base, overlay), &tmp);
+ DRM_DEBUG_DRIVER(" post-en-dis %08x\n", tmp);
}
static void sun8i_vi_layer_update_alpha(struct sun8i_mixer *mixer, int channel,
@@ -294,6 +299,7 @@ static int sun8i_vi_layer_update_formats(struct sun8i_mixer *mixer, int channel,
struct drm_plane_state *state = plane->state;
u32 val, ch_base, csc_mode, hw_fmt;
const struct drm_format_info *fmt;
+ unsigned tmp;
int ret;
ch_base = sun8i_channel_base(mixer, channel);
@@ -305,11 +311,19 @@ static int sun8i_vi_layer_update_formats(struct sun8i_mixer *mixer, int channel,
return ret;
}
+ regmap_read(mixer->engine.regs,
+ SUN8I_MIXER_CHAN_VI_LAYER_ATTR(ch_base, overlay), &tmp);
+ DRM_DEBUG_DRIVER(" pre-format %08x\n", tmp);
+
val = hw_fmt << SUN8I_MIXER_CHAN_VI_LAYER_ATTR_FBFMT_OFFSET;
regmap_update_bits(mixer->engine.regs,
SUN8I_MIXER_CHAN_VI_LAYER_ATTR(ch_base, overlay),
SUN8I_MIXER_CHAN_VI_LAYER_ATTR_FBFMT_MASK, val);
+ regmap_read(mixer->engine.regs,
+ SUN8I_MIXER_CHAN_VI_LAYER_ATTR(ch_base, overlay), &tmp);
+ DRM_DEBUG_DRIVER(" mid1-format %08x\n", tmp);
+
csc_mode = sun8i_vi_layer_get_csc_mode(fmt);
if (csc_mode != SUN8I_CSC_MODE_OFF) {
sun8i_csc_set_ccsc_coefficients(mixer, channel, csc_mode,
@@ -320,6 +334,10 @@ static int sun8i_vi_layer_update_formats(struct sun8i_mixer *mixer, int channel,
sun8i_csc_enable_ccsc(mixer, channel, false);
}
+ regmap_read(mixer->engine.regs,
+ SUN8I_MIXER_CHAN_VI_LAYER_ATTR(ch_base, overlay), &tmp);
+ DRM_DEBUG_DRIVER(" mid2-format %08x\n", tmp);
+
if (!fmt->is_yuv)
val = SUN8I_MIXER_CHAN_VI_LAYER_ATTR_RGB_MODE;
else
@@ -329,6 +347,10 @@ static int sun8i_vi_layer_update_formats(struct sun8i_mixer *mixer, int channel,
SUN8I_MIXER_CHAN_VI_LAYER_ATTR(ch_base, overlay),
SUN8I_MIXER_CHAN_VI_LAYER_ATTR_RGB_MODE, val);
+ regmap_read(mixer->engine.regs,
+ SUN8I_MIXER_CHAN_VI_LAYER_ATTR(ch_base, overlay), &tmp);
+ DRM_DEBUG_DRIVER(" post-format %08x\n", tmp);
+
return 0;
}
--
2.31.1