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fa9302f162
* Fix wifi drivers on kernel v6.16 These patches can get deleted after merged upstream. * initial commit * fix header * remove ssv6051 driver --------- Co-authored-by: amazingfate <liujianfeng1994@gmail.com>
83 lines
2.5 KiB
Diff
83 lines
2.5 KiB
Diff
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
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From: Paolo Sabatino <paolo.sabatino@gmail.com>
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Date: Sun, 21 Jul 2024 14:18:30 +0200
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Subject: add missing i2s controllers
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---
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arch/arm64/boot/dts/rockchip/rk3308.dtsi | 59 ++++++++++
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1 file changed, 59 insertions(+)
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diff --git a/arch/arm64/boot/dts/rockchip/rk3308.dtsi b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
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index 111111111111..222222222222 100644
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--- a/arch/arm64/boot/dts/rockchip/rk3308.dtsi
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+++ b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
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@@ -608,6 +608,65 @@ dmac1: dma-controller@ff2d0000 {
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#dma-cells = <1>;
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};
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+ i2s_8ch_0: i2s@ff300000 {
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+ compatible = "rockchip,rk3308-i2s-tdm";
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+ reg = <0x0 0xff300000 0x0 0x1000>;
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+ interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
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+ clocks = <&cru SCLK_I2S0_8CH_TX>, <&cru SCLK_I2S0_8CH_RX>, <&cru HCLK_I2S0_8CH>,
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+ <&cru SCLK_I2S0_8CH_TX_SRC>,
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+ <&cru SCLK_I2S0_8CH_RX_SRC>,
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+ <&cru PLL_VPLL0>,
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+ <&cru PLL_VPLL1>;
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+ clock-names = "mclk_tx", "mclk_rx", "hclk",
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+ "mclk_tx_src", "mclk_rx_src",
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+ "mclk_root0", "mclk_root1";
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+ dmas = <&dmac1 0>, <&dmac1 1>;
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+ dma-names = "tx", "rx";
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+ resets = <&cru SRST_I2S0_8CH_TX_M>, <&cru SRST_I2S0_8CH_RX_M>;
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+ reset-names = "tx-m", "rx-m";
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+ rockchip,cru = <&cru>;
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+ rockchip,grf = <&grf>;
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+ rockchip,mclk-calibrate;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&i2s_8ch_0_sclktx
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+ &i2s_8ch_0_sclkrx
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+ &i2s_8ch_0_lrcktx
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+ &i2s_8ch_0_lrckrx
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+ &i2s_8ch_0_sdi0
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+ &i2s_8ch_0_sdi1
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+ &i2s_8ch_0_sdi2
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+ &i2s_8ch_0_sdi3
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+ &i2s_8ch_0_sdo0
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+ &i2s_8ch_0_sdo1
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+ &i2s_8ch_0_sdo2
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+ &i2s_8ch_0_sdo3
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+ &i2s_8ch_0_mclk>;
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+ status = "disabled";
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+ };
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+
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+ i2s_8ch_1: i2s@ff310000 {
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+ compatible = "rockchip,rk3308-i2s-tdm";
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+ reg = <0x0 0xff310000 0x0 0x1000>;
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+ interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
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+ clocks = <&cru SCLK_I2S1_8CH_TX>, <&cru SCLK_I2S1_8CH_RX>, <&cru HCLK_I2S1_8CH>,
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+ <&cru SCLK_I2S1_8CH_TX_SRC>,
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+ <&cru SCLK_I2S1_8CH_RX_SRC>,
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+ <&cru PLL_VPLL0>,
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+ <&cru PLL_VPLL1>;
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+ clock-names = "mclk_tx", "mclk_rx", "hclk",
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+ "mclk_tx_src", "mclk_rx_src",
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+ "mclk_root0", "mclk_root1";
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+ dmas = <&dmac1 2>, <&dmac1 3>;
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+ dma-names = "tx", "rx";
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+ resets = <&cru SRST_I2S1_8CH_TX_M>, <&cru SRST_I2S1_8CH_RX_M>;
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+ reset-names = "tx-m", "rx-m";
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+ rockchip,cru = <&cru>;
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+ rockchip,grf = <&grf>;
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+ rockchip,mclk-calibrate;
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+ rockchip,io-multiplex;
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+ status = "disabled";
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+ };
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+
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/*
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* - can be clock producer or consumer
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* - up to 8 capture channels and 2 playback channels
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--
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Armbian
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