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57 lines
1.7 KiB
Diff
57 lines
1.7 KiB
Diff
From ee7c3ab6b5a4d284a04f110792508a7f8decd7f7 Mon Sep 17 00:00:00 2001
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From: William Wu <william.wu@rock-chips.com>
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Date: Tue, 6 Dec 2022 14:45:54 +0800
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Subject: [PATCH] usb: dwc2: fix waiting time for host only mode
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The current code uses 50ms sleep to wait for host only
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mode, the delay time is not enough for some Rockchip
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platforms (e.g RK3036G EVB1).
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Test on RK3036G EVB1, the dwc2 host only controller reg
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GOTGCTL.ConIDSts = 1'b1 (device mode) if only wait for
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50ms. And the host fails to detect usb2 device with the
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following error log:
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usb usb2-port1: connect-debounce failed
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This patch checks the GOTGCTL.ConIDSts for host only
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mode and increases the maximum waiting time to 200ms.
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Signed-off-by: William Wu <william.wu@rock-chips.com>
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Change-Id: Ie28299934aba09907ea08f5fd3b34bf2fb35822e
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---
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drivers/usb/dwc2/core.c | 14 ++++++++++++--
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1 file changed, 12 insertions(+), 2 deletions(-)
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diff --git a/drivers/usb/dwc2/core.c b/drivers/usb/dwc2/core.c
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index 15911ac7582b4..cbd5f1142f35e 100644
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--- a/drivers/usb/dwc2/core.c
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+++ b/drivers/usb/dwc2/core.c
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@@ -656,14 +656,24 @@ static void dwc2_clear_force_mode(struct dwc2_hsotg *hsotg)
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*/
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void dwc2_force_dr_mode(struct dwc2_hsotg *hsotg)
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{
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+ u32 count = 0;
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+
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switch (hsotg->dr_mode) {
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case USB_DR_MODE_HOST:
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/*
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* NOTE: This is required for some rockchip soc based
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* platforms on their host-only dwc2.
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*/
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- if (!dwc2_hw_is_otg(hsotg))
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- msleep(50);
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+ if (!dwc2_hw_is_otg(hsotg)) {
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+ while (dwc2_readl(hsotg, GOTGCTL) & GOTGCTL_CONID_B) {
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+ msleep(20);
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+ if (++count > 10)
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+ break;
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+ }
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+ if (count > 10)
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+ dev_err(hsotg->dev,
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+ "Waiting for Host Mode timed out");
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+ }
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break;
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case USB_DR_MODE_PERIPHERAL:
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