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AR-1 - Adding support category for distributions AR-4 - Remove Allwinner legacy AR-5 - Drop Udoo family and move Udoo board into newly created imx6 family AR-9 - Rename sunxi-next to sunxi-legacy AR-10 - Rename sunxi-dev to sunxi-current AR-11 - Adding Radxa Rockpi S support AR-13 - Rename rockchip64-default to rockchip64-legacy AR-14 - Add rockchip64-current as mainline source AR-15 - Drop Rockchip 4.19.y NEXT, current become 5.3.y AR-16 - Rename RK3399 default to legacy AR-17 - Rename Odroid XU4 next and default to legacy 4.14.y, add DEV 5.4.y AR-18 - Add Odroid N2 current mainline AR-19 - Move Odroid C1 to meson family AR-20 - Rename mvebu64-default to mvebu64-legacy AR-21 - Rename mvebu-default to mvebu-legacy AR-22 - Rename mvebu-next to mvebu-current AR-23 - Drop meson64 default and next, current becomes former DEV 5.3.y AR-24 - Drop cubox family and move Cubox/Hummingboard boards under imx6 AR-26 - Adjust motd AR-27 - Enabling distribution release status AR-28 - Added new GCC compilers AR-29 - Implementing Ubuntu Eoan AR-30 - Add desktop packages per board or family AR-31 - Remove (Ubuntu/Debian) distribution name from image filename AR-32 - Move arch configs from configuration.sh to separate arm64 and armhf config files AR-33 - Revision numbers for beta builds changed to day_in_the_year AR-34 - Patches support linked patches AR-35 - Break meson64 family into gxbb and gxl AR-36 - Add Nanopineo2 Black AR-38 - Upgrade option from old branches to new one via armbian-config AR-41 - Show full timezone info AR-43 - Merge Odroid N2 to meson64 AR-44 - Enable FORCE_BOOTSCRIPT_UPDATE for all builds
60 lines
2.3 KiB
Diff
60 lines
2.3 KiB
Diff
Subject: [PATCH v2 1/3] mmc: sunxi: Disable HS-DDR mode for H5 eMMC controller by default
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Some H5 boards seem to not have proper trace lengths for eMMC to be able
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to use the default setting for the delay chains under HS-DDR mode. These
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include the Bananapi M2+ H5 and NanoPi NEO Core2. However the Libre
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Computer ALL-H3-CC-H5 works just fine.
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For the H5 (at least for now), default to not enabling HS-DDR modes in
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the driver, and expect the device tree to signal HS-DDR capability on
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boards that work.
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---
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drivers/mmc/host/sunxi-mmc.c | 11 ++++++++++-
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1 file changed, 10 insertions(+), 1 deletion(-)
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diff --git a/drivers/mmc/host/sunxi-mmc.c b/drivers/mmc/host/sunxi-mmc.c
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index 279e326e397e..7415af8c8ff6 100644
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--- a/drivers/mmc/host/sunxi-mmc.c
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+++ b/drivers/mmc/host/sunxi-mmc.c
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@@ -1399,7 +1399,16 @@ static int sunxi_mmc_probe(struct platform_device *pdev)
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mmc->caps |= MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
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MMC_CAP_ERASE | MMC_CAP_SDIO_IRQ;
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- if (host->cfg->clk_delays || host->use_new_timings)
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+ /*
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+ * Some H5 devices do not have signal traces precise enough to
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+ * use HS DDR mode for their eMMC chips.
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+ *
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+ * We still enable HS DDR modes for all the other controller
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+ * variants that support them.
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+ */
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+ if ((host->cfg->clk_delays || host->use_new_timings) &&
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+ !of_device_is_compatible(pdev->dev.of_node,
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+ "allwinner,sun50i-h5-emmc"))
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mmc->caps |= MMC_CAP_1_8V_DDR | MMC_CAP_3_3V_DDR;
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ret = mmc_of_parse(mmc);
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Subject: [PATCH v2 3/3] arm64: dts: allwinner: h5: libretech-all-h3-cc: Mark eMMC HS-DDR 3.3V capable
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The Libre Computer ALL-H3-CC H5 is one of the few boards that can have
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its eMMC run at HS-DDR speed mode. Mark it as such.
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Signed-off-by: Chen-Yu Tsai <wens@csie.org>
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---
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.../boot/dts/allwinner/sun50i-h5-libretech-all-h3-cc.dts | 4 ++++
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1 file changed, 4 insertions(+)
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diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-libretech-all-h3-cc.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-libretech-all-h3-cc.dts
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index 95e113ce8699..d68bdfea2271 100644
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--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-libretech-all-h3-cc.dts
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+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-libretech-all-h3-cc.dts
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@@ -12,3 +12,7 @@
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model = "Libre Computer Board ALL-H3-CC H5";
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compatible = "libretech,all-h3-cc-h5", "allwinner,sun50i-h5";
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};
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+
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+&mmc2 {
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+ mmc-ddr-3_3v;
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+};
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