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* sunxi-6.0: initial state: add megous patches to series * sunxi-6.0: Switch to v6.0.1 * wifi: Limit the version 6.0 for Realtek 88x2cs chipsets * Adjust kernel configs * Remove not needed patches * Adjust broken patches Co-authored-by: Igor <igor@armbian.com>
52 lines
1.9 KiB
Diff
52 lines
1.9 KiB
Diff
From 45200e022b178a20a2550f147ec04872fe56d5a6 Mon Sep 17 00:00:00 2001
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From: Chia-Yuan Li <leo.li@realtek.com>
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Date: Mon, 4 Jul 2022 10:34:53 +0800
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Subject: [PATCH 411/486] rtw89: 8852c: adjust mactxen delay of mac/phy
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interface
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mac_txen time is to inform TMAC tx after rx air end.
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Modify 8852c value to meet TB SIFS time.
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Signed-off-by: Chia-Yuan Li <leo.li@realtek.com>
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Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
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Signed-off-by: Kalle Valo <kvalo@kernel.org>
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Link: https://lore.kernel.org/r/20220704023453.19935-7-pkshih@realtek.com
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---
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drivers/net/wireless/realtek/rtw89/mac.c | 7 ++++++-
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drivers/net/wireless/realtek/rtw89/reg.h | 1 +
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2 files changed, 7 insertions(+), 1 deletion(-)
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diff --git a/drivers/net/wireless/realtek/rtw89/mac.c b/drivers/net/wireless/realtek/rtw89/mac.c
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index cc6e7e37c..e2ff1b1cf 100644
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--- a/drivers/net/wireless/realtek/rtw89/mac.c
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+++ b/drivers/net/wireless/realtek/rtw89/mac.c
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@@ -1754,7 +1754,12 @@ static int scheduler_init(struct rtw89_dev *rtwdev, u8 mac_idx)
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return ret;
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reg = rtw89_mac_reg_by_idx(R_AX_PREBKF_CFG_1, mac_idx);
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- rtw89_write32_mask(rtwdev, reg, B_AX_SIFS_MACTXEN_T1_MASK, SIFS_MACTXEN_T1);
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+ if (rtwdev->chip->chip_id == RTL8852C)
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+ rtw89_write32_mask(rtwdev, reg, B_AX_SIFS_MACTXEN_T1_MASK,
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+ SIFS_MACTXEN_T1_V1);
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+ else
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+ rtw89_write32_mask(rtwdev, reg, B_AX_SIFS_MACTXEN_T1_MASK,
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+ SIFS_MACTXEN_T1);
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if (rtwdev->chip->chip_id == RTL8852B) {
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reg = rtw89_mac_reg_by_idx(R_AX_SCH_EXT_CTRL, mac_idx);
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diff --git a/drivers/net/wireless/realtek/rtw89/reg.h b/drivers/net/wireless/realtek/rtw89/reg.h
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index 098075aa6..1f04e6cad 100644
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--- a/drivers/net/wireless/realtek/rtw89/reg.h
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+++ b/drivers/net/wireless/realtek/rtw89/reg.h
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@@ -1877,6 +1877,7 @@
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#define B_AX_SIFS_TIMEOUT_T2_MASK GENMASK(14, 8)
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#define B_AX_SIFS_MACTXEN_T1_MASK GENMASK(6, 0)
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#define SIFS_MACTXEN_T1 0x47
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+#define SIFS_MACTXEN_T1_V1 0x41
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#define R_AX_CCA_CFG_0 0xC340
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#define R_AX_CCA_CFG_0_C1 0xE340
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--
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2.35.3
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