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33c413c679
* Rework patches for sunxi 5.15.4
* Rework patches sunxi for 5.15.5
* Kernel switch tag=v5.15.5 for sunxi EDGE
* Temporarily disabled, requires rework.
drivers/clk/sunxi-ng/sun8i-de33.c: In function ‘sunxi_de33_clk_probe’:
drivers/clk/sunxi-ng/sun8i-de33.c:155:8:
error: implicit declaration of function ‘sunxi_ccu_probe’;
did you mean ‘of_sunxi_ccu_probe’? [-Werror=implicit-function-declarati>
ret = sunxi_ccu_probe(pdev->dev.of_node, reg, ccu_desc);
^~~~~~~~~~~~~~~
of_sunxi_ccu_probe
cc1: some warnings being treated as errors
make[3]: *** [scripts/Makefile.build:277:
drivers/clk/sunxi-ng/sun8i-de33.o] Error 1
make[2]: *** [scripts/Makefile.build:540: drivers/clk/sunxi-ng] Error 2
* Correct the comment.
138 lines
4.8 KiB
Diff
138 lines
4.8 KiB
Diff
From ca89b8a90eb439a38b8db643f6de2204826ef4be Mon Sep 17 00:00:00 2001
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From: Ondrej Jirman <megous@megous.com>
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Date: Wed, 3 Jun 2020 11:06:05 +0200
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Subject: [PATCH 311/467] drm debugging code
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---
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drivers/gpu/drm/sun4i/sun8i_ui_layer.c | 14 ++++++++++++++
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drivers/gpu/drm/sun4i/sun8i_vi_layer.c | 22 ++++++++++++++++++++++
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2 files changed, 36 insertions(+)
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diff --git a/drivers/gpu/drm/sun4i/sun8i_ui_layer.c b/drivers/gpu/drm/sun4i/sun8i_ui_layer.c
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index ccbf36800..9c2afbfd5 100644
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--- a/drivers/gpu/drm/sun4i/sun8i_ui_layer.c
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+++ b/drivers/gpu/drm/sun4i/sun8i_ui_layer.c
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@@ -29,6 +29,7 @@ static void sun8i_ui_layer_enable(struct sun8i_mixer *mixer, int channel,
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{
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u32 val, bld_base, ch_base;
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unsigned int old_pipe_ch;
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+ unsigned tmp;
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bld_base = sun8i_blender_base(mixer);
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ch_base = sun8i_channel_base(mixer, channel);
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@@ -101,6 +102,10 @@ static void sun8i_ui_layer_enable(struct sun8i_mixer *mixer, int channel,
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DRM_DEBUG_DRIVER(" enable pipe %d <- ch %d\n", zpos, channel);
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}
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+
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+ regmap_read(mixer->engine.regs,
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+ SUN8I_MIXER_CHAN_UI_LAYER_ATTR(ch_base, overlay), &tmp);
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+ DRM_DEBUG_DRIVER(" post-en-dis %08x\n", tmp);
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}
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static void sun8i_ui_layer_update_alpha(struct sun8i_mixer *mixer, int channel,
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@@ -228,6 +233,7 @@ static int sun8i_ui_layer_update_formats(struct sun8i_mixer *mixer, int channel,
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struct drm_plane_state *state = plane->state;
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const struct drm_format_info *fmt;
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u32 val, ch_base, hw_fmt;
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+ unsigned tmp;
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int ret;
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ch_base = sun8i_channel_base(mixer, channel);
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@@ -239,11 +245,19 @@ static int sun8i_ui_layer_update_formats(struct sun8i_mixer *mixer, int channel,
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return -EINVAL;
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}
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+ regmap_read(mixer->engine.regs,
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+ SUN8I_MIXER_CHAN_UI_LAYER_ATTR(ch_base, overlay), &tmp);
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+ DRM_DEBUG_DRIVER(" pre-format %08x\n", tmp);
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+
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val = hw_fmt << SUN8I_MIXER_CHAN_UI_LAYER_ATTR_FBFMT_OFFSET;
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regmap_update_bits(mixer->engine.regs,
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SUN8I_MIXER_CHAN_UI_LAYER_ATTR(ch_base, overlay),
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SUN8I_MIXER_CHAN_UI_LAYER_ATTR_FBFMT_MASK, val);
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+ regmap_read(mixer->engine.regs,
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+ SUN8I_MIXER_CHAN_UI_LAYER_ATTR(ch_base, overlay), &tmp);
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+ DRM_DEBUG_DRIVER(" post-format %08x\n", tmp);
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+
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return 0;
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}
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diff --git a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c b/drivers/gpu/drm/sun4i/sun8i_vi_layer.c
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index 7d20fe583..cd394b883 100644
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--- a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c
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+++ b/drivers/gpu/drm/sun4i/sun8i_vi_layer.c
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@@ -23,6 +23,7 @@ static void sun8i_vi_layer_enable(struct sun8i_mixer *mixer, int channel,
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{
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u32 val, bld_base, ch_base;
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unsigned int old_pipe_ch;
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+ unsigned tmp;
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bld_base = sun8i_blender_base(mixer);
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ch_base = sun8i_channel_base(mixer, channel);
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@@ -95,6 +96,10 @@ static void sun8i_vi_layer_enable(struct sun8i_mixer *mixer, int channel,
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DRM_DEBUG_DRIVER(" enable pipe %d <- ch %d\n", zpos, channel);
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}
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+
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+ regmap_read(mixer->engine.regs,
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+ SUN8I_MIXER_CHAN_VI_LAYER_ATTR(ch_base, overlay), &tmp);
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+ DRM_DEBUG_DRIVER(" post-en-dis %08x\n", tmp);
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}
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static void sun8i_vi_layer_update_alpha(struct sun8i_mixer *mixer, int channel,
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@@ -294,6 +299,7 @@ static int sun8i_vi_layer_update_formats(struct sun8i_mixer *mixer, int channel,
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struct drm_plane_state *state = plane->state;
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u32 val, ch_base, csc_mode, hw_fmt;
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const struct drm_format_info *fmt;
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+ unsigned tmp;
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int ret;
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ch_base = sun8i_channel_base(mixer, channel);
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@@ -305,11 +311,19 @@ static int sun8i_vi_layer_update_formats(struct sun8i_mixer *mixer, int channel,
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return ret;
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}
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+ regmap_read(mixer->engine.regs,
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+ SUN8I_MIXER_CHAN_VI_LAYER_ATTR(ch_base, overlay), &tmp);
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+ DRM_DEBUG_DRIVER(" pre-format %08x\n", tmp);
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+
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val = hw_fmt << SUN8I_MIXER_CHAN_VI_LAYER_ATTR_FBFMT_OFFSET;
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regmap_update_bits(mixer->engine.regs,
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SUN8I_MIXER_CHAN_VI_LAYER_ATTR(ch_base, overlay),
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SUN8I_MIXER_CHAN_VI_LAYER_ATTR_FBFMT_MASK, val);
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+ regmap_read(mixer->engine.regs,
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+ SUN8I_MIXER_CHAN_VI_LAYER_ATTR(ch_base, overlay), &tmp);
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+ DRM_DEBUG_DRIVER(" mid1-format %08x\n", tmp);
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+
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csc_mode = sun8i_vi_layer_get_csc_mode(fmt);
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if (csc_mode != SUN8I_CSC_MODE_OFF) {
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sun8i_csc_set_ccsc_coefficients(mixer, channel, csc_mode,
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@@ -320,6 +334,10 @@ static int sun8i_vi_layer_update_formats(struct sun8i_mixer *mixer, int channel,
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sun8i_csc_enable_ccsc(mixer, channel, false);
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}
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+ regmap_read(mixer->engine.regs,
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+ SUN8I_MIXER_CHAN_VI_LAYER_ATTR(ch_base, overlay), &tmp);
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+ DRM_DEBUG_DRIVER(" mid2-format %08x\n", tmp);
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+
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if (!fmt->is_yuv)
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val = SUN8I_MIXER_CHAN_VI_LAYER_ATTR_RGB_MODE;
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else
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@@ -329,6 +347,10 @@ static int sun8i_vi_layer_update_formats(struct sun8i_mixer *mixer, int channel,
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SUN8I_MIXER_CHAN_VI_LAYER_ATTR(ch_base, overlay),
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SUN8I_MIXER_CHAN_VI_LAYER_ATTR_RGB_MODE, val);
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+ regmap_read(mixer->engine.regs,
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+ SUN8I_MIXER_CHAN_VI_LAYER_ATTR(ch_base, overlay), &tmp);
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+ DRM_DEBUG_DRIVER(" post-format %08x\n", tmp);
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+
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return 0;
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}
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--
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2.34.0
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