From bc9d823972c1ac66b0f4a4cd9ec35f7b1a3ca1dc Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Fri, 13 Mar 2020 09:44:50 +0000 Subject: [PATCH 063/100] WIP: drm/panfrost: add support for custom soft-reset on Amlogic G12 Signed-off-by: Neil Armstrong --- drivers/gpu/drm/panfrost/panfrost_gpu.c | 13 ++++++++++++- drivers/gpu/drm/panfrost/panfrost_regs.h | 4 ++++ 2 files changed, 16 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/panfrost/panfrost_gpu.c b/drivers/gpu/drm/panfrost/panfrost_gpu.c index e0f190e43813..40cd9728ccbd 100644 --- a/drivers/gpu/drm/panfrost/panfrost_gpu.c +++ b/drivers/gpu/drm/panfrost/panfrost_gpu.c @@ -9,8 +9,10 @@ #include #include #include +#include #include #include +#include #include "panfrost_device.h" #include "panfrost_features.h" @@ -60,7 +62,16 @@ int panfrost_gpu_soft_reset(struct panfrost_device *pfdev) gpu_write(pfdev, GPU_INT_MASK, 0); gpu_write(pfdev, GPU_INT_CLEAR, GPU_IRQ_RESET_COMPLETED); - gpu_write(pfdev, GPU_CMD, GPU_CMD_SOFT_RESET); + + if (of_device_is_compatible(pfdev->dev->of_node, "amlogic,meson-g12a-mali")) { + reset_control_assert(pfdev->rstc); + udelay(10); + reset_control_deassert(pfdev->rstc); + + gpu_write(pfdev, GPU_PWR_KEY, 0x2968A819); + gpu_write(pfdev, GPU_PWR_OVERRIDE1, 0xfff | (0x20 << 16)); + } else + gpu_write(pfdev, GPU_CMD, GPU_CMD_SOFT_RESET); ret = readl_relaxed_poll_timeout(pfdev->iomem + GPU_INT_RAWSTAT, val, val & GPU_IRQ_RESET_COMPLETED, 100, 10000); diff --git a/drivers/gpu/drm/panfrost/panfrost_regs.h b/drivers/gpu/drm/panfrost/panfrost_regs.h index ea38ac60581c..4f4ed17d0262 100644 --- a/drivers/gpu/drm/panfrost/panfrost_regs.h +++ b/drivers/gpu/drm/panfrost/panfrost_regs.h @@ -51,6 +51,10 @@ #define GPU_STATUS 0x34 #define GPU_STATUS_PRFCNT_ACTIVE BIT(2) #define GPU_LATEST_FLUSH_ID 0x38 +#define GPU_PWR_KEY 0x050 /* (WO) Power manager key register */ +#define GPU_PWR_OVERRIDE0 0x054 /* (RW) Power manager override settings */ +#define GPU_PWR_OVERRIDE1 0x058 /* (RW) Power manager override settings */ + #define GPU_FAULT_STATUS 0x3C #define GPU_FAULT_ADDRESS_LO 0x40 #define GPU_FAULT_ADDRESS_HI 0x44 -- 2.25.1