From 2d49e99980ac3e0ccecb445d5ae3db5883fff5d6 Mon Sep 17 00:00:00 2001 From: Paolo Sabatino Date: Sun, 13 Mar 2022 18:24:24 +0000 Subject: [PATCH] first rknand iteration --- drivers/Kconfig | 3 + drivers/Makefile | 1 + drivers/rk_nand/Kconfig | 10 + drivers/rk_nand/Makefile | 11 + drivers/rk_nand/rk_ftl_api.h | 41 + drivers/rk_nand/rk_ftl_arm_v7.S | 30165 +++++++++++++ drivers/rk_nand/rk_ftl_arm_v7_thumb.S | 30192 +++++++++++++ drivers/rk_nand/rk_ftl_arm_v8.S | 27968 ++++++++++++ drivers/rk_nand/rk_ftlv5_arm32.S | 27612 ++++++++++++ drivers/rk_nand/rk_ftlv5_arm64.S | 25632 +++++++++++ drivers/rk_nand/rk_helpers.S | 54 + drivers/rk_nand/rk_helpers.c | 26 + drivers/rk_nand/rk_nand_base.c | 456 + drivers/rk_nand/rk_nand_base.h | 46 + drivers/rk_nand/rk_nand_blk.c | 626 + drivers/rk_nand/rk_nand_blk.h | 67 + drivers/rk_nand/rk_zftl_arm32.S | 37095 ++++++++++++++++ drivers/rk_nand/rk_zftl_arm64.S | 35207 +++++++++++++++ .../linux/soc/rockchip/rk_vendor_storage.h | 58 + 19 files changed, 215270 insertions(+) create mode 100644 drivers/rk_nand/Kconfig create mode 100644 drivers/rk_nand/Makefile create mode 100644 drivers/rk_nand/rk_ftl_api.h create mode 100644 drivers/rk_nand/rk_ftl_arm_v7.S create mode 100644 drivers/rk_nand/rk_ftl_arm_v7_thumb.S create mode 100644 drivers/rk_nand/rk_ftl_arm_v8.S create mode 100644 drivers/rk_nand/rk_ftlv5_arm32.S create mode 100644 drivers/rk_nand/rk_ftlv5_arm64.S create mode 100644 drivers/rk_nand/rk_helpers.S create mode 100644 drivers/rk_nand/rk_helpers.c create mode 100644 drivers/rk_nand/rk_nand_base.c create mode 100644 drivers/rk_nand/rk_nand_base.h create mode 100644 drivers/rk_nand/rk_nand_blk.c create mode 100644 drivers/rk_nand/rk_nand_blk.h create mode 100644 drivers/rk_nand/rk_zftl_arm32.S create mode 100644 drivers/rk_nand/rk_zftl_arm64.S create mode 100644 include/linux/soc/rockchip/rk_vendor_storage.h diff --git a/drivers/Kconfig b/drivers/Kconfig index 0d399ddaa18..9473d9a4b83 100644 --- a/drivers/Kconfig +++ b/drivers/Kconfig @@ -236,4 +236,7 @@ source "drivers/interconnect/Kconfig" source "drivers/counter/Kconfig" source "drivers/most/Kconfig" + +source "drivers/rk_nand/Kconfig" + endmenu diff --git a/drivers/Makefile b/drivers/Makefile index a110338c860..6a55de22220 100644 --- a/drivers/Makefile +++ b/drivers/Makefile @@ -187,3 +187,4 @@ obj-$(CONFIG_GNSS) += gnss/ obj-$(CONFIG_INTERCONNECT) += interconnect/ obj-$(CONFIG_COUNTER) += counter/ obj-$(CONFIG_MOST) += most/ +obj-$(CONFIG_RK_NAND) += rk_nand/ diff --git a/drivers/rk_nand/Kconfig b/drivers/rk_nand/Kconfig new file mode 100644 index 00000000000..c49a1c28b70 --- /dev/null +++ b/drivers/rk_nand/Kconfig @@ -0,0 +1,10 @@ +# SPDX-License-Identifier: GPL-2.0 +if ARCH_ROCKCHIP +config RK_NAND + tristate "RK NAND Device Support" + default n + depends on BLOCK_RKNAND != y + help + RK NAND Device Support. + +endif diff --git a/drivers/rk_nand/Makefile b/drivers/rk_nand/Makefile new file mode 100644 index 00000000000..b749c8a5e07 --- /dev/null +++ b/drivers/rk_nand/Makefile @@ -0,0 +1,11 @@ +# SPDX-License-Identifier: GPL-2.0 +obj-$(CONFIG_RK_NAND) += rknand.o + +#ifdef CONFIG_THUMB2_KERNEL +#rk_ftl-$(CONFIG_THUMB2_KERNEL) += rk_ftl_arm_v7_thumb.o +#else +#rk_ftl-$(CONFIG_ARM64) += rk_zftl_arm64.o rk_ftlv5_arm64.o +#rk_ftl-$(CONFIG_ARM) := rk_zftl_arm32.o rk_ftlv5_arm32.o +#endif + +rknand-y := rk_zftl_arm32.o rk_ftlv5_arm32.o rk_nand_base.o rk_nand_blk.o rk_helpers.o diff --git a/drivers/rk_nand/rk_ftl_api.h b/drivers/rk_nand/rk_ftl_api.h new file mode 100644 index 00000000000..ebde01e3dbb --- /dev/null +++ b/drivers/rk_nand/rk_ftl_api.h @@ -0,0 +1,41 @@ +/* + * Copyright (c) 2016, Fuzhou Rockchip Electronics Co., Ltd + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef __RK_FTL_API_H +#define __RK_FTL_API_H + +void rk_nandc_flash_xfer_completed(void *nandc_reg); +void rk_nandc_flash_ready(void *nandc_reg); +u32 rk_nandc_get_irq_status(void *nandc_reg); +int rknand_proc_ftlread(char *page); +int FtlRead(u8 lun, u32 index, u32 sectors, u8 *buf); +int FtlWrite(u8 lun, u32 index, u32 sectors, u8 *buf); +int rk_ftl_garbage_collect(u32 mode, u32 pages); +void rk_ftl_cache_write_back(void); +int FtlDiscard(u32 index, u32 sectors); +int rk_nand_schedule_enable_config(int en); +int rk_ftl_get_capacity(void); +void rk_ftl_storage_sys_init(void); +int rk_ftl_init(void); +void rk_nand_de_init(void); +void rk_ftl_de_init(void); +void rk_nand_suspend(void); +void rk_nand_resume(void); +int rknand_get_reg_addr(unsigned long *p_nandc0, unsigned long *p_nandc1); +long rknand_sys_storage_ioctl(struct file *file, unsigned int cmd, + unsigned long arg); +long rk_ftl_vendor_storage_ioctl(struct file *file, unsigned int cmd, + unsigned long arg); +int rk_ftl_vendor_write(u32 id, void *pbuf, u32 size); +int rk_ftl_vendor_read(u32 id, void *pbuf, u32 size); +int rk_ftl_vendor_storage_init(void); +int rknand_vendor_storage_init(void); + +#endif + diff --git a/drivers/rk_nand/rk_ftl_arm_v7.S b/drivers/rk_nand/rk_ftl_arm_v7.S new file mode 100644 index 00000000000..304c982d496 --- /dev/null +++ b/drivers/rk_nand/rk_ftl_arm_v7.S @@ -0,0 +1,30165 @@ +/* + * Copyright (c) 2016-2018, Fuzhou Rockchip Electronics Co., Ltd + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * date: 2021-07-26 + */ + .arch armv7-a + .eabi_attribute 20, 1 + .eabi_attribute 21, 1 + .eabi_attribute 23, 3 + .eabi_attribute 24, 1 + .eabi_attribute 25, 1 + .eabi_attribute 26, 2 + .eabi_attribute 30, 2 + .eabi_attribute 34, 1 + .eabi_attribute 18, 2 + .file "rk_ftl_arm_v7.c" + .syntax unified + .text + .align 2 + .fpu softvfp + .type ndelay, %function +ndelay: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L2 + add r0, r0, #996 + add r0, r0, #3 + umull r0, r1, r0, r3 + ldr r3, .L2+4 + ldr r3, [r3, #8] + lsr r0, r1, #6 + bx r3 @ indirect register sibling call +.L3: + .align 2 +.L2: + .word 274877907 + .word arm_delay_ops + .fnend + .size ndelay, .-ndelay + .align 2 + .syntax unified + .arm + .fpu softvfp + .type flash_read_ecc, %function +flash_read_ecc: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L6 + push {r4, lr} + .save {r4, lr} + ldr r4, [r3, r0, lsl #3] + add r3, r3, r0, lsl #3 + mov r0, #80 + ldrb r3, [r3, #4] @ zero_extendqisi2 + add r4, r4, r3, lsl #8 + mov r3, #122 + str r3, [r4, #2056] + bl ndelay + ldr r3, [r4, #2048] + ldr r0, [r4, #2048] + and r3, r3, #15 + and r0, r0, #15 + cmp r0, r3 + movcc r0, r3 + ldr r3, [r4, #2048] + and r3, r3, #15 + cmp r3, r0 + movcc r3, r0 + ldr r0, [r4, #2048] + and r0, r0, #15 + cmp r0, r3 + movcc r0, r3 + pop {r4, pc} +.L7: + .align 2 +.L6: + .word .LANCHOR0 + .fnend + .size flash_read_ecc, .-flash_read_ecc + .align 2 + .syntax unified + .arm + .fpu softvfp + .type ftl_set_blk_mode.part.9, %function +ftl_set_blk_mode.part.9: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L9 + lsr r1, r0, #5 + mov ip, #1 + and r0, r0, #31 + ldr r2, [r3, #32] + ldr r3, [r2, r1, lsl #2] + orr r0, r3, ip, lsl r0 + str r0, [r2, r1, lsl #2] + bx lr +.L10: + .align 2 +.L9: + .word .LANCHOR0 + .fnend + .size ftl_set_blk_mode.part.9, .-ftl_set_blk_mode.part.9 + .align 2 + .global FlashMemCmp8 + .syntax unified + .arm + .fpu softvfp + .type FlashMemCmp8, %function +FlashMemCmp8: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L25 + ldrb r3, [r3, #36] @ zero_extendqisi2 + cmp r3, #0 + beq .L20 + ldrb r3, [r1, #1] @ zero_extendqisi2 + ldrb ip, [r0, #1] @ zero_extendqisi2 + cmp ip, r3 + movne r3, #0 + bne .L20 +.L24: + mov r0, #0 + bx lr +.L14: + cmp r3, r2 + bne .L16 + mov r0, #0 + ldr pc, [sp], #4 +.L20: + cmp r3, r2 + beq .L24 + str lr, [sp, #-4]! + .save {lr} +.L16: + ldrb lr, [r0, r3] @ zero_extendqisi2 + ldrb ip, [r1, r3] @ zero_extendqisi2 + add r3, r3, #1 + cmp lr, ip + beq .L14 + mov r0, r3 + ldr pc, [sp], #4 +.L26: + .align 2 +.L25: + .word .LANCHOR0 + .fnend + .size FlashMemCmp8, .-FlashMemCmp8 + .align 2 + .global FlashRsvdBlkChk + .syntax unified + .arm + .fpu softvfp + .type FlashRsvdBlkChk, %function +FlashRsvdBlkChk: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r2, .L28 + ldrb ip, [r2, #37] @ zero_extendqisi2 + ldr r3, [r2, #40] + mul r3, r3, ip + cmp r3, r1 + movls r2, #0 + movhi r2, #1 + cmp r0, #0 + movne r2, #0 + eor r0, r2, #1 + bx lr +.L29: + .align 2 +.L28: + .word .LANCHOR0 + .fnend + .size FlashRsvdBlkChk, .-FlashRsvdBlkChk + .align 2 + .global FlashGetRandomizer + .syntax unified + .arm + .fpu softvfp + .type FlashGetRandomizer, %function +FlashGetRandomizer: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + and r3, r1, #127 + ldr r2, .L39 + lsl r3, r3, #1 + push {r4, lr} + .save {r4, lr} + ldrh r4, [r2, r3] + ldr r3, .L39+4 + ldrb r3, [r3, #44] @ zero_extendqisi2 + cmp r3, #0 + beq .L30 + bl FlashRsvdBlkChk + cmp r0, #0 + orrne r4, r4, #-1073741824 +.L30: + mov r0, r4 + pop {r4, pc} +.L40: + .align 2 +.L39: + .word .LANCHOR1 + .word .LANCHOR0 + .fnend + .size FlashGetRandomizer, .-FlashGetRandomizer + .align 2 + .global FlashSetRandomizer + .syntax unified + .arm + .fpu softvfp + .type FlashSetRandomizer, %function +FlashSetRandomizer: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r2, .L50 + and r3, r1, #127 + lsl r3, r3, #1 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + mov r6, r0 + ldrh r5, [r2, r3] + ldr r3, .L50+4 + ldrb r2, [r3, #44] @ zero_extendqisi2 + mov r4, r3 + cmp r2, #0 + beq .L42 + bl FlashRsvdBlkChk + cmp r0, #0 + orrne r5, r5, #-1073741824 +.L42: + ldr r3, [r4, r6, lsl #3] + str r5, [r3, #336] + pop {r4, r5, r6, pc} +.L51: + .align 2 +.L50: + .word .LANCHOR1 + .word .LANCHOR0 + .fnend + .size FlashSetRandomizer, .-FlashSetRandomizer + .align 2 + .global FlashBlockAlignInit + .syntax unified + .arm + .fpu softvfp + .type FlashBlockAlignInit, %function +FlashBlockAlignInit: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + cmp r0, #512 + ldr r3, .L58 + movhi r2, #1024 + bhi .L57 + cmp r0, #256 + movhi r2, #512 + bhi .L57 + cmp r0, #128 + movhi r2, #256 + bhi .L57 + str r0, [r3, #40] + bx lr +.L57: + str r2, [r3, #40] + bx lr +.L59: + .align 2 +.L58: + .word .LANCHOR0 + .fnend + .size FlashBlockAlignInit, .-FlashBlockAlignInit + .align 2 + .global FlashReadCmd + .syntax unified + .arm + .fpu softvfp + .type FlashReadCmd, %function +FlashReadCmd: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr ip, .L63 + str lr, [sp, #-4]! + .save {lr} + add r2, ip, r0, lsl #3 + ldr r3, [ip, r0, lsl #3] + ldr ip, [ip, #48] + ldrb r2, [r2, #4] @ zero_extendqisi2 + ldrb ip, [ip, #7] @ zero_extendqisi2 + lsl r2, r2, #8 + cmp ip, #1 + addeq ip, r3, r2 + moveq lr, #38 + add r3, r3, r2 + mov r2, #0 + streq lr, [ip, #2056] + str r2, [r3, #2056] + str r2, [r3, #2052] + str r2, [r3, #2052] + uxtb r2, r1 + str r2, [r3, #2052] + lsr r2, r1, #8 + str r2, [r3, #2052] + lsr r2, r1, #16 + str r2, [r3, #2052] + mov r2, #48 + str r2, [r3, #2056] + ldr lr, [sp], #4 + b FlashSetRandomizer +.L64: + .align 2 +.L63: + .word .LANCHOR0 + .fnend + .size FlashReadCmd, .-FlashReadCmd + .align 2 + .global FlashReadDpDataOutCmd + .syntax unified + .arm + .fpu softvfp + .type FlashReadDpDataOutCmd, %function +FlashReadDpDataOutCmd: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr ip, .L70 + push {r4, lr} + .save {r4, lr} + uxtb r4, r1 + lsr lr, r1, #8 + add r2, ip, r0, lsl #3 + ldr r3, [ip, r0, lsl #3] + ldrb ip, [ip, #68] @ zero_extendqisi2 + ldrb r2, [r2, #4] @ zero_extendqisi2 + cmp ip, #1 + lsr ip, r1, #16 + lsl r2, r2, #8 + add r3, r3, r2 + bne .L66 + mov r2, #6 + str r2, [r3, #2056] + mov r2, #0 + str r2, [r3, #2052] + str r2, [r3, #2052] + str r4, [r3, #2052] + str lr, [r3, #2052] + str ip, [r3, #2052] +.L69: + mov r2, #224 + str r2, [r3, #2056] + pop {r4, lr} + b FlashSetRandomizer +.L66: + mov r2, #0 + str r2, [r3, #2056] + str r2, [r3, #2052] + str r2, [r3, #2052] + str r4, [r3, #2052] + str lr, [r3, #2052] + str ip, [r3, #2052] + mov ip, #5 + str ip, [r3, #2056] + str r2, [r3, #2052] + str r2, [r3, #2052] + b .L69 +.L71: + .align 2 +.L70: + .word .LANCHOR0 + .fnend + .size FlashReadDpDataOutCmd, .-FlashReadDpDataOutCmd + .align 2 + .global FlashProgFirstCmd + .syntax unified + .arm + .fpu softvfp + .type FlashProgFirstCmd, %function +FlashProgFirstCmd: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr ip, .L74 + lsr r2, r1, #16 + str lr, [sp, #-4]! + .save {lr} + ldr r3, [ip, r0, lsl #3] + add ip, ip, r0, lsl #3 + ldrb ip, [ip, #4] @ zero_extendqisi2 + add r3, r3, ip, lsl #8 + mov ip, #128 + str ip, [r3, #2056] + mov ip, #0 + str ip, [r3, #2052] + str ip, [r3, #2052] + uxtb ip, r1 + str ip, [r3, #2052] + lsr ip, r1, #8 + str ip, [r3, #2052] + str r2, [r3, #2052] + ldr lr, [sp], #4 + b FlashSetRandomizer +.L75: + .align 2 +.L74: + .word .LANCHOR0 + .fnend + .size FlashProgFirstCmd, .-FlashProgFirstCmd + .align 2 + .global FlashEraseCmd + .syntax unified + .arm + .fpu softvfp + .type FlashEraseCmd, %function +FlashEraseCmd: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr ip, .L82 + cmp r2, #0 + str lr, [sp, #-4]! + .save {lr} + ldr r3, [ip, r0, lsl #3] + add r0, ip, r0, lsl #3 + ldrb r0, [r0, #4] @ zero_extendqisi2 + lsl r0, r0, #8 + beq .L77 + add r2, r3, r0 + mov lr, #96 + str lr, [r2, #2056] + uxtb lr, r1 + str lr, [r2, #2052] + lsr lr, r1, #8 + str lr, [r2, #2052] + lsr lr, r1, #16 + str lr, [r2, #2052] + ldr r2, [ip, #40] + add r1, r1, r2 +.L77: + add r3, r3, r0 + mov r2, #96 + str r2, [r3, #2056] + uxtb r2, r1 + str r2, [r3, #2052] + lsr r2, r1, #8 + lsr r1, r1, #16 + str r2, [r3, #2052] + mov r2, #208 + str r1, [r3, #2052] + str r2, [r3, #2056] + ldr pc, [sp], #4 +.L83: + .align 2 +.L82: + .word .LANCHOR0 + .fnend + .size FlashEraseCmd, .-FlashEraseCmd + .align 2 + .global FlashProgDpSecondCmd + .syntax unified + .arm + .fpu softvfp + .type FlashProgDpSecondCmd, %function +FlashProgDpSecondCmd: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, lr} + .save {r4, lr} + lsr r2, r1, #16 + ldr lr, .L86 + ldr r3, [lr, r0, lsl #3] + add ip, lr, r0, lsl #3 + ldrb r4, [ip, #4] @ zero_extendqisi2 + ldrb ip, [lr, #63] @ zero_extendqisi2 + add r3, r3, r4, lsl #8 + str ip, [r3, #2056] + mov ip, #0 + str ip, [r3, #2052] + str ip, [r3, #2052] + uxtb ip, r1 + str ip, [r3, #2052] + lsr ip, r1, #8 + str ip, [r3, #2052] + str r2, [r3, #2052] + pop {r4, lr} + b FlashSetRandomizer +.L87: + .align 2 +.L86: + .word .LANCHOR0 + .fnend + .size FlashProgDpSecondCmd, .-FlashProgDpSecondCmd + .align 2 + .global FlashProgSecondCmd + .syntax unified + .arm + .fpu softvfp + .type FlashProgSecondCmd, %function +FlashProgSecondCmd: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L90 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + ldr r4, [r3, r0, lsl #3] + add r3, r3, r0, lsl #3 + ldr r0, .L90+4 + ldrb r5, [r3, #4] @ zero_extendqisi2 + ldr r3, .L90+8 + add r4, r4, r5, lsl #8 + ldr r3, [r3, #4] + blx r3 + mov r3, #16 + str r3, [r4, #2056] + pop {r4, r5, r6, pc} +.L91: + .align 2 +.L90: + .word .LANCHOR0 + .word 64424500 + .word arm_delay_ops + .fnend + .size FlashProgSecondCmd, .-FlashProgSecondCmd + .align 2 + .global FlashProgDpFirstCmd + .syntax unified + .arm + .fpu softvfp + .type FlashProgDpFirstCmd, %function +FlashProgDpFirstCmd: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r2, .L93 + ldr r3, [r2, r0, lsl #3] + add r0, r2, r0, lsl #3 + ldrb r2, [r2, #62] @ zero_extendqisi2 + ldrb r1, [r0, #4] @ zero_extendqisi2 + add r3, r3, r1, lsl #8 + str r2, [r3, #2056] + bx lr +.L94: + .align 2 +.L93: + .word .LANCHOR0 + .fnend + .size FlashProgDpFirstCmd, .-FlashProgDpFirstCmd + .align 2 + .global FlashReadStatus + .syntax unified + .arm + .fpu softvfp + .type FlashReadStatus, %function +FlashReadStatus: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L97 + mov r2, #112 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + ldr r5, [r3, r0, lsl #3] + add r3, r3, r0, lsl #3 + mov r0, #80 + ldrb r4, [r3, #4] @ zero_extendqisi2 + add r3, r5, r4, lsl #8 + add r4, r4, #8 + str r2, [r3, #2056] + bl ndelay + ldr r0, [r5, r4, lsl #8] + pop {r4, r5, r6, pc} +.L98: + .align 2 +.L97: + .word .LANCHOR0 + .fnend + .size FlashReadStatus, .-FlashReadStatus + .align 2 + .global js_hash + .syntax unified + .arm + .fpu softvfp + .type js_hash, %function +js_hash: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L102 + add r1, r0, r1 +.L100: + cmp r0, r1 + bne .L101 + mov r0, r3 + bx lr +.L101: + lsr r2, r3, #2 + ldrb ip, [r0], #1 @ zero_extendqisi2 + add r2, r2, r3, lsl #5 + add r2, r2, ip + eor r3, r3, r2 + b .L100 +.L103: + .align 2 +.L102: + .word 1204201446 + .fnend + .size js_hash, .-js_hash + .align 2 + .global FlashLoadIdbInfo + .syntax unified + .arm + .fpu softvfp + .type FlashLoadIdbInfo, %function +FlashLoadIdbInfo: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + mov r0, #0 + bx lr + .fnend + .size FlashLoadIdbInfo, .-FlashLoadIdbInfo + .align 2 + .global FlashPrintInfo + .syntax unified + .arm + .fpu softvfp + .type FlashPrintInfo, %function +FlashPrintInfo: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + bx lr + .fnend + .size FlashPrintInfo, .-FlashPrintInfo + .align 2 + .global ToshibaSetRRPara + .syntax unified + .arm + .fpu softvfp + .type ToshibaSetRRPara, %function +ToshibaSetRRPara: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + add r9, r1, r1, lsl #2 + ldr r7, .L114 + mov r6, r0 + mov r5, #0 + add r7, r1, r7 +.L107: + ldr r8, .L114+4 + ldrb r3, [r8, #85] @ zero_extendqisi2 + cmp r5, r3 + bcc .L111 + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L111: + ldr r4, .L114+8 + mov r3, #85 + str r3, [r6, #8] + mov r0, #200 + ldrsb r3, [r5, r4] + str r3, [r6, #4] + bl ndelay + ldrb r3, [r8, #84] @ zero_extendqisi2 + cmp r3, #34 + addeq r3, r5, r9 + addeq r4, r4, r3 + ldrsbeq r3, [r4, #5] + beq .L113 + cmp r3, #35 + addeq r3, r5, r9 + ldrsbne r3, [r7] + addeq r4, r4, r3 + ldrsbeq r3, [r4, #50] +.L113: + str r3, [r6] + add r5, r5, #1 + b .L107 +.L115: + .align 2 +.L114: + .word .LANCHOR1+396 + .word .LANCHOR0 + .word .LANCHOR1+256 + .fnend + .size ToshibaSetRRPara, .-ToshibaSetRRPara + .align 2 + .global SamsungSetRRPara + .syntax unified + .arm + .fpu softvfp + .type SamsungSetRRPara, %function +SamsungSetRRPara: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L120 + push {r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + mov r4, #0 + ldr r8, .L120+4 + mov r6, r0 + mov r7, r3 + mov r9, #161 + add r1, r3, r1, lsl #2 + mov r10, r4 + add r5, r1, #3 +.L117: + ldrb r3, [r8, #85] @ zero_extendqisi2 + cmp r4, r3 + bcc .L118 + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L118: + str r9, [r6, #8] + mov r0, #300 + str r10, [r6] + ldrsb r3, [r7, r4] + add r4, r4, #1 + str r3, [r6] + ldrsb r3, [r5, #1]! + str r3, [r6] + bl ndelay + b .L117 +.L121: + .align 2 +.L120: + .word .LANCHOR1+404 + .word .LANCHOR0 + .fnend + .size SamsungSetRRPara, .-SamsungSetRRPara + .align 2 + .global ftl_flash_suspend + .syntax unified + .arm + .fpu softvfp + .type ftl_flash_suspend, %function +ftl_flash_suspend: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L123 + ldr r2, [r3, #88] + ldr r1, [r2] + str r1, [r3, #92] + ldr r1, [r2, #4] + str r1, [r3, #96] + ldr r1, [r2, #8] + str r1, [r3, #100] + ldr r1, [r2, #12] + str r1, [r3, #104] + ldr r1, [r2, #304] + str r1, [r3, #108] + ldr r1, [r2, #308] + str r1, [r3, #112] + ldr r1, [r2, #336] + ldr r2, [r2, #344] + str r1, [r3, #116] + str r2, [r3, #120] + bx lr +.L124: + .align 2 +.L123: + .word .LANCHOR0 + .fnend + .size ftl_flash_suspend, .-ftl_flash_suspend + .global __aeabi_uidiv + .global __aeabi_uidivmod + .align 2 + .global LogAddr2PhyAddr + .syntax unified + .arm + .fpu softvfp + .type LogAddr2PhyAddr, %function +LogAddr2PhyAddr: + .fnstart + @ args = 4, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #12 + mov r9, r2 + ldr r4, .L131 + mov fp, r3 + mov r10, r1 + mov r7, r0 + ldr r5, [r0, #4] + ldrh r2, [r4, #136] + ldrh r3, [r4, #138] + ldrh r6, [r4, #40] + smulbb r3, r3, r2 + ldrb r2, [r4, #36] @ zero_extendqisi2 + uxth r3, r3 + cmp r2, #1 + lsleq r6, r6, #1 + ubfx r2, r5, #10, #16 + mov r1, r3 + str r3, [sp, #4] + mov r0, r2 + uxtheq r6, r6 + str r2, [sp] + bl __aeabi_uidiv + ldr r3, [sp, #4] + uxth r8, r0 + ldr r2, [sp] + mov r1, r3 + mov r0, r2 + bl __aeabi_uidivmod + cmp r10, #1 + uxth r1, r1 + ubfx r0, r5, #0, #10 + bne .L127 + ldrb r3, [r4, #152] @ zero_extendqisi2 + cmp r3, #0 + addeq r0, r4, r0, lsl #1 + ldrheq r0, [r0, #156] +.L127: + add r4, r4, r8, lsl #2 + ldr r3, [r4, #1180] + mla r6, r6, r1, r3 + ldrb r3, [sp, #48] @ zero_extendqisi2 + cmp r3, #1 + add r0, r6, r0 + str r0, [r9] + movls r0, #0 + str r8, [fp] + ldrhi r0, [r7, #4] + ldrhi r3, [r7, #40] + addhi r0, r0, #1024 + subhi r0, r0, r3 + clzhi r0, r0 + lsrhi r0, r0, #5 + add sp, sp, #12 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L132: + .align 2 +.L131: + .word .LANCHOR0 + .fnend + .size LogAddr2PhyAddr, .-LogAddr2PhyAddr + .align 2 + .global FlashReadStatusEN + .syntax unified + .arm + .fpu softvfp + .type FlashReadStatusEN, %function +FlashReadStatusEN: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L146 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + ldr r4, [r3, r0, lsl #3] + add r0, r3, r0, lsl #3 + ldrb r5, [r0, #4] @ zero_extendqisi2 + ldr r0, [r3, #48] + ldrb r0, [r0, #8] @ zero_extendqisi2 + cmp r0, #2 + mov r0, r3 + lsl r3, r5, #8 + movne r2, #112 + add r5, r5, #8 + addne r3, r4, r3 + strne r2, [r3, #2056] + bne .L139 + cmp r2, #0 + add r3, r4, r3 + ldrbne r2, [r0, #66] @ zero_extendqisi2 + ldrbeq r2, [r0, #65] @ zero_extendqisi2 + str r2, [r3, #2056] + ldrb r0, [r0, #67] @ zero_extendqisi2 + cmp r0, #0 + movne r2, #0 + addne ip, r4, r5, lsl #8 + bne .L138 +.L139: + mov r0, #80 + bl ndelay + ldr r0, [r4, r5, lsl #8] + uxtb r0, r0 + pop {r4, r5, r6, pc} +.L140: + lsl r3, r2, #3 + add r2, r2, #1 + lsr r3, r1, r3 + uxtb r3, r3 + str r3, [ip, #4] +.L138: + cmp r2, r0 + bcc .L140 + b .L139 +.L147: + .align 2 +.L146: + .word .LANCHOR0 + .fnend + .size FlashReadStatusEN, .-FlashReadStatusEN + .align 2 + .global FlashWaitReadyEN + .syntax unified + .arm + .fpu softvfp + .type FlashWaitReadyEN, %function +FlashWaitReadyEN: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + mov r4, r0 + mov r5, r1 + mov r6, r2 +.L149: + mov r2, r6 + mov r1, r5 + mov r0, r4 + bl FlashReadStatusEN + cmp r0, #255 + beq .L149 + tst r0, #64 + popne {r4, r5, r6, pc} + mov r1, #3 + mov r0, #1 + bl usleep_range + b .L149 + .fnend + .size FlashWaitReadyEN, .-FlashWaitReadyEN + .align 2 + .global FlashScheduleEnSet + .syntax unified + .arm + .fpu softvfp + .type FlashScheduleEnSet, %function +FlashScheduleEnSet: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L156 + ldr r2, [r3, #1212] + str r0, [r3, #1212] + mov r0, r2 + bx lr +.L157: + .align 2 +.L156: + .word .LANCHOR0 + .fnend + .size FlashScheduleEnSet, .-FlashScheduleEnSet + .align 2 + .global FlashGetPageSize + .syntax unified + .arm + .fpu softvfp + .type FlashGetPageSize, %function +FlashGetPageSize: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L159 + ldr r3, [r3, #48] + ldrb r0, [r3, #9] @ zero_extendqisi2 + bx lr +.L160: + .align 2 +.L159: + .word .LANCHOR0 + .fnend + .size FlashGetPageSize, .-FlashGetPageSize + .align 2 + .global NandcReadDontCaseBusyEn + .syntax unified + .arm + .fpu softvfp + .type NandcReadDontCaseBusyEn, %function +NandcReadDontCaseBusyEn: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + bx lr + .fnend + .size NandcReadDontCaseBusyEn, .-NandcReadDontCaseBusyEn + .align 2 + .global NandcGetChipIf + .syntax unified + .arm + .fpu softvfp + .type NandcGetChipIf, %function +NandcGetChipIf: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r2, .L163 + add r3, r2, r0, lsl #3 + ldr r0, [r2, r0, lsl #3] + ldrb r3, [r3, #4] @ zero_extendqisi2 + add r3, r3, #8 + add r0, r0, r3, lsl #8 + bx lr +.L164: + .align 2 +.L163: + .word .LANCHOR0 + .fnend + .size NandcGetChipIf, .-NandcGetChipIf + .align 2 + .global NandcSetDdrPara + .syntax unified + .arm + .fpu softvfp + .type NandcSetDdrPara, %function +NandcSetDdrPara: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L166 + ldr r2, [r3, #88] + lsl r3, r0, #8 + orr r0, r3, r0, lsl #16 + orr r0, r0, #1 + str r0, [r2, #304] + bx lr +.L167: + .align 2 +.L166: + .word .LANCHOR0 + .fnend + .size NandcSetDdrPara, .-NandcSetDdrPara + .align 2 + .global NandcSetDdrDiv + .syntax unified + .arm + .fpu softvfp + .type NandcSetDdrDiv, %function +NandcSetDdrDiv: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L169 + orr r0, r0, #16640 + ldr r3, [r3, #88] + str r0, [r3, #344] + bx lr +.L170: + .align 2 +.L169: + .word .LANCHOR0 + .fnend + .size NandcSetDdrDiv, .-NandcSetDdrDiv + .align 2 + .global NandcSetDdrMode + .syntax unified + .arm + .fpu softvfp + .type NandcSetDdrMode, %function +NandcSetDdrMode: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L174 + cmp r0, #0 + ldr r2, [r3, #88] + ldr r3, [r2] + bfieq r3, r0, #13, #1 + orrne r3, r3, #253952 + str r3, [r2] + bx lr +.L175: + .align 2 +.L174: + .word .LANCHOR0 + .fnend + .size NandcSetDdrMode, .-NandcSetDdrMode + .align 2 + .global NandcSetMode + .syntax unified + .arm + .fpu softvfp + .type NandcSetMode, %function +NandcSetMode: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L183 + ands r1, r0, #6 + ldr r2, [r3, #88] + ldr r3, [r2] + bfieq r3, r1, #13, #1 + beq .L179 + movw r1, #8322 + orr r3, r3, #24576 + str r1, [r2, #344] + bfc r3, #15, #1 + ldr r1, .L183+4 + orr r3, r3, #196608 + tst r0, #4 + orrne r3, r3, #32768 + str r1, [r2, #304] + mov r1, #38 + str r1, [r2, #308] + mov r1, #39 + str r1, [r2, #308] +.L179: + str r3, [r2] + mov r0, #0 + bx lr +.L184: + .align 2 +.L183: + .word .LANCHOR0 + .word 1052675 + .fnend + .size NandcSetMode, .-NandcSetMode + .align 2 + .global NandcFlashCs + .syntax unified + .arm + .fpu softvfp + .type NandcFlashCs, %function +NandcFlashCs: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L186 + mov r2, #1 + ldr r1, [r3, r0, lsl #3] + add r0, r3, r0, lsl #3 + ldrb r0, [r0, #4] @ zero_extendqisi2 + ldr r3, [r1] + lsl r2, r2, r0 + bfi r3, r2, #0, #8 + str r3, [r1] + bx lr +.L187: + .align 2 +.L186: + .word .LANCHOR0 + .fnend + .size NandcFlashCs, .-NandcFlashCs + .align 2 + .global NandcFlashDeCs + .syntax unified + .arm + .fpu softvfp + .type NandcFlashDeCs, %function +NandcFlashDeCs: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L189 + ldr r2, [r3, r0, lsl #3] + ldr r3, [r2] + bfc r3, #0, #8 + bfc r3, #17, #1 + str r3, [r2] + bx lr +.L190: + .align 2 +.L189: + .word .LANCHOR0 + .fnend + .size NandcFlashDeCs, .-NandcFlashDeCs + .align 2 + .global HynixSetRRPara + .syntax unified + .arm + .fpu softvfp + .type HynixSetRRPara, %function +HynixSetRRPara: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #12 + mov r6, r0 + ldr r0, .L200 + mov r7, r3 + mov r8, r1 + mov r10, r2 + ldr r3, [r0, #48] + mov r5, r0 + add r4, r0, #1216 + ldrb r3, [r3, #19] @ zero_extendqisi2 + cmp r3, #6 + moveq r3, #20 + addeq r3, r3, r6, lsl #6 + addeq r3, r3, r7, lsl #2 + beq .L199 + cmp r3, #7 + bne .L194 + mov r3, #160 + mov r2, #28 + smlabb r2, r3, r6, r2 + mov r3, #10 + smlabb r3, r3, r7, r2 +.L199: + add r4, r4, r3 +.L193: + add r3, r5, r6, lsl #3 + ldr r9, [r5, r6, lsl #3] + mov r0, r6 + ldrb fp, [r3, #4] @ zero_extendqisi2 + sub r8, r8, #1 + bl NandcFlashCs + mov r3, #54 + add r8, r10, r8 + sub r4, r4, #1 + lsl fp, fp, #8 + add r0, r9, fp + str r3, [r0, #2056] + sub r3, r10, #1 + mov r10, r0 +.L196: + cmp r3, r8 + bne .L197 + mov r3, #22 + add r9, r9, fp + mov r0, r6 + str r3, [r9, #2056] + bl NandcFlashDeCs + add r0, r5, r6 + strb r7, [r0, #2068] + add sp, sp, #12 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L194: + cmp r3, #8 + addeq r4, r4, #28 + addeq r3, r7, r7, lsl #2 + beq .L199 + add r3, r7, #2 + add r3, r3, r6, lsl #3 + add r4, r4, r3, lsl #3 + add r4, r4, #4 + b .L193 +.L197: + ldrb r2, [r3, #1]! @ zero_extendqisi2 + mov r0, #200 + str r2, [r10, #2052] + str r3, [sp, #4] + bl ndelay + ldrsb r2, [r4, #1]! + ldr r3, [sp, #4] + str r2, [r10, #2048] + b .L196 +.L201: + .align 2 +.L200: + .word .LANCHOR0 + .fnend + .size HynixSetRRPara, .-HynixSetRRPara + .align 2 + .global FlashSetReadRetryDefault + .syntax unified + .arm + .fpu softvfp + .type FlashSetReadRetryDefault, %function +FlashSetReadRetryDefault: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + ldr r5, .L209 + ldr r3, [r5, #48] + ldrb r3, [r3, #19] @ zero_extendqisi2 + sub r3, r3, #1 + cmp r3, #7 + pophi {r4, r5, r6, r7, r8, pc} + ldr r7, .L209+4 + add r6, r5, #1216 + mov r4, #0 + add r6, r6, #4 +.L205: + ldrb r3, [r7, r4, lsl #3] @ zero_extendqisi2 + uxtb r0, r4 + cmp r3, #173 + bne .L204 + mov r3, #0 + mov r2, r6 + ldrb r1, [r5, #1217] @ zero_extendqisi2 + bl HynixSetRRPara +.L204: + add r4, r4, #1 + cmp r4, #4 + bne .L205 + pop {r4, r5, r6, r7, r8, pc} +.L210: + .align 2 +.L209: + .word .LANCHOR0 + .word .LANCHOR0+2072 + .fnend + .size FlashSetReadRetryDefault, .-FlashSetReadRetryDefault + .align 2 + .global FlashWaitCmdDone + .syntax unified + .arm + .fpu softvfp + .type FlashWaitCmdDone, %function +FlashWaitCmdDone: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + ldr r5, .L219 + add r4, r5, r0, lsl #4 + ldr r3, [r4, #2112] + cmp r3, #0 + beq .L213 + ldrb r7, [r4, #2104] @ zero_extendqisi2 + mov r6, r0 + add r5, r5, r6, lsl #2 + mov r0, r7 + bl NandcFlashCs + ldr r2, [r5, #1180] + mov r0, r7 + ldr r1, [r4, #2108] + adds r2, r2, #0 + movne r2, #1 + bl FlashWaitReadyEN + mov r1, r0 + mov r0, r7 + bl NandcFlashDeCs + ldr r3, [r4, #2112] + sbfx r0, r1, #0, #1 + str r0, [r3] + mov r3, #0 + ldr r2, [r4, #2116] + str r3, [r4, #2112] + cmp r2, r3 + strne r0, [r2] + strne r3, [r4, #2116] +.L213: + mov r0, #0 + pop {r4, r5, r6, r7, r8, pc} +.L220: + .align 2 +.L219: + .word .LANCHOR0 + .fnend + .size FlashWaitCmdDone, .-FlashWaitCmdDone + .align 2 + .global NandcDelayns + .syntax unified + .arm + .fpu softvfp + .type NandcDelayns, %function +NandcDelayns: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, lr} + .save {r4, lr} + bl ndelay + mov r0, #0 + pop {r4, pc} + .fnend + .size NandcDelayns, .-NandcDelayns + .align 2 + .global NandcWaitFlashReadyNoDelay + .syntax unified + .arm + .fpu softvfp + .type NandcWaitFlashReadyNoDelay, %function +NandcWaitFlashReadyNoDelay: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L229 + push {r0, r1, r2, r4, r5, lr} + .save {r4, r5, lr} + .pad #12 + ldr r4, .L229+4 + ldr r5, [r3, r0, lsl #3] +.L225: + ldr r3, [r5] + str r3, [sp, #4] + ldr r3, [sp, #4] + tst r3, #512 + bne .L226 + mov r0, #10 + bl ndelay + subs r4, r4, #1 + bne .L225 + mvn r0, #0 +.L223: + add sp, sp, #12 + @ sp needed + pop {r4, r5, pc} +.L226: + mov r0, #0 + b .L223 +.L230: + .align 2 +.L229: + .word .LANCHOR0 + .word 100000 + .fnend + .size NandcWaitFlashReadyNoDelay, .-NandcWaitFlashReadyNoDelay + .align 2 + .global NandcWaitFlashReady + .syntax unified + .arm + .fpu softvfp + .type NandcWaitFlashReady, %function +NandcWaitFlashReady: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r4, r5, lr} + .save {r4, r5, lr} + .pad #12 + ldr r3, .L237 + ldr r4, .L237+4 + ldr r5, [r3, r0, lsl #3] + mov r0, #130 + bl ndelay +.L233: + ldr r3, [r5] + str r3, [sp, #4] + ldr r3, [sp, #4] + tst r3, #512 + bne .L234 + mov r1, #2 + mov r0, #1 + bl usleep_range + subs r4, r4, #1 + bne .L233 + mvn r0, #0 +.L231: + add sp, sp, #12 + @ sp needed + pop {r4, r5, pc} +.L234: + mov r0, #0 + b .L231 +.L238: + .align 2 +.L237: + .word .LANCHOR0 + .word 100000 + .fnend + .size NandcWaitFlashReady, .-NandcWaitFlashReady + .align 2 + .global FlashReset + .syntax unified + .arm + .fpu softvfp + .type FlashReset, %function +FlashReset: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L241 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + mov r4, r0 + ldr r5, [r3, r0, lsl #3] + add r3, r3, r0, lsl #3 + ldrb r6, [r3, #4] @ zero_extendqisi2 + bl NandcFlashCs + mov r3, #255 + mov r0, r4 + add r5, r5, r6, lsl #8 + str r3, [r5, #2056] + bl NandcWaitFlashReady + mov r0, r4 + pop {r4, r5, r6, lr} + b NandcFlashDeCs +.L242: + .align 2 +.L241: + .word .LANCHOR0 + .fnend + .size FlashReset, .-FlashReset + .align 2 + .global flash_enter_slc_mode + .syntax unified + .arm + .fpu softvfp + .type flash_enter_slc_mode, %function +flash_enter_slc_mode: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + ldr r5, .L250 + ldrb r3, [r5, #152] @ zero_extendqisi2 + cmp r3, #0 + popeq {r4, r5, r6, r7, r8, pc} + mov r6, r0 + bl NandcFlashCs + add r3, r5, r6, lsl #3 + ldr r7, [r5, r6, lsl #3] + ldrb r8, [r3, #4] @ zero_extendqisi2 + ldrb r3, [r3, #2072] @ zero_extendqisi2 + cmp r3, #44 + lsl r8, r8, #8 + bne .L245 + add r4, r7, r8 + mov r3, #239 + str r3, [r4, #2056] + mov r3, #145 + str r3, [r4, #2052] + mov r0, #50 + bl ndelay + mov r3, #0 + mov r2, #1 + str r3, [r4, #2048] + mov r0, #100 + str r2, [r4, #2048] + str r3, [r4, #2048] + str r3, [r4, #2048] + bl ndelay +.L245: + mov r0, r6 + add r7, r7, r8 + bl NandcWaitFlashReadyNoDelay + mov r3, #218 + mov r0, r6 + str r3, [r7, #2056] + bl NandcWaitFlashReady + mov r3, #2 + strb r3, [r5, #2232] + pop {r4, r5, r6, r7, r8, pc} +.L251: + .align 2 +.L250: + .word .LANCHOR0 + .fnend + .size flash_enter_slc_mode, .-flash_enter_slc_mode + .align 2 + .global flash_exit_slc_mode + .syntax unified + .arm + .fpu softvfp + .type flash_exit_slc_mode, %function +flash_exit_slc_mode: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + ldr r5, .L259 + ldrb r3, [r5, #152] @ zero_extendqisi2 + cmp r3, #0 + popeq {r4, r5, r6, r7, r8, pc} + mov r6, r0 + bl NandcFlashCs + add r3, r5, r6, lsl #3 + ldr r7, [r5, r6, lsl #3] + ldrb r8, [r3, #4] @ zero_extendqisi2 + ldrb r3, [r3, #2072] @ zero_extendqisi2 + cmp r3, #44 + lsl r8, r8, #8 + bne .L254 + add r4, r7, r8 + mov r3, #239 + str r3, [r4, #2056] + mov r3, #145 + str r3, [r4, #2052] + mov r0, #50 + bl ndelay + mov r3, #2 + mov r0, #100 + str r3, [r4, #2048] + mov r3, #1 + str r3, [r4, #2048] + mov r3, #0 + str r3, [r4, #2048] + str r3, [r4, #2048] + bl ndelay +.L254: + mov r0, r6 + add r7, r7, r8 + bl NandcWaitFlashReadyNoDelay + mov r3, #223 + mov r0, r6 + str r3, [r7, #2056] + bl NandcWaitFlashReady + mov r3, #0 + strb r3, [r5, #2232] + pop {r4, r5, r6, r7, r8, pc} +.L260: + .align 2 +.L259: + .word .LANCHOR0 + .fnend + .size flash_exit_slc_mode, .-flash_exit_slc_mode + .align 2 + .global FlashEraseBlock + .syntax unified + .arm + .fpu softvfp + .type FlashEraseBlock, %function +FlashEraseBlock: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + mov r4, r0 + mov r5, r1 + mov r6, r2 + bl NandcWaitFlashReady + mov r0, r4 + bl NandcFlashCs + mov r2, r6 + mov r1, r5 + mov r0, r4 + bl FlashEraseCmd + mov r0, r4 + bl NandcWaitFlashReady + mov r1, r5 + mov r0, r4 + bl FlashReadStatus + mov r1, r0 + mov r0, r4 + bl NandcFlashDeCs + and r0, r1, #1 + pop {r4, r5, r6, pc} + .fnend + .size FlashEraseBlock, .-FlashEraseBlock + .align 2 + .global FlashSetInterfaceMode + .syntax unified + .arm + .fpu softvfp + .type FlashSetInterfaceMode, %function +FlashSetInterfaceMode: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #12 + mov lr, #0 + ldr r4, .L286 + mov r5, #239 + mov r6, #128 + mov r7, #1 + mov r8, #35 + mov r9, #32 + ldrb r3, [r4, #2233] @ zero_extendqisi2 + mov r10, #5 + and r2, r3, #4 + and r3, r3, #1 + str r2, [sp, #4] + mov r2, lr + str r3, [sp] +.L273: + ldr r1, .L286+4 + add r3, r4, lr + ldrb r3, [r3, #4] @ zero_extendqisi2 + ldrb ip, [lr, r1] @ zero_extendqisi2 + cmp ip, #69 + cmpne ip, #152 + beq .L264 + cmp ip, #44 + cmpne ip, #173 + bne .L265 +.L264: + cmp r0, #1 + ldr r1, [r4, lr] + bne .L266 + ldr fp, [sp] + cmp fp, #0 + beq .L265 + lsl r3, r3, #8 + cmp ip, #173 + add fp, r1, r3 + str r5, [fp, #2056] + streq r0, [fp, #2052] + beq .L285 + cmp ip, #44 + streq r0, [fp, #2052] + strne r6, [fp, #2052] + streq r10, [fp, #2048] + strne r0, [fp, #2048] +.L271: + add r3, r1, r3 + str r2, [r3, #2048] + str r2, [r3, #2048] + str r2, [r3, #2048] +.L265: + add lr, lr, #8 + cmp lr, #32 + bne .L273 + mov r0, #0 + bl NandcWaitFlashReady + mov r0, #0 + add sp, sp, #12 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L266: + ldr fp, [sp, #4] + cmp fp, #0 + beq .L265 + lsl r3, r3, #8 + cmp ip, #173 + add fp, r1, r3 + str r5, [fp, #2056] + streq r7, [fp, #2052] + streq r9, [fp, #2048] + beq .L271 + cmp ip, #44 + streq r7, [fp, #2052] + streq r8, [fp, #2048] + beq .L271 + str r6, [fp, #2052] +.L285: + str r2, [fp, #2048] + b .L271 +.L287: + .align 2 +.L286: + .word .LANCHOR0 + .word .LANCHOR0+2072 + .fnend + .size FlashSetInterfaceMode, .-FlashSetInterfaceMode + .align 2 + .global FlashReadSpare + .syntax unified + .arm + .fpu softvfp + .type FlashReadSpare, %function +FlashReadSpare: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr ip, .L290 + ldr r3, .L290+4 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + mov r5, r2 + ldr r4, [ip, r0, lsl #3] + add ip, ip, r0, lsl #3 + ldrb r3, [r3, #477] @ zero_extendqisi2 + ldrb r2, [ip, #4] @ zero_extendqisi2 + lsl r3, r3, #9 + add r4, r4, r2, lsl #8 + mov r2, #0 + str r2, [r4, #2056] + str r3, [r4, #2052] + lsr r3, r3, #8 + str r3, [r4, #2052] + uxtb r3, r1 + str r3, [r4, #2052] + lsr r3, r1, #8 + lsr r1, r1, #16 + str r3, [r4, #2052] + mov r3, #48 + str r1, [r4, #2052] + str r3, [r4, #2056] + bl NandcWaitFlashReady + ldr r3, [r4, #2048] + strb r3, [r5] + pop {r4, r5, r6, pc} +.L291: + .align 2 +.L290: + .word .LANCHOR0 + .word .LANCHOR1 + .fnend + .size FlashReadSpare, .-FlashReadSpare + .align 2 + .global SandiskProgTestBadBlock + .syntax unified + .arm + .fpu softvfp + .type SandiskProgTestBadBlock, %function +SandiskProgTestBadBlock: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L294 + push {r4, lr} + .save {r4, lr} + ldr r4, [r3, r0, lsl #3] + add r3, r3, r0, lsl #3 + ldrb r3, [r3, #4] @ zero_extendqisi2 + add r4, r4, r3, lsl #8 + mov r3, #162 + str r3, [r4, #2056] + mov r3, #128 + str r3, [r4, #2056] + mov r3, #0 + str r3, [r4, #2052] + str r3, [r4, #2052] + uxtb r3, r1 + str r3, [r4, #2052] + lsr r3, r1, #8 + lsr r1, r1, #16 + str r3, [r4, #2052] + mov r3, #16 + str r1, [r4, #2052] + str r3, [r4, #2056] + bl NandcWaitFlashReady + mov r3, #112 + mov r0, #80 + str r3, [r4, #2056] + bl ndelay + ldr r0, [r4, #2048] + and r0, r0, #1 + pop {r4, pc} +.L295: + .align 2 +.L294: + .word .LANCHOR0 + .fnend + .size SandiskProgTestBadBlock, .-SandiskProgTestBadBlock + .align 2 + .global SandiskSetRRPara + .syntax unified + .arm + .fpu softvfp + .type SandiskSetRRPara, %function +SandiskSetRRPara: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + mov r3, #239 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + str r3, [r0, #8] + mov r3, #17 + mov r5, r0 + mov r4, r1 + str r3, [r0, #4] + mov r0, #200 + bl ndelay + ldr r0, .L303 + add r4, r4, r4, lsl #2 + ldr r1, .L303+4 + mov r2, #0 + sub ip, r0, #45 +.L297: + ldrb r3, [r1, #85] @ zero_extendqisi2 + cmp r2, r3 + bcc .L300 + mov r0, #0 + pop {r4, r5, r6, lr} + b NandcWaitFlashReady +.L300: + ldrb r3, [r1, #84] @ zero_extendqisi2 + cmp r3, #67 + add r3, r2, r4 + addeq r3, ip, r3 + addne r3, r0, r3 + ldrsb r3, [r3, #5] + add r2, r2, #1 + str r3, [r5] + b .L297 +.L304: + .align 2 +.L303: + .word .LANCHOR1+301 + .word .LANCHOR0 + .fnend + .size SandiskSetRRPara, .-SandiskSetRRPara + .align 2 + .global micron_auto_read_calibration_config + .syntax unified + .arm + .fpu softvfp + .type micron_auto_read_calibration_config, %function +micron_auto_read_calibration_config: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + mov r5, r0 + mov r6, r1 + bl NandcWaitFlashReady + ldr r0, .L307 + ldr r4, [r0, r5, lsl #3] + add r0, r0, r5, lsl #3 + ldrb r3, [r0, #4] @ zero_extendqisi2 + mov r0, #200 + add r4, r4, r3, lsl #8 + mov r3, #239 + str r3, [r4, #2056] + mov r3, #150 + str r3, [r4, #2052] + bl ndelay + mov r3, #0 + str r6, [r4, #2048] + str r3, [r4, #2048] + str r3, [r4, #2048] + str r3, [r4, #2048] + pop {r4, r5, r6, pc} +.L308: + .align 2 +.L307: + .word .LANCHOR0 + .fnend + .size micron_auto_read_calibration_config, .-micron_auto_read_calibration_config + .align 2 + .global FlashEraseSLc2KBlocks + .syntax unified + .arm + .fpu softvfp + .type FlashEraseSLc2KBlocks, %function +FlashEraseSLc2KBlocks: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + .pad #16 + mov r5, #0 + ldr r8, .L320 + mov r6, r0 + mov r9, r1 + mov r7, r5 + ldr r10, .L320+4 +.L310: + cmp r7, r9 + bne .L315 + mov r0, #0 + add sp, sp, #16 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L315: + sub r3, r9, r7 + add r2, sp, #8 + uxtb r3, r3 + mov r1, #0 + add r0, r6, r5 + str r3, [sp] + add r3, sp, #12 + bl LogAddr2PhyAddr + ldrb r2, [r8, #2234] @ zero_extendqisi2 + ldr r3, [sp, #12] + cmp r2, r3 + mvnls r3, #0 + strls r3, [r6, r5] + bls .L312 + add r2, r8, r3 + add r3, r8, r3, lsl #4 + ldrb r4, [r2, #2236] @ zero_extendqisi2 + strb r4, [r3, #2104] + mov r0, r4 + bl NandcWaitFlashReady + mov r0, r4 + bl NandcFlashCs + mov r2, #0 + ldr r1, [sp, #8] + mov r0, r4 + bl FlashEraseCmd + mov r0, r4 + bl NandcWaitFlashReady + mov r0, r4 + ldr r1, [sp, #8] + bl FlashReadStatus + sbfx r0, r0, #0, #1 + ldr r1, [sp, #8] + str r0, [r6, r5] + mov r2, #0 + ldr r3, [r8, #40] + mov r0, r4 + add r1, r1, r3 + bl FlashEraseCmd + mov r0, r4 + bl NandcWaitFlashReady + mov r0, r4 + ldr r1, [sp, #8] + bl FlashReadStatus + tst r0, #1 + mvnne r3, #0 + strne r3, [r6, r5] + ldr r3, [r6, r5] + cmn r3, #1 + bne .L314 + ldr r1, [sp, #8] + mov r0, r10 + bl printk +.L314: + mov r0, r4 + bl NandcFlashDeCs +.L312: + add r7, r7, #1 + add r5, r5, #36 + b .L310 +.L321: + .align 2 +.L320: + .word .LANCHOR0 + .word .LC1 + .fnend + .size FlashEraseSLc2KBlocks, .-FlashEraseSLc2KBlocks + .align 2 + .global FlashEraseBlocks + .syntax unified + .arm + .fpu softvfp + .type FlashEraseBlocks, %function +FlashEraseBlocks: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r8, r2 + ldr r4, .L355 + .pad #20 + sub sp, sp, #20 + ldrb r5, [r4, #36] @ zero_extendqisi2 + cmp r5, #0 + moveq r9, r0 + moveq r10, r1 + beq .L324 + mov r1, r2 + bl FlashEraseSLc2KBlocks +.L322: + add sp, sp, #20 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L333: + mov r3, #36 + add r2, sp, #8 + mul r6, r3, r5 + sub r3, r8, r5 + uxtb r3, r3 + mov r1, #0 + str r3, [sp] + add r3, sp, #12 + add fp, r9, r6 + mov r0, fp + bl LogAddr2PhyAddr + ldrb r3, [r4, #2234] @ zero_extendqisi2 + mov r7, r0 + ldr r0, [sp, #12] + cmp r3, r0 + mvnls r3, #0 + strls r3, [r9, r6] + bls .L327 + ldrb r3, [r4, #2244] @ zero_extendqisi2 + cmp r3, #0 + add r3, r4, r0, lsl #4 + moveq r7, #0 + ldr r3, [r3, #2112] + cmp r3, #0 + beq .L329 + uxtb r0, r0 + bl FlashWaitCmdDone +.L329: + ldr r2, [sp, #12] + cmp r7, #0 + addne r6, r6, #36 + mov r0, #0 + addne r6, r9, r6 + lsl r3, r2, #4 + add r2, r4, r2 + add r1, r4, r3 + add r3, r4, r3 + str r0, [r1, #2116] + ldr r0, [sp, #8] + strne r6, [r1, #2116] + ldrb r6, [r2, #2236] @ zero_extendqisi2 + str r0, [r1, #2108] + str fp, [r1, #2112] + mov r0, r6 + strb r6, [r3, #2104] + bl NandcFlashCs + cmp r10, #1 + mov r0, r6 + bne .L331 + ldrb r3, [r4, #152] @ zero_extendqisi2 + cmp r3, #0 + beq .L331 + bl flash_enter_slc_mode +.L332: + ldr r3, [sp, #12] + mov r0, r6 + ldr r1, [sp, #8] + add r5, r5, r7 + add r3, r4, r3, lsl #2 + ldr r2, [r3, #1180] + adds r2, r2, #0 + movne r2, #1 + bl FlashWaitReadyEN + mov r2, r7 + ldr r1, [sp, #8] + mov r0, r6 + bl FlashEraseCmd + mov r0, r6 + bl NandcFlashDeCs +.L327: + add r5, r5, #1 +.L324: + cmp r5, r8 + bcc .L333 + ldr r6, .L355+4 + mov r5, #0 +.L334: + ldrb r3, [r4, #2234] @ zero_extendqisi2 + cmp r5, r3 + bcc .L336 + ldr r3, [r4, #2248] + cmp r3, #0 + bne .L337 +.L338: + mov r0, #0 + b .L322 +.L331: + bl flash_exit_slc_mode + b .L332 +.L336: + uxtb r0, r5 + bl FlashWaitCmdDone + cmp r10, #1 + bne .L335 + ldrb r3, [r4, #152] @ zero_extendqisi2 + cmp r3, #0 + beq .L335 + ldrb r0, [r6, r5, lsl #4] @ zero_extendqisi2 + bl flash_exit_slc_mode +.L335: + add r5, r5, #1 + b .L334 +.L337: + ldrb r3, [r4, #2072] @ zero_extendqisi2 + cmp r3, #69 + moveq r3, #0 + moveq r2, #36 + moveq r1, r3 + bne .L338 +.L339: + cmp r3, r8 + beq .L338 + mul r0, r2, r3 + add r3, r3, #1 + str r1, [r9, r0] + b .L339 +.L356: + .align 2 +.L355: + .word .LANCHOR0 + .word .LANCHOR0+2104 + .fnend + .size FlashEraseBlocks, .-FlashEraseBlocks + .align 2 + .global FlashReadDpCmd + .syntax unified + .arm + .fpu softvfp + .type FlashReadDpCmd, %function +FlashReadDpCmd: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + mov r7, r0 + ldr r0, .L363 + mov r8, r1 + uxtb r10, r2 + lsr r9, r2, #8 + lsr r6, r2, #16 + uxtb lr, r8 + ldr r2, [r0, #48] + lsr ip, r8, #8 + add r1, r0, r7, lsl #3 + ldr r3, [r0, r7, lsl #3] + ldrb r4, [r1, #4] @ zero_extendqisi2 + ldrb r1, [r0, #68] @ zero_extendqisi2 + ldrb r2, [r2, #7] @ zero_extendqisi2 + cmp r1, #1 + lsl r4, r4, #8 + lsr r1, r8, #16 + bne .L358 + cmp r2, #1 + addeq r2, r3, r4 + moveq r5, #38 + add r4, r3, r4 + streq r5, [r2, #2056] + ldrb r3, [r0, #61] @ zero_extendqisi2 + mov r5, #0 + ldrb r2, [r0, #60] @ zero_extendqisi2 + mov r0, r7 + str r2, [r4, #2056] + str r5, [r4, #2052] + str r5, [r4, #2052] + str lr, [r4, #2052] + str ip, [r4, #2052] + str r1, [r4, #2052] + str r3, [r4, #2056] + bl NandcWaitFlashReady + mov r3, #48 + str r5, [r4, #2056] + str r5, [r4, #2052] + str r5, [r4, #2052] + str r10, [r4, #2052] + str r9, [r4, #2052] + str r6, [r4, #2052] + str r3, [r4, #2056] +.L360: + mov r1, r8 + mov r0, r7 + pop {r4, r5, r6, r7, r8, r9, r10, lr} + b FlashSetRandomizer +.L358: + cmp r2, #1 + addeq r2, r3, r4 + moveq r5, #38 + streq r5, [r2, #2056] + add r3, r3, r4 + ldrb r2, [r0, #60] @ zero_extendqisi2 + str r2, [r3, #2056] + ldrb r2, [r0, #61] @ zero_extendqisi2 + str lr, [r3, #2052] + str ip, [r3, #2052] + str r1, [r3, #2052] + str r2, [r3, #2056] + mov r2, #48 + str r10, [r3, #2052] + str r9, [r3, #2052] + str r6, [r3, #2052] + str r2, [r3, #2056] + b .L360 +.L364: + .align 2 +.L363: + .word .LANCHOR0 + .fnend + .size FlashReadDpCmd, .-FlashReadDpCmd + .align 2 + .global ftl_flash_de_init + .syntax unified + .arm + .fpu softvfp + .type ftl_flash_de_init, %function +ftl_flash_de_init: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, lr} + .save {r4, lr} + mov r0, #0 + ldr r4, .L376 + bl NandcWaitFlashReady + bl FlashSetReadRetryDefault + ldr r0, [r4, #2252] + cmp r0, #0 + beq .L366 + mov r0, #0 + bl flash_enter_slc_mode +.L367: + ldrb r3, [r4, #2256] @ zero_extendqisi2 + cmp r3, #0 + beq .L368 + ldrb r3, [r4, #2233] @ zero_extendqisi2 + tst r3, #1 + beq .L368 + mov r0, #1 + bl FlashSetInterfaceMode + mov r0, #1 + bl NandcSetMode + mov r3, #0 + strb r3, [r4, #2256] +.L368: + ldr r3, [r4] + mov r0, #0 + str r0, [r3, #336] + pop {r4, pc} +.L366: + bl flash_exit_slc_mode + b .L367 +.L377: + .align 2 +.L376: + .word .LANCHOR0 + .fnend + .size ftl_flash_de_init, .-ftl_flash_de_init + .align 2 + .global NandcRandmzSel + .syntax unified + .arm + .fpu softvfp + .type NandcRandmzSel, %function +NandcRandmzSel: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L379 + ldr r3, [r3, r0, lsl #3] + str r1, [r3, #336] + bx lr +.L380: + .align 2 +.L379: + .word .LANCHOR0 + .fnend + .size NandcRandmzSel, .-NandcRandmzSel + .global __aeabi_idiv + .align 2 + .global NandcTimeCfg + .syntax unified + .arm + .fpu softvfp + .type NandcTimeCfg, %function +NandcTimeCfg: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, lr} + .save {r4, lr} + mov r4, r0 + mov r0, #0 + bl rknand_get_clk_rate + ldr r1, .L392 + bl __aeabi_idiv + ldr r3, .L392+4 + cmp r0, #250 + movwgt r2, #8354 + ldr r3, [r3, #88] + bgt .L390 + cmp r0, #220 + ble .L384 +.L391: + movw r2, #8322 + b .L390 +.L384: + cmp r0, #185 + movwgt r2, #4226 + bgt .L390 + cmp r0, #160 + movwgt r2, #4194 + bgt .L390 + cmp r4, #35 + movwls r2, #4193 + bls .L390 + cmp r4, #99 + movwls r2, #4225 + bhi .L391 +.L390: + str r2, [r3, #4] + pop {r4, pc} +.L393: + .align 2 +.L392: + .word 1000000 + .word .LANCHOR0 + .fnend + .size NandcTimeCfg, .-NandcTimeCfg + .align 2 + .global FlashTimingCfg + .syntax unified + .arm + .fpu softvfp + .type FlashTimingCfg, %function +FlashTimingCfg: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + sub r3, r0, #4160 + sub r3, r3, #33 + bic r3, r3, #32 + cmp r3, #1 + bls .L395 + movw r3, #8322 + cmp r0, r3 + bne .L396 +.L395: + ldr r3, .L397 + ldr r3, [r3, #88] + str r0, [r3, #4] +.L396: + ldr r3, .L397+4 + ldrb r0, [r3, #489] @ zero_extendqisi2 + b NandcTimeCfg +.L398: + .align 2 +.L397: + .word .LANCHOR0 + .word .LANCHOR1 + .fnend + .size FlashTimingCfg, .-FlashTimingCfg + .align 2 + .global NandcInit + .syntax unified + .arm + .fpu softvfp + .type NandcInit, %function +NandcInit: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L402 + mov r2, #1 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + mov r1, #0 + mov r5, #0 + mov r4, r3 + str r2, [r3, #12] + mov r2, #2 + str r2, [r3, #20] + mov r2, #3 + stm r3, {r0, r1} + str r0, [r3, #8] + str r0, [r3, #16] + str r0, [r3, #24] + str r0, [r3, #88] + str r2, [r3, #28] + ldr r2, [r0] + and r2, r2, #253952 + ubfx ip, r2, #13, #1 + bfi r2, r1, #13, #1 + ldr r1, [r0, #352] + orr r2, r2, #256 + str ip, [r3, #2260] + movw ip, #2049 + ubfx r1, r1, #16, #4 + str r1, [r3, #2264] + ldr r1, [r0, #352] + cmp r1, ip + str r1, [r3, #2268] + moveq r3, #8 + streq r3, [r4, #2264] + str r2, [r0] + mov r0, #40 + ldr r3, [r4, #88] + str r5, [r3, #336] + bl NandcTimeCfg + ldr r3, [r4, #88] + movw r2, #8322 + mov r0, #36864 + str r2, [r3, #344] + ldr r2, .L402+4 + str r2, [r3, #304] + bl ftl_malloc + str r0, [r4, #2272] + str r0, [r4, #2276] + add r0, r0, #32768 + str r0, [r4, #2280] + str r5, [r4, #2300] + str r5, [r4, #2308] + pop {r4, r5, r6, pc} +.L403: + .align 2 +.L402: + .word .LANCHOR0 + .word 1579009 + .fnend + .size NandcInit, .-NandcInit + .align 2 + .global NandcGetTimeCfg + .syntax unified + .arm + .fpu softvfp + .type NandcGetTimeCfg, %function +NandcGetTimeCfg: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr ip, .L406 + str lr, [sp, #-4]! + .save {lr} + ldr lr, [ip, #88] + ldr lr, [lr, #4] + str lr, [r0] + ldr r0, [ip, #88] + ldr r0, [r0] + str r0, [r1] + ldr r1, [ip, #88] + ldr r1, [r1, #304] + str r1, [r2] + ldr r1, [ip, #88] + ldr r2, [r1, #308] + ldr r1, [r1, #344] + uxtb r2, r2 + orr r2, r2, r1, lsl #16 + str r2, [r3] + ldr pc, [sp], #4 +.L407: + .align 2 +.L406: + .word .LANCHOR0 + .fnend + .size NandcGetTimeCfg, .-NandcGetTimeCfg + .align 2 + .global NandcBchSel + .syntax unified + .arm + .fpu softvfp + .type NandcBchSel, %function +NandcBchSel: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L416 + mov ip, #1 + mov r1, #0 + ldr r2, [r3, #88] + str r0, [r3, #2312] + mov r3, r1 + str ip, [r2, #8] + mov ip, #16 + cmp r0, ip + bfi r3, ip, #8, #8 + bfi r3, r1, #18, #1 + bne .L409 +.L412: + bfc r3, #4, #1 +.L410: + orr r3, r3, #1 + str r3, [r2, #12] + bx lr +.L409: + cmp r0, #24 + orreq r3, r3, #16 + beq .L410 + cmp r0, #40 + orr r3, r3, #262144 + orr r3, r3, #16 + bne .L410 + b .L412 +.L417: + .align 2 +.L416: + .word .LANCHOR0 + .fnend + .size NandcBchSel, .-NandcBchSel + .align 2 + .global FlashBchSel + .syntax unified + .arm + .fpu softvfp + .type FlashBchSel, %function +FlashBchSel: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L419 + strb r0, [r3, #2316] + b NandcBchSel +.L420: + .align 2 +.L419: + .word .LANCHOR0 + .fnend + .size FlashBchSel, .-FlashBchSel + .align 2 + .global ftl_flash_resume + .syntax unified + .arm + .fpu softvfp + .type ftl_flash_resume, %function +ftl_flash_resume: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L430 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + mov r5, #0 + ldr r6, .L430+4 + mov r4, r3 + ldr r2, [r3, #88] + ldr r1, [r3, #92] + str r1, [r2] + ldr r1, [r3, #96] + ldr r2, [r3, #88] + str r1, [r2, #4] + ldr r1, [r3, #100] + str r1, [r2, #8] + ldr r1, [r3, #104] + str r1, [r2, #12] + ldr r1, [r3, #108] + str r1, [r2, #304] + ldr r1, [r3, #112] + str r1, [r2, #308] + ldr r1, [r3, #116] + str r1, [r2, #336] + ldr r1, [r3, #120] + str r1, [r2, #344] +.L423: + ldrb r3, [r6, r5, lsl #3] @ zero_extendqisi2 + sub r3, r3, #1 + uxtb r3, r3 + cmp r3, #253 + bhi .L422 + uxtb r0, r5 + bl FlashReset +.L422: + add r5, r5, #1 + cmp r5, #4 + bne .L423 + ldrb r3, [r4, #2256] @ zero_extendqisi2 + cmp r3, #0 + beq .L424 + mov r0, #1 + bl NandcSetMode + ldrb r0, [r4, #2233] @ zero_extendqisi2 + bl FlashSetInterfaceMode + ldrb r0, [r4, #2233] @ zero_extendqisi2 + bl NandcSetMode + ldrb r0, [r4, #109] @ zero_extendqisi2 + bl NandcSetDdrPara +.L424: + ldr r3, [r4, #48] + pop {r4, r5, r6, lr} + ldrb r0, [r3, #20] @ zero_extendqisi2 + b FlashBchSel +.L431: + .align 2 +.L430: + .word .LANCHOR0 + .word .LANCHOR0+2072 + .fnend + .size ftl_flash_resume, .-ftl_flash_resume + .align 2 + .global ftl_nandc_get_irq_status + .syntax unified + .arm + .fpu softvfp + .type ftl_nandc_get_irq_status, %function +ftl_nandc_get_irq_status: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r0, [r0, #372] + bx lr + .fnend + .size ftl_nandc_get_irq_status, .-ftl_nandc_get_irq_status + .align 2 + .global rk_nandc_flash_ready + .syntax unified + .arm + .fpu softvfp + .type rk_nandc_flash_ready, %function +rk_nandc_flash_ready: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, [r0, #368] + orr r3, r3, #2 + str r3, [r0, #368] + ldr r3, [r0, #364] + bic r3, r3, #2 + str r3, [r0, #364] + bx lr + .fnend + .size rk_nandc_flash_ready, .-rk_nandc_flash_ready + .align 2 + .global NandcIqrWaitFlashReady + .syntax unified + .arm + .fpu softvfp + .type NandcIqrWaitFlashReady, %function +NandcIqrWaitFlashReady: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + bx lr + .fnend + .size NandcIqrWaitFlashReady, .-NandcIqrWaitFlashReady + .align 2 + .global rk_nandc_flash_xfer_completed + .syntax unified + .arm + .fpu softvfp + .type rk_nandc_flash_xfer_completed, %function +rk_nandc_flash_xfer_completed: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, [r0, #368] + orr r3, r3, #1 + str r3, [r0, #368] + ldr r3, [r0, #364] + bic r3, r3, #1 + str r3, [r0, #364] + bx lr + .fnend + .size rk_nandc_flash_xfer_completed, .-rk_nandc_flash_xfer_completed + .align 2 + .global NandcSendDumpDataStart + .syntax unified + .arm + .fpu softvfp + .type NandcSendDumpDataStart, %function +NandcSendDumpDataStart: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r2, [r0, #16] + .pad #8 + sub sp, sp, #8 + ldr r3, .L438 + str r2, [sp, #4] + ldr r2, [sp, #4] + bfc r2, #2, #1 + str r2, [sp, #4] + ldr r2, [sp, #4] + str r2, [r0, #16] + str r3, [r0, #8] + orr r3, r3, #4 + str r3, [r0, #8] + add sp, sp, #8 + @ sp needed + bx lr +.L439: + .align 2 +.L438: + .word 538969130 + .fnend + .size NandcSendDumpDataStart, .-NandcSendDumpDataStart + .align 2 + .global NandcSendDumpDataDone + .syntax unified + .arm + .fpu softvfp + .type NandcSendDumpDataDone, %function +NandcSendDumpDataDone: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + .pad #8 + sub sp, sp, #8 +.L441: + ldr r3, [r0, #8] + str r3, [sp, #4] + ldr r3, [sp, #4] + tst r3, #1048576 + beq .L441 + add sp, sp, #8 + @ sp needed + bx lr + .fnend + .size NandcSendDumpDataDone, .-NandcSendDumpDataDone + .align 2 + .global NandcXferStart + .syntax unified + .arm + .fpu softvfp + .type NandcXferStart, %function +NandcXferStart: + .fnstart + @ args = 8, pretend = 0, frame = 16 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov ip, #16 + ldr r4, .L463 + mov r5, #0 + .pad #20 + sub sp, sp, #20 + ldr r8, [sp, #56] + ldr r6, [r4, r0, lsl #3] + add r0, r4, r0, lsl #3 + ldr r7, [r6, #12] + ldrb r0, [r0, #4] @ zero_extendqisi2 + bfi r7, ip, #8, #8 + bfi r7, r5, #3, #1 + bfi r5, r1, #1, #1 + bfi r7, r0, #5, #3 + orr r5, r5, #8 + mov r0, #1 + bfi r5, r0, #5, #2 + lsr r3, r3, r0 + orr r5, r5, #536870912 + orr r5, r5, #1024 + bfi r5, r3, #4, #1 + ldr r3, [r4, #2264] + cmp r3, #3 + bls .L446 + ldr r3, [r6, #16] + str r3, [sp, #12] + ldr r3, [sp, #12] + bfc r3, #2, #1 + str r3, [sp, #12] + ldr r3, [sp, #60] + cmp r8, #0 + cmpeq r3, #0 + beq .L447 + cmp r1, #0 + bne .L448 +.L456: + add r2, r2, #1 + cmp r8, #0 + asr r2, r2, #1 + movne r0, r8 + bfi r5, r2, #22, #6 + ldreq r0, [r4, #2276] +.L450: + ldr r3, [r4, #2280] + ubfx r10, r5, #22, #5 + mov r9, r1 + mov r2, r1 + lsl r1, r10, #10 + str r0, [r4, #2284] + str r3, [r4, #2288] + bl rknand_dma_map_single + mov r2, r9 + str r0, [r4, #2292] + lsl r1, r10, #7 + ldr r0, [r4, #2288] + bl rknand_dma_map_single + mov r3, #1 + str r0, [r4, #2296] + str r3, [r4, #2300] + mov r2, #16 + ldr r3, [r4, #2292] + tst r8, #3 + clz r1, r9 + lsr r1, r1, #5 + str r3, [r6, #20] + ldr r3, [r4, #2296] + str r3, [r6, #24] + mov r3, #0 + str r3, [sp, #12] + ldr r3, [sp, #12] + bfi r3, r2, #9, #5 + moveq r2, #2 + str r3, [sp, #12] + ldr r3, [sp, #12] + orr r3, r3, #448 + str r3, [sp, #12] + ldreq r3, [sp, #12] + bfieq r3, r2, #3, #3 + streq r3, [sp, #12] + ldr r3, [sp, #12] + orr r3, r3, #4 + str r3, [sp, #12] + ldr r3, [sp, #12] + bfi r3, r1, #1, #1 + str r3, [sp, #12] + ldr r3, [sp, #12] + orr r3, r3, #1 + str r3, [sp, #12] +.L447: + ldr r3, [sp, #12] + str r3, [r6, #16] +.L446: + str r7, [r6, #12] + str r5, [r6, #8] + orr r5, r5, #4 + str r5, [r6, #8] + add sp, sp, #20 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L448: + ldr r3, [r4, #2312] + lsr r10, r2, #1 + ldr ip, [sp, #60] + cmp r3, #25 + movcc r3, #64 + movcs r3, #128 + str r3, [sp, #4] + mov r3, #0 + mov r0, r3 +.L452: + cmp r0, r10 + bcs .L456 + ldr lr, [sp, #60] + add r0, r0, #1 + cmp lr, #0 + bic lr, r3, #3 + ldrne fp, [ip], #4 @ unaligned + mvneq r9, #0 + ldrne r9, [r4, #2280] + ldreq fp, [r4, #2280] + strne fp, [r9, lr] + streq r9, [fp, lr] + ldr lr, [sp, #4] + add r3, r3, lr + b .L452 +.L464: + .align 2 +.L463: + .word .LANCHOR0 + .fnend + .size NandcXferStart, .-NandcXferStart + .align 2 + .global Ftl_log2 + .syntax unified + .arm + .fpu softvfp + .type Ftl_log2, %function +Ftl_log2: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + mov r1, #0 + mov r2, #1 +.L466: + cmp r2, r0 + uxth r3, r1 + add r1, r1, #1 + bls .L467 + sub r0, r3, #1 + uxth r0, r0 + bx lr +.L467: + lsl r2, r2, #1 + b .L466 + .fnend + .size Ftl_log2, .-Ftl_log2 + .align 2 + .global FtlPrintInfo + .syntax unified + .arm + .fpu softvfp + .type FtlPrintInfo, %function +FtlPrintInfo: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + bx lr + .fnend + .size FtlPrintInfo, .-FtlPrintInfo + .align 2 + .global FtlSysBlkNumInit + .syntax unified + .arm + .fpu softvfp + .type FtlSysBlkNumInit, %function +FtlSysBlkNumInit: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L470 + movw r2, #2324 + movw r1, #2334 + cmp r0, #24 + movcc r0, #24 + ldrh r2, [r3, r2] + ldrh r1, [r3, r1] + str r0, [r3, #2320] + mul r2, r0, r2 + sub r0, r1, r0 + movw r1, #2332 + strh r0, [r3, r1] @ movhi + mov r0, #0 + ldr r1, [r3, #2340] + str r2, [r3, #2328] + sub r2, r1, r2 + str r2, [r3, #2336] + bx lr +.L471: + .align 2 +.L470: + .word .LANCHOR0 + .fnend + .size FtlSysBlkNumInit, .-FtlSysBlkNumInit + .align 2 + .global FtlConstantsInit + .syntax unified + .arm + .fpu softvfp + .type FtlConstantsInit, %function +FtlConstantsInit: + .fnstart + @ args = 0, pretend = 0, frame = 16 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + movw r3, #2344 + ldr r4, .L500 + movw r1, #2348 + mov r5, r0 + .pad #20 + sub sp, sp, #20 + ldrh r6, [r0, #8] + ldrh r2, [r0, #10] + ldrh lr, [r0, #14] + strh r6, [r4, r3] @ movhi + movw r3, #2346 + strh r2, [r4, r3] @ movhi + ldrh r3, [r0, #12] + ldr r0, .L500+4 + strh r3, [r4, r1] @ movhi + movw r1, #2334 + strh lr, [r4, r1] @ movhi + mov r1, #0 +.L473: + strb r1, [r1, r0] + add r1, r1, #1 + cmp r1, #32 + bne .L473 + ldrh r0, [r5, #14] + ldrh r1, [r5, #20] + cmp r1, r0, lsr #8 + bcs .L474 + uxtb r10, r3 + ldr r9, .L500+4 + lsl r1, r10, #1 + uxtb r1, r1 + str r1, [sp] + sub r1, r2, #1 + mul r1, r3, r1 + str r1, [sp, #8] + mov r1, #0 +.L475: + cmp r1, r3 + bcs .L477 + ldr ip, [sp, #8] + sub r7, r1, r3 + add r7, r9, r7 + uxtb r0, r1 + str r7, [sp, #12] + add ip, r1, ip + add ip, r9, ip + str ip, [sp, #4] + mov ip, #0 + mov r8, ip + b .L478 +.L476: + ldr r7, [sp, #12] + add fp, r10, r0 + add r8, r8, #1 + strb r0, [r7, ip] + ldr r7, [sp, #4] + strb fp, [r7, ip] + ldr r7, [sp] + add r0, r7, r0 + uxtb r0, r0 +.L478: + cmp r8, r2 + add ip, ip, r3 + bcc .L476 + add r1, r1, #1 + b .L475 +.L477: + lsl r2, r2, #1 + movw r1, #2346 + lsr lr, lr, #1 + strh r2, [r4, r1] @ movhi + movw r2, #2334 + strh lr, [r4, r2] @ movhi +.L474: + ldr fp, .L500+8 + movw r2, #2382 + ldrb r9, [r4, #36] @ zero_extendqisi2 + mov r1, #5 + strh r1, [r4, r2] @ movhi + cmp r6, #1 + mov r1, #0 + strheq r6, [r4, r2] @ movhi + strh r1, [fp] @ movhi + cmp r9, #0 + mov r1, #4352 + movw r2, #2386 + strh r1, [r4, r2] @ movhi + movne r1, #384 + strhne r1, [r4, r2] @ movhi + movw r2, #2346 + ldrh r7, [r4, r2] + movw r2, #2324 + ldrh r8, [r5, #16] + ldrh r1, [r5, #18] + smulbb r7, r7, r3 + str r1, [sp, #4] + uxth r7, r7 + strh r7, [r4, r2] @ movhi + movw r2, #2334 + ldrh r6, [r4, r2] + movw r2, #2388 + smulbb r3, r3, r6 + strh r3, [r4, r2] @ movhi + smulbb r2, r7, r8 + movw r3, #2390 + strh r8, [r4, r3] @ movhi + movw r3, #2392 + strh r1, [r4, r3] @ movhi + movw r3, #2394 + strh r2, [r4, r3] @ movhi + movw r2, #2396 + ldrh r3, [r5, #20] + mov r0, r3 + strh r3, [r4, r2] @ movhi + str r3, [sp] + bl Ftl_log2 + ldr r3, [sp] + movw r2, #2398 + strh r0, [r4, r2] @ movhi + mov r10, r0 + ldr r0, .L500+12 + cmp r6, #1024 + ldr r1, [sp, #4] + lsl r2, r3, #9 + uxth r2, r2 + mul r1, r3, r1 + strh r2, [r0] @ movhi + lsr r2, r2, #8 + movw r0, #2402 + strh r2, [r4, r0] @ movhi + movw r2, #2404 + ldrh r0, [r5, #26] + strh r0, [r4, r2] @ movhi + mul r2, r6, r7 + str r2, [r4, #2340] + uxtbhi r2, r6 + strhhi r2, [fp] @ movhi + ldrh r2, [fp] + sub r2, r6, r2 + lsl r6, r6, #6 + mul r2, r7, r2 + mul r2, r3, r2 + mul r8, r8, r2 + movw r2, #2386 + ldrh r0, [r4, r2] + asr r8, r8, #11 + lsl r0, r0, #3 + str r8, [r4, #2408] + bl __aeabi_idiv + uxth r0, r0 + movw r3, #2412 + mov r1, r7 + cmp r0, #4 + movls r2, #4 + strhhi r0, [r4, r3] @ movhi + strhls r2, [r4, r3] @ movhi + cmp r9, #0 + movne r2, #640 + movwne r3, #2386 + strhne r2, [r4, r3] @ movhi + movw r3, #2386 + ldrh r3, [r4, r3] + movw r2, #2414 + asr r3, r3, r10 + add r10, r10, #9 + asr r6, r6, r10 + add r3, r3, #2 + strh r3, [r4, r2] @ movhi + ldr r3, .L500+16 + strh r6, [r3] @ movhi + uxth r6, r6 + mul r3, r6, r7 + add r6, r6, #8 + str r3, [r4, #2420] + movw r3, #2412 + ldrh r0, [r4, r3] + bl __aeabi_uidiv + uxtah r0, r6, r0 + cmp r7, #1 + add r3, r4, #2320 + addeq r0, r0, #4 + str r0, [r4, #2320] + ldrh r0, [r3] + bl FtlSysBlkNumInit + ldr r5, [r4, #2336] + movw r2, #2390 + ldr r3, [r4, #2320] + mov r0, #2048 + str r3, [r4, #2424] + lsl r3, r5, #2 + ldrh r5, [r4, r2] + mul r5, r5, r3 + movw r3, #2398 + ldrh r3, [r4, r3] + add r3, r3, #9 + lsr r5, r5, r3 + movw r3, #2428 + add r5, r5, #2 + uxth r5, r5 + strh r5, [r4, r3] @ movhi + movw r3, #2396 + ldrh r6, [r4, r3] + mov r1, r6 + bl __aeabi_idiv + movw r1, #2412 + movw r3, #2430 + ldrh r2, [r4, r1] + strh r0, [r4, r3] @ movhi + mov r3, #0 + str r3, [r4, #2432] + ldrb ip, [r4, #152] @ zero_extendqisi2 + add r3, r2, #3 + strh r3, [r4, r1] @ movhi + ldr r3, [r4, #2420] + cmp ip, #0 + addne r2, r2, #4 + add r0, r3, #3 + strhne r2, [r4, r1] @ movhi + str r0, [r4, #2420] + addne r3, r3, #5 + bne .L499 + cmp r0, #7 + bhi .L488 + mov r3, #8 +.L499: + str r3, [r4, #2420] +.L488: + movw r2, #2436 + mov r3, #0 + strh r3, [r4, r2] @ movhi + movw r3, #2332 + ldrh r1, [r4, r3] + mov r0, #0 + lsr r3, r1, #3 + add r3, r3, r1, lsl #1 + add r3, r3, #52 + add r5, r3, r5, lsl #2 + cmp r5, r6, lsl #9 + movcc r3, #1 + strhcc r3, [r4, r2] @ movhi + add sp, sp, #20 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L501: + .align 2 +.L500: + .word .LANCHOR0 + .word .LANCHOR0+2350 + .word .LANCHOR0+2384 + .word .LANCHOR0+2400 + .word .LANCHOR0+2416 + .fnend + .size FtlConstantsInit, .-FtlConstantsInit + .align 2 + .global IsBlkInVendorPart + .syntax unified + .arm + .fpu softvfp + .type IsBlkInVendorPart, %function +IsBlkInVendorPart: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r2, .L509 + movw r3, #2438 + ldrh r3, [r2, r3] + cmp r3, #0 + beq .L508 + movw r1, #2412 + ldr r3, [r2, #2440] + ldrh r2, [r2, r1] + add r2, r3, r2, lsl #1 +.L504: + cmp r3, r2 + bne .L505 +.L508: + mov r0, #0 + bx lr +.L505: + ldrh r1, [r3], #2 + cmp r0, r1 + bne .L504 + mov r0, #1 + bx lr +.L510: + .align 2 +.L509: + .word .LANCHOR0 + .fnend + .size IsBlkInVendorPart, .-IsBlkInVendorPart + .align 2 + .global FtlCacheMetchLpa + .syntax unified + .arm + .fpu softvfp + .type FtlCacheMetchLpa, %function +FtlCacheMetchLpa: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r2, .L521 + ldr r3, [r2, #2444] + cmp r3, #0 + beq .L514 + push {r4, r5, lr} + .save {r4, r5, lr} + mov r5, #36 + ldr r4, [r2, #2448] + mov r2, #0 +.L513: + mla ip, r5, r2, r4 + ldr lr, [ip, #16] + cmp lr, r1 + movhi ip, #0 + movls ip, #1 + cmp lr, r0 + movcc ip, #0 + cmp ip, #0 + bne .L515 + add r2, r2, #1 + cmp r3, r2 + bne .L513 + mov r0, ip + pop {r4, r5, pc} +.L514: + mov r0, r3 + bx lr +.L515: + mov r0, #1 + pop {r4, r5, pc} +.L522: + .align 2 +.L521: + .word .LANCHOR0 + .fnend + .size FtlCacheMetchLpa, .-FtlCacheMetchLpa + .align 2 + .global FtlGetCap + .syntax unified + .arm + .fpu softvfp + .type FtlGetCap, %function +FtlGetCap: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L524 + ldr r0, [r3, #2432] + bx lr +.L525: + .align 2 +.L524: + .word .LANCHOR0 + .fnend + .size FtlGetCap, .-FtlGetCap + .align 2 + .global FtlGetCapacity + .syntax unified + .arm + .fpu softvfp + .type FtlGetCapacity, %function +FtlGetCapacity: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L527 + ldr r0, [r3, #2432] + bx lr +.L528: + .align 2 +.L527: + .word .LANCHOR0 + .fnend + .size FtlGetCapacity, .-FtlGetCapacity + .align 2 + .global ftl_get_density + .syntax unified + .arm + .fpu softvfp + .type ftl_get_density, %function +ftl_get_density: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L530 + ldr r0, [r3, #2432] + bx lr +.L531: + .align 2 +.L530: + .word .LANCHOR0 + .fnend + .size ftl_get_density, .-ftl_get_density + .align 2 + .global FtlGetLpn + .syntax unified + .arm + .fpu softvfp + .type FtlGetLpn, %function +FtlGetLpn: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L533 + ldr r0, [r3, #2452] + bx lr +.L534: + .align 2 +.L533: + .word .LANCHOR0 + .fnend + .size FtlGetLpn, .-FtlGetLpn + .align 2 + .global FtlBbmMapBadBlock + .syntax unified + .arm + .fpu softvfp + .type FtlBbmMapBadBlock, %function +FtlBbmMapBadBlock: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r4, r5, r6, r7, lr} + .save {r4, r5, r6, r7, lr} + .pad #12 + movw r3, #2388 + ldr r4, .L537 + mov r5, r0 + ldrh r7, [r4, r3] + mov r1, r7 + bl __aeabi_uidiv + uxth r6, r0 + mov r1, r7 + mov r0, r5 + bl __aeabi_uidivmod + add r2, r4, r6, lsl #2 + uxth r3, r1 + ldr r2, [r2, #2484] + lsr r1, r3, #5 + and ip, r3, #31 + mov lr, #1 + ldr r0, [r2, r1, lsl #2] + orr r0, r0, lr, lsl ip + str r0, [r2, r1, lsl #2] + mov r2, r6 + str r0, [sp] + mov r1, r5 + ldr r0, .L537+4 + bl printk + add r3, r4, #2448 + mov r0, #0 + ldrh r2, [r3, #14] + add r2, r2, #1 + strh r2, [r3, #14] @ movhi + add sp, sp, #12 + @ sp needed + pop {r4, r5, r6, r7, pc} +.L538: + .align 2 +.L537: + .word .LANCHOR0 + .word .LC2 + .fnend + .size FtlBbmMapBadBlock, .-FtlBbmMapBadBlock + .align 2 + .global FtlBbmIsBadBlock + .syntax unified + .arm + .fpu softvfp + .type FtlBbmIsBadBlock, %function +FtlBbmIsBadBlock: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + movw r3, #2388 + ldr r5, .L541 + mov r7, r0 + ldrh r6, [r5, r3] + mov r1, r6 + bl __aeabi_uidivmod + mov r0, r7 + uxth r4, r1 + mov r1, r6 + bl __aeabi_uidiv + uxth r0, r0 + lsr r2, r4, #5 + add r5, r5, r0, lsl #2 + and r4, r4, #31 + ldr r3, [r5, #2484] + ldr r0, [r3, r2, lsl #2] + lsr r0, r0, r4 + and r0, r0, #1 + pop {r4, r5, r6, r7, r8, pc} +.L542: + .align 2 +.L541: + .word .LANCHOR0 + .fnend + .size FtlBbmIsBadBlock, .-FtlBbmIsBadBlock + .align 2 + .global FtlBbtInfoPrint + .syntax unified + .arm + .fpu softvfp + .type FtlBbtInfoPrint, %function +FtlBbtInfoPrint: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + bx lr + .fnend + .size FtlBbtInfoPrint, .-FtlBbtInfoPrint + .align 2 + .global FtlBbtCalcTotleCnt + .syntax unified + .arm + .fpu softvfp + .type FtlBbtCalcTotleCnt, %function +FtlBbtCalcTotleCnt: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L552 + movw r2, #2388 + movw r1, #2346 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + mov r5, #0 + mov r4, r5 + ldrh r2, [r3, r2] + ldrh r6, [r3, r1] + mul r6, r6, r2 +.L545: + uxth r0, r5 + cmp r0, r6 + blt .L547 + mov r0, r4 + pop {r4, r5, r6, pc} +.L547: + bl FtlBbmIsBadBlock + cmp r0, #0 + add r5, r5, #1 + addne r4, r4, #1 + uxthne r4, r4 + b .L545 +.L553: + .align 2 +.L552: + .word .LANCHOR0 + .fnend + .size FtlBbtCalcTotleCnt, .-FtlBbtCalcTotleCnt + .align 2 + .global V2P_block + .syntax unified + .arm + .fpu softvfp + .type V2P_block, %function +V2P_block: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + movw r3, #2348 + ldr r4, .L556 + mov r5, r1 + mov r7, r0 + ldrh r6, [r4, r3] + mov r1, r6 + bl __aeabi_uidiv + movw r3, #2388 + smulbb r5, r6, r5 + ldrh r4, [r4, r3] + mov r1, r6 + smulbb r4, r4, r0 + mov r0, r7 + bl __aeabi_uidivmod + add r0, r5, r1 + add r0, r4, r0 + uxth r0, r0 + pop {r4, r5, r6, r7, r8, pc} +.L557: + .align 2 +.L556: + .word .LANCHOR0 + .fnend + .size V2P_block, .-V2P_block + .align 2 + .global P2V_plane + .syntax unified + .arm + .fpu softvfp + .type P2V_plane, %function +P2V_plane: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L560 + movw r2, #2348 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + mov r6, r0 + ldrh r5, [r3, r2] + movw r2, #2388 + ldrh r1, [r3, r2] + bl __aeabi_uidiv + mov r1, r5 + smulbb r4, r0, r5 + mov r0, r6 + bl __aeabi_uidivmod + add r1, r4, r1 + uxth r0, r1 + pop {r4, r5, r6, pc} +.L561: + .align 2 +.L560: + .word .LANCHOR0 + .fnend + .size P2V_plane, .-P2V_plane + .align 2 + .global P2V_block_in_plane + .syntax unified + .arm + .fpu softvfp + .type P2V_block_in_plane, %function +P2V_block_in_plane: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, lr} + .save {r4, lr} + movw r3, #2388 + ldr r4, .L564 + ldrh r1, [r4, r3] + bl __aeabi_uidivmod + movw r3, #2348 + uxth r0, r1 + ldrh r1, [r4, r3] + bl __aeabi_uidiv + uxth r0, r0 + pop {r4, pc} +.L565: + .align 2 +.L564: + .word .LANCHOR0 + .fnend + .size P2V_block_in_plane, .-P2V_block_in_plane + .align 2 + .global ftl_cmp_data_ver + .syntax unified + .arm + .fpu softvfp + .type ftl_cmp_data_ver, %function +ftl_cmp_data_ver: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + cmp r0, r1 + bls .L567 + sub r0, r0, r1 + cmp r0, #-2147483648 + movhi r0, #0 + movls r0, #1 + bx lr +.L567: + sub r0, r1, r0 + cmp r0, #-2147483648 + movls r0, #0 + movhi r0, #1 + bx lr + .fnend + .size ftl_cmp_data_ver, .-ftl_cmp_data_ver + .align 2 + .global FtlFreeSysBlkQueueEmpty + .syntax unified + .arm + .fpu softvfp + .type FtlFreeSysBlkQueueEmpty, %function +FtlFreeSysBlkQueueEmpty: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L570 + ldrh r0, [r3, #6] + clz r0, r0 + lsr r0, r0, #5 + bx lr +.L571: + .align 2 +.L570: + .word .LANCHOR0+2516 + .fnend + .size FtlFreeSysBlkQueueEmpty, .-FtlFreeSysBlkQueueEmpty + .align 2 + .global FtlFreeSysBlkQueueFull + .syntax unified + .arm + .fpu softvfp + .type FtlFreeSysBlkQueueFull, %function +FtlFreeSysBlkQueueFull: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L573 + ldrh r0, [r3, #6] + sub r0, r0, #1024 + clz r0, r0 + lsr r0, r0, #5 + bx lr +.L574: + .align 2 +.L573: + .word .LANCHOR0+2516 + .fnend + .size FtlFreeSysBlkQueueFull, .-FtlFreeSysBlkQueueFull + .align 2 + .global FtlFreeSysBlkQueueIn + .syntax unified + .arm + .fpu softvfp + .type FtlFreeSysBlkQueueIn, %function +FtlFreeSysBlkQueueIn: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + sub r3, r0, #1 + movw r2, #65533 + uxth r3, r3 + cmp r3, r2 + bxhi lr + push {r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + ldr r4, .L588 + ldrh r3, [r4, #6] + cmp r3, #1024 + popeq {r4, r5, r6, r7, r8, pc} + cmp r1, #0 + mov r5, r0 + beq .L577 + ldr r6, .L588+4 + ldr r3, [r6, #-3612] + cmp r3, #0 + bne .L577 + bl P2V_block_in_plane + mov r7, r0 + ldr r0, [r6, #-3608] + lsl r3, r5, #10 + mov r2, #1 + mov r1, r2 + str r3, [r0, #4] + bl FlashEraseBlocks + ldr r2, [r6, #-3604] + lsl r0, r7, #1 + ldrh r3, [r2, r0] + add r3, r3, #1 + strh r3, [r2, r0] @ movhi + ldr r3, [r6, #-3600] + add r3, r3, #1 + str r3, [r6, #-3600] +.L577: + ldrh r3, [r4, #6] + add r3, r3, #1 + strh r3, [r4, #6] @ movhi + ldrh r3, [r4, #4] + add r2, r4, r3, lsl #1 + add r3, r3, #1 + ubfx r3, r3, #0, #10 + strh r5, [r2, #8] @ movhi + strh r3, [r4, #4] @ movhi + pop {r4, r5, r6, r7, r8, pc} +.L589: + .align 2 +.L588: + .word .LANCHOR0+2516 + .word .LANCHOR2 + .fnend + .size FtlFreeSysBlkQueueIn, .-FtlFreeSysBlkQueueIn + .align 2 + .global FtlFreeSysBLkSort + .syntax unified + .arm + .fpu softvfp + .type FtlFreeSysBLkSort, %function +FtlFreeSysBLkSort: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L603 + ldrh r2, [r3, #6] + cmp r2, #0 + bxeq lr + ldr r2, .L603+4 + mov r0, #0 + push {r4, lr} + .save {r4, lr} + mov r4, r0 + ldrh r1, [r3, #2] + ldrh lr, [r2, #28] + ldrh r2, [r3, #4] + and lr, lr, #31 +.L592: + uxth ip, r0 + add r0, r0, #1 + cmp lr, ip + bgt .L593 + cmp r4, #0 + strhne r1, [r3, #2] @ movhi + strhne r2, [r3, #4] @ movhi + pop {r4, pc} +.L593: + add ip, r3, r1, lsl #1 + add r1, r1, #1 + ubfx r1, r1, #0, #10 + ldrh r4, [ip, #8] + add ip, r3, r2, lsl #1 + strh r4, [ip, #8] @ movhi + mov r4, #1 + add r2, r2, r4 + ubfx r2, r2, #0, #10 + b .L592 +.L604: + .align 2 +.L603: + .word .LANCHOR0+2516 + .word .LANCHOR2-3596 + .fnend + .size FtlFreeSysBLkSort, .-FtlFreeSysBLkSort + .align 2 + .global FtlFreeSysBlkQueueOut + .syntax unified + .arm + .fpu softvfp + .type FtlFreeSysBlkQueueOut, %function +FtlFreeSysBlkQueueOut: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + ldr r4, .L616 + ldr r8, .L616+4 + mov r7, r4 +.L606: + ldrh r1, [r4, #6] + cmp r1, #0 + beq .L607 + ldr r5, .L616+8 + sub r1, r1, #1 + ldrh r3, [r4, #2] + strh r1, [r4, #6] @ movhi + ldr r10, [r5, #-3612] + add r2, r4, r3, lsl #1 + add r3, r3, #1 + cmp r10, #0 + ubfx r3, r3, #0, #10 + ldrh r6, [r2, #8] + strh r3, [r4, #2] @ movhi + bne .L608 + mov r0, r6 + bl P2V_block_in_plane + mov r9, r0 + ldr r0, [r5, #-3608] + lsl r3, r6, #10 + str r3, [r0, #4] + ldrb r3, [r8, #152] @ zero_extendqisi2 + cmp r3, #0 + beq .L609 + mov r2, #1 + mov r1, r10 + bl FlashEraseBlocks +.L609: + mov r2, #1 + ldr r0, [r5, #-3608] + mov r1, r2 + bl FlashEraseBlocks + ldr r2, [r5, #-3604] + lsl r0, r9, #1 + ldrh r3, [r2, r0] + add r3, r3, #1 + strh r3, [r2, r0] @ movhi + ldr r3, [r5, #-3600] + add r3, r3, #1 + str r3, [r5, #-3600] +.L608: + sub r3, r6, #1 + movw r2, #65533 + uxth r3, r3 + cmp r3, r2 + bls .L611 + ldrh r2, [r7, #6] + mov r1, r6 + ldr r0, .L616+12 + bl printk + b .L606 +.L607: + ldr r0, .L616+16 + bl printk +.L610: + b .L610 +.L611: + mov r0, r6 + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L617: + .align 2 +.L616: + .word .LANCHOR0+2516 + .word .LANCHOR0 + .word .LANCHOR2 + .word .LC4 + .word .LC3 + .fnend + .size FtlFreeSysBlkQueueOut, .-FtlFreeSysBlkQueueOut + .align 2 + .global test_node_in_list + .syntax unified + .arm + .fpu softvfp + .type test_node_in_list, %function +test_node_in_list: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L624 + str lr, [sp, #-4]! + .save {lr} + movw lr, #65535 + ldr r2, [r0] + ldr ip, [r3, #-3548] + sub r3, r2, ip + asr r0, r3, #1 + ldr r3, .L624+4 + mul r3, r3, r0 + mov r0, #6 + uxth r3, r3 +.L620: + cmp r3, r1 + beq .L621 + ldrh r3, [r2] + cmp r3, lr + beq .L622 + mla r2, r0, r3, ip + b .L620 +.L621: + mov r0, #1 + ldr pc, [sp], #4 +.L622: + mov r0, #0 + ldr pc, [sp], #4 +.L625: + .align 2 +.L624: + .word .LANCHOR2 + .word -1431655765 + .fnend + .size test_node_in_list, .-test_node_in_list + .align 2 + .global insert_data_list + .syntax unified + .arm + .fpu softvfp + .type insert_data_list, %function +insert_data_list: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #12 + movw r3, #2332 + ldr r4, .L642 + ldrh r3, [r4, r3] + cmp r3, r0 + bls .L628 + ldr r2, .L642+4 + mov lr, #6 + mul lr, lr, r0 + mvn ip, #0 + ldr r6, [r2, #-3548] + mov r5, r2 + add r1, r6, lr + strh ip, [r1, #2] @ movhi + strh ip, [r6, lr] @ movhi + ldr r3, [r2, #-3544] + cmp r3, #0 + streq r1, [r2, #-3544] + beq .L628 + ldr r8, [r2, #-3540] + lsl r10, r0, #1 + ldrh r2, [r1, #4] + ldrh r7, [r8, r10] + cmp r2, #0 + mulne ip, r2, r7 + ldr r7, [r5, #-3548] + sub r2, r3, r7 + asr r9, r2, #1 + ldr r2, .L642+8 + mul r2, r2, r9 + movw r9, #2332 + ldrh r4, [r4, r9] + ldr r9, [r5, #-3604] + str r4, [sp] + uxth r2, r2 + add r4, r9, r10 + str r4, [sp, #4] + mov r4, #0 +.L637: + ldr r5, [sp] + add r4, r4, #1 + uxth r4, r4 + cmp r4, r5 + movls r5, #0 + movhi r5, #1 + cmp r0, r2 + orreq r5, r5, #1 + cmp r5, #0 + bne .L628 + lsl r10, r2, #1 + ldrh r5, [r3, #4] + ldrh fp, [r8, r10] + cmp r5, #0 + mvneq r5, #0 + mulne r5, r5, fp + cmp ip, r5 + bne .L633 + ldr r5, [sp, #4] + ldrh r10, [r9, r10] + ldrh r5, [r5] + cmp r10, r5 + bcc .L635 +.L634: + strh r2, [r6, lr] @ movhi + ldr ip, .L642+4 + ldrh r2, [r3, #2] + strh r2, [r1, #2] @ movhi + ldr r2, [ip, #-3544] + cmp r3, r2 + ldrhne lr, [r3, #2] + movne r2, #6 + ldrne r1, [ip, #-3548] + strheq r0, [r3, #2] @ movhi + streq r1, [ip, #-3544] + mulne r2, r2, lr + strhne r0, [r1, r2] @ movhi + strhne r0, [r3, #2] @ movhi + b .L628 +.L633: + bcc .L634 +.L635: + ldrh r5, [r3] + movw r10, #65535 + cmp r5, r10 + bne .L636 + strh r2, [r1, #2] @ movhi + strh r0, [r3] @ movhi + ldr r3, .L642+4 + str r1, [r3, #-3536] +.L628: + mov r0, #0 + add sp, sp, #12 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L636: + mov r3, #6 + mov r2, r5 + mla r3, r3, r5, r7 + b .L637 +.L643: + .align 2 +.L642: + .word .LANCHOR0 + .word .LANCHOR2 + .word -1431655765 + .fnend + .size insert_data_list, .-insert_data_list + .align 2 + .global INSERT_DATA_LIST + .syntax unified + .arm + .fpu softvfp + .type INSERT_DATA_LIST, %function +INSERT_DATA_LIST: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, lr} + .save {r4, lr} + bl insert_data_list + ldr r2, .L646 + ldrh r3, [r2, #-12] + add r3, r3, #1 + strh r3, [r2, #-12] @ movhi + pop {r4, pc} +.L647: + .align 2 +.L646: + .word .LANCHOR2-3520 + .fnend + .size INSERT_DATA_LIST, .-INSERT_DATA_LIST + .align 2 + .global insert_free_list + .syntax unified + .arm + .fpu softvfp + .type insert_free_list, %function +insert_free_list: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + movw r4, #65535 + cmp r0, r4 + beq .L649 + ldr r2, .L656 + mov r1, #6 + mul r5, r1, r0 + mvn r3, #0 + ldr r6, [r2, #-3548] + mov ip, r2 + add lr, r6, r5 + strh r3, [lr, #2] @ movhi + strh r3, [r6, r5] @ movhi + ldr r3, [r2, #-3528] + cmp r3, #0 + streq lr, [r2, #-3528] + beq .L649 + ldr r8, [r2, #-3604] + lsl r2, r0, #1 + ldr r7, [ip, #-3548] + ldrh r9, [r8, r2] + sub r2, r3, r7 + asr r10, r2, #1 + ldr r2, .L656+4 + mul r2, r2, r10 + mov r10, r1 + uxth r2, r2 +.L653: + lsl r1, r2, #1 + ldrh r1, [r8, r1] + cmp r1, r9 + bcs .L651 + ldrh r1, [r3] + cmp r1, r4 + bne .L652 + strh r2, [lr, #2] @ movhi + strh r0, [r3] @ movhi +.L649: + mov r0, #0 + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L652: + mla r3, r10, r1, r7 + mov r2, r1 + b .L653 +.L651: + ldrh r1, [r3, #2] + strh r1, [lr, #2] @ movhi + strh r2, [r6, r5] @ movhi + ldr r2, [ip, #-3528] + cmp r3, r2 + ldrhne lr, [r3, #2] + movne r2, #6 + ldrne r1, [ip, #-3548] + strheq r0, [r3, #2] @ movhi + streq lr, [ip, #-3528] + mulne r2, r2, lr + strhne r0, [r1, r2] @ movhi + strhne r0, [r3, #2] @ movhi + b .L649 +.L657: + .align 2 +.L656: + .word .LANCHOR2 + .word -1431655765 + .fnend + .size insert_free_list, .-insert_free_list + .align 2 + .global INSERT_FREE_LIST + .syntax unified + .arm + .fpu softvfp + .type INSERT_FREE_LIST, %function +INSERT_FREE_LIST: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, lr} + .save {r4, lr} + bl insert_free_list + ldr r2, .L660 + ldrh r3, [r2, #-4] + add r3, r3, #1 + strh r3, [r2, #-4] @ movhi + pop {r4, pc} +.L661: + .align 2 +.L660: + .word .LANCHOR2-3520 + .fnend + .size INSERT_FREE_LIST, .-INSERT_FREE_LIST + .align 2 + .global List_remove_node + .syntax unified + .arm + .fpu softvfp + .type List_remove_node, %function +List_remove_node: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, lr} + .save {r4, r5, lr} + mov ip, #6 + ldr r4, .L668 + mul r1, ip, r1 + movw r5, #65535 + ldr r3, [r0] + ldr r2, [r4, #-3548] + add lr, r2, r1 + cmp lr, r3 + ldrh r3, [r2, r1] + bne .L663 + cmp r3, r5 + mlane r3, ip, r3, r2 + moveq r3, #0 + streq r3, [r0] + strne r3, [r0] + mvnne r0, #0 + strhne r0, [r3, #2] @ movhi +.L665: + mvn r3, #0 + mov r0, #0 + strh r3, [r2, r1] @ movhi + strh r3, [lr, #2] @ movhi + pop {r4, r5, pc} +.L663: + cmp r3, r5 + ldrh r0, [lr, #2] + bne .L666 + cmp r0, r3 + mulne r3, ip, r0 + mvnne r0, #0 + strhne r0, [r2, r3] @ movhi + b .L665 +.L666: + mla r3, ip, r3, r2 + strh r0, [r3, #2] @ movhi + ldrh r3, [lr, #2] + ldrh r5, [r2, r1] + ldr r0, [r4, #-3548] + mul r3, ip, r3 + strh r5, [r0, r3] @ movhi + b .L665 +.L669: + .align 2 +.L668: + .word .LANCHOR2 + .fnend + .size List_remove_node, .-List_remove_node + .align 2 + .global List_pop_index_node + .syntax unified + .arm + .fpu softvfp + .type List_pop_index_node, %function +List_pop_index_node: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, [r0] + cmp r3, #0 + beq .L676 + ldr r2, .L681 + push {r4, lr} + .save {r4, lr} + movw lr, #65535 + mov r4, #6 + ldr r2, [r2, #-3548] +.L672: + cmp r1, #0 + bne .L673 +.L675: + ldr r4, .L681+4 + sub r3, r3, r2 + asr r3, r3, #1 + mul r4, r4, r3 + uxth r1, r4 + bl List_remove_node + uxth r0, r4 + pop {r4, pc} +.L673: + ldrh ip, [r3] + cmp ip, lr + beq .L675 + sub r1, r1, #1 + mla r3, r4, ip, r2 + uxth r1, r1 + b .L672 +.L676: + movw r0, #65535 + bx lr +.L682: + .align 2 +.L681: + .word .LANCHOR2 + .word -1431655765 + .fnend + .size List_pop_index_node, .-List_pop_index_node + .align 2 + .global List_get_gc_head_node + .syntax unified + .arm + .fpu softvfp + .type List_get_gc_head_node, %function +List_get_gc_head_node: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r2, .L689 + ldr r3, [r2, #-3544] + cmp r3, #0 + ldrne r1, [r2, #-3548] + movne ip, #6 + movwne r2, #65535 + bne .L685 +.L688: + movw r0, #65535 + bx lr +.L687: + sub r0, r0, #1 + mla r3, ip, r3, r1 + uxth r0, r0 +.L685: + cmp r0, #0 + beq .L686 + ldrh r3, [r3] + cmp r3, r2 + bne .L687 + b .L688 +.L686: + ldr r0, .L689+4 + sub r3, r3, r1 + asr r3, r3, #1 + mul r3, r0, r3 + uxth r0, r3 + bx lr +.L690: + .align 2 +.L689: + .word .LANCHOR2 + .word -1431655765 + .fnend + .size List_get_gc_head_node, .-List_get_gc_head_node + .align 2 + .global List_update_data_list + .syntax unified + .arm + .fpu softvfp + .type List_update_data_list, %function +List_update_data_list: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L699 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + sub r5, r3, #3520 + ldrh r2, [r5] + cmp r2, r0 + beq .L692 + sub r2, r3, #3472 + ldrh r2, [r2] + cmp r2, r0 + beq .L692 + sub r2, r3, #3424 + ldrh r2, [r2] + cmp r2, r0 + beq .L692 + mov lr, #6 + ldr r1, [r3, #-3548] + mul lr, lr, r0 + ldr r2, [r3, #-3544] + add ip, r1, lr + cmp ip, r2 + beq .L692 + ldr r4, [r3, #-3540] + lsl r3, r0, #1 + ldrh r2, [ip, #4] + ldrh r3, [r4, r3] + cmp r2, #0 + mvneq r2, #0 + mulne r2, r2, r3 + ldrh r3, [ip, #2] + movw ip, #65535 + cmp r3, ip + bne .L694 + ldrh ip, [r1, lr] + cmp ip, r3 + beq .L692 +.L694: + mov ip, #6 + mul ip, ip, r3 + ldr r3, .L699+4 + asr lr, ip, #1 + add r1, r1, ip + mul r3, r3, lr + lsl r3, r3, #1 + ldrh lr, [r4, r3] + ldrh r3, [r1, #4] + cmp r3, #0 + mulne r3, r3, lr + mvneq r3, #0 + cmp r2, r3 + bcs .L692 + mov r4, r0 + mov r1, r0 + ldr r0, .L699+8 + bl List_remove_node + ldrh r3, [r5, #-12] + mov r0, r4 + sub r3, r3, #1 + strh r3, [r5, #-12] @ movhi + bl INSERT_DATA_LIST +.L692: + mov r0, #0 + pop {r4, r5, r6, pc} +.L700: + .align 2 +.L699: + .word .LANCHOR2 + .word -1431655765 + .word .LANCHOR2-3544 + .fnend + .size List_update_data_list, .-List_update_data_list + .align 2 + .global ftl_map_blk_alloc_new_blk + .syntax unified + .arm + .fpu softvfp + .type ftl_map_blk_alloc_new_blk, %function +ftl_map_blk_alloc_new_blk: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + mov r3, #0 + ldrh r1, [r0, #10] + ldr r2, [r0, #12] +.L702: + uxth r5, r3 + cmp r5, r1 + bcs .L705 + mov r7, r2 + add r3, r3, #1 + ldrh r6, [r7] + add r2, r2, #2 + cmp r6, #0 + bne .L702 + mov r4, r0 + bl FtlFreeSysBlkQueueOut + sub r3, r0, #1 + movw r2, #65533 + uxth r3, r3 + mov r1, r0 + strh r0, [r7] @ movhi + cmp r3, r2 + bls .L703 + ldr r3, .L709 + ldr r0, .L709+4 + ldrh r2, [r3, #6] + bl printk +.L704: + b .L704 +.L703: + ldr r3, [r4, #28] + strh r6, [r4, #2] @ movhi + strh r5, [r4] @ movhi + add r3, r3, #1 + str r3, [r4, #28] + ldrh r3, [r4, #8] + add r3, r3, #1 + strh r3, [r4, #8] @ movhi +.L705: + mov r0, #0 + pop {r4, r5, r6, r7, r8, pc} +.L710: + .align 2 +.L709: + .word .LANCHOR0+2516 + .word .LC5 + .fnend + .size ftl_map_blk_alloc_new_blk, .-ftl_map_blk_alloc_new_blk + .align 2 + .global select_l2p_ram_region + .syntax unified + .arm + .fpu softvfp + .type select_l2p_ram_region, %function +select_l2p_ram_region: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r2, .L722 + movw r3, #2430 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + mov r1, #0 + mov ip, #12 + movw lr, #65535 + ldrh r2, [r2, r3] + ldr r3, .L722+4 + ldr r3, [r3, #-3376] +.L712: + uxth r0, r1 + cmp r0, r2 + bcc .L714 + mov r0, r2 + mov r1, #0 + mov ip, #-2147483648 + mov r5, #12 +.L715: + uxth r4, r1 + cmp r4, r2 + bcc .L717 + cmp r0, r2 + popcc {r4, r5, r6, pc} + ldr r1, .L722+8 + mov r0, r2 + mvn ip, #0 + ldrh r5, [r1, #-12] + mov r1, #0 +.L718: + uxth lr, r1 + cmp lr, r2 + bcc .L720 + pop {r4, r5, r6, pc} +.L714: + add r1, r1, #1 + mla r4, ip, r1, r3 + ldrh r4, [r4, #-12] + cmp r4, lr + bne .L712 + pop {r4, r5, r6, pc} +.L717: + mla lr, r5, r1, r3 + add r1, r1, #1 + ldr lr, [lr, #4] + cmp ip, lr + movls r6, #0 + movhi r6, #1 + cmp lr, #0 + movlt r6, #0 + cmp r6, #0 + movne ip, lr + movne r0, r4 + b .L715 +.L720: + ldr r4, [r3, #4] + cmp ip, r4 + bls .L719 + ldrh r6, [r3] + cmp r6, r5 + movne ip, r4 + movne r0, lr +.L719: + add r1, r1, #1 + add r3, r3, #12 + b .L718 +.L723: + .align 2 +.L722: + .word .LANCHOR0 + .word .LANCHOR2 + .word .LANCHOR2-3360 + .fnend + .size select_l2p_ram_region, .-select_l2p_ram_region + .align 2 + .global FtlUpdateVaildLpn + .syntax unified + .arm + .fpu softvfp + .type FtlUpdateVaildLpn, %function +FtlUpdateVaildLpn: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L733 + sub r1, r3, #3360 + ldrh r2, [r1, #-10] + cmp r2, #4 + cmpls r0, #0 + bne .L725 + add r2, r2, #1 + strh r2, [r1, #-10] @ movhi + bx lr +.L725: + ldr r0, .L733+4 + mov r2, #0 + str lr, [sp, #-4]! + .save {lr} + movw lr, #65535 + strh r2, [r1, #-10] @ movhi + movw r1, #2332 + str r2, [r3, #-3368] + ldrh r1, [r0, r1] + ldr r2, [r3, #-3540] + add r1, r2, r1, lsl #1 +.L726: + cmp r2, r1 + bne .L728 + ldr pc, [sp], #4 +.L728: + ldrh ip, [r2], #2 + cmp ip, lr + ldrne r0, [r3, #-3368] + addne r0, r0, ip + strne r0, [r3, #-3368] + b .L726 +.L734: + .align 2 +.L733: + .word .LANCHOR2 + .word .LANCHOR0 + .fnend + .size FtlUpdateVaildLpn, .-FtlUpdateVaildLpn + .align 2 + .global ftl_set_blk_mode + .syntax unified + .arm + .fpu softvfp + .type ftl_set_blk_mode, %function +ftl_set_blk_mode: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + cmp r1, #0 + mov r3, r0 + beq .L736 + b ftl_set_blk_mode.part.9 +.L736: + ldr r2, .L737 + lsr r0, r0, #5 + and r3, r3, #31 + mov ip, #1 + ldr r1, [r2, #32] + ldr r2, [r1, r0, lsl #2] + bic r3, r2, ip, lsl r3 + str r3, [r1, r0, lsl #2] + bx lr +.L738: + .align 2 +.L737: + .word .LANCHOR0 + .fnend + .size ftl_set_blk_mode, .-ftl_set_blk_mode + .align 2 + .global ftl_get_blk_mode + .syntax unified + .arm + .fpu softvfp + .type ftl_get_blk_mode, %function +ftl_get_blk_mode: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L740 + lsr r2, r0, #5 + and r0, r0, #31 + ldr r3, [r3, #32] + ldr r3, [r3, r2, lsl #2] + lsr r0, r3, r0 + and r0, r0, #1 + bx lr +.L741: + .align 2 +.L740: + .word .LANCHOR0 + .fnend + .size ftl_get_blk_mode, .-ftl_get_blk_mode + .align 2 + .global ftl_sb_update_avl_pages + .syntax unified + .arm + .fpu softvfp + .type ftl_sb_update_avl_pages, %function +ftl_sb_update_avl_pages: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + mov r3, #0 + movw ip, #2324 + strh r3, [r0, #4] @ movhi + ldr r3, .L750 + push {r4, r5, lr} + .save {r4, r5, lr} + movw r5, #65535 + ldrh lr, [r3, ip] + add ip, r0, r2, lsl #1 + add ip, ip, #14 +.L743: + cmp r2, lr + bcc .L745 + movw r2, #2390 + add ip, r0, #16 + ldrh r3, [r3, r2] + movw r4, #65535 + sub r3, r3, #1 + sub r1, r3, r1 + mov r3, #0 + uxth r1, r1 +.L746: + uxth r2, r3 + cmp lr, r2 + bhi .L748 + pop {r4, r5, pc} +.L745: + ldrh r4, [ip, #2]! + add r2, r2, #1 + uxth r2, r2 + cmp r4, r5 + ldrhne r4, [r0, #4] + addne r4, r4, #1 + strhne r4, [r0, #4] @ movhi + b .L743 +.L748: + ldrh r2, [ip], #2 + add r3, r3, #1 + cmp r2, r4 + ldrhne r2, [r0, #4] + addne r2, r1, r2 + strhne r2, [r0, #4] @ movhi + b .L746 +.L751: + .align 2 +.L750: + .word .LANCHOR0 + .fnend + .size ftl_sb_update_avl_pages, .-ftl_sb_update_avl_pages + .align 2 + .global make_superblock + .syntax unified + .arm + .fpu softvfp + .type make_superblock, %function +make_superblock: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr} + movw r3, #2324 + ldr r6, .L765 + mov r4, r0 + add r7, r0, #16 + mvn r9, #0 + ldr r10, .L765+4 + mov r5, #0 + ldrh r8, [r6, r3] + strh r5, [r0, #4] @ movhi + strb r5, [r0, #7] +.L753: + uxth r3, r5 + cmp r8, r3 + bhi .L755 + movw r2, #2390 + ldrb r3, [r4, #7] @ zero_extendqisi2 + ldrh r2, [r6, r2] + smulbb r3, r3, r2 + strh r3, [r4, #4] @ movhi + mov r3, #0 + strb r3, [r4, #9] + ldr r3, [r6, #2248] + cmp r3, #0 + beq .L756 + ldrh r3, [r4] + ldr r2, .L765+8 + ldr r2, [r2, #-3604] + lsl r3, r3, #1 + ldrh r3, [r2, r3] + cmp r3, #79 + movls r3, #1 + strbls r3, [r4, #9] +.L756: + ldrb r3, [r6, #36] @ zero_extendqisi2 + mov r0, #0 + cmp r3, #0 + movne r3, #1 + strbne r3, [r4, #9] + pop {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L755: + ldrb r0, [r10, r5] @ zero_extendqisi2 + add r7, r7, #2 + ldrh r1, [r4] + add r5, r5, #1 + bl V2P_block + strh r9, [r7, #-2] @ movhi + mov fp, r0 + bl FtlBbmIsBadBlock + cmp r0, #0 + strheq fp, [r7, #-2] @ movhi + ldrbeq r3, [r4, #7] @ zero_extendqisi2 + addeq r3, r3, #1 + strbeq r3, [r4, #7] + b .L753 +.L766: + .align 2 +.L765: + .word .LANCHOR0 + .word .LANCHOR0+2350 + .word .LANCHOR2 + .fnend + .size make_superblock, .-make_superblock + .align 2 + .global update_multiplier_value + .syntax unified + .arm + .fpu softvfp + .type update_multiplier_value, %function +update_multiplier_value: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L774 + movw r2, #2324 + push {r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + mov r5, #0 + ldr r9, .L774+4 + mov r6, r0 + mov r4, r5 + ldrh r7, [r3, r2] + movw r2, #2390 + ldrh r8, [r3, r2] +.L768: + uxth r3, r5 + cmp r7, r3 + bhi .L770 + cmp r4, #0 + moveq r0, r4 + beq .L771 + mov r1, r4 + mov r0, #32768 + bl __aeabi_idiv +.L771: + ldr r3, .L774+8 + mov r2, #6 + ldr r3, [r3, #-3548] + mla r6, r2, r6, r3 + strh r0, [r6, #4] @ movhi + mov r0, #0 + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L770: + mov r1, r6 + ldrb r0, [r9, r5] @ zero_extendqisi2 + bl V2P_block + bl FtlBbmIsBadBlock + cmp r0, #0 + add r5, r5, #1 + addeq r4, r4, r8 + uxtheq r4, r4 + b .L768 +.L775: + .align 2 +.L774: + .word .LANCHOR0 + .word .LANCHOR0+2350 + .word .LANCHOR2 + .fnend + .size update_multiplier_value, .-update_multiplier_value + .align 2 + .global GetFreeBlockMinEraseCount + .syntax unified + .arm + .fpu softvfp + .type GetFreeBlockMinEraseCount, %function +GetFreeBlockMinEraseCount: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r2, .L779 + ldr r0, [r2, #-3528] + cmp r0, #0 + bxeq lr + ldr r3, [r2, #-3548] + sub r0, r0, r3 + ldr r3, .L779+4 + asr r0, r0, #1 + mul r0, r3, r0 + ldr r3, [r2, #-3604] + uxth r0, r0 + lsl r0, r0, #1 + ldrh r0, [r3, r0] + bx lr +.L780: + .align 2 +.L779: + .word .LANCHOR2 + .word -1431655765 + .fnend + .size GetFreeBlockMinEraseCount, .-GetFreeBlockMinEraseCount + .align 2 + .global GetFreeBlockMaxEraseCount + .syntax unified + .arm + .fpu softvfp + .type GetFreeBlockMaxEraseCount, %function +GetFreeBlockMaxEraseCount: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r1, .L793 + ldr r3, [r1, #-3528] + cmp r3, #0 + beq .L787 + sub r2, r1, #3520 + push {r4, r5, lr} + .save {r4, r5, lr} + ldrh r2, [r2, #-4] + mov r4, #6 + movw r5, #65535 + ldr ip, [r1, #-3548] + rsb r2, r2, r2, lsl #3 + sub r3, r3, ip + asr r2, r2, #3 + asr r3, r3, #1 + cmp r0, r2 + uxthgt r0, r2 + ldr r2, .L793+4 + mul r3, r2, r3 + mov r2, #0 + uxth r3, r3 +.L784: + uxth lr, r2 + cmp r0, lr + bls .L786 + mul lr, r4, r3 + add r2, r2, #1 + ldrh lr, [ip, lr] + cmp lr, r5 + bne .L788 +.L786: + ldr r2, [r1, #-3604] + lsl r3, r3, #1 + ldrh r0, [r2, r3] + pop {r4, r5, pc} +.L788: + mov r3, lr + b .L784 +.L787: + mov r0, r3 + bx lr +.L794: + .align 2 +.L793: + .word .LANCHOR2 + .word -1431655765 + .fnend + .size GetFreeBlockMaxEraseCount, .-GetFreeBlockMaxEraseCount + .align 2 + .global FtlPrintInfo2buf + .syntax unified + .arm + .fpu softvfp + .type FtlPrintInfo2buf, %function +FtlPrintInfo2buf: + .fnstart + @ args = 0, pretend = 0, frame = 16 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r8, r0 + ldr r9, .L808 + add r5, r8, #12 + .pad #36 + sub sp, sp, #36 + ldr r1, .L808+4 + bl strcpy + ldr r2, [r9, #124] + mov r0, r5 + ldr r1, .L808+8 + bl sprintf + add r5, r5, r0 + ldr r2, [r9, #2408] + mov r0, r5 + ldr r1, .L808+12 + bl sprintf + ldr r3, .L808+16 + add r5, r5, r0 + ldr r3, [r3, #500] + cmp r3, #1 + subne r0, r5, r8 + bne .L795 + add r3, sp, #28 + add r2, sp, #24 + add r1, sp, #20 + add r0, sp, #16 + bl NandcGetTimeCfg + ldr r3, [sp, #28] + mov r0, r5 + ldr r2, [sp, #16] + ldr r1, .L808+20 + str r3, [sp, #4] + ldr r3, [sp, #24] + ldr r7, .L808+24 + str r3, [sp] + ldr r3, [sp, #20] + sub r10, r7, #3520 + bl sprintf + add r6, r5, r0 + ldr r1, .L808+28 + mov r0, r6 + add r6, r6, #10 + bl strcpy + ldr r2, [r9, #2452] + mov r0, r6 + ldr r1, .L808+32 + sub r4, r7, #3584 + bl sprintf + add r6, r6, r0 + ldr r2, [r7, #-3368] + ldr r1, .L808+36 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldr r2, [r7, #-3364] + ldr r1, .L808+40 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldr r2, [r7, #-3360] + ldr r1, .L808+44 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldr r2, [r7, #-3356] + ldr r1, .L808+48 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldr r2, [r7, #-3352] + ldr r1, .L808+52 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldr r2, [r7, #-3348] + ldr r1, .L808+56 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldr r2, [r7, #-3344] + ldr r1, .L808+60 + mov r0, r6 + bl sprintf + ldr r2, [r7, #-3340] + add r6, r6, r0 + ldr r1, .L808+64 + mov r0, r6 + sub r5, r7, #3280 + lsr r2, r2, #11 + bl sprintf + ldr r2, [r7, #-3336] + add r6, r6, r0 + ldr r1, .L808+68 + mov r0, r6 + lsr r2, r2, #11 + bl sprintf + add r6, r6, r0 + ldr r2, [r7, #-3332] + ldr r1, .L808+72 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldr r2, [r7, #-3328] + ldr r1, .L808+76 + mov r0, r6 + bl sprintf + add r6, r6, r0 + bl FtlBbtCalcTotleCnt + ldr r2, .L808+80 + mov r3, r0 + ldr r1, .L808+84 + mov r0, r6 + ldrh r2, [r2, #6] + bl sprintf + add r6, r6, r0 + ldrh r2, [r10, #-4] + ldr r1, .L808+88 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldr r2, [r7, #-3324] + ldr r1, .L808+92 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldr r2, [r7, #-3320] + ldr r1, .L808+96 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldr r2, [r7, #-3316] + ldr r1, .L808+100 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldr r2, [r7, #-3600] + ldr r1, .L808+104 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldr r2, [r7, #-3312] + ldr r1, .L808+108 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldr r2, [r7, #-3308] + ldr r1, .L808+112 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldrh r2, [r4, #18] + ldr r1, .L808+116 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldrh r2, [r4, #16] + ldr r1, .L808+120 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldr r2, [r9, #2432] + ldr r1, .L808+124 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldr r2, [r9, #2424] + ldr r1, .L808+128 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldr r2, [r9, #2320] + ldr r1, .L808+132 + mov r0, r6 + bl sprintf + ldr r3, .L808+136 + add r6, r6, r0 + ldr r1, .L808+140 + mov r0, r6 + sub r4, r7, #3296 + ldrh r2, [r3, #6] + bl sprintf + movw r3, #2332 + add r6, r6, r0 + ldrh r2, [r9, r3] + mov r0, r6 + ldr r1, .L808+144 + bl sprintf + add r6, r6, r0 + ldrh r2, [r4, #-8] + ldr r1, .L808+148 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldr r2, [r9, #2336] + ldr r1, .L808+152 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldrh r2, [r4, #-4] + ldr r1, .L808+156 + mov r0, r6 + bl sprintf + movw r3, #2456 + add r6, r6, r0 + ldrh r2, [r9, r3] + mov r0, r6 + ldr r1, .L808+160 + sub r4, r7, #3472 + bl sprintf + add r6, r6, r0 + ldrh r2, [r10, #2] + ldr r1, .L808+164 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldrb r2, [r7, #-3514] @ zero_extendqisi2 + ldr r1, .L808+168 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldrh r2, [r10] + ldr r1, .L808+172 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldrb r2, [r7, #-3512] @ zero_extendqisi2 + ldr r1, .L808+176 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldrh r2, [r10, #4] + ldr r1, .L808+180 + mov r0, r6 + bl sprintf + ldrh r3, [r10] + add r6, r6, r0 + ldr r2, [r7, #-3540] + mov r0, r6 + ldr r1, .L808+184 + lsl r3, r3, #1 + ldrh r2, [r2, r3] + bl sprintf + add r6, r6, r0 + ldrh r2, [r4, #2] + ldr r1, .L808+188 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldrb r2, [r7, #-3466] @ zero_extendqisi2 + ldr r1, .L808+192 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldrh r2, [r4] + ldr r1, .L808+196 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldrb r2, [r7, #-3464] @ zero_extendqisi2 + ldr r1, .L808+200 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldrh r2, [r4, #4] + ldr r1, .L808+204 + mov r0, r6 + bl sprintf + ldrh r3, [r4] + add r6, r6, r0 + ldr r2, [r7, #-3540] + mov r0, r6 + ldr r1, .L808+208 + sub r4, r7, #3424 + lsl r3, r3, #1 + ldrh r2, [r2, r3] + bl sprintf + add r6, r6, r0 + ldrh r2, [r4, #2] + ldr r1, .L808+212 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldrb r2, [r7, #-3418] @ zero_extendqisi2 + ldr r1, .L808+216 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldrh r2, [r4] + ldr r1, .L808+220 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldrb r2, [r7, #-3416] @ zero_extendqisi2 + ldr r1, .L808+224 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldrh r2, [r4, #4] + ldr r1, .L808+228 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldrh r2, [r5, #-2] + ldr r1, .L808+232 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldrb r2, [r7, #-3278] @ zero_extendqisi2 + ldr r1, .L808+236 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldrh r2, [r5, #-4] + ldr r1, .L808+240 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldrb r2, [r7, #-3276] @ zero_extendqisi2 + ldr r1, .L808+244 + mov r0, r6 + bl sprintf + sub r4, r5, #4 + add r6, r6, r0 + ldrh r2, [r4, #4] + mov r0, r6 + ldr r1, .L808+248 + bl sprintf + ldr r3, [r7, #-3160] + add r6, r6, r0 + ldr r2, [r9, #2248] + mov r0, r6 + ldr r1, [r7, #-2724] + str r3, [sp, #4] + ldr r3, [r7, #-3152] + orr r2, r2, r1, lsl #8 + ldr r1, .L808+252 + str r3, [sp] + ldr r3, [r7, #-3156] + bl sprintf + add r4, r6, r0 + ldr r2, [r7, #-3164] + ldr r1, .L808+256 + mov r0, r4 + bl sprintf + add r4, r4, r0 + ldr r2, [r7, #-3140] + ldr r1, .L808+260 + mov r0, r4 + bl sprintf + sub r3, r7, #2720 + add r4, r4, r0 + ldrh r2, [r3] + mov r0, r4 + ldr r1, .L808+264 + sub r6, r7, #2704 + bl sprintf + add r4, r4, r0 + ldrh r2, [r6, #-14] + ldr r1, .L808+268 + mov r0, r4 + bl sprintf + add r4, r4, r0 + ldr r2, [r7, #-2716] + ldr r1, .L808+272 + mov r0, r4 + bl sprintf + add r4, r4, r0 + ldrh r2, [r6, #-8] + ldr r1, .L808+276 + mov r0, r4 + bl sprintf + add r4, r4, r0 + bl GetFreeBlockMinEraseCount + ldr r1, .L808+280 + mov r2, r0 + mov r0, r4 + bl sprintf + add r4, r4, r0 + ldrh r0, [r10, #-4] + bl GetFreeBlockMaxEraseCount + ldr r1, .L808+284 + mov r2, r0 + mov r0, r4 + bl sprintf + ldrh r3, [r5, #-4] + movw r2, #65535 + add r4, r4, r0 + cmp r3, r2 + beq .L798 + ldr r2, [r7, #-3540] + lsl r3, r3, #1 + mov r0, r4 + ldr r1, .L808+288 + ldrh r2, [r2, r3] + bl sprintf + add r4, r4, r0 +.L798: + mov r0, #0 + ldr r9, .L808+292 + bl List_get_gc_head_node + uxth r3, r0 + mov r5, #0 + movw fp, #65535 + mov r10, #6 +.L800: + cmp r3, fp + beq .L799 + ldr r2, [r7, #-3604] + lsl r1, r3, #1 + mul r6, r10, r3 + mov r0, r4 + ldrh r2, [r2, r1] + str r2, [sp, #8] + ldr r2, [r7, #-3548] + add r2, r2, r6 + ldrh r2, [r2, #4] + str r2, [sp, #4] + ldr r2, [r7, #-3540] + ldrh r2, [r2, r1] + mov r1, r9 + str r2, [sp] + mov r2, r5 + bl sprintf + add r5, r5, #1 + ldr r3, [r7, #-3548] + cmp r5, #16 + add r4, r4, r0 + ldrh r3, [r3, r6] + bne .L800 +.L799: + ldr r2, [r7, #-3548] + mov r5, #0 + ldr r3, [r7, #-3528] + movw r9, #65535 + ldr fp, .L808+296 + mov r10, #6 + sub r3, r3, r2 + ldr r2, .L808+300 + asr r3, r3, #1 + mul r3, r2, r3 + uxth r3, r3 +.L802: + cmp r3, r9 + beq .L801 + ldr r1, [r7, #-3604] + lsl r2, r3, #1 + mul r6, r10, r3 + mov r0, r4 + ldrh r2, [r1, r2] + mov r1, fp + str r2, [sp, #4] + ldr r2, [r7, #-3548] + add r2, r2, r6 + ldrh r2, [r2, #4] + str r2, [sp] + mov r2, r5 + add r5, r5, #1 + bl sprintf + cmp r5, #4 + add r4, r4, r0 + ldrne r3, [r7, #-3548] + ldrhne r3, [r3, r6] + bne .L802 +.L801: + sub r0, r4, r8 +.L795: + add sp, sp, #36 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L809: + .align 2 +.L808: + .word .LANCHOR0 + .word .LC6 + .word .LC7 + .word .LC8 + .word .LANCHOR1 + .word .LC9 + .word .LANCHOR2 + .word .LC10 + .word .LC11 + .word .LC12 + .word .LC13 + .word .LC14 + .word .LC15 + .word .LC16 + .word .LC17 + .word .LC18 + .word .LC19 + .word .LC20 + .word .LC21 + .word .LC22 + .word .LANCHOR0+2456 + .word .LC23 + .word .LC24 + .word .LC25 + .word .LC26 + .word .LC27 + .word .LC28 + .word .LC29 + .word .LC30 + .word .LC31 + .word .LC32 + .word .LC33 + .word .LC34 + .word .LC35 + .word .LANCHOR0+2516 + .word .LC36 + .word .LC37 + .word .LC38 + .word .LC39 + .word .LC40 + .word .LC41 + .word .LC42 + .word .LC43 + .word .LC44 + .word .LC45 + .word .LC46 + .word .LC47 + .word .LC48 + .word .LC49 + .word .LC50 + .word .LC51 + .word .LC52 + .word .LC53 + .word .LC54 + .word .LC55 + .word .LC56 + .word .LC57 + .word .LC58 + .word .LC59 + .word .LC60 + .word .LC61 + .word .LC62 + .word .LC63 + .word .LC64 + .word .LC65 + .word .LC66 + .word .LC67 + .word .LC68 + .word .LC69 + .word .LC70 + .word .LC71 + .word .LC72 + .word .LC73 + .word .LC74 + .word .LC75 + .word -1431655765 + .fnend + .size FtlPrintInfo2buf, .-FtlPrintInfo2buf + .align 2 + .global ftl_proc_ftl_read + .syntax unified + .arm + .fpu softvfp + .type ftl_proc_ftl_read, %function +ftl_proc_ftl_read: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + mov r5, r0 + ldr r2, .L812 + ldr r1, .L812+4 + bl sprintf + add r4, r5, r0 + mov r0, r4 + bl FtlPrintInfo2buf + add r0, r4, r0 + sub r0, r0, r5 + pop {r4, r5, r6, pc} +.L813: + .align 2 +.L812: + .word .LC76 + .word .LC77 + .fnend + .size ftl_proc_ftl_read, .-ftl_proc_ftl_read + .align 2 + .global GetSwlReplaceBlock + .syntax unified + .arm + .fpu softvfp + .type GetSwlReplaceBlock, %function +GetSwlReplaceBlock: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #28 + sub sp, sp, #28 + ldr r4, .L842 + ldr r2, [r4, #-3316] + ldr r3, [r4, #-3308] + cmp r2, r3 + bcs .L815 + ldr r0, .L842+4 + movw r2, #2332 + mov r3, #0 + str r3, [r4, #-3324] + ldrh r1, [r0, r2] + mov r6, r0 + ldr r2, [r4, #-3604] + sub r2, r2, #2 +.L816: + cmp r3, r1 + bcc .L817 + ldr r5, [r4, #-3324] + mov r0, r5 + bl __aeabi_uidiv + str r0, [r4, #-3316] + movw r3, #2382 + ldr r0, [r4, #-3320] + ldrh r1, [r6, r3] + sub r0, r5, r0 + bl __aeabi_uidiv + str r0, [r4, #-3324] +.L818: + ldr r5, [r4, #-3308] + ldr r8, [r4, #-3316] + add r3, r5, #256 + cmp r3, r8 + bls .L823 + ldr r2, [r4, #-3312] + add r3, r5, #768 + cmp r3, r2 + bls .L823 + ldr r3, .L842+4 + cmp r5, #40 + ldr r2, [r3, #2248] + movls r3, #0 + movhi r3, #1 + cmp r2, #0 + orreq r3, r3, #1 + cmp r3, #0 + beq .L823 +.L825: + movw r6, #65535 +.L824: + mov r0, r6 + add sp, sp, #28 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L817: + ldrh r0, [r2, #2]! + add r3, r3, #1 + ldr ip, [r4, #-3324] + add r0, r0, ip + str r0, [r4, #-3324] + b .L816 +.L815: + ldr r3, [r4, #-3312] + cmp r2, r3 + bls .L818 + ldr ip, .L842+8 + add r3, r3, #1 + str r3, [r4, #-3312] + mov r3, #0 +.L820: + ldrh r2, [ip] + cmp r3, r2 + bcs .L818 + ldr r0, [r4, #-3604] + lsl r1, r3, #1 + add r3, r3, #1 + ldrh r2, [r0, r1] + add r2, r2, #1 + strh r2, [r0, r1] @ movhi + b .L820 +.L823: + ldr r3, .L842+12 + ldrh r0, [r3, #-4] + add r0, r0, r0, lsl #1 + ubfx r0, r0, #2, #16 + bl GetFreeBlockMaxEraseCount + add r1, r5, #64 + mov r10, r0 + cmp r0, r1 + movcs r1, #0 + movcc r1, #1 + cmp r5, #40 + movls r1, #0 + cmp r1, #0 + bne .L825 + ldr r3, [r4, #-3544] + cmp r3, #0 + beq .L825 + ldr r0, .L842+4 + movw r2, #2332 + ldr ip, [r4, #-3548] + movw r7, #65535 + ldr r9, [r4, #-3604] + mov fp, #6 + ldrh r2, [r0, r2] + ldr lr, .L842+16 + str r2, [sp, #20] + mov r2, r7 +.L826: + ldrh r0, [r3] + movw r6, #65535 + cmp r0, r6 + bne .L829 + mov r6, r2 +.L828: + movw r3, #65535 + cmp r6, r3 + beq .L825 + lsl fp, r6, #1 + ldrh r1, [r9, fp] + cmp r5, r1 + bcs .L830 + bl GetFreeBlockMinEraseCount + cmp r5, r0 + strcc r7, [r4, #-3308] +.L830: + cmp r8, r1 + bls .L825 + add r3, r1, #128 + cmp r10, r3 + ble .L825 + add r3, r1, #256 + cmp r8, r3 + bhi .L831 + ldr r3, [r4, #-3312] + add r1, r1, #768 + cmp r1, r3 + bcs .L825 +.L831: + str r10, [sp, #8] + mov r2, r8 + ldrh r3, [r9, fp] + mov r1, r6 + ldr r0, .L842+20 + str r3, [sp, #4] + ldr r3, [r4, #-3540] + ldrh r3, [r3, fp] + str r3, [sp] + ldr r3, [r4, #-3312] + bl printk + mov r3, #1 + str r3, [r4, #-2708] + b .L824 +.L829: + add r1, r1, #1 + ldr r6, [sp, #20] + uxth r1, r1 + cmp r1, r6 + bhi .L825 + ldrh r6, [r3, #4] + cmp r6, #0 + beq .L827 + sub r3, r3, ip + asr r3, r3, #1 + mul r3, lr, r3 + uxth r6, r3 + lsl r3, r6, #1 + ldrh r3, [r9, r3] + cmp r5, r3 + bcs .L828 + cmp r7, r3 + movhi r7, r3 + movhi r2, r6 +.L827: + mla r3, fp, r0, ip + b .L826 +.L843: + .align 2 +.L842: + .word .LANCHOR2 + .word .LANCHOR0 + .word .LANCHOR0+2332 + .word .LANCHOR2-3520 + .word -1431655765 + .word .LC78 + .fnend + .size GetSwlReplaceBlock, .-GetSwlReplaceBlock + .align 2 + .global free_data_superblock + .syntax unified + .arm + .fpu softvfp + .type free_data_superblock, %function +free_data_superblock: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + movw r2, #65535 + cmp r0, r2 + beq .L847 + ldr r2, .L850 + lsl r3, r0, #1 + push {r4, lr} + .save {r4, lr} + mov r1, #0 + ldr r2, [r2, #-3540] + strh r1, [r2, r3] @ movhi + bl INSERT_FREE_LIST + mov r0, #0 + pop {r4, pc} +.L847: + mov r0, #0 + bx lr +.L851: + .align 2 +.L850: + .word .LANCHOR2 + .fnend + .size free_data_superblock, .-free_data_superblock + .align 2 + .global FtlGcBufInit + .syntax unified + .arm + .fpu softvfp + .type FtlGcBufInit, %function +FtlGcBufInit: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr ip, .L858 + mov r3, #0 + ldr r2, .L858+4 + push {r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + mov r4, #12 + mov r5, #1 + add r6, ip, #76 + mov r7, #36 + str r3, [r2, #-2704] +.L853: + ldrh r1, [ip] + uxth r0, r3 + add lr, r3, #1 + cmp r0, r1 + bcc .L854 + ldr r4, .L858+8 + mov ip, #12 + mov lr, #0 +.L855: + ldr r3, [r2, #-2684] + cmp r1, r3 + bcc .L856 + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L854: + uxth r3, r3 + ldr r8, [r2, #-2700] + mul r0, r4, r3 + add r1, r8, r0 + str r5, [r1, #8] + ldrh r1, [r6] + mul r1, r3, r1 + add r9, r1, #3 + cmp r1, #0 + movlt r1, r9 + ldr r9, [r2, #-2696] + bic r1, r1, #3 + add r1, r9, r1 + str r1, [r8, r0] + ldr r1, .L858+12 + ldr r9, [r2, #-2700] + ldrh r1, [r1] + add r8, r9, r0 + mul r1, r3, r1 + add r10, r1, #3 + cmp r1, #0 + movlt r1, r10 + ldr r10, [r2, #-2692] + bic r1, r1, #3 + add r1, r10, r1 + str r1, [r8, #4] + ldr r1, [r2, #-2688] + mla r3, r7, r3, r1 + ldr r1, [r9, r0] + str r1, [r3, #8] + ldr r1, [r8, #4] + str r1, [r3, #12] + mov r3, lr + b .L853 +.L856: + mul r5, ip, r1 + ldr r6, [r2, #-2700] + add r3, r6, r5 + str lr, [r3, #8] + ldrh r3, [r4] + mul r3, r1, r3 + add r0, r3, #3 + cmp r3, #0 + movlt r3, r0 + ldr r0, [r2, #-2696] + bic r3, r3, #3 + add r3, r0, r3 + str r3, [r6, r5] + ldr r3, .L858+12 + ldr r0, [r2, #-2700] + ldrh r3, [r3] + add r0, r0, r5 + mul r3, r1, r3 + add r1, r1, #1 + uxth r1, r1 + add r5, r3, #3 + cmp r3, #0 + movlt r3, r5 + ldr r5, [r2, #-2692] + bic r3, r3, #3 + add r3, r5, r3 + str r3, [r0, #4] + b .L855 +.L859: + .align 2 +.L858: + .word .LANCHOR0+2324 + .word .LANCHOR2 + .word .LANCHOR0+2400 + .word .LANCHOR0+2402 + .fnend + .size FtlGcBufInit, .-FtlGcBufInit + .align 2 + .global FtlGcBufFree + .syntax unified + .arm + .fpu softvfp + .type FtlGcBufFree, %function +FtlGcBufFree: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L868 + push {r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + mov lr, #0 + mov r5, #36 + mov r7, #12 + mov r8, lr + ldr r6, [r3, #-2684] + ldr r4, [r3, #-2700] +.L861: + uxth r3, lr + cmp r1, r3 + popls {r4, r5, r6, r7, r8, r9, r10, pc} + mla ip, r5, r3, r0 + mov r2, #0 +.L862: + uxth r3, r2 + cmp r6, r3 + bls .L863 + mul r3, r7, r3 + add r2, r2, #1 + ldr r10, [r4, r3] + add r9, r4, r3 + ldr r3, [ip, #8] + cmp r10, r3 + bne .L862 + str r8, [r9, #8] +.L863: + add lr, lr, #1 + b .L861 +.L869: + .align 2 +.L868: + .word .LANCHOR2 + .fnend + .size FtlGcBufFree, .-FtlGcBufFree + .align 2 + .global FtlGcBufAlloc + .syntax unified + .arm + .fpu softvfp + .type FtlGcBufAlloc, %function +FtlGcBufAlloc: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L878 + mov ip, #0 + push {r4, r5, r6, r7, r8, r9, lr} + .save {r4, r5, r6, r7, r8, r9, lr} + mov r6, #12 + mov r7, #1 + mov r8, #36 + ldr r4, [r3, #-2684] + ldr r5, [r3, #-2700] +.L871: + uxth r2, ip + cmp r1, r2 + bhi .L875 + pop {r4, r5, r6, r7, r8, r9, pc} +.L875: + mov lr, #0 +.L872: + uxth r3, lr + cmp r4, r3 + bls .L873 + mla r3, r6, r3, r5 + add lr, lr, #1 + ldr r9, [r3, #8] + cmp r9, #0 + bne .L872 + mla r2, r8, r2, r0 + ldr lr, [r3] + str r7, [r3, #8] + str lr, [r2, #8] + ldr r3, [r3, #4] + str r3, [r2, #12] +.L873: + add ip, ip, #1 + b .L871 +.L879: + .align 2 +.L878: + .word .LANCHOR2 + .fnend + .size FtlGcBufAlloc, .-FtlGcBufAlloc + .align 2 + .global IsBlkInGcList + .syntax unified + .arm + .fpu softvfp + .type IsBlkInGcList, %function +IsBlkInGcList: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r2, .L885 + ldr r3, [r2, #-2680] + sub r2, r2, #2672 + ldrh r2, [r2, #-4] + add r2, r3, r2, lsl #1 +.L881: + cmp r3, r2 + bne .L883 + mov r0, #0 + bx lr +.L883: + ldrh r1, [r3], #2 + cmp r1, r0 + bne .L881 + mov r0, #1 + bx lr +.L886: + .align 2 +.L885: + .word .LANCHOR2 + .fnend + .size IsBlkInGcList, .-IsBlkInGcList + .align 2 + .global FtlGcUpdatePage + .syntax unified + .arm + .fpu softvfp + .type FtlGcUpdatePage, %function +FtlGcUpdatePage: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + mov r4, r0 + ubfx r0, r0, #10, #16 + mov r5, r1 + mov r6, r2 + bl P2V_block_in_plane + ldr r2, .L892 + mov r3, #0 + sub ip, r2, #2672 + ldr lr, [r2, #-2680] + ldrh r7, [ip, #-4] + sub r1, lr, #2 +.L888: + uxth r8, r3 + cmp r8, r7 + bcc .L890 + moveq r3, r8 + lsleq r3, r3, #1 + strheq r0, [lr, r3] @ movhi + ldrheq r3, [ip, #-4] + addeq r3, r3, #1 + strheq r3, [ip, #-4] @ movhi + b .L889 +.L890: + ldrh r8, [r1, #2]! + add r3, r3, #1 + cmp r8, r0 + bne .L888 +.L889: + ldr r0, .L892+4 + mov r3, #12 + ldr r2, [r2, #-2672] + ldrh r1, [r0, #-12] + mul r3, r3, r1 + add r1, r2, r3 + stmib r1, {r5, r6} + str r4, [r2, r3] + ldrh r3, [r0, #-12] + add r3, r3, #1 + strh r3, [r0, #-12] @ movhi + pop {r4, r5, r6, r7, r8, pc} +.L893: + .align 2 +.L892: + .word .LANCHOR2 + .word .LANCHOR2-2656 + .fnend + .size FtlGcUpdatePage, .-FtlGcUpdatePage + .align 2 + .global FtlGcRefreshOpenBlock + .syntax unified + .arm + .fpu softvfp + .type FtlGcRefreshOpenBlock, %function +FtlGcRefreshOpenBlock: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + ldr r4, .L902 + ldrh r3, [r4, #-10] + cmp r3, r0 + beq .L896 + ldrh r3, [r4, #-8] + cmp r3, r0 + beq .L896 + ldrh r3, [r4, #-6] + cmp r3, r0 + beq .L896 + ldrh r3, [r4, #-4] + cmp r3, r0 + beq .L896 + mov r5, r0 + mov r1, r0 + ldr r0, .L902+4 + bl printk + ldrh r2, [r4, #-10] + movw r3, #65535 + cmp r2, r3 + strheq r5, [r4, #-10] @ movhi + beq .L896 + ldrh r2, [r4, #-8] + cmp r2, r3 + strheq r5, [r4, #-8] @ movhi + beq .L896 + ldrh r2, [r4, #-6] + cmp r2, r3 + strheq r5, [r4, #-6] @ movhi + beq .L896 + ldrh r2, [r4, #-4] + cmp r2, r3 + strheq r5, [r4, #-4] @ movhi +.L896: + mov r0, #0 + pop {r4, r5, r6, pc} +.L903: + .align 2 +.L902: + .word .LANCHOR2-2656 + .word .LC79 + .fnend + .size FtlGcRefreshOpenBlock, .-FtlGcRefreshOpenBlock + .align 2 + .global FtlGcRefreshBlock + .syntax unified + .arm + .fpu softvfp + .type FtlGcRefreshBlock, %function +FtlGcRefreshBlock: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + ldr r4, .L915 + ldrh r3, [r4, #-10] + cmp r3, r0 + beq .L912 + ldrh r3, [r4, #-8] + cmp r3, r0 + beq .L912 + ldrh r3, [r4, #-6] + cmp r3, r0 + beq .L912 + ldrh r3, [r4, #-4] + cmp r3, r0 + beq .L912 + mov r5, r0 + mov r1, r0 + ldr r0, .L915+4 + bl printk + ldrh r2, [r4, #-10] + movw r3, #65535 + cmp r2, r3 + strheq r5, [r4, #-10] @ movhi + beq .L912 + ldrh r2, [r4, #-8] + cmp r2, r3 + strheq r5, [r4, #-8] @ movhi + beq .L912 + ldrh r2, [r4, #-6] + cmp r2, r3 + strheq r5, [r4, #-6] @ movhi + beq .L912 + ldrh r2, [r4, #-4] + cmp r2, r3 + bne .L913 + strh r5, [r4, #-4] @ movhi +.L912: + mov r0, #0 + pop {r4, r5, r6, pc} +.L913: + mvn r0, #0 + pop {r4, r5, r6, pc} +.L916: + .align 2 +.L915: + .word .LANCHOR2-2656 + .word .LC79 + .fnend + .size FtlGcRefreshBlock, .-FtlGcRefreshBlock + .align 2 + .global FtlGcMarkBadPhyBlk + .syntax unified + .arm + .fpu softvfp + .type FtlGcMarkBadPhyBlk, %function +FtlGcMarkBadPhyBlk: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + mov r5, r0 + ldr r6, .L926 + bl P2V_block_in_plane + sub r7, r6, #2656 + mov r4, r0 + mov r2, r5 + ldrh r1, [r7, #-2] + ldr r0, .L926+4 + bl printk + mov r0, r4 + bl FtlGcRefreshBlock + ldr r3, .L926+8 + ldr r3, [r3, #2248] + cmp r3, #0 + mov r3, r7 + beq .L918 + ldr r1, [r6, #-3604] + lsl r4, r4, #1 + ldrh r2, [r1, r4] + cmp r2, #39 + subhi r2, r2, #40 + strhhi r2, [r1, r4] @ movhi +.L918: + ldrh r2, [r3, #-2] + mov r1, #0 +.L919: + uxth r0, r1 + cmp r2, r0 + bhi .L921 + cmp r2, #15 + addls r1, r2, #1 + lslls r2, r2, #1 + strhls r1, [r3, #-2] @ movhi + strhls r5, [r3, r2] @ movhi + b .L920 +.L921: + add r1, r1, #1 + add r0, r3, r1, lsl #1 + ldrh r0, [r0, #-2] + cmp r0, r5 + bne .L919 +.L920: + mov r0, #0 + pop {r4, r5, r6, r7, r8, pc} +.L927: + .align 2 +.L926: + .word .LANCHOR2 + .word .LC80 + .word .LANCHOR0 + .fnend + .size FtlGcMarkBadPhyBlk, .-FtlGcMarkBadPhyBlk + .align 2 + .global FtlGcReFreshBadBlk + .syntax unified + .arm + .fpu softvfp + .type FtlGcReFreshBadBlk, %function +FtlGcReFreshBadBlk: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L938 + ldrh r2, [r3, #-2] + cmp r2, #0 + beq .L935 + ldrh r0, [r3, #-10] + movw r1, #65535 + cmp r0, r1 + bne .L935 + push {r4, lr} + .save {r4, lr} + add r4, r3, #48 + ldrh r1, [r4, #-14] + cmp r1, r2 + movcs r2, #0 + strhcs r2, [r4, #-14] @ movhi + ldrh r2, [r4, #-14] + lsl r2, r2, #1 + ldrh r0, [r3, r2] + bl P2V_block_in_plane + bl FtlGcRefreshBlock + ldrh r3, [r4, #-14] + mov r0, #0 + add r3, r3, #1 + strh r3, [r4, #-14] @ movhi + pop {r4, pc} +.L935: + mov r0, #0 + bx lr +.L939: + .align 2 +.L938: + .word .LANCHOR2-2656 + .fnend + .size FtlGcReFreshBadBlk, .-FtlGcReFreshBadBlk + .align 2 + .global ftl_memset + .syntax unified + .arm + .fpu softvfp + .type ftl_memset, %function +ftl_memset: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + b memset + .fnend + .size ftl_memset, .-ftl_memset + .align 2 + .global BuildFlashLsbPageTable + .syntax unified + .arm + .fpu softvfp + .type BuildFlashLsbPageTable, %function +BuildFlashLsbPageTable: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + cmp r0, #0 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + mov r4, r1 + bne .L942 + ldr r3, .L998 +.L943: + lsl r2, r0, #1 + strh r0, [r2, r3] @ movhi + add r0, r0, #1 + cmp r0, #512 + bne .L943 +.L949: + ldr r5, .L998+4 + mov r1, #255 + mov r2, #2048 + uxth r4, r4 + sub r0, r5, #12 + sub r5, r5, #12 + bl ftl_memset + ldr r1, .L998 + mov r3, #0 +.L944: + uxth r2, r3 + cmp r4, r2 + bhi .L977 + pop {r4, r5, r6, pc} +.L942: + cmp r0, #1 + bne .L945 + ldr r1, .L998 + mov r3, #0 +.L948: + cmp r3, #3 + uxth r2, r3 + bls .L946 + tst r2, #1 + movne r0, #3 + moveq r0, #2 + rsb r2, r0, r2, lsl #1 + uxth r2, r2 +.L946: + lsl r0, r3, #1 + add r3, r3, #1 + cmp r3, #512 + strh r2, [r0, r1] @ movhi + bne .L948 + b .L949 +.L945: + cmp r0, #2 + bne .L950 + ldr r1, .L998 + mov r2, #0 +.L952: + uxth r3, r2 + cmp r2, #1 + lsl r0, r2, #1 + add r2, r2, #1 + lslhi r3, r3, #1 + subhi r3, r3, #1 + uxthhi r3, r3 + cmp r2, #512 + strh r3, [r0, r1] @ movhi + bne .L952 + b .L949 +.L950: + cmp r0, #3 + bne .L953 + ldr r1, .L998 + mov r3, #0 +.L956: + cmp r3, #5 + uxth r2, r3 + bls .L954 + tst r2, #1 + movne r0, #5 + moveq r0, #4 + rsb r2, r0, r2, lsl #1 + uxth r2, r2 +.L954: + lsl r0, r3, #1 + add r3, r3, #1 + cmp r3, #512 + strh r2, [r0, r1] @ movhi + bne .L956 + b .L949 +.L953: + cmp r0, #4 + mov r3, #0 + bne .L957 + ldr r2, .L998+8 + strh r3, [r2, #156] @ movhi + mov r3, #1 + strh r3, [r2, #158] @ movhi + mov r3, #2 + strh r3, [r2, #160] @ movhi + mov r3, #3 + strh r3, [r2, #162] @ movhi + mov r3, #5 + strh r3, [r2, #166] @ movhi + mov r3, #7 + strh r3, [r2, #168] @ movhi + mov r3, #8 + strh r0, [r2, #164] @ movhi + strh r3, [r2, #170]! @ movhi +.L959: + tst r3, #1 + movne r1, #7 + moveq r1, #6 + rsb r1, r1, r3, lsl #1 + add r3, r3, #1 + uxth r3, r3 + strh r1, [r2, #2]! @ movhi + cmp r3, #512 + bne .L959 + b .L949 +.L957: + cmp r0, #5 + bne .L960 + ldr r2, .L998+8 + add r1, r2, #156 +.L961: + lsl r0, r3, #1 + strh r3, [r0, r1] @ movhi + add r3, r3, #1 + cmp r3, #16 + bne .L961 + add r2, r2, #186 +.L962: + strh r3, [r2, #2]! @ movhi + add r3, r3, #2 + uxth r3, r3 + cmp r3, #1008 + bne .L962 + b .L949 +.L960: + cmp r0, #6 + bne .L963 + ldr r0, .L998 + mov r1, r3 +.L966: + cmp r1, #5 + uxth r2, r1 + bls .L964 + tst r2, #1 + movne r2, #12 + moveq r2, #10 + sub r2, r3, r2 + uxth r2, r2 +.L964: + lsl ip, r1, #1 + add r1, r1, #1 + cmp r1, #512 + add r3, r3, #3 + strh r2, [ip, r0] @ movhi + uxth r3, r3 + bne .L966 + b .L949 +.L963: + cmp r0, #9 + bne .L967 + ldr r2, .L998+8 + movw r1, #1021 + strh r3, [r2, #156] @ movhi + mov r3, #1 + strh r3, [r2, #158] @ movhi + mov r3, r2 + mov r2, #2 + strh r2, [r3, #160]! @ movhi + mov r2, #3 +.L968: + strh r2, [r3, #2]! @ movhi + add r2, r2, #2 + uxth r2, r2 + cmp r2, r1 + bne .L968 + b .L949 +.L967: + cmp r0, #10 + bne .L969 + ldr r2, .L998+8 + add r1, r2, #156 +.L970: + lsl r0, r3, #1 + strh r3, [r0, r1] @ movhi + add r3, r3, #1 + cmp r3, #63 + bne .L970 + add r2, r2, #280 + movw r1, #961 +.L971: + strh r3, [r2, #2]! @ movhi + add r3, r3, #2 + uxth r3, r3 + cmp r3, r1 + bne .L971 + b .L949 +.L969: + cmp r0, #11 + bne .L972 + ldr r2, .L998+8 + mov r3, #0 + add r1, r2, #156 +.L973: + lsl r0, r3, #1 + strh r3, [r0, r1] @ movhi + add r3, r3, #1 + cmp r3, #8 + bne .L973 + add r2, r2, #170 +.L975: + tst r3, #1 + movne r1, #7 + moveq r1, #6 + rsb r1, r1, r3, lsl #1 + add r3, r3, #1 + uxth r3, r3 + strh r1, [r2, #2]! @ movhi + cmp r3, #512 + bne .L975 + b .L949 +.L972: + cmp r0, #12 + bne .L949 + ldr r3, .L998+8 + mov r2, #0 + strh r2, [r3, #156] @ movhi + mov r2, #1 + strh r2, [r3, #158] @ movhi + mov r2, #2 + strh r2, [r3, #160] @ movhi + mov r2, #3 + strh r2, [r3, #162]! @ movhi + mov r2, #4 +.L976: + sub r1, r2, #1 + add r1, r1, r2, lsr #1 + add r2, r2, #1 + uxth r2, r2 + strh r1, [r3, #2]! @ movhi + cmp r2, #512 + bne .L976 + b .L949 +.L977: + lsl r2, r3, #1 + add r3, r3, #1 + ldrh r2, [r2, r1] + lsl r0, r2, #1 + strh r2, [r5, r0] @ movhi + b .L944 +.L999: + .align 2 +.L998: + .word .LANCHOR0+156 + .word .LANCHOR2-2608 + .word .LANCHOR0 + .fnend + .size BuildFlashLsbPageTable, .-BuildFlashLsbPageTable + .align 2 + .global FlashDieInfoInit + .syntax unified + .arm + .fpu softvfp + .type FlashDieInfoInit, %function +FlashDieInfoInit: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L1015 + push {r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + mov r6, #0 + ldr r4, .L1015+4 + ldr r10, .L1015+8 + ldrh r0, [r3, #10] + strb r6, [r4, #2234] + strb r6, [r10, #-572] + bl FlashBlockAlignInit + mov r2, #8 + mov r1, r6 + ldr r0, .L1015+12 + bl ftl_memset + mov r2, #32 + mov r1, r6 + ldr r0, .L1015+16 + bl ftl_memset + mov r2, #128 + mov r1, r6 + ldr r0, .L1015+20 + bl ftl_memset + ldr r9, .L1015+24 + ldr r5, [r4, #48] + mov r8, r9 + add r7, r5, #1 +.L1002: + ldrb r2, [r5] @ zero_extendqisi2 + add r1, r9, r6, lsl #3 + mov r0, r7 + bl FlashMemCmp8 + cmp r0, #0 + bne .L1001 + ldrb r3, [r4, #2234] @ zero_extendqisi2 + add r2, r4, r3, lsl #2 + str r0, [r2, #1180] + add r2, r3, #1 + add r3, r4, r3 + strb r2, [r4, #2234] + strb r6, [r3, #2236] +.L1001: + add r6, r6, #1 + cmp r6, #4 + bne .L1002 + ldrb r3, [r4, #2234] @ zero_extendqisi2 + strb r3, [r10, #-572] + ldrb r3, [r5, #8] @ zero_extendqisi2 + cmp r3, #2 + beq .L1003 +.L1007: + ldrh r2, [r5, #14] + ldrb r3, [r4, #2234] @ zero_extendqisi2 + smulbb r3, r3, r2 + ldrb r2, [r5, #13] @ zero_extendqisi2 + smulbb r3, r3, r2 + ldr r2, .L1015+28 + strh r3, [r2, #-2] @ movhi + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L1003: + ldr r9, [r4, #40] + mov r6, #0 +.L1006: + ldrb r2, [r5] @ zero_extendqisi2 + add r1, r8, r6, lsl #3 + mov r0, r7 + bl FlashMemCmp8 + cmp r0, #0 + bne .L1004 + ldrh r3, [r5, #14] + ldrb r2, [r4, #2234] @ zero_extendqisi2 + and r1, r3, #65280 + ldrb r3, [r5, #13] @ zero_extendqisi2 + mul r3, r9, r3 + mul r3, r3, r1 + add r1, r4, r2, lsl #2 + str r3, [r1, #1180] + ldrb r0, [r5, #23] @ zero_extendqisi2 + cmp r0, #0 + lslne r3, r3, #1 + strne r3, [r1, #1180] + add r3, r2, #1 + add r2, r4, r2 + strb r3, [r4, #2234] + strb r6, [r2, #2236] +.L1004: + add r6, r6, #1 + cmp r6, #4 + bne .L1006 + b .L1007 +.L1016: + .align 2 +.L1015: + .word .LANCHOR1+468 + .word .LANCHOR0 + .word .LANCHOR2 + .word .LANCHOR0+2236 + .word .LANCHOR0+1180 + .word .LANCHOR0+2104 + .word .LANCHOR0+2072 + .word .LANCHOR2-568 + .fnend + .size FlashDieInfoInit, .-FlashDieInfoInit + .align 2 + .global ftl_read_flash_info + .syntax unified + .arm + .fpu softvfp + .type ftl_read_flash_info, %function +ftl_read_flash_info: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, lr} + .save {r4, lr} + mov r2, #11 + mov r1, #0 + mov r4, r0 + bl ftl_memset + ldr r2, .L1021 + mov ip, #1 + ldr r0, .L1021+4 + ldr r3, [r2, #48] + ldr r1, [r2, #40] + ldrb r3, [r3, #9] @ zero_extendqisi2 + smulbb r3, r3, r1 + strh r3, [r4, #4] @ unaligned + ldrb r3, [r2, #2316] @ zero_extendqisi2 + strb r3, [r4, #7] + ldr r3, [r2, #2432] + str r3, [r4] @ unaligned + ldr r3, [r2, #48] + ldrb r1, [r3, #9] @ zero_extendqisi2 + strb r1, [r4, #6] + mov r1, #32 + strb r1, [r4, #8] + ldrb r1, [r2, #2234] @ zero_extendqisi2 + ldrb r3, [r3, #7] @ zero_extendqisi2 + strb r3, [r4, #9] + mov r3, #0 + strb r3, [r4, #10] +.L1018: + uxtb r2, r3 + cmp r1, r2 + bhi .L1019 + pop {r4, pc} +.L1019: + ldrb lr, [r3, r0] @ zero_extendqisi2 + add r3, r3, #1 + ldrb r2, [r4, #10] @ zero_extendqisi2 + orr r2, r2, ip, lsl lr + strb r2, [r4, #10] + b .L1018 +.L1022: + .align 2 +.L1021: + .word .LANCHOR0 + .word .LANCHOR0+2236 + .fnend + .size ftl_read_flash_info, .-ftl_read_flash_info + .align 2 + .global FtlMemInit + .syntax unified + .arm + .fpu softvfp + .type FtlMemInit, %function +FtlMemInit: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + mov r6, #0 + ldr r4, .L1126 + mvn r2, #0 + mov r1, #32 + mov r0, #1024 + ldr r5, .L1126+4 + mov r8, #12 + sub r3, r4, #568 + str r6, [r4, #-564] + strh r6, [r3] @ movhi + movw r3, #65535 + str r3, [r4, #-556] + sub r3, r4, #2656 + strh r2, [r3, #-10] @ movhi + movw r9, #2324 + strh r2, [r3, #-8] @ movhi + mov r7, #36 + strh r2, [r3, #-6] @ movhi + strh r2, [r3, #-4] @ movhi + sub r2, r4, #2720 + strh r6, [r3, #-2] @ movhi + sub r3, r4, #544 + strh r1, [r2] @ movhi + sub r2, r4, #2704 + strh r6, [r3] @ movhi + mov r1, #128 + sub r3, r4, #2608 + strh r1, [r2, #-14] @ movhi + strh r6, [r2, #-8] @ movhi + str r6, [r4, #-2724] + str r6, [r4, #-3332] + str r6, [r4, #-3328] + str r6, [r4, #-3344] + str r6, [r4, #-3356] + str r6, [r4, #-3360] + str r6, [r4, #-3352] + str r6, [r4, #-3348] + str r6, [r4, #-3364] + str r6, [r4, #-3324] + str r6, [r4, #-3320] + str r6, [r4, #-3600] + str r6, [r4, #-3312] + str r6, [r4, #-3308] + str r6, [r4, #-560] + str r6, [r4, #-2708] + str r6, [r4, #-552] + str r6, [r4, #-2716] + str r6, [r4, #-548] + strh r6, [r3, #-14] @ movhi + movw r3, #2396 + ldrh r1, [r5, r3] + bl __aeabi_idiv + movw r3, #2324 + str r6, [r5, #2444] + ldrh r3, [r5, r3] + movw r6, #2394 + str r0, [r4, #-540] + lsl r3, r3, #2 + cmp r0, r3 + ldrh r0, [r5, r6] + strhi r3, [r4, #-540] + lsl r0, r0, #1 + bl ftl_malloc + str r0, [r4, #-2680] + ldrh r0, [r5, r6] + mul r0, r8, r0 + bl ftl_malloc + ldrh r6, [r5, r9] + str r0, [r4, #-2672] + mul r6, r7, r6 + lsl r10, r6, #3 + mov r0, r10 + bl ftl_malloc + str r0, [r4, #-536] + mov r0, r6 + bl ftl_malloc + str r0, [r4, #-532] + mov r0, r10 + bl ftl_malloc + str r0, [r4, #-528] + mov r0, r6 + bl ftl_malloc + str r0, [r4, #-3608] + mov r0, r6 + bl ftl_malloc + str r0, [r4, #-2688] + movw r10, #2402 + ldr r0, [r4, #-540] + ldr r6, .L1126+8 + mul r0, r7, r0 + bl ftl_malloc + ldrh r3, [r5, r9] + ldrh r7, [r6] + str r0, [r5, #2448] + lsl r3, r3, #1 + mov r0, r7 + add r3, r3, #1 + str r3, [r4, #-2684] + bl ftl_malloc + str r0, [r4, #-524] + mov r0, r7 + bl ftl_malloc + str r0, [r4, #-520] + mov r0, r7 + bl ftl_malloc + str r0, [r4, #-516] + ldr r0, [r4, #-2684] + mul r0, r0, r7 + bl ftl_malloc + str r0, [r4, #-2696] + ldr r0, [r4, #-540] + mul r0, r0, r7 + bl ftl_malloc + str r0, [r4, #-512] + mov r0, r7 + bl ftl_malloc + str r0, [r4, #-508] + mov r0, r7 + bl ftl_malloc + str r0, [r4, #-504] + ldr r0, [r4, #-2684] + mul r0, r8, r0 + bl ftl_malloc + ldrh r3, [r5, r10] + ldrh r7, [r5, r9] + movw r9, #2334 + str r0, [r4, #-2700] + mul r7, r7, r3 + mov r0, r7 + bl ftl_malloc + str r0, [r4, #-500] + lsl r0, r7, #3 + ldr r7, .L1126+12 + bl ftl_malloc + ldrh r3, [r5, r10] + str r0, [r4, #-496] + ldr r0, [r4, #-2684] + mul r0, r0, r3 + bl ftl_malloc + ldrh r3, [r5, r10] + str r0, [r4, #-2692] + ldr r0, [r4, #-540] + mul r0, r0, r3 + bl ftl_malloc + str r0, [r4, #-492] + ldrh r0, [r5, r9] + lsl r0, r0, #1 + uxth r0, r0 + strh r0, [r7] @ movhi + bl ftl_malloc + str r0, [r4, #-484] + ldrh r0, [r7] + ldr r3, .L1126+16 + add r0, r0, #544 + add r0, r0, #3 + lsr r0, r0, #9 + strh r0, [r7] @ movhi + and r0, r3, r0, lsl #9 + bl ftl_malloc + ldrh r10, [r5, r9] + str r0, [r4, #-480] + add r0, r0, #32 + str r0, [r4, #-3604] + lsl r10, r10, #1 + mov r0, r10 + bl ftl_malloc + str r0, [r4, #-476] + mov r0, r10 + bl ftl_malloc + ldr r10, [r5, #2420] + str r0, [r4, #-3540] + lsl r10, r10, #1 + mov r0, r10 + bl ftl_malloc + str r0, [r4, #-472] + mov r0, r10 + bl ftl_malloc + str r0, [r4, #-468] + movw r10, #2412 + ldrh r0, [r5, r9] + lsr r0, r0, #3 + add r0, r0, #4 + bl ftl_malloc + str r0, [r5, #32] + ldrh r0, [r5, r10] + lsl r0, r0, #1 + bl ftl_malloc + str r0, [r5, #2440] + ldrh r0, [r5, r10] + lsl r0, r0, #1 + bl ftl_malloc + str r0, [r4, #-464] + ldrh r0, [r5, r10] + movw r10, #2414 + lsl r0, r0, #2 + bl ftl_malloc + str r0, [r4, #-460] + ldrh r0, [r5, r10] + lsl r0, r0, #2 + bl ftl_malloc + ldrh r2, [r5, r10] + mov r1, #0 + str r0, [r4, #-456] + lsl r2, r2, #2 + bl ftl_memset + movw r3, #2428 + ldrh r10, [r5, r3] + lsl r10, r10, #2 + mov r0, r10 + bl ftl_malloc + str r0, [r4, #-452] + mov r0, r10 + bl ftl_malloc + str r0, [r4, #-448] + movw r10, #2430 + ldr r0, [r5, #2420] + lsl r0, r0, #2 + bl ftl_malloc + str r0, [r4, #-444] + ldrh r0, [r5, r10] + mul r0, r8, r0 + mov r8, r6 + add r6, r6, #56 + bl ftl_malloc + ldrh r3, [r5, r10] + str r0, [r4, #-3376] + ldrh r0, [r8], #84 + mul r0, r0, r3 + bl ftl_malloc + ldrh r3, [r5, r9] + movw r9, #2346 + str r0, [r4, #-440] + mov r0, #6 + mul r0, r0, r3 + bl ftl_malloc + movw r3, #2388 + str r0, [r4, #-3548] + ldrh r0, [r5, r3] + ldrh r3, [r5, r9] + add r0, r0, #31 + asr r0, r0, #5 + strh r0, [r7, #52]! @ movhi + mul r0, r0, r3 + lsl r0, r0, #2 + bl ftl_malloc + ldrh r2, [r7] + mov r3, #1 + ldrh ip, [r5, r9] + str r0, [r5, #2484] + lsl r2, r2, #2 + mov r1, r2 +.L1025: + cmp r3, ip + bcc .L1026 + add r6, r6, r3, lsl #2 + ldr r3, .L1126+20 + mov r2, #0 + add r6, r6, #24 +.L1027: + cmp r3, r6 + bne .L1028 + ldr r3, [r4, #-472] + cmp r3, #0 + bne .L1029 +.L1031: + ldr r1, .L1126+24 + ldr r0, .L1126+28 + bl printk + mvn r0, #0 + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L1026: + ldr r0, [r5, #2484] + add r3, r3, #1 + add r0, r0, r1 + add r1, r1, r2 + str r0, [r8, #4]! + b .L1025 +.L1028: + str r2, [r6, #4]! + b .L1027 +.L1029: + ldr r3, [r4, #-468] + cmp r3, #0 + beq .L1031 + ldr r3, [r4, #-452] + cmp r3, #0 + beq .L1031 + ldr r3, [r4, #-444] + cmp r3, #0 + beq .L1031 + ldr r3, [r4, #-3376] + cmp r3, #0 + beq .L1031 + ldr r3, [r4, #-440] + cmp r3, #0 + beq .L1031 + ldr r3, [r4, #-3548] + cmp r3, #0 + beq .L1031 + ldr r3, [r5, #2484] + cmp r3, #0 + beq .L1031 + ldr r3, [r4, #-3540] + cmp r3, #0 + beq .L1031 + ldr r3, [r4, #-2680] + cmp r3, #0 + beq .L1031 + ldr r3, [r4, #-2672] + cmp r3, #0 + beq .L1031 + ldr r3, [r4, #-536] + cmp r3, #0 + beq .L1031 + ldr r3, [r4, #-528] + cmp r3, #0 + beq .L1031 + ldr r3, [r4, #-3608] + cmp r3, #0 + beq .L1031 + ldr r3, [r4, #-2688] + cmp r3, #0 + beq .L1031 + ldr r3, [r4, #-532] + cmp r3, #0 + beq .L1031 + ldr r3, [r4, #-524] + cmp r3, #0 + beq .L1031 + ldr r3, [r4, #-520] + cmp r3, #0 + beq .L1031 + ldr r3, [r4, #-516] + cmp r3, #0 + beq .L1031 + ldr r3, [r4, #-2696] + cmp r3, #0 + beq .L1031 + ldr r3, [r4, #-508] + cmp r3, #0 + beq .L1031 + ldr r3, [r4, #-504] + cmp r3, #0 + beq .L1031 + ldr r3, [r4, #-2700] + cmp r3, #0 + beq .L1031 + ldr r3, [r4, #-500] + cmp r3, #0 + beq .L1031 + ldr r3, [r4, #-496] + cmp r3, #0 + beq .L1031 + ldr r3, [r4, #-2692] + cmp r3, #0 + beq .L1031 + ldr r3, [r4, #-3604] + cmp r3, #0 + beq .L1031 + ldr r3, [r4, #-484] + cmp r3, #0 + beq .L1031 + ldr r3, .L1126+4 + ldr r3, [r3, #2440] + cmp r3, #0 + beq .L1031 + ldr r3, .L1126 + ldr r2, [r3, #-464] + cmp r2, #0 + beq .L1031 + ldr r2, [r3, #-460] + cmp r2, #0 + beq .L1031 + ldr r3, [r3, #-456] + cmp r3, #0 + beq .L1031 + mov r0, #0 + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L1127: + .align 2 +.L1126: + .word .LANCHOR2 + .word .LANCHOR0 + .word .LANCHOR0+2400 + .word .LANCHOR2-488 + .word 33553920 + .word .LANCHOR0+2512 + .word .LANCHOR3 + .word .LC81 + .fnend + .size FtlMemInit, .-FtlMemInit + .align 2 + .global FtlBbt2Bitmap + .syntax unified + .arm + .fpu softvfp + .type FtlBbt2Bitmap, %function +FtlBbt2Bitmap: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L1134 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + mov r5, r1 + mov r4, r0 + mov r1, #0 + mov r0, r5 + movw r6, #65535 + ldrh r2, [r3] + lsl r2, r2, #2 + bl ftl_memset + ldr ip, .L1134+4 + add r0, r4, #1020 + sub r2, r4, #2 + add r0, r0, #2 + mov r4, #1 +.L1130: + ldrh r3, [r2, #2]! + cmp r3, r6 + popeq {r4, r5, r6, pc} + lsr lr, r3, #5 + and r3, r3, #31 + cmp r2, r0 + ldr r1, [r5, lr, lsl #2] + orr r3, r1, r4, lsl r3 + str r3, [r5, lr, lsl #2] + ldrh r3, [ip, #6] + add r3, r3, #1 + strh r3, [ip, #6] @ movhi + bne .L1130 + pop {r4, r5, r6, pc} +.L1135: + .align 2 +.L1134: + .word .LANCHOR2-436 + .word .LANCHOR0+2456 + .fnend + .size FtlBbt2Bitmap, .-FtlBbt2Bitmap + .align 2 + .global FtlBbtMemInit + .syntax unified + .arm + .fpu softvfp + .type FtlBbtMemInit, %function +FtlBbtMemInit: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r2, .L1137 + movw r3, #2456 + mvn r1, #0 + add r0, r2, r3 + strh r1, [r2, r3] @ movhi + mov r3, #0 + mov r2, #16 + strh r3, [r0, #6] @ movhi + mov r1, #255 + add r0, r0, #12 + b ftl_memset +.L1138: + .align 2 +.L1137: + .word .LANCHOR0 + .fnend + .size FtlBbtMemInit, .-FtlBbtMemInit + .align 2 + .global FtlFreeSysBlkQueueInit + .syntax unified + .arm + .fpu softvfp + .type FtlFreeSysBlkQueueInit, %function +FtlFreeSysBlkQueueInit: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r1, .L1141 + movw r2, #2516 + push {r4, lr} + .save {r4, lr} + mov r4, #0 + add r3, r1, r2 + strh r0, [r1, r2] @ movhi + mov r2, #2048 + mov r1, r4 + add r0, r3, #8 + strh r4, [r3, #2] @ movhi + strh r4, [r3, #4] @ movhi + strh r4, [r3, #6] @ movhi + bl ftl_memset + mov r0, r4 + pop {r4, pc} +.L1142: + .align 2 +.L1141: + .word .LANCHOR0 + .fnend + .size FtlFreeSysBlkQueueInit, .-FtlFreeSysBlkQueueInit + .align 2 + .global ftl_free_no_use_map_blk + .syntax unified + .arm + .fpu softvfp + .type ftl_free_no_use_map_blk, %function +ftl_free_no_use_map_blk: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r1, #0 + ldrh r2, [r0, #10] + mov r4, r0 + ldr r5, [r0, #20] + ldr r7, [r0, #12] + ldr r6, [r0, #24] + lsl r2, r2, #1 + mov r0, r5 + bl ftl_memset + mov r2, #0 +.L1144: + ldrh r1, [r4, #6] + uxth r3, r2 + cmp r1, r3 + bhi .L1148 + ldr r2, .L1164 + movw r3, #2392 + mov r6, #0 + mov r8, r6 + mov r10, r6 + ldrh r2, [r2, r3] + ldrh r3, [r4] + lsl r3, r3, #1 + strh r2, [r5, r3] @ movhi + ldrh r9, [r5] +.L1149: + ldrh r3, [r4, #10] + uxth r1, r6 + cmp r3, r1 + bhi .L1153 + mov r0, r8 + pop {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L1148: + uxth r3, r2 + mov r1, #0 + ldr r0, [r6, r3, lsl #2] + ubfx r0, r0, #10, #16 +.L1145: + ldrh ip, [r4, #10] + uxth r3, r1 + cmp ip, r3 + addls r2, r2, #1 + bls .L1144 +.L1147: + uxth r3, r1 + add r1, r1, #1 + lsl r3, r3, #1 + ldrh ip, [r7, r3] + adds lr, ip, #0 + movne lr, #1 + cmp r0, ip + movne lr, #0 + cmp lr, #0 + ldrhne ip, [r5, r3] + addne ip, ip, #1 + strhne ip, [r5, r3] @ movhi + b .L1145 +.L1153: + uxth r3, r6 + lsl r3, r3, #1 + ldrh r2, [r5, r3] + cmp r9, r2 + bls .L1150 + ldrh r0, [r7, r3] + add fp, r7, r3 + cmp r0, #0 + bne .L1151 +.L1152: + add r6, r6, #1 + b .L1149 +.L1150: + cmp r2, #0 + bne .L1152 + ldrh r0, [r7, r3] + add fp, r7, r3 + cmp r0, #0 + beq .L1152 +.L1154: + mov r1, #1 + bl FtlFreeSysBlkQueueIn + strh r10, [fp] @ movhi + ldrh r3, [r4, #8] + sub r3, r3, #1 + strh r3, [r4, #8] @ movhi + b .L1152 +.L1151: + subs r9, r2, #0 + mov r8, r1 + beq .L1154 + b .L1152 +.L1165: + .align 2 +.L1164: + .word .LANCHOR0 + .fnend + .size ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk + .align 2 + .global FtlL2PDataInit + .syntax unified + .arm + .fpu softvfp + .type FtlL2PDataInit, %function +FtlL2PDataInit: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + mov r1, #0 + ldr r4, .L1170 + mvn r7, #0 + ldr r5, .L1170+4 + ldr r2, [r4, #2420] + add r6, r4, #2400 + ldr r0, [r5, #-468] + lsl r2, r2, #1 + bl ftl_memset + movw r2, #2430 + ldrh r3, [r6] + ldrh r2, [r4, r2] + mov r1, #255 + ldr r0, [r5, #-440] + mul r2, r2, r3 + bl ftl_memset + mov r2, #0 + mov r3, r5 + mov r1, r6 + add ip, r6, #30 + mov r5, #12 + mov r6, r2 +.L1167: + ldrh r8, [ip] + uxth r0, r2 + add lr, r2, #1 + cmp r8, r0 + bhi .L1168 + ldr r2, .L1170+8 + mvn r1, #0 + strh r1, [r2, #2] @ movhi + strh r1, [r2] @ movhi + ldr r1, [r4, #2420] + strh r1, [r2, #10] @ movhi + ldr r1, .L1170+12 + strh r1, [r2, #4] @ movhi + ldrh r1, [r2, #44] + strh r1, [r2, #8] @ movhi + movw r1, #2428 + ldrh r1, [r4, r1] + strh r1, [r2, #6] @ movhi + ldr r2, [r3, #-472] + str r2, [r3, #-420] + ldr r2, [r3, #-444] + str r2, [r3, #-416] + ldr r2, [r3, #-468] + str r2, [r3, #-412] + ldr r2, [r3, #-452] + str r2, [r3, #-408] + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L1168: + uxth r2, r2 + ldr r8, [r3, #-3376] + mul r0, r5, r2 + add r9, r8, r0 + str r6, [r9, #4] + strh r7, [r8, r0] @ movhi + ldr r8, [r3, #-3376] + add r0, r8, r0 + ldrh r8, [r1] + mul r2, r2, r8 + ldr r8, [r3, #-440] + bic r2, r2, #3 + add r2, r8, r2 + str r2, [r0, #8] + mov r2, lr + b .L1167 +.L1171: + .align 2 +.L1170: + .word .LANCHOR0 + .word .LANCHOR2 + .word .LANCHOR2-432 + .word -3902 + .fnend + .size FtlL2PDataInit, .-FtlL2PDataInit + .align 2 + .global FtlVariablesInit + .syntax unified + .arm + .fpu softvfp + .type FtlVariablesInit, %function +FtlVariablesInit: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + mvn r3, #0 + ldr r5, .L1174 + mov r4, #0 + mov r1, r4 + movw r7, #2334 + ldr r6, .L1174+4 + sub r2, r5, #380 + str r3, [r5, #-368] + strh r3, [r2] @ movhi + movw r3, #2438 + strh r4, [r6, r3] @ movhi + movw r3, #2412 + ldrh r2, [r6, r3] + ldr r0, [r6, #2440] + str r4, [r5, #-384] + str r4, [r5, #-376] + lsl r2, r2, #1 + str r4, [r5, #-372] + str r4, [r6, #2248] + bl ftl_memset + ldrh r2, [r6, r7] + mov r1, r4 + ldr r0, [r5, #-3604] + lsl r2, r2, #1 + bl ftl_memset + ldrh r2, [r6, r7] + mov r1, r4 + ldr r0, [r5, #-484] + lsl r2, r2, #1 + bl ftl_memset + sub r0, r5, #3584 + mov r1, r4 + mov r2, #48 + sub r0, r0, #12 + bl ftl_memset + sub r0, r5, #3232 + mov r2, #512 + mov r1, r4 + sub r0, r0, #4 + bl ftl_memset + bl FtlGcBufInit + bl FtlL2PDataInit + mov r0, r4 + pop {r4, r5, r6, r7, r8, pc} +.L1175: + .align 2 +.L1174: + .word .LANCHOR2 + .word .LANCHOR0 + .fnend + .size FtlVariablesInit, .-FtlVariablesInit + .align 2 + .global SupperBlkListInit + .syntax unified + .arm + .fpu softvfp + .type SupperBlkListInit, %function +SupperBlkListInit: + .fnstart + @ args = 0, pretend = 0, frame = 16 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + movw r3, #2334 + ldr r6, .L1187 + mov r4, #0 + mov r2, #6 + .pad #20 + sub sp, sp, #20 + ldr r5, .L1187+4 + mov r1, #0 + ldrh r3, [r6, r3] + mov r9, r4 + mov r10, r4 + ldr r0, [r5, #-3548] + sub r7, r5, #3520 + mul r2, r2, r3 + bl ftl_memset + sub r3, r5, #568 + str r4, [r5, #-3528] + str r4, [r5, #-3544] + str r4, [r5, #-3536] + strh r4, [r7, #-12] @ movhi + strh r4, [r7, #-4] @ movhi + strh r4, [r3] @ movhi + str r6, [sp] +.L1177: + ldr r3, .L1187+8 + sxth r8, r4 + ldrh r3, [r3] + cmp r8, r3 + bge .L1184 + ldr r3, .L1187+12 + uxth r1, r4 + mov fp, #0 + mov r6, fp + str r1, [sp, #4] + ldrh r2, [r3] + add r3, r3, #66 + ldrh r3, [r3] + b .L1185 +.L1179: + str r3, [sp, #12] + add fp, fp, #1 + ldr r3, [sp] + str r2, [sp, #8] + add r0, r3, r1 + ldr r1, [sp, #4] + ldrb r0, [r0, #2350] @ zero_extendqisi2 + bl V2P_block + bl FtlBbmIsBadBlock + ldr r3, [sp, #12] + cmp r0, #0 + ldr r2, [sp, #8] + addeq r6, r3, r6 + sxtheq r6, r6 +.L1185: + sxth r1, fp + cmp r1, r2 + blt .L1179 + cmp r6, #0 + lsl fp, r8, #1 + ldreq r3, [r5, #-3540] + mvneq r2, #0 + strheq r2, [r3, fp] @ movhi + beq .L1181 + mov r1, r6 + mov r0, #32768 + bl __aeabi_idiv + sxth r6, r0 +.L1181: + ldr r2, [r5, #-3548] + add r3, fp, r8 + add r3, r2, r3, lsl #1 + strh r6, [r3, #4] @ movhi + ldrh r3, [r7] + cmp r8, r3 + beq .L1182 + ldr r3, .L1187+16 + ldrh r3, [r3] + cmp r8, r3 + beq .L1182 + ldr r3, .L1187+20 + ldrh r3, [r3] + cmp r8, r3 + beq .L1182 + ldr r3, [r5, #-3540] + uxth r0, r4 + ldrh r3, [r3, fp] + cmp r3, #0 + bne .L1183 + add r9, r9, #1 + uxth r9, r9 + bl INSERT_FREE_LIST +.L1182: + add r4, r4, #1 + b .L1177 +.L1183: + add r10, r10, #1 + uxth r10, r10 + bl INSERT_DATA_LIST + b .L1182 +.L1184: + mov r0, #0 + strh r10, [r7, #-12] @ movhi + strh r9, [r7, #-4] @ movhi + add sp, sp, #20 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L1188: + .align 2 +.L1187: + .word .LANCHOR0 + .word .LANCHOR2 + .word .LANCHOR0+2332 + .word .LANCHOR0+2324 + .word .LANCHOR2-3472 + .word .LANCHOR2-3424 + .fnend + .size SupperBlkListInit, .-SupperBlkListInit + .align 2 + .global FtlGcPageVarInit + .syntax unified + .arm + .fpu softvfp + .type FtlGcPageVarInit, %function +FtlGcPageVarInit: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + mov r3, #0 + ldr r4, .L1191 + movw r5, #2394 + mov r1, #255 + ldr r6, .L1191+4 + sub r2, r4, #2672 + ldr r0, [r4, #-2680] + strh r3, [r2, #-4] @ movhi + sub r2, r4, #2656 + strh r3, [r2, #-12] @ movhi + ldrh r2, [r6, r5] + lsl r2, r2, #1 + bl ftl_memset + ldrh r3, [r6, r5] + mov r2, #12 + ldr r0, [r4, #-2672] + mov r1, #255 + mul r2, r2, r3 + bl ftl_memset + pop {r4, r5, r6, lr} + b FtlGcBufInit +.L1192: + .align 2 +.L1191: + .word .LANCHOR2 + .word .LANCHOR0 + .fnend + .size FtlGcPageVarInit, .-FtlGcPageVarInit + .align 2 + .global ftl_memcpy + .syntax unified + .arm + .fpu softvfp + .type ftl_memcpy, %function +ftl_memcpy: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + b memcpy + .fnend + .size ftl_memcpy, .-ftl_memcpy + .align 2 + .global FlashReadIdbData + .syntax unified + .arm + .fpu softvfp + .type FlashReadIdbData, %function +FlashReadIdbData: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, lr} + .save {r4, lr} + mov r2, #2048 + ldr r1, .L1196 + bl ftl_memcpy + mov r0, #0 + pop {r4, pc} +.L1197: + .align 2 +.L1196: + .word .LANCHOR2-364 + .fnend + .size FlashReadIdbData, .-FlashReadIdbData + .align 2 + .global FlashLoadPhyInfoInRam + .syntax unified + .arm + .fpu softvfp + .type FlashLoadPhyInfoInRam, %function +FlashLoadPhyInfoInRam: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + mov r4, #0 + ldr r5, .L1207 + ldr r9, .L1207+4 + add r6, r5, #504 +.L1201: + lsl r8, r4, #5 + ldrb r2, [r6, r4, lsl #5] @ zero_extendqisi2 + mov r1, r9 + add r0, r8, #1 + add r0, r6, r0 + bl FlashMemCmp8 + subs r7, r0, #0 + bne .L1199 + add r5, r5, r8 + ldr r2, .L1207+8 + ldrb r0, [r5, #526] @ zero_extendqisi2 + add r6, r6, r8 + mov r3, r7 + mov r1, r2 +.L1200: + ldrb ip, [r2, r3, lsl #5] @ zero_extendqisi2 + cmp ip, r0 + beq .L1203 + add r3, r3, #1 + cmp r3, #4 + bne .L1200 +.L1203: + ldr r4, .L1207+12 + add r1, r1, r3, lsl #5 + mov r2, #32 + ldr r0, .L1207+16 + bl ftl_memcpy + mov r2, #32 + mov r1, r6 + mov r0, r4 + bl ftl_memcpy + ldrh r0, [r4, #10] + bl FlashBlockAlignInit + b .L1198 +.L1199: + add r4, r4, #1 + cmp r4, #86 + bne .L1201 + mvn r7, #0 +.L1198: + mov r0, r7 + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L1208: + .align 2 +.L1207: + .word .LANCHOR1 + .word .LANCHOR0+2072 + .word .LANCHOR1+3256 + .word .LANCHOR1+468 + .word .LANCHOR0+52 + .fnend + .size FlashLoadPhyInfoInRam, .-FlashLoadPhyInfoInRam + .align 2 + .global NandcCopy1KB + .syntax unified + .arm + .fpu softvfp + .type NandcCopy1KB, %function +NandcCopy1KB: + .fnstart + @ args = 4, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + cmp r1, #1 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + mov r4, r2 + add r2, r0, #4096 + add r6, r0, #512 + add r0, r2, r4, lsl #9 + ldr r5, [sp, #16] + bne .L1210 + cmp r3, #0 + beq .L1211 + mov r2, #1024 + mov r1, r3 + bl ftl_memcpy +.L1211: + cmp r5, #0 + lsrne r4, r4, #1 + ldrne r3, [r5] @ unaligned + addne r4, r4, r4, lsl #1 + strne r3, [r6, r4, lsl #4] + pop {r4, r5, r6, pc} +.L1210: + cmp r3, #0 + beq .L1214 + mov r1, r0 + mov r2, #1024 + mov r0, r3 + bl ftl_memcpy +.L1214: + cmp r5, #0 + popeq {r4, r5, r6, pc} + lsr r4, r4, #1 + add r4, r4, r4, lsl #1 + ldr r3, [r6, r4, lsl #4] + strb r3, [r5] + lsr r2, r3, #8 + strb r2, [r5, #1] + lsr r2, r3, #16 + lsr r3, r3, #24 + strb r2, [r5, #2] + strb r3, [r5, #3] + pop {r4, r5, r6, pc} + .fnend + .size NandcCopy1KB, .-NandcCopy1KB + .align 2 + .global ftl_memcpy32 + .syntax unified + .arm + .fpu softvfp + .type ftl_memcpy32, %function +ftl_memcpy32: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + mov r3, #0 +.L1227: + cmp r3, r2 + bne .L1228 + bx lr +.L1228: + ldr ip, [r1, r3, lsl #2] + str ip, [r0, r3, lsl #2] + add r3, r3, #1 + b .L1227 + .fnend + .size ftl_memcpy32, .-ftl_memcpy32 + .align 2 + .global ftl_memcmp + .syntax unified + .arm + .fpu softvfp + .type ftl_memcmp, %function +ftl_memcmp: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + b memcmp + .fnend + .size ftl_memcmp, .-ftl_memcmp + .align 2 + .global timer_get_time + .syntax unified + .arm + .fpu softvfp + .type timer_get_time, %function +timer_get_time: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L1231 + ldr r0, [r3] + b jiffies_to_msecs +.L1232: + .align 2 +.L1231: + .word jiffies + .fnend + .size timer_get_time, .-timer_get_time + .align 2 + .global FlashSramLoadStore + .syntax unified + .arm + .fpu softvfp + .type FlashSramLoadStore, %function +FlashSramLoadStore: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr ip, .L1238 + cmp r2, #0 + moveq r2, r3 + ldr ip, [ip, #1684] + add ip, ip, #4096 + add ip, ip, r1 + moveq r1, ip + strne lr, [sp, #-4]! + .save {lr} + movne r1, r0 + ldrne lr, [sp], #4 + movne r2, r3 + movne r0, ip +.L1237: + b ftl_memcpy +.L1239: + .align 2 +.L1238: + .word .LANCHOR2 + .fnend + .size FlashSramLoadStore, .-FlashSramLoadStore + .align 2 + .global FlashCs123Init + .syntax unified + .arm + .fpu softvfp + .type FlashCs123Init, %function +FlashCs123Init: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + bx lr + .fnend + .size FlashCs123Init, .-FlashCs123Init + .align 2 + .global ftl_dma32_malloc + .syntax unified + .arm + .fpu softvfp + .type ftl_dma32_malloc, %function +ftl_dma32_malloc: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + cmp r0, #8192 + ble .L1242 + b ftl_malloc +.L1242: + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + add r4, r0, #63 + ldr r5, .L1246 + bic r4, r4, #63 + ldr r3, [r5, #1688] + cmp r4, r3 + ble .L1243 + mov r0, #16384 + bl ftl_malloc + mov r3, #16384 + str r0, [r5, #1692] + str r3, [r5, #1688] +.L1243: + ldr r3, [r5, #1688] + ldr r0, [r5, #1692] + sub r3, r3, r4 + add r4, r0, r4 + str r3, [r5, #1688] + str r4, [r5, #1692] + pop {r4, r5, r6, pc} +.L1247: + .align 2 +.L1246: + .word .LANCHOR2 + .fnend + .size ftl_dma32_malloc, .-ftl_dma32_malloc + .align 2 + .global rk_nand_suspend + .syntax unified + .arm + .fpu softvfp + .type rk_nand_suspend, %function +rk_nand_suspend: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + b ftl_flash_suspend + .fnend + .size rk_nand_suspend, .-rk_nand_suspend + .align 2 + .global rk_nand_resume + .syntax unified + .arm + .fpu softvfp + .type rk_nand_resume, %function +rk_nand_resume: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + b ftl_flash_resume + .fnend + .size rk_nand_resume, .-rk_nand_resume + .align 2 + .global rk_ftl_get_capacity + .syntax unified + .arm + .fpu softvfp + .type rk_ftl_get_capacity, %function +rk_ftl_get_capacity: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L1251 + ldr r0, [r3, #2432] + bx lr +.L1252: + .align 2 +.L1251: + .word .LANCHOR0 + .fnend + .size rk_ftl_get_capacity, .-rk_ftl_get_capacity + .align 2 + .global rk_nandc_get_irq_status + .syntax unified + .arm + .fpu softvfp + .type rk_nandc_get_irq_status, %function +rk_nandc_get_irq_status: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r0, [r0, #372] + bx lr + .fnend + .size rk_nandc_get_irq_status, .-rk_nandc_get_irq_status + .align 2 + .global rknand_proc_ftlread + .syntax unified + .arm + .fpu softvfp + .type rknand_proc_ftlread, %function +rknand_proc_ftlread: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + b ftl_proc_ftl_read + .fnend + .size rknand_proc_ftlread, .-rknand_proc_ftlread + .align 2 + .global ReadFlashInfo + .syntax unified + .arm + .fpu softvfp + .type ReadFlashInfo, %function +ReadFlashInfo: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + b ftl_read_flash_info + .fnend + .size ReadFlashInfo, .-ReadFlashInfo + .align 2 + .global rknand_print_hex + .syntax unified + .arm + .fpu softvfp + .type rknand_print_hex, %function +rknand_print_hex: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r5, #0 + ldr r7, .L1266 + mov r10, r0 + mov r6, r1 + mov r8, r2 + ldr fp, .L1266+4 + mov r9, r3 + mov r4, r5 +.L1257: + cmp r4, r9 + bne .L1263 + ldr r1, .L1266+4 + ldr r0, .L1266+8 + pop {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr} + b printk +.L1263: + cmp r5, #0 + bne .L1258 + mov r3, r4 + mov r2, r6 + mov r1, r10 + ldr r0, .L1266+12 + bl printk +.L1258: + cmp r8, #4 + ldreq r1, [r6, r4, lsl #2] + beq .L1265 + cmp r8, #2 + lsleq r3, r4, #1 + ldrbne r1, [r6, r4] @ zero_extendqisi2 + ldrsheq r1, [r6, r3] +.L1265: + mov r0, r7 + add r5, r5, #1 + bl printk + cmp r5, #15 + bls .L1262 + mov r5, #0 + mov r1, fp + ldr r0, .L1266+8 + bl printk +.L1262: + add r4, r4, #1 + b .L1257 +.L1267: + .align 2 +.L1266: + .word .LC83 + .word .LC84 + .word .LC77 + .word .LC82 + .fnend + .size rknand_print_hex, .-rknand_print_hex + .align 2 + .global HynixGetReadRetryDefault + .syntax unified + .arm + .fpu softvfp + .type HynixGetReadRetryDefault, %function +HynixGetReadRetryDefault: + .fnstart + @ args = 0, pretend = 0, frame = 56 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + mvn r3, #83 + ldr r7, .L1384 + cmp r0, #2 + mvn r1, #82 + mvn r2, #81 + .pad #60 + sub sp, sp, #60 + mov r4, r0 + strb r3, [r7, #1220] + mvn r3, #80 + strb r0, [r7, #1216] + strb r1, [r7, #1221] + strb r2, [r7, #1222] + strb r3, [r7, #1223] + bne .L1269 + mvn r3, #88 + mov r5, #7 + strb r3, [r7, #1220] + mvn r2, #8 + ldr r3, .L1384+4 + strb r2, [r3, #3401] +.L1334: + mov r6, #4 + b .L1270 +.L1269: + cmp r0, #3 + bne .L1271 + mvn r3, #79 + strb r3, [r7, #1220] + mvn r3, #78 + strb r3, [r7, #1221] + mvn r3, #77 + strb r3, [r7, #1222] + mvn r3, #76 + strb r3, [r7, #1223] + mvn r3, #75 + strb r3, [r7, #1224] + mvn r3, #74 + strb r3, [r7, #1225] + mvn r3, #73 + strb r3, [r7, #1226] + mvn r3, #72 +.L1379: + mov r5, #8 + strb r3, [r7, #1227] + mov r6, r5 +.L1270: + sub r3, r4, #1 + cmp r3, #1 + bhi .L1276 + ldr fp, .L1384+8 + mov r10, #0 + ldr r2, .L1384+12 +.L1277: + ldrb r1, [r7, #2234] @ zero_extendqisi2 + uxtb r3, r10 + cmp r1, r3 + bhi .L1283 +.L1284: + ldr r3, .L1384 + strb r6, [r3, #1217] + strb r5, [r3, #1218] + add sp, sp, #60 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L1271: + cmp r0, #4 + bne .L1272 + mvn r0, #51 + strb r1, [r7, #1225] + strb r0, [r7, #1220] + mvn r0, #64 + strb r0, [r7, #1221] + mvn r0, #85 + strb r0, [r7, #1222] + mvn r0, #84 + strb r0, [r7, #1223] + mvn r0, #50 + strb r0, [r7, #1224] + strb r2, [r7, #1226] + b .L1379 +.L1272: + cmp r0, #5 + bne .L1273 + mov r3, #56 + mov r5, #8 + strb r3, [r7, #1220] + mov r3, #57 + strb r3, [r7, #1221] + mov r3, #58 + strb r3, [r7, #1222] + mov r3, #59 + strb r3, [r7, #1223] + b .L1334 +.L1273: + cmp r0, #6 + bne .L1274 + mov r3, #14 + mov r5, #12 + strb r3, [r7, #1220] + mov r3, #15 + strb r3, [r7, #1221] + mov r3, #16 + strb r3, [r7, #1222] + mov r3, #17 + strb r3, [r7, #1223] + b .L1334 +.L1274: + cmp r0, #7 + bne .L1275 + mvn r3, #79 + mov r5, #12 + strb r3, [r7, #1220] + mvn r3, #78 + strb r3, [r7, #1221] + mvn r3, #77 + strb r3, [r7, #1222] + mvn r3, #76 + strb r3, [r7, #1223] + mvn r3, #75 + strb r3, [r7, #1224] + mvn r3, #74 + strb r3, [r7, #1225] + mvn r3, #73 + strb r3, [r7, #1226] + mvn r3, #72 + strb r3, [r7, #1227] + mvn r3, #43 + strb r3, [r7, #1228] + mvn r3, #42 + strb r3, [r7, #1229] + mov r6, #10 + b .L1270 +.L1275: + cmp r0, #8 + mov r5, #7 + bne .L1334 + mov r3, #6 + strb r5, [r7, #1221] + strb r3, [r7, #1220] + mov r3, #9 + strb r3, [r7, #1223] + mov r3, #10 + strb r0, [r7, #1222] + mov r5, #50 + strb r3, [r7, #1224] + mov r6, #5 + b .L1270 +.L1283: + add r3, r7, r3 + mov r8, #0 + ldrb r3, [r3, #2236] @ zero_extendqisi2 + mov r1, #55 + ldr r9, [r7, r3, lsl #3] + add r4, fp, r3, lsl #6 + add r3, r7, r3, lsl #3 + ldrb r3, [r3, #4] @ zero_extendqisi2 + add r4, r4, #20 + add r9, r9, r3, lsl #8 +.L1278: + add r3, fp, r8 + str r1, [r9, #2056] + ldrb r3, [r3, #4] @ zero_extendqisi2 + mov r0, #80 + str r2, [sp, #4] + str r1, [sp] + str r3, [r9, #2052] + bl ndelay + ldr r3, [r9, #2048] + ldm sp, {r1, r2} + strb r3, [r4, r8] + add r8, r8, #1 + uxtb r3, r8 + cmp r6, r3 + bhi .L1278 + mov r0, r4 + mov r1, #0 +.L1281: + mov r3, #1 + add lr, r2, r1 +.L1280: + ldrb ip, [lr, r3, lsl #2] @ zero_extendqisi2 + ldrb r8, [r0] @ zero_extendqisi2 + add ip, ip, r8 + strb ip, [r0, r3, lsl #3] + add r3, r3, #1 + cmp r3, #7 + bne .L1280 + add r1, r1, #1 + add r0, r0, #1 + cmp r1, #4 + bne .L1281 + mov r3, #0 + add r10, r10, #1 + strb r3, [r4, #16] + strb r3, [r4, #24] + strb r3, [r4, #32] + strb r3, [r4, #40] + strb r3, [r4, #48] + strb r3, [r4, #41] + strb r3, [r4, #49] + b .L1277 +.L1276: + sub r3, r4, #3 + cmp r3, #5 + bhi .L1284 + smulbb r3, r6, r5 + ldr r8, .L1384 + asr r2, r3, #1 + lsl r3, r3, #4 + str r3, [sp, #48] + lsl r3, r2, #2 + str r2, [sp, #4] + str r3, [sp, #40] + lsl r3, r2, #1 + str r3, [sp, #28] + mov r3, #0 + str r3, [sp, #24] + add r3, r8, #1216 + add r3, r3, #28 + str r3, [sp, #52] +.L1285: + ldrb r3, [sp, #24] @ zero_extendqisi2 + str r3, [sp, #8] + ldr r2, [sp, #8] + ldrb r3, [r8, #2234] @ zero_extendqisi2 + cmp r3, r2 + bls .L1284 + ldr r3, [sp, #8] + add r3, r8, r3 + ldrb r9, [r3, #2236] @ zero_extendqisi2 + ldr fp, [r8, r9, lsl #3] + mov r0, r9 + add r3, r8, r9, lsl #3 + ldrb r10, [r3, #4] @ zero_extendqisi2 + mov r3, #255 + add r7, fp, r10, lsl #8 + str r3, [r7, #2056] + bl NandcWaitFlashReady + cmp r4, #7 + bne .L1286 + ldr r3, .L1384+8 + mov r0, #160 + mla r0, r0, r9, r3 + add r3, r0, #28 +.L1380: + str r3, [sp, #20] + cmp r4, #4 + add r3, fp, r10, lsl #8 + mov r2, #54 + str r2, [r3, #2056] + bne .L1289 + mov r2, #255 + str r2, [r3, #2052] + mov r2, #64 + str r2, [r3, #2048] + mov r2, #204 +.L1381: + str r2, [r3, #2052] + mov r2, #77 +.L1382: + str r2, [r3, #2048] +.L1290: + add r3, fp, r10, lsl #8 + mov r2, #22 + cmp r4, #6 + str r2, [r3, #2056] + mov r2, #23 + str r2, [r3, #2056] + mov r2, #4 + str r2, [r3, #2056] + mov r2, #25 + str r2, [r3, #2056] + mov r2, #0 + str r2, [r3, #2056] + str r2, [r3, #2052] + str r2, [r3, #2052] + moveq r2, #31 + str r2, [r3, #2052] + mov r2, #2 + str r2, [r3, #2052] + mov r2, #0 + str r2, [r3, #2052] +.L1333: + add r3, fp, r10, lsl #8 + mov r2, #48 + mov r0, r9 + str r2, [r3, #2056] + bl NandcWaitFlashReady + sub r3, r4, #5 + cmp r4, #8 + cmpne r3, #1 + str r3, [sp, #44] + movls r2, #16 + bls .L1294 + cmp r4, #7 + moveq r2, #32 + movne r2, #2 +.L1294: + ldr r3, .L1384+16 + sub r2, r2, #1 + add ip, fp, r10, lsl #8 + ldr r3, [r3, #1696] + str ip, [sp] + sub r1, r3, #1 + uxtab r2, r3, r2 + mov r0, r1 +.L1295: + ldr ip, [sp] + ldr ip, [ip, #2048] + strb ip, [r0, #1]! + cmp r2, r0 + bne .L1295 + cmp r4, #8 + bne .L1296 + mov r2, #0 +.L1298: + ldrb r0, [r3, r2, lsl #2] @ zero_extendqisi2 + uxtb r1, r2 + cmp r0, #50 + beq .L1297 + add r0, r3, r2, lsl #2 + ldrb r0, [r0, #1] @ zero_extendqisi2 + cmp r0, #5 + beq .L1297 + add r2, r2, #1 + cmp r2, #8 + bne .L1298 +.L1299: + mov r1, #0 + ldr r0, .L1384+20 + bl printk +.L1301: + b .L1301 +.L1286: + cmp r4, #8 + beq .L1288 + ldr r3, .L1384+8 + add r0, r3, r9, lsl #6 + add r3, r0, #20 + b .L1380 +.L1289: + sub r2, r4, #5 + cmp r2, #1 + ldrbls r2, [r8, #1220] @ zero_extendqisi2 + strls r2, [r3, #2052] + movls r2, #82 + bls .L1382 + cmp r4, #7 + bne .L1290 + mov r2, #174 + str r2, [r3, #2052] + mov r2, #0 + str r2, [r3, #2048] + mov r2, #176 + b .L1381 +.L1297: + cmp r1, #6 + bhi .L1299 +.L1300: + ldr r1, .L1384+16 + ldr r2, [r1, #1696] + mov r3, r2 +.L1310: + ldr ip, [sp, #48] + sub r0, r3, r2 + cmp r0, ip + blt .L1311 + ldr r3, [sp, #28] + ldr r1, [r1, #1696] + add r0, r1, r3 + mov r3, #8 +.L1313: + mov lr, r0 + mov ip, #0 +.L1312: + ldrh r7, [lr] + add ip, ip, #1 + mvn r7, r7 + strh r7, [lr], #2 @ movhi + ldr r7, [sp, #4] + cmp r7, ip + bgt .L1312 + ldr ip, [sp, #40] + subs r3, r3, #1 + add r0, r0, ip + bne .L1313 + str r1, [sp, #12] + str r3, [sp, #16] +.L1319: + mov ip, #0 + mov r0, ip +.L1318: + mov lr, #1 + mov r7, #16 + lsl lr, lr, r0 + str r7, [sp, #36] + mov r7, #0 + str lr, [sp, #32] + ldr lr, [sp, #12] +.L1316: + ldrh r3, [lr] + mov r1, r3 + ldr r3, [sp, #32] + bics r3, r3, r1 + ldr r3, [sp, #28] + addeq r7, r7, #1 + add lr, lr, r3 + ldr r3, [sp, #36] + subs r3, r3, #1 + str r3, [sp, #36] + bne .L1316 + cmp r7, #8 + add r0, r0, #1 + ldrhi r3, [sp, #32] + orrhi ip, ip, r3 + uxthhi ip, ip + cmp r0, #16 + bne .L1318 + ldr r3, [sp, #12] + strh ip, [r3], #2 @ movhi + str r3, [sp, #12] + ldr r3, [sp, #16] + add r3, r3, #1 + str r3, [sp, #16] + ldr r1, [sp, #16] + ldr r3, [sp, #4] + cmp r3, r1 + bgt .L1319 + ldr r3, .L1384+16 + ldr r1, [r3, #1696] + mov r3, #0 + sub r0, r1, #4 + add ip, r1, #28 +.L1322: + ldr lr, [r0, #4]! + cmp lr, #0 + addeq r3, r3, #1 + cmp ip, r0 + bne .L1322 + cmp r3, #7 + ble .L1323 + ldr r0, .L1384+24 + mov r3, #1024 + mov r2, #1 + bl rknand_print_hex + mov r1, #0 + ldr r0, .L1384+20 + bl printk +.L1324: + b .L1324 +.L1296: + cmp r4, #7 + bne .L1302 + mov r2, #0 +.L1304: + ldrb r0, [r3, r2, lsl #2] @ zero_extendqisi2 + uxtb r1, r2 + cmp r0, #12 + beq .L1303 + add r0, r3, r2, lsl #2 + ldrb r0, [r0, #1] @ zero_extendqisi2 + cmp r0, #10 + beq .L1303 + add r2, r2, #1 + cmp r2, #8 + bne .L1304 +.L1305: + mov r1, #0 + ldr r0, .L1384+20 + bl printk +.L1306: + b .L1306 +.L1303: + cmp r1, #6 + bls .L1300 + b .L1305 +.L1302: + cmp r4, #6 + bne .L1300 + add r3, r3, #7 +.L1307: + ldrb r2, [r1, #1]! @ zero_extendqisi2 + cmp r2, #12 + beq .L1300 + ldrb r2, [r1, #8] @ zero_extendqisi2 + cmp r2, #4 + beq .L1300 + cmp r3, r1 + bne .L1307 + mov r1, #0 + ldr r0, .L1384+20 + bl printk +.L1309: + b .L1309 +.L1311: + ldr r0, [sp] + ldr r0, [r0, #2048] + strb r0, [r3], #1 + b .L1310 +.L1323: + cmp r4, #6 + moveq ip, #4 + beq .L1325 + cmp r4, #7 + moveq ip, #10 + beq .L1325 + cmp r4, #8 + moveq ip, #5 + movne ip, #8 +.L1325: + sub r3, r6, #1 + ldr r0, [sp, #20] + uxtb r3, r3 + mov lr, #0 + add r3, r3, #1 + str r3, [sp, #12] +.L1326: + mov r3, r0 + mov r1, r2 +.L1327: + ldrb r7, [r1], #1 @ zero_extendqisi2 + strb r7, [r3], #1 + sub r7, r1, r2 + uxtb r7, r7 + cmp r6, r7 + bhi .L1327 + ldr r3, [sp, #12] + add lr, lr, #1 + cmp r5, lr + add r0, r0, ip + add r2, r2, r3 + bgt .L1326 + add r10, fp, r10, lsl #8 + mov r3, #255 + mov r0, r9 + str r3, [r10, #2056] + bl NandcWaitFlashReady + ldr r3, [sp, #44] + cmp r3, #1 + bhi .L1329 + mov r3, #54 + ldr r2, [sp] + str r3, [r10, #2056] + mvn r1, #0 + ldrb r3, [r8, #1220] @ zero_extendqisi2 + ldr r0, [sp, #8] + str r3, [r2, #2052] + mov r3, #0 + str r3, [r2, #2048] + mov r3, #22 + str r3, [r10, #2056] + bl FlashReadCmd +.L1330: + mov r0, r9 + bl NandcWaitFlashReady + ldr r3, [sp, #24] + add r3, r3, #1 + str r3, [sp, #24] + b .L1285 +.L1329: + cmp r4, #8 + moveq r3, #190 + movne r3, #56 + str r3, [r10, #2056] + b .L1330 +.L1288: + mov r3, #120 + mov r2, #23 + str r3, [r7, #2056] + mov r3, #0 + str r3, [r7, #2052] + mov r1, #25 + str r3, [r7, #2052] + str r3, [r7, #2052] + str r2, [r7, #2056] + mov r2, #4 + str r2, [r7, #2056] + str r1, [r7, #2056] + mov r1, #218 + str r1, [r7, #2056] + mov r1, #21 + str r3, [r7, #2056] + str r3, [r7, #2052] + str r3, [r7, #2052] + str r1, [r7, #2052] + str r2, [r7, #2052] + str r3, [r7, #2052] + ldr r3, [sp, #52] + str r3, [sp, #20] + b .L1333 +.L1385: + .align 2 +.L1384: + .word .LANCHOR0 + .word .LANCHOR1 + .word .LANCHOR0+1216 + .word .LANCHOR1+3384 + .word .LANCHOR2 + .word .LC85 + .word .LC86 + .fnend + .size HynixGetReadRetryDefault, .-HynixGetReadRetryDefault + .align 2 + .global FlashGetReadRetryDefault + .syntax unified + .arm + .fpu softvfp + .type FlashGetReadRetryDefault, %function +FlashGetReadRetryDefault: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + subs r3, r0, #0 + bxeq lr + sub r2, r3, #1 + cmp r2, #7 + bhi .L1388 + b HynixGetReadRetryDefault +.L1388: + cmp r3, #49 + bne .L1389 + ldr r2, .L1400 + ldr r1, .L1400+4 + strb r3, [r2, #1216] + mov r3, #4 + strb r3, [r2, #1217] + mov r3, #15 + strb r3, [r2, #1218] + mov r2, #64 +.L1398: + ldr r0, .L1400+8 + b ftl_memcpy +.L1389: + sub r2, r3, #65 + cmp r3, #33 + cmpne r2, #1 + bhi .L1390 + ldr r2, .L1400 + strb r3, [r2, #1216] + mov r3, #4 +.L1399: + strb r3, [r2, #1217] + mov r3, #7 + strb r3, [r2, #1218] + mov r2, #45 + ldr r1, .L1400+12 + b .L1398 +.L1390: + cmp r3, #67 + cmpne r3, #34 + ldreq r2, .L1400 + strbeq r3, [r2, #1216] + moveq r3, #5 + beq .L1399 +.L1391: + cmp r3, #68 + cmpne r3, #35 + bxne lr + ldr r2, .L1400 + ldr r1, .L1400+16 + strb r3, [r2, #1216] + mov r3, #5 + strb r3, [r2, #1217] + mov r3, #17 + strb r3, [r2, #1218] + mov r2, #95 + b .L1398 +.L1401: + .align 2 +.L1400: + .word .LANCHOR0 + .word .LANCHOR1+404 + .word .LANCHOR0+1220 + .word .LANCHOR1+256 + .word .LANCHOR1+301 + .fnend + .size FlashGetReadRetryDefault, .-FlashGetReadRetryDefault + .align 2 + .global NandcXferComp + .syntax unified + .arm + .fpu softvfp + .type NandcXferComp, %function +NandcXferComp: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + .pad #8 + ldr r5, .L1442 + ldr r3, [r5, #2264] + ldr r4, [r5, r0, lsl #3] + cmp r3, #3 + bls .L1433 + ldr r3, [r4, #16] + tst r3, #4 + beq .L1433 + ldr r6, [r4, #16] + ldr r3, [r4, #8] + ubfx r6, r6, #1, #1 + cmp r6, #0 + str r3, [sp] + beq .L1404 + ldr r7, .L1442+4 + mov r6, #0 + ldr r8, .L1442+8 +.L1405: + ldr r2, [r4, #28] + ldr r3, [sp] + ubfx r2, r2, #16, #5 + ubfx r3, r3, #22, #6 + cmp r2, r3 + bge .L1413 + ldr r3, [r5, #2264] + cmp r3, #5 + bhi .L1406 +.L1409: + add r6, r6, #1 + bics r3, r6, #-16777216 + bne .L1408 + ldr r2, [r4, #28] + mov r1, r6 + ldr r3, [sp] + mov r0, r7 + ubfx r2, r2, #16, #5 + ubfx r3, r3, #22, #6 + bl printk + mov r3, #512 + mov r2, #4 + mov r1, r4 + mov r0, r8 + bl rknand_print_hex +.L1408: + mov r1, #5 + mov r0, #1 + bl usleep_range + b .L1405 +.L1406: + ldr r3, [r4] + str r3, [sp, #4] + ldr r3, [sp, #4] + tst r3, #8192 + beq .L1409 + ldr r3, [sp, #4] + tst r3, #131072 + beq .L1409 +.L1413: + ldr r3, [r5, #2300] + cmp r3, #0 + beq .L1414 + ldr r1, [sp] + mov r2, #0 + ldr r0, [r5, #2292] + ubfx r1, r1, #22, #5 + lsl r1, r1, #10 + bl rknand_dma_unmap_single + ldr r1, [sp] + mov r2, #0 + ldr r0, [r5, #2296] + ubfx r1, r1, #22, #5 + lsl r1, r1, #7 + bl rknand_dma_unmap_single +.L1414: + mov r3, #0 + str r3, [r5, #2300] +.L1402: + add sp, sp, #8 + @ sp needed + pop {r4, r5, r6, r7, r8, pc} +.L1404: + ldr r7, .L1442+12 + ldr r8, .L1442+8 +.L1415: + ldr r3, [sp] + tst r3, #1048576 + beq .L1417 + ldr r3, [r5, #2308] + cmp r3, #0 + beq .L1418 + mov r0, r4 + bl NandcSendDumpDataStart +.L1418: + ldr r3, [r5, #2300] + cmp r3, #0 + beq .L1419 + ldr r1, [sp] + mov r2, #1 + ldr r0, [r5, #2292] + ubfx r1, r1, #22, #5 + lsl r1, r1, #10 + bl rknand_dma_unmap_single + ldr r1, [sp] + mov r2, #1 + ldr r0, [r5, #2296] + ubfx r1, r1, #22, #5 + lsl r1, r1, #7 + bl rknand_dma_unmap_single +.L1419: + ldr r3, [r5, #2308] + cmp r3, #0 + beq .L1414 + mov r0, r4 + bl NandcSendDumpDataDone + b .L1414 +.L1417: + ldr r3, [r4, #8] + add r6, r6, #1 + str r3, [sp] + bics r3, r6, #-16777216 + bne .L1416 + ldr r2, [sp] + mov r1, r6 + ldr r3, [r4, #28] + mov r0, r7 + ubfx r3, r3, #16, #5 + bl printk + mov r3, #512 + mov r2, #4 + mov r1, r4 + mov r0, r8 + bl rknand_print_hex +.L1416: + mov r1, #5 + mov r0, #1 + bl usleep_range + b .L1415 +.L1433: + ldr r3, [r4, #8] + str r3, [sp] + ldr r3, [sp] + tst r3, #1048576 + beq .L1433 + b .L1402 +.L1443: + .align 2 +.L1442: + .word .LANCHOR0 + .word .LC87 + .word .LC88 + .word .LC89 + .fnend + .size NandcXferComp, .-NandcXferComp + .align 2 + .global NandcXferData + .syntax unified + .arm + .fpu softvfp + .type NandcXferData, %function +NandcXferData: + .fnstart + @ args = 4, pretend = 0, frame = 80 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + tst r3, #63 + ldr r9, .L1484 + .pad #92 + sub sp, sp, #92 + mov r7, r0 + mov r5, r1 + str r2, [sp, #8] + mov r8, r3 + ldr r4, [sp, #128] + ldr r6, [r9, r0, lsl #3] + bne .L1445 + cmp r4, #0 + bne .L1446 + mov r2, #64 + mov r1, #255 + add r0, sp, #24 + bl ftl_memset + add r4, sp, #24 +.L1446: + mov r3, #0 + ldr r2, [sp, #8] + mov r1, r5 + mov r0, r7 + str r4, [sp, #4] + str r8, [sp] + bl NandcXferStart + mov r1, r5 + mov r0, r7 + bl NandcXferComp + cmp r5, #0 + movne r9, #0 + bne .L1447 + ldr r3, [r9, #2312] + mov r2, r5 + cmp r3, #25 + ldr r3, [sp, #8] + movcc ip, #64 + movcs ip, #128 + lsr r1, r3, #1 + mov r3, r5 +.L1449: + cmp r2, r1 + add r4, r4, #4 + add r0, ip, r3 + bcc .L1450 + ldr r3, [sp, #8] + mov r2, #0 + ldr r1, [r9, #2312] + ldr ip, [r9, #2264] + mov r9, r2 + lsr r0, r3, #2 +.L1451: + cmp r2, r0 + bcs .L1447 + cmp r1, #0 + bne .L1457 +.L1447: + mov r3, #0 + str r3, [r6, #16] +.L1458: + ldr r3, .L1484 + ldr r3, [r3, #2264] + cmp r3, #5 + movls r3, #0 + movhi r3, #1 + cmp r5, #0 + movne r3, #0 + cmp r3, #0 + beq .L1444 + ldr r3, [r6] + and r2, r3, #139264 + cmp r2, #139264 + mvneq r9, #0 + orreq r3, r3, #131072 + streq r3, [r6] +.L1444: + mov r0, r9 + add sp, sp, #92 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L1450: + ldr lr, [r9, #2280] + bic r3, r3, #3 + add r2, r2, #1 + ldr r3, [lr, r3] + strb r3, [r4, #-4] + lsr lr, r3, #8 + strb lr, [r4, #-3] + lsr lr, r3, #16 + lsr r3, r3, #24 + strb lr, [r4, #-2] + strb r3, [r4, #-1] + mov r3, r0 + b .L1449 +.L1457: + add r3, r2, #8 + ldr r3, [r6, r3, lsl #2] + str r3, [sp, #20] + ldr r3, [sp, #20] + tst r3, #4 + bne .L1473 + ldr r3, [sp, #20] + ubfx r3, r3, #15, #1 + cmp r3, #0 + bne .L1473 + cmp ip, #5 + bls .L1453 + ldr lr, [sp, #20] + ldr r7, [sp, #20] + ldr r3, [sp, #20] + ldr r4, [sp, #20] + ubfx lr, lr, #3, #5 + ubfx r7, r7, #27, #1 + ubfx r3, r3, #16, #5 + orr lr, lr, r7, lsl #5 + ubfx r4, r4, #29, #1 + orr r3, r3, r4, lsl #5 + cmp lr, r3 + ldr r3, [sp, #20] + ldrhi lr, [sp, #20] + ldrls lr, [sp, #20] + ubfxhi r3, r3, #3, #5 + ubfxls r3, r3, #16, #5 + ubfxhi lr, lr, #27, #1 + ubfxls lr, lr, #29, #1 +.L1483: + orr r3, r3, lr, lsl #5 +.L1455: + cmp r9, r3 + movcc r9, r3 +.L1452: + add r2, r2, #1 + b .L1451 +.L1453: + cmp ip, #3 + bls .L1455 + ldr lr, [sp, #20] + ldr r7, [sp, #20] + ldr r3, [sp, #20] + ldr r4, [sp, #20] + ubfx lr, lr, #3, #5 + ubfx r7, r7, #28, #1 + ubfx r3, r3, #16, #5 + orr lr, lr, r7, lsl #5 + ubfx r4, r4, #30, #1 + orr r3, r3, r4, lsl #5 + cmp lr, r3 + ldr r3, [sp, #20] + ldrhi lr, [sp, #20] + ldrls lr, [sp, #20] + ubfxhi r3, r3, #3, #5 + ubfxls r3, r3, #16, #5 + ubfxhi lr, lr, #28, #1 + ubfxls lr, lr, #30, #1 + b .L1483 +.L1473: + mvn r9, #0 + b .L1452 +.L1445: + cmp r1, #1 + bne .L1459 + mov r9, #0 + cmp r4, #0 + mov r10, r9 + movne r3, #4 + moveq r3, #0 + str r3, [sp, #12] +.L1460: + ldr r3, [sp, #8] + cmp r9, r3 + movcs r9, #0 + bcs .L1458 +.L1462: + cmp r8, #0 + and fp, r9, #3 + addne r3, r8, r9, lsl #9 + moveq r3, r8 + str r4, [sp] + mov r2, fp + mov r1, #1 + mov r0, r6 + bl NandcCopy1KB + mov r3, fp + mov r2, #2 + mov r1, #1 + mov r0, r7 + str r10, [sp, #4] + add r9, r9, #2 + str r10, [sp] + bl NandcXferStart + mov r1, #1 + mov r0, r7 + bl NandcXferComp + ldr r3, [sp, #12] + add r4, r4, r3 + b .L1460 +.L1459: + mov r10, #0 + mov r2, #2 + mov r3, r10 + str r10, [sp, #4] + str r10, [sp] + mov r1, r10 + bl NandcXferStart + mov fp, r8 + cmp r4, r10 + mov r9, r10 + movne r3, #4 + moveq r3, r10 + str r3, [sp, #12] +.L1463: + ldr r3, [sp, #8] + cmp r10, r3 + bcs .L1458 + mov r1, r5 + mov r0, r7 + bl NandcXferComp + ldr r3, [r6, #32] + add r10, r10, #2 + str r3, [sp, #20] + ldr r3, [sp, #8] + cmp r3, r10 + bls .L1464 + mov r3, #0 + mov r2, #2 + str r3, [sp, #4] + mov r1, #0 + str r3, [sp] + mov r0, r7 + and r3, r10, #3 + bl NandcXferStart +.L1464: + ldr r3, [sp, #20] + tst r3, #4 + mvnne r9, #0 + bne .L1465 + ldr r3, [sp, #20] + ldr r2, [sp, #20] + ubfx r3, r3, #3, #5 + ubfx r2, r2, #27, #1 + orr r3, r3, r2, lsl #5 + cmp r9, r3 + movcc r9, r3 +.L1465: + cmp r8, #0 + sub r2, r10, #2 + movne r3, fp + str r4, [sp] + moveq r3, #0 + and r2, r2, #3 + mov r1, #0 + mov r0, r6 + bl NandcCopy1KB + ldr r3, [sp, #12] + add fp, fp, #1024 + add r4, r4, r3 + b .L1463 +.L1485: + .align 2 +.L1484: + .word .LANCHOR0 + .fnend + .size NandcXferData, .-NandcXferData + .align 2 + .global FlashReadRawPage + .syntax unified + .arm + .fpu softvfp + .type FlashReadRawPage, %function +FlashReadRawPage: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + .pad #8 + mov r8, r3 + ldr r3, .L1489 + subs r4, r0, #0 + mov r6, r1 + mov r7, r2 + ldrb r5, [r3, #477] @ zero_extendqisi2 + bne .L1487 + ldr r1, .L1489+4 + ldrb r3, [r1, #37] @ zero_extendqisi2 + ldr r0, [r1, #40] + mul r0, r0, r3 + cmp r0, r6 + movhi r5, #4 +.L1487: + mov r0, r4 + bl NandcWaitFlashReady + mov r0, r4 + bl NandcFlashCs + mov r1, r6 + mov r0, r4 + bl FlashReadCmd + mov r0, r4 + bl NandcWaitFlashReady + mov r3, r7 + mov r2, r5 + str r8, [sp] + mov r1, #0 + mov r0, r4 + bl NandcXferData + mov r1, r0 + mov r0, r4 + bl NandcFlashDeCs + mov r0, r1 + add sp, sp, #8 + @ sp needed + pop {r4, r5, r6, r7, r8, pc} +.L1490: + .align 2 +.L1489: + .word .LANCHOR1 + .word .LANCHOR0 + .fnend + .size FlashReadRawPage, .-FlashReadRawPage + .align 2 + .global FlashDdrTunningRead + .syntax unified + .arm + .fpu softvfp + .type FlashDdrTunningRead, %function +FlashDdrTunningRead: + .fnstart + @ args = 4, pretend = 0, frame = 16 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r7, r3 + ldr r4, .L1517 + .pad #20 + sub sp, sp, #20 + mov fp, r2 + stm sp, {r0, r1} + ldr r3, [r4, #88] + ldr r3, [r3, #304] + str r3, [sp, #12] + ldr r3, [r4, #2264] + cmp r3, #8 + ldr r3, [sp, #56] + movcc r10, #6 + movcs r10, #12 + cmp r3, #0 + moveq r5, #1024 + beq .L1493 + mov r0, #1 + bl FlashSetInterfaceMode + mov r0, #1 + bl NandcSetMode + ldr r0, [sp] + bl FlashReset + mov r3, r7 + mov r2, fp + ldm sp, {r0, r1} + bl FlashReadRawPage + mov r5, r0 + ldrb r0, [r4, #2233] @ zero_extendqisi2 + bl FlashSetInterfaceMode + ldrb r0, [r4, #2233] @ zero_extendqisi2 + bl NandcSetMode + cmn r5, #1 + bne .L1494 +.L1503: + mvn r5, #0 +.L1491: + mov r0, r5 + add sp, sp, #20 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L1494: + mov r2, r5 + ldr r1, [sp, #4] + ldr r0, .L1517+4 + bl printk + cmp r5, #9 + ldrls r3, [sp] + ldrls r3, [r4, r3, lsl #3] + ldrls r2, [r3, #3840] + ldrls r2, [r3] + orrls r2, r2, #131072 + strls r2, [r3] + ldr r2, .L1517+8 + ldr r3, [r2, #1700] + add r3, r3, #1 + cmp r3, #2048 + str r3, [r2, #1700] + movcs r7, #0 + strcs r7, [r2, #1700] + movcs fp, r7 + bcc .L1491 +.L1493: + mov r9, #0 + mvn r8, #0 + mov r6, r9 + mov r4, r9 + str r9, [sp, #8] +.L1501: + uxtb r0, r10 + bl NandcSetDdrPara + mov r3, r7 + mov r2, fp + ldm sp, {r0, r1} + bl FlashReadRawPage + add r3, r5, #1 + cmp r0, r3 + bhi .L1497 + cmp r0, #2 + bhi .L1507 + add r4, r4, #1 + cmp r4, #9 + bls .L1507 + mov r3, r6 + mov r5, r0 + sub r6, r10, r4 + mov r8, #0 +.L1499: + ldr r2, [sp, #8] + cmp r4, r2 + movls r6, r3 +.L1500: + cmp r6, #0 + beq .L1502 + mov r1, r6 + ldr r0, .L1517+12 + bl printk + uxtb r0, r6 + bl NandcSetDdrPara +.L1502: + cmn r8, #1 + bne .L1491 + ldm sp, {r1, r2} + ldr r0, .L1517+16 + bl printk + ldr r3, [sp, #56] + cmp r3, #0 + beq .L1503 + ldr r3, [sp, #12] + ubfx r0, r3, #8, #8 + bl NandcSetDdrPara + b .L1491 +.L1497: + ldr r3, [sp, #8] + cmp r4, r3 + bls .L1508 + cmp r4, #7 + sub r6, r9, r4 + bhi .L1500 + str r4, [sp, #8] +.L1508: + mov r4, #0 + b .L1498 +.L1507: + mov r8, #0 + mov r9, r10 + mov r5, r0 + mov r7, r8 + mov fp, r8 +.L1498: + add r10, r10, #2 + cmp r10, #69 + bls .L1501 + mov r3, r6 + mov r6, r9 + b .L1499 +.L1518: + .align 2 +.L1517: + .word .LANCHOR0 + .word .LC90 + .word .LANCHOR2 + .word .LC91 + .word .LC92 + .fnend + .size FlashDdrTunningRead, .-FlashDdrTunningRead + .align 2 + .global FlashReadPage + .syntax unified + .arm + .fpu softvfp + .type FlashReadPage, %function +FlashReadPage: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #12 + mov r5, r0 + mov r6, r1 + mov r7, r2 + mov r8, r3 + bl FlashReadRawPage + cmn r0, #1 + mov r4, r0 + bne .L1520 + ldr r9, .L1539 + ldrb fp, [r9, #44] @ zero_extendqisi2 + mov r10, r9 + cmp fp, #0 + bne .L1521 +.L1523: + ldrb r3, [r10, #2256] @ zero_extendqisi2 + cmp r3, #0 + beq .L1520 + ldr r3, [r10, #88] + mov r2, r7 + mov r1, r6 + mov r0, r5 + ldr r9, [r3, #304] + mov r3, #1 + str r3, [sp] + mov r3, r8 + bl FlashDdrTunningRead + cmn r0, #1 + mov r4, r0 + beq .L1524 + ldrb r3, [r10, #2316] @ zero_extendqisi2 + cmp r0, r3, lsr #1 + bls .L1520 +.L1524: + ubfx r0, r9, #8, #8 + bl NandcSetDdrPara + b .L1520 +.L1521: + mov r3, #0 + mov r2, r7 + strb r3, [r9, #44] + mov r1, r6 + mov r3, r8 + mov r0, r5 + bl FlashReadRawPage + cmn r0, #1 + strb fp, [r9, #44] + movne r4, r0 + beq .L1523 +.L1520: + ldr r9, .L1539+4 + ldr r10, [r9, #1704] + adds r3, r10, #0 + movne r3, #1 + cmn r4, #1 + movne r3, #0 + cmp r3, #0 + beq .L1519 + mov r3, r8 + mov r2, r7 + mov r1, r6 + mov r0, r5 + blx r10 + mov r3, r6 + mov r4, r0 + mov r1, r0 + mov r2, r5 + ldr r0, .L1539+8 + bl printk + cmn r4, #1 + bne .L1519 + ldr r3, .L1539 + ldrb r3, [r3, #152] @ zero_extendqisi2 + cmp r3, #0 + beq .L1519 + mov r0, r5 + bl flash_enter_slc_mode + ldr r4, [r9, #1704] + mov r3, r8 + mov r2, r7 + mov r1, r6 + mov r0, r5 + blx r4 + mov r4, r0 + mov r0, r5 + bl flash_exit_slc_mode +.L1519: + mov r0, r4 + add sp, sp, #12 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L1540: + .align 2 +.L1539: + .word .LANCHOR0 + .word .LANCHOR2 + .word .LC93 + .fnend + .size FlashReadPage, .-FlashReadPage + .align 2 + .global FlashDdrParaScan + .syntax unified + .arm + .fpu softvfp + .type FlashDdrParaScan, %function +FlashDdrParaScan: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + .pad #8 + mov r6, r0 + ldr r5, .L1551 + mov r4, #0 + mov r7, r1 + ldrb r0, [r5, #2233] @ zero_extendqisi2 + bl FlashSetInterfaceMode + ldrb r0, [r5, #2233] @ zero_extendqisi2 + bl NandcSetMode + mov r3, r4 + mov r2, r4 + mov r1, r7 + str r4, [sp] + mov r0, r6 + bl FlashDdrTunningRead + mov r3, r4 + mov r8, r0 + mov r2, r4 + mov r1, r7 + mov r0, r6 + bl FlashReadRawPage + cmn r8, #1 + cmnne r0, #1 + mov r3, r5 + bne .L1542 + ldrb r2, [r5, #2233] @ zero_extendqisi2 + tst r2, #1 + beq .L1542 + mov r0, #1 + bl FlashSetInterfaceMode + mov r0, #1 + bl NandcSetMode + strb r4, [r5, #2256] +.L1543: + mov r0, #0 + add sp, sp, #8 + @ sp needed + pop {r4, r5, r6, r7, r8, pc} +.L1542: + mov r2, #1 + strb r2, [r3, #2256] + b .L1543 +.L1552: + .align 2 +.L1551: + .word .LANCHOR0 + .fnend + .size FlashDdrParaScan, .-FlashDdrParaScan + .align 2 + .global FlashLoadPhyInfo + .syntax unified + .arm + .fpu softvfp + .type FlashLoadPhyInfo, %function +FlashLoadPhyInfo: + .fnstart + @ args = 0, pretend = 0, frame = 16 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r3, #60 + .pad #20 + sub sp, sp, #20 + ldr r6, .L1568 + mov r5, #0 + mov r8, #4 + strb r3, [sp, #12] + mov r3, #40 + strb r3, [sp, #13] + mov r3, #24 + strb r3, [sp, #14] + mov r3, #16 + ldr r4, .L1568+4 + mvn r7, #0 + strb r3, [sp, #15] + mov r0, r5 + ldr r3, [r6, #40] + str r5, [r4, #1712] + str r3, [sp, #4] + ldr r3, [r4, #1696] + str r3, [r4, #1708] + bl flash_enter_slc_mode +.L1554: + add fp, r5, #1 + mov r9, #0 + add r10, sp, #12 +.L1556: + ldrb r0, [r10, r9] @ zero_extendqisi2 + bl FlashBchSel + mov r3, #0 + ldr r2, [r4, #1696] + mov r1, r5 + mov r0, r3 + bl FlashReadRawPage + cmn r0, #1 + bne .L1555 + mov r3, #0 + ldr r2, [r4, #1696] + mov r1, fp + mov r0, r3 + bl FlashReadRawPage + cmn r0, #1 + bne .L1555 + add r9, r9, #1 + cmp r9, #4 + bne .L1556 +.L1557: + ldr r3, [sp, #4] + subs r8, r8, #1 + add r5, r5, r3 + bne .L1554 + mov r0, r8 + b .L1567 +.L1558: + movw r1, #2036 + add r0, r9, #12 + bl js_hash + ldr r3, [r9, #8] + cmp r3, r0 + mvnne r7, #0 + bne .L1557 + mov r2, #32 + add r1, r9, #160 + ldr r0, .L1568+8 + bl ftl_memcpy + ldr r1, [r4, #1708] + mov r2, #32 + ldr r0, .L1568+12 + add r1, r1, #192 + bl ftl_memcpy + ldr r1, [r4, #1708] + mov r2, #852 + ldr r0, .L1568+16 + add r1, r1, #224 + bl ftl_memcpy + ldr r3, .L1568+8 + ldrh r0, [r3, #10] + bl FlashBlockAlignInit + ldr r7, [r4, #1708] + mov r0, r5 + str r5, [r4, #1712] + ldr r1, [r6, #40] + ldr r3, [r7, #1076] + strb r3, [r6, #2256] + bl __aeabi_uidiv + add r0, r0, #1 + cmp r0, #1 + movls r3, #2 + strhi r0, [r4, #1716] + strls r3, [r4, #1716] + ldrh r3, [r7, #14] + mov r7, #0 + strb r3, [r4, #1720] + b .L1557 +.L1555: + ldr r9, [r4, #1708] + ldr r2, .L1568+20 + ldr r3, [r9] + cmp r3, r2 + bne .L1557 + cmp r7, #0 + bne .L1558 + ldr r1, [r6, #40] + mov r0, r5 + bl __aeabi_uidiv + add r0, r0, #1 + str r0, [r4, #1716] + mov r0, r7 +.L1567: + bl flash_exit_slc_mode + mov r0, r7 + add sp, sp, #20 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L1569: + .align 2 +.L1568: + .word .LANCHOR0 + .word .LANCHOR2 + .word .LANCHOR1+468 + .word .LANCHOR0+52 + .word .LANCHOR0+1216 + .word 1312902724 + .fnend + .size FlashLoadPhyInfo, .-FlashLoadPhyInfo + .align 2 + .global ToshibaReadRetrial + .syntax unified + .arm + .fpu softvfp + .type ToshibaReadRetrial, %function +ToshibaReadRetrial: + .fnstart + @ args = 0, pretend = 0, frame = 24 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r8, r0 + ldr r4, .L1598 + .pad #28 + sub sp, sp, #28 + mov fp, r3 + str r1, [sp, #12] + str r2, [sp, #8] + bl NandcWaitFlashReady + add r3, r4, r8, lsl #3 + ldr r6, [r4, r8, lsl #3] + ldrb r1, [r3, #4] @ zero_extendqisi2 + ldrb r3, [r4, #84] @ zero_extendqisi2 + add r7, r1, #8 + sub r3, r3, #67 + add r7, r6, r7, lsl #8 + cmp r3, #1 + lsl r3, r1, #8 + movls r5, #0 + str r3, [sp, #16] + bls .L1571 + ldrb r5, [r4, #2256] @ zero_extendqisi2 + cmp r5, #0 + beq .L1572 + mov r5, #1 + mov r0, #0 + bl NandcSetDdrMode +.L1572: + lsl r3, r1, #8 + mov r2, #92 + add r3, r6, r3 + str r2, [r3, #2056] + mov r2, #197 + str r2, [r3, #2056] +.L1571: + mvn r3, #0 + mov r9, #1 + str r3, [sp, #4] + lsl r3, r1, #8 + str r3, [sp, #20] +.L1573: + ldr r3, .L1598+4 + ldrb r3, [r3, #1721] @ zero_extendqisi2 + add r3, r3, #1 + cmp r9, r3 + bcc .L1582 + ldr r10, [sp, #4] +.L1581: + ldrb r2, [r4, #84] @ zero_extendqisi2 + mov r1, #0 + mov r0, r7 + sub r2, r2, #67 + cmp r2, #1 + bhi .L1583 + bl SandiskSetRRPara +.L1584: + ldr r3, [sp, #16] + mov r2, #255 + add r6, r6, r3 + str r2, [r6, #2056] + ldrb r2, [r4, #2316] @ zero_extendqisi2 + add r2, r2, r2, lsl #1 + cmp r10, r2, asr #2 + bcc .L1585 + cmn r10, #1 + movne r10, #256 +.L1585: + mov r0, r8 + bl NandcWaitFlashReady + cmp r5, #0 + beq .L1570 + mov r0, #4 + bl NandcSetDdrMode +.L1570: + mov r0, r10 + add sp, sp, #28 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L1582: + ldrb r3, [r4, #84] @ zero_extendqisi2 + mov r0, r7 + uxtb r1, r9 + sub r3, r3, #67 + cmp r3, #1 + bhi .L1574 + bl SandiskSetRRPara +.L1575: + ldrb r3, [r4, #84] @ zero_extendqisi2 + cmp r3, #34 + bne .L1576 + ldr r3, .L1598+4 + ldrb r3, [r3, #1721] @ zero_extendqisi2 + sub r3, r3, #3 + cmp r9, r3 + ldreq r3, [sp, #20] + moveq r2, #179 + addeq r3, r6, r3 + streq r2, [r3, #2056] +.L1576: + ldr r3, [sp, #16] + mov r2, #38 + cmp r5, #0 + add r3, r6, r3 + str r2, [r3, #2056] + mov r2, #93 + str r2, [r3, #2056] + beq .L1577 + mov r0, #4 + bl NandcSetDdrMode + mov r3, fp + ldr r2, [sp, #8] + ldr r1, [sp, #12] + mov r0, r8 + bl FlashReadRawPage + mov r10, r0 + mov r0, #0 + bl NandcSetDdrMode +.L1578: + cmn r10, #1 + beq .L1579 + ldrb r2, [r4, #2316] @ zero_extendqisi2 + ldr r3, [sp, #4] + add r2, r2, r2, lsl #1 + cmn r3, #1 + moveq r3, r10 + cmp r10, r2, asr #2 + str r3, [sp, #4] + bcc .L1581 + mov fp, #0 + str fp, [sp, #8] +.L1579: + add r9, r9, #1 + b .L1573 +.L1574: + bl ToshibaSetRRPara + b .L1575 +.L1577: + mov r3, fp + ldr r2, [sp, #8] + ldr r1, [sp, #12] + mov r0, r8 + bl FlashReadRawPage + mov r10, r0 + b .L1578 +.L1583: + bl ToshibaSetRRPara + b .L1584 +.L1599: + .align 2 +.L1598: + .word .LANCHOR0 + .word .LANCHOR2 + .fnend + .size ToshibaReadRetrial, .-ToshibaReadRetrial + .align 2 + .global SamsungReadRetrial + .syntax unified + .arm + .fpu softvfp + .type SamsungReadRetrial, %function +SamsungReadRetrial: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r8, r0 + ldr r5, .L1614 + mov r9, r3 + mov fp, r1 + mov r10, r2 + bl NandcWaitFlashReady + mov r7, #1 + mvn r4, #0 + add r3, r5, r8, lsl #3 + ldrb r6, [r3, #4] @ zero_extendqisi2 + add r3, r6, #8 + ldr r6, [r5, r8, lsl #3] + add r6, r6, r3, lsl #8 +.L1601: + ldr r3, .L1614+4 + ldrb r3, [r3, #1721] @ zero_extendqisi2 + add r3, r3, #1 + cmp r7, r3 + bcc .L1605 +.L1604: + mov r1, #0 + mov r0, r6 + bl SamsungSetRRPara + ldrb r3, [r5, #2316] @ zero_extendqisi2 + add r3, r3, r3, lsl #1 + cmp r4, r3, asr #2 + bcc .L1600 + cmn r4, #1 + movne r4, #256 +.L1600: + mov r0, r4 + pop {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L1605: + uxtb r1, r7 + mov r0, r6 + bl SamsungSetRRPara + mov r3, r9 + mov r2, r10 + mov r1, fp + mov r0, r8 + bl FlashReadRawPage + cmn r0, #1 + beq .L1602 + ldrb r3, [r5, #2316] @ zero_extendqisi2 + cmn r4, #1 + moveq r4, r0 + add r3, r3, r3, lsl #1 + cmp r0, r3, asr #2 + bcc .L1608 + mov r9, #0 + mov r10, r9 +.L1602: + add r7, r7, #1 + b .L1601 +.L1608: + mov r4, r0 + b .L1604 +.L1615: + .align 2 +.L1614: + .word .LANCHOR0 + .word .LANCHOR2 + .fnend + .size SamsungReadRetrial, .-SamsungReadRetrial + .align 2 + .global MicronReadRetrial + .syntax unified + .arm + .fpu softvfp + .type MicronReadRetrial, %function +MicronReadRetrial: + .fnstart + @ args = 0, pretend = 0, frame = 32 + @ frame_needed = 0, uses_anonymous_args = 0 +.L1618: + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r7, r3 + ldr r3, .L1642 + mov r10, r2 + .pad #44 + sub sp, sp, #44 + mov r5, r0 + ldr fp, .L1642 + ldrb r2, [r3, #2316] @ zero_extendqisi2 + ldrb r3, [r3, #152] @ zero_extendqisi2 + str r1, [sp, #28] + cmp r3, #0 + ldrne r3, .L1642+4 + addeq r2, r2, r2, lsl #1 + asreq r3, r2, #2 + smullne r2, r3, r2, r3 + str r3, [sp, #12] + mov r3, #0 + str r3, [sp, #16] + add r3, fp, r0, lsl #3 + str r3, [sp, #36] +.L1628: + mov r0, r5 + mov r9, #0 + bl NandcWaitFlashReady + ldr r3, [fp, r5, lsl #3] + mvn r4, #0 + str r3, [sp, #20] + ldr r3, [sp, #36] + ldrb r3, [r3, #4] @ zero_extendqisi2 + str r3, [sp, #24] + ldr r2, [sp, #24] + ldr r3, [sp, #20] + add r6, r3, r2, lsl #8 +.L1619: + ldr r3, .L1642+8 + ldrb r3, [r3, #1721] @ zero_extendqisi2 + cmp r9, r3 + bcc .L1623 +.L1622: + ldr r3, [sp, #20] + mov r0, #200 + ldr r2, [sp, #24] + add r6, r3, r2, lsl #8 + mov r3, #239 + str r3, [r6, #2056] + mov r3, #137 + str r3, [r6, #2052] + bl ndelay + mov r3, #0 + str r3, [r6, #2048] + str r3, [r6, #2048] + str r3, [r6, #2048] + str r3, [r6, #2048] + ldr r3, [sp, #12] + cmp r4, r3 + bcc .L1624 + cmn r4, #1 + movne r4, #256 +.L1624: + cmn r4, #1 + movne r6, #0 + moveq r6, #1 + cmp r4, #256 + movne r1, r6 + orreq r1, r6, #1 + cmp r1, #0 + beq .L1625 + mov r3, r9 + str r4, [sp] + ldr r2, [sp, #28] + mov r1, r9 + ldr r0, .L1642+12 + bl printk + ldr r3, [sp, #16] + cmp r3, #0 + bne .L1626 + ldrb r3, [fp, #152] @ zero_extendqisi2 + cmp r3, #0 + moveq r6, #0 + andne r6, r6, #1 + cmp r6, #0 + beq .L1616 + mov r1, #3 + mov r0, r5 + bl micron_auto_read_calibration_config + mov r3, #1 + str r3, [sp, #16] + b .L1628 +.L1623: + mov r3, #239 + mov r0, #200 + str r3, [r6, #2056] + mov r3, #137 + str r3, [r6, #2052] + mov r8, #0 + bl ndelay + add r3, r9, #1 + mov r2, r10 + str r3, [r6, #2048] + mov r0, r5 + str r8, [r6, #2048] + str r3, [sp, #32] + mov r3, r7 + str r8, [r6, #2048] + ldr r1, [sp, #28] + str r8, [r6, #2048] + bl FlashReadRawPage + cmn r0, #1 + beq .L1620 + ldr r3, [sp, #12] + cmn r4, #1 + moveq r4, r0 + cmp r0, r3 + bcc .L1630 + mov r7, r8 + mov r10, r8 +.L1620: + ldr r9, [sp, #32] + b .L1619 +.L1630: + mov r4, r0 + mov r7, r8 + mov r10, r8 + b .L1622 +.L1626: + mov r1, #0 + mov r0, r5 + bl micron_auto_read_calibration_config + cmn r4, #1 + movne r4, #256 +.L1616: + mov r0, r4 + add sp, sp, #44 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L1625: + ldr r3, [sp, #16] + cmp r3, #0 + beq .L1616 + mov r0, r5 + mov r4, #256 + bl micron_auto_read_calibration_config + b .L1616 +.L1643: + .align 2 +.L1642: + .word .LANCHOR0 + .word 1431655766 + .word .LANCHOR2 + .word .LC94 + .fnend + .size MicronReadRetrial, .-MicronReadRetrial + .align 2 + .global HynixReadRetrial + .syntax unified + .arm + .fpu softvfp + .type HynixReadRetrial, %function +HynixReadRetrial: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #12 + mov r9, r3 + ldr r5, .L1662 + mov r8, #0 + mvn r6, #0 + mov fp, r2 + mov r7, r0 + str r1, [sp, #4] + ldr r3, [r5, #48] + add r2, r5, r0 + ldrb r4, [r2, #1228] @ zero_extendqisi2 + ldrb r10, [r5, #1218] @ zero_extendqisi2 + ldrb r3, [r3, #19] @ zero_extendqisi2 + sub r3, r3, #7 + cmp r3, #1 + ldrbls r4, [r2, #1236] @ zero_extendqisi2 + bl NandcWaitFlashReady +.L1646: + cmp r8, r10 + bcc .L1651 +.L1650: + ldr r3, [r5, #48] + add r7, r5, r7 + ldrb r3, [r3, #19] @ zero_extendqisi2 + sub r3, r3, #7 + cmp r3, #1 + ldrb r3, [r5, #2316] @ zero_extendqisi2 + strbls r4, [r7, #1236] + strbhi r4, [r7, #1228] + add r3, r3, r3, lsl #1 + cmp r6, r3, asr #2 + bcc .L1644 + cmn r6, #1 + movne r6, #256 +.L1644: + mov r0, r6 + add sp, sp, #12 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L1651: + add r4, r4, #1 + ldr r2, .L1662+4 + uxtb r4, r4 + ldrb r1, [r5, #1217] @ zero_extendqisi2 + mov r0, r7 + cmp r10, r4 + movls r4, #0 + mov r3, r4 + bl HynixSetRRPara + mov r3, r9 + mov r2, fp + ldr r1, [sp, #4] + mov r0, r7 + bl FlashReadRawPage + cmn r0, #1 + beq .L1648 + ldrb r3, [r5, #2316] @ zero_extendqisi2 + cmn r6, #1 + moveq r6, r0 + add r3, r3, r3, lsl #1 + cmp r0, r3, asr #2 + bcc .L1655 + mov r9, #0 + mov fp, r9 +.L1648: + add r8, r8, #1 + b .L1646 +.L1655: + mov r6, r0 + b .L1650 +.L1663: + .align 2 +.L1662: + .word .LANCHOR0 + .word .LANCHOR0+1220 + .fnend + .size HynixReadRetrial, .-HynixReadRetrial + .align 2 + .syntax unified + .arm + .fpu softvfp + .type samsung_read_retrial, %function +samsung_read_retrial: + .fnstart + @ args = 0, pretend = 0, frame = 16 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #28 + sub sp, sp, #28 + mov r10, r0 + mov fp, r2 + mov r9, r3 + str r1, [sp, #16] + bl NandcWaitFlashReady + ldr r3, .L1694 + ldr r2, [r3, r10, lsl #3] + str r3, [sp, #20] + str r2, [sp, #12] + add r2, r3, r10, lsl #3 + ldrb r6, [r2, #4] @ zero_extendqisi2 + ldrb r2, [r3, #2232] @ zero_extendqisi2 + cmp r2, #0 + bne .L1665 + ldr r3, [sp, #12] + lsl r8, r6, #8 + mvn r4, #0 + mov r7, #1 + add r5, r3, r8 +.L1669: + mov r3, #239 + mov r6, #0 + str r3, [r5, #2056] + mov r3, #141 + str r3, [r5, #2052] + mov r2, fp + ldr r3, .L1694+4 + mov r0, r10 + ldr r1, [sp, #16] + ldrsb r3, [r7, r3] + str r3, [r5, #2048] + mov r3, r9 + str r6, [r5, #2048] + str r6, [r5, #2048] + str r6, [r5, #2048] + bl FlashReadRawPage + cmn r0, #1 + beq .L1666 + ldr r3, [sp, #20] + cmn r4, #1 + moveq r4, r0 + ldrb r3, [r3, #2316] @ zero_extendqisi2 + add r3, r3, r3, lsl #1 + cmp r0, r3, asr #2 + bcc .L1677 + mov r9, r6 + mov fp, r6 +.L1666: + add r7, r7, #1 + cmp r7, #26 + bne .L1669 +.L1668: + ldr r3, [sp, #12] + add r8, r3, r8 + mov r3, #239 + str r3, [r8, #2056] + mov r3, #141 +.L1693: + str r3, [r5, #2052] + mov r3, #0 + str r3, [r5, #2048] + str r3, [r5, #2048] + str r3, [r5, #2048] + str r3, [r5, #2048] + ldr r3, .L1694 + ldrb r3, [r3, #2316] @ zero_extendqisi2 + add r3, r3, r3, lsl #1 + cmp r4, r3, asr #2 + bcc .L1675 + cmn r4, #1 + movne r4, #256 +.L1675: + cmn r4, #1 + cmpne r4, #256 + bne .L1676 + str r4, [sp] + mov r3, r7 + ldr r2, [sp, #16] + mov r1, r7 + ldr r0, .L1694+8 + bl printk +.L1676: + mov r0, r10 + bl NandcWaitFlashReady + mov r0, r4 + add sp, sp, #28 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L1677: + mov r4, r0 + b .L1668 +.L1665: + ldr r3, [sp, #12] + lsl r6, r6, #8 + ldr r8, .L1694+12 + mvn r4, #0 + mov r7, #1 + add r5, r3, r6 +.L1674: + mov r3, #239 + mov r2, fp + str r3, [r5, #2056] + mov r3, #137 + str r3, [r5, #2052] + mov r0, r10 + ldrb r3, [r8, #4] @ zero_extendqisi2 + ldr r1, [sp, #16] + str r3, [r5, #2048] + ldrb r3, [r8, #5] @ zero_extendqisi2 + str r3, [r5, #2048] + ldrb r3, [r8, #6] @ zero_extendqisi2 + str r3, [r5, #2048] + ldrb r3, [r8, #7] @ zero_extendqisi2 + str r3, [r5, #2048] + mov r3, r9 + bl FlashReadRawPage + cmn r0, #1 + beq .L1671 + ldr r3, .L1694 + cmn r4, #1 + moveq r4, r0 + ldrb r3, [r3, #2316] @ zero_extendqisi2 + add r3, r3, r3, lsl #1 + cmp r0, r3, asr #2 + bcc .L1678 + mov r9, #0 + mov fp, r9 +.L1671: + add r7, r7, #1 + add r8, r8, #4 + cmp r7, #26 + bne .L1674 +.L1673: + ldr r3, [sp, #12] + add r6, r3, r6 + mov r3, #239 + str r3, [r6, #2056] + mov r3, #137 + b .L1693 +.L1678: + mov r4, r0 + b .L1673 +.L1695: + .align 2 +.L1694: + .word .LANCHOR0 + .word .LANCHOR3+11 + .word .LC95 + .word .LANCHOR3+37 + .fnend + .size samsung_read_retrial, .-samsung_read_retrial + .align 2 + .global FlashProgPage + .syntax unified + .arm + .fpu softvfp + .type FlashProgPage, %function +FlashProgPage: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + .pad #8 + mov r8, r3 + ldr r3, .L1700 + subs r4, r0, #0 + mov r5, r1 + mov r7, r2 + ldrb r6, [r3, #477] @ zero_extendqisi2 + bne .L1697 + ldr r1, .L1700+4 + ldrb r3, [r1, #37] @ zero_extendqisi2 + ldr r0, [r1, #40] + mul r0, r0, r3 + cmp r0, r5 + bls .L1697 + ldrb r3, [r1, #36] @ zero_extendqisi2 + cmp r3, #0 + movne r6, #4 +.L1697: + mov r0, r4 + bl NandcWaitFlashReady + mov r0, r4 + bl NandcFlashCs + mov r1, r5 + mov r0, r4 + bl FlashProgFirstCmd + mov r3, r7 + mov r2, r6 + str r8, [sp] + mov r1, #1 + mov r0, r4 + bl NandcXferData + mov r1, r5 + mov r0, r4 + bl FlashProgSecondCmd + mov r0, r4 + bl NandcWaitFlashReady + mov r1, r5 + mov r0, r4 + bl FlashReadStatus + mov r1, r0 + mov r0, r4 + bl NandcFlashDeCs + and r0, r1, #1 + add sp, sp, #8 + @ sp needed + pop {r4, r5, r6, r7, r8, pc} +.L1701: + .align 2 +.L1700: + .word .LANCHOR1 + .word .LANCHOR0 + .fnend + .size FlashProgPage, .-FlashProgPage + .align 2 + .global FlashSavePhyInfo + .syntax unified + .arm + .fpu softvfp + .type FlashSavePhyInfo, %function +FlashSavePhyInfo: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + ldr r4, .L1716 + ldr r5, .L1716+4 + ldr r3, [r4, #1696] + ldrb r0, [r4, #1722] @ zero_extendqisi2 + ldr r8, .L1716+8 + str r3, [r4, #1708] + bl FlashBchSel + mov r2, #2048 + mov r1, #0 + ldr r0, [r4, #1696] + bl ftl_memset + ldr r3, [r4, #1708] + mov r2, #32 + ldr r1, .L1716+12 + str r8, [r3] + ldr r0, [r4, #1708] + ldrb r3, [r5, #2234] @ zero_extendqisi2 + add r0, r0, #16 + strh r3, [r0, #-4] @ movhi + ldrb r3, [r5, #37] @ zero_extendqisi2 + strh r3, [r0, #-2] @ movhi + ldrb r3, [r5, #2256] @ zero_extendqisi2 + str r3, [r0, #1060] + bl ftl_memcpy + ldr r0, [r4, #1708] + mov r2, #8 + ldr r1, .L1716+16 + add r0, r0, #80 + bl ftl_memcpy + ldr r0, [r4, #1708] + mov r2, #32 + ldr r1, .L1716+20 + add r0, r0, #96 + bl ftl_memcpy + ldr r0, [r4, #1708] + mov r2, #32 + ldr r1, .L1716+24 + add r0, r0, #160 + bl ftl_memcpy + ldr r0, [r4, #1708] + mov r2, #32 + add r1, r5, #52 + add r0, r0, #192 + bl ftl_memcpy + ldr r0, [r4, #1708] + mov r2, #852 + add r1, r5, #1216 + add r0, r0, #224 + bl ftl_memcpy + ldr r6, [r4, #1708] + movw r1, #2036 + add r0, r6, #12 + bl js_hash + movw r3, #1592 + str r0, [r6, #8] + str r3, [r6, #4] + mov r6, #0 + ldr r3, [r4, #1724] + mov r7, r6 + mov r0, #0 + str r3, [r4, #1708] + bl flash_enter_slc_mode +.L1708: + ldr r1, [r5, #40] + mov r2, #0 + mov r0, r2 + mul r1, r1, r7 + bl FlashEraseBlock + ldrb r9, [r5, #152] @ zero_extendqisi2 + cmp r9, #0 + beq .L1703 + mov r9, #0 +.L1704: + ldr r1, [r5, #40] + mov r3, #0 + ldr r2, [r4, #1696] + mov r0, r3 + mla r1, r1, r7, r9 + add r9, r9, #1 + bl FlashProgPage + cmp r9, #10 + bne .L1704 +.L1705: + ldr r1, [r5, #40] + mov r3, #0 + ldr r2, [r4, #1724] + mov r0, r3 + add r10, r7, #1 + mul r1, r1, r7 + bl FlashReadRawPage + cmn r0, #1 + beq .L1706 + ldr r9, [r4, #1708] + ldr r3, [r9] + cmp r3, r8 + bne .L1706 + movw r1, #2036 + add r0, r9, #12 + bl js_hash + ldr r3, [r9, #8] + cmp r3, r0 + bne .L1706 + ldr r3, [r5, #40] + cmp r6, #1 + str r10, [r4, #1716] + mul r7, r7, r3 + str r7, [r4, #1712] + beq .L1709 + mov r6, #1 +.L1706: + cmp r10, #4 + mov r7, r10 + bne .L1708 +.L1707: + mov r0, #0 + bl flash_exit_slc_mode + clz r0, r6 + lsr r0, r0, #5 + rsb r0, r0, #0 + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L1703: + ldr r1, [r5, #40] + mov r3, r9 + ldr r2, [r4, #1696] + mov r0, r9 + mul r1, r1, r7 + bl FlashProgPage + ldr r1, [r5, #40] + mov r3, r9 + ldr r2, [r4, #1696] + mov r0, r9 + mul r1, r1, r7 + add r1, r1, #1 + bl FlashProgPage + b .L1705 +.L1709: + mov r6, #2 + b .L1707 +.L1717: + .align 2 +.L1716: + .word .LANCHOR2 + .word .LANCHOR0 + .word 1312902724 + .word .LANCHOR0+2072 + .word .LANCHOR0+2236 + .word .LANCHOR0+1180 + .word .LANCHOR1+468 + .fnend + .size FlashSavePhyInfo, .-FlashSavePhyInfo + .align 2 + .global FlashReadIdbDataRaw + .syntax unified + .arm + .fpu softvfp + .type FlashReadIdbDataRaw, %function +FlashReadIdbDataRaw: + .fnstart + @ args = 0, pretend = 0, frame = 16 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r3, #60 + .pad #20 + sub sp, sp, #20 + ldr r4, .L1737 + mov r10, r0 + strb r3, [sp, #12] + mov r3, #40 + strb r3, [sp, #13] + mov r3, #24 + strb r3, [sp, #14] + mov r3, #16 + strb r3, [sp, #15] + ldrb r3, [r4, #2316] @ zero_extendqisi2 + str r3, [sp, #4] + ldr r3, [r4, #2252] + cmp r3, #0 + beq .L1719 + mov r0, #0 + bl flash_enter_slc_mode +.L1719: + ldr r6, .L1737+4 + mvn r8, #0 + mov r5, #2 + mov r2, #2048 + mov r1, #0 + mov r0, r10 + bl ftl_memset +.L1720: + ldrb r3, [r4, #37] @ zero_extendqisi2 + cmp r5, r3 + bcc .L1725 +.L1724: + ldr r0, [sp, #4] + bl FlashBchSel + ldr r3, [r4, #2252] + cmp r3, #0 + beq .L1718 + mov r0, #0 + bl flash_exit_slc_mode +.L1718: + mov r0, r8 + add sp, sp, #20 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L1725: + mov r7, #0 + add fp, sp, #12 +.L1722: + ldrb r9, [r7, fp] @ zero_extendqisi2 + mov r0, r9 + bl FlashBchSel + ldr r1, [r4, #40] + mov r3, #0 + ldr r2, [r6, #1696] + mov r0, r3 + mul r1, r1, r5 + bl FlashReadRawPage + cmn r0, #1 + bne .L1721 + add r7, r7, #1 + cmp r7, #4 + bne .L1722 +.L1723: + add r5, r5, #1 + b .L1720 +.L1728: + mov r8, #0 + b .L1724 +.L1721: + ldr r3, [r6, #1696] + ldr r2, .L1737+8 + ldr r3, [r3] + cmp r3, r2 + bne .L1723 + mov r1, r9 + ldr r0, .L1737+12 + bl printk + mov r2, #2048 + ldr r1, [r6, #1696] + mov r0, r10 + bl ftl_memcpy + ldr r3, [r6, #1696] + ldr r3, [r3, #512] + strb r3, [r4, #37] + ldr r3, [r6, #1716] + cmp r5, r3 + bcs .L1728 + str r5, [r6, #1716] + mov r8, #0 + bl FlashSavePhyInfo + b .L1723 +.L1738: + .align 2 +.L1737: + .word .LANCHOR0 + .word .LANCHOR2 + .word -52655045 + .word .LC96 + .fnend + .size FlashReadIdbDataRaw, .-FlashReadIdbDataRaw + .align 2 + .global FlashInit + .syntax unified + .arm + .fpu softvfp + .type FlashInit, %function +FlashInit: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r7, r0 + ldr r5, .L1837 + .pad #28 + sub sp, sp, #28 + mov r0, #32768 + mov r6, #0 + bl ftl_malloc + str r0, [r5, #1696] + mov r0, #32768 + bl ftl_malloc + str r0, [r5, #1724] + mov r0, #4096 + bl ftl_dma32_malloc + str r0, [r5, #1728] + mov r0, #32768 + bl ftl_malloc + ldr r4, .L1837+4 + mov r8, r6 + str r0, [r5, #1732] + mov r0, #4096 + bl ftl_dma32_malloc + ldr fp, .L1837+8 + mov r3, #50 + str r0, [r5, #1736] + mov r0, r7 + ldr r7, .L1837+12 + strb r3, [r4, #37] + strb r3, [r5, #1720] + mov r3, #128 + str r3, [r4, #40] + mov r3, #60 + str r6, [r5, #1716] + strb r6, [r4, #2256] + str r6, [r5, #1700] + strb r6, [r4, #36] + strb r6, [r5, #1740] + strb r3, [r5, #1722] + bl NandcInit +.L1745: + add r2, r4, r6, lsl #3 + uxtb r9, r6 + ldr r10, [r4, r6, lsl #3] + ldrb r2, [r2, #4] @ zero_extendqisi2 + mov r0, r9 + str r2, [sp, #20] + bl FlashReset + mov r0, r9 + bl NandcFlashCs + ldr r2, [sp, #20] + mov r3, #144 + mov r0, #200 + add r10, r10, r2, lsl #8 + str r3, [r10, #2056] + str r8, [r10, #2052] + bl ndelay + ldr r2, [r10, #2048] + uxtb r2, r2 + strb r2, [r7] + cmp r2, #44 + ldr r1, [r10, #2048] + strb r1, [r7, #1] + ldr r1, [r10, #2048] + strb r1, [r7, #2] + ldr r1, [r10, #2048] + strb r1, [r7, #3] + ldr r1, [r10, #2048] + strb r1, [r7, #4] + ldr r1, [r10, #2048] + strb r1, [r7, #5] + bne .L1740 + mov r2, #239 + mov r0, #200 + str r2, [r10, #2056] + mov r2, #1 + str r2, [r10, #2052] + bl ndelay + mov r2, #4 + str r2, [r10, #2048] + str r8, [r10, #2048] + str r8, [r10, #2048] + str r8, [r10, #2048] +.L1740: + mov r0, r9 + bl NandcFlashDeCs + ldrb r2, [r7] @ zero_extendqisi2 + sub r3, r2, #1 + uxtb r3, r3 + cmp r3, #253 + bhi .L1741 + ldrb r1, [r7, #5] @ zero_extendqisi2 + mov r0, fp + ldrb r3, [r7, #1] @ zero_extendqisi2 + str r1, [sp, #12] + ldrb r1, [r7, #4] @ zero_extendqisi2 + str r1, [sp, #8] + ldrb r1, [r7, #3] @ zero_extendqisi2 + str r1, [sp, #4] + ldrb r1, [r7, #2] @ zero_extendqisi2 + str r1, [sp] + add r1, r6, #1 + bl printk +.L1741: + cmp r6, #0 + bne .L1742 + ldrb r3, [r4, #2072] @ zero_extendqisi2 + sub r3, r3, #1 + uxtb r3, r3 + cmp r3, #253 + bhi .L1792 + ldrb r3, [r4, #2073] @ zero_extendqisi2 + cmp r3, #255 + beq .L1792 +.L1742: + ldrb r3, [r7] @ zero_extendqisi2 + add r6, r6, #1 + add r7, r7, #8 + cmp r3, #181 + moveq r3, #44 + strbeq r3, [r7, #-8] + cmp r6, #4 + bne .L1745 + ldrb r3, [r4, #2072] @ zero_extendqisi2 + cmp r3, #173 + beq .L1746 + ldr r0, [r4, #2260] + bl NandcSetDdrMode +.L1746: + mov r2, #852 + mov r1, #0 + ldr r0, .L1837+16 + bl ftl_memset + ldr r6, .L1837+20 + ldr r2, .L1837+24 + ldr r0, [r4, #2268] + add r3, r2, #468 + cmp r0, r6 + str r3, [r4, #48] + mov r3, #0 + strb r3, [r4, #44] + bne .L1747 + ldrb r3, [r2, #487] @ zero_extendqisi2 + cmp r3, #50 + movne r3, #1 + strne r3, [r4, #2252] +.L1747: + ldrb r3, [r4, #2073] @ zero_extendqisi2 + cmp r3, #241 + cmpne r3, #161 + and ip, r3, #253 + moveq r1, #1 + movne r1, #0 + cmp r3, #218 + orreq r1, r1, #1 + cmp ip, #209 + orreq r1, r1, #1 + cmp r1, #0 + bne .L1748 + cmp r3, #220 + bne .L1749 + ldrb r1, [r4, #2075] @ zero_extendqisi2 + cmp r1, #149 + bne .L1749 +.L1748: + mov ip, #16 + mov r1, #1 + strb ip, [r4, #37] + strb ip, [r5, #1722] + ldrb ip, [r4, #2072] @ zero_extendqisi2 + strb r1, [r4, #36] + strb r3, [r2, #3414] + cmp ip, #152 + strb ip, [r2, #3413] + bne .L1751 + ldrb ip, [r4, #2076] @ zero_extendqisi2 + lsrs ip, ip, #7 + moveq r1, #24 + strbne r1, [r5, #1740] + strbeq r1, [r5, #1722] +.L1751: + movw r1, #2049 + cmp r0, r1 + cmpne r0, r6 + moveq r1, #16 + strbeq r1, [r5, #1722] + cmp r3, #218 + bne .L1755 + ldr r3, .L1837+28 + mov r1, #2048 + strh r1, [r3, #14] @ movhi + mvn r3, #37 +.L1831: + strb r3, [r2, #3414] +.L1756: + mov r2, #32 + ldr r1, .L1837+32 + ldr r0, .L1837+36 + bl ftl_memcpy + ldr r1, .L1837+28 + mov r2, #32 + sub r0, r1, #2944 + bl ftl_memcpy +.L1749: + ldrb r3, [r4, #36] @ zero_extendqisi2 + cmp r3, #0 + bne .L1759 + bl FlashLoadPhyInfoInRam + cmp r0, #0 + bne .L1761 + ldr r3, [r4, #48] + ldrh r3, [r3, #16] + lsr r3, r3, #8 + tst r3, #1 + and r0, r3, #7 + strb r0, [r4, #2233] + bne .L1761 + mov r3, #1 + strb r3, [r4, #2256] + bl FlashSetInterfaceMode + ldrb r0, [r4, #2233] @ zero_extendqisi2 + bl NandcSetMode +.L1761: + ldr r3, [r4, #48] + ldrb r3, [r3, #26] @ zero_extendqisi2 + strb r3, [r4, #152] + bl FlashLoadPhyInfo + cmp r0, #0 + beq .L1759 + ldr r3, [r4, #2260] + cmp r3, #0 + beq .L1764 + mov r0, #1 + bl FlashSetInterfaceMode + mov r0, #1 +.L1832: + bl NandcSetMode + bl FlashLoadPhyInfo + cmp r0, #0 + beq .L1759 + mov r0, #1 + bl FlashSetInterfaceMode + mov r0, #1 + bl NandcSetMode + ldr r3, [r4, #48] + ldr r0, .L1837+40 + ldrh r1, [r3, #14] + bl printk + bl FlashLoadPhyInfoInRam + cmn r0, #1 + beq .L1739 + bl FlashDieInfoInit + ldr r3, [r4, #48] + ldrb r0, [r3, #19] @ zero_extendqisi2 + bl FlashGetReadRetryDefault + ldr r3, .L1837+44 + ldr r2, [r4, #48] + ldrh r3, [r3, #-2] + ldrb r1, [r2, #9] @ zero_extendqisi2 + add r3, r3, #4080 + add r3, r3, #15 + cmp r1, r3, asr #12 + ldrh r3, [r2, #14] + blt .L1766 + add r0, r3, #255 + cmp r1, r0, asr #8 + bge .L1767 +.L1766: + bic r3, r3, #255 + strh r3, [r2, #14] @ movhi +.L1767: + ldrb r3, [r4, #2233] @ zero_extendqisi2 + tst r3, #6 + beq .L1768 + bl FlashSavePhyInfo + mov r0, #0 + bl flash_enter_slc_mode + ldr r1, [r5, #1712] + mov r0, #0 + bl FlashDdrParaScan + mov r0, #0 + bl flash_exit_slc_mode +.L1768: + bl FlashSavePhyInfo +.L1759: + ldr r7, [r4, #48] + ldrb r3, [r7, #26] @ zero_extendqisi2 + ldrb r1, [r7, #12] @ zero_extendqisi2 + ldrh r0, [r7, #10] + strb r3, [r4, #152] + ldrh r3, [r7, #16] + ubfx r2, r3, #7, #1 + strb r2, [r4, #44] + ubfx r2, r3, #3, #1 + strb r2, [r5, #1741] + ubfx r2, r3, #4, #1 + ubfx r3, r3, #8, #3 + strb r2, [r4, #2244] + strb r3, [r4, #2233] + mov r3, #0 + str r3, [r5, #1704] + bl __aeabi_idiv + mov r1, r0 + ldrb r0, [r7, #18] @ zero_extendqisi2 + bl BuildFlashLsbPageTable + bl FlashDieInfoInit + ldr r3, [r4, #48] + ldrh r2, [r3, #16] + tst r2, #64 + beq .L1770 + ldrb r0, [r3, #19] @ zero_extendqisi2 + ldrb r3, [r4, #1217] @ zero_extendqisi2 + strb r0, [r4, #84] + strb r3, [r4, #85] + ldrb r3, [r4, #1218] @ zero_extendqisi2 + strb r3, [r5, #1721] + sub r3, r0, #1 + cmp r3, #7 + bhi .L1771 + ldr r3, .L1837+48 + str r3, [r5, #1704] + sub r3, r0, #5 + cmp r0, #8 + cmpne r3, #1 + movls r3, #1 + strls r3, [r4, #2308] + cmp r0, #7 + ldr r3, .L1837+16 + beq .L1793 + cmp r0, #8 + addne r3, r3, #20 + bne .L1773 +.L1793: + add r3, r3, #28 +.L1773: + sub r1, r3, #1 + mov r2, #0 + add r3, r3, #31 +.L1775: + ldrsb ip, [r1, #1]! + cmp ip, #0 + addeq r2, r2, #1 + cmp r3, r1 + bne .L1775 + cmp r2, #27 + bls .L1770 + bl FlashGetReadRetryDefault + bl FlashSavePhyInfo +.L1770: + ldr r3, [r4, #2268] + cmp r3, r6 + bne .L1785 + ldrb r2, [r4, #152] @ zero_extendqisi2 + cmp r2, #0 + ldrne r2, [r4, #48] + movne r1, #0 + strbne r1, [r2, #18] +.L1785: + ldrb r2, [r4, #2072] @ zero_extendqisi2 + cmp r2, #44 + bne .L1786 + ldrb r2, [r4, #2256] @ zero_extendqisi2 + cmp r2, #0 + beq .L1786 + cmp r3, r6 + bne .L1787 + ldrb r3, [r4, #152] @ zero_extendqisi2 + cmp r3, #0 + bne .L1786 +.L1787: + mov r3, #0 + mov r0, #1 + strb r3, [r4, #2256] + bl FlashSetInterfaceMode + mov r0, #1 + bl NandcSetMode +.L1786: + ldrb r3, [r4, #2233] @ zero_extendqisi2 + tst r3, #6 + beq .L1788 + ldrb r2, [r4, #2256] @ zero_extendqisi2 + cmp r2, #0 + bne .L1789 + tst r3, #1 + bne .L1788 +.L1789: + mov r0, #0 + bl flash_enter_slc_mode + ldr r1, [r5, #1712] + mov r0, #0 + bl FlashDdrParaScan + mov r0, #0 + bl flash_exit_slc_mode +.L1788: + ldr r3, [r4, #48] + mov r6, #16 + ldrb r0, [r3, #20] @ zero_extendqisi2 + bl FlashBchSel + ldr r0, .L1837+52 + bl FlashReadIdbDataRaw + ldr r0, .L1837+56 + strb r6, [r4, #37] + bl FlashTimingCfg + ldr r5, [r4, #48] + ldrb r2, [r4, #2073] @ zero_extendqisi2 + ldrb r3, [r5, #12] @ zero_extendqisi2 + ldrh r7, [r5, #14] + strh r3, [r4, #132] @ movhi + ldrb r3, [r5, #7] @ zero_extendqisi2 + str r3, [r4, #128] + lsl r3, r2, r6 + orr r3, r3, r2, lsl #8 + ldrb r2, [r4, #2072] @ zero_extendqisi2 + orr r3, r3, r2 + ldrb r2, [r4, #2075] @ zero_extendqisi2 + orr r3, r3, r2, lsl #24 + str r3, [r4, #124] + ldrb r3, [r4, #2234] @ zero_extendqisi2 + strh r3, [r4, #134] @ movhi + ldrb r3, [r5, #13] @ zero_extendqisi2 + strh r7, [r4, #138] @ movhi + strh r3, [r4, #136] @ movhi + ldrh r3, [r5, #10] + strh r3, [r4, #140] @ movhi + ldrb r1, [r5, #12] @ zero_extendqisi2 + ldrh r0, [r5, #10] + bl __aeabi_idiv + strh r0, [r4, #142] @ movhi + ldrb r2, [r5, #9] @ zero_extendqisi2 + strh r2, [r4, #144] @ movhi + ldrh r1, [r5, #10] + ldrb r3, [r5, #9] @ zero_extendqisi2 + smulbb r3, r3, r1 + mov r1, #512 + strh r1, [r4, #148] @ movhi + ldrb r1, [r4, #37] @ zero_extendqisi2 + uxth r3, r3 + strh r1, [r4, #150] @ movhi + ldrb r1, [r4, #36] @ zero_extendqisi2 + strh r3, [r4, #146] @ movhi + cmp r1, #1 + bne .L1790 + lsl r3, r3, #1 + lsr r1, r7, #1 + lsl r2, r2, #1 + strb r6, [r4, #37] + strh r3, [r4, #146] @ movhi + mov r3, #8 + strh r1, [r4, #138] @ movhi + strh r2, [r4, #144] @ movhi + strh r3, [r4, #150] @ movhi +.L1790: + ldrb r0, [r5, #20] @ zero_extendqisi2 + bl FlashBchSel + bl ftl_flash_suspend + mov r0, #0 +.L1739: + add sp, sp, #28 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L1755: + cmp r3, #220 + ldreq r3, .L1837+28 + moveq r1, #4096 + strheq r1, [r3, #14] @ movhi + mvneq r3, #35 + beq .L1831 +.L1757: + cmp r3, #211 + ldreq r3, .L1837+28 + moveq r1, #4096 + strheq r1, [r3, #14] @ movhi + moveq r3, #2 + strbeq r3, [r2, #3425] + b .L1756 +.L1764: + ldrb r0, [r4, #2233] @ zero_extendqisi2 + bl FlashSetInterfaceMode + ldrb r0, [r4, #2233] @ zero_extendqisi2 + b .L1832 +.L1771: + sub r3, r0, #17 + cmp r3, #2 + bhi .L1777 + ldr r3, .L1837+60 + cmp r0, #19 + str r3, [r5, #1704] + moveq r3, #15 + beq .L1834 +.L1836: + mov r3, #7 +.L1834: + strb r3, [r5, #1721] + b .L1770 +.L1777: + sub r3, r0, #65 + cmp r0, #33 + cmpne r3, #1 + ldrls r3, .L1837+64 + strls r3, [r5, #1704] + movls r3, #4 + strbls r3, [r4, #85] + bls .L1836 +.L1779: + sub r3, r0, #67 + sub r2, r0, #34 + uxtb r3, r3 + cmp r3, #1 + cmphi r2, #1 + movls r2, #1 + movhi r2, #0 + bhi .L1780 + ldr r2, .L1837+64 + cmp r0, #68 + cmpne r0, #35 + str r2, [r5, #1704] + movne r2, #7 + moveq r2, #17 + cmp r3, #1 + movls r3, #4 + movhi r3, #5 + strb r2, [r5, #1721] + strb r3, [r4, #85] + b .L1770 +.L1780: + cmp r0, #49 + ldreq r3, .L1837+68 + streq r3, [r5, #1704] + beq .L1770 + cmp r0, #50 + ldreq r3, .L1837+72 + streq r2, [r4, #2252] + streq r3, [r5, #1704] + b .L1770 +.L1792: + mvn r0, #1 + b .L1739 +.L1838: + .align 2 +.L1837: + .word .LANCHOR2 + .word .LANCHOR0 + .word .LC97 + .word .LANCHOR0+2072 + .word .LANCHOR0+1216 + .word 1446522928 + .word .LANCHOR1 + .word .LANCHOR1+3412 + .word .LANCHOR1+3288 + .word .LANCHOR0+52 + .word .LC98 + .word .LANCHOR2-568 + .word HynixReadRetrial + .word .LANCHOR2-364 + .word 150000 + .word MicronReadRetrial + .word ToshibaReadRetrial + .word SamsungReadRetrial + .word samsung_read_retrial + .fnend + .size FlashInit, .-FlashInit + .align 2 + .global FlashPageProgMsbFFData + .syntax unified + .arm + .fpu softvfp + .type FlashPageProgMsbFFData, %function +FlashPageProgMsbFFData: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + mov r8, r0 + ldr r5, .L1855 + mov r9, r1 + mov r4, r2 + ldrb r3, [r5, #152] @ zero_extendqisi2 + cmp r3, #0 + beq .L1840 + ldr r3, [r5, #2252] + cmp r3, #0 + popne {r4, r5, r6, r7, r8, r9, r10, pc} +.L1840: + ldr r3, [r5, #48] + ldrb r3, [r3, #19] @ zero_extendqisi2 + sub r2, r3, #5 + cmp r3, #50 + cmpne r2, #2 + bls .L1841 + sub r2, r3, #19 + and r2, r2, #239 + cmp r2, #0 + cmpne r3, #68 + popne {r4, r5, r6, r7, r8, r9, r10, pc} +.L1841: + ldr r6, .L1855+4 + sub r7, r6, #2608 + sub r7, r7, #12 +.L1843: + ldr r3, [r5, #48] + ldrh r3, [r3, #10] + cmp r3, r4 + bhi .L1844 + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L1844: + lsl r3, r4, #1 + ldrh r2, [r7, r3] + movw r3, #65535 + cmp r2, r3 + popne {r4, r5, r6, r7, r8, r9, r10, pc} + mov r2, #32768 + mov r1, #255 + ldr r0, [r6, #1724] + bl ftl_memset + ldr r3, [r6, #1724] + add r1, r4, r9 + mov r0, r8 + add r4, r4, #1 + uxth r4, r4 + mov r2, r3 + bl FlashProgPage + b .L1843 +.L1856: + .align 2 +.L1855: + .word .LANCHOR0 + .word .LANCHOR2 + .fnend + .size FlashPageProgMsbFFData, .-FlashPageProgMsbFFData + .align 2 + .global FlashReadSlc2KPages + .syntax unified + .arm + .fpu softvfp + .type FlashReadSlc2KPages, %function +FlashReadSlc2KPages: + .fnstart + @ args = 0, pretend = 0, frame = 24 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L1906 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r4, r0 + ldr r8, .L1906+4 + mov r9, #0 + .pad #36 + sub sp, sp, #36 + ldr fp, .L1906+8 + ldrb r3, [r3, #477] @ zero_extendqisi2 + str r1, [sp, #16] + str r2, [sp, #20] + str r3, [sp, #12] +.L1858: + ldr r3, [sp, #16] + cmp r9, r3 + bne .L1878 + mov r0, #0 + add sp, sp, #36 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L1878: + ldr r3, [sp, #16] + add r2, sp, #28 + ldr r1, [sp, #20] + mov r0, r4 + sub r3, r3, r9 + uxtb r3, r3 + str r3, [sp] + add r3, sp, #24 + bl LogAddr2PhyAddr + ldrb r2, [r8, #2234] @ zero_extendqisi2 + ldr r3, [sp, #24] + cmp r2, r3 + mvnls r3, #0 + strls r3, [r4] + bls .L1860 + add r3, r8, r3 + mov r7, #0 + ldrb r6, [r3, #2236] @ zero_extendqisi2 + mov r0, r6 + bl NandcWaitFlashReady + mov r0, r6 + bl NandcFlashCs +.L1861: + ldr r1, [sp, #28] + mov r0, r6 + bl FlashReadCmd + mov r0, r6 + bl NandcWaitFlashReady + ldr r3, [r4, #12] + mov r1, #0 + ldr r2, [sp, #12] + mov r0, r6 + str r3, [sp] + ldr r3, [r4, #8] + bl NandcXferData + ldrb r3, [fp, #1740] @ zero_extendqisi2 + mov r5, r0 + cmp r3, #0 + beq .L1862 + mov r0, r6 + bl flash_read_ecc + cmp r0, #5 + movhi r5, #256 +.L1862: + cmp r7, #9 + cmnls r5, #1 + moveq r3, #1 + movne r3, #0 + addeq r7, r7, #1 + beq .L1861 +.L1863: + cmp r7, #0 + mov r7, r3 + movne r5, #256 +.L1865: + ldr r3, [r8, #40] + mov r0, r6 + ldr r1, [sp, #28] + add r1, r1, r3 + bl FlashReadCmd + mov r0, r6 + bl NandcWaitFlashReady + ldr r3, [r4, #8] + mov r1, #0 + ldr r2, [r4, #12] + mov r0, r6 + cmp r3, #0 + addne r3, r3, #2048 + cmp r2, #0 + addne r2, r2, #8 + str r2, [sp] + ldr r2, [sp, #12] + bl NandcXferData + ldrb r2, [fp, #1740] @ zero_extendqisi2 + mov r10, r0 + cmp r2, #0 + beq .L1868 + mov r0, r6 + bl flash_read_ecc + cmp r0, #5 + movhi r10, #256 +.L1868: + cmp r7, #9 + cmnls r10, #1 + addeq r7, r7, #1 + beq .L1865 +.L1869: + cmp r7, #0 + mov r0, r6 + movne r10, #256 + bl NandcFlashDeCs + ldrb r3, [r8, #2316] @ zero_extendqisi2 + cmp r5, r10 + movcc r5, r10 + add r3, r3, r3, lsl #1 + cmp r5, r3, asr #2 + bls .L1871 + cmn r5, #1 + movne r5, #256 +.L1871: + cmp r5, #256 + cmnne r5, #1 + movne r3, #0 + streq r5, [r4] + strne r3, [r4] + ldr r3, [r4, #12] + cmp r3, #0 + beq .L1874 + ldr r2, [r3, #12] + cmn r2, #1 + bne .L1874 + ldr r2, [r3, #8] + cmn r2, #1 + bne .L1874 + ldr r3, [r3] + cmn r3, #1 + strne r2, [r4] +.L1874: + ldr r3, [r4] + cmn r3, #1 + bne .L1860 + ldr r1, [r4, #4] + ldrb r2, [r8, #2316] @ zero_extendqisi2 + ldr r0, .L1906+12 + bl printk + ldr r1, [r4, #8] + cmp r1, #0 + beq .L1876 + mov r3, #8 + mov r2, #4 + ldr r0, .L1906+16 + bl rknand_print_hex +.L1876: + ldr r1, [r4, #12] + cmp r1, #0 + beq .L1860 + mov r3, #4 + ldr r0, .L1906+20 + mov r2, r3 + bl rknand_print_hex +.L1860: + add r9, r9, #1 + add r4, r4, #36 + b .L1858 +.L1907: + .align 2 +.L1906: + .word .LANCHOR1 + .word .LANCHOR0 + .word .LANCHOR2 + .word .LC99 + .word .LC100 + .word .LC101 + .fnend + .size FlashReadSlc2KPages, .-FlashReadSlc2KPages + .align 2 + .global FlashReadPages + .syntax unified + .arm + .fpu softvfp + .type FlashReadPages, %function +FlashReadPages: + .fnstart + @ args = 0, pretend = 0, frame = 40 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #52 + sub sp, sp, #52 + ldr r4, .L1979 + str r1, [sp, #24] + ldrb r9, [r4, #36] @ zero_extendqisi2 + str r2, [sp, #28] + cmp r9, #0 + bne .L1909 + ldr r3, .L1979+4 + mov fp, r0 + ldr r10, .L1979+8 + str r9, [sp, #8] + ldrb r3, [r3, #477] @ zero_extendqisi2 + str r3, [sp, #20] + ldrb r3, [r4, #44] @ zero_extendqisi2 + str r3, [sp, #36] +.L1910: + ldr r3, [sp, #8] + ldr r2, [sp, #24] + cmp r3, r2 + bcc .L1943 + mov r0, #0 + b .L1908 +.L1909: + bl FlashReadSlc2KPages +.L1908: + add sp, sp, #52 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L1943: + ldr r2, [sp, #8] + mov r3, #36 + ldr r1, [sp, #28] + mul r3, r3, r2 + add r8, fp, r3 + str r3, [sp, #12] + ldr r3, [sp, #24] + mov r0, r8 + ldr r7, [r8, #4] + sub r3, r3, r2 + add r2, sp, #44 + uxtb r3, r3 + str r3, [sp] + add r3, sp, #40 + bl LogAddr2PhyAddr + ldrb r2, [r4, #2234] @ zero_extendqisi2 + mov r6, r0 + ldr r3, [sp, #40] + cmp r2, r3 + ldrls r2, [sp, #12] + mvnls r3, #0 + strls r3, [fp, r2] + bls .L1913 + add r3, r4, r3 + ldrb r5, [r3, #2236] @ zero_extendqisi2 + ldrb r3, [r10, #1741] @ zero_extendqisi2 + mov r0, r5 + cmp r3, #0 + moveq r6, #0 + bl NandcWaitFlashReady + ldr r3, [r4, #48] + ldrb r2, [r3, #19] @ zero_extendqisi2 + sub r3, r2, #1 + cmp r3, #7 + bhi .L1915 + sub r2, r2, #7 + add r1, r4, r5 + cmp r2, #1 + add r2, r4, r5 + ldrb r3, [r1, #1228] @ zero_extendqisi2 + ldrb r2, [r2, #2068] @ zero_extendqisi2 + ldrbls r3, [r1, #1236] @ zero_extendqisi2 + cmp r2, r3 + beq .L1915 + ldr r2, .L1979+12 + mov r0, r5 + ldrb r1, [r4, #1217] @ zero_extendqisi2 + bl HynixSetRRPara +.L1915: + mov r0, r5 + lsr r7, r7, #31 + bl NandcFlashCs + ldr r3, [sp, #28] + mov r0, r5 + cmp r3, #1 + orreq r7, r7, #1 + cmp r7, #0 + str r7, [sp, #16] + beq .L1917 + ldrb r3, [r4, #152] @ zero_extendqisi2 + cmp r3, #0 + beq .L1917 + bl flash_enter_slc_mode +.L1923: + ldr r1, [sp, #44] + cmn r1, #1 + cmpeq r5, #255 + moveq r3, #0 + movne r3, #1 + moveq r6, r3 + beq .L1919 + cmp r6, #0 + beq .L1920 + ldr r2, [r4, #40] + mov r0, r5 + add r2, r1, r2 + bl FlashReadDpCmd +.L1921: + mov r0, r5 + bl NandcWaitFlashReady + cmp r6, #0 + beq .L1919 + ldr r1, [sp, #44] + mov r0, r5 + bl FlashReadDpDataOutCmd +.L1919: + ldr r3, [r8, #12] + mov r1, #0 + ldr r2, [sp, #20] + mov r0, r5 + str r3, [sp] + ldr r3, [r8, #8] + bl NandcXferData + ldrb r3, [r4, #44] @ zero_extendqisi2 + mov r7, r0 + adds r2, r3, #0 + movne r2, #1 + cmn r0, #1 + movne r2, #0 + cmp r2, #0 + str r2, [sp, #32] + beq .L1922 + mov r3, #0 + mov r6, #0 + strb r3, [r4, #44] + b .L1923 +.L1917: + bl flash_exit_slc_mode + b .L1923 +.L1920: + mov r0, r5 + bl FlashReadCmd + b .L1921 +.L1922: + cmp r6, #0 + beq .L1924 + ldr r3, [r4, #40] + mov r0, r5 + ldr r1, [sp, #44] + add r1, r1, r3 + bl FlashReadDpDataOutCmd + ldr r3, [sp, #12] + mov r0, r5 + ldr r1, [sp, #32] + add r3, r3, #36 + add r3, fp, r3 + ldr r2, [r3, #12] + str r2, [sp] + ldr r2, [sp, #20] + ldr r3, [r3, #8] + bl NandcXferData + cmn r0, #1 + mov r9, r0 + moveq r6, #0 +.L1924: + mov r0, r5 + bl NandcFlashDeCs + ldrb r3, [sp, #36] @ zero_extendqisi2 + cmn r7, #1 + strb r3, [r4, #44] + bne .L1925 + ldrb r3, [r4, #2256] @ zero_extendqisi2 + cmp r3, #0 + bne .L1926 +.L1930: + ldr r6, [r10, #1704] + cmp r6, #0 + bne .L1927 + ldr r3, [r8, #12] + mov r0, r5 + ldr r2, [r8, #8] + ldr r1, [sp, #44] + bl FlashReadRawPage + mov r7, r0 +.L1931: + cmp r7, #256 + cmnne r7, #1 + ldreq r3, [sp, #12] + movne r3, #0 + ldrne r2, [sp, #12] + streq r7, [fp, r3] + strne r3, [fp, r2] + ldr r3, [sp, #12] + ldr r3, [fp, r3] + cmn r3, #1 + bne .L1938 + ldr r1, [r8, #4] + ldrb r2, [r4, #2316] @ zero_extendqisi2 + ldr r0, .L1979+16 + bl printk + ldr r1, [r8, #12] + cmp r1, #0 + beq .L1938 + mov r3, #4 + ldr r0, .L1979+20 + mov r2, r3 + bl rknand_print_hex +.L1938: + cmp r6, #0 + beq .L1940 + ldrb r3, [r4, #2316] @ zero_extendqisi2 + add r3, r3, r3, lsl #1 + cmp r9, r3, asr #2 + bls .L1941 + ldr r3, [r10, #1704] + cmp r3, #0 + moveq r9, #256 +.L1941: + ldr r3, [sp, #12] + cmp r9, #256 + cmnne r9, #1 + movne r2, #0 + add r3, r3, #36 + streq r9, [fp, r3] + strne r2, [fp, r3] +.L1940: + ldr r3, [sp, #8] + add r3, r3, r6 + str r3, [sp, #8] + ldr r3, [sp, #16] + cmp r3, #0 + beq .L1913 + ldrb r3, [r4, #152] @ zero_extendqisi2 + cmp r3, #0 + beq .L1913 + mov r0, r5 + bl flash_exit_slc_mode +.L1913: + ldr r3, [sp, #8] + add r3, r3, #1 + str r3, [sp, #8] + b .L1910 +.L1926: + ldr r3, [r4, #88] + mov r0, r5 + ldr r1, [sp, #44] + ldr r6, [r3, #304] + mov r3, #1 + str r3, [sp] + ldr r3, [r8, #12] + ldr r2, [r8, #8] + bl FlashDdrTunningRead + cmn r0, #1 + mov r7, r0 + beq .L1929 + ldrb r3, [r4, #2316] @ zero_extendqisi2 + cmp r0, r3, lsr #1 + bls .L1946 +.L1929: + ubfx r0, r6, #8, #8 + bl NandcSetDdrPara + cmn r7, #1 + beq .L1930 +.L1946: + mov r6, #0 +.L1925: + ldrb r3, [r4, #2316] @ zero_extendqisi2 + add r3, r3, r3, lsl #1 + cmp r7, r3, asr #2 + bls .L1931 + ldr r3, [r10, #1704] + cmp r3, #0 + moveq r7, #256 + b .L1931 +.L1927: + ldr r3, [r8, #12] + mov r0, r5 + ldr r2, [r8, #8] + ldr r1, [sp, #44] + blx r6 + cmn r0, #1 + mov r7, r0 + bne .L1948 + ldr r3, [r4, #48] + ldrb r3, [r3, #19] @ zero_extendqisi2 + sub r3, r3, #1 + cmp r3, #7 + bhi .L1932 + mov r3, #0 + ldr r2, .L1979+12 + ldrb r1, [r4, #1217] @ zero_extendqisi2 + mov r0, r5 + bl HynixSetRRPara +.L1932: + ldr r3, [r8, #12] + mov r0, r5 + ldr r2, [r8, #8] + ldr r1, [sp, #44] + bl FlashReadRawPage + ldrb r2, [r4, #2316] @ zero_extendqisi2 + mov r7, r0 + mov r3, r0 + ldr r1, [r8, #4] + ldr r0, .L1979+24 + bl printk + cmn r7, #1 + bne .L1948 + ldrb r6, [r4, #152] @ zero_extendqisi2 + cmp r6, #0 + beq .L1931 + ldr r3, [sp, #16] + mov r0, r5 + cmp r3, #0 + beq .L1933 + bl flash_enter_slc_mode +.L1934: + ldr r6, [r10, #1704] + mov r0, r5 + ldr r3, [r8, #12] + ldr r2, [r8, #8] + ldr r1, [sp, #44] + blx r6 + mov r7, r0 +.L1948: + mov r6, #0 + b .L1931 +.L1933: + bl flash_exit_slc_mode + b .L1934 +.L1980: + .align 2 +.L1979: + .word .LANCHOR0 + .word .LANCHOR1 + .word .LANCHOR2 + .word .LANCHOR0+1220 + .word .LC99 + .word .LC101 + .word .LC102 + .fnend + .size FlashReadPages, .-FlashReadPages + .align 2 + .global FlashLoadFactorBbt + .syntax unified + .arm + .fpu softvfp + .type FlashLoadFactorBbt, %function +FlashLoadFactorBbt: + .fnstart + @ args = 0, pretend = 0, frame = 56 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r2, #16 + ldr r8, .L1993 + .pad #60 + sub sp, sp, #60 + mov r1, #0 + mvn fp, #0 + ldr r10, .L1993+4 + mov r5, #0 + ldrh r3, [r8, #136] + mov r9, r5 + ldrh r6, [r8, #138] + ldr r0, .L1993+8 + smulbb r6, r6, r3 + bl ftl_memset + ldr r3, [r10, #1728] + uxth r6, r6 + str r5, [sp, #28] + str r3, [sp, #32] + add r3, r6, fp + uxth r3, r3 + str r3, [sp, #8] +.L1982: + ldrb r3, [r8, #2234] @ zero_extendqisi2 + uxtb r7, r5 + cmp r3, r7 + bhi .L1988 + mov r0, fp + add sp, sp, #60 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L1988: + ldr r4, [sp, #8] + mul r3, r7, r6 + sub r2, r6, #12 + str r2, [sp, #4] +.L1983: + ldr r2, [sp, #4] + cmp r4, r2 + ble .L1985 + add r2, r4, r3 + add r0, sp, #20 + lsl r2, r2, #10 + str r3, [sp, #12] + str r2, [sp, #24] + mov r2, #1 + mov r1, r2 + bl FlashReadPages + ldr r2, [sp, #20] + ldr r3, [sp, #12] + cmn r2, #1 + beq .L1984 + ldr r2, [r10, #1728] + ldrh r1, [r2] + movw r2, #61664 + cmp r1, r2 + bne .L1984 + mov r1, r7 + mov r2, r4 + ldr r0, .L1993+12 + add r9, r9, #1 + bl printk + uxth r9, r9 + ldr r3, .L1993+8 + lsl r7, r7, #1 + strh r4, [r3, r7] @ movhi +.L1985: + ldrb r3, [r8, #2234] @ zero_extendqisi2 + add r5, r5, #1 + cmp r3, r9 + moveq fp, #0 + b .L1982 +.L1984: + sub r4, r4, #1 + uxth r4, r4 + b .L1983 +.L1994: + .align 2 +.L1993: + .word .LANCHOR0 + .word .LANCHOR2 + .word .LANCHOR2+1742 + .word .LC103 + .fnend + .size FlashLoadFactorBbt, .-FlashLoadFactorBbt + .align 2 + .global FlashProgSlc2KPages + .syntax unified + .arm + .fpu softvfp + .type FlashProgSlc2KPages, %function +FlashProgSlc2KPages: + .fnstart + @ args = 0, pretend = 0, frame = 48 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L2023 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r10, r1 + ldr r9, .L2023+4 + .pad #60 + sub sp, sp, #60 + mov r8, r2 + mov r4, r0 + ldrb fp, [r3, #477] @ zero_extendqisi2 + mov r6, r0 + mov r7, #0 +.L1996: + cmp r7, r10 + bne .L2002 + ldr r5, .L2023+8 + mov r6, #0 + ldr r9, .L2023+12 +.L2003: + cmp r7, r6 + bne .L2010 + mov r0, #0 + add sp, sp, #60 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2002: + sub r3, r10, r7 + add r2, sp, #12 + uxtb r3, r3 + mov r1, r8 + mov r0, r6 + str r3, [sp] + add r3, sp, #16 + bl LogAddr2PhyAddr + ldrb r2, [r9, #2234] @ zero_extendqisi2 + ldr r3, [sp, #16] + cmp r2, r3 + mvnls r3, #0 + strls r3, [r6] + bls .L1998 + add r3, r9, r3 + ldrb r5, [r3, #2236] @ zero_extendqisi2 + mov r0, r5 + bl NandcWaitFlashReady + mov r0, r5 + bl NandcFlashCs + mov r0, r5 + ldr r1, [sp, #12] + bl FlashProgFirstCmd + ldr r3, [r6, #12] + mov r2, fp + mov r1, #1 + mov r0, r5 + str r3, [sp] + ldr r3, [r6, #8] + bl NandcXferData + mov r0, r5 + ldr r1, [sp, #12] + bl FlashProgSecondCmd + mov r0, r5 + bl NandcWaitFlashReady + mov r0, r5 + ldr r1, [sp, #12] + bl FlashReadStatus + sbfx r0, r0, #0, #1 + ldr r1, [sp, #12] + str r0, [r6] + mov r0, r5 + ldr r3, [r9, #40] + add r1, r1, r3 + bl FlashProgFirstCmd + ldr r3, [r6, #8] + mov r1, #1 + ldr r2, [r6, #12] + mov r0, r5 + cmp r3, #0 + addne r3, r3, #2048 + cmp r2, #0 + addne r2, r2, #8 + str r2, [sp] + mov r2, fp + bl NandcXferData + ldr r3, [r9, #40] + mov r0, r5 + ldr r1, [sp, #12] + add r1, r1, r3 + bl FlashProgSecondCmd + mov r0, r5 + bl NandcWaitFlashReady + mov r0, r5 + ldr r1, [sp, #12] + bl FlashReadStatus + tst r0, #1 + mov r0, r5 + mvnne r3, #0 + strne r3, [r6] + bl NandcFlashDeCs +.L1998: + add r7, r7, #1 + add r6, r6, #36 + b .L1996 +.L2010: + ldr r3, [r4] + cmn r3, #1 + bne .L2004 + ldr r1, [r4, #4] + ldr r0, .L2023+16 + bl printk +.L2005: + add r6, r6, #1 + add r4, r4, #36 + b .L2003 +.L2004: + sub r3, r7, r6 + add r2, sp, #12 + uxtb r3, r3 + mov r1, r8 + mov r0, r4 + str r3, [sp] + add r3, sp, #16 + bl LogAddr2PhyAddr + ldr r2, [r5, #1732] + mov r3, #0 + mov lr, r4 + add ip, sp, #20 + str r3, [r2] + ldr r2, [r5, #1736] + str r3, [r2] + ldmia lr!, {r0, r1, r2, r3} + stmia ip!, {r0, r1, r2, r3} + ldmia lr!, {r0, r1, r2, r3} + stmia ip!, {r0, r1, r2, r3} + mov r2, r8 + ldr r3, [lr] + mov r1, #1 + add r0, sp, #20 + str r3, [ip] + ldr r3, [r5, #1732] + str r3, [sp, #28] + ldr r3, [r5, #1736] + str r3, [sp, #32] + bl FlashReadPages + ldr r10, [sp, #20] + cmn r10, #1 + bne .L2006 + ldr r1, [r4, #4] + ldr r0, .L2023+20 + bl printk + str r10, [r4] +.L2006: + ldr r10, [sp, #20] + cmp r10, #256 + bne .L2007 + ldr r1, [r4, #4] + ldr r0, .L2023+24 + bl printk + str r10, [r4] +.L2007: + ldr r3, [r4, #12] + cmp r3, #0 + beq .L2008 + ldr r2, [r3] + ldr r3, [r5, #1736] + ldr r3, [r3] + cmp r2, r3 + beq .L2008 + ldr r1, [r4, #4] + ldr r0, .L2023+28 + bl printk + mvn r3, #0 + str r3, [r4] +.L2008: + ldr r3, [r4, #8] + cmp r3, #0 + beq .L2005 + ldr r2, [r3] + ldr r3, [r5, #1732] + ldr r3, [r3] + cmp r2, r3 + beq .L2005 + ldr r1, [r4, #4] + mov r0, r9 + bl printk + mvn r3, #0 + str r3, [r4] + b .L2005 +.L2024: + .align 2 +.L2023: + .word .LANCHOR1 + .word .LANCHOR0 + .word .LANCHOR2 + .word .LC108 + .word .LC104 + .word .LC105 + .word .LC106 + .word .LC107 + .fnend + .size FlashProgSlc2KPages, .-FlashProgSlc2KPages + .align 2 + .global FtlLoadFactoryBbt + .syntax unified + .arm + .fpu softvfp + .type FtlLoadFactoryBbt, %function +FtlLoadFactoryBbt: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #12 + mov r7, #0 + ldr r5, .L2036 + ldr r6, .L2036+4 + ldr r3, [r5, #-524] + ldr r8, [r5, #-500] + sub r10, r6, #120 + sub r9, r6, #78 + str r3, [r5, #1768] + str r8, [r5, #1772] +.L2026: + ldrh r3, [r10] + cmp r7, r3 + bcc .L2031 + mov r0, #0 + add sp, sp, #12 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2031: + ldrh r4, [r9] + mvn r3, #0 + ldr fp, .L2036+8 + strh r3, [r6, #2]! @ movhi + add r4, r4, r3 + movw r3, #61664 + uxth r4, r4 +.L2027: + ldrh r2, [r9] + sub r1, r2, #16 + cmp r4, r1 + ble .L2029 + mla r2, r7, r2, r4 + str r3, [sp, #4] + mov r0, fp + lsl r2, r2, #10 + str r2, [r5, #1764] + mov r2, #1 + mov r1, r2 + bl FlashReadPages + ldr r2, [r5, #1760] + ldr r3, [sp, #4] + cmn r2, #1 + beq .L2028 + ldrh r2, [r8] + cmp r2, r3 + bne .L2028 + strh r4, [r6] @ movhi +.L2029: + add r7, r7, #1 + b .L2026 +.L2028: + sub r4, r4, #1 + uxth r4, r4 + b .L2027 +.L2037: + .align 2 +.L2036: + .word .LANCHOR2 + .word .LANCHOR0+2466 + .word .LANCHOR2+1760 + .fnend + .size FtlLoadFactoryBbt, .-FtlLoadFactoryBbt + .align 2 + .global FtlGetLastWrittenPage + .syntax unified + .arm + .fpu softvfp + .type FtlGetLastWrittenPage, %function +FtlGetLastWrittenPage: + .fnstart + @ args = 0, pretend = 0, frame = 104 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L2051 + cmp r1, #1 + movweq r2, #2392 + movwne r2, #2390 + push {r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + lsl r8, r0, #10 + ldrh r5, [r3, r2] + .pad #104 + sub sp, sp, #104 + add r3, sp, #40 + mov r2, r1 + str r3, [sp, #16] + mov r7, r1 + sub r5, r5, #1 + mov r6, #0 + sxth r5, r5 + mov r1, #1 + add r0, sp, #4 + str r6, [sp, #12] + orr r3, r5, r8 + str r3, [sp, #8] + bl FlashReadPages + ldr r3, [sp, #40] + cmn r3, #1 + bne .L2041 +.L2042: + cmp r6, r5 + ble .L2045 +.L2041: + mov r0, r5 + add sp, sp, #104 + @ sp needed + pop {r4, r5, r6, r7, r8, pc} +.L2045: + add r3, r6, r5 + mov r2, r7 + add r3, r3, r3, lsr #31 + mov r1, #1 + add r0, sp, #4 + asr r4, r3, #1 + sxth r3, r4 + orr r3, r3, r8 + str r3, [sp, #8] + bl FlashReadPages + ldr r3, [sp, #40] + cmn r3, #1 + bne .L2043 + ldr r3, [sp, #44] + cmn r3, #1 + bne .L2043 + ldr r3, [sp, #4] + cmn r3, #1 + subne r4, r4, #1 + sxthne r5, r4 + bne .L2042 +.L2043: + add r4, r4, #1 + sxth r6, r4 + b .L2042 +.L2052: + .align 2 +.L2051: + .word .LANCHOR0 + .fnend + .size FtlGetLastWrittenPage, .-FtlGetLastWrittenPage + .align 2 + .global FtlLoadBbt + .syntax unified + .arm + .fpu softvfp + .type FtlLoadBbt, %function +FtlLoadBbt: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + ldr r4, .L2085 + ldr r5, .L2085+4 + ldr r3, [r4, #-524] + add r8, r4, #1760 + ldr r7, [r4, #-500] + ldr r9, .L2085+8 + str r3, [r4, #1768] + str r7, [r4, #1772] + bl FtlBbtMemInit + movw r3, #2388 + ldrh r6, [r5, r3] + sub r6, r6, #1 + uxth r6, r6 +.L2054: + ldrh r3, [r9] + sub r3, r3, #48 + cmp r6, r3 + ble .L2057 + lsl r3, r6, #10 + mov r2, #1 + mov r1, r2 + mov r0, r8 + str r3, [r4, #1764] + bl FlashReadPages + ldr r3, [r4, #1760] + cmn r3, #1 + bne .L2055 + ldr r3, [r4, #1764] + mov r2, #1 + mov r1, r2 + mov r0, r8 + add r3, r3, #1 + str r3, [r4, #1764] + bl FlashReadPages +.L2055: + ldr r3, [r4, #1760] + cmn r3, #1 + beq .L2056 + ldrh r2, [r7] + movw r3, #61649 + cmp r2, r3 + bne .L2056 + movw r3, #2456 + strh r6, [r5, r3] @ movhi + ldr r3, [r7, #4] + str r3, [r5, #2464] + ldr r3, .L2085+12 + ldrh r2, [r7, #8] + strh r2, [r3, #4] @ movhi +.L2057: + movw r8, #2456 + movw r2, #65535 + ldrh r3, [r5, r8] + ldr r6, .L2085+12 + cmp r3, r2 + beq .L2071 + ldrh r3, [r6, #4] + cmp r3, r2 + beq .L2061 + lsl r3, r3, #10 + mov r2, #1 + mov r1, r2 + ldr r0, .L2085+16 + str r3, [r4, #1764] + bl FlashReadPages + ldr r3, [r4, #1760] + cmn r3, #1 + beq .L2061 + ldrh r2, [r7] + movw r3, #61649 + cmp r2, r3 + bne .L2061 + ldr r3, [r7, #4] + ldr r2, [r5, #2464] + cmp r3, r2 + ldrhhi r2, [r6, #4] + strhi r3, [r5, #2464] + ldrhhi r3, [r7, #8] + strhhi r2, [r5, r8] @ movhi + strhhi r3, [r6, #4] @ movhi +.L2061: + ldr r9, .L2085+16 + movw r3, #2456 + mov r1, #1 + ldrh r0, [r5, r3] + movw r10, #61649 + bl FtlGetLastWrittenPage + sxth r8, r0 + add r0, r0, #1 + strh r0, [r6, #2] @ movhi +.L2063: + cmp r8, #0 + blt .L2068 + ldrh r3, [r6] + mov r2, #1 + mov r1, r2 + mov r0, r9 + orr r3, r8, r3, lsl #10 + str r3, [r4, #1764] + ldr r3, [r4, #-524] + str r3, [r4, #1768] + bl FlashReadPages + ldr r3, [r4, #1760] + cmn r3, #1 + beq .L2064 + ldrh r3, [r7] + cmp r3, r10 + bne .L2064 +.L2068: + ldrh r3, [r7, #10] + ldrh r0, [r7, #12] + strh r3, [r6, #6] @ movhi + movw r3, #65535 + cmp r0, r3 + bne .L2065 +.L2066: + ldr r6, .L2085+20 + mov r5, #0 + ldr r8, .L2085+24 + sub r7, r6, #134 +.L2069: + ldrh r3, [r7] + cmp r5, r3 + bcc .L2070 + mov r0, #0 + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L2056: + sub r6, r6, #1 + uxth r6, r6 + b .L2054 +.L2064: + sub r8, r8, #1 + sxth r8, r8 + b .L2063 +.L2065: + ldr r2, [r5, #2320] + cmp r0, r2 + beq .L2066 + movw r3, #2334 + ldrh r3, [r5, r3] + lsr r3, r3, #2 + cmp r2, r3 + cmpcc r0, r3 + bcs .L2066 + bl FtlSysBlkNumInit + b .L2066 +.L2070: + ldrh r2, [r8] + ldr r1, [r4, #1768] + ldr r0, [r6, #4]! + lsl r2, r2, #2 + mla r1, r5, r2, r1 + add r5, r5, #1 + bl ftl_memcpy + b .L2069 +.L2071: + mvn r0, #0 + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L2086: + .align 2 +.L2085: + .word .LANCHOR2 + .word .LANCHOR0 + .word .LANCHOR0+2388 + .word .LANCHOR0+2456 + .word .LANCHOR2+1760 + .word .LANCHOR0+2480 + .word .LANCHOR2-436 + .fnend + .size FtlLoadBbt, .-FtlLoadBbt + .align 2 + .global FtlScanSysBlk + .syntax unified + .arm + .fpu softvfp + .type FtlScanSysBlk, %function +FtlScanSysBlk: + .fnstart + @ args = 0, pretend = 0, frame = 24 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r6, #0 + ldr r5, .L2166 + movw r3, #2438 + mov r1, r6 + .pad #28 + sub sp, sp, #28 + ldr r4, .L2166+4 + movw r8, #2412 + ldr r2, [r5, #2420] + strh r6, [r5, r3] @ movhi + sub r7, r4, #388 + ldr r0, [r4, #-444] + strh r6, [r7] @ movhi + lsl r2, r2, #2 + bl ftl_memset + ldr r2, [r5, #2420] + mov r1, r6 + ldr r0, [r4, #-472] + lsl r2, r2, #1 + bl ftl_memset + ldrh r2, [r5, r8] + mov r1, r6 + ldr r0, [r4, #-460] + lsl r2, r2, #2 + bl ftl_memset + ldrh r2, [r5, r8] + mov r1, r6 + ldr r0, [r5, #2440] + lsl r2, r2, #1 + bl ftl_memset + sub r0, r4, #3296 + mov r2, #16 + mov r1, #255 + sub r0, r0, #4 + bl ftl_memset + movw r3, #2332 + str r7, [sp] + ldrh fp, [r5, r3] + str r5, [sp, #4] +.L2088: + ldr r3, .L2166+8 + ldr r2, .L2166 + ldrh r3, [r3] + cmp r3, fp + bls .L2128 + ldr r1, [r4, #-2692] + mov r6, #0 + ldr r3, .L2166+12 + mov r5, r6 + ldr r7, [r4, #-536] + mov r8, #36 + str r1, [sp, #8] + ldr r1, .L2166+16 + ldrh r2, [r3] + ldr r3, [r4, #-2696] + ldrh r10, [r1] + sub r9, r1, #52 + b .L2129 +.L2090: + mov r1, fp + ldrb r0, [r9, r6] @ zero_extendqisi2 + str r3, [sp, #20] + str r2, [sp, #16] + bl V2P_block + str r0, [sp, #12] + bl FtlBbmIsBadBlock + cmp r0, #0 + ldr r2, [sp, #16] + ldr r3, [sp, #20] + bne .L2089 + ldr r1, [sp, #12] + mla r0, r8, r5, r7 + lsl r1, r1, #10 + stmib r0, {r1, r3} + mul r1, r10, r5 + add r5, r5, #1 + uxth r5, r5 + add ip, r1, #3 + cmp r1, #0 + movlt r1, ip + ldr ip, [sp, #8] + bic r1, r1, #3 + add r1, ip, r1 + str r1, [r0, #12] +.L2089: + add r6, r6, #1 +.L2129: + uxth r1, r6 + cmp r2, r1 + bhi .L2090 + cmp r5, #0 + bne .L2091 +.L2127: + add r3, fp, #1 + uxth fp, r3 + b .L2088 +.L2091: + mov r8, #0 + mov r2, #1 + mov r1, r5 + mov r0, r7 + bl FlashReadPages +.L2092: + uxth r3, r8 + cmp r5, r3 + bls .L2127 + mov r9, #36 + ldr r3, [r4, #-536] + mul r9, r9, r8 + add r2, r3, r9 + ldr r3, [r3, r9] + ldr r6, [r2, #4] + ldr r7, [r2, #12] + cmn r3, #1 + ubfx r6, r6, #10, #16 + bne .L2095 + mov r10, #16 +.L2097: + ldr r0, [r4, #-536] + mov r2, #1 + mov r1, r2 + add r0, r0, r9 + ldr r3, [r0, #4] + add r3, r3, #1 + str r3, [r0, #4] + bl FlashReadPages + ldrh r3, [r7] + movw r2, #65535 + cmp r3, r2 + ldr r3, [r4, #-536] + bne .L2094 + mvn r2, #0 + str r2, [r3, r9] + ldr r3, [r4, #-536] + ldr r3, [r3, r9] + cmp r3, r2 + beq .L2096 +.L2095: + ldr r2, [r4, #-3332] + ldr r3, [r7, #4] + cmn r2, #1 + beq .L2098 + cmp r2, r3 + bhi .L2099 +.L2098: + cmn r3, #1 + addne r2, r3, #1 + strne r2, [r4, #-3332] +.L2099: + ldrh r2, [r7] + movw r1, #61604 + cmp r2, r1 + beq .L2101 + bhi .L2102 + movw r3, #61574 + cmp r2, r3 + beq .L2103 +.L2100: + add r8, r8, #1 + b .L2092 +.L2094: + ldr r3, [r3, r9] + cmn r3, #1 + bne .L2095 + sub r10, r10, #1 + uxth r10, r10 + cmp r10, #0 + bne .L2097 +.L2096: + ldr r3, .L2166 + ldrb r1, [r3, #152] @ zero_extendqisi2 + cmp r1, #0 + bne .L2165 +.L2125: + mov r0, r6 + bl FtlFreeSysBlkQueueIn + b .L2100 +.L2102: + movw r3, #61634 + cmp r2, r3 + beq .L2104 + movw r3, #65535 + cmp r2, r3 + bne .L2100 +.L2165: + mov r1, #0 + b .L2125 +.L2104: + ldr r3, [sp, #4] + ldr r2, [sp] + ldr ip, [r4, #-444] + ldr r0, [r3, #2420] + ldrh r2, [r2] + uxth r1, r0 + sub r3, r1, #1 + sub r1, r1, r2 + sub r1, r1, #1 + sxth r3, r3 + sxth r1, r1 +.L2106: + cmp r3, r1 + bgt .L2112 + cmp r3, #0 + bge .L2142 + b .L2100 +.L2112: + ldr r10, [r7, #4] + lsl lr, r3, #2 + ldr r9, [ip, r3, lsl #2] + cmp r10, r9 + bls .L2107 + ldr r1, [ip] + cmp r1, #0 + bne .L2108 + cmp r0, r2 + ldrne r1, .L2166+20 + addne r2, r2, #1 + strhne r2, [r1] @ movhi +.L2108: + uxth ip, r3 + mov r1, #0 +.L2109: + uxth r0, r1 + sxth r2, r1 + cmp r0, ip + bcc .L2110 + ldr r1, [r7, #4] + cmp r3, #0 + ldr r2, [r4, #-444] + str r1, [r2, lr] + lsl r2, r3, #1 + ldr r1, [r4, #-472] + strh r6, [r1, r2] @ movhi + blt .L2100 + ldr r2, [sp] + ldr r1, .L2166 + ldrh r2, [r2] + ldr r1, [r1, #2420] + sub r1, r1, r2 + sub r1, r1, #1 + sxth r1, r1 + cmp r3, r1 + bgt .L2100 +.L2142: + ldr r1, [sp] + add r2, r2, #1 + strh r2, [r1] @ movhi + ldr r2, [r4, #-444] + ldr r1, [r7, #4] + str r1, [r2, r3, lsl #2] + lsl r3, r3, #1 + ldr r2, [r4, #-472] +.L2163: + strh r6, [r2, r3] @ movhi + b .L2100 +.L2110: + ldr r0, [r4, #-444] + add r1, r1, #1 + add r9, r0, r2, lsl #2 + ldr r9, [r9, #4] + str r9, [r0, r2, lsl #2] + lsl r2, r2, #1 + ldr r0, [r4, #-472] + add r9, r0, r2 + ldrh r9, [r9, #2] + strh r9, [r0, r2] @ movhi + b .L2109 +.L2107: + sub r3, r3, #1 + sxth r3, r3 + b .L2106 +.L2103: + ldr r3, .L2166+24 + ldr r1, .L2166+28 + ldr lr, [r4, #-460] + ldrh r2, [r3] + ldrh r1, [r1] + sub r0, r2, #1 + sxth r3, r0 + sub r0, r0, r1 +.L2115: + cmp r3, r0 + ble .L2120 + ldr r10, [r7, #4] + lsl ip, r3, #2 + ldr r9, [lr, r3, lsl #2] + cmp r10, r9 + bls .L2116 + sub r2, r2, r1 + ldr r0, [lr] + clz r2, r2 + uxth r9, r3 + lsr r2, r2, #5 + cmp r0, #0 + orrne r2, r2, #1 + ldr r0, .L2166 + cmp r2, #0 + ldreq r2, .L2166+28 + addeq r1, r1, #1 + strheq r1, [r2] @ movhi + mov r1, #0 +.L2118: + uxth lr, r1 + sxth r2, r1 + cmp lr, r9 + bcc .L2119 + ldr r1, [r7, #4] + ldr r2, [r4, #-460] + str r1, [r2, ip] + lsl r2, r3, #1 + ldr r1, [r0, #2440] + strh r6, [r1, r2] @ movhi +.L2120: + cmp r3, #0 + blt .L2100 + ldr r0, .L2166+28 + ldrh r2, [r0, #-26] + ldrh r1, [r0] + sub r2, r2, #1 + sub r2, r2, r1 + sxth r2, r2 + cmp r3, r2 + bgt .L2100 + add r1, r1, #1 + ldr r2, [r4, #-460] + strh r1, [r0] @ movhi + ldr r1, [r7, #4] + str r1, [r2, r3, lsl #2] + lsl r3, r3, #1 + ldr r2, [sp, #4] + ldr r2, [r2, #2440] + b .L2163 +.L2119: + ldr lr, [r4, #-460] + add r1, r1, #1 + add r10, lr, r2, lsl #2 + ldr r10, [r10, #4] + str r10, [lr, r2, lsl #2] + lsl r2, r2, #1 + ldr lr, [r0, #2440] + add r10, lr, r2 + ldrh r10, [r10, #2] + strh r10, [lr, r2] @ movhi + b .L2118 +.L2116: + sub r3, r3, #1 + sxth r3, r3 + b .L2115 +.L2101: + ldr r2, .L2166+32 + movw r1, #65535 + mov r9, r2 + ldrh r0, [r9], #4 + cmp r0, r1 + strheq r6, [r2] @ movhi + beq .L2164 + ldrh r0, [r2, #4] + cmp r0, r1 + beq .L2123 + mov r1, #1 + bl FtlFreeSysBlkQueueIn +.L2123: + ldr r3, [r7, #4] + ldr r2, [r4, #-3292] + cmp r2, r3 + strhcs r6, [r9] @ movhi + bcs .L2100 + ldrh r3, [r9, #-4] + strh r6, [r9, #-4] @ movhi + strh r3, [r9] @ movhi + ldr r3, [r7, #4] +.L2164: + str r3, [r4, #-3292] + b .L2100 +.L2128: + ldr r0, [r4, #-472] + ldrh r3, [r0] + cmp r3, #0 + beq .L2130 +.L2133: + ldr r0, [r2, #2440] + ldrh r1, [r0] + cmp r1, #0 + beq .L2131 +.L2153: + mov r0, #0 + add sp, sp, #28 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2130: + ldr r1, .L2166+20 + ldrh r1, [r1] + cmp r1, #0 + ldrne ip, [r2, #2420] + beq .L2133 +.L2134: + sxth r1, r3 + cmp r1, ip + bcs .L2133 + lsl lr, r1, #1 + add r3, r3, #1 + ldrh lr, [r0, lr] + cmp lr, #0 + beq .L2134 + mov r3, r1 + mov r5, #0 +.L2135: + ldr r0, [r2, #2420] + cmp r3, r0 + bcs .L2133 + ldr ip, [r4, #-472] + lsl r0, r3, #1 + sub lr, r3, r1 + lsl r6, lr, #1 + ldrh r7, [ip, r0] + strh r7, [ip, r6] @ movhi + ldr ip, [r4, #-444] + ldr r6, [ip, r3, lsl #2] + add r3, r3, #1 + sxth r3, r3 + str r6, [ip, lr, lsl #2] + ldr ip, [r4, #-472] + strh r5, [ip, r0] @ movhi + b .L2135 +.L2131: + movw r3, #2438 + ldrh r3, [r2, r3] + cmp r3, #0 + movwne r3, #2412 + ldrhne ip, [r2, r3] + beq .L2153 +.L2138: + sxth r3, r1 + cmp r3, ip + mov lr, r3 + bge .L2153 + lsl r5, r3, #1 + add r1, r1, #1 + ldrh r5, [r0, r5] + cmp r5, #0 + beq .L2138 + ldr r5, .L2166+24 + mov r6, #0 +.L2139: + ldrh r1, [r5] + cmp r3, r1 + bge .L2153 + ldr r0, [r2, #2440] + lsl r1, r3, #1 + sub ip, r3, lr + lsl r7, ip, #1 + ldrh r8, [r0, r1] + strh r8, [r0, r7] @ movhi + ldr r0, [r4, #-460] + ldr r7, [r0, r3, lsl #2] + add r3, r3, #1 + sxth r3, r3 + str r7, [r0, ip, lsl #2] + ldr r0, [r2, #2440] + strh r6, [r0, r1] @ movhi + b .L2139 +.L2167: + .align 2 +.L2166: + .word .LANCHOR0 + .word .LANCHOR2 + .word .LANCHOR0+2334 + .word .LANCHOR0+2324 + .word .LANCHOR0+2402 + .word .LANCHOR2-388 + .word .LANCHOR0+2412 + .word .LANCHOR0+2438 + .word .LANCHOR2-3300 + .fnend + .size FtlScanSysBlk, .-FtlScanSysBlk + .align 2 + .global FtlLoadSysInfo + .syntax unified + .arm + .fpu softvfp + .type FtlLoadSysInfo, %function +FtlLoadSysInfo: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r1, #0 + ldr r4, .L2197 + .pad #36 + sub sp, sp, #36 + ldr r5, .L2197+4 + ldr r3, [r4, #-524] + sub r7, r4, #3296 + ldr r0, [r4, #-3540] + str r3, [r4, #1768] + ldr r3, [r4, #-500] + str r3, [r4, #1772] + movw r3, #2332 + ldrh r2, [r5, r3] + lsl r2, r2, #1 + bl ftl_memset + ldrh r0, [r7, #-4] + movw r3, #65535 + cmp r0, r3 + bne .L2169 +.L2180: + mvn r0, #0 +.L2168: + add sp, sp, #36 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2169: + mov r1, #1 + add fp, r5, #2400 + bl FtlGetLastWrittenPage + ldrsh r9, [r7, #-4] + sub r8, r7, #4 + sxth r6, r0 + add r0, r0, #1 + strh r0, [r8, #2] @ movhi +.L2171: + cmp r6, #0 + blt .L2179 + orr r3, r6, r9, lsl #10 + mov r2, #1 + mov r1, r2 + ldr r0, .L2197+8 + str r3, [r4, #1764] + ldr r3, [r4, #-524] + str r3, [r4, #1768] + bl FlashReadPages + ldrb r3, [r5, #36] @ zero_extendqisi2 + cmp r3, #0 + beq .L2172 + ldr r8, [r4, #1772] + ldr r3, [r8, #12] + cmp r3, #0 + str r3, [sp, #28] + beq .L2172 + ldr r2, [r4, #1768] + ldrh r1, [fp] + mov r0, r2 + str r2, [sp, #24] + bl js_hash + ldr r3, [sp, #28] + cmp r3, r0 + beq .L2172 + cmp r6, #0 + bne .L2173 + mov r10, r7 + ldr r2, [sp, #24] + ldrh r1, [r10], #-4 + cmp r9, r1 + beq .L2173 + ldr r2, [r2] + ldrh r1, [r7, #-4] + str r3, [sp, #12] + str r2, [sp, #16] + ldr r3, [r8, #8] + ldr r2, [r4, #1760] + ldr r0, .L2197+12 + str r3, [sp, #8] + ldr r3, [r8, #4] + str r3, [sp, #4] + ldr r3, [r8] + str r3, [sp] + ldr r3, [r4, #1764] + bl printk + ldr r3, .L2197+16 + ldrsh r9, [r10, #4] + ldrh r6, [r3] +.L2175: + sub r6, r6, #1 + sxth r6, r6 + b .L2171 +.L2173: + mvn r3, #0 + str r3, [r4, #1760] +.L2172: + ldr r3, [r4, #1760] + cmn r3, #1 + beq .L2175 + ldr r3, [r4, #-524] + ldr r2, .L2197+20 + ldr r3, [r3] + cmp r3, r2 + bne .L2175 + ldr r3, [r4, #-500] + ldrh r2, [r3] + movw r3, #61604 + cmp r2, r3 + bne .L2175 +.L2179: + mov r2, #48 + ldr r1, [r4, #1768] + movw r6, #2332 + ldr r0, .L2197+24 + bl ftl_memcpy + ldrh r2, [r5, r6] + ldr r1, [r4, #1768] + ldr r0, [r4, #-3540] + lsl r2, r2, #1 + add r1, r1, #48 + bl ftl_memcpy + ldrh r1, [r5, r6] + ldr r3, [r4, #1768] + ldr r0, [r5, #32] + lsr r2, r1, #3 + lsl r1, r1, #1 + add r1, r1, #51 + add r2, r2, #4 + bic r1, r1, #3 + add r1, r3, r1 + bl ftl_memcpy + movw r3, #2436 + ldrh r3, [r5, r3] + cmp r3, #0 + beq .L2177 + ldrh r1, [r5, r6] + movw r3, #2428 + ldrh r2, [r5, r3] + ldr r0, [r4, #-448] + lsr r3, r1, #3 + lsl r2, r2, #2 + add r3, r3, r1, lsl #1 + ldr r1, [r4, #1768] + add r3, r3, #52 + ubfx r3, r3, #2, #14 + add r1, r1, r3, lsl #2 + bl ftl_memcpy +.L2177: + ldr r2, [r4, #-3596] + ldr r3, .L2197+20 + cmp r2, r3 + bne .L2180 + ldr r6, .L2197+24 + movw r3, #2346 + ldrb r1, [r4, #-3586] @ zero_extendqisi2 + ldrh r3, [r5, r3] + ldrh r2, [r6, #8] + cmp r1, r3 + strh r2, [r7, #2] @ movhi + bne .L2180 + movw r3, #2390 + movw r1, #2396 + ldrh r3, [r5, r3] + ldrh r1, [r5, r1] + ldr r0, [r5, #2336] + str r2, [r4, #1796] + mul r3, r2, r3 + str r3, [r5, #2452] + mul r3, r3, r1 + str r3, [r5, #2432] + ldr r3, .L2197+28 + ldrh r3, [r3, #6] + sub r0, r0, r3 + movw r3, #2324 + ldrh r1, [r5, r3] + sub r0, r0, r2 + bl __aeabi_uidiv + ldrh r3, [r6, #16] + add r2, r6, #76 + mov r5, r2 + strh r0, [r7, #-8] @ movhi + ldrh r0, [r6, #14] + add r7, r2, #240 + lsr r1, r3, #6 + and r3, r3, #63 + strb r3, [r4, #-3514] + strh r1, [r2, #2] @ movhi + ldrh r1, [r6, #18] + ldrb r3, [r4, #-3585] @ zero_extendqisi2 + strh r0, [r2] @ movhi + strh r1, [r5, #48]! @ movhi + ldrh r1, [r6, #20] + strb r3, [r4, #-3512] + mvn r3, #0 + strh r3, [r7, #-4] @ movhi + mov r3, #0 + strh r3, [r2, #238] @ movhi + lsr ip, r1, #6 + and r1, r1, #63 + strb r1, [r4, #-3466] + ldrb r1, [r4, #-3584] @ zero_extendqisi2 + strh ip, [r5, #2] @ movhi + strb r3, [r4, #-3278] + strb r1, [r4, #-3464] + ldrh r1, [r6, #22] + strb r3, [r4, #-3276] + strh r1, [r2, #96]! @ movhi + ldrh r1, [r6, #24] + mov r6, r2 + lsr ip, r1, #6 + and r1, r1, #63 + strb r1, [r4, #-3418] + ldrb r1, [r4, #-3583] @ zero_extendqisi2 + strh ip, [r2, #2] @ movhi + strb r1, [r4, #-3416] + str r3, [r4, #-3344] + ldr r1, [r4, #-3564] + str r3, [r4, #-3356] + str r3, [r4, #-3364] + str r3, [r4, #-3348] + str r1, [r4, #-3324] + str r3, [r4, #-3320] + ldr r1, [r4, #-3332] + str r3, [r4, #-3312] + str r3, [r4, #-3352] + ldr r3, [r4, #-3556] + ldr r2, [r4, #-3328] + cmp r3, r1 + strhi r3, [r4, #-3332] + ldr r3, [r4, #-3560] + cmp r3, r2 + strhi r3, [r4, #-3328] + movw r3, #65535 + cmp r0, r3 + beq .L2183 + ldr r0, .L2197+32 + bl make_superblock +.L2183: + ldrh r2, [r5] + movw r3, #65535 + cmp r2, r3 + beq .L2184 + ldr r0, .L2197+36 + bl make_superblock +.L2184: + ldrh r2, [r6] + movw r3, #65535 + cmp r2, r3 + beq .L2185 + ldr r0, .L2197+40 + bl make_superblock +.L2185: + ldrh r2, [r7, #-4] + movw r3, #65535 + sub r0, r7, #4 + cmp r2, r3 + beq .L2186 + bl make_superblock +.L2186: + mov r0, #0 + b .L2168 +.L2198: + .align 2 +.L2197: + .word .LANCHOR2 + .word .LANCHOR0 + .word .LANCHOR2+1760 + .word .LC109 + .word .LANCHOR0+2392 + .word 1179929683 + .word .LANCHOR2-3596 + .word .LANCHOR0+2456 + .word .LANCHOR2-3520 + .word .LANCHOR2-3472 + .word .LANCHOR2-3424 + .fnend + .size FtlLoadSysInfo, .-FtlLoadSysInfo + .align 2 + .global FtlDumpBlockInfo + .syntax unified + .arm + .fpu softvfp + .type FtlDumpBlockInfo, %function +FtlDumpBlockInfo: + .fnstart + @ args = 0, pretend = 0, frame = 64 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + movw r3, #2390 + ldr r5, .L2211 + .pad #92 + sub sp, sp, #92 + ubfx r0, r0, #10, #16 + mov r9, r1 + ldr r7, .L2211+4 + ldrh r8, [r5, r3] + bl P2V_block_in_plane + ldr r1, .L2211+8 + mov r6, r0 + ldr r0, .L2211+12 + bl printk + ldr r2, [r7, #-3540] + lsl r3, r6, #1 + mov r1, r6 + ldr r0, .L2211+16 + ldrh r2, [r2, r3] + bl printk + add r0, sp, #88 + strh r6, [r0, #-48]! @ movhi + bl make_superblock + ldrb r4, [r5, #152] @ zero_extendqisi2 + str r7, [sp, #36] + adds r3, r4, #0 + movne r3, #1 + cmp r9, #0 + movne r3, #0 + cmp r3, #0 + moveq r4, r3 + beq .L2200 + mov r0, r6 + bl ftl_get_blk_mode + cmp r0, #1 + mov r4, r0 + movweq r3, #2392 + ldrheq r8, [r5, r3] +.L2200: + movw r3, #2390 + mov r6, #0 + mov r9, #36 + ldrh r3, [r5, r3] + mov r2, r8 + mov r1, r4 + ldr r0, .L2211+20 + bl printk +.L2201: + ldr r3, .L2211+24 + add ip, sp, #54 + movw r10, #65535 + ldrh r3, [r3] + mov r7, r3 + ldr r3, .L2211+4 + ldr r2, [r3, #-2696] + ldr r0, [r3, #-536] + ldr r3, [r3, #-2692] + str r2, [sp, #24] + ldr r2, .L2211+28 + str r3, [sp, #32] + ldrh r1, [r2] + ldrh lr, [r2, #2] + mov r2, #0 + mov r5, r2 + str r1, [sp, #28] +.L2202: + uxth r3, r2 + cmp r7, r3 + bhi .L2204 + ldr fp, .L2211+32 + mov r10, #0 + mov r2, r4 + mov r1, r5 + bl FlashReadPages +.L2205: + uxth r3, r10 + cmp r5, r3 + bhi .L2206 + add r6, r6, #1 + uxth r6, r6 + cmp r8, r6 + bne .L2201 +.L2207: + mov r0, #0 + add sp, sp, #92 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2204: + ldrh r3, [ip, #2]! + cmp r3, r10 + beq .L2203 + mla r1, r9, r5, r0 + orr r3, r6, r3, lsl #10 + str r3, [r1, #4] + ldr r3, [sp, #28] + mul r3, r3, r5 + add fp, r3, #3 + cmp r3, #0 + movlt r3, fp + ldr fp, [sp, #24] + bic r3, r3, #3 + add r3, fp, r3 + str r3, [r1, #8] + mul r3, lr, r5 + add r5, r5, #1 + uxth r5, r5 + add fp, r3, #3 + cmp r3, #0 + movlt r3, fp + ldr fp, [sp, #32] + bic r3, r3, #3 + add r3, fp, r3 + str r3, [r1, #12] +.L2203: + add r2, r2, #1 + b .L2202 +.L2206: + ldr r3, [sp, #36] + mul r0, r9, r10 + ldrh r1, [sp, #40] + add r10, r10, #1 + ldr ip, [r3, #-536] + add r2, ip, r0 + ldr lr, [r2, #8] + ldr r3, [r2, #12] + ldr r7, [lr, #4] + str r7, [sp, #20] + ldr lr, [lr] + str lr, [sp, #16] + ldr lr, [r3, #12] + str lr, [sp, #12] + ldr lr, [r3, #8] + str lr, [sp, #8] + ldr lr, [r3, #4] + str lr, [sp, #4] + ldr r3, [r3] + str r3, [sp] + ldr r3, [r2, #4] + ldr r2, [ip, r0] + mov r0, fp + bl printk + b .L2205 +.L2212: + .align 2 +.L2211: + .word .LANCHOR0 + .word .LANCHOR2 + .word .LANCHOR3+141 + .word .LC110 + .word .LC111 + .word .LC112 + .word .LANCHOR0+2324 + .word .LANCHOR0+2400 + .word .LC113 + .fnend + .size FtlDumpBlockInfo, .-FtlDumpBlockInfo + .align 2 + .global FtlScanAllBlock + .syntax unified + .arm + .fpu softvfp + .type FtlScanAllBlock, %function +FtlScanAllBlock: + .fnstart + @ args = 0, pretend = 0, frame = 56 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r6, #0 + ldr r5, .L2224 + .pad #84 + sub sp, sp, #84 + ldr r1, .L2224+4 + ldr r0, .L2224+8 + bl printk +.L2214: + ldr r3, .L2224+12 + uxth r0, r6 + ldrh r3, [r3] + cmp r3, r0 + bhi .L2222 + mov r0, #0 + add sp, sp, #84 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2222: + add r4, sp, #80 + movw r9, #65535 + strh r0, [r4, #-48]! @ movhi + mov r10, #36 + bl ftl_get_blk_mode + uxth r1, r6 + ldr ip, [r5, #-3540] + mov r3, r0 + ldr r0, .L2224+16 + lsl r2, r1, #1 + ldrh r2, [ip, r2] + bl printk + mov r0, r4 + bl make_superblock + ldr r3, .L2224+20 + add ip, sp, #46 + ldr r0, [r5, #-536] + ldr r7, [r5, #-2692] + ldrh r2, [r3] + ldrh lr, [r3, #76] + ldrh r8, [r3, #78] + str r2, [sp, #24] + ldr r2, [r5, #-2696] + str r2, [sp, #28] + mov r2, #0 + mov r4, r2 +.L2215: + ldr r1, [sp, #24] + uxth r3, r2 + cmp r1, r3 + bhi .L2217 + ldr r9, .L2224+24 + mov r7, #0 + mov r8, #36 + mov r2, #0 + mov r1, r4 + bl FlashReadPages +.L2218: + uxth r3, r7 + cmp r4, r3 + bhi .L2219 + ldr r9, .L2224+28 + mov r7, #0 + mov r8, #36 + mov r2, #1 + mov r1, r4 + ldr r0, [r5, #-536] + bl FlashReadPages +.L2220: + uxth r3, r7 + cmp r4, r3 + bhi .L2221 + add r6, r6, #1 + b .L2214 +.L2217: + ldrh r3, [ip, #2]! + cmp r3, r9 + beq .L2216 + mla r1, r10, r4, r0 + lsl r3, r3, #10 + str r3, [r1, #4] + mul r3, lr, r4 + add fp, r3, #3 + cmp r3, #0 + movlt r3, fp + ldr fp, [sp, #28] + bic r3, r3, #3 + add r3, fp, r3 + str r3, [r1, #8] + mul r3, r8, r4 + add r4, r4, #1 + uxth r4, r4 + add fp, r3, #3 + cmp r3, #0 + movlt r3, fp + bic r3, r3, #3 + add r3, r7, r3 + str r3, [r1, #12] +.L2216: + add r2, r2, #1 + b .L2215 +.L2219: + mul r0, r8, r7 + ldr ip, [r5, #-536] + ldrh r1, [sp, #32] + add r7, r7, #1 + add r2, ip, r0 + ldr lr, [r2, #8] + ldr r3, [r2, #12] + ldr r10, [lr, #4] + str r10, [sp, #20] + ldr lr, [lr] + str lr, [sp, #16] + ldr lr, [r3, #12] + str lr, [sp, #12] + ldr lr, [r3, #8] + str lr, [sp, #8] + ldr lr, [r3, #4] + str lr, [sp, #4] + ldr r3, [r3] + str r3, [sp] + ldr r3, [r2, #4] + ldr r2, [ip, r0] + mov r0, r9 + bl printk + b .L2218 +.L2221: + mul r0, r8, r7 + ldr ip, [r5, #-536] + ldrh r1, [sp, #32] + add r7, r7, #1 + add r2, ip, r0 + ldr lr, [r2, #8] + ldr r3, [r2, #12] + ldr r10, [lr, #4] + str r10, [sp, #20] + ldr lr, [lr] + str lr, [sp, #16] + ldr lr, [r3, #12] + str lr, [sp, #12] + ldr lr, [r3, #8] + str lr, [sp, #8] + ldr lr, [r3, #4] + str lr, [sp, #4] + ldr r3, [r3] + str r3, [sp] + ldr r3, [r2, #4] + ldr r2, [ip, r0] + mov r0, r9 + bl printk + b .L2220 +.L2225: + .align 2 +.L2224: + .word .LANCHOR2 + .word .LANCHOR3+158 + .word .LC110 + .word .LANCHOR0+2334 + .word .LC114 + .word .LANCHOR0+2324 + .word .LC115 + .word .LC116 + .fnend + .size FtlScanAllBlock, .-FtlScanAllBlock + .align 2 + .global ftl_scan_all_ppa + .syntax unified + .arm + .fpu softvfp + .type ftl_scan_all_ppa, %function +ftl_scan_all_ppa: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L2243 + movw r2, #2388 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #36 + sub sp, sp, #36 + ldr r5, .L2243+4 + ldrh r4, [r3, r2] + add r10, r5, #1760 + str r3, [sp, #28] + sub r4, r4, #16 + lsl r9, r4, #10 +.L2227: + ldr r3, .L2243+8 + ldrh r3, [r3] + cmp r4, r3 + blt .L2235 + ldr r1, .L2243+12 + ldr r0, .L2243+16 + add sp, sp, #36 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, lr} + b printk +.L2235: + uxth r7, r4 + mov r0, r7 + bl ftl_get_blk_mode + ldr r3, [sp, #28] + ldrb r3, [r3, #152] @ zero_extendqisi2 + cmp r3, #0 + beq .L2228 + ldr r3, .L2243+20 + ldrh r2, [r3] + cmp r4, r2 + bge .L2229 + ldrh r3, [r3, #72] + cmp r4, r3 + blt .L2229 +.L2228: + cmp r0, #1 + bne .L2230 +.L2229: + ldr r3, .L2243+24 + mov r8, #-2147483648 + ldrh r6, [r3] +.L2231: + mov r3, r8 + mov r2, r6 + mov r1, r4 + ldr r0, .L2243+28 + bl printk + mov r0, r7 + bl FtlBbmIsBadBlock + cmp r0, #0 + beq .L2232 + mov r3, r8 + mov r2, r6 + mov r1, r4 + ldr r0, .L2243+32 + bl printk +.L2232: + ldr fp, .L2243+36 + mov r7, #0 +.L2233: + cmp r7, r6 + bne .L2234 + add r4, r4, #1 + add r9, r9, #1024 + b .L2227 +.L2230: + ldr r3, .L2243+40 + mov r8, #0 + ldrh r6, [r3] + b .L2231 +.L2234: + add r3, r8, r9 + mov r2, #0 + add r3, r3, r7 + mov r1, #1 + str r3, [r5, #1764] + mov r0, r10 + ldr r3, [r5, #-524] + add r7, r7, #1 + str r2, [r5, #1760] + str r3, [r5, #1768] + ldr r3, [r5, #-500] + str r3, [r5, #1772] + bl FlashReadPages + ldr r2, [r5, #1768] + mov r0, fp + ldr r3, [r5, #1772] + ldr r1, [r2, #4] + str r1, [sp, #16] + ldr r2, [r2] + ldr r1, [r5, #1764] + str r2, [sp, #12] + ldr r2, [r3, #12] + str r2, [sp, #8] + ldr r2, [r3, #8] + str r2, [sp, #4] + ldr r2, [r3, #4] + str r2, [sp] + ldr r2, [r5, #1760] + ldr r3, [r3] + bl printk + b .L2233 +.L2244: + .align 2 +.L2243: + .word .LANCHOR0 + .word .LANCHOR2 + .word .LANCHOR0+2388 + .word .LANCHOR3+174 + .word .LC120 + .word .LANCHOR0+2332 + .word .LANCHOR0+2392 + .word .LC117 + .word .LC118 + .word .LC119 + .word .LANCHOR0+2390 + .fnend + .size ftl_scan_all_ppa, .-ftl_scan_all_ppa + .align 2 + .global FlashProgPages + .syntax unified + .arm + .fpu softvfp + .type FlashProgPages, %function +FlashProgPages: + .fnstart + @ args = 0, pretend = 0, frame = 72 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #84 + sub sp, sp, #84 + ldr r5, .L2298 + str r1, [sp, #12] + ldr ip, [r5, #48] + ldrb r8, [r5, #36] @ zero_extendqisi2 + str r3, [sp, #24] + ldrb ip, [ip, #19] @ zero_extendqisi2 + cmp r8, #0 + str ip, [sp, #20] + bne .L2246 + ldr r3, .L2298+4 + mov r4, r0 + mov r9, r2 + ldrb r3, [r3, #477] @ zero_extendqisi2 + str r3, [sp, #16] + add r3, r5, #1216 + add r3, r3, #4 + str r3, [sp, #28] +.L2247: + ldr r3, [sp, #12] + cmp r8, r3 + bcc .L2260 + ldr r7, .L2298+8 + mov r6, #0 +.L2261: + ldrb r3, [r5, #2234] @ zero_extendqisi2 + cmp r6, r3 + bcc .L2263 + ldr r3, [sp, #24] + cmp r3, #0 + bne .L2264 +.L2272: + mov r0, #0 + b .L2245 +.L2246: + bl FlashProgSlc2KPages +.L2245: + add sp, sp, #84 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2260: + ldr r3, [sp, #12] + mov r7, #36 + mul r7, r7, r8 + add r2, sp, #36 + mov r1, r9 + sub r3, r3, r8 + uxtb r3, r3 + add fp, r4, r7 + str r3, [sp] + mov r0, fp + add r3, sp, #40 + bl LogAddr2PhyAddr + ldrb r3, [r5, #2234] @ zero_extendqisi2 + mov r10, r0 + ldr r0, [sp, #40] + cmp r3, r0 + mvnls r3, #0 + strls r3, [r4, r7] + bls .L2250 + ldrb r3, [r5, #2244] @ zero_extendqisi2 + cmp r3, #0 + add r3, r5, r0, lsl #4 + moveq r10, #0 + ldr r3, [r3, #2112] + cmp r3, #0 + beq .L2252 + uxtb r0, r0 + bl FlashWaitCmdDone +.L2252: + ldr r3, [sp, #40] + mov r1, #0 + cmp r10, #0 + add r2, r5, r3, lsl #4 + str r1, [r2, #2116] + ldr r1, [sp, #36] + str fp, [r2, #2112] + str r1, [r2, #2108] + addne r1, r7, #36 + addne r1, r4, r1 + strne r1, [r2, #2116] + add r2, r5, r3 + ldrb r6, [r2, #2236] @ zero_extendqisi2 + add r3, r5, r3, lsl #4 + strb r6, [r3, #2104] + mov r0, r6 + ldrb r3, [r5, #2234] @ zero_extendqisi2 + cmp r3, #1 + bne .L2254 + bl NandcWaitFlashReady +.L2255: + ldr r3, [sp, #20] + sub r3, r3, #1 + cmp r3, #7 + bhi .L2256 + add r3, r5, r6 + ldrb r3, [r3, #2068] @ zero_extendqisi2 + cmp r3, #0 + beq .L2256 + mov r3, #0 + ldr r2, [sp, #28] + ldrb r1, [r5, #1217] @ zero_extendqisi2 + mov r0, r6 + bl HynixSetRRPara +.L2256: + mov r0, r6 + bl NandcFlashCs + cmp r9, #1 + mov r0, r6 + bne .L2257 + ldrb r3, [r5, #152] @ zero_extendqisi2 + cmp r3, #0 + beq .L2257 + bl flash_enter_slc_mode +.L2258: + ldr r1, [sp, #36] + mov r0, r6 + bl FlashProgFirstCmd + ldr r3, [fp, #12] + mov r1, #1 + ldr r2, [sp, #16] + mov r0, r6 + str r3, [sp] + ldr r3, [fp, #8] + bl NandcXferData + cmp r10, #0 + beq .L2259 + ldr r1, [sp, #36] + mov r0, r6 + bl FlashProgDpFirstCmd + ldr r3, [sp, #40] + mov r0, r6 + ldr r1, [sp, #36] + add r7, r7, #36 + add r7, r4, r7 + add r3, r5, r3, lsl #2 + ldr r2, [r3, #1180] + adds r2, r2, #0 + movne r2, #1 + bl FlashWaitReadyEN + ldr r3, [r5, #40] + mov r0, r6 + ldr r1, [sp, #36] + add r1, r1, r3 + bl FlashProgDpSecondCmd + ldr r3, [r7, #12] + mov r1, #1 + ldr r2, [sp, #16] + mov r0, r6 + str r3, [sp] + ldr r3, [r7, #8] + bl NandcXferData +.L2259: + ldr r1, [sp, #36] + mov r0, r6 + add r8, r8, r10 + bl FlashProgSecondCmd + mov r0, r6 + bl NandcFlashDeCs +.L2250: + add r8, r8, #1 + b .L2247 +.L2254: + bl NandcFlashCs + ldr r3, [sp, #40] + mov r0, r6 + ldr r1, [sp, #36] + add r3, r5, r3, lsl #2 + ldr r2, [r3, #1180] + adds r2, r2, #0 + movne r2, #1 + bl FlashWaitReadyEN + mov r0, r6 + bl NandcFlashDeCs + b .L2255 +.L2257: + bl flash_exit_slc_mode + b .L2258 +.L2263: + uxtb r0, r6 + bl FlashWaitCmdDone + cmp r9, #1 + bne .L2262 + ldrb r3, [r5, #152] @ zero_extendqisi2 + cmp r3, #0 + beq .L2262 + ldrb r0, [r7, r6, lsl #4] @ zero_extendqisi2 + bl flash_exit_slc_mode +.L2262: + add r6, r6, #1 + b .L2261 +.L2264: + ldr r5, .L2298+12 + mov r6, #0 + ldr r7, .L2298+16 +.L2265: + ldr r3, [sp, #12] + cmp r6, r3 + beq .L2272 + ldr r3, [r4] + cmn r3, #1 + bne .L2266 + ldr r1, [r4, #4] + ldr r0, .L2298+20 + bl printk +.L2267: + add r6, r6, #1 + add r4, r4, #36 + b .L2265 +.L2266: + ldr r3, [sp, #12] + add r2, sp, #36 + mov r1, r9 + mov r0, r4 + sub r3, r3, r6 + uxtb r3, r3 + str r3, [sp] + add r3, sp, #40 + bl LogAddr2PhyAddr + ldr r2, [r5, #1732] + mov r3, #0 + mov lr, r4 + add ip, sp, #44 + str r3, [r2] + ldr r2, [r5, #1736] + str r3, [r2] + ldmia lr!, {r0, r1, r2, r3} + stmia ip!, {r0, r1, r2, r3} + ldmia lr!, {r0, r1, r2, r3} + stmia ip!, {r0, r1, r2, r3} + mov r2, r9 + ldr r3, [lr] + mov r1, #1 + add r0, sp, #44 + str r3, [ip] + ldr r3, [r5, #1732] + str r3, [sp, #52] + ldr r3, [r5, #1736] + str r3, [sp, #56] + bl FlashReadPages + ldr r8, [sp, #44] + cmn r8, #1 + bne .L2268 + ldr r1, [r4, #4] + ldr r0, .L2298+24 + bl printk + str r8, [r4] +.L2268: + ldr r3, [r4, #12] + cmp r3, #0 + beq .L2269 + ldr r2, [r3] + ldr r3, [r5, #1736] + ldr r3, [r3] + cmp r2, r3 + beq .L2269 + ldr r1, [r4, #4] + ldr r0, .L2298+28 + bl printk + mvn r3, #0 + str r3, [r4] +.L2269: + ldr r3, [r4, #8] + cmp r3, #0 + beq .L2267 + ldr r2, [r3] + ldr r3, [r5, #1732] + ldr r3, [r3] + cmp r2, r3 + beq .L2267 + ldr r1, [r4, #4] + mov r0, r7 + bl printk + mvn r3, #0 + str r3, [r4] + b .L2267 +.L2299: + .align 2 +.L2298: + .word .LANCHOR0 + .word .LANCHOR1 + .word .LANCHOR0+2104 + .word .LANCHOR2 + .word .LC108 + .word .LC104 + .word .LC105 + .word .LC107 + .fnend + .size FlashProgPages, .-FlashProgPages + .align 2 + .global FlashTestBlk + .syntax unified + .arm + .fpu softvfp + .type FlashTestBlk, %function +FlashTestBlk: + .fnstart + @ args = 0, pretend = 0, frame = 104 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, lr} + .save {r4, r5, lr} + .pad #108 + sub sp, sp, #108 + ldr r5, .L2304 + ldr r3, [r5, #1716] + cmp r0, r3 + movcc r4, #0 + bcc .L2300 + ldr r3, [r5, #1724] + mov r4, r0 + mov r2, #32 + add r0, sp, #40 + mov r1, #165 + str r0, [sp, #16] + str r3, [sp, #12] + bl ftl_memset + mov r2, #8 + mov r1, #90 + ldr r0, [r5, #1724] + bl ftl_memset + lsl r0, r4, #10 + mov r2, #1 + mov r1, r2 + str r0, [sp, #8] + add r0, sp, #4 + bl FlashEraseBlocks + mov r3, #1 + add r0, sp, #4 + mov r2, r3 + mov r1, r3 + bl FlashProgPages + ldr r4, [sp, #4] + mov r2, #1 + mov r1, #0 + add r0, sp, #4 + adds r4, r4, #0 + movne r4, #1 + rsb r4, r4, #0 + bl FlashEraseBlocks +.L2300: + mov r0, r4 + add sp, sp, #108 + @ sp needed + pop {r4, r5, pc} +.L2305: + .align 2 +.L2304: + .word .LANCHOR2 + .fnend + .size FlashTestBlk, .-FlashTestBlk + .align 2 + .global FlashMakeFactorBbt + .syntax unified + .arm + .fpu softvfp + .type FlashMakeFactorBbt, %function +FlashMakeFactorBbt: + .fnstart + @ args = 0, pretend = 0, frame = 80 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r2, .L2357 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #84 + sub sp, sp, #84 + ldr r5, .L2357 + mov r4, r2 + ldr r3, [r2, #1728] + str r3, [sp, #24] + ldr r3, .L2357+4 + ldrh r0, [r3, #136] + ldrh r1, [r3, #138] + smulbb r1, r1, r0 + ldr r0, .L2357+8 + uxth r1, r1 + str r1, [sp, #4] + ldr r1, [r3, #48] + ldrb r1, [r1, #24] @ zero_extendqisi2 + str r1, [sp, #28] + ldrh r1, [r3, #40] + ldrb r3, [r3, #36] @ zero_extendqisi2 + str r1, [sp, #20] + cmp r3, #1 + moveq r3, r1 + mov r1, #1 + lsleq r3, r3, #1 + uxtheq r3, r3 + streq r3, [sp, #20] + bl printk + ldr r0, [r4, #1728] + mov r2, #4096 + mov r1, #0 + ldr r4, .L2357+4 + bl ftl_memset + ldr r3, [sp, #4] + lsr r3, r3, #4 + str r3, [sp, #32] + mov r3, #0 + str r3, [sp, #12] +.L2308: + ldrb r7, [sp, #12] @ zero_extendqisi2 + ldrb r3, [r4, #2234] @ zero_extendqisi2 + cmp r3, r7 + bhi .L2335 + add sp, sp, #84 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2335: + ldr r2, .L2357+12 + lsl r3, r7, #1 + ldrh r6, [r2, r3] + cmp r6, #0 + bne .L2309 + ldrh r2, [r4, #144] + mov r1, r6 + ldr r0, [r5, #1696] + add fp, r4, r7, lsl #2 + mov r8, r6 + mov r9, r6 + lsl r2, r2, #9 + bl ftl_memset + add r3, r4, r7 + str r6, [sp, #8] + ldrb r10, [r3, #2236] @ zero_extendqisi2 +.L2310: + ldrh r3, [sp, #8] + ldr r2, [sp, #4] + str r3, [sp, #16] + cmp r3, r2 + bcc .L2321 +.L2320: + mov r2, r8 + mov r1, r7 + ldr r0, .L2357+16 + bl printk + ldrb r3, [r4, #2234] @ zero_extendqisi2 + ldr r2, [sp, #32] + mul r3, r2, r3 + cmp r8, r3 + blt .L2322 + ldrh r2, [r4, #144] + mov r1, #0 + ldr r0, [r5, #1696] + lsl r2, r2, #9 + bl ftl_memset +.L2322: + cmp r7, #0 + bne .L2324 + add r3, r5, #1712 + ldr r8, .L2357+20 + add r3, r3, #4 + ldrh r10, [r3] + mov r9, #1 +.L2325: + ldrb r3, [r4, #37] @ zero_extendqisi2 + cmp r3, r10 + bhi .L2327 + ldr r3, [sp, #4] + mov r10, #1 + ldr r9, .L2357+20 + sub fp, r3, #1 + sub r8, r3, #50 + uxth fp, fp +.L2328: + cmp fp, r8 + bgt .L2330 + ldrb r3, [r4, #37] @ zero_extendqisi2 + ldr r2, [r5, #1716] + sub r3, r3, r2 + cmp r6, r3 + bcc .L2324 + ldrh r2, [r4, #144] + mov r1, #0 + ldr r0, [r5, #1696] + lsl r2, r2, #9 + bl ftl_memset +.L2324: + ldr r3, [sp, #4] + ldrb r8, [sp, #12] @ zero_extendqisi2 + ldr r9, .L2357+12 + sub r6, r3, #1 + ldr fp, .L2357+24 + ldr r10, .L2357+28 + uxth r6, r6 + mul r8, r3, r8 + add r9, r9, r7, lsl #1 +.L2332: + mov r1, r7 + mov r2, r6 + mov r0, fp + bl printk + ldr r1, [r5, #1696] +.L2333: + lsr r2, r6, #5 + and r3, r6, #31 + ldr r2, [r1, r2, lsl #2] + lsr r3, r2, r3 + ands r3, r3, #1 + bne .L2334 + ldr r2, [sp, #24] + add r0, sp, #44 + strh r6, [r9] @ movhi + strh r10, [r2] @ movhi + strh r6, [r2, #2] @ movhi + strh r3, [r2, #8] @ movhi + mov r2, #1 + ldr r3, [r5, #1696] + mov r1, r2 + str r3, [sp, #52] + ldr r3, [r5, #1728] + str r3, [sp, #56] + add r3, r6, r8 + lsl r3, r3, #10 + str r3, [sp, #48] + bl FlashEraseBlocks + mov r3, #1 + add r0, sp, #44 + mov r2, r3 + mov r1, r3 + bl FlashProgPages + ldr r3, [sp, #44] + cmp r3, #0 + beq .L2309 + sub r6, r6, #1 + uxth r6, r6 + b .L2332 +.L2321: + mvn r3, #0 + strb r3, [sp, #42] + strb r3, [sp, #43] + ldr r3, [sp, #28] + tst r3, #1 + beq .L2312 + ldr r3, [fp, #1180] + add r2, sp, #42 + mov r0, r10 + add r3, r9, r3 + mov r1, r3 + str r3, [sp, #36] + bl FlashReadSpare + ldrb r2, [r4, #36] @ zero_extendqisi2 + ldr r3, [sp, #36] + cmp r2, #1 + bne .L2312 + ldr r1, [r4, #40] + add r2, sp, #43 + mov r0, r10 + add r1, r3, r1 + bl FlashReadSpare + ldrb r3, [sp, #42] @ zero_extendqisi2 + ldrb r2, [sp, #43] @ zero_extendqisi2 + and r3, r3, r2 + strb r3, [sp, #42] +.L2312: + ldr r3, [sp, #28] + tst r3, #2 + beq .L2314 + ldr r3, [r4, #48] + add r2, sp, #43 + mov r0, r10 + ldrh r1, [r3, #10] + ldr r3, [fp, #1180] + sub r1, r1, #1 + add r1, r1, r3 + add r1, r1, r9 + bl FlashReadSpare +.L2314: + ldr r2, [r4, #48] + ldrb r3, [r2, #7] @ zero_extendqisi2 + cmp r3, #8 + cmpne r3, #1 + ldrb r3, [sp, #42] @ zero_extendqisi2 + beq .L2315 + ldrb r2, [r2, #18] @ zero_extendqisi2 + cmp r2, #12 + bne .L2316 +.L2315: + cmp r3, #0 + ldrbne r0, [sp, #43] @ zero_extendqisi2 + clzne r0, r0 + lsrne r0, r0, #5 + bne .L2317 +.L2337: + mov r0, #1 + b .L2317 +.L2316: + cmp r3, #255 + bne .L2337 + ldrb r0, [sp, #43] @ zero_extendqisi2 + subs r0, r0, #255 + movne r0, #1 +.L2317: + ldr r3, [sp, #28] + tst r3, #4 + beq .L2318 + ldr r1, [fp, #1180] + mov r0, r10 + add r1, r9, r1 + bl SandiskProgTestBadBlock +.L2318: + cmp r0, #0 + beq .L2319 + ldr r2, [sp, #8] + mov r1, r7 + ldr r0, .L2357+32 + add r8, r8, #1 + bl printk + ldr r3, [sp, #16] + mov ip, #1 + ldr r2, [r5, #1696] + uxth r8, r8 + and r0, r3, #31 + lsr r1, r3, #5 + ldr r3, [r2, r1, lsl #2] + orr r3, r3, ip, lsl r0 + str r3, [r2, r1, lsl #2] + ldr r2, [sp, #32] + ldrb r3, [r4, #2234] @ zero_extendqisi2 + mul r3, r2, r3 + cmp r8, r3 + bgt .L2320 +.L2319: + ldr r3, [sp, #8] + add r3, r3, #1 + str r3, [sp, #8] + ldr r3, [sp, #20] + add r9, r9, r3 + b .L2310 +.L2327: + mov r0, r10 + bl FlashTestBlk + cmp r0, #0 + beq .L2326 + mov r1, r10 + mov r0, r8 + bl printk + ldr r1, [r5, #1696] + lsr r0, r10, #5 + add r6, r6, #1 + and r3, r10, #31 + uxth r6, r6 + ldr r2, [r1, r0, lsl #2] + orr r3, r2, r9, lsl r3 + str r3, [r1, r0, lsl #2] +.L2326: + add r10, r10, #1 + uxth r10, r10 + b .L2325 +.L2330: + mov r0, fp + bl FlashTestBlk + cmp r0, #0 + beq .L2329 + mov r1, fp + mov r0, r9 + bl printk + ldr r1, [r5, #1696] + lsr r0, fp, #5 + and r3, fp, #31 + ldr r2, [r1, r0, lsl #2] + orr r3, r2, r10, lsl r3 + str r3, [r1, r0, lsl #2] +.L2329: + sub fp, fp, #1 + uxth fp, fp + b .L2328 +.L2334: + sub r6, r6, #1 + uxth r6, r6 + b .L2333 +.L2309: + ldr r3, [sp, #12] + add r3, r3, #1 + str r3, [sp, #12] + b .L2308 +.L2358: + .align 2 +.L2357: + .word .LANCHOR2 + .word .LANCHOR0 + .word .LC121 + .word .LANCHOR2+1742 + .word .LC123 + .word .LC124 + .word .LC125 + .word -3872 + .word .LC122 + .fnend + .size FlashMakeFactorBbt, .-FlashMakeFactorBbt + .align 2 + .global FtlLowFormatEraseBlock + .syntax unified + .arm + .fpu softvfp + .type FtlLowFormatEraseBlock, %function +FtlLowFormatEraseBlock: + .fnstart + @ args = 0, pretend = 0, frame = 24 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L2404 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #28 + sub sp, sp, #28 + ldr r2, [r3, #-3612] + cmp r2, #0 + movne r4, #0 + bne .L2359 + ldr r5, .L2404+4 + mov r10, r3 + ldr fp, .L2404+8 + mov r9, r2 + mov r6, r2 + mov r4, r2 + ldrb r3, [r5, #2244] @ zero_extendqisi2 + mov r8, #36 + str r1, [sp, #4] + str r0, [sp, #8] + str r3, [sp, #20] + ldrb r3, [r5, #152] @ zero_extendqisi2 + str r0, [r10, #-548] + str r3, [sp, #12] +.L2361: + ldrh r0, [fp] + uxth r1, r9 + cmp r0, r1 + bhi .L2365 + cmp r6, #0 + beq .L2359 + ldr r3, [sp, #12] + mov r8, #0 + mov r2, r6 + ldr r0, [r10, #-3608] + strb r8, [r5, #2244] + mov r9, #36 + adds r7, r3, #0 + movne r7, #1 + mov r1, r7 + bl FlashEraseBlocks + ldrb r3, [sp, #20] @ zero_extendqisi2 + strb r3, [r5, #2244] +.L2367: + uxth r2, r8 + cmp r6, r2 + bhi .L2369 + ldr r3, [sp, #4] + cmp r3, #0 + bne .L2370 + uxth r7, r7 + mov r3, #6 + str r3, [sp, #16] + mov r3, #1 + str r3, [sp, #12] +.L2371: + ldr r6, .L2404 + mov r9, #0 +.L2380: + ldr fp, .L2404+4 + mov r10, #0 + mov r5, r10 +.L2372: + ldr r3, .L2404+8 + ldrh r1, [r3] + uxth r3, r10 + cmp r1, r3 + bhi .L2375 + cmp r5, #0 + beq .L2359 + mov r3, #1 + mov r8, #0 + mov r2, r7 + mov r1, r5 + ldr r0, [r6, #-3608] + strb r8, [fp, #2244] + bl FlashProgPages + ldrb r3, [sp, #20] @ zero_extendqisi2 + strb r3, [fp, #2244] + mov fp, #36 +.L2377: + uxth r3, r8 + cmp r5, r3 + bhi .L2379 + ldr r3, [sp, #16] + add r9, r9, r3 + ldr r3, [sp, #12] + uxth r9, r9 + cmp r3, r9 + bhi .L2380 + mov r8, #0 + mov r9, #36 +.L2381: + uxth r3, r8 + cmp r5, r3 + ldr r3, [sp, #4] + bhi .L2383 + adds r0, r3, #0 + ldr r3, [sp, #8] + movne r0, #1 + cmp r3, #63 + orrls r0, r0, #1 + cmp r0, #0 + beq .L2359 + mov r2, r5 + mov r1, r7 + ldr r0, [r6, #-3608] + bl FlashEraseBlocks +.L2359: + mov r0, r4 + add sp, sp, #28 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2365: + uxth r1, r9 + ldr ip, [r10, #-3608] + mov r3, #0 + mul r0, r8, r1 + str r3, [ip, r0] + add r0, r5, r1 + ldrb r0, [r0, #2350] @ zero_extendqisi2 + ldr r1, [sp, #8] + bl V2P_block + ldr r3, [sp, #4] + mov r7, r0 + cmp r3, #0 + beq .L2362 + bl IsBlkInVendorPart + cmp r0, #0 + bne .L2363 +.L2362: + mov r0, r7 + bl FtlBbmIsBadBlock + cmp r0, #0 + addne r4, r4, #1 + uxthne r4, r4 + bne .L2363 + ldr r3, .L2404+12 + lsl r7, r7, #10 + ldr ip, [r10, #-3608] + ldrh r1, [r3] + mla ip, r8, r6, ip + mul r1, r6, r1 + add r6, r6, #1 + uxth r6, r6 + str r0, [ip, #8] + str r7, [ip, #4] + add r0, r1, #3 + cmp r1, #0 + movlt r1, r0 + ldr r0, [r10, #-496] + bic r1, r1, #3 + add r1, r0, r1 + str r1, [ip, #12] +.L2363: + add r9, r9, #1 + b .L2361 +.L2369: + mul r2, r9, r8 + ldr r1, [r10, #-3608] + add ip, r1, r2 + ldr r2, [r1, r2] + cmn r2, #1 + bne .L2368 + ldr r0, [ip, #4] + add r4, r4, #1 + uxth r4, r4 + ubfx r0, r0, #10, #16 + bl FtlBbmMapBadBlock +.L2368: + add r8, r8, #1 + b .L2367 +.L2370: + movw r3, #2392 + ldrh r3, [r5, r3] + str r3, [sp, #12] + ldrb r3, [r5, #152] @ zero_extendqisi2 + cmp r3, #0 + ldreq r3, [sp, #12] + movne r7, #1 + moveq r7, #1 + strne r7, [sp, #16] + lsreq r3, r3, #2 + streq r3, [sp, #16] + b .L2371 +.L2375: + uxth r3, r10 + mov r2, #36 + ldr r0, [r6, #-3608] + mul r1, r2, r3 + add r3, fp, r3 + mov r2, #0 + str r2, [r0, r1] + ldr r1, [sp, #8] + ldrb r0, [r3, #2350] @ zero_extendqisi2 + bl V2P_block + ldr r3, [sp, #4] + mov r8, r0 + cmp r3, #0 + beq .L2373 + bl IsBlkInVendorPart + cmp r0, #0 + bne .L2374 +.L2373: + mov r0, r8 + bl FtlBbmIsBadBlock + cmp r0, #0 + bne .L2374 + ldr r1, [r6, #-3608] + mov r3, #36 + add r8, r9, r8, lsl #10 + mla r1, r3, r5, r1 + ldr r3, [r6, #-508] + str r3, [r1, #8] + ldr r3, .L2404+12 + str r8, [r1, #4] + ldrh r3, [r3] + mul r3, r5, r3 + add r5, r5, #1 + uxth r5, r5 + add r0, r3, #3 + cmp r3, #0 + movlt r3, r0 + ldr r0, [r6, #-504] + bic r3, r3, #3 + add r3, r0, r3 + str r3, [r1, #12] +.L2374: + add r10, r10, #1 + b .L2372 +.L2379: + mul r3, fp, r8 + ldr r2, [r6, #-3608] + add r1, r2, r3 + ldr r3, [r2, r3] + cmp r3, #0 + beq .L2378 + ldr r0, [r1, #4] + add r4, r4, #1 + uxth r4, r4 + ubfx r0, r0, #10, #16 + bl FtlBbmMapBadBlock +.L2378: + add r8, r8, #1 + b .L2377 +.L2383: + cmp r3, #0 + beq .L2382 + mul r3, r9, r8 + ldr r2, [r6, #-3608] + add r1, r2, r3 + ldr r3, [r2, r3] + cmp r3, #0 + bne .L2382 + ldr r0, [r1, #4] + mov r1, #1 + ubfx r0, r0, #10, #16 + bl FtlFreeSysBlkQueueIn +.L2382: + add r8, r8, #1 + b .L2381 +.L2405: + .align 2 +.L2404: + .word .LANCHOR2 + .word .LANCHOR0 + .word .LANCHOR0+2324 + .word .LANCHOR0+2402 + .fnend + .size FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock + .align 2 + .global FtlBbmTblFlush + .syntax unified + .arm + .fpu softvfp + .type FtlBbmTblFlush, %function +FtlBbmTblFlush: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #12 + ldr r4, .L2421 + ldr r5, [r4, #-3612] + cmp r5, #0 + bne .L2408 + ldr r7, .L2421+4 + sub r10, r4, #436 + ldr r8, .L2421+8 + mov r1, r5 + ldr r0, [r4, #-524] + ldr r3, [r4, #-500] + mov r6, r7 + sub r7, r7, #2400 + ldrh r2, [r6], #80 + mov r9, r7 + str r0, [r4, #1768] + str r3, [r4, #1772] + bl ftl_memset +.L2409: + ldrh r3, [r8] + cmp r5, r3 + blt .L2410 + ldr r6, [r4, #1772] + mov r2, #16 + mov r1, #255 + ldr r5, .L2421+12 + ldr fp, .L2421+16 + mov r0, r6 + bl ftl_memset + ldr r3, .L2421+20 + strh r3, [r6] @ movhi + ldr r3, [r7, #2464] + str r3, [r6, #4] + movw r3, #2456 + ldrh r3, [r7, r3] + strh r3, [r6, #2] @ movhi + ldrh r3, [r5, #4] + strh r3, [r6, #8] @ movhi + ldrh r3, [r5, #6] + strh r3, [r6, #10] @ movhi + ldr r3, [r7, #2320] + mov r7, #0 + mov r8, r7 + strh r3, [r6, #12] @ movhi +.L2411: + ldr r3, [r4, #-524] + mov r10, #0 + ldrh r2, [r5, #2] + ldrh r1, [r5] + str r3, [r4, #1768] + ldr r3, [r4, #-500] + str r10, [r4, #1760] + str r3, [r4, #1772] + orr r3, r2, r1, lsl #10 + ldrh r0, [r6, #10] + str r3, [r4, #1764] + ldrh r3, [r5, #4] + str r0, [sp] + mov r0, fp + bl printk + ldr r3, .L2421+24 + ldrh r2, [r5, #2] + ldrh r3, [r3] + sub r3, r3, #1 + cmp r2, r3 + blt .L2412 + ldr r3, [r9, #2464] + ldrh r2, [r5] + ldr r0, [r4, #-3608] + add r3, r3, #1 + strh r10, [r5, #2] @ movhi + str r3, [r9, #2464] + str r3, [r6, #4] + ldrh r3, [r5, #4] + strh r2, [r6, #8] @ movhi + strh r2, [r5, #4] @ movhi + mov r2, #1 + strh r3, [r5] @ movhi + mov r1, r2 + lsl r3, r3, #10 + str r3, [r4, #1764] + str r3, [r0, #4] + bl FlashEraseBlocks +.L2412: + mov r3, #1 + ldr r0, .L2421+28 + mov r2, r3 + mov r1, r3 + bl FlashProgPages + ldrh r3, [r5, #2] + add r3, r3, #1 + strh r3, [r5, #2] @ movhi + ldr r3, [r4, #1760] + cmn r3, #1 + bne .L2413 + add r7, r7, #1 + ldr r1, [r4, #1764] + uxth r7, r7 + ldr r0, .L2421+32 + bl printk + cmp r7, #3 + bls .L2411 + mov r2, r7 + ldr r1, [r4, #1764] + ldr r0, .L2421+36 + bl printk + mov r3, #1 + str r3, [r4, #-3612] +.L2408: + mov r0, #0 + add sp, sp, #12 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2410: + ldrh r2, [r10] + ldr r3, [r4, #1768] + ldr r1, [r6, #4]! + mul r0, r5, r2 + lsl r2, r2, #2 + add r5, r5, #1 + add r0, r3, r0, lsl #2 + bl ftl_memcpy + b .L2409 +.L2416: + mov r8, #1 + b .L2411 +.L2413: + add r8, r8, #1 + cmp r8, #1 + ble .L2416 + cmp r3, #256 + bne .L2408 + b .L2411 +.L2422: + .align 2 +.L2421: + .word .LANCHOR2 + .word .LANCHOR0+2400 + .word .LANCHOR0+2346 + .word .LANCHOR0+2456 + .word .LC126 + .word -3887 + .word .LANCHOR0+2392 + .word .LANCHOR2+1760 + .word .LC127 + .word .LC128 + .fnend + .size FtlBbmTblFlush, .-FtlBbmTblFlush + .align 2 + .global allocate_data_superblock + .syntax unified + .arm + .fpu softvfp + .type allocate_data_superblock, %function +allocate_data_superblock: + .fnstart + @ args = 0, pretend = 0, frame = 24 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #28 + sub sp, sp, #28 + ldr r4, .L2473 + ldr r3, [r4, #-3612] + cmp r3, #0 + bne .L2424 + sub r9, r4, #3520 + mov r7, r0 + sub r3, r9, #8 + str r3, [sp, #12] +.L2425: + ldr r3, .L2473+4 + ldr r8, .L2473+8 + ldrb r2, [r7, #8] @ zero_extendqisi2 + cmp r7, r3 + bne .L2426 + ldrh r0, [r9, #-4] + ldr lr, [r4, #-2708] + lsr ip, r0, #1 + mul r5, lr, r0 + add r1, ip, #1 + add r1, r1, r5, lsr #2 + ldr r5, [r8, #2248] + uxth r1, r1 + cmp r5, #0 + beq .L2427 + ldr r5, [r4, #-3308] + cmp r5, #39 + bhi .L2427 + cmp r5, #2 + bls .L2453 + cmp lr, #0 + movne r0, #0 + andeq r0, r0, #1 + cmp r0, #0 + moveq r1, ip + beq .L2427 +.L2453: + mov r1, #0 + b .L2428 +.L2426: + cmp r2, #1 + bne .L2453 + ldr r1, .L2473+12 + ldrh r1, [r1] + cmp r1, #1 + beq .L2453 + ldrb r1, [r8, #152] @ zero_extendqisi2 + cmp r1, #0 + bne .L2453 + ldr ip, [r8, #2248] + ldrh r0, [r9, #-4] + cmp ip, #0 + lsr r1, r0, #3 + beq .L2427 + ldr ip, [r4, #-3308] + cmp ip, #1 + rsbls r0, r0, r0, lsl #3 + ubfxls r1, r0, #3, #16 +.L2427: + cmp r1, #0 + subne r1, r1, #1 + uxthne r1, r1 +.L2428: + ldr r0, [sp, #12] + bl List_pop_index_node + ldrh r2, [r9, #-4] + uxth r3, r0 + ldr r10, .L2473+16 + str r3, [sp, #4] + sub r2, r2, #1 + strh r2, [r9, #-4] @ movhi + ldrh r2, [r10] + cmp r2, r3 + bls .L2425 + ldr r2, [r4, #-3540] + lsl r5, r3, #1 + ldrh r6, [r2, r5] + cmp r6, #0 + bne .L2425 + ldrh r3, [sp, #4] + mov r0, r7 + strh r3, [r7] @ movhi + bl make_superblock + ldrb r2, [r7, #7] @ zero_extendqisi2 + cmp r2, #0 + beq .L2470 + ldr r0, [r4, #-3608] + add r3, r7, #16 + ldrh ip, [r10, #-8] + mov r1, #36 + str r3, [sp, #8] + add fp, r7, #16 + mov r2, r0 + str r1, [sp, #16] + mla r3, r1, ip, r0 + mov ip, r6 +.L2431: + cmp r3, r2 + bne .L2433 + ldr r2, [r8, #2248] + adds r2, r2, #0 + movne r2, #1 + cmp r7, r9 + movne r2, #0 + cmp r2, #0 + beq .L2434 + ldr r2, [r4, #-3604] + ldrh r2, [r2, r5] + cmp r2, #40 + movhi r2, #0 + strbhi r2, [r4, #-3512] +.L2434: + ldrb r2, [r7, #8] @ zero_extendqisi2 + ldr r1, [r4, #-3604] + ldr fp, .L2473+20 + cmp r2, #0 + ldrh r2, [r1, r5] + bne .L2435 + cmp r2, #0 + ldrhne r0, [fp] + moveq r2, #2 + addne r2, r2, r0 + ldr r0, [sp, #4] + strh r2, [r1, r5] @ movhi + mov r1, #0 + ldr r2, [r4, #-3324] + add r2, r2, #1 + str r2, [r4, #-3324] + bl ftl_set_blk_mode +.L2438: + ldr r2, [r4, #-3604] + ldr r1, [r4, #-3312] + ldr ip, [r4, #-3324] + ldrh r2, [r2, r5] + ldrh r0, [fp] + cmp r2, r1 + ldrh r1, [r10] + strhi r2, [r4, #-3312] + ldr r2, [r4, #-3320] + mla r0, ip, r0, r2 + bl __aeabi_uidiv + ldr r1, [r4, #-480] + str r0, [r4, #-3316] + ldr r0, [r4, #-3608] + ldr r2, [r1, #16] + ldr ip, .L2473+24 + add r2, r2, #1 + str r2, [r1, #16] + mov r1, #36 + mla r1, r1, r6, r0 + add r2, r0, #4 + add r1, r1, #40 +.L2440: + add r2, r2, #36 + cmp r1, r2 + bne .L2441 + ldrb r2, [r8, #152] @ zero_extendqisi2 + cmp r2, #0 + beq .L2442 + ldrb r2, [r7, #8] @ zero_extendqisi2 + ldr r0, [r4, #-3608] + cmp r2, #1 + mov r2, r6 + moveq r1, #0 + movne r1, #1 + bl FlashEraseBlocks +.L2442: + ldrb r1, [r7, #8] @ zero_extendqisi2 + mov r2, r6 + ldr r0, [r4, #-3608] + mov r10, #0 + bl FlashEraseBlocks + mov fp, r10 + mov r1, #36 +.L2444: + uxth r2, r10 + cmp r6, r2 + bhi .L2446 + cmp fp, #0 + ble .L2447 + ldr r0, [sp, #4] + bl update_multiplier_value + bl FtlBbmTblFlush +.L2447: + ldrb r1, [r7, #7] @ zero_extendqisi2 + cmp r1, #0 + bne .L2448 +.L2470: + ldr r2, [r4, #-3540] + mvn r1, #0 + strh r1, [r2, r5] @ movhi + b .L2425 +.L2433: + str ip, [r2, #8] + movw lr, #65535 + str ip, [r2, #12] + add r2, r2, #36 + ldrh r1, [fp], #2 + cmp r1, lr + ldrne lr, [sp, #16] + lslne r1, r1, #10 + mlane lr, lr, r6, r0 + addne r6, r6, #1 + uxthne r6, r6 + strne r1, [lr, #4] + b .L2431 +.L2435: + add r2, r2, #1 + ldr r0, [sp, #4] + strh r2, [r1, r5] @ movhi + ldr r2, [r4, #-3320] + add r2, r2, #1 + str r2, [r4, #-3320] + bl ftl_set_blk_mode.part.9 + b .L2438 +.L2441: + ldr r0, [r2, #-36] + and r0, r0, ip + str r0, [r2, #-36] + b .L2440 +.L2446: + mul r2, r1, r10 + ldr r0, [r4, #-3608] + add ip, r0, r2 + ldr r2, [r0, r2] + cmn r2, #1 + bne .L2445 + ldr r0, [ip, #4] + add fp, fp, #1 + str r1, [sp, #20] + str r2, [sp, #16] + ubfx r0, r0, #10, #16 + bl FtlBbmMapBadBlock + ldr r2, [sp, #16] + ldr r3, [sp, #8] + ldr r1, [sp, #20] + strh r2, [r3] @ movhi + ldrb r2, [r7, #7] @ zero_extendqisi2 + sub r2, r2, #1 + strb r2, [r7, #7] +.L2445: + ldr r3, [sp, #8] + add r10, r10, #1 + add r3, r3, #2 + str r3, [sp, #8] + b .L2444 +.L2448: + movw r2, #2390 + ldrh r3, [sp, #4] + ldrh r2, [r8, r2] + strh r3, [r7] @ movhi + smulbb r2, r2, r1 + mov r1, #0 + strh r1, [r7, #2] @ movhi + strb r1, [r7, #6] + ldr r1, [r4, #-3332] + uxth r2, r2 + strh r2, [r7, #4] @ movhi + str r1, [r7, #12] + add r1, r1, #1 + str r1, [r4, #-3332] + ldrh r3, [r7] + ldr r1, [r4, #-3540] + lsl r3, r3, #1 + strh r2, [r1, r3] @ movhi +.L2424: + mov r0, #0 + add sp, sp, #28 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2474: + .align 2 +.L2473: + .word .LANCHOR2 + .word .LANCHOR2-3424 + .word .LANCHOR0 + .word .LANCHOR0+2344 + .word .LANCHOR0+2332 + .word .LANCHOR0+2382 + .word -1024 + .fnend + .size allocate_data_superblock, .-allocate_data_superblock + .align 2 + .global FtlGcFreeBadSuperBlk + .syntax unified + .arm + .fpu softvfp + .type FtlGcFreeBadSuperBlk, %function +FtlGcFreeBadSuperBlk: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #12 + ldr r4, .L2488 + ldrh r3, [r4, #-2] + cmp r3, #0 + beq .L2476 + ldr r9, .L2488+4 + mov r6, #0 + ldr r8, .L2488+8 + ldr r10, .L2488+12 + str r0, [sp] +.L2477: + ldrh r2, [r8] + uxth r3, r6 + cmp r2, r3 + bhi .L2483 + bl FtlGcReFreshBadBlk +.L2476: + mov r0, #0 + add sp, sp, #12 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2483: + uxtah r3, r9, r6 + ldr r1, [sp] + mov fp, #0 + ldrb r0, [r3, #2350] @ zero_extendqisi2 + bl V2P_block + mov r7, r0 +.L2478: + ldrh r3, [r4, #-2] + uxth r5, fp + cmp r3, r5 + addls r6, r6, #1 + bls .L2477 +.L2482: + uxth r3, fp + lsl r1, r3, #1 + ldrh r1, [r4, r1] + cmp r1, r7 + bne .L2479 + mov r1, r7 + mov r0, r10 + str r3, [sp, #4] + bl printk + mov r0, r7 + bl FtlBbmMapBadBlock + bl FtlBbmTblFlush + ldr r3, [sp, #4] + ldrh r1, [r4, #-2] + add r3, r4, r3, lsl #1 +.L2480: + cmp r5, r1 + bcc .L2481 + sub r1, r1, #1 + strh r1, [r4, #-2] @ movhi +.L2479: + add fp, fp, #1 + b .L2478 +.L2481: + ldrh r0, [r3, #2]! + add r5, r5, #1 + uxth r5, r5 + strh r0, [r3, #-2] @ movhi + b .L2480 +.L2489: + .align 2 +.L2488: + .word .LANCHOR2-2656 + .word .LANCHOR0 + .word .LANCHOR0+2324 + .word .LC129 + .fnend + .size FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk + .align 2 + .global update_vpc_list + .syntax unified + .arm + .fpu softvfp + .type update_vpc_list, %function +update_vpc_list: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r2, .L2499 + lsl r3, r0, #1 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + ldr r1, [r2, #-3540] + ldrh r3, [r1, r3] + cmp r3, #0 + bne .L2491 + sub r1, r2, #3280 + mov r4, r0 + ldrh r0, [r1, #-4] + sub r5, r2, #3520 + cmp r0, r4 + mvneq r3, #0 + strheq r3, [r1, #-4] @ movhi + beq .L2493 + ldrh r1, [r5] + cmp r1, r4 + beq .L2490 + sub r1, r2, #3472 + ldrh r1, [r1] + cmp r1, r4 + beq .L2490 + sub r2, r2, #3424 + ldrh r2, [r2] + cmp r2, r4 + beq .L2490 +.L2493: + mov r1, r4 + ldr r0, .L2499+4 + bl List_remove_node + ldrh r3, [r5, #-12] + mov r0, r4 + sub r3, r3, #1 + strh r3, [r5, #-12] @ movhi + bl free_data_superblock + mov r0, r4 + bl FtlGcFreeBadSuperBlk + mov r3, #1 +.L2490: + mov r0, r3 + pop {r4, r5, r6, pc} +.L2491: + bl List_update_data_list + mov r3, #0 + b .L2490 +.L2500: + .align 2 +.L2499: + .word .LANCHOR2 + .word .LANCHOR2-3544 + .fnend + .size update_vpc_list, .-update_vpc_list + .align 2 + .global decrement_vpc_count + .syntax unified + .arm + .fpu softvfp + .type decrement_vpc_count, %function +decrement_vpc_count: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + movw r3, #65535 + push {r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + cmp r0, r3 + mov r4, r0 + beq .L2502 + ldr r6, .L2512 + lsl r5, r0, #1 + ldr r3, [r6, #-3540] + ldrh r2, [r3, r5] + cmp r2, #0 + subne r2, r2, #1 + strhne r2, [r3, r5] @ movhi + bne .L2502 + mov r1, r0 + ldr r0, .L2512+4 + bl printk + ldr r3, [r6, #-3540] + sub r7, r6, #3520 + mov r2, #32 + sub r8, r7, #8 + mov r1, r4 + mov r0, r8 + strh r2, [r3, r5] @ movhi + bl test_node_in_list + cmp r0, #0 + beq .L2504 + mov r1, r4 + mov r0, r8 + bl List_remove_node + ldrh r3, [r7, #-4] + mov r0, r4 + sub r3, r3, #1 + strh r3, [r7, #-4] @ movhi + bl INSERT_DATA_LIST + ldr r3, [r6, #-3540] + mov r1, r4 + ldr r0, .L2512+8 + ldrh r2, [r3, r5] + bl printk +.L2504: + mov r0, r4 + bl FtlGcRefreshBlock +.L2507: + mov r0, #0 + pop {r4, r5, r6, r7, r8, pc} +.L2502: + ldr r5, .L2512+12 + movw r3, #65535 + ldrh r0, [r5] + cmp r0, r3 + strheq r4, [r5] @ movhi + beq .L2507 + cmp r4, r0 + beq .L2507 + bl update_vpc_list + adds r0, r0, #0 + strh r4, [r5] @ movhi + movne r0, #1 + pop {r4, r5, r6, r7, r8, pc} +.L2513: + .align 2 +.L2512: + .word .LANCHOR2 + .word .LC130 + .word .LC131 + .word .LANCHOR2-380 + .fnend + .size decrement_vpc_count, .-decrement_vpc_count + .align 2 + .global FtlSlcSuperblockCheck + .syntax unified + .arm + .fpu softvfp + .type FtlSlcSuperblockCheck, %function +FtlSlcSuperblockCheck: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldrh r3, [r0, #4] + cmp r3, #0 + bxeq lr + ldrh r2, [r0] + movw r3, #65535 + cmp r2, r3 + bxeq lr + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + mov r4, r0 + ldrb r3, [r0, #6] @ zero_extendqisi2 + ldr r5, .L2529 + ldr r6, .L2529+4 + add r3, r0, r3, lsl #1 + ldrh r3, [r3, #16] +.L2518: + movw r1, #65535 + cmp r3, r1 + beq .L2520 + ldrb r2, [r4, #8] @ zero_extendqisi2 + cmp r2, #1 + bne .L2521 + ldrb r3, [r5, #152] @ zero_extendqisi2 + cmp r3, #0 + bne .L2521 + ldrh r3, [r4, #2] + lsl r3, r3, #1 + ldrh r3, [r6, r3] + cmp r3, r1 + bne .L2521 + ldrh r3, [r4, #4] + ldrh r0, [r4] + sub r3, r3, #1 + strh r3, [r4, #4] @ movhi + bl decrement_vpc_count + ldrh r2, [r4, #4] + cmp r2, #0 + bne .L2520 + ldrh r3, [r4, #2] + strb r2, [r4, #6] + add r3, r3, #1 + strh r3, [r4, #2] @ movhi + pop {r4, r5, r6, pc} +.L2520: + ldrb r3, [r4, #6] @ zero_extendqisi2 + ldr r2, .L2529+8 + add r3, r3, #1 + ldrh r2, [r2] + uxtb r3, r3 + strb r3, [r4, #6] + cmp r2, r3 + ldrheq r3, [r4, #2] + addeq r3, r3, #1 + strheq r3, [r4, #2] @ movhi + moveq r3, #0 + strbeq r3, [r4, #6] + ldrb r3, [r4, #6] @ zero_extendqisi2 + add r3, r4, r3, lsl #1 + ldrh r3, [r3, #16] + b .L2518 +.L2521: + ldrb r3, [r5, #152] @ zero_extendqisi2 + adds r3, r3, #0 + movne r3, #1 + cmp r2, #1 + movne r3, #0 + cmp r3, #0 + popeq {r4, r5, r6, pc} + movw r3, #2392 + ldrh r2, [r4, #2] + ldrh r3, [r5, r3] + cmp r2, r3 + popcc {r4, r5, r6, pc} + ldrh r3, [r4] + ldr r2, .L2529+12 + ldrh r0, [r4, #4] + ldr r1, [r2, #-3540] + lsl r3, r3, #1 + ldrh r2, [r1, r3] + sub r2, r2, r0 + strh r2, [r1, r3] @ movhi + movw r2, #2390 + ldrh r2, [r5, r2] + mov r3, #0 + strh r3, [r4, #4] @ movhi + strb r3, [r4, #6] + strh r2, [r4, #2] @ movhi + pop {r4, r5, r6, pc} +.L2530: + .align 2 +.L2529: + .word .LANCHOR0 + .word .LANCHOR2-2620 + .word .LANCHOR0+2324 + .word .LANCHOR2 + .fnend + .size FtlSlcSuperblockCheck, .-FtlSlcSuperblockCheck + .align 2 + .global get_new_active_ppa + .syntax unified + .arm + .fpu softvfp + .type get_new_active_ppa, %function +get_new_active_ppa: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + mov r3, #0 + push {r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + strb r3, [r0, #10] + mov r4, r0 + ldrb r3, [r0, #6] @ zero_extendqisi2 + ldr r5, .L2547 + ldr r7, .L2547+4 + add r3, r0, r3, lsl #1 + ldrh r2, [r3, #16] +.L2532: + movw r1, #65535 + cmp r2, r1 + beq .L2533 + ldrb r3, [r4, #8] @ zero_extendqisi2 + ldrh r6, [r4, #2] + cmp r3, #1 + ldrh r3, [r4, #4] + bne .L2535 + ldr r0, .L2547+8 + ldrb r0, [r0, #152] @ zero_extendqisi2 + cmp r0, #0 + bne .L2535 + lsl r0, r6, #1 + ldrh r0, [r7, r0] + cmp r0, r1 + bne .L2535 + sub r3, r3, #1 + ldrh r0, [r4] + strh r3, [r4, #4] @ movhi + bl decrement_vpc_count +.L2533: + ldrb r3, [r4, #6] @ zero_extendqisi2 + ldrh r2, [r5] + add r3, r3, #1 + uxtb r3, r3 + cmp r2, r3 + strb r3, [r4, #6] + ldrheq r3, [r4, #2] + addeq r3, r3, #1 + strheq r3, [r4, #2] @ movhi + moveq r3, #0 + strbeq r3, [r4, #6] + ldrb r3, [r4, #6] @ zero_extendqisi2 + add r3, r4, r3, lsl #1 + ldrh r2, [r3, #16] + b .L2532 +.L2535: + ldr r7, .L2547+4 + orr r6, r6, r2, lsl #10 + sub r3, r3, #1 + strh r3, [r4, #4] @ movhi +.L2536: + ldrb r3, [r4, #6] @ zero_extendqisi2 + movw r1, #65535 + ldrh r0, [r5] +.L2538: + add r3, r3, #1 + uxtb r3, r3 + cmp r3, r0 + ldrheq r3, [r4, #2] + addeq r3, r3, #1 + strheq r3, [r4, #2] @ movhi + moveq r3, #0 + add r2, r4, r3, lsl #1 + ldrh r2, [r2, #16] + cmp r2, r1 + beq .L2538 + strb r3, [r4, #6] + ldrb r3, [r4, #8] @ zero_extendqisi2 + cmp r3, #1 + bne .L2531 + ldr r2, .L2547+8 + ldrb r3, [r2, #152] @ zero_extendqisi2 + cmp r3, #0 + ldrh r3, [r4, #2] + bne .L2540 + lsl r3, r3, #1 + ldrh r3, [r7, r3] + cmp r3, r1 + bne .L2531 + ldrh r3, [r4, #4] + cmp r3, #0 + beq .L2531 + sub r3, r3, #1 + ldrh r0, [r4] + strh r3, [r4, #4] @ movhi + bl decrement_vpc_count + b .L2536 +.L2540: + movw r1, #2392 + ldrh r1, [r2, r1] + cmp r3, r1 + bcc .L2531 + ldrh r3, [r4] + ldr r1, .L2547+12 + ldrh ip, [r4, #4] + ldr r0, [r1, #-3540] + lsl r3, r3, #1 + ldrh r1, [r0, r3] + sub r1, r1, ip + strh r1, [r0, r3] @ movhi + movw r1, #2390 + ldrh r2, [r2, r1] + mov r3, #0 + strh r3, [r4, #4] @ movhi + strb r3, [r4, #6] + strh r2, [r4, #2] @ movhi +.L2531: + mov r0, r6 + pop {r4, r5, r6, r7, r8, pc} +.L2548: + .align 2 +.L2547: + .word .LANCHOR0+2324 + .word .LANCHOR2-2620 + .word .LANCHOR0 + .word .LANCHOR2 + .fnend + .size get_new_active_ppa, .-get_new_active_ppa + .align 2 + .global FtlVpcTblFlush + .syntax unified + .arm + .fpu softvfp + .type FtlVpcTblFlush, %function +FtlVpcTblFlush: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #12 + ldr r4, .L2567 + ldr r3, [r4, #-3612] + cmp r3, #0 + bne .L2551 + ldr r2, [r4, #-524] + sub r5, r4, #3296 + ldr r7, [r4, #-500] + sub r8, r5, #300 + ldr r6, .L2567+4 + mov r1, #255 + str r2, [r4, #1768] + ldrh r2, [r5, #-4] + str r7, [r4, #1772] + add r9, r6, #2400 + str r3, [r7, #12] + strh r2, [r7, #2] @ movhi + ldr r2, .L2567+8 + strh r2, [r7] @ movhi + ldr r2, [r4, #-3292] + stmib r7, {r2, r3} + ldr r3, .L2567+12 + str r3, [r4, #-3596] + ldr r3, .L2567+16 + str r3, [r4, #-3592] + ldrh r3, [r5, #2] + strh r3, [r8, #8] @ movhi + movw r3, #2346 + ldrh r3, [r6, r3] + strb r3, [r4, #-3586] + sub r3, r4, #3520 + ldrh r2, [r3] + strh r2, [r8, #14] @ movhi + ldrh r2, [r3, #2] + ldrb r3, [r4, #-3514] @ zero_extendqisi2 + orr r3, r3, r2, lsl #6 + strh r3, [r8, #16] @ movhi + ldrb r3, [r4, #-3512] @ zero_extendqisi2 + strb r3, [r4, #-3585] + sub r3, r4, #3472 + ldrh r2, [r3] + strh r2, [r8, #18] @ movhi + ldrh r2, [r3, #2] + ldrb r3, [r4, #-3466] @ zero_extendqisi2 + orr r3, r3, r2, lsl #6 + strh r3, [r8, #20] @ movhi + ldrb r3, [r4, #-3464] @ zero_extendqisi2 + strb r3, [r4, #-3584] + sub r3, r4, #3424 + ldrh r2, [r3] + strh r2, [r8, #22] @ movhi + ldrh r2, [r3, #2] + ldrb r3, [r4, #-3418] @ zero_extendqisi2 + ldr r0, [r4, #1768] + orr r3, r3, r2, lsl #6 + strh r3, [r8, #24] @ movhi + ldrb r3, [r4, #-3416] @ zero_extendqisi2 + strb r3, [r4, #-3583] + ldr r3, [r4, #-3324] + str r3, [r4, #-3564] + ldr r3, [r4, #-3332] + str r3, [r4, #-3556] + ldr r3, [r4, #-3328] + str r3, [r4, #-3560] + sub r3, r4, #2656 + ldrh r2, [r3, #-10] + ldrh r3, [r3, #-8] + strh r2, [r8, #44] @ movhi + ldrh r2, [r9] + strh r3, [r5, #-254] @ movhi + bl ftl_memset + mov r1, r8 + mov r2, #48 + movw r8, #2332 + ldr r0, [r4, #1768] + bl ftl_memcpy + ldrh r2, [r6, r8] + ldr r0, [r4, #1768] + ldr r1, [r4, #-3540] + lsl r2, r2, #1 + add r0, r0, #48 + bl ftl_memcpy + ldrh r0, [r6, r8] + ldr r3, [r4, #1768] + ldr r1, [r6, #32] + lsr r2, r0, #3 + lsl r0, r0, #1 + add r0, r0, #51 + add r2, r2, #4 + bic r0, r0, #3 + add r0, r3, r0 + bl ftl_memcpy + movw r3, #2436 + str r9, [sp, #4] + ldrh r3, [r6, r3] + cmp r3, #0 + beq .L2552 + ldrh r0, [r6, r8] + movw r3, #2428 + ldrh r2, [r6, r3] + ldr r1, [r4, #-452] + lsr r3, r0, #3 + lsl r2, r2, #2 + add r3, r3, r0, lsl #1 + ldr r0, [r4, #1768] + add r3, r3, #52 + ubfx r3, r3, #2, #14 + add r0, r0, r3, lsl #2 + bl ftl_memcpy +.L2552: + ldr r10, .L2567+20 + mov r8, #0 + movw r9, #65535 + sub r5, r5, #4 + mov r0, #0 + mov fp, r10 + bl FtlUpdateVaildLpn +.L2553: + ldr r3, [r4, #-524] + ldrh r1, [r5, #2] + ldrh r2, [r5] + str r3, [r4, #1768] + ldr r3, [r4, #-500] + str r3, [r4, #1772] + orr r3, r1, r2, lsl #10 + str r3, [r4, #1764] + ldrh r3, [r10] + sub r3, r3, #1 + cmp r1, r3 + blt .L2554 + mov r3, #0 + ldrh r9, [r5, #4] + strh r3, [r5, #2] @ movhi + strh r2, [r5, #4] @ movhi + bl FtlFreeSysBlkQueueOut + ldr r3, [r4, #-3332] + strh r0, [r5] @ movhi + add r2, r3, #1 + str r3, [r4, #-3292] + str r2, [r4, #-3332] + lsl r2, r0, #10 + str r2, [r4, #1764] + str r3, [r7, #4] + strh r0, [r7, #2] @ movhi +.L2554: + ldrb r3, [r6, #36] @ zero_extendqisi2 + cmp r3, #0 + beq .L2555 + ldr r3, [sp, #4] + ldr r0, [r4, #-524] + ldrh r1, [r3] + bl js_hash + str r0, [r7, #12] +.L2555: + mov r3, #1 + ldr r0, .L2567+24 + mov r2, r3 + mov r1, r3 + bl FlashProgPages + ldrh r3, [r5, #2] + ldr r2, [r4, #1760] + add r3, r3, #1 + uxth r3, r3 + cmn r2, #1 + strh r3, [r5, #2] @ movhi + bne .L2556 + cmp r3, #1 + add r8, r8, #1 + ldrheq r3, [fp] + uxth r8, r8 + subeq r3, r3, #1 + strheq r3, [r5, #2] @ movhi + cmp r8, #3 + bls .L2553 + mov r2, r8 + ldr r1, [r4, #1764] + ldr r0, .L2567+28 + bl printk + mov r3, #1 + str r3, [r4, #-3612] +.L2551: + mov r0, #0 + add sp, sp, #12 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2556: + cmp r3, #1 + cmpne r2, #256 + beq .L2553 + movw r3, #65535 + cmp r9, r3 + beq .L2551 + mov r1, #1 + mov r0, r9 + bl FtlFreeSysBlkQueueIn + b .L2551 +.L2568: + .align 2 +.L2567: + .word .LANCHOR2 + .word .LANCHOR0 + .word -3932 + .word 1179929683 + .word 1342177379 + .word .LANCHOR0+2392 + .word .LANCHOR2+1760 + .word .LC132 + .fnend + .size FtlVpcTblFlush, .-FtlVpcTblFlush + .align 2 + .global FtlSuperblockPowerLostFix + .syntax unified + .arm + .fpu softvfp + .type FtlSuperblockPowerLostFix, %function +FtlSuperblockPowerLostFix: + .fnstart + @ args = 0, pretend = 0, frame = 40 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + .pad #40 + sub sp, sp, #40 + ldr r5, .L2585 + ldr r10, [r5, #-3612] + cmp r10, #0 + bne .L2569 + ldr r8, .L2585+4 + ldrb r3, [r8, #152] @ zero_extendqisi2 + cmp r3, #0 + beq .L2580 + ldrb r3, [r0, #8] @ zero_extendqisi2 + cmp r3, #1 + ldrheq r7, [r0, #4] + moveq r10, r3 + beq .L2571 +.L2580: + mov r7, #12 +.L2571: + mvn r3, #0 + ldr r6, [r5, #-500] + str r3, [sp, #20] + mov r9, #0 + ldr r3, [r5, #-524] + movw r2, #61589 + str r6, [sp, #16] + mov r4, r0 + str r3, [sp, #12] + mvn r3, #2 + str r3, [r6, #8] + mvn r3, #1 + str r3, [r6, #12] + ldrh r3, [r0] + strh r9, [r6] @ movhi + strh r3, [r6, #2] @ movhi + ldr r3, [r5, #-524] + str r2, [r3] + ldr r2, .L2585+8 + ldr r3, [r5, #-524] + str r2, [r3, #4] +.L2572: + subs r7, r7, #1 + bcc .L2575 + ldrh r3, [r4, #4] + cmp r3, #0 + bne .L2573 +.L2575: + ldrh r3, [r4] + ldr r1, [r5, #-3540] + ldrh r0, [r4, #4] + lsl r3, r3, #1 + ldrh r2, [r1, r3] + sub r2, r2, r0 + strh r2, [r1, r3] @ movhi + movw r3, #2390 + ldrh r3, [r8, r3] + strh r3, [r4, #2] @ movhi + mov r3, #0 + strb r3, [r4, #6] + strh r3, [r4, #4] @ movhi +.L2569: + add sp, sp, #40 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L2573: + mov r0, r4 + bl get_new_active_ppa + cmn r0, #1 + str r0, [sp, #8] + beq .L2575 + ldr r3, [r5, #-3328] + mov r2, r10 + mov r1, #1 + add r0, sp, #4 + str r3, [r6, #4] + add r3, r3, #1 + cmn r3, #1 + moveq r3, r9 + str r3, [r5, #-3328] + mov r3, #0 + bl FlashProgPages + ldrh r0, [r4] + bl decrement_vpc_count + b .L2572 +.L2586: + .align 2 +.L2585: + .word .LANCHOR2 + .word .LANCHOR0 + .word 305419896 + .fnend + .size FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix + .align 2 + .global ftl_map_blk_gc + .syntax unified + .arm + .fpu softvfp + .type ftl_map_blk_gc, %function +ftl_map_blk_gc: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #12 + mov r4, r0 + ldr r5, [r0, #12] + ldr r10, [r0, #24] + bl ftl_free_no_use_map_blk + ldrh r3, [r4, #10] + ldrh r2, [r4, #8] + ldr fp, .L2600 + sub r3, r3, #4 + cmp r2, r3 + blt .L2588 + uxth r0, r0 + lsl r0, r0, #1 + ldrh r9, [r5, r0] + cmp r9, #0 + beq .L2588 + ldr r3, [r4, #32] + cmp r3, #0 + bne .L2588 + mov r2, #1 + str r2, [r4, #32] + strh r3, [r5, r0] @ movhi + ldrh r3, [r4, #8] + ldrh r2, [r4, #2] + sub r3, r3, #1 + strh r3, [r4, #8] @ movhi + movw r3, #2392 + ldrh r3, [fp, r3] + cmp r2, r3 + bcc .L2589 + mov r0, r4 + bl ftl_map_blk_alloc_new_blk +.L2589: + ldr r5, .L2600+4 + mov r6, #0 +.L2590: + ldrh r2, [r4, #6] + uxth r3, r6 + cmp r2, r3 + bhi .L2595 + mov r1, #1 + mov r0, r9 + bl FtlFreeSysBlkQueueIn + mov r3, #0 + str r3, [r4, #32] +.L2588: + movw r3, #2392 + ldrh r2, [r4, #2] + ldrh r3, [fp, r3] + cmp r2, r3 + bcc .L2593 + mov r0, r4 + bl ftl_map_blk_alloc_new_blk + b .L2593 +.L2595: + uxth r7, r6 + add r2, r10, r7, lsl #2 + str r2, [sp] + ldr r2, [r10, r7, lsl #2] + cmp r9, r2, lsr #10 + bne .L2591 + ldr r2, [r5, #-520] + ldr r8, [r5, #-500] + ldr r0, .L2600+8 + str r2, [r5, #1768] + str r8, [r5, #1772] + ldr r2, [r10, r7, lsl #2] + str r3, [sp, #4] + str r2, [r5, #1764] + mov r2, #1 + mov r1, r2 + bl FlashReadPages + ldr r2, [r5, #1760] + ldr r3, [sp, #4] + cmn r2, #1 + bne .L2592 +.L2594: + ldr r2, [sp] + mov r3, #0 + ldr r0, .L2600+12 + str r3, [r2] + ldrh r2, [r8, #8] + ldr r1, [r5, #1764] + bl printk + mov r3, #1 + str r3, [r5, #-3612] +.L2593: + mov r0, #0 + add sp, sp, #12 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2592: + ldrh r2, [r8, #8] + cmp r2, r3 + bne .L2594 + ldrh r2, [r8] + ldrh r3, [r4, #4] + cmp r2, r3 + bne .L2594 + ldr r2, [r5, #1768] + mov r1, r7 + mov r0, r4 + bl FtlMapWritePage +.L2591: + add r6, r6, #1 + b .L2590 +.L2601: + .align 2 +.L2600: + .word .LANCHOR0 + .word .LANCHOR2 + .word .LANCHOR2+1760 + .word .LC133 + .fnend + .size ftl_map_blk_gc, .-ftl_map_blk_gc + .align 2 + .global Ftl_write_map_blk_to_last_page + .syntax unified + .arm + .fpu softvfp + .type Ftl_write_map_blk_to_last_page, %function +Ftl_write_map_blk_to_last_page: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + ldr r5, .L2613 + ldr r6, [r5, #-3612] + cmp r6, #0 + bne .L2603 + ldrh r3, [r0] + movw r2, #65535 + mov r4, r0 + ldr r7, [r0, #12] + cmp r3, r2 + bne .L2604 + ldrh r3, [r0, #8] + add r3, r3, #1 + strh r3, [r0, #8] @ movhi + bl FtlFreeSysBlkQueueOut + strh r0, [r7] @ movhi + ldr r3, [r4, #28] + strh r6, [r4, #2] @ movhi + strh r6, [r4] @ movhi + add r3, r3, #1 + str r3, [r4, #28] +.L2603: + mov r0, #0 + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L2604: + lsl r3, r3, #1 + ldr r8, [r0, #24] + ldr r10, .L2613+4 + mov r1, #255 + ldrh r9, [r7, r3] + ldrh r3, [r0, #2] + ldr r7, [r5, #-500] + orr r3, r3, r9, lsl #10 + str r7, [r5, #1772] + str r3, [r5, #1764] + ldr r3, [r5, #-524] + str r3, [r5, #1768] + ldr r3, [r0, #28] + str r3, [r7, #4] + ldr r3, .L2613+8 + strh r3, [r7, #8] @ movhi + ldrh r3, [r0, #4] + strh r9, [r7, #2] @ movhi + strh r3, [r7] @ movhi + movw r3, #2392 + ldrh r2, [r10, r3] + ldr r0, [r5, #-524] + lsl r2, r2, #3 + bl ftl_memset + mov r2, r6 + mov r3, r6 +.L2605: + ldrh r0, [r4, #6] + uxth r1, r2 + cmp r0, r1 + bhi .L2607 + ldrb r3, [r10, #36] @ zero_extendqisi2 + cmp r3, #0 + beq .L2608 + ldr r3, .L2613+12 + ldr r0, [r5, #1768] + ldrh r1, [r3] + bl js_hash + str r0, [r7, #12] +.L2608: + mov r2, #1 + mov r3, #0 + mov r1, r2 + ldr r0, .L2613+16 + bl FlashProgPages + ldrh r3, [r4, #2] + mov r0, r4 + add r3, r3, #1 + strh r3, [r4, #2] @ movhi + bl ftl_map_blk_gc + b .L2603 +.L2607: + uxth r1, r2 + ldr r0, [r8, r1, lsl #2] + cmp r9, r0, lsr #10 + bne .L2606 + ldr r0, [r5, #-524] + add r3, r3, #1 + uxth r3, r3 + str r1, [r0, r3, lsl #3] + ldr r0, [r8, r1, lsl #2] + ldr r1, [r5, #-524] + add r1, r1, r3, lsl #3 + str r0, [r1, #4] +.L2606: + add r2, r2, #1 + b .L2605 +.L2614: + .align 2 +.L2613: + .word .LANCHOR2 + .word .LANCHOR0 + .word -1291 + .word .LANCHOR0+2400 + .word .LANCHOR2+1760 + .fnend + .size Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page + .align 2 + .global FtlMapWritePage + .syntax unified + .arm + .fpu softvfp + .type FtlMapWritePage, %function +FtlMapWritePage: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #12 + mov r4, r0 + ldr r7, .L2634 + mov r9, r1 + mov fp, r2 + mov r6, #0 + ldr r10, .L2634+4 + mov r5, r7 +.L2616: + ldr r3, [r7, #-3348] + add r3, r3, #1 + str r3, [r7, #-3348] + ldrh r3, [r10] + ldrh r2, [r4, #2] + sub r3, r3, #1 + cmp r2, r3 + bge .L2617 + ldrh r2, [r4] + movw r3, #65535 + cmp r2, r3 + bne .L2618 +.L2617: + mov r0, r4 + bl Ftl_write_map_blk_to_last_page +.L2618: + ldr r1, [r5, #-3612] + cmp r1, #0 + bne .L2619 + ldrh r3, [r4] + ldr r2, [r4, #12] + ldr r0, [r5, #-500] + lsl r3, r3, #1 + ldrh r8, [r2, r3] + mov r2, #16 + ldrh r3, [r4, #2] + str fp, [r5, #1768] + str r0, [r5, #1772] + orr r3, r3, r8, lsl #10 + str r3, [r5, #1764] + bl ftl_memset + ldr r3, [r5, #1772] + ldr r2, [r4, #28] + strh r9, [r3, #8] @ movhi + str r2, [r3, #4] + ldrh r2, [r4, #4] + str r3, [sp, #4] + strh r8, [r3, #2] @ movhi + strh r2, [r3] @ movhi + ldr r2, .L2634+8 + ldrb r1, [r2, #36] @ zero_extendqisi2 + cmp r1, #0 + beq .L2620 + add r2, r2, #2400 + ldr r0, [r5, #1768] + ldrh r1, [r2] + bl js_hash + ldr r3, [sp, #4] + str r0, [r3, #12] +.L2620: + mov r3, #1 + ldr r0, .L2634+12 + mov r2, r3 + mov r1, r3 + bl FlashProgPages + ldrh r3, [r4, #2] + add r3, r3, #1 + uxth r3, r3 + strh r3, [r4, #2] @ movhi + ldr r2, [r5, #1760] + cmn r2, #1 + bne .L2621 + ldr r1, [r5, #1764] + add r6, r6, #1 + ldr r0, .L2634+16 + uxth r6, r6 + bl printk + ldrh r3, [r4, #2] + cmp r3, #2 + ldrhls r3, [r10] + subls r3, r3, #1 + strhls r3, [r4, #2] @ movhi + cmp r6, #3 + bls .L2616 + mov r2, r6 + ldr r1, [r5, #1764] + ldr r0, .L2634+20 + bl printk + mov r3, #1 + str r3, [r5, #-3612] +.L2619: + mov r0, #0 + add sp, sp, #12 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2621: + cmp r2, #0 + strhne r8, [r4, #40] @ movhi + cmp r3, #1 + cmpne r2, #256 + beq .L2625 + ldr r3, [r4, #36] + cmp r3, #0 + beq .L2626 +.L2625: + mov r3, #0 + str r3, [r4, #36] + b .L2616 +.L2626: + ldr r2, [r5, #1764] + ldr r3, [r4, #24] + str r2, [r3, r9, lsl #2] + b .L2619 +.L2635: + .align 2 +.L2634: + .word .LANCHOR2 + .word .LANCHOR0+2392 + .word .LANCHOR0 + .word .LANCHOR2+1760 + .word .LC134 + .word .LC135 + .fnend + .size FtlMapWritePage, .-FtlMapWritePage + .align 2 + .global flush_l2p_region + .syntax unified + .arm + .fpu softvfp + .type flush_l2p_region, %function +flush_l2p_region: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + mov r4, #12 + ldr r5, .L2638 + mul r4, r4, r0 + ldr r3, [r5, #-3376] + sub r0, r5, #432 + add r2, r3, r4 + ldrh r1, [r3, r4] + ldr r2, [r2, #8] + bl FtlMapWritePage + ldr r3, [r5, #-3376] + mov r0, #0 + add r4, r3, r4 + ldr r3, [r4, #4] + bic r3, r3, #-2147483648 + str r3, [r4, #4] + pop {r4, r5, r6, pc} +.L2639: + .align 2 +.L2638: + .word .LANCHOR2 + .fnend + .size flush_l2p_region, .-flush_l2p_region + .align 2 + .global FtlMapTblRecovery + .syntax unified + .arm + .fpu softvfp + .type FtlMapTblRecovery, %function +FtlMapTblRecovery: + .fnstart + @ args = 0, pretend = 0, frame = 24 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #28 + sub sp, sp, #28 + ldr r3, [r0, #24] + mov r4, r0 + mov r1, #0 + mov r7, #0 + ldr r5, .L2682 + str r3, [sp] + ldr r3, [r0, #16] + ldr r8, [r0, #12] + ldr fp, .L2682+4 + str r3, [sp, #12] + ldrh r3, [r0, #6] + str r3, [sp, #4] + ldrh r3, [r0, #8] + ldr r0, [sp] + str r3, [sp, #8] + ldr r3, [sp, #4] + lsl r2, r3, #2 + bl ftl_memset + ldr r3, [r5, #-524] + ldr r6, [r5, #-500] + str r7, [r4, #32] + str r3, [r5, #1768] + mvn r3, #0 + str r6, [r5, #1772] + strh r3, [r4] @ movhi + strh r3, [r4, #2] @ movhi + mov r3, #1 + str r7, [r4, #28] + str r3, [r4, #36] +.L2641: + ldr r3, [sp, #8] + sxth r10, r7 + cmp r10, r3 + bge .L2660 + ldr r3, [sp, #8] + sub r3, r3, #1 + cmp r10, r3 + lsl r3, r10, #1 + bne .L2642 + ldrh r0, [r8, r3] + mov r1, #1 + add r9, r8, r3 + mov r8, #0 + bl FtlGetLastWrittenPage + sxth r3, r0 + strh r7, [r4] @ movhi + add r0, r0, #1 + ldr r7, .L2682+8 + str r3, [sp, #8] + ldr r3, [sp, #12] + strh r0, [r4, #2] @ movhi + add fp, r7, #2400 + ldr r3, [r3, r10, lsl #2] + ldr r10, .L2682+12 + str r3, [r4, #28] +.L2643: + ldr r3, [sp, #8] + sxth r2, r8 + add r1, r3, #1 + cmp r2, r1 + blt .L2646 +.L2660: + mov r0, r4 + bl ftl_free_no_use_map_blk + ldr r1, .L2682+8 + movw r3, #2392 + ldrh r2, [r4, #2] + ldrh r3, [r1, r3] + cmp r2, r3 + bne .L2648 + mov r0, r4 + bl ftl_map_blk_alloc_new_blk +.L2648: + mov r0, r4 + bl ftl_map_blk_gc + mov r0, r4 + bl ftl_map_blk_gc + mov r0, #0 + add sp, sp, #28 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2646: + ldrh r1, [r9] + mov r0, r10 + orr r2, r2, r1, lsl #10 + str r2, [r5, #1764] + mov r2, #1 + mov r1, r2 + bl FlashReadPages + ldrb r2, [r7, #36] @ zero_extendqisi2 + cmp r2, #0 + beq .L2644 + ldr r2, [r5, #1772] + ldr r2, [r2, #12] + cmp r2, #0 + str r2, [sp, #12] + beq .L2644 + ldrh r1, [fp] + ldr r0, [r5, #1768] + bl js_hash + ldr r2, [sp, #12] + cmp r2, r0 + mvnne r2, #0 + strne r2, [r5, #1760] +.L2644: + ldr r1, .L2682 + ldr r2, [r1, #1760] + cmn r2, #1 + beq .L2645 + ldrh r2, [r6, #8] + ldr r3, [sp, #4] + cmp r3, r2 + bls .L2645 + ldrh ip, [r6] + ldrh r0, [r4, #4] + cmp ip, r0 + ldreq r1, [r1, #1764] + ldreq r3, [sp] + streq r1, [r3, r2, lsl #2] +.L2645: + add r8, r8, #1 + b .L2643 +.L2642: + ldr r2, [r5, #-524] + ldr r0, .L2682+12 + str r2, [r5, #1768] + add r2, r8, r3 + str r2, [sp, #16] + ldrh r2, [r8, r3] + ldrh r3, [fp] + sub r3, r3, #1 + orr r3, r3, r2, lsl #10 + mov r2, #1 + mov r1, r2 + str r3, [r5, #1764] + bl FlashReadPages + ldr r3, [r5, #1760] + cmn r3, #1 + beq .L2662 + ldrh r2, [r6] + ldrh r3, [r4, #4] + cmp r2, r3 + bne .L2662 + ldrh r2, [r6, #8] + movw r3, #64245 + cmp r2, r3 + beq .L2650 +.L2662: + ldr r9, .L2682 + mov r10, #0 +.L2651: + ldrh r2, [fp] + sxth r3, r10 + cmp r3, r2 + bge .L2658 + ldr r2, [sp, #16] + ldr r0, .L2682+12 + ldrh r2, [r2] + orr r3, r3, r2, lsl #10 + mov r2, #1 + mov r1, r2 + str r3, [r9, #1764] + bl FlashReadPages + ldr r3, .L2682+8 + ldrb r3, [r3, #36] @ zero_extendqisi2 + cmp r3, #0 + beq .L2655 + ldr r3, [r9, #1772] + ldr r3, [r3, #12] + cmp r3, #0 + str r3, [sp, #20] + beq .L2655 + ldr r2, .L2682+16 + ldr r0, [r9, #1768] + ldrh r1, [r2] + bl js_hash + ldr r3, [sp, #20] + cmp r3, r0 + mvnne r3, #0 + strne r3, [r9, #1760] +.L2655: + ldr r3, [r9, #1760] + cmn r3, #1 + beq .L2656 + ldrh r3, [r6, #8] + ldr r2, [sp, #4] + cmp r2, r3 + bls .L2656 + ldrh r1, [r6] + ldrh r2, [r4, #4] + cmp r1, r2 + ldreq r2, [r9, #1764] + ldreq r1, [sp] + streq r2, [r1, r3, lsl #2] +.L2656: + add r10, r10, #1 + b .L2651 +.L2650: + mov r1, #0 + mov ip, #4 +.L2652: + ldrh r2, [fp] + sxth r3, r1 + sub r2, r2, #1 + cmp r3, r2 + blt .L2654 +.L2658: + add r7, r7, #1 + b .L2641 +.L2654: + ldr r0, [r5, #-524] + add r1, r1, #1 + ldr r9, [sp, #4] + ldr r2, [r0, r3, lsl #3] + uxth lr, r2 + cmp r9, lr + addhi r3, ip, r3, lsl #3 + movhi r2, lr + ldrhi r3, [r0, r3] + ldrhi r0, [sp] + strhi r3, [r0, r2, lsl #2] + b .L2652 +.L2683: + .align 2 +.L2682: + .word .LANCHOR2 + .word .LANCHOR0+2392 + .word .LANCHOR0 + .word .LANCHOR2+1760 + .word .LANCHOR0+2400 + .fnend + .size FtlMapTblRecovery, .-FtlMapTblRecovery + .align 2 + .global FtlLoadVonderInfo + .syntax unified + .arm + .fpu softvfp + .type FtlLoadVonderInfo, %function +FtlLoadVonderInfo: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r2, .L2686 + movw r1, #2412 + ldr r3, .L2686+4 + push {r4, lr} + .save {r4, lr} + ldrh r1, [r2, r1] + add r0, r3, #1792 + add r0, r0, #8 + strh r1, [r0, #10] @ movhi + ldr r1, .L2686+8 + strh r1, [r0, #4] @ movhi + movw r1, #2438 + ldrh r1, [r2, r1] + strh r1, [r0, #8] @ movhi + movw r1, #2414 + ldrh r1, [r2, r1] + ldr r2, [r2, #2440] + strh r1, [r0, #6] @ movhi + str r2, [r3, #1812] + ldr r2, [r3, #-460] + str r2, [r3, #1816] + ldr r2, [r3, #-464] + str r2, [r3, #1820] + ldr r2, [r3, #-456] + str r2, [r3, #1824] + bl FtlMapTblRecovery + mov r0, #0 + pop {r4, pc} +.L2687: + .align 2 +.L2686: + .word .LANCHOR0 + .word .LANCHOR2 + .word -3962 + .fnend + .size FtlLoadVonderInfo, .-FtlLoadVonderInfo + .align 2 + .global FtlLoadMapInfo + .syntax unified + .arm + .fpu softvfp + .type FtlLoadMapInfo, %function +FtlLoadMapInfo: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, lr} + .save {r4, lr} + bl FtlL2PDataInit + ldr r0, .L2690 + bl FtlMapTblRecovery + mov r0, #0 + pop {r4, pc} +.L2691: + .align 2 +.L2690: + .word .LANCHOR2-432 + .fnend + .size FtlLoadMapInfo, .-FtlLoadMapInfo + .align 2 + .global FtlVendorPartWrite + .syntax unified + .arm + .fpu softvfp + .type FtlVendorPartWrite, %function +FtlVendorPartWrite: + .fnstart + @ args = 0, pretend = 0, frame = 56 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L2702 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r10, r2 + movw r2, #2386 + mov r5, r1 + add r1, r0, r1 + .pad #60 + sub sp, sp, #60 + ldrh r2, [r3, r2] + cmp r1, r2 + mvnhi r9, #0 + bhi .L2692 + movw r2, #2398 + ldr r8, .L2702+4 + ldrh r6, [r3, r2] + mov r7, r0 + mov r9, #0 + lsr r6, r0, r6 + lsl fp, r6, #2 +.L2694: + cmp r5, #0 + bne .L2699 +.L2692: + mov r0, r9 + add sp, sp, #60 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2699: + ldr r3, [r8, #-456] + mov r0, r7 + ldr r2, [r3, fp] + ldr r3, .L2702+8 + str r2, [sp, #12] + ldrh r3, [r3] + mov r1, r3 + str r3, [sp, #8] + bl __aeabi_uidivmod + ldr r3, [sp, #8] + ldr r2, [sp, #12] + str r1, [sp, #4] + sub r4, r3, r1 + uxth r4, r4 + cmp r5, r4 + uxthcc r4, r5 + cmp r2, #0 + cmpne r4, r3 + movne r1, #1 + moveq r1, #0 + beq .L2696 + ldr r3, [r8, #-516] + add r0, sp, #20 + str r2, [sp, #24] + mov r2, #1 + mov r1, r2 + str r3, [sp, #28] + mov r3, #0 + str r3, [sp, #32] + bl FlashReadPages +.L2697: + lsl r3, r4, #9 + ldr r0, [r8, #-516] + mov r1, r10 + mov r2, r3 + str r3, [sp, #8] + ldr r3, [sp, #4] + sub r5, r5, r4 + add r7, r7, r4 + add fp, fp, #4 + add r0, r0, r3, lsl #9 + bl ftl_memcpy + mov r1, r6 + ldr r2, [r8, #-516] + ldr r0, .L2702+12 + add r6, r6, #1 + bl FtlMapWritePage + ldr r3, [sp, #8] + cmn r0, #1 + mvneq r9, #0 + add r10, r10, r3 + b .L2694 +.L2696: + ldr r3, .L2702+16 + ldr r0, [r8, #-516] + ldrh r2, [r3] + bl ftl_memset + b .L2697 +.L2703: + .align 2 +.L2702: + .word .LANCHOR0 + .word .LANCHOR2 + .word .LANCHOR0+2396 + .word .LANCHOR2+1800 + .word .LANCHOR0+2400 + .fnend + .size FtlVendorPartWrite, .-FtlVendorPartWrite + .align 2 + .global Ftl_save_ext_data + .syntax unified + .arm + .fpu softvfp + .type Ftl_save_ext_data, %function +Ftl_save_ext_data: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L2706 + ldr r2, .L2706+4 + ldr r1, [r3, #-3236] + cmp r1, r2 + bxne lr + ldr r2, .L2706+8 + mov r1, #1 + mov r0, #0 + str r2, [r3, #-3232] + ldr r2, [r3, #-3340] + str r2, [r3, #-3148] + ldr r2, [r3, #-3336] + str r2, [r3, #-3144] + ldr r2, [r3, #-3344] + str r2, [r3, #-3228] + ldr r2, [r3, #-3356] + str r2, [r3, #-3224] + ldr r2, [r3, #-3364] + str r2, [r3, #-3220] + ldr r2, [r3, #-3348] + str r2, [r3, #-3216] + ldr r2, [r3, #-3320] + str r2, [r3, #-3208] + ldr r2, [r3, #-3600] + str r2, [r3, #-3204] + ldr r2, [r3, #-3360] + str r2, [r3, #-3200] + ldr r2, [r3, #-3352] + str r2, [r3, #-3196] + ldr r2, [r3, #-3312] + str r2, [r3, #-3192] + ldr r2, [r3, #-3308] + str r2, [r3, #-3188] + ldr r2, [r3, #-2724] + str r2, [r3, #-3176] + ldr r2, [r3, #-564] + str r2, [r3, #-3172] + ldr r2, .L2706+12 + b FtlVendorPartWrite +.L2707: + .align 2 +.L2706: + .word .LANCHOR2 + .word 1179929683 + .word 1342177379 + .word .LANCHOR2-3236 + .fnend + .size Ftl_save_ext_data, .-Ftl_save_ext_data + .align 2 + .global FtlEctTblFlush + .syntax unified + .arm + .fpu softvfp + .type FtlEctTblFlush, %function +FtlEctTblFlush: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L2718 + ldr r3, [r3, #2248] + cmp r3, #0 + ldr r3, .L2718+4 + moveq r2, #32 + beq .L2709 + ldr r2, [r3, #-3308] + cmp r2, #39 + movhi r2, #32 + movls r2, #4 +.L2709: + movw ip, #1844 + ldrh r1, [r3, ip] + cmp r1, #31 + addls r1, r1, #1 + movls r2, #1 + strhls r1, [r3, ip] @ movhi + cmp r0, #0 + bne .L2711 + ldr r1, [r3, #-480] + ldr r0, [r1, #20] + ldr r1, [r1, #16] + add r2, r2, r0 + cmp r1, r2 + bcc .L2716 +.L2711: + push {r4, lr} + .save {r4, lr} + mov r0, #64 + ldr r2, [r3, #-480] + ldr r1, [r2, #16] + str r1, [r2, #20] + ldr r1, .L2718+8 + str r1, [r2] + ldr r2, [r3, #-480] + ldr r3, .L2718+12 + ldrh r1, [r3] + lsl r3, r1, #9 + str r3, [r2, #12] + ldr r3, [r2, #8] + add r3, r3, #1 + str r3, [r2, #8] + mov r3, #0 + str r3, [r2, #4] + bl FtlVendorPartWrite + bl Ftl_save_ext_data + mov r0, #0 + pop {r4, pc} +.L2716: + mov r0, #0 + bx lr +.L2719: + .align 2 +.L2718: + .word .LANCHOR0 + .word .LANCHOR2 + .word 1112818501 + .word .LANCHOR2-488 + .fnend + .size FtlEctTblFlush, .-FtlEctTblFlush + .align 2 + .global FtlVendorPartRead + .syntax unified + .arm + .fpu softvfp + .type FtlVendorPartRead, %function +FtlVendorPartRead: + .fnstart + @ args = 0, pretend = 0, frame = 56 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L2731 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r10, r2 + movw r2, #2386 + mov r6, r1 + add r1, r0, r1 + .pad #60 + sub sp, sp, #60 + ldrh r2, [r3, r2] + cmp r1, r2 + mvnhi r9, #0 + bhi .L2720 + movw r2, #2398 + ldr r8, .L2731+4 + ldrh r5, [r3, r2] + mov r7, r0 + mov r9, #0 + lsr r5, r0, r5 + lsl fp, r5, #2 +.L2722: + cmp r6, #0 + bne .L2728 +.L2720: + mov r0, r9 + add sp, sp, #60 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2728: + ldr r3, [r8, #-456] + mov r0, r7 + ldr r3, [r3, fp] + str r3, [sp, #8] + ldr r3, .L2731+8 + ldrh r4, [r3] + mov r1, r4 + bl __aeabi_uidivmod + sub r4, r4, r1 + ldr r3, [sp, #8] + uxth r4, r4 + str r1, [sp, #4] + cmp r6, r4 + uxthcc r4, r6 + cmp r3, #0 + lsl r2, r4, #9 + str r2, [sp, #8] + beq .L2724 + ldr r2, [r8, #-516] + add r0, sp, #20 + str r3, [sp, #24] + str r3, [sp, #12] + str r2, [sp, #28] + mov r2, #0 + str r2, [sp, #32] + mov r2, #1 + mov r1, r2 + bl FlashReadPages + ldr r2, [sp, #20] + ldr r3, [sp, #12] + cmn r2, #1 + ldr r2, [r8, #1760] + mvneq r9, #0 + cmp r2, #256 + bne .L2726 + mov r2, r3 + mov r1, r5 + ldr r0, .L2731+12 + bl printk + ldr r2, [r8, #-516] + mov r1, r5 + ldr r0, .L2731+16 + bl FtlMapWritePage +.L2726: + ldr r1, [r8, #-516] + lsl r2, r4, #9 + ldr r3, [sp, #4] + mov r0, r10 + add r1, r1, r3, lsl #9 + bl ftl_memcpy +.L2727: + ldr r3, [sp, #8] + add r5, r5, #1 + sub r6, r6, r4 + add r7, r7, r4 + add fp, fp, #4 + add r10, r10, r3 + b .L2722 +.L2724: + lsl r2, r4, #9 + mov r1, r3 + mov r0, r10 + bl ftl_memset + b .L2727 +.L2732: + .align 2 +.L2731: + .word .LANCHOR0 + .word .LANCHOR2 + .word .LANCHOR0+2396 + .word .LC136 + .word .LANCHOR2+1800 + .fnend + .size FtlVendorPartRead, .-FtlVendorPartRead + .align 2 + .global FtlLoadEctTbl + .syntax unified + .arm + .fpu softvfp + .type FtlLoadEctTbl, %function +FtlLoadEctTbl: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + mov r0, #64 + ldr r4, .L2736 + sub r5, r4, #488 + ldr r2, [r4, #-480] + ldrh r1, [r5] + bl FtlVendorPartRead + ldr r3, [r4, #-480] + ldr r2, [r3] + ldr r3, .L2736+4 + cmp r2, r3 + beq .L2734 + ldr r1, .L2736+8 + ldr r0, .L2736+12 + bl printk + ldrh r2, [r5] + mov r1, #0 + ldr r0, [r4, #-480] + lsl r2, r2, #9 + bl ftl_memset +.L2734: + mov r0, #0 + pop {r4, r5, r6, pc} +.L2737: + .align 2 +.L2736: + .word .LANCHOR2 + .word 1112818501 + .word .LC137 + .word .LC77 + .fnend + .size FtlLoadEctTbl, .-FtlLoadEctTbl + .align 2 + .global Ftl_load_ext_data + .syntax unified + .arm + .fpu softvfp + .type Ftl_load_ext_data, %function +Ftl_load_ext_data: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + mov r1, #1 + ldr r4, .L2744 + mov r0, #0 + ldr r5, .L2744+4 + sub r6, r4, #3232 + sub r6, r6, #4 + mov r2, r6 + bl FtlVendorPartRead + ldr r3, [r4, #-3236] + cmp r3, r5 + beq .L2739 + mov r2, #512 + mov r1, #0 + mov r0, r6 + bl ftl_memset + str r5, [r4, #-3236] +.L2739: + ldr r3, [r4, #-3236] + cmp r3, r5 + bne .L2740 + ldr r3, [r4, #-3148] + str r3, [r4, #-3340] + ldr r3, [r4, #-3144] + str r3, [r4, #-3336] + ldr r3, [r4, #-3228] + str r3, [r4, #-3344] + ldr r3, [r4, #-3224] + str r3, [r4, #-3356] + ldr r3, [r4, #-3220] + str r3, [r4, #-3364] + ldr r3, [r4, #-3216] + str r3, [r4, #-3348] + ldr r3, [r4, #-3208] + str r3, [r4, #-3320] + ldr r3, [r4, #-3204] + str r3, [r4, #-3600] + ldr r3, [r4, #-3200] + str r3, [r4, #-3360] + ldr r3, [r4, #-3196] + str r3, [r4, #-3352] + ldr r3, [r4, #-3192] + str r3, [r4, #-3312] + ldr r3, [r4, #-3188] + str r3, [r4, #-3308] + ldr r3, [r4, #-3176] + str r3, [r4, #-2724] +.L2740: + ldr r1, [r4, #-3168] + mov r3, #0 + ldr r2, .L2744+8 + str r3, [r4, #-564] + ldr r5, .L2744+12 + cmp r1, r2 + bne .L2741 + ldrb r2, [r5, #152] @ zero_extendqisi2 + cmp r2, r3 + beq .L2742 + str r3, [r4, #-3168] + bl Ftl_save_ext_data +.L2741: + movw r3, #2382 + ldr r0, [r4, #-3324] + ldrh r2, [r5, r3] + movw r1, #2332 + ldr r3, [r4, #-3320] + ldrh r1, [r5, r1] + mla r0, r0, r2, r3 + bl __aeabi_uidiv + str r0, [r4, #-3316] + pop {r4, r5, r6, pc} +.L2742: + mov r3, #1 + ldr r1, .L2744+16 + ldr r0, .L2744+20 + str r3, [r5, #2248] + bl printk + b .L2741 +.L2745: + .align 2 +.L2744: + .word .LANCHOR2 + .word 1179929683 + .word 305432421 + .word .LANCHOR0 + .word .LC138 + .word .LC77 + .fnend + .size Ftl_load_ext_data, .-Ftl_load_ext_data + .align 2 + .global FtlMapBlkWriteDumpData + .syntax unified + .arm + .fpu softvfp + .type FtlMapBlkWriteDumpData, %function +FtlMapBlkWriteDumpData: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, [r0, #36] + cmp r3, #0 + bxeq lr + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + mov r2, #0 + ldr r4, .L2756 + str r2, [r0, #36] + ldr r2, [r4, #-3612] + ldrh r5, [r0, #6] + ldr r3, [r0, #24] + cmp r2, #0 + popne {r4, r5, r6, pc} + mov r6, r0 + ldr r2, [r4, #-500] + ldr r0, [r4, #-520] + sub r5, r5, #1 + uxth r5, r5 + str r2, [r4, #1772] + str r0, [r4, #1768] + ldr r3, [r3, r5, lsl #2] + cmp r3, #0 + str r3, [r4, #1764] + beq .L2750 + mov r2, #1 + add r0, r4, #1760 + mov r1, r2 + bl FlashReadPages +.L2751: + ldr r2, [r4, #1768] + mov r1, r5 + mov r0, r6 + pop {r4, r5, r6, lr} + b FtlMapWritePage +.L2750: + ldr r3, .L2756+4 + mov r1, #255 + ldrh r2, [r3] + bl ftl_memset + b .L2751 +.L2757: + .align 2 +.L2756: + .word .LANCHOR2 + .word .LANCHOR0+2400 + .fnend + .size FtlMapBlkWriteDumpData, .-FtlMapBlkWriteDumpData + .align 2 + .global FlashReadFacBbtData + .syntax unified + .arm + .fpu softvfp + .type FlashReadFacBbtData, %function +FlashReadFacBbtData: + .fnstart + @ args = 0, pretend = 0, frame = 40 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + mov r8, r2 + ldr r2, .L2771 + .pad #40 + sub sp, sp, #40 + mov r5, r0 + mov r7, r1 + ldr r9, .L2771+4 + ldrh r3, [r2, #138] + ldrh r2, [r2, #136] + smulbb r3, r3, r2 + ldr r2, [r9, #1696] + uxth r3, r3 + str r2, [sp, #12] + ldr r2, [r9, #1728] + sub r6, r3, #1 + mul r10, r1, r3 + uxth r6, r6 + sub r4, r3, #16 + str r2, [sp, #16] +.L2759: + cmp r6, r4 + mvnle r0, #0 + ble .L2758 +.L2765: + add r3, r6, r10 + mov r2, #1 + lsl r3, r3, #10 + mov r1, r2 + add r0, sp, #4 + str r3, [sp, #8] + bl FlashReadPages + ldr r3, [sp, #4] + cmn r3, #1 + beq .L2760 + ldr r3, [r9, #1728] + ldrh r2, [r3] + movw r3, #61664 + cmp r2, r3 + bne .L2760 + cmp r5, #0 + moveq r0, r5 + beq .L2758 + cmp r7, #0 + moveq r1, r7 + moveq lr, #1 + beq .L2763 +.L2762: + mov r2, r8 + ldr r1, [r9, #1696] + mov r0, r5 + bl ftl_memcpy + mov r3, #4 + ldr r0, .L2771+8 + mov r2, r3 + mov r1, r5 + bl rknand_print_hex + mov r0, #0 +.L2758: + add sp, sp, #40 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L2764: + ldr r0, [r9, #1696] + lsr ip, r3, #5 + and r3, r3, #31 + ldr r2, [r0, ip, lsl #2] + orr r3, r2, lr, lsl r3 + str r3, [r0, ip, lsl #2] +.L2763: + ldr r0, [r9, #1716] + uxth r3, r1 + add r1, r1, #1 + cmp r3, r0 + bcc .L2764 + b .L2762 +.L2760: + sub r6, r6, #1 + uxth r6, r6 + b .L2759 +.L2772: + .align 2 +.L2771: + .word .LANCHOR0 + .word .LANCHOR2 + .word .LC139 + .fnend + .size FlashReadFacBbtData, .-FlashReadFacBbtData + .align 2 + .global FlashGetBadBlockList + .syntax unified + .arm + .fpu softvfp + .type FlashGetBadBlockList, %function +FlashGetBadBlockList: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L2784 + push {r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + mov r5, r0 + ldr r6, .L2784+4 + ldr r3, [r3, #48] + ldr r0, [r6, #1724] + ldrb r4, [r3, #13] @ zero_extendqisi2 + ldrh r3, [r3, #14] + smulbb r4, r4, r3 + uxth r4, r4 + add r2, r4, #7 + asr r2, r2, #3 + bl FlashReadFacBbtData + cmn r0, #1 + bne .L2774 +.L2778: + mov r3, #0 +.L2775: + lsl r3, r3, #1 + mvn r2, #0 + mov r0, #0 + strh r2, [r5, r3] @ movhi + pop {r4, r5, r6, r7, r8, pc} +.L2774: + mov r2, #0 + lsr lr, r4, #4 + mov r3, r2 + sub r4, r4, #1 + mov r7, #1 +.L2776: + uxth r1, r2 + cmp r1, r4 + bge .L2775 + ldr r8, [r6, #1724] + lsr ip, r1, #5 + and r0, r1, #31 + add r2, r2, #1 + ldr ip, [r8, ip, lsl #2] + ands r0, ip, r7, lsl r0 + addne r0, r3, #1 + lslne r3, r3, #1 + strhne r1, [r5, r3] @ movhi + uxthne r3, r0 + cmp r3, lr + bcc .L2776 + b .L2778 +.L2785: + .align 2 +.L2784: + .word .LANCHOR0 + .word .LANCHOR2 + .fnend + .size FlashGetBadBlockList, .-FlashGetBadBlockList + .align 2 + .global FtlMakeBbt + .syntax unified + .arm + .fpu softvfp + .type FtlMakeBbt, %function +FtlMakeBbt: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #12 + ldr r4, .L2807 + ldr r8, [r4, #-3612] + cmp r8, #0 + bne .L2787 + ldr r9, .L2807+4 + bl FtlBbtMemInit + bl FtlLoadFactoryBbt + sub r10, r9, #18 + sub r5, r9, #28 +.L2788: + ldr r3, .L2807+8 + ldr r6, .L2807+12 + ldrh r3, [r3] + cmp r8, r3 + bcc .L2794 + ldr r8, .L2807+16 + mov r7, #0 +.L2795: + ldrh r3, [r8] + uxth r0, r7 + add r7, r7, #1 + cmp r3, r0 + bhi .L2796 + ldrh r7, [r5, #12] + movw r8, #65535 + sub r7, r7, #1 + uxth r7, r7 +.L2797: + ldrh r3, [r5, #12] + sub r3, r3, #48 + cmp r7, r3 + ble .L2801 + mov r0, r7 + bl FtlBbmIsBadBlock + cmp r0, #1 + beq .L2798 + mov r0, r7 + bl FlashTestBlk + cmp r0, #0 + beq .L2799 + mov r0, r7 + bl FtlBbmMapBadBlock +.L2798: + sub r7, r7, #1 + uxth r7, r7 + b .L2797 +.L2794: + ldr r3, [r4, #-500] + movw r2, #65535 + ldr r0, [r4, #-524] + ldr fp, .L2807+20 + str r3, [sp, #4] + str r3, [r4, #1772] + ldrh r3, [r10, #2]! + str r0, [r4, #1768] + cmp r3, r2 + beq .L2789 + ldrh r7, [fp] + mov r2, #1 + mov r1, r2 + ldr r0, .L2807+24 + mla r7, r8, r7, r3 + lsl r3, r7, #10 + str r3, [r4, #1764] + bl FlashReadPages + ldrh r2, [fp] + ldr r1, [r4, #1768] + ldr r0, [r9] + add r2, r2, #7 + asr r2, r2, #3 + bl ftl_memcpy +.L2790: + uxth r0, r7 + add r8, r8, #1 + add r9, r9, #4 + bl FtlBbmMapBadBlock + b .L2788 +.L2789: + mov r1, r8 + bl FlashGetBadBlockList + ldr r1, [r9] + ldr r0, [r4, #1768] + bl FtlBbt2Bitmap + ldrh r6, [fp] +.L2792: + sub r6, r6, #1 + uxth r6, r6 +.L2791: + ldrh r0, [fp] + smlabb r0, r0, r8, r6 + uxth r0, r0 + bl FtlBbmIsBadBlock + cmp r0, #1 + beq .L2792 + mov r2, #16 + mov r1, #0 + strh r6, [r10] @ movhi + ldr r0, [r4, #-500] + bl ftl_memset + ldr r3, [sp, #4] + movw r2, 61664 @ movhi + strh r2, [r3] @ movhi + mov r3, #0 + ldr r2, [sp, #4] + ldrh r7, [fp] + str r3, [r2, #4] + ldrh r3, [r10] + strh r3, [r2, #2] @ movhi + ldrh r3, [r10] + ldr r1, [r9] + ldr r0, [r4, #1768] + mla r7, r8, r7, r3 + lsl r3, r7, #10 + str r3, [r4, #1764] + ldr r3, .L2807+28 + ldrh r2, [r3] + lsl r2, r2, #2 + bl ftl_memcpy + mov r2, #1 + ldr r0, .L2807+24 + mov r1, r2 + bl FlashEraseBlocks + mov r3, #1 + ldr r0, .L2807+24 + mov r2, r3 + mov r1, r3 + bl FlashProgPages + ldr r3, [r4, #1760] + cmn r3, #1 + bne .L2790 + uxth r0, r7 + bl FtlBbmMapBadBlock + b .L2791 +.L2796: + bl FtlBbmMapBadBlock + b .L2795 +.L2799: + ldrh r3, [r5] + cmp r3, r8 + strheq r7, [r5] @ movhi + beq .L2798 +.L2800: + strh r7, [r5, #4] @ movhi +.L2801: + movw r7, #2456 + ldr r0, [r4, #-3608] + ldrh r3, [r6, r7] + mov r8, #0 + str r8, [r6, #2464] + mov r2, #2 + mov r1, #1 + strh r8, [r5, #2] @ movhi + lsl r3, r3, #10 + str r3, [r0, #4] + ldrh r3, [r5, #4] + lsl r3, r3, #10 + str r3, [r0, #40] + bl FlashEraseBlocks + ldrh r0, [r6, r7] + bl FtlBbmMapBadBlock + ldrh r0, [r5, #4] + bl FtlBbmMapBadBlock + bl FtlBbmTblFlush + ldr r3, [r6, #2464] + ldrh r2, [r5, #4] + strh r8, [r5, #2] @ movhi + add r3, r3, #1 + str r3, [r6, #2464] + ldrh r3, [r6, r7] + strh r2, [r6, r7] @ movhi + strh r3, [r5, #4] @ movhi + bl FtlBbmTblFlush +.L2787: + mov r0, #0 + add sp, sp, #12 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2808: + .align 2 +.L2807: + .word .LANCHOR2 + .word .LANCHOR0+2484 + .word .LANCHOR0+2346 + .word .LANCHOR0 + .word .LANCHOR0+2404 + .word .LANCHOR0+2388 + .word .LANCHOR2+1760 + .word .LANCHOR2-436 + .fnend + .size FtlMakeBbt, .-FtlMakeBbt + .align 2 + .global log2phys + .syntax unified + .arm + .fpu softvfp + .type log2phys, %function +log2phys: + .fnstart + @ args = 0, pretend = 0, frame = 16 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #20 + sub sp, sp, #20 + ldr r8, .L2825 + ldr r3, [r8, #2452] + cmp r0, r3 + bcs .L2810 + movw r3, #2398 + mov r10, r0 + ldrh r0, [r8, r3] + mov r5, #12 + ldr r4, .L2825+4 + str r1, [sp, #8] + add r3, r0, #7 + str r2, [sp, #12] + lsr r6, r10, r3 + ldr fp, [r4, #-3376] + str r3, [sp, #4] + movw r3, #2430 + uxth r9, r6 + ldrh r1, [r8, r3] + mov r3, #0 +.L2811: + uxth r7, r3 + cmp r7, r1 + bcc .L2816 + bl select_l2p_ram_region + mul r5, r5, r0 + movw r2, #65535 + mov r7, r0 + ldrh r1, [fp, r5] + add r3, fp, r5 + cmp r1, r2 + beq .L2817 + ldr r3, [r3, #4] + cmp r3, #0 + bge .L2817 + bl flush_l2p_region +.L2817: + ldr r3, [r4, #-452] + uxth r6, r6 + ldr fp, [r3, r6, lsl #2] + cmp fp, #0 + bne .L2818 + ldr r0, [r4, #-3376] + mov r1, #255 + ldr r2, .L2825+8 + add r0, r0, r5 + ldrh r2, [r2] + ldr r0, [r0, #8] + bl ftl_memset + ldr r2, [r4, #-3376] + strh r9, [r2, r5] @ movhi + ldr r2, [r4, #-3376] + add r5, r2, r5 + str fp, [r5, #4] + b .L2813 +.L2810: + cmp r2, #0 + mvn r0, #0 + streq r0, [r1] +.L2809: + add sp, sp, #20 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2816: + add r3, r3, #1 + mla r0, r5, r3, fp + ldrh r0, [r0, #-12] + cmp r0, r9 + bne .L2811 +.L2813: + ldr r3, [sp, #4] + mvn r0, #0 + ldr r1, .L2825+4 + bic r10, r10, r0, lsl r3 + ldr r3, [sp, #12] + uxth r10, r10 + cmp r3, #0 + mov r3, #12 + bne .L2814 + ldr r2, [r1, #-3376] + mla r3, r3, r7, r2 + ldr r2, [sp, #8] + ldr r3, [r3, #8] + ldr r3, [r3, r10, lsl #2] + str r3, [r2] +.L2815: + ldr r2, [r1, #-3376] + mov r3, #12 + mov r0, #0 + mla r7, r3, r7, r2 + ldr r3, [r7, #4] + cmn r3, #1 + addne r3, r3, #1 + strne r3, [r7, #4] + b .L2809 +.L2814: + ldr r2, [sp, #8] + mul r3, r3, r7 + ldr r0, [r2] + ldr r2, [r4, #-3376] + add r2, r2, r3 + ldr r2, [r2, #8] + str r0, [r2, r10, lsl #2] + ldr r2, [r4, #-3376] + add r3, r2, r3 + ldr r2, [r3, #4] + orr r2, r2, #-2147483648 + str r2, [r3, #4] + sub r3, r1, #3360 + strh r9, [r3, #-12] @ movhi + b .L2815 +.L2818: + ldr r2, [r4, #-3376] + ldr r0, .L2825+12 + str fp, [r4, #1764] + add r2, r2, r5 + ldr r2, [r2, #8] + str r2, [r4, #1768] + ldr r2, [r4, #-500] + str r2, [r4, #1772] + mov r2, #1 + mov r1, r2 + bl FlashReadPages + ldr r2, [r4, #1772] + ldrh r2, [r2, #8] + cmp r2, r9 + beq .L2819 + mov r2, fp + mov r1, r6 + ldr r0, .L2825+16 + bl printk + mov r3, #4 + ldr r1, [r4, #1772] + mov r2, r3 + ldr r0, .L2825+20 + bl rknand_print_hex + movw r3, #2428 + mov r2, #4 + ldrh r3, [r8, r3] + ldr r1, [r4, #-452] + ldr r0, .L2825+24 + bl rknand_print_hex + mov r3, #1 + str r3, [r4, #-3612] +.L2820: + ldr r3, .L2825+4 + mov r1, #0 + ldr r3, [r3, #-3376] + add r2, r3, r5 + str r1, [r2, #4] + strh r9, [r3, r5] @ movhi + b .L2813 +.L2819: + ldr r2, [r4, #1760] + cmp r2, #256 + bne .L2820 + mov r2, fp + mov r1, r6 + ldr r0, .L2825+28 + bl printk + ldr r3, [r4, #-3376] + mov r1, r6 + ldr r0, .L2825+32 + add r3, r3, r5 + ldr r2, [r3, #8] + bl FtlMapWritePage + b .L2820 +.L2826: + .align 2 +.L2825: + .word .LANCHOR0 + .word .LANCHOR2 + .word .LANCHOR0+2400 + .word .LANCHOR2+1760 + .word .LC140 + .word .LC101 + .word .LC141 + .word .LC142 + .word .LANCHOR2-432 + .fnend + .size log2phys, .-log2phys + .align 2 + .global FtlWriteDumpData + .syntax unified + .arm + .fpu softvfp + .type FtlWriteDumpData, %function +FtlWriteDumpData: + .fnstart + @ args = 0, pretend = 0, frame = 40 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #44 + sub sp, sp, #44 + ldr r4, .L2846 + ldr r3, [r4, #-3612] + cmp r3, #0 + bne .L2827 + sub r6, r4, #3520 + ldrh r2, [r6, #4] + cmp r2, #0 + beq .L2829 + ldrb r3, [r4, #-3512] @ zero_extendqisi2 + cmp r3, #0 + bne .L2829 + ldr r8, .L2846+4 + movw r3, #2390 + ldrb r1, [r4, #-3513] @ zero_extendqisi2 + ldrh r3, [r8, r3] + mul r3, r3, r1 + cmp r2, r3 + beq .L2829 + ldrb r10, [r4, #-3510] @ zero_extendqisi2 + cmp r10, #0 + bne .L2827 + ldr r7, [r8, #2452] + movw r3, #2324 + mov r2, r10 + mov r1, sp + ldrh r9, [r8, r3] + sub r7, r7, #1 + mov r0, r7 + bl log2phys + ldr r3, [sp] + ldr r5, [r4, #-500] + ldr r0, [r4, #-524] + cmn r3, #1 + str r3, [sp, #8] + str r7, [sp, #20] + str r0, [sp, #12] + str r5, [sp, #16] + str r10, [r5, #4] + beq .L2831 + mov r2, r10 + mov r1, #1 + add r0, sp, #4 + bl FlashReadPages +.L2832: + ldr r10, .L2846+8 + mov r8, #0 + ldr r3, .L2846+12 + lsl r9, r9, #2 + mov fp, r8 + strh r3, [r5] @ movhi +.L2833: + cmp r9, r8 + bne .L2837 +.L2834: + mov r3, #1 +.L2845: + strb r3, [r4, #-3510] +.L2827: + add sp, sp, #44 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2831: + add r8, r8, #2400 + mov r1, #255 + ldrh r2, [r8] + bl ftl_memset + b .L2832 +.L2837: + ldrh r3, [r6, #4] + cmp r3, #0 + beq .L2834 + ldr r3, [sp, #8] + mov r0, r10 + str r7, [r5, #8] + add r8, r8, #1 + str r3, [r5, #12] + ldrh r3, [r6] + strh r3, [r5, #2] @ movhi + bl get_new_active_ppa + ldr r3, [r4, #-3328] + mov r1, #1 + str r0, [sp, #8] + add r0, sp, #4 + str r3, [r5, #4] + add r3, r3, #1 + cmn r3, #1 + moveq r3, fp + str r3, [r4, #-3328] + mov r3, #0 + mov r2, r3 + bl FlashProgPages + ldrh r0, [r6] + bl decrement_vpc_count + b .L2833 +.L2829: + mov r3, #0 + b .L2845 +.L2847: + .align 2 +.L2846: + .word .LANCHOR2 + .word .LANCHOR0 + .word .LANCHOR2-3520 + .word -3947 + .fnend + .size FtlWriteDumpData, .-FtlWriteDumpData + .align 2 + .global l2p_flush + .syntax unified + .arm + .fpu softvfp + .type l2p_flush, %function +l2p_flush: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + mov r4, #0 + ldr r5, .L2853 + mov r7, #12 + ldr r6, .L2853+4 + bl FtlWriteDumpData +.L2849: + ldrh r3, [r5] + uxth r0, r4 + cmp r3, r0 + bhi .L2851 + mov r0, #0 + pop {r4, r5, r6, r7, r8, pc} +.L2851: + ldr r2, [r6, #-3376] + uxth r3, r4 + mla r3, r7, r3, r2 + ldr r3, [r3, #4] + cmp r3, #0 + bge .L2850 + bl flush_l2p_region +.L2850: + add r4, r4, #1 + b .L2849 +.L2854: + .align 2 +.L2853: + .word .LANCHOR0+2430 + .word .LANCHOR2 + .fnend + .size l2p_flush, .-l2p_flush + .align 2 + .global allocate_new_data_superblock + .syntax unified + .arm + .fpu softvfp + .type allocate_new_data_superblock, %function +allocate_new_data_superblock: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + ldr r4, .L2882 + ldr r3, [r4, #-3612] + cmp r3, #0 + bne .L2856 + ldrh r5, [r0] + movw r3, #65535 + mov r7, r0 + cmp r5, r3 + beq .L2857 + ldr r2, [r4, #-3540] + lsl r3, r5, #1 + mov r0, r5 + ldrh r3, [r2, r3] + cmp r3, #0 + beq .L2858 + bl INSERT_DATA_LIST +.L2857: + ldr r2, .L2882+4 + mov r3, #0 + strb r3, [r7, #8] + cmp r7, r2 + beq .L2859 + ldr r3, .L2882+8 + movw r1, #2344 + ldrh r1, [r3, r1] + cmp r1, #1 + beq .L2859 + ldrb r0, [r3, #152] @ zero_extendqisi2 + cmp r0, #0 + beq .L2860 +.L2859: + mov r3, #1 + strb r3, [r7, #8] +.L2861: + ldr r3, .L2882+12 + movw r2, #65535 + ldrh r0, [r3] + mov r6, r3 + cmp r0, r2 + beq .L2866 + cmp r5, r0 + bne .L2867 + ldr r2, [r4, #-3540] + lsl r3, r0, #1 + ldrh r3, [r2, r3] + cmp r3, #0 + beq .L2868 +.L2867: + bl update_vpc_list +.L2868: + mvn r3, #0 + strh r3, [r6] @ movhi +.L2866: + mov r0, r7 + bl allocate_data_superblock + bl l2p_flush + mov r0, #0 + bl FtlEctTblFlush + bl FtlVpcTblFlush +.L2856: + mov r0, #0 + pop {r4, r5, r6, r7, r8, pc} +.L2858: + bl INSERT_FREE_LIST + b .L2857 +.L2860: + sub r2, r2, #48 + cmp r7, r2 + bne .L2861 + cmp r1, #3 + beq .L2863 + ldr r2, [r4, #-2724] + cmp r2, #1 + bne .L2864 +.L2863: + mov r2, #1 + strb r2, [r4, #-3512] +.L2864: + ldr r3, [r3, #2248] + cmp r3, #0 + beq .L2861 + ldr r3, [r4, #-3308] + cmp r3, #39 + movls r3, #1 + strbls r3, [r4, #-3512] + b .L2861 +.L2883: + .align 2 +.L2882: + .word .LANCHOR2 + .word .LANCHOR2-3472 + .word .LANCHOR0 + .word .LANCHOR2-380 + .fnend + .size allocate_new_data_superblock, .-allocate_new_data_superblock + .align 2 + .global FtlCheckVpc + .syntax unified + .arm + .fpu softvfp + .type FtlCheckVpc, %function +FtlCheckVpc: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #12 + mov r4, #0 + ldr r6, .L2905 + ldr r5, .L2905+4 + ldr r1, .L2905+8 + ldr r0, .L2905+12 + bl printk + mov r2, #8192 + mov r1, #0 + ldr r0, .L2905+4 + bl memset +.L2885: + ldr r3, [r6, #2452] + cmp r4, r3 + bcc .L2887 + ldr r9, .L2905+16 + mov r4, #0 + ldr r5, .L2905+20 + mov r6, r4 + ldr r8, .L2905+4 +.L2888: + ldrh r2, [r9] + uxth r3, r4 + cmp r2, r3 + bhi .L2890 + ldr r4, [r5, #-3528] + cmp r4, #0 + beq .L2891 + ldr r3, .L2905+24 + mov r7, #0 + ldr r9, .L2905+4 + mov fp, #6 + ldr r10, .L2905+28 + ldrh r8, [r3, #-4] + ldr r3, [r5, #-3548] + sub r4, r4, r3 + ldr r3, .L2905+32 + asr r4, r4, #1 + mul r4, r3, r4 + uxth r4, r4 +.L2892: + uxth r3, r7 + cmp r8, r3 + bls .L2891 + ldr r2, [r5, #-3540] + lsl r3, r4, #1 + ldrh r2, [r2, r3] + cmp r2, #0 + beq .L2893 + mov r6, #1 + ldrh r3, [r9, r3] + mov r1, r4 + mov r0, r10 + bl printk +.L2893: + mul r4, fp, r4 + ldr r3, [r5, #-3548] + add r7, r7, #1 + ldrh r4, [r3, r4] + movw r3, #65535 + cmp r4, r3 + bne .L2892 +.L2891: + mov r1, r6 + ldr r0, .L2905+36 + bl printk + add sp, sp, #12 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2887: + mov r2, #0 + add r1, sp, #4 + mov r0, r4 + bl log2phys + ldr r0, [sp, #4] + cmn r0, #1 + beq .L2886 + ubfx r0, r0, #10, #16 + bl P2V_block_in_plane + lsl r0, r0, #1 + ldrh r3, [r5, r0] + add r3, r3, #1 + strh r3, [r5, r0] @ movhi +.L2886: + add r4, r4, #1 + b .L2885 +.L2890: + uxth r1, r4 + ldr r3, [r5, #-3540] + lsl r7, r1, #1 + ldrh r2, [r3, r7] + ldrh r3, [r8, r7] + cmp r2, r3 + beq .L2889 + ldr r0, .L2905+40 + bl printk + ldr r3, [r5, #-3540] + movw r2, #65535 + ldrh r3, [r3, r7] + cmp r3, r2 + beq .L2889 + ldrh r2, [r8, r7] + cmp r2, r3 + movhi r6, #1 +.L2889: + add r4, r4, #1 + b .L2888 +.L2906: + .align 2 +.L2905: + .word .LANCHOR0 + .word check_valid_page_count_table + .word .LANCHOR3+191 + .word .LC110 + .word .LANCHOR0+2332 + .word .LANCHOR2 + .word .LANCHOR2-3520 + .word .LC144 + .word -1431655765 + .word .LC145 + .word .LC143 + .fnend + .size FtlCheckVpc, .-FtlCheckVpc + .align 2 + .global Ftlscanalldata + .syntax unified + .arm + .fpu softvfp + .type Ftlscanalldata, %function +Ftlscanalldata: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + mov r5, #0 + ldr r4, .L2916 + .pad #32 + sub sp, sp, #32 + mov r1, #0 + ldr r7, .L2916+4 + add r8, r4, #1760 + ldr r0, .L2916+8 + bl printk +.L2908: + ldr r3, [r7, #2452] + cmp r5, r3 + bcc .L2914 + add sp, sp, #32 + @ sp needed + pop {r4, r5, r6, r7, r8, pc} +.L2914: + mov r2, #0 + add r1, sp, #28 + mov r0, r5 + bl log2phys + ubfx r3, r5, #0, #11 + cmp r3, #0 + bne .L2909 + ldr r2, [sp, #28] + mov r1, r5 + ldr r0, .L2916+12 + bl printk +.L2909: + ldr r3, [sp, #28] + cmn r3, #1 + beq .L2911 + str r3, [r4, #1764] + mov r2, #0 + ldr r3, [r4, #-524] + mov r1, #1 + ldr r6, [r4, #-500] + mov r0, r8 + str r5, [r4, #1776] + str r3, [r4, #1768] + str r6, [r4, #1772] + str r2, [r4, #1760] + bl FlashReadPages + ldr r3, [r4, #1760] + cmn r3, #1 + cmpne r3, #256 + beq .L2912 + ldr r3, [r6, #8] + cmp r5, r3 + beq .L2911 +.L2912: + ldr r2, [r4, #1768] + ldr r3, [r4, #1772] + ldr r0, .L2916+16 + ldr r1, [r2, #4] + str r1, [sp, #16] + mov r1, r5 + ldr r2, [r2] + str r2, [sp, #12] + ldr r2, [r3, #12] + str r2, [sp, #8] + ldr r2, [r3, #8] + str r2, [sp, #4] + ldr r2, [r3, #4] + str r2, [sp] + ldr r2, [r4, #1764] + ldr r3, [r3] + bl printk +.L2911: + add r5, r5, #1 + b .L2908 +.L2917: + .align 2 +.L2916: + .word .LANCHOR2 + .word .LANCHOR0 + .word .LC146 + .word .LC147 + .word .LC148 + .fnend + .size Ftlscanalldata, .-Ftlscanalldata + .align 2 + .global FtlReUsePrevPpa + .syntax unified + .arm + .fpu softvfp + .type FtlReUsePrevPpa, %function +FtlReUsePrevPpa: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r4, r5, r6, r7, r8, r9, lr} + .save {r4, r5, r6, r7, r8, r9, lr} + .pad #12 + mov r5, r0 + ldr r6, .L2928 + ubfx r0, r1, #10, #16 + str r1, [sp, #4] + bl P2V_block_in_plane + ldr r2, [r6, #-3540] + lsl r7, r0, #1 + ldrh r3, [r2, r7] + cmp r3, #0 + bne .L2919 + ldr r4, [r6, #-3528] + cmp r4, #0 + beq .L2920 + ldr r2, [r6, #-3548] + sub r8, r6, #3520 + ldr ip, .L2928+4 + mov lr, #6 + ldrh r1, [r8, #-4] + movw r9, #65535 + sub r4, r4, r2 + asr r4, r4, #1 + mul r4, ip, r4 + uxth r4, r4 +.L2921: + uxth ip, r3 + cmp r1, ip + bls .L2920 + cmp r4, r0 + bne .L2922 + mov r1, r4 + sub r0, r8, #8 + bl List_remove_node + ldrh r3, [r8, #-4] + mov r0, r4 + sub r3, r3, #1 + strh r3, [r8, #-4] @ movhi + bl INSERT_DATA_LIST + ldr r2, [r6, #-3540] + ldrh r3, [r2, r7] +.L2919: + add r3, r3, #1 + strh r3, [r2, r7] @ movhi + b .L2920 +.L2922: + mul r4, lr, r4 + add r3, r3, #1 + ldrh r4, [r2, r4] + cmp r4, r9 + bne .L2921 +.L2920: + mov r2, #1 + add r1, sp, #4 + mov r0, r5 + bl log2phys + add sp, sp, #12 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, pc} +.L2929: + .align 2 +.L2928: + .word .LANCHOR2 + .word -1431655765 + .fnend + .size FtlReUsePrevPpa, .-FtlReUsePrevPpa + .align 2 + .global FtlRecoverySuperblock + .syntax unified + .arm + .fpu softvfp + .type FtlRecoverySuperblock, %function +FtlRecoverySuperblock: + .fnstart + @ args = 0, pretend = 0, frame = 48 + @ frame_needed = 0, uses_anonymous_args = 0 + ldrh r2, [r0] + movw r1, #65535 + cmp r2, r1 + beq .L3075 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + movw r2, #2390 + ldr r6, .L3087 + .pad #52 + sub sp, sp, #52 + mov r10, r0 + ldrh r3, [r0, #2] + ldrh r2, [r6, r2] + str r3, [sp, #8] + cmp r2, r3 + mov r2, #0 + strheq r2, [r0, #4] @ movhi + strbeq r2, [r0, #6] + ldrhne r0, [r0, #16] + bne .L2934 +.L3073: + mov r0, #0 + add sp, sp, #52 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2935: + uxth r0, r2 + add r0, r10, r0, lsl #1 + ldrh r0, [r0, #16] +.L2934: + cmp r0, r1 + add r2, r2, #1 + beq .L2935 + ldrb r1, [r10, #8] @ zero_extendqisi2 + ldrb r3, [r10, #6] @ zero_extendqisi2 + cmp r1, #1 + str r3, [sp, #12] + bne .L2936 + bl FtlGetLastWrittenPage + cmn r0, #1 + mov r4, r0 + beq .L2937 + ldrb r3, [r6, #152] @ zero_extendqisi2 + cmp r3, #0 + addeq r3, r6, r0, lsl #1 + ldrheq r5, [r3, #156] + beq .L2938 +.L3008: + mov r5, r4 +.L2938: + movw r3, #2324 + mov r2, #0 + ldrh r3, [r6, r3] + movw r8, #65535 + mov r9, #36 + str r3, [sp] + ldr r3, .L3087+4 + ldr r0, [r3, #-536] + ldr lr, [r3, #-2692] + movw r3, #2402 + ldrh r7, [r6, r3] + add r3, r10, #16 + mov ip, r3 + mov r6, r2 + str r3, [sp, #20] +.L2939: + ldr r1, [sp] + uxth r3, r2 + cmp r1, r3 + bhi .L2941 + ldrb r3, [r10, #8] @ zero_extendqisi2 + cmp r3, #1 + movne r3, #0 + bne .L3078 + ldr r3, .L3087 + ldrb r3, [r3, #152] @ zero_extendqisi2 + adds r3, r3, #0 + movne r3, #1 +.L3078: + ldr r7, .L3087+4 + mov r1, r6 + str r3, [sp, #24] + mov r8, #0 + ldr r2, [sp, #24] + movw r9, #65535 + bl FlashReadPages + ldr r3, [r7, #-3328] + mov fp, r7 + str r3, [sp, #16] +.L2943: + uxth r3, r8 + cmp r6, r3 + bhi .L2948 + bne .L2946 + add r4, r4, #1 + uxth r3, r4 + str r3, [sp] + ldr r3, [r7, #-536] + ldr r0, [r3, #4] +.L3079: + ubfx r0, r0, #10, #16 + bl P2V_plane + ldrb r2, [r10, #8] @ zero_extendqisi2 + str r0, [sp, #4] + ldr r3, .L3087 + cmp r2, #1 + bne .L2950 + ldrb r1, [r3, #152] @ zero_extendqisi2 + cmp r1, #0 + ldreq r1, [sp] + addeq r4, r3, r1, lsl #1 + ldrheq r1, [r4, #156] + streq r1, [sp] +.L2950: + movw r1, #2390 + ldrh r3, [r3, r1] + ldr r1, [sp] + cmp r3, r1 + ldmib sp, {r0, r1} + ldrheq r3, [sp] + strheq r3, [r10, #2] @ movhi + moveq r3, #0 + strbeq r3, [r10, #6] + strheq r3, [r10, #4] @ movhi + ldrh r3, [sp, #12] + str r3, [sp, #28] + ldr ip, [sp, #28] + ldr r3, [sp] + cmp r3, r1 + cmpeq r0, ip + moveq r2, r0 + moveq r1, r3 + beq .L3085 + ldr r3, [sp, #16] + sub fp, r3, #1 + movw r3, #65535 + subs r9, r9, r3 + movne r9, #1 + cmp r2, #0 + orreq r9, r9, #1 + cmp r9, #0 + beq .L2954 + ldr r3, [r7, #-368] + uxth r8, r5 + uxth r5, r5 + cmn r3, #1 + streq fp, [r7, #-368] + ldr r3, [r7, #-368] + mvn r7, #0 + mov r6, r7 + str r3, [sp, #12] + ldr r3, [sp, #8] + add r3, r3, #7 + cmp r5, r3 + subgt r4, r8, #7 + ldrle r4, [sp, #8] + uxthgt r4, r4 +.L2957: + cmp r4, r8 + ldr r3, .L3087+4 + bhi .L2970 + ldr r2, .L3087+8 + mov ip, #36 + ldr r0, [r3, #-536] + mov r3, #0 + ldr r1, [sp, #20] + mov r5, r3 + ldrh r9, [r2] + b .L2971 +.L2936: + mov r1, #0 + bl FtlGetLastWrittenPage + cmn r0, #1 + mov r4, r0 + bne .L3008 +.L2937: + mov r3, #0 + strh r3, [r10, #2] @ movhi +.L3084: + strb r3, [r10, #6] + b .L3073 +.L2941: + ldrh r3, [ip], #2 + cmp r3, r8 + beq .L2940 + mla r1, r9, r6, r0 + orr r3, r5, r3, lsl #10 + str r3, [r1, #4] + mov r3, #0 + str r3, [r1, #8] + mul r3, r7, r6 + add r6, r6, #1 + uxth r6, r6 + add fp, r3, #3 + cmp r3, #0 + movlt r3, fp + bic r3, r3, #3 + add r3, lr, r3 + str r3, [r1, #12] +.L2940: + add r2, r2, #1 + b .L2939 +.L2948: + mov r3, #36 + ldr r1, [fp, #-536] + mul r3, r3, r8 + add r2, r1, r3 + ldr r3, [r1, r3] + cmp r3, #0 + bne .L2944 + ldr r2, [r2, #12] + ldr r3, [r2, #4] + cmn r3, #1 + beq .L2945 + ldr r1, [fp, #-3328] + mov r0, r3 + bl ftl_cmp_data_ver + cmp r0, #0 + addne r3, r3, #1 + strne r3, [fp, #-3328] +.L2945: + ldr r3, [r2] + cmn r3, #1 + bne .L2947 +.L2946: + uxth r3, r4 + uxth r8, r8 + str r3, [sp] + mov r2, #36 + ldr r3, [r7, #-536] + mla r8, r2, r8, r3 + ldr r0, [r8, #4] + b .L3079 +.L2944: + ldr r1, [r2, #4] + uxth r9, r5 + ldr r0, .L3087+12 + bl printk + ldrh r3, [r10] + ldr r2, .L3087+16 + strh r3, [r2] @ movhi +.L2947: + add r8, r8, #1 + b .L2943 +.L2959: + ldrh r2, [r1], #2 + movw lr, #65535 + add r3, r3, #1 + cmp r2, lr + mlane lr, ip, r5, r0 + addne r5, r5, #1 + orrne r2, r4, r2, lsl #10 + uxthne r5, r5 + strne r2, [lr, #4] +.L2971: + uxth r2, r3 + cmp r2, r9 + bcc .L2959 + mov r1, r5 + ldr r2, [sp, #24] + bl FlashReadPages + ldr r3, .L3087 + mov r1, #36 + ldr r2, .L3087+4 + ldr r0, .L3087+20 + ldrb ip, [r3, #152] @ zero_extendqisi2 + ldr r3, [r2, #-536] + add lr, r0, r4, lsl #1 + mla r5, r1, r5, r3 + movw r1, #65535 +.L2960: + cmp r5, r3 + addeq r4, r4, #1 + uxtheq r4, r4 + beq .L2957 +.L2969: + ldr r0, [r3] + cmp r0, #0 + bne .L2961 + ldr r0, [r3, #12] + ldrh r9, [r0] + cmp r9, r1 + beq .L2962 + ldr r0, [r0, #4] + cmn r0, #1 + beq .L2962 + cmn r7, #1 + ldr r6, [r2, #-368] + str r0, [r2, #-368] + bne .L2962 + ldrh r0, [lr] + cmp r0, r1 + bne .L2963 + cmp ip, #0 + beq .L2962 +.L2963: + cmp fp, r6 + movne r7, r6 +.L2962: + add r3, r3, #36 + b .L2960 +.L2961: + ldrh r1, [r10] + movw r2, #1846 + ldr r3, .L3087+4 + strh r1, [r3, r2] @ movhi + ldrb r2, [r10, #8] @ zero_extendqisi2 + cmp r2, #0 + bne .L2954 + ldr r2, .L3087+20 + lsl r4, r4, #1 + ldrh r1, [r2, r4] + movw r2, #65535 + cmp r1, r2 + bne .L2965 + cmn r7, #1 + strne r7, [r3, #-368] + bne .L2954 + ldr r2, [sp, #12] + cmp fp, r2 + beq .L2967 +.L3080: + str r2, [r3, #-368] + b .L2954 +.L2967: + ldr r2, [r3, #-368] +.L3086: + sub r2, r2, #1 + b .L3080 +.L2965: + cmp r6, fp + beq .L2968 + cmn r6, #1 + strne r6, [r3, #-368] +.L2954: + ldr r9, [sp, #8] + mov r2, #1 + ldr r4, .L3087+4 + movw r3, #1848 + strh r2, [r4, r3] @ movhi +.L2972: + ldr r3, .L3087+8 + movw r6, #65535 + ldr r0, [r4, #-536] + mov r7, #36 + ldr r1, [sp, #20] + mov r2, #0 + ldrh lr, [r3] + ldr r3, .L3087 + str r2, [sp, #12] + ldrb r5, [r3, #152] @ zero_extendqisi2 +.L2973: + uxth r3, r2 + cmp lr, r3 + bhi .L2976 + ldr r2, [sp, #24] + ldr r1, [sp, #12] + bl FlashReadPages + mov r3, #0 +.L3083: + str r3, [sp, #16] + ldr r2, [sp, #12] + ldrh r3, [sp, #16] + cmp r2, r3 + bhi .L3002 + ldrb r3, [r10, #8] @ zero_extendqisi2 + add r9, r9, #1 + uxth r9, r9 + cmp r3, #1 + bne .L3003 + ldr r3, .L3087 + ldrb r3, [r3, #152] @ zero_extendqisi2 + cmp r3, #0 + beq .L3003 + ldr r3, .L3087+24 + ldr r2, [sp] + ldrh r3, [r3] + cmp r3, r9 + cmpeq r2, r9 + beq .L2979 +.L3003: + ldr r3, .L3087+28 + ldrh r3, [r3] + cmp r3, r9 + bne .L2972 + ldr r1, .L3087 + movw r2, #2324 + movw r0, #65535 + mov r3, #0 + strh r9, [r10, #2] @ movhi + ldrh r2, [r1, r2] + strh r3, [r10, #4] @ movhi +.L3004: + uxth r1, r3 + cmp r1, r2 + bcs .L3073 + ldr r1, [sp, #20] + ldrh ip, [r1], #2 + cmp ip, r0 + str r1, [sp, #20] + add r1, r3, #1 + bne .L3084 + mov r3, r1 + b .L3004 +.L2968: + ldr r2, [r3, #-368] + cmp fp, r2 + bne .L3086 + b .L2954 +.L2970: + mvn r2, #0 + b .L3080 +.L2976: + ldrh r3, [r1], #2 + cmp r3, r6 + beq .L2974 + ldr ip, [sp, #12] + orr r3, r9, r3, lsl #10 + mla ip, r7, ip, r0 + str r3, [ip, #4] + ldrb r8, [r10, #8] @ zero_extendqisi2 + cmp r8, #1 + bne .L2975 + cmp r5, #0 + orrne r3, r3, #-2147483648 + strne r3, [ip, #4] +.L2975: + ldr r3, [sp, #12] + add r3, r3, #1 + uxth r3, r3 + str r3, [sp, #12] +.L2974: + add r2, r2, #1 + b .L2973 +.L3002: + ldr r3, [sp, #16] + mov r6, #36 + ldr r8, [r4, #-536] + mul r6, r6, r3 + add r7, r8, r6 + ldr r5, [r7, #4] + ubfx r0, r5, #10, #16 + str r5, [sp, #44] + bl P2V_plane + ldr r3, [sp, #8] + cmp r9, r3 + bcc .L2978 + ldr r2, [sp, #28] + moveq r3, #1 + movne r3, #0 + cmp r2, r0 + movls r3, #0 + andhi r3, r3, #1 + cmp r3, #0 + bne .L2978 + ldr r3, [sp] + ldr r2, [sp, #4] + cmp r9, r3 + cmpeq r2, r0 + beq .L2979 + ldr r3, [r8, r6] + cmn r3, #1 + beq .L2980 + ldr r3, [r7, #12] + movw r2, #61589 + ldrh r1, [r3] + cmp r1, r2 + ldrhne r0, [r10] + bne .L3081 + ldr fp, [r3, #4] + cmn fp, #1 + beq .L2982 + ldr r1, [r4, #-3328] + mov r0, fp + bl ftl_cmp_data_ver + cmp r0, #0 + addne r2, fp, #1 + strne r2, [r4, #-3328] +.L2982: + ldr r5, [r3, #8] + add r1, sp, #40 + ldr r3, [r3, #12] + mov r2, #0 + mov r0, r5 + str r3, [sp, #36] + bl log2phys + ldr r1, [r4, #-368] + cmn r1, #1 + beq .L2983 + mov r0, fp + bl ftl_cmp_data_ver + cmp r0, #0 + beq .L2983 + ldr r3, [sp, #36] + cmn r3, #1 + beq .L2984 + ldr r0, [r4, #-536] + mov r2, #0 + mov r1, #1 + add r0, r0, r6 + str r3, [r0, #4] + ldr r7, [r0, #12] + bl FlashReadPages + ldr r2, [r4, #-536] + ldr r1, [r2, r6] + add r3, r2, r6 + cmn r1, #1 + bne .L2985 +.L2986: + mvn r3, #0 + str r3, [sp, #36] +.L2993: + ldr r8, [sp, #36] + cmn r8, #1 + beq .L2978 +.L3007: + ubfx r0, r8, #10, #16 + bl P2V_block_in_plane + ldr r2, [r4, #-3540] + lsl r3, r0, #1 + mov r1, r0 + ldrh r3, [r2, r3] + cmp r3, #0 + beq .L2999 +.L3081: + bl decrement_vpc_count + b .L2978 +.L2984: + ldr r3, [sp, #44] + ldr r2, [sp, #40] + cmp r2, r3 + bne .L2978 + mov r2, #1 + add r1, sp, #36 + mov r0, r5 + bl log2phys +.L2978: + ldr r3, [sp, #16] + add r3, r3, #1 + b .L3083 +.L2985: + ldr r1, [r7, #8] + cmp r5, r1 + bne .L2986 + ldr r8, [r7, #4] + ldr r0, [r4, #-368] + mov r1, r8 + bl ftl_cmp_data_ver + cmp r0, #0 + beq .L2986 + ldr r1, [sp, #40] + ldr r0, [sp, #44] + cmp r1, r0 + bne .L2988 +.L2991: + ldr r1, [sp, #36] + mov r0, r5 + bl FtlReUsePrevPpa + b .L2986 +.L2988: + ldr r0, [sp, #36] + cmp r1, r0 + beq .L2986 + cmn r1, #1 + streq r1, [r2, r6] + beq .L2990 + str r1, [r3, #4] + mov r2, #0 + mov r1, #1 + mov r0, r3 + ldr r7, [r3, #12] + bl FlashReadPages +.L2990: + ldr r3, [r4, #-536] + ldr r3, [r3, r6] + cmn r3, #1 + beq .L2991 + ldr r3, [r7, #4] + ldr r0, [r4, #-368] + mov r1, r3 + bl ftl_cmp_data_ver + cmp r0, #0 + beq .L2991 + mov r1, r3 + mov r0, r8 + bl ftl_cmp_data_ver + cmp r0, #0 + beq .L2986 + b .L2991 +.L2983: + ldr r3, [sp, #44] + ldr r2, [sp, #40] + cmp r2, r3 + beq .L2993 + ldr r3, [sp, #36] + cmn r3, #1 + beq .L2995 + ldr r2, .L3087 + ubfx r3, r3, #10, #21 + ldr r2, [r2, #2340] + cmp r3, r2 + bcs .L2978 +.L2995: + mov r2, #1 + add r1, sp, #44 + mov r0, r5 + bl log2phys + ldr r8, [sp, #40] + cmn r8, #1 + beq .L2993 + ldr r3, [sp, #36] + cmp r8, r3 + beq .L3007 + ldr r6, .L3087+32 + ubfx r0, r8, #10, #16 + bl P2V_block_in_plane + ldrh r3, [r6] + cmp r3, r0 + beq .L2998 + add r2, r6, #48 + ldrh r2, [r2] + cmp r2, r0 + beq .L2998 + add r3, r6, #96 + ldrh r3, [r3] + cmp r3, r0 + bne .L2993 +.L2998: + ldr r0, [r6, #2984] + mov r2, #0 + mov r1, #1 + str r8, [r0, #4] + ldr r7, [r0, #12] + bl FlashReadPages + ldr r3, [r6, #2984] + ldr r3, [r3] + cmn r3, #1 + beq .L2993 + ldr r1, [r7, #4] + mov r0, fp + bl ftl_cmp_data_ver + cmp r0, #0 + bne .L2993 + mov r2, #1 + add r1, sp, #40 + mov r0, r5 + bl log2phys + b .L2993 +.L2999: + ldr r0, .L3087+36 + bl printk + b .L2978 +.L2980: + ldrh r3, [r10] + mov r1, r5 + ldr r2, .L3087+16 + ldr r0, .L3087+40 + strh r3, [r2] @ movhi + mov r2, fp + bl printk + ldr r3, [r4, #1852] + cmp r3, #31 + ldrls r1, [sp, #44] + addls r2, r4, r3, lsl #2 + addls r3, r3, #1 + strls r3, [r4, #1852] + strls r1, [r2, #1856] + ldrh r0, [r10] + bl decrement_vpc_count + ldr r3, [r4, #-368] + cmn r3, #1 + bne .L3001 +.L3082: + str fp, [r4, #-368] + b .L2978 +.L3001: + cmp fp, r3 + bcs .L2978 + b .L3082 +.L2979: + ldrb r3, [sp, #4] @ zero_extendqisi2 + ldm sp, {r1, r2} + strb r3, [r10, #6] + ldrh r3, [sp] + strh r3, [r10, #2] @ movhi +.L3085: + mov r0, r10 + bl ftl_sb_update_avl_pages + b .L3073 +.L3075: + mov r0, #0 + bx lr +.L3088: + .align 2 +.L3087: + .word .LANCHOR0 + .word .LANCHOR2 + .word .LANCHOR0+2324 + .word .LC149 + .word .LANCHOR2+1846 + .word .LANCHOR2-2620 + .word .LANCHOR0+2392 + .word .LANCHOR0+2390 + .word .LANCHOR2-3520 + .word .LC150 + .word .LC151 + .fnend + .size FtlRecoverySuperblock, .-FtlRecoverySuperblock + .align 2 + .global FtlVpcCheckAndModify + .syntax unified + .arm + .fpu softvfp + .type FtlVpcCheckAndModify, %function +FtlVpcCheckAndModify: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + .pad #8 + mov r5, #0 + ldr r6, .L3104 + ldr r1, .L3104+4 + ldr r0, .L3104+8 + bl printk + movw r3, #2334 + ldr r4, .L3104+12 + ldrh r2, [r6, r3] + mov r1, #0 + ldr r0, [r4, #-476] + lsl r2, r2, #1 + bl ftl_memset +.L3090: + ldr r3, [r6, #2452] + cmp r5, r3 + bcc .L3092 + ldr r8, .L3104+16 + mov r7, #0 + ldr r9, .L3104+20 + add r10, r8, #96 +.L3093: + ldrh r3, [r9] + uxth r6, r7 + cmp r3, r6 + bhi .L3096 + bl l2p_flush + bl FtlVpcTblFlush + add sp, sp, #8 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L3092: + mov r2, #0 + add r1, sp, #4 + mov r0, r5 + bl log2phys + ldr r0, [sp, #4] + cmn r0, #1 + beq .L3091 + ubfx r0, r0, #10, #16 + bl P2V_block_in_plane + ldr r2, [r4, #-476] + lsl r0, r0, #1 + ldrh r3, [r2, r0] + add r3, r3, #1 + strh r3, [r2, r0] @ movhi +.L3091: + add r5, r5, #1 + b .L3090 +.L3096: + uxth r1, r7 + ldr r3, [r4, #-3540] + movw r0, #65535 + lsl r5, r1, #1 + ldrh r2, [r3, r5] + ldr r3, [r4, #-476] + ldrh r3, [r3, r5] + cmp r2, r0 + cmpne r2, r3 + beq .L3094 + ldrh r0, [r8] + cmp r0, r6 + beq .L3094 + ldrh r0, [r10] + cmp r0, r6 + beq .L3094 + ldr r0, .L3104+24 + ldrh r0, [r0] + cmp r0, r6 + beq .L3094 + ldr r0, .L3104+28 + bl printk + ldr r3, [r4, #-3540] + ldrh r2, [r3, r5] + cmp r2, #0 + ldr r2, [r4, #-476] + ldrh r2, [r2, r5] + strh r2, [r3, r5] @ movhi + bne .L3095 +.L3094: + add r7, r7, #1 + b .L3093 +.L3095: + mov r0, r6 + bl update_vpc_list + b .L3094 +.L3105: + .align 2 +.L3104: + .word .LANCHOR0 + .word .LANCHOR3+203 + .word .LC110 + .word .LANCHOR2 + .word .LANCHOR2-3520 + .word .LANCHOR0+2332 + .word .LANCHOR2-3472 + .word .LC152 + .fnend + .size FtlVpcCheckAndModify, .-FtlVpcCheckAndModify + .align 2 + .global FtlGcScanTempBlk + .syntax unified + .arm + .fpu softvfp + .type FtlGcScanTempBlk, %function +FtlGcScanTempBlk: + .fnstart + @ args = 0, pretend = 0, frame = 64 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r2, .L3154 + movw r3, #3444 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #68 + sub sp, sp, #68 + mov r4, r0 + str r1, [sp, #12] + ldrh r6, [r2, r3] + movw r3, #65535 + cmp r6, r3 + beq .L3138 + cmp r6, #0 + bne .L3107 +.L3108: + bl FtlGcPageVarInit + b .L3109 +.L3138: + mov r6, #0 +.L3107: + ldr r2, .L3154+4 + movw r3, #2390 + ldrh r3, [r2, r3] + ldr r2, [sp, #12] + cmp r3, r2 + beq .L3108 +.L3109: + ldr r5, .L3154+8 + mvn r3, #0 + str r3, [sp, #8] + mov r3, #0 + str r3, [sp] +.L3110: + ldrh r1, [r4] + movw r3, #65535 + mov r2, #0 + strb r2, [r4, #8] + cmp r1, r3 + beq .L3111 +.L3135: + ldr r3, .L3154+12 + add ip, r4, #16 + ldr r0, [r5, #-536] + movw r9, #65535 + ldr lr, [r5, #-2692] + mov r10, #36 + ldrh r3, [r3] + str r3, [sp, #4] + ldr r3, [r5, #-2696] + str r3, [sp, #16] + ldr r3, .L3154+16 + ldrh r2, [r3] + ldrh r8, [r3, #2] + str r2, [sp, #20] + mov r2, #0 + mov r7, r2 +.L3112: + ldr r1, [sp, #4] + uxth r3, r2 + cmp r1, r3 + bhi .L3114 + ldr r10, .L3154+4 + mov fp, #0 + mov r2, #0 + mov r1, r7 + bl FlashReadPages +.L3115: + uxth r3, fp + cmp r7, r3 + bhi .L3133 + ldr r3, [sp] + add r6, r6, #1 + uxth r6, r6 + add r3, r3, #1 + str r3, [sp] + ldr r2, [sp] + ldr r3, [sp, #12] + cmp r3, r2 + ldr r2, .L3154+20 + bls .L3134 +.L3136: + ldrh r3, [r2] + cmp r3, r6 + bhi .L3135 + mov r2, #0 + b .L3111 +.L3114: + ldrh r3, [ip], #2 + cmp r3, r9 + beq .L3113 + mla r1, r10, r7, r0 + orr r3, r6, r3, lsl #10 + str r3, [r1, #4] + ldr r3, [sp, #20] + mul r3, r3, r7 + add fp, r3, #3 + cmp r3, #0 + movlt r3, fp + ldr fp, [sp, #16] + bic r3, r3, #3 + add r3, fp, r3 + str r3, [r1, #8] + mul r3, r8, r7 + add r7, r7, #1 + uxth r7, r7 + add fp, r3, #3 + cmp r3, #0 + movlt r3, fp + bic r3, r3, #3 + add r3, lr, r3 + str r3, [r1, #12] +.L3113: + add r2, r2, #1 + b .L3112 +.L3133: + mov r9, #36 + ldr r8, [r5, #-536] + mul r9, r9, fp + add r3, r8, r9 + ldr r2, [r3, #4] + str r3, [sp, #16] + ubfx r0, r2, #10, #16 + str r2, [sp, #4] + bl P2V_plane + ldr r8, [r8, r9] + mov r2, r0 + ldr r3, [sp, #16] + cmp r8, #0 + ldr r3, [r3, #12] + bne .L3116 + ldrh r0, [r3] + movw r1, #65535 + cmp r0, r1 + bne .L3117 +.L3120: + ldrb r1, [r10, #152] @ zero_extendqisi2 + cmp r1, #0 + beq .L3150 + mov r3, #1 + str r3, [r5, #-372] +.L3111: + ldr r1, .L3154 + mvn r0, #0 + movw r3, #3444 + strh r6, [r4, #2] @ movhi + strb r2, [r4, #6] + strh r0, [r1, r3] @ movhi + mov r1, r6 + mov r0, r4 + bl ftl_sb_update_avl_pages + b .L3106 +.L3117: + ldr r0, [r3, #8] + ldr r1, [r10, #2452] + cmp r0, r1 + bhi .L3120 + ldrb r2, [r10, #36] @ zero_extendqisi2 + cmp r2, #0 + bne .L3123 +.L3124: + ldr r2, [r3, #8] + add fp, fp, #1 + ldr r1, [sp, #4] + ldr r0, [r3, #12] + bl FtlGcUpdatePage + b .L3115 +.L3150: + ldrh r3, [r4] + ldr r2, [r5, #-3540] + lsl r3, r3, #1 + strh r1, [r2, r3] @ movhi + ldrh r0, [r4] + bl INSERT_FREE_LIST + ldr r2, .L3154+24 + mvn r3, #0 + strh r3, [r4] @ movhi + strh r3, [r2] @ movhi +.L3153: + bl FtlGcPageVarInit + mov r6, #0 + b .L3110 +.L3123: + mov r2, r8 + add r1, sp, #24 + str r3, [sp, #16] + bl log2phys + ldr r3, [sp, #16] + ldr r1, [sp, #24] + ldr r2, [r3, #12] + cmn r1, #1 + sub r0, r2, r1 + clz r0, r0 + lsr r0, r0, #5 + moveq r0, #0 + cmp r0, #0 + beq .L3124 + str r2, [sp, #32] + mov r1, #1 + ldr r2, [r5, #-504] + add r0, sp, #28 + str r2, [sp, #36] + ldr r2, [r5, #-496] + str r2, [sp, #40] + mov r2, r8 + bl FlashReadPages + ldr r2, .L3154+28 + ldr r1, [r5, #-536] + ldr r3, [sp, #16] + ldrh r2, [r2] + add r9, r1, r9 + ldr r1, [sp, #36] + lsl r2, r2, #7 +.L3125: + cmp r8, r2 + beq .L3124 + ldr r0, [r9, #8] + ldr ip, [r0, r8, lsl #2] + ldr r0, [r1, r8, lsl #2] + cmp ip, r0 + beq .L3126 + ldr r2, [sp, #32] + ldrh r1, [r4] + ldr r0, .L3154+32 + bl printk + ldrh r3, [r4] + mov r1, #0 + ldr r2, [r5, #-3540] + lsl r3, r3, #1 + strh r1, [r2, r3] @ movhi + ldrh r0, [r4] + bl INSERT_FREE_LIST + ldr r2, .L3154+36 + mvn r3, #0 + strh r3, [r4] @ movhi + strh r3, [r2, #-4] @ movhi + b .L3153 +.L3126: + add r8, r8, #1 + b .L3125 +.L3116: + ldr r2, [sp, #4] + ldrh r1, [r4] + ldr r0, .L3154+40 + bl printk + ldr r3, [r10, #2248] + cmp r3, #0 + ldrh r3, [r4] + bne .L3129 + ldrb r2, [r10, #152] @ zero_extendqisi2 + cmp r2, #0 + beq .L3130 +.L3129: + ldr r1, [r5, #-3604] + lsl r2, r3, #1 + ldrh r2, [r1, r2] + cmp r2, #159 + bls .L3131 +.L3130: + ldr r2, [r5, #-536] + ldr r2, [r2, r9] + cmn r2, #1 + bne .L3132 +.L3131: + ldr r2, [r5, #-536] + add r9, r2, r9 + ldr r2, [r9, #4] + str r2, [sp, #8] +.L3132: + ldr r2, [r5, #-3540] + lsl r3, r3, #1 + mov r1, #0 + strh r1, [r2, r3] @ movhi + ldrh r0, [r4] + bl INSERT_FREE_LIST + mvn r3, #0 + strh r3, [r4] @ movhi + b .L3153 +.L3134: + ldr r1, .L3154+44 + movw r0, #65535 + ldrh r3, [r1] + cmp r3, r0 + beq .L3136 + ldr r0, [sp] + add r3, r3, r0 + strh r3, [r1] @ movhi + ldrh r3, [r2] + cmp r3, r6 + bls .L3136 +.L3106: + ldr r0, [sp, #8] + add sp, sp, #68 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L3155: + .align 2 +.L3154: + .word .LANCHOR1 + .word .LANCHOR0 + .word .LANCHOR2 + .word .LANCHOR0+2324 + .word .LANCHOR0+2400 + .word .LANCHOR0+2390 + .word .LANCHOR2-3284 + .word .LANCHOR0+2396 + .word .LC153 + .word .LANCHOR2-3280 + .word .LC154 + .word .LANCHOR1+3444 + .fnend + .size FtlGcScanTempBlk, .-FtlGcScanTempBlk + .align 2 + .global FtlReadRefresh + .syntax unified + .arm + .fpu softvfp + .type FtlReadRefresh, %function +FtlReadRefresh: + .fnstart + @ args = 0, pretend = 0, frame = 40 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + .pad #40 + sub sp, sp, #40 + ldr r5, .L3173 + ldr r9, [r5, #-3156] + mov r6, r5 + cmp r9, #0 + beq .L3157 + ldr r3, .L3173+4 + ldr r1, [r5, #-3152] + ldr r2, [r3, #2452] + mov r4, r3 + cmp r1, r2 + bcs .L3158 + mov r5, #2048 +.L3163: + ldr r0, [r6, #-3152] + ldr r3, [r4, #2452] + cmp r0, r3 + bcc .L3159 +.L3162: + mvn r0, #0 +.L3156: + add sp, sp, #40 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L3159: + mov r2, #0 + mov r1, sp + bl log2phys + ldr r2, [sp] + ldr r3, [r6, #-3152] + cmn r2, #1 + add r3, r3, #1 + str r3, [r6, #-3152] + beq .L3161 + str r2, [sp, #8] + add r0, sp, #40 + mov r2, #0 + mov r1, #1 + str r2, [r0, #-36]! + str r3, [sp, #20] + str r2, [sp, #12] + str r2, [sp, #16] + bl FlashReadPages + ldr r3, [sp, #4] + cmp r3, #256 + bne .L3162 + ldr r0, [sp] + ubfx r0, r0, #10, #16 + bl P2V_block_in_plane + bl FtlGcRefreshBlock + b .L3162 +.L3161: + subs r5, r5, #1 + bne .L3163 + b .L3162 +.L3158: + ldr r3, [r5, #-3364] + mov r0, #0 + str r0, [r5, #-3156] + str r0, [r5, #-3152] + str r3, [r5, #-3160] + b .L3156 +.L3157: + ldr r1, [r5, #-3312] + movw r4, #10000 + ldr r8, [r5, #-3364] + sub r10, r5, #3584 + ldr r7, [r5, #-3160] + cmp r1, r4 + add r3, r8, #1048576 + movhi r4, #31 + movls r4, #63 + cmp r7, r3 + bhi .L3167 + ldr r3, .L3173+4 + lsr r1, r1, #10 + mov r0, #1000 + add r1, r1, #1 + ldr r3, [r3, #2452] + mul r0, r0, r3 + bl __aeabi_uidiv + add r0, r0, r7 + cmp r8, r0 + bhi .L3167 + ldrh r3, [r10, #16] + ands r0, r4, r3 + movne r0, r9 + bne .L3156 + ldr r2, [r5, #-3136] + cmp r3, r2 + beq .L3156 +.L3167: + ldrh r3, [r10, #16] + mov r0, #0 + str r0, [r6, #-3152] + str r8, [r6, #-3160] + str r3, [r6, #-3136] + mov r3, #1 + str r3, [r6, #-3156] + b .L3156 +.L3174: + .align 2 +.L3173: + .word .LANCHOR2 + .word .LANCHOR0 + .fnend + .size FtlReadRefresh, .-FtlReadRefresh + .align 2 + .global FtlGcFreeTempBlock + .syntax unified + .arm + .fpu softvfp + .type FtlGcFreeTempBlock, %function +FtlGcFreeTempBlock: + .fnstart + @ args = 0, pretend = 0, frame = 16 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + movw r3, #2390 + ldr r4, .L3213 + .pad #20 + sub sp, sp, #20 + ldr r6, .L3213+4 + ldr ip, [r4, #-3612] + ldrh r1, [r6, r3] + cmp ip, #0 + beq .L3176 +.L3212: + mov r0, #0 +.L3175: + add sp, sp, #20 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L3176: + sub r5, r4, #3424 + movw lr, #65535 + ldrh r7, [r5] + cmp r7, lr + bne .L3178 +.L3187: + ldrh r2, [r5] + movw r3, #65535 + mov r7, #0 + str r7, [r4, #-372] + cmp r2, r3 + beq .L3212 + bl FtlCacheWriteBack + movw r0, #2390 + ldrb r2, [r4, #-3417] @ zero_extendqisi2 + ldrh r0, [r6, r0] + mov fp, #12 + ldrh r3, [r5] + ldr r1, [r4, #-3540] + ldr r8, .L3213+8 + smulbb r2, r2, r0 + lsl r3, r3, #1 + strh r2, [r1, r3] @ movhi + ldr r2, [r4, #-3344] + ldrh r3, [r8, #-12] + add r3, r3, r2 + str r3, [r4, #-3344] +.L3188: + ldrh r2, [r8, #-12] + uxth r3, r7 + cmp r2, r3 + bhi .L3192 + movw r0, #65535 + bl decrement_vpc_count + ldrb r3, [r6, #152] @ zero_extendqisi2 + cmp r3, #0 + beq .L3193 + ldrh r1, [r5] + ldr r0, .L3213+12 + bl printk +.L3193: + ldrh r0, [r5] + ldr r2, [r4, #-3540] + lsl r3, r0, #1 + ldrh r3, [r2, r3] + cmp r3, #0 + beq .L3194 + bl INSERT_DATA_LIST +.L3195: + ldr r7, .L3213+16 + mvn r9, #0 + strh r9, [r5] @ movhi + mov r5, #0 + strh r5, [r8, #-12] @ movhi + strh r5, [r7, #-4] @ movhi + bl l2p_flush + bl FtlVpcTblFlush + sub r3, r7, #608 + sub r2, r7, #848 + strh r9, [r3, #-4] @ movhi + ldr r3, [r6, #2248] + ldrh r2, [r2, #-4] + cmp r3, r5 + sub r3, r7, #624 + ldrh r3, [r3, #-8] + beq .L3196 + ldr r1, [r4, #-3308] + cmp r1, #39 + bhi .L3196 + cmp r2, r3 + lslcc r3, r3, #1 + strhcc r3, [r7, #-48] @ movhi + b .L3212 +.L3178: + cmp r0, #0 + beq .L3181 + ldr r2, .L3213+20 + movw r3, #3444 + ldrh r0, [r2, r3] + cmp r0, lr + beq .L3182 +.L3183: + mov r1, #2 +.L3181: + ldr r0, .L3213+24 + bl FtlGcScanTempBlk + cmn r0, #1 + str r0, [sp, #12] + beq .L3184 + ldr r2, [r4, #-3604] + lsl r7, r7, #1 + ldrh r3, [r2, r7] + cmp r3, #4 + bls .L3185 + sub r3, r3, #5 + mov r0, #1 + strh r3, [r2, r7] @ movhi + bl FtlEctTblFlush +.L3185: + ldr r3, [r4, #-372] + cmp r3, #0 + bne .L3186 + ldr r3, [r4, #-3140] + ldr r0, [sp, #12] + add r3, r3, #1 + ubfx r0, r0, #10, #16 + str r3, [r4, #-3140] + bl FtlBbmMapBadBlock + bl FtlBbmTblFlush +.L3186: + mov r3, #0 + str r3, [r4, #-372] +.L3198: + mov r0, #1 + b .L3175 +.L3182: + strh ip, [r2, r3] @ movhi + sub r3, r4, #3520 + ldrh r3, [r3, #-4] + cmp r3, #17 + bhi .L3183 + b .L3181 +.L3184: + ldr r2, .L3213+20 + movw r3, #3444 + ldrh r2, [r2, r3] + movw r3, #65535 + cmp r2, r3 + bne .L3198 + b .L3187 +.L3192: + uxth r10, r7 + ldr r3, [r4, #-2672] + ldr r2, [r6, #2452] + mul r10, fp, r10 + add r9, r3, r10 + ldr r0, [r9, #8] + cmp r0, r2 + bcc .L3189 +.L3210: + ldrh r0, [r5] + b .L3211 +.L3189: + mov r2, #0 + add r1, sp, #12 + str r3, [sp, #4] + bl log2phys + ldr r3, [sp, #4] + ldr r2, [sp, #12] + ldr r0, [r3, r10] + cmp r0, r2 + bne .L3191 + ubfx r0, r0, #10, #16 + bl P2V_block_in_plane + mov r2, #1 + mov r10, r0 + add r1, r9, #4 + ldr r0, [r9, #8] + bl log2phys + mov r0, r10 +.L3211: + bl decrement_vpc_count + b .L3190 +.L3191: + ldr r3, [r9, #4] + cmp r2, r3 + bne .L3210 +.L3190: + add r7, r7, #1 + b .L3188 +.L3194: + bl INSERT_FREE_LIST + b .L3195 +.L3196: + add r1, r3, r3, lsl #1 + cmp r2, r1, asr #2 + ble .L3212 + ldrb r0, [r6, #152] @ zero_extendqisi2 + ldr r2, .L3213+28 + cmp r0, #0 + moveq r3, #20 + strheq r3, [r2] @ movhi + beq .L3175 + sub r3, r3, #2 + strh r3, [r2] @ movhi + b .L3212 +.L3214: + .align 2 +.L3213: + .word .LANCHOR2 + .word .LANCHOR0 + .word .LANCHOR2-2656 + .word .LC155 + .word .LANCHOR2-2672 + .word .LANCHOR1 + .word .LANCHOR2-3424 + .word .LANCHOR2-2720 + .fnend + .size FtlGcFreeTempBlock, .-FtlGcFreeTempBlock + .align 2 + .global FtlGcPageRecovery + .syntax unified + .arm + .fpu softvfp + .type FtlGcPageRecovery, %function +FtlGcPageRecovery: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + movw r5, #2390 + ldr r4, .L3218 + ldr r6, .L3218+4 + sub r7, r4, #3424 + mov r0, r7 + ldrh r1, [r6, r5] + bl FtlGcScanTempBlk + ldrh r2, [r7, #2] + ldrh r3, [r6, r5] + cmp r2, r3 + popcc {r4, r5, r6, r7, r8, pc} + sub r0, r4, #432 + bl FtlMapBlkWriteDumpData + mov r0, #0 + bl FtlGcFreeTempBlock + mov r3, #0 + str r3, [r4, #-372] + pop {r4, r5, r6, r7, r8, pc} +.L3219: + .align 2 +.L3218: + .word .LANCHOR2 + .word .LANCHOR0 + .fnend + .size FtlGcPageRecovery, .-FtlGcPageRecovery + .align 2 + .global FtlPowerLostRecovery + .syntax unified + .arm + .fpu softvfp + .type FtlPowerLostRecovery, %function +FtlPowerLostRecovery: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + mov r5, #0 + ldr r4, .L3222 + sub r6, r4, #3520 + str r5, [r4, #1852] + mov r0, r6 + sub r4, r4, #3472 + bl FtlRecoverySuperblock + mov r0, r6 + bl FtlSlcSuperblockCheck + mov r0, r4 + bl FtlRecoverySuperblock + mov r0, r4 + bl FtlSlcSuperblockCheck + bl FtlGcPageRecovery + movw r0, #65535 + bl decrement_vpc_count + mov r0, r5 + pop {r4, r5, r6, pc} +.L3223: + .align 2 +.L3222: + .word .LANCHOR2 + .fnend + .size FtlPowerLostRecovery, .-FtlPowerLostRecovery + .align 2 + .global FtlSysBlkInit + .syntax unified + .arm + .fpu softvfp + .type FtlSysBlkInit, %function +FtlSysBlkInit: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + mov r2, #0 + ldr r5, .L3242 + movw r3, #1848 + ldr r6, .L3242+4 + strh r2, [r5, r3] @ movhi + mvn r2, #0 + movw r3, #1846 + strh r2, [r5, r3] @ movhi + add r3, r6, #2320 + add r3, r3, #8 + ldrh r0, [r3] + bl FtlFreeSysBlkQueueInit + bl FtlScanSysBlk + sub r3, r5, #3296 + ldrh r2, [r3, #-4] + movw r3, #65535 + cmp r2, r3 + bne .L3225 +.L3227: + mvn r7, #0 +.L3224: + mov r0, r7 + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L3225: + bl FtlLoadSysInfo + subs r7, r0, #0 + bne .L3227 + bl FtlLoadMapInfo + bl FtlLoadVonderInfo + bl Ftl_load_ext_data + bl FtlLoadEctTbl + bl FtlFreeSysBLkSort + bl SupperBlkListInit + bl FtlPowerLostRecovery + mov r0, #1 + bl FtlUpdateVaildLpn + ldr r2, [r5, #-3376] + movw r3, #2430 + ldrh r1, [r6, r3] + mov r0, #12 + mov r3, r7 +.L3228: + cmp r3, r1 + bge .L3233 + mla ip, r0, r3, r2 + ldr ip, [ip, #4] + cmp ip, #0 + bge .L3229 +.L3233: + ldr r4, .L3242+8 + cmp r3, r1 + ldrh r2, [r4, #28] + add r8, r4, #12 + add r4, r4, #76 + add r2, r2, #1 + strh r2, [r4, #-48] @ movhi + bge .L3240 +.L3230: + ldrh r3, [r4] + movw ip, #2390 + ldr r1, [r5, #-3540] + ldrh r0, [r4, #4] + lsl r3, r3, #1 + ldrh r2, [r1, r3] + sub r2, r2, r0 + strh r2, [r1, r3] @ movhi + mov r2, #0 + ldrh r3, [r6, ip] + ldr lr, [r5, #-3540] + strb r2, [r5, #-3514] + strh r3, [r4, #2] @ movhi + ldr r3, .L3242+12 + strh r2, [r4, #4] @ movhi + ldrh r1, [r3] + ldrh r9, [r3, #4] + lsl r1, r1, #1 + ldrh r0, [lr, r1] + sub r0, r0, r9 + strh r0, [lr, r1] @ movhi + ldrh r1, [r6, ip] + strh r2, [r3, #4] @ movhi + strb r2, [r5, #-3466] + strh r1, [r3, #2] @ movhi + ldrh r3, [r8, #18] + add r3, r3, #1 + strh r3, [r8, #18] @ movhi + bl l2p_flush + bl FtlVpcTblFlush + bl FtlVpcTblFlush + b .L3234 +.L3229: + add r3, r3, #1 + b .L3228 +.L3240: + movw r3, #1848 + ldrh r3, [r5, r3] + cmp r3, #0 + bne .L3230 +.L3234: + ldrh r0, [r4] + movw r3, #65535 + cmp r0, r3 + beq .L3235 + ldrh r3, [r4, #4] + cmp r3, #0 + bne .L3235 + ldr r4, .L3242+12 + ldrh r3, [r4, #4] + cmp r3, #0 + bne .L3235 + bl FtlGcRefreshOpenBlock + ldrh r0, [r4] + bl FtlGcRefreshOpenBlock + bl FtlVpcTblFlush + sub r0, r4, #48 + bl allocate_new_data_superblock + mov r0, r4 + bl allocate_new_data_superblock +.L3235: + ldrb r3, [r6, #36] @ zero_extendqisi2 + cmp r3, #0 + bne .L3236 + ldrh r3, [r8, #16] + tst r3, #31 + bne .L3224 +.L3236: + bl FtlVpcCheckAndModify + b .L3224 +.L3243: + .align 2 +.L3242: + .word .LANCHOR2 + .word .LANCHOR0 + .word .LANCHOR2-3596 + .word .LANCHOR2-3472 + .fnend + .size FtlSysBlkInit, .-FtlSysBlkInit + .align 2 + .global FtlLowFormat + .syntax unified + .arm + .fpu softvfp + .type FtlLowFormat, %function +FtlLowFormat: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #12 + ldr r4, .L3276 + ldr r6, [r4, #-3612] + cmp r6, #0 + bne .L3246 + ldr r5, .L3276+4 + movw r7, #2428 + mov r1, r6 + ldr r0, [r4, #-448] + ldrh r2, [r5, r7] + lsl r2, r2, #2 + bl ftl_memset + ldrh r2, [r5, r7] + mov r1, r6 + ldr r0, [r4, #-452] + lsl r2, r2, #2 + bl ftl_memset + add r3, r5, #2320 + str r6, [r4, #-3332] + add r3, r3, #8 + ldrh r0, [r3] + str r6, [r4, #-3328] + bl FtlFreeSysBlkQueueInit + bl FtlLoadBbt + cmp r0, #0 + beq .L3247 + bl FtlMakeBbt +.L3247: + ldr r0, .L3276+8 + mov r2, #0 + ldr ip, .L3276+12 +.L3248: + ldrh r1, [r0] + uxth r3, r2 + add r2, r2, #1 + cmp r3, r1, lsl #7 + blt .L3249 + movw r3, #2332 + ldr r9, .L3276+16 + ldrh r7, [r5, r3] + mov r6, #0 + mov r8, r9 +.L3250: + ldrh r3, [r9] + cmp r3, r7 + bhi .L3251 + movw r3, #2324 + ldrh r1, [r5, r3] + sub r3, r6, #3 + cmp r3, r1, lsl #1 + blt .L3252 + mov r0, r6 + mov r6, #0 + bl __aeabi_uidiv + ldr r3, [r5, #2424] + add r0, r0, r3 + uxth r0, r0 + bl FtlSysBlkNumInit + add r3, r5, #2320 + add r3, r3, #8 + ldrh r0, [r3] + bl FtlFreeSysBlkQueueInit + movw r3, #2332 + ldrh r7, [r5, r3] +.L3253: + ldrh r3, [r8] + cmp r3, r7 + bhi .L3254 +.L3252: + ldr r8, .L3276+20 + mov r7, #0 + mov r9, r7 +.L3255: + ldrh r3, [r8] + uxth r0, r7 + add r7, r7, #1 + cmp r3, r0 + bhi .L3256 + movw r3, #2334 + ldr r2, [r5, #2336] + ldrh r3, [r5, r3] + ldr r8, .L3276+24 + mov r0, r2 + str r2, [sp, #4] + str r3, [r4, #-548] + movw r3, #2324 + ldrh r7, [r5, r3] + mov r1, r7 + bl __aeabi_uidiv + ubfx r10, r0, #5, #16 + mov fp, r0 + add r3, r10, #36 + str r0, [r5, #2452] + strh r3, [r8, #-8] @ movhi + mov r3, #24 + mul r3, r3, r7 + cmp r9, r3 + ble .L3257 + ldr r2, [sp, #4] + mov r1, r7 + sub r0, r2, r9 + bl __aeabi_uidiv + str r0, [r5, #2452] + lsr r0, r0, #5 + add r0, r0, #24 + strh r0, [r8, #-8] @ movhi +.L3257: + ldr r3, [r5, #2248] + cmp r3, #1 + bne .L3258 + ldrh r3, [r8, #-8] + mov r1, r7 + mov r0, r9 + str r3, [sp, #4] + bl __aeabi_uidiv + ldr r3, [sp, #4] + uxtah r0, r3, r0 + add r3, r3, r0, asr #2 + strh r3, [r8, #-8] @ movhi +.L3258: + ldrb r3, [r5, #152] @ zero_extendqisi2 + cmp r3, #0 + beq .L3259 + ldrh r3, [r8, #-8] + mov r1, r7 + mov r0, r9 + str r3, [sp, #4] + bl __aeabi_uidiv + ldr r3, [sp, #4] + uxtah r0, r3, r0 + add r3, r3, r0, asr #2 + strh r3, [r8, #-8] @ movhi +.L3259: + ldr r3, .L3276+28 + ldrh r3, [r3] + cmp r3, #0 + beq .L3261 + ldrh r2, [r8, #-8] + add r2, r2, r3, lsr #1 + strh r2, [r8, #-8] @ movhi + mul r2, r7, r3 + cmp r9, r2 + addlt r3, r3, #32 + strlt fp, [r5, #2452] + addlt r3, r10, r3 + strhlt r3, [r8, #-8] @ movhi +.L3261: + ldrh r2, [r8, #-8] + ldr r3, [r5, #2452] + sub r3, r3, r2 + mul r7, r7, r3 + movw r3, #2390 + ldrh r3, [r5, r3] + str r7, [r4, #1796] + mul r7, r7, r3 + movw r3, #2396 + ldrh r3, [r5, r3] + str r7, [r5, #2452] + mul r7, r7, r3 + str r7, [r5, #2432] + bl FtlBbmTblFlush + movw r3, #2404 + ldr r2, [r5, #2340] + ldrh r3, [r5, r3] + add r1, r6, r9 + add r3, r3, r2, lsr #3 + cmp r1, r3 + bls .L3263 + lsr r2, r2, #5 + ldr r0, .L3276+32 + bl printk +.L3263: + movw r3, #2334 + ldr r6, .L3276+36 + ldrh r2, [r5, r3] + mov r1, #0 + ldr r0, [r4, #-3540] + mvn r7, #0 + sub r6, r6, #240 + lsl r2, r2, #1 + bl ftl_memset + mov r3, #0 + strh r7, [r6, #236] @ movhi + strh r3, [r6, #238] @ movhi + mov r1, #255 + str r3, [r4, #-3368] + strb r3, [r4, #-3278] + strb r3, [r4, #-3276] + strh r3, [r6, #2] @ movhi + strb r3, [r4, #-3514] + strh r3, [r6] @ movhi + mov r3, #1 + strb r3, [r4, #-3512] + movw r3, #2332 + ldrh r2, [r5, r3] + ldr r0, [r5, #32] + mov r5, r6 + lsr r2, r2, #3 + bl ftl_memset +.L3264: + mov r0, r6 + bl make_superblock + ldrb r3, [r4, #-3513] @ zero_extendqisi2 + cmp r3, #0 + ldrh r3, [r5] + bne .L3265 + ldr r2, [r4, #-3540] + lsl r3, r3, #1 + strh r7, [r2, r3] @ movhi + ldrh r3, [r5] + add r3, r3, #1 + strh r3, [r5] @ movhi + b .L3264 +.L3249: + ldr lr, [r4, #-508] + mvn r1, r3 + orr r1, r3, r1, lsl #16 + str r1, [lr, r3, lsl #2] + ldr r1, [r4, #-504] + str ip, [r1, r3, lsl #2] + b .L3248 +.L3251: + mov r0, r7 + mov r1, #1 + bl FtlLowFormatEraseBlock + add r7, r7, #1 + add r6, r6, r0 + uxth r6, r6 + uxth r7, r7 + b .L3250 +.L3254: + mov r0, r7 + mov r1, #1 + bl FtlLowFormatEraseBlock + add r7, r7, #1 + add r6, r6, r0 + uxth r6, r6 + uxth r7, r7 + b .L3253 +.L3256: + mov r1, #0 + bl FtlLowFormatEraseBlock + add r9, r9, r0 + uxth r9, r9 + b .L3255 +.L3265: + ldr r2, [r4, #-3332] + lsl r3, r3, #1 + ldrh r1, [r5, #4] + mvn r6, #0 + str r2, [r4, #-3508] + add r2, r2, #1 + str r2, [r4, #-3332] + ldr r2, [r4, #-3540] + strh r1, [r2, r3] @ movhi + mov r2, #0 + ldr r3, .L3276+40 + strb r2, [r4, #-3466] + strh r2, [r3, #2] @ movhi + mov r7, r3 + ldrh r2, [r5] + mov r5, r3 + add r2, r2, #1 + strh r2, [r3] @ movhi + mov r2, #1 + strb r2, [r4, #-3464] +.L3266: + mov r0, r7 + bl make_superblock + ldrb r3, [r4, #-3465] @ zero_extendqisi2 + cmp r3, #0 + ldrh r3, [r5] + bne .L3267 + ldr r2, [r4, #-3540] + lsl r3, r3, #1 + strh r6, [r2, r3] @ movhi + ldrh r3, [r5] + add r3, r3, #1 + strh r3, [r5] @ movhi + b .L3266 +.L3267: + ldr r2, [r4, #-3332] + lsl r3, r3, #1 + ldrh r1, [r5, #4] + mvn r5, #0 + str r2, [r4, #-3460] + add r2, r2, #1 + str r2, [r4, #-3332] + ldr r2, [r4, #-3540] + strh r1, [r2, r3] @ movhi + ldr r3, .L3276+44 + strh r5, [r3] @ movhi + bl FtlFreeSysBlkQueueOut + sub r3, r8, #4 + mov r2, #0 + strh r5, [r3, #4] @ movhi + ldr r3, [r4, #-3332] + strh r2, [r8, #-2] @ movhi + ldr r2, [r4, #1796] + str r3, [r4, #-3292] + add r3, r3, #1 + str r3, [r4, #-3332] + strh r2, [r8, #2] @ movhi + strh r0, [r8, #-4] @ movhi + bl FtlVpcTblFlush + bl FtlSysBlkInit + cmp r0, #0 + ldreq r3, .L3276+48 + moveq r2, #1 + streq r2, [r3, #500] +.L3246: + mov r0, #0 + add sp, sp, #12 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L3277: + .align 2 +.L3276: + .word .LANCHOR2 + .word .LANCHOR0 + .word .LANCHOR0+2396 + .word 168778952 + .word .LANCHOR0+2334 + .word .LANCHOR0+2332 + .word .LANCHOR2-3296 + .word .LANCHOR0+2384 + .word .LC156 + .word .LANCHOR2-3280 + .word .LANCHOR2-3472 + .word .LANCHOR2-3424 + .word .LANCHOR1 + .fnend + .size FtlLowFormat, .-FtlLowFormat + .align 2 + .global FtlReInitForSDUpdata + .syntax unified + .arm + .fpu softvfp + .type FtlReInitForSDUpdata, %function +FtlReInitForSDUpdata: + .fnstart + @ args = 0, pretend = 0, frame = 16 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r3, r4, r5, r6, lr} + .save {r4, r5, r6, lr} + .pad #16 + ldr r4, .L3314 + ldrb r3, [r4, #152] @ zero_extendqisi2 + cmp r3, #0 + beq .L3279 +.L3281: + mov r6, #0 +.L3278: + mov r0, r6 + add sp, sp, #16 + @ sp needed + pop {r4, r5, r6, pc} +.L3279: + ldr r5, .L3314+4 + ldr r0, [r5, #1684] + bl FlashInit + subs r6, r0, #0 + bne .L3281 + bl FlashLoadFactorBbt + cmp r0, #0 + beq .L3282 + bl FlashMakeFactorBbt +.L3282: + ldr r0, [r5, #1724] + bl FlashReadIdbDataRaw + cmp r0, #0 + beq .L3283 + mov r2, #16 + mov r1, #0 + mov r0, sp + bl FlashReadFacBbtData + ldr r1, [sp] + mov r3, #0 + mov r2, r3 + mov r0, #1 +.L3285: + ands ip, r1, r0, lsl r2 + add r2, r2, #1 + addne r3, r3, #1 + cmp r2, #16 + bne .L3285 + cmp r3, #6 + bhi .L3286 +.L3311: + strb r2, [r4, #37] + b .L3287 +.L3286: + mov r2, #0 + mov r0, #1 +.L3289: + ands ip, r1, r0, lsl r2 + add r2, r2, #1 + addne r3, r3, #1 + cmp r2, #24 + bne .L3289 + cmp r3, #17 + movhi r3, #36 + strbhi r3, [r4, #37] + bls .L3311 +.L3287: + ldrb r3, [r4, #37] @ zero_extendqisi2 + strh r3, [r4, #150] @ movhi +.L3283: + ldr r1, .L3314+8 + ldr r0, .L3314+12 + bl printk + ldr r0, .L3314+16 + bl FtlConstantsInit + bl FtlVariablesInit + ldr r0, [r4, #2328] + mov r4, #1 + uxth r0, r0 + bl FtlFreeSysBlkQueueInit +.L3291: + bl FtlLoadBbt + cmp r0, #0 + beq .L3292 +.L3313: + bl FtlLowFormat + cmp r4, #3 + mvnhi r6, #0 + bhi .L3278 +.L3293: + add r4, r4, #1 + b .L3291 +.L3292: + bl FtlSysBlkInit + cmp r0, #0 + bne .L3313 + ldr r3, .L3314+20 + mov r2, #1 + str r2, [r3, #500] + b .L3278 +.L3315: + .align 2 +.L3314: + .word .LANCHOR0 + .word .LANCHOR2 + .word .LC76 + .word .LC77 + .word .LANCHOR0+124 + .word .LANCHOR1 + .fnend + .size FtlReInitForSDUpdata, .-FtlReInitForSDUpdata + .align 2 + .global Ftl_gc_temp_data_write_back + .syntax unified + .arm + .fpu softvfp + .type Ftl_gc_temp_data_write_back, %function +Ftl_gc_temp_data_write_back: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + ldr r4, .L3332 + ldr r3, [r4, #-3612] + cmp r3, #0 + beq .L3317 +.L3320: + mov r0, #0 + pop {r4, r5, r6, pc} +.L3317: + ldr r3, .L3332+4 + ldrb r3, [r3, #152] @ zero_extendqisi2 + cmp r3, #0 + beq .L3319 + ldr r3, [r4, #-2704] + tst r3, #1 + beq .L3319 + sub r3, r4, #3424 + ldrh r3, [r3, #4] + cmp r3, #0 + bne .L3320 +.L3319: + mov r3, #0 + mov r5, #0 + mov r6, #36 + mov r2, r3 + ldr r1, [r4, #-2704] + ldr r0, [r4, #-532] + bl FlashProgPages +.L3321: + ldr r1, [r4, #-2704] + uxth r3, r5 + cmp r3, r1 + bcc .L3323 + ldr r0, [r4, #-532] + bl FtlGcBufFree + mov r3, #0 + str r3, [r4, #-2704] + ldr r3, .L3332+8 + ldrh r3, [r3, #4] + cmp r3, #0 + bne .L3320 + mov r0, #1 + bl FtlGcFreeTempBlock + b .L3331 +.L3323: + mul r3, r6, r3 + ldr r2, [r4, #-532] + add r5, r5, #1 + ldr ip, [r2, r3] + add r1, r2, r3 + ldr r0, [r1, #12] + cmn ip, #1 + bne .L3322 + ldr r1, .L3332+8 + mov lr, #0 + ldr r0, [r4, #-3540] + ldrh r2, [r1] + lsl r2, r2, #1 + strh lr, [r0, r2] @ movhi + ldr r2, [r4, #-3140] + strh ip, [r1] @ movhi + add r2, r2, #1 + str r2, [r4, #-3140] + ldr r2, [r4, #-532] + add r3, r2, r3 + ldr r0, [r3, #4] + ubfx r0, r0, #10, #16 + bl FtlBbmMapBadBlock + bl FtlBbmTblFlush + bl FtlGcPageVarInit +.L3331: + mov r0, #1 + pop {r4, r5, r6, pc} +.L3322: + ldr r2, [r0, #8] + ldr r1, [r1, #4] + ldr r0, [r0, #12] + bl FtlGcUpdatePage + b .L3321 +.L3333: + .align 2 +.L3332: + .word .LANCHOR2 + .word .LANCHOR0 + .word .LANCHOR2-3424 + .fnend + .size Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back + .align 2 + .global Ftl_get_new_temp_ppa + .syntax unified + .arm + .fpu softvfp + .type Ftl_get_new_temp_ppa, %function +Ftl_get_new_temp_ppa: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L3341 + movw r2, #65535 + ldrh r1, [r3] + cmp r1, r2 + beq .L3335 + ldrh r3, [r3, #4] + cmp r3, #0 + ldrne r0, .L3341 + bne .L3340 +.L3335: + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + mov r5, #0 + ldr r4, .L3341+4 + bl FtlCacheWriteBack + mov r0, #0 + bl FtlGcFreeTempBlock + sub r0, r4, #3424 + strb r5, [r4, #-3416] + bl allocate_data_superblock + sub r3, r4, #2672 + sub r4, r4, #2656 + strh r5, [r3, #-4] @ movhi + strh r5, [r4, #-12] @ movhi + bl l2p_flush + mov r0, r5 + bl FtlEctTblFlush + bl FtlVpcTblFlush + pop {r4, r5, r6, lr} + ldr r0, .L3341 +.L3340: + b get_new_active_ppa +.L3342: + .align 2 +.L3341: + .word .LANCHOR2-3424 + .word .LANCHOR2 + .fnend + .size Ftl_get_new_temp_ppa, .-Ftl_get_new_temp_ppa + .align 2 + .global ftl_do_gc + .syntax unified + .arm + .fpu softvfp + .type ftl_do_gc, %function +ftl_do_gc: + .fnstart + @ args = 0, pretend = 0, frame = 32 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L3507 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov lr, r0 + .pad #44 + sub sp, sp, #44 + ldr r0, [r3, #-3612] + cmp r0, #0 + bne .L3439 + ldr ip, .L3507+4 + ldr r5, [ip, #500] + cmp r5, #1 + bne .L3343 + ldr r2, [r3, #-560] + cmp r2, #0 + bne .L3343 + sub r8, r3, #3520 + ldrh r0, [r8, #-12] + cmp r0, #47 + bls .L3439 + movw r2, #3444 + mov r7, r1 + ldrh r1, [ip, r2] + movw r2, #65535 + mov r4, r3 + str lr, [sp, #16] + cmp r1, r2 + bne .L3345 +.L3348: + ldr r6, .L3507+8 + movw r2, #65535 + ldrh r0, [r6, #-8] + cmp r0, r2 + bne .L3346 +.L3347: + ldr r3, [r4, #-2716] + ldr r2, [sp, #16] + add r3, r3, #1 + cmp r2, #1 + add r3, r3, r2, lsl #7 + str r3, [r4, #-2716] + bne .L3349 + ldr r9, .L3507+12 + ldr r2, [r9, #2248] + cmp r2, #0 + bne .L3350 + ldrb r2, [r9, #152] @ zero_extendqisi2 + cmp r2, #0 + beq .L3349 +.L3350: + ldr r2, [r4, #-3308] + cmp r2, #39 + bhi .L3349 + ldr r10, .L3507+16 + movw r5, #65535 + ldrh r2, [r10] + add r3, r2, r3 + str r3, [r4, #-2716] + bl FtlGcReFreshBadBlk + ldr r3, .L3507+20 + mov r2, r10 + ldrh r3, [r3, #-4] + cmp r3, r5 + bne .L3351 + ldrh r1, [r6, #-10] + cmp r1, r3 + bne .L3438 + ldr r3, [r4, #-2716] + cmp r3, #1024 + bhi .L3353 + ldrh r3, [r8, #-4] + cmp r3, #63 + bhi .L3438 +.L3353: + ldr r6, .L3507+24 + mov r1, #0 + ldrh r0, [r8, #-4] + strh r1, [r2] @ movhi + ldrh r3, [r6, #-14] + add r3, r3, #64 + cmp r0, r3 + bgt .L3438 + ldr r3, [r4, #-3308] + str r1, [r4, #-2716] + cmp r3, r1 + moveq r3, #6 + beq .L3499 + cmp r3, #5 + bhi .L3355 + mov r3, #18 +.L3499: + strh r3, [r2] @ movhi +.L3355: + mov r0, #32 + movw r10, #65535 + bl List_get_gc_head_node + uxth r3, r0 + cmp r3, r10 + beq .L3359 + ldrh ip, [r6, #-8] + cmp ip, #0 + beq .L3357 + movw r2, #2392 + uxth r0, r0 + ldrh lr, [r9, r2] + movw r2, #2324 + ldrh r2, [r9, r2] + lsl r1, r0, #1 + ldr r3, [r4, #-3540] + str r1, [sp, #12] + mul r2, r2, lr + ldrh r0, [r3, r1] + str r3, [sp, #8] + add r2, r2, #1 + cmp r0, r2 + bgt .L3359 + add fp, ip, #1 + mov r9, #0 + uxth fp, fp + mov r0, ip + str r9, [r4, #-2708] + strh fp, [r6, #-8] @ movhi + bl List_get_gc_head_node + uxth r5, r0 + ldr r3, [sp, #8] + ldr r1, [sp, #12] + cmp r5, r10 + beq .L3359 + lsl r10, r5, #1 + mov r2, r5 + ldrh r0, [r3, r10] + ldrh r3, [r3, r1] + mov r1, fp + str r3, [sp] + mov r3, r0 + ldr r0, .L3507+28 + bl printk + ldrh r3, [r6, #-8] + cmp r3, #40 + bls .L3358 + ldr r3, [r4, #-3540] + ldrh r3, [r3, r10] + cmp r3, #32 + strhhi r9, [r6, #-8] @ movhi +.L3358: + ldr r3, .L3507+16 + mov r2, #6 + strh r2, [r3] @ movhi +.L3351: + movw r0, #65535 + ldr r3, [sp, #16] + sub r2, r5, r0 + clz r2, r2 + lsr r2, r2, #5 + cmp r3, #0 + movne r1, #0 + andeq r1, r2, #1 + cmp r1, #0 + beq .L3373 + ldrh r3, [r8, #-4] + cmp r3, #24 + movhi r6, #1 + bhi .L3374 + ldr r1, .L3507+12 + movw r2, #2390 + cmp r3, #16 + ldrh r6, [r1, r2] + lsrhi r6, r6, #5 + bhi .L3374 + cmp r3, #12 + lsrhi r6, r6, #4 + bhi .L3374 + cmp r3, #8 + lsrhi r6, r6, #2 +.L3374: + ldr r1, .L3507+32 + ldrh r2, [r1] + cmp r2, r3 + mov r2, r1 + bcs .L3378 + sub r3, r1, #704 + movw r0, #65535 + ldrh r3, [r3] + cmp r3, r0 + bne .L3379 + ldrh r0, [r1, #54] + cmp r0, r3 + bne .L3379 + ldr r3, .L3507+16 + ldrh r0, [r3] + cmp r0, #0 + bne .L3380 + ldr r3, .L3507+12 + ldr ip, [r4, #-3368] + ldr r3, [r3, #2452] + add r3, r3, r3, lsl #1 + cmp ip, r3, lsr #2 + movcs r3, #18 + strhcs r3, [r1] @ movhi + bcs .L3382 +.L3380: + ldr r3, .L3507+36 + ldrh r3, [r3, #-8] + add r3, r3, r3, lsl #1 + asr r3, r3, #2 + strh r3, [r2] @ movhi +.L3382: + mov r3, #0 + str r3, [r4, #-2708] +.L3343: + add sp, sp, #44 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L3345: + sub r3, r3, #3424 + ldrh r3, [r3] + cmp r3, r2 + beq .L3348 + mov r0, r5 + bl FtlGcFreeTempBlock + cmp r0, #0 + beq .L3348 + mov r0, r5 + b .L3343 +.L3346: + ldrh r3, [r6, #-10] + cmp r3, r2 + bne .L3347 + ldrh r1, [r6, #-6] + cmp r1, r3 + beq .L3347 + ldrh r2, [r6, #-4] + cmp r2, r3 + mvnne r3, #0 + strhne r0, [r6, #-10] @ movhi + strhne r1, [r6, #-8] @ movhi + strhne r2, [r6, #-6] @ movhi + strhne r3, [r6, #-4] @ movhi + b .L3347 +.L3357: + mov r3, #1 + strh r3, [r6, #-8] @ movhi +.L3359: + bl GetSwlReplaceBlock + movw r3, #65535 + mov r5, r0 + cmp r0, r3 + bne .L3351 + ldr r3, .L3507+16 + mov r2, #0 + strh r2, [r3] @ movhi +.L3349: + ldr r3, .L3507+20 + movw r5, #65535 + ldrh r3, [r3, #-4] + cmp r3, r5 + bne .L3351 +.L3438: + ldr r6, .L3507+40 + movw r3, #65535 + ldrh r5, [r6] + cmp r5, r3 + movne r5, r3 + bne .L3351 + add r3, r6, #768 + ldrh r9, [r3, #-10] + cmp r9, r5 + bne .L3351 + ldrh r3, [r8, #-4] + ldr r2, [r4, #-2716] + cmp r3, #24 + movcc r3, #5120 + movcs r3, #1024 + cmp r2, r3 + bls .L3351 + ldr r2, .L3507+16 + mov r3, #0 + str r3, [r4, #-2716] + strh r3, [r2] @ movhi + bl GetSwlReplaceBlock + cmp r0, r9 + mov r5, r0 + movne r10, r0 + bne .L3361 + add r6, r6, #720 + ldrh r2, [r8, #-4] + ldrh r3, [r6, #-14] + mov r9, r6 + cmp r2, r3 + movcs r3, #80 + strhcs r3, [r6, #-14] @ movhi + bcs .L3364 + mov r0, #64 + bl List_get_gc_head_node + uxth r3, r0 + cmp r3, r5 + beq .L3364 + ldr r3, [r4, #-564] + ldr r6, .L3507+12 + cmp r3, #0 + uxth r3, r0 + bne .L3365 + movw r2, #2344 + ldrh r2, [r6, r2] + cmp r2, #3 + beq .L3365 + ldr r2, [r4, #-2724] + cmp r2, #0 + bne .L3365 + ldr r2, [r6, #2248] + cmp r2, #0 + bne .L3365 + ldrb r0, [r6, #152] @ zero_extendqisi2 + cmp r0, #0 + beq .L3366 +.L3365: + ldr r2, [r4, #-3540] + lsl r3, r3, #1 + movw r0, #2344 + ldrh r0, [r6, r0] + ldrh r1, [r2, r3] + movw r3, #2392 + movw r2, #2324 + ldrh r3, [r6, r3] + ldrh r2, [r6, r2] + cmp r0, #3 + mul r2, r3, r2 + lsreq r3, r3, #1 + movne r3, #0 + add r3, r3, r2 + cmp r1, r3 + bgt .L3368 + mov r0, #0 + bl List_get_gc_head_node + ldr r3, [r6, #2452] + uxth r10, r0 + ldr r2, [r4, #-3368] + add r3, r3, r3, lsl #1 + cmp r2, r3, lsr #2 + movls r3, #160 + bls .L3500 +.L3501: + mov r3, #128 +.L3500: + strh r3, [r9, #-14] @ movhi + movw r3, #65535 + cmp r10, r3 + beq .L3364 +.L3361: + ldr r0, .L3507+32 + lsl r1, r10, #1 + ldr r3, [r4, #-3540] + mov r5, r10 + ldrh r2, [r8, #-4] + ldrh r0, [r0] + ldrh r3, [r3, r1] + str r0, [sp, #4] + ldr r0, [r4, #-3604] + ldrh r1, [r0, r1] + ldr r0, .L3507+44 + str r1, [sp] + mov r1, r10 + bl printk + b .L3364 +.L3368: + mov r3, #128 +.L3502: + strh r3, [r9, #-14] @ movhi +.L3364: + bl FtlGcReFreshBadBlk + b .L3351 +.L3366: + ldr r2, [r4, #-3540] + lsl r3, r3, #1 + ldrh r3, [r2, r3] + cmp r3, #7 + bhi .L3371 + bl List_get_gc_head_node + uxth r10, r0 + b .L3501 +.L3371: + mov r3, #64 + b .L3502 +.L3379: + ldr r3, .L3507+36 + ldrh r3, [r3, #-8] + add r3, r3, r3, lsl #1 + asr r3, r3, #2 + strh r3, [r2] @ movhi +.L3378: + ldr r3, .L3507+12 + movw r5, #65535 + ldr r3, [r3, #2248] + adds r3, r3, #0 + movne r3, #1 + cmp r7, #2 + movhi r3, #0 + cmp r3, #0 + addne r6, r6, #1 + uxthne r6, r6 +.L3384: + ldr r7, .L3507+20 + movw r2, #65535 + ldrh r3, [r7, #-4] + cmp r3, r2 + bne .L3394 + cmp r5, r3 + strhne r5, [r7, #-4] @ movhi + bne .L3396 + add r3, r7, #624 + ldrh r2, [r3, #-10] + cmp r2, r5 + beq .L3396 + ldr r1, [r4, #-3540] + lsl r2, r2, #1 + ldrh r2, [r1, r2] + cmp r2, #0 + mvneq r2, #0 + strheq r2, [r3, #-10] @ movhi + ldrh r2, [r3, #-10] + strh r2, [r7, #-4] @ movhi + mvn r2, #0 + strh r2, [r3, #-10] @ movhi +.L3396: + ldrh r0, [r7, #-4] + mov r3, #0 + strb r3, [r4, #-3276] + movw r3, #65535 + cmp r0, r3 + beq .L3394 + bl IsBlkInGcList + cmp r0, #0 + mvnne r3, #0 + strhne r3, [r7, #-4] @ movhi + ldr r3, .L3507+12 + ldrb r3, [r3, #152] @ zero_extendqisi2 + cmp r3, #0 + beq .L3400 + ldrh r0, [r7, #-4] + bl ftl_get_blk_mode + strb r0, [r4, #-3276] +.L3400: + ldrh r2, [r7, #-4] + movw r3, #65535 + sub r9, r7, #4 + cmp r2, r3 + beq .L3394 + mov r0, r9 + bl make_superblock + mov r3, #0 + movw r2, #1986 + strh r3, [r4, r2] @ movhi + strh r3, [r7, #-2] @ movhi + strb r3, [r4, #-3278] + ldrh r3, [r7, #-4] + ldr r2, [r4, #-3540] + lsl r3, r3, #1 + ldrh r2, [r2, r3] + movw r3, #1988 + strh r2, [r4, r3] @ movhi +.L3394: + ldrh r3, [r7, #-4] + ldrh r2, [r8] + cmp r2, r3 + beq .L3401 + ldr r2, .L3507+48 + ldrh r1, [r2] + cmp r1, r3 + beq .L3401 + ldrh r2, [r2, #48] + cmp r2, r3 + bne .L3402 +.L3401: + mvn r3, #0 + strh r3, [r7, #-4] @ movhi +.L3402: + ldr r4, .L3507 + sub r7, r4, #3280 +.L3435: + ldrh r2, [r7, #-4] + movw r3, #65535 + cmp r2, r3 + bne .L3403 + ldr r9, .L3507+24 + mov r3, #0 + ldr r10, .L3507+52 + str r3, [r4, #-2708] +.L3404: + ldr fp, .L3507+56 + ldrh r8, [fp] + mov r0, r8 + bl List_get_gc_head_node + uxth r2, r0 + sub r1, fp, #568 + strh r2, [r1, #-4] @ movhi + movw r1, #65535 + cmp r2, r1 + bne .L3405 + mov r3, #0 + mov r0, #8 + strh r3, [fp] @ movhi + b .L3343 +.L3373: + ldr r3, .L3507+40 + ldrh r7, [r3] + cmp r7, r0 + bne .L3385 + add r0, r3, #768 + ldrh r0, [r0, #-10] + cmp r0, r7 + movne r2, #0 + andeq r2, r2, #1 + cmp r2, #0 + beq .L3385 + ldrh r2, [r3, #140] + cmp r2, r7 + beq .L3386 +.L3391: + mov r5, r7 +.L3385: + ldr r3, .L3507+12 + ldr r3, [r3, #2248] + cmp r3, #0 + moveq r6, #1 + movne r6, #2 + b .L3384 +.L3386: + add r5, r3, #704 + ldrh r2, [r8, #-4] + ldrh r3, [r5] + str r1, [r4, #-2708] + ldr r6, .L3507+16 + cmp r2, r3 + bls .L3387 + ldrh r3, [r6] + cmp r3, #0 + bne .L3388 + ldr r3, .L3507+12 + ldr r2, [r4, #-3368] + ldr r3, [r3, #2452] + add r3, r3, r3, lsl #1 + cmp r2, r3, lsr #2 + movcs r3, #18 + bcs .L3503 +.L3388: + ldr r3, .L3507+36 + ldrh r3, [r3, #-8] + add r3, r3, r3, lsl #1 + asr r3, r3, #2 +.L3503: + strh r3, [r5] @ movhi + bl FtlReadRefresh + mov r0, #0 + bl List_get_gc_head_node + uxth r0, r0 + ldr r3, [r4, #-3540] + lsl r0, r0, #1 + ldrh r3, [r3, r0] + cmp r3, #4 + bls .L3387 +.L3504: + ldrh r0, [r6] + b .L3343 +.L3387: + ldrh r0, [r6] + cmp r0, #0 + bne .L3391 + ldr r3, .L3507+36 + ldrh r9, [r3, #-8] + add r3, r9, r9, lsl #1 + asr r3, r3, #2 + strh r3, [r5] @ movhi + bl List_get_gc_head_node + uxth r0, r0 + ldr r3, [r4, #-3540] + ldr r2, .L3507+12 + lsl r0, r0, #1 + ldrh r1, [r3, r0] + movw r3, #2392 + ldrh r0, [r2, r3] + movw r3, #2324 + ldrh r3, [r2, r3] + mul r3, r3, r0 + add r3, r3, r3, lsr #31 + cmp r1, r3, asr #1 + ble .L3392 + ldrh r2, [r8, #-4] + sub r3, r9, #1 + cmp r2, r3 + blt .L3392 + bl FtlReadRefresh + b .L3504 +.L3392: + cmp r1, #0 + bne .L3391 + movw r0, #65535 + bl decrement_vpc_count + ldrh r0, [r8, #-4] + add r0, r0, #1 + b .L3343 +.L3405: + str r0, [sp, #12] + mov r0, r2 + str r2, [sp, #8] + add r8, r8, #1 + bl IsBlkInGcList + cmp r0, #0 + ldr r2, [sp, #8] + ldr r3, [sp, #12] + strhne r8, [fp] @ movhi + bne .L3404 + uxth r3, r3 + ldrh lr, [r10] + ldr r0, [r4, #-3540] + uxth r8, r8 + lsl r1, r3, #1 + ldr r3, .L3507+60 + strh r8, [fp] @ movhi + ldrh ip, [r0, r1] + ldrh r3, [r3] + mul r3, r3, lr + add lr, r3, r3, lsr #31 + cmp ip, lr, asr #1 + bgt .L3408 + cmp r8, #48 + cmphi ip, #8 + bls .L3409 + ldrh ip, [fp, #36] + cmp ip, #35 + bhi .L3409 +.L3408: + mov ip, #0 + strh ip, [r9, #-8] @ movhi +.L3409: + ldrh r1, [r0, r1] + movw r0, #65535 + cmp r3, r1 + cmple r5, r0 + bne .L3410 + ldrh r0, [r9, #-8] + cmp r0, #3 + bhi .L3410 + ldr r1, .L3507+20 + mvn r2, #0 + strh r2, [r1, #-4] @ movhi + mov r2, #0 + strh r2, [r9, #-8] @ movhi +.L3506: + ldr r3, .L3507+16 + b .L3505 +.L3410: + cmp r1, #0 + bne .L3411 + movw r0, #65535 + bl decrement_vpc_count + ldrh r3, [r9, #-8] + add r3, r3, #1 + strh r3, [r9, #-8] @ movhi + b .L3404 +.L3411: + mov r3, #0 + strb r3, [r4, #-3276] + ldr r3, .L3507+12 + ldrb r3, [r3, #152] @ zero_extendqisi2 + cmp r3, #0 + beq .L3412 + mov r0, r2 + bl ftl_get_blk_mode + strb r0, [r4, #-3276] +.L3412: + ldr r3, .L3507+20 + sub r8, r3, #4 + mov r0, r8 + bl make_superblock + add r2, r8, #4 + ldr r1, .L3507+64 + ldrh r2, [r2, #-4] + mov r3, #0 + ldr r0, [r4, #-3540] + strh r3, [r1] @ movhi + lsl r2, r2, #1 + ldrh r2, [r0, r2] + strh r3, [r8, #2] @ movhi + strb r3, [r4, #-3278] + strh r2, [r1, #2] @ movhi +.L3403: + ldr r3, [sp, #16] + cmp r3, #1 + bne .L3413 + bl FtlReadRefresh +.L3413: + mov r3, #1 + str r3, [r4, #-560] + ldr r3, .L3507+52 + ldrh r3, [r3] + str r3, [sp, #8] + ldr r3, .L3507+12 + ldrb r3, [r3, #152] @ zero_extendqisi2 + cmp r3, #0 + beq .L3414 + ldrb r3, [r4, #-3276] @ zero_extendqisi2 + cmp r3, #1 + ldreq r3, .L3507+68 + ldrheq r3, [r3] + streq r3, [sp, #8] +.L3414: + ldr r3, .L3507+20 + ldr r1, [sp, #8] + ldrh r3, [r3, #-2] + add r2, r3, r6 + cmp r2, r1 + movgt r2, r1 + subgt r6, r2, r3 + mov r3, #0 + uxthgt r6, r6 + str r3, [sp, #12] + sub r3, r7, #4 + str r3, [sp, #20] +.L3416: + ldrh r3, [sp, #12] + cmp r6, r3 + bls .L3423 + ldr r3, .L3507+60 + add ip, r7, #10 + ldr r0, [r4, #-2688] + movw r9, #65535 + mov lr, #36 + ldrh r10, [r3] + ldr r3, [sp, #20] + ldrh r1, [r3, #2] + ldr r3, [sp, #12] + add r1, r1, r3 + mov r3, #0 + mov r8, r3 + b .L3424 +.L3418: + ldrh r2, [ip, #2]! + add r3, r3, #1 + cmp r2, r9 + mlane fp, lr, r8, r0 + addne r8, r8, #1 + orrne r2, r1, r2, lsl #10 + uxthne r8, r8 + strne r2, [fp, #4] +.L3424: + uxth r2, r3 + cmp r10, r2 + bhi .L3418 + mov fp, #0 + ldrb r2, [r4, #-3276] @ zero_extendqisi2 + mov r1, r8 + bl FlashReadPages +.L3419: + uxth r3, fp + cmp r8, r3 + ldrls r3, [sp, #12] + addls r3, r3, #1 + strls r3, [sp, #12] + bls .L3416 +.L3422: + mov r3, #36 + ldr r2, [r4, #-2688] + mul r9, r3, fp + add r1, r2, r9 + ldr r2, [r2, r9] + cmn r2, #1 + beq .L3420 + ldr r10, [r1, #12] + movw r2, #61589 + ldrh r1, [r10] + cmp r1, r2 + bne .L3420 + mov r2, #0 + add r1, sp, #32 + ldr r0, [r10, #8] + str r3, [sp, #24] + bl log2phys + ldr r1, [r4, #-2688] + ldr r2, [sp, #32] + ldr r3, [sp, #24] + add r1, r1, r9 + ldr r0, [r1, #4] + bic r2, r2, #-2147483648 + cmp r2, r0 + bne .L3420 + ldr r2, .L3507+64 + ldr r0, .L3507+64 + ldr r1, [r1, #16] + ldrh r2, [r2] + str r3, [sp, #28] + add r2, r2, #1 + strh r2, [r0] @ movhi + ldr r0, [r4, #-2704] + ldr r2, [r4, #-532] + mla r2, r3, r0, r2 + str r1, [r2, #16] + str r2, [sp, #24] + bl Ftl_get_new_temp_ppa + ldr r2, [sp, #24] + ldr r1, [r4, #-532] + ldr r3, [sp, #28] + str r0, [r2, #4] + ldr r2, [r4, #-2704] + mla r3, r3, r2, r1 + ldr r2, [r4, #-2688] + add r2, r2, r9 + ldr r1, [r2, #8] + str r1, [r3, #8] + mov r1, #1 + ldr r2, [r2, #12] + str r2, [r3, #12] + ldr r3, [sp, #32] + str r3, [r10, #12] + ldr r3, .L3507+40 + ldrh r3, [r3] + strh r3, [r10, #2] @ movhi + ldr r3, [r4, #-3328] + ldr r0, [r4, #-2688] + str r3, [r10, #4] + ldr r3, [r4, #-2704] + add r0, r0, r9 + add r3, r3, #1 + str r3, [r4, #-2704] + bl FtlGcBufAlloc + ldr r3, .L3507+12 + ldrb r3, [r3, #152] @ zero_extendqisi2 + cmp r3, #0 + bne .L3421 + ldrb r2, [r4, #-3417] @ zero_extendqisi2 + ldr r3, [r4, #-2704] + cmp r2, r3 + beq .L3421 + ldr r3, .L3507+40 + ldrh r3, [r3, #4] + cmp r3, #0 + bne .L3420 +.L3421: + bl Ftl_gc_temp_data_write_back + cmp r0, #0 + beq .L3420 + ldr r3, .L3507 + mov r2, #0 + mvn ip, #0 + sub r1, r3, #3280 + str r2, [r3, #-560] + add r3, r3, #1984 + strh ip, [r1, #-4] @ movhi + strh r2, [r1, #-2] @ movhi +.L3505: + ldrh r0, [r3] + b .L3343 +.L3420: + add fp, fp, #1 + b .L3419 +.L3423: + ldrh r3, [r7, #-2] + add r6, r6, r3 + ldr r3, [sp, #8] + uxth r6, r6 + cmp r3, r6 + strh r6, [r7, #-2] @ movhi + bhi .L3425 + ldr r3, [r4, #-2704] + cmp r3, #0 + beq .L3426 + bl Ftl_gc_temp_data_write_back + cmp r0, #0 + movne r3, #0 + strne r3, [r4, #-560] + bne .L3506 +.L3426: + ldr r3, .L3507+64 + ldrh r0, [r3] + cmp r0, #0 + bne .L3427 + ldrh r3, [r7, #-4] + ldr r2, [r4, #-3540] + lsl r3, r3, #1 + ldrh r3, [r2, r3] + cmp r3, #0 + movne r6, r0 + ldrne r8, .L3507+12 + bne .L3428 +.L3427: + mvn r3, #0 + strh r3, [r7, #-4] @ movhi +.L3425: + ldr r3, .L3507+72 + ldrh r3, [r3] + cmp r3, #2 + bhi .L3434 + ldr r3, .L3507+52 + ldrh r6, [r3] + b .L3435 +.L3429: + add r6, r6, #1 +.L3428: + ldr r3, [r8, #2452] + cmp r6, r3 + bcs .L3433 + mov r2, #0 + add r1, sp, #36 + mov r0, r6 + bl log2phys + ldr r0, [sp, #36] + cmn r0, #1 + beq .L3429 + ubfx r0, r0, #10, #16 + bl P2V_block_in_plane + ldrh r3, [r7, #-4] + cmp r3, r0 + bne .L3429 +.L3433: + ldr r3, [r8, #2452] + cmp r6, r3 + bcc .L3427 + ldrh r3, [r7, #-4] + mov r1, #0 + ldr r2, [r4, #-3540] + lsl r3, r3, #1 + strh r1, [r2, r3] @ movhi + ldrh r0, [r7, #-4] + bl update_vpc_list + bl FtlCacheWriteBack + bl l2p_flush + bl FtlVpcTblFlush + b .L3427 +.L3434: + mov r2, #0 + str r2, [r4, #-560] + ldr r2, .L3507+16 + ldrh r0, [r2] + cmp r0, #0 + addeq r0, r3, #1 + b .L3343 +.L3439: + mov r0, #0 + b .L3343 +.L3508: + .align 2 +.L3507: + .word .LANCHOR2 + .word .LANCHOR1 + .word .LANCHOR2-2656 + .word .LANCHOR0 + .word .LANCHOR2+1984 + .word .LANCHOR2-3280 + .word .LANCHOR2-2704 + .word .LC157 + .word .LANCHOR2-2720 + .word .LANCHOR2-3296 + .word .LANCHOR2-3424 + .word .LC158 + .word .LANCHOR2-3472 + .word .LANCHOR0+2390 + .word .LANCHOR2-2712 + .word .LANCHOR0+2324 + .word .LANCHOR2+1986 + .word .LANCHOR0+2392 + .word .LANCHOR2-3524 + .fnend + .size ftl_do_gc, .-ftl_do_gc + .align 2 + .global FtlCacheWriteBack + .syntax unified + .arm + .fpu softvfp + .type FtlCacheWriteBack, %function +FtlCacheWriteBack: + .fnstart + @ args = 0, pretend = 0, frame = 16 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #20 + sub sp, sp, #20 + ldr r6, .L3552 + ldr r9, [r6, #-3612] + cmp r9, #0 + bne .L3511 + ldr r4, .L3552+4 + ldr r1, [r4, #2444] + cmp r1, #0 + beq .L3511 + ldrb r3, [r4, #152] @ zero_extendqisi2 + mov r7, #0 + ldr r5, [r6, #1992] + mov r10, #36 + ldr fp, .L3552+8 + cmp r3, #0 + ldr r0, [r4, #2448] + ldrbne r8, [r5, #8] @ zero_extendqisi2 + moveq r8, r9 + ldrb r3, [r5, #9] @ zero_extendqisi2 + subne r8, r8, #1 + clzne r8, r8 + lsrne r8, r8, #5 + mov r2, r8 + bl FlashProgPages +.L3514: + ldr r3, [r4, #2444] + cmp r7, r3 + bcc .L3521 +.L3533: + mov r3, #0 + str r3, [r4, #2444] +.L3511: + mov r0, #0 + add sp, sp, #20 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L3521: + mul r3, r10, r7 + ldr r2, [r4, #2448] + add r0, r2, r3 + ldr r2, [r2, r3] + cmn r2, #1 + beq .L3516 + ldr r2, [r0, #4] + cmp r8, #0 + add r1, sp, #12 + ldr r0, [r0, #16] + str r3, [sp, #4] + orrne r2, r2, #-2147483648 + str r2, [sp, #12] + mov r2, #1 + bl log2phys + ldr r2, [r4, #2448] + ldr r3, [sp, #4] + add r3, r2, r3 + ldr r3, [r3, #12] + ldr r0, [r3, #12] + cmn r0, #1 + beq .L3519 + ubfx r0, r0, #10, #16 + bl P2V_block_in_plane + ldr r1, [r6, #-3540] + lsl r2, r0, #1 + mov r3, r0 + ldrh r2, [r1, r2] + cmp r2, #0 + bne .L3520 + mov r1, r0 + str r0, [sp, #4] + mov r0, fp + bl printk + ldr r3, [sp, #4] +.L3520: + mov r0, r3 + bl decrement_vpc_count +.L3519: + add r7, r7, #1 + b .L3514 +.L3531: + mov r7, #36 + ldr r3, [r4, #2448] + mul r7, r7, r9 + mov r10, #0 + mov fp, #1 + mvn r2, #0 + str r2, [r3, r7] +.L3522: + ldr r2, [r4, #2448] + add r3, r2, r7 + ldr r2, [r2, r7] + ldr r0, [r3, #4] + cmn r2, #1 + beq .L3526 + cmp r8, #0 + mov r2, #1 + orrne r0, r0, #-2147483648 + add r1, sp, #12 + str r0, [sp, #12] + ldr r0, [r3, #16] + bl log2phys + ldr r3, [r4, #2448] + add r7, r3, r7 + ldr r3, [r7, #12] + ldr r0, [r3, #12] + cmn r0, #1 + beq .L3529 + ubfx r0, r0, #10, #16 + bl P2V_block_in_plane + ldr r2, [r6, #-3540] + lsl r3, r0, #1 + mov r7, r0 + ldrh r2, [r2, r3] + cmp r2, #0 + bne .L3530 + mov r1, r0 + ldr r0, .L3552+8 + bl printk +.L3530: + mov r0, r7 + bl decrement_vpc_count +.L3529: + add r9, r9, #1 +.L3516: + ldr r3, [r4, #2444] + cmp r9, r3 + bcc .L3531 + movw r5, #16386 +.L3534: + ldr r3, .L3552+12 + ldrh r3, [r3] + cmp r3, #0 + beq .L3533 + mov r1, #1 + mov r0, r1 + bl ftl_do_gc + subs r5, r5, #1 + bne .L3534 + b .L3533 +.L3526: + ubfx r0, r0, #10, #16 + bl P2V_block_in_plane + ldrh r3, [r5] + cmp r3, r0 + bne .L3523 + ldr r1, [r6, #-3540] + lsl r3, r3, #1 + ldrh r0, [r5, #4] + ldrh r2, [r1, r3] + sub r2, r2, r0 + strh r2, [r1, r3] @ movhi + ldr r3, .L3552+16 + strb r10, [r5, #6] + strh r10, [r5, #4] @ movhi + ldrh r3, [r3] + strh r3, [r5, #2] @ movhi +.L3523: + ldrh r3, [r5, #4] + cmp r3, #0 + bne .L3524 + mov r0, r5 + bl allocate_new_data_superblock +.L3524: + ldr r3, [r6, #-3140] + add r3, r3, #1 + str r3, [r6, #-3140] + ldr r3, [r4, #2448] + add r3, r3, r7 + ldr r0, [r3, #4] + ubfx r0, r0, #10, #16 + bl FtlGcMarkBadPhyBlk + mov r0, r5 + bl get_new_active_ppa + ldr r3, [r4, #2448] + mov r2, r0 + str r0, [sp, #12] + mov r1, #1 + add r0, r3, r7 + str r2, [r0, #4] + mov r2, r8 + ldrb r3, [r5, #9] @ zero_extendqisi2 + bl FlashProgPages + ldr r3, [r4, #2448] + ldr r3, [r3, r7] + cmn r3, #1 + streq fp, [r6, #-3612] + ldr r3, [r6, #-3612] + cmp r3, #0 + beq .L3522 + b .L3511 +.L3553: + .align 2 +.L3552: + .word .LANCHOR2 + .word .LANCHOR0 + .word .LC159 + .word .LANCHOR2-2658 + .word .LANCHOR0+2390 + .fnend + .size FtlCacheWriteBack, .-FtlCacheWriteBack + .align 2 + .global FtlSysFlush + .syntax unified + .arm + .fpu softvfp + .type FtlSysFlush, %function +FtlSysFlush: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L3560 + ldr r3, [r3, #-3612] + cmp r3, #0 + bne .L3557 + ldr r3, .L3560+4 + push {r4, lr} + .save {r4, lr} + ldr r4, [r3, #500] + cmp r4, #1 + bne .L3555 + bl FtlCacheWriteBack + bl l2p_flush + mov r0, r4 + bl FtlEctTblFlush + bl FtlVpcTblFlush +.L3555: + mov r0, #0 + pop {r4, pc} +.L3557: + mov r0, #0 + bx lr +.L3561: + .align 2 +.L3560: + .word .LANCHOR2 + .word .LANCHOR1 + .fnend + .size FtlSysFlush, .-FtlSysFlush + .align 2 + .global FtlDeInit + .syntax unified + .arm + .fpu softvfp + .type FtlDeInit, %function +FtlDeInit: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L3568 + ldr r3, [r3, #500] + cmp r3, #1 + bne .L3565 + push {r4, lr} + .save {r4, lr} + bl FtlSysFlush + mov r0, #0 + pop {r4, pc} +.L3565: + mov r0, #0 + bx lr +.L3569: + .align 2 +.L3568: + .word .LANCHOR1 + .fnend + .size FtlDeInit, .-FtlDeInit + .align 2 + .global ftl_deinit + .syntax unified + .arm + .fpu softvfp + .type ftl_deinit, %function +ftl_deinit: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, lr} + .save {r4, lr} + bl ftl_flash_de_init + bl FtlDeInit + pop {r4, lr} + b ftl_flash_de_init + .fnend + .size ftl_deinit, .-ftl_deinit + .align 2 + .global rk_ftl_de_init + .syntax unified + .arm + .fpu softvfp + .type rk_ftl_de_init, %function +rk_ftl_de_init: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, lr} + .save {r4, lr} + mov r1, #0 + ldr r0, .L3574 + bl printk + pop {r4, lr} + b ftl_deinit +.L3575: + .align 2 +.L3574: + .word .LC160 + .fnend + .size rk_ftl_de_init, .-rk_ftl_de_init + .align 2 + .global ftl_cache_flush + .syntax unified + .arm + .fpu softvfp + .type ftl_cache_flush, %function +ftl_cache_flush: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + b FtlCacheWriteBack + .fnend + .size ftl_cache_flush, .-ftl_cache_flush + .align 2 + .global rk_ftl_cache_write_back + .syntax unified + .arm + .fpu softvfp + .type rk_ftl_cache_write_back, %function +rk_ftl_cache_write_back: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + b FtlCacheWriteBack + .fnend + .size rk_ftl_cache_write_back, .-rk_ftl_cache_write_back + .align 2 + .global ftl_discard + .syntax unified + .arm + .fpu softvfp + .type ftl_discard, %function +ftl_discard: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + .pad #8 + mov r6, r0 + ldr r5, .L3596 + ldr r3, [r5, #2432] + cmp r3, r1 + cmpcs r3, r0 + movls r0, #1 + movhi r0, #0 + bls .L3586 + add r2, r6, r1 + mov r4, r1 + cmp r3, r2 + bcc .L3586 + cmp r1, #31 + bls .L3578 + ldr r7, .L3596+4 + ldr r3, [r7, #-3612] + cmp r3, #0 + bne .L3578 + bl FtlCacheWriteBack + movw r3, #2396 + mov r0, r6 + ldrh r5, [r5, r3] + mov r1, r5 + bl __aeabi_uidiv + smulbb r3, r0, r5 + mov r8, r0 + sub r6, r6, r3 + uxth r6, r6 + cmp r6, #0 + beq .L3580 + sub r5, r5, r6 + add r8, r0, #1 + cmp r5, r4 + movcs r5, r4 + uxth r5, r5 + sub r4, r4, r5 +.L3580: + ldr r5, .L3596+8 + mvn r3, #0 + str r3, [sp, #4] + mov r6, r5 +.L3581: + ldrh r3, [r5] + cmp r4, r3 + bcs .L3583 + ldr r3, [r7, #1996] + cmp r3, #32 + bls .L3584 + mov r3, #0 + str r3, [r7, #1996] + bl l2p_flush + bl FtlVpcTblFlush +.L3584: + mov r0, #0 +.L3578: + add sp, sp, #8 + @ sp needed + pop {r4, r5, r6, r7, r8, pc} +.L3583: + mov r2, #0 + mov r1, sp + mov r0, r8 + bl log2phys + ldr r3, [sp] + cmn r3, #1 + beq .L3582 + ldr r3, [r7, #1996] + mov r2, #1 + add r1, sp, #4 + mov r0, r8 + add r3, r3, #1 + str r3, [r7, #1996] + ldr r3, [r7, #-3360] + add r3, r3, #1 + str r3, [r7, #-3360] + bl log2phys + ldr r0, [sp] + ubfx r0, r0, #10, #16 + bl P2V_block_in_plane + bl decrement_vpc_count +.L3582: + ldrh r3, [r6] + add r8, r8, #1 + sub r4, r4, r3 + b .L3581 +.L3586: + mvn r0, #0 + b .L3578 +.L3597: + .align 2 +.L3596: + .word .LANCHOR0 + .word .LANCHOR2 + .word .LANCHOR0+2396 + .fnend + .size ftl_discard, .-ftl_discard + .align 2 + .global FtlDiscard + .syntax unified + .arm + .fpu softvfp + .type FtlDiscard, %function +FtlDiscard: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + b ftl_discard + .fnend + .size FtlDiscard, .-FtlDiscard + .align 2 + .global ftl_read + .syntax unified + .arm + .fpu softvfp + .type ftl_read, %function +ftl_read: + .fnstart + @ args = 0, pretend = 0, frame = 56 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr ip, .L3643 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #84 + sub sp, sp, #84 + ldr ip, [ip, #500] + cmp ip, #1 + bne .L3623 + cmp r0, #16 + mov r8, r3 + str r2, [sp, #28] + mov r5, r1 + bne .L3601 + mov r2, r3 + ldr r1, [sp, #28] + add r0, r5, #256 + bl FtlVendorPartRead + mov r10, r0 +.L3599: + mov r0, r10 + add sp, sp, #84 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L3601: + ldr r2, .L3643+4 + ldr r1, [sp, #28] + ldr r3, [r2, #2432] + cmp r1, r3 + cmpls r5, r3 + bcs .L3623 + add r1, r5, r1 + cmp r3, r1 + str r1, [sp, #44] + bcc .L3623 + movw r3, #2396 + mov r0, r5 + ldrh r4, [r2, r3] + mov r1, r4 + bl __aeabi_uidiv + ldr r3, [sp, #44] + mov r1, r4 + str r0, [sp, #36] + sub r0, r3, #1 + bl __aeabi_uidiv + ldr r3, [sp, #36] + ldr r1, [sp, #28] + str r0, [sp, #40] + rsb r3, r3, #1 + add r3, r3, r0 + str r3, [sp, #32] + ldr r3, .L3643+8 + ldr r2, [r3, #-3336] + add r2, r2, r1 + ldr r1, [sp, #32] + str r2, [r3, #-3336] + ldr r2, [r3, #-3364] + add r2, r2, r1 + mov r1, r0 + ldr r0, [sp, #36] + str r2, [r3, #-3364] + bl FtlCacheMetchLpa + cmp r0, #0 + beq .L3602 + bl FtlCacheWriteBack +.L3602: + ldr r6, [sp, #36] + mov r3, #0 + ldr r4, .L3643+8 + mov r7, r3 + mov r10, r3 + str r3, [sp, #52] + str r3, [sp, #48] +.L3603: + ldr r3, [sp, #32] + cmp r3, #0 + bne .L3620 + ldr r3, .L3643+12 + ldrh r3, [r3, #-2] + cmp r3, #0 + beq .L3599 + mov r1, #1 + ldr r0, [sp, #32] + bl ftl_do_gc + b .L3599 +.L3620: + mov r2, #0 + add r1, sp, #76 + mov r0, r6 + bl log2phys + ldr r3, [sp, #76] + cmn r3, #1 + moveq r9, #0 + beq .L3605 + ldr r2, [r4, #-536] + mov r9, #36 + mla r9, r9, r7, r2 + str r3, [r9, #4] + ldr r3, [sp, #36] + cmp r6, r3 + bne .L3609 + ldr r3, [r4, #-508] + mov r0, r5 + str r3, [r9, #8] + ldr r3, .L3643+16 + ldrh fp, [r3] + mov r1, fp + bl __aeabi_uidivmod + ldr r2, [sp, #28] + sub r3, fp, r1 + str r1, [sp, #56] + cmp r2, r3 + movcc r3, r2 + cmp r3, fp + str r3, [sp, #48] + streq r8, [r9, #8] +.L3610: + ldr r3, .L3643+20 + ldr r2, [r4, #-496] + str r6, [r9, #16] + ldrh r3, [r3] + mul r3, r7, r3 + add r7, r7, #1 + bic r3, r3, #3 + add r3, r2, r3 + str r3, [r9, #12] + b .L3608 +.L3607: + mla r0, r0, r6, r9 + ldr r2, [sp, #44] + cmp r5, r0 + movls r3, #1 + movhi r3, #0 + cmp r2, r0 + movls r3, #0 + cmp r3, #0 + beq .L3606 + sub r0, r0, r5 + mov r2, #512 + mov r1, #0 + add r0, r8, r0, lsl #9 + bl ftl_memset +.L3606: + add r9, r9, #1 +.L3605: + ldr r3, .L3643+16 + ldrh r0, [r3] + cmp r9, r0 + bcc .L3607 +.L3608: + ldr r3, [sp, #32] + add r6, r6, #1 + subs r3, r3, #1 + str r3, [sp, #32] + beq .L3612 + ldr r3, .L3643+24 + ldrh r3, [r3] + cmp r7, r3, lsl #3 + bne .L3603 +.L3612: + cmp r7, #0 + beq .L3603 + mov r2, #0 + mov r1, r7 + ldr r0, [r4, #-536] + mov fp, #0 + bl FlashReadPages + ldr r3, [sp, #52] + lsl r3, r3, #9 + str r3, [sp, #68] + ldr r3, [sp, #56] + lsl r3, r3, #9 + str r3, [sp, #60] + ldr r3, [sp, #48] + lsl r3, r3, #9 + str r3, [sp, #64] +.L3619: + mov r9, #36 + ldr r3, [r4, #-536] + mul r9, r9, fp + ldr r1, [sp, #36] + add r3, r3, r9 + ldr r2, [r3, #16] + cmp r1, r2 + bne .L3614 + ldr r1, [r3, #8] + ldr r3, [r4, #-508] + cmp r1, r3 + bne .L3615 + ldr r3, [sp, #60] + mov r0, r8 + ldr r2, [sp, #64] + add r1, r1, r3 +.L3642: + bl ftl_memcpy +.L3615: + ldr r3, [r4, #-536] + ldr r2, [r3, r9] + add r1, r3, r9 + cmn r2, #1 + ldreq r3, [r4, #-3164] + moveq r10, r2 + addeq r3, r3, #1 + streq r3, [r4, #-3164] + ldr r3, [r1, #12] + ldr r2, [r1, #16] + ldr r3, [r3, #8] + cmp r2, r3 + beq .L3617 + ldr r3, [r4, #-3164] + add r3, r3, #1 + str r3, [r4, #-3164] + ldr r2, [r1, #8] + ldr r3, [r1, #12] + ldr r0, [r2, #4] + str r0, [sp, #16] + ldr r2, [r2] + ldr r0, .L3643+28 + str r2, [sp, #12] + ldr r2, [r3, #12] + str r2, [sp, #8] + ldr r2, [r3, #8] + str r2, [sp, #4] + ldr r2, [r3, #4] + str r2, [sp] + ldr r2, [r1, #4] + ldr r3, [r3] + ldr r1, [r1, #16] + bl printk +.L3617: + ldr r3, [r4, #-536] + add r2, r3, r9 + ldr r3, [r3, r9] + cmp r3, #256 + bne .L3618 + ldr r0, [r2, #4] + ubfx r0, r0, #10, #16 + bl P2V_block_in_plane + bl FtlGcRefreshBlock +.L3618: + add fp, fp, #1 + cmp r7, fp + bne .L3619 + mov r7, #0 + b .L3603 +.L3609: + ldr r3, [sp, #40] + cmp r6, r3 + bne .L3611 + ldr r3, [r4, #-504] + ldr r1, [sp, #44] + str r3, [r9, #8] + ldr r3, .L3643+16 + ldrh r2, [r3] + mul r3, r2, r6 + sub r1, r1, r3 + cmp r2, r1 + str r1, [sp, #52] + bne .L3610 +.L3641: + sub r3, r3, r5 + add r3, r8, r3, lsl #9 + str r3, [r9, #8] + b .L3610 +.L3611: + ldr r3, .L3643+16 + ldrh r3, [r3] + mul r3, r6, r3 + b .L3641 +.L3614: + ldr r1, [sp, #40] + cmp r1, r2 + bne .L3615 + ldr r1, [r3, #8] + ldr r3, [r4, #-504] + cmp r1, r3 + bne .L3615 + ldr r3, .L3643+16 + ldr r2, [sp, #68] + ldrh r0, [r3] + ldr r3, [sp, #40] + mul r0, r3, r0 + sub r0, r0, r5 + add r0, r8, r0, lsl #9 + b .L3642 +.L3623: + mvn r10, #0 + b .L3599 +.L3644: + .align 2 +.L3643: + .word .LANCHOR1 + .word .LANCHOR0 + .word .LANCHOR2 + .word .LANCHOR2-2656 + .word .LANCHOR0+2396 + .word .LANCHOR0+2402 + .word .LANCHOR0+2324 + .word .LC148 + .fnend + .size ftl_read, .-ftl_read + .align 2 + .global ftl_vendor_read + .syntax unified + .arm + .fpu softvfp + .type ftl_vendor_read, %function +ftl_vendor_read: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + mov r3, r2 + mov r2, r1 + mov r1, r0 + mov r0, #16 + b ftl_read + .fnend + .size ftl_vendor_read, .-ftl_vendor_read + .align 2 + .global FlashBootVendorRead + .syntax unified + .arm + .fpu softvfp + .type FlashBootVendorRead, %function +FlashBootVendorRead: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + mov r4, r0 + mov r5, r1 + mov r6, r2 + bl rknand_device_lock + ldr r3, .L3650 + ldr r3, [r3, #500] + cmp r3, #1 + mvnne r4, #0 + bne .L3647 + mov r0, r4 + mov r2, r6 + mov r1, r5 + bl ftl_vendor_read + mov r4, r0 +.L3647: + bl rknand_device_unlock + mov r0, r4 + pop {r4, r5, r6, pc} +.L3651: + .align 2 +.L3650: + .word .LANCHOR1 + .fnend + .size FlashBootVendorRead, .-FlashBootVendorRead + .align 2 + .global ftl_sys_read + .syntax unified + .arm + .fpu softvfp + .type ftl_sys_read, %function +ftl_sys_read: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + mov r3, r2 + mov r2, r1 + add r1, r0, #256 + mov r0, #16 + b ftl_read + .fnend + .size ftl_sys_read, .-ftl_sys_read + .align 2 + .global StorageSysDataLoad + .syntax unified + .arm + .fpu softvfp + .type StorageSysDataLoad, %function +StorageSysDataLoad: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + mov r4, r1 + mov r5, r0 + mov r2, #512 + mov r1, #0 + mov r0, r4 + bl ftl_memset + bl rknand_device_lock + mov r2, r4 + mov r1, #1 + mov r0, r5 + bl ftl_sys_read + mov r4, r0 + bl rknand_device_unlock + mov r0, r4 + pop {r4, r5, r6, pc} + .fnend + .size StorageSysDataLoad, .-StorageSysDataLoad + .align 2 + .global FtlRead + .syntax unified + .arm + .fpu softvfp + .type FtlRead, %function +FtlRead: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + b ftl_read + .fnend + .size FtlRead, .-FtlRead + .align 2 + .global FtlInit + .syntax unified + .arm + .fpu softvfp + .type FtlInit, %function +FtlInit: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + mvn r3, #0 + ldr r7, .L3673 + ldr r5, .L3673+4 + ldr r6, .L3673+8 + ldr r1, .L3673+12 + str r3, [r7, #500] + mov r3, #0 + ldr r0, .L3673+16 + str r3, [r5, #2000] + str r3, [r5, #-3612] + bl printk + add r0, r6, #124 + bl FtlConstantsInit + bl FtlMemInit + bl FtlVariablesInit + add r3, r6, #2320 + add r3, r3, #8 + ldrh r0, [r3] + bl FtlFreeSysBlkQueueInit + bl FtlLoadBbt + cmp r0, #0 + beq .L3657 + ldr r1, .L3673+20 + ldr r0, .L3673+24 +.L3672: + bl printk +.L3658: + mov r0, #0 + pop {r4, r5, r6, r7, r8, pc} +.L3657: + bl FtlSysBlkInit + subs r4, r0, #0 + ldrne r1, .L3673+20 + ldrne r0, .L3673+28 + bne .L3672 +.L3659: + mov r1, #1 + sub r5, r5, #3520 + str r1, [r7, #500] + bl ftl_do_gc + ldrh r7, [r5, #-4] + cmp r7, #15 + bhi .L3660 +.L3663: + ldr r3, .L3673+32 + movw r2, #65535 + ldrh r3, [r3] + cmp r3, r2 + bne .L3661 + ldr r2, .L3673+36 + ldrh r2, [r2] + cmp r2, r3 + bne .L3661 + and r0, r4, #63 + bl List_get_gc_head_node + uxth r0, r0 + bl FtlGcRefreshBlock +.L3661: + mov r1, #1 + mov r0, r1 + bl ftl_do_gc + mov r1, #1 + mov r0, #0 + bl ftl_do_gc + ldrh r2, [r5, #-4] + add r3, r7, #2 + cmp r2, r3 + bhi .L3658 + add r4, r4, #1 + cmp r4, #4096 + bne .L3663 + b .L3658 +.L3660: + ldrb r3, [r6, #152] @ zero_extendqisi2 + cmp r3, #0 + beq .L3658 + mov r4, #128 +.L3665: + mov r1, #1 + mov r0, r1 + bl ftl_do_gc + subs r4, r4, #1 + bne .L3665 + b .L3658 +.L3674: + .align 2 +.L3673: + .word .LANCHOR1 + .word .LANCHOR2 + .word .LANCHOR0 + .word .LC76 + .word .LC77 + .word .LANCHOR3+224 + .word .LC161 + .word .LC162 + .word .LANCHOR2-3284 + .word .LANCHOR2-2666 + .fnend + .size FtlInit, .-FtlInit + .align 2 + .global rk_ftl_init + .syntax unified + .arm + .fpu softvfp + .type rk_ftl_init, %function +rk_ftl_init: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + mov r0, #2048 + bl ftl_dma32_malloc + mov r5, #0 + ldr r4, .L3680 + ldr r1, .L3680+4 + str r0, [r4, #2004] + sub r0, r1, #324 + str r5, [r4, #1688] + str r5, [r4, #1684] + str r5, [r4, #2008] + bl rknand_get_reg_addr + ldr r3, [r4, #1684] + cmp r3, r5 + mvneq r4, #0 + beq .L3675 + bl rk_nandc_irq_init + mov r3, #2048 + mov r2, r5 + mov r1, r5 + ldr r0, [r4, #2004] + bl FlashSramLoadStore + bl rknand_flash_cs_init + ldr r0, [r4, #1684] + bl FlashInit + subs r4, r0, #0 + bne .L3677 + bl FtlInit +.L3677: + mov r1, r4 + ldr r0, .L3680+8 + bl printk +.L3675: + mov r0, r4 + pop {r4, r5, r6, pc} +.L3681: + .align 2 +.L3680: + .word .LANCHOR2 + .word .LANCHOR2+2008 + .word .LC163 + .fnend + .size rk_ftl_init, .-rk_ftl_init + .align 2 + .global ftl_fix_nand_power_lost_error + .syntax unified + .arm + .fpu softvfp + .type ftl_fix_nand_power_lost_error, %function +ftl_fix_nand_power_lost_error: + .fnstart + @ args = 0, pretend = 0, frame = 48 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + .pad #48 + sub sp, sp, #48 + ldr r8, .L3697 + ldrb r3, [r8, #152] @ zero_extendqisi2 + cmp r3, #0 + beq .L3682 + ldr r4, .L3697+4 + movw r3, #1846 + ldr r0, .L3697+8 + ldrh r6, [r4, r3] + sub r9, r4, #3520 + ldr r3, [r4, #-3540] + sub r5, r4, #3472 + mov r1, r6 + lsl r7, r6, #1 + ldrh r2, [r3, r7] + bl printk + ldrh r0, [r9] + bl FtlGcRefreshOpenBlock + ldrh r0, [r5] + bl FtlGcRefreshOpenBlock + mov r0, r9 + bl allocate_new_data_superblock + mov r0, r5 + movw r5, #4097 + bl allocate_new_data_superblock +.L3684: + subs r5, r5, #1 + beq .L3688 + mov r1, #1 + mov r0, r1 + bl ftl_do_gc + ldr r3, [r4, #-3540] + ldrh r3, [r3, r7] + cmp r3, #0 + bne .L3684 +.L3688: + ldr r3, [r4, #-3540] + mov r1, r6 + ldr r0, .L3697+8 + ldrh r2, [r3, r7] + bl printk + ldr r3, [r4, #-3540] + ldrh r5, [r3, r7] + cmp r5, #0 + bne .L3686 + add r0, sp, #48 + movw r9, #65535 + strh r6, [r0, #-48]! @ movhi + mov r10, #36 + bl make_superblock + movw r3, #2324 + add r0, sp, #14 + ldrh lr, [r8, r3] + mov r2, r5 + ldr r8, [r4, #-3608] + mov ip, r5 +.L3689: + uxth r3, r2 + cmp lr, r3 + bhi .L3691 + ldr r3, [r4, #-3540] + mov r1, r6 + ldr r0, .L3697+12 + ldrh r2, [r3, r7] + bl printk + mov r2, r5 + mov r1, #0 + ldr r0, [r4, #-3608] + bl FlashEraseBlocks + mov r2, r5 + mov r1, #1 + ldr r0, [r4, #-3608] + bl FlashEraseBlocks +.L3686: + mvn r2, #0 + movw r3, #1846 + strh r2, [r4, r3] @ movhi +.L3682: + add sp, sp, #48 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L3691: + ldrh r3, [r0, #2]! + add r2, r2, #1 + cmp r3, r9 + mlane r1, r10, r5, r8 + lslne r3, r3, #10 + addne r5, r5, #1 + uxthne r5, r5 + stmibne r1, {r3, ip} + strne ip, [r1, #12] + b .L3689 +.L3698: + .align 2 +.L3697: + .word .LANCHOR0 + .word .LANCHOR2 + .word .LC164 + .word .LC165 + .fnend + .size ftl_fix_nand_power_lost_error, .-ftl_fix_nand_power_lost_error + .align 2 + .global rk_ftl_garbage_collect + .syntax unified + .arm + .fpu softvfp + .type rk_ftl_garbage_collect, %function +rk_ftl_garbage_collect: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + b ftl_do_gc + .fnend + .size rk_ftl_garbage_collect, .-rk_ftl_garbage_collect + .align 2 + .global ftl_write + .syntax unified + .arm + .fpu softvfp + .type ftl_write, %function +ftl_write: + .fnstart + @ args = 0, pretend = 0, frame = 80 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov fp, r3 + ldr r4, .L3768 + .pad #84 + sub sp, sp, #84 + ldr r3, [r4, #-3612] + cmp r3, #0 + bne .L3741 + mov r9, r2 + ldr r2, .L3768+4 + ldr r2, [r2, #500] + cmp r2, #1 + movne r0, r3 + bne .L3700 + cmp r0, #16 + mov r7, r1 + bne .L3702 + mov r2, fp + mov r1, r9 + add r0, r7, #256 + bl FtlVendorPartWrite +.L3700: + add sp, sp, #84 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L3702: + ldr r10, .L3768+8 + ldr r3, [r10, #2432] + cmp r9, r3 + cmpls r1, r3 + bcs .L3744 + add r6, r1, r9 + cmp r3, r6 + bcc .L3744 + mov r3, #2048 + mov r0, r7 + str r3, [r4, #2012] + movw r3, #2396 + ldrh r5, [r10, r3] + mov r1, r5 + bl __aeabi_uidiv + mov r1, r5 + str r0, [sp, #4] + sub r0, r6, #1 + bl __aeabi_uidiv + ldr r2, [sp, #4] + cmp r9, r5, lsl #1 + ldr r3, [r4, #-3356] + ldr r1, [r10, #2444] + sub r6, r0, r2 + str r0, [sp, #24] + add r8, r6, #1 + add r3, r3, r8 + str r3, [r4, #-3356] + ldr r3, [r4, #-3340] + add r3, r3, r9 + str r3, [r4, #-3340] + movcs r3, #1 + movcc r3, #0 + cmp r1, #0 + str r3, [sp, #16] + beq .L3745 + mov r3, #36 + ldr r2, [r10, #2448] + mul r3, r3, r1 + sub r3, r3, #36 + add r10, r2, r3 + ldr r3, [sp, #4] + ldr r2, [r10, #16] + cmp r3, r2 + strne fp, [sp, #12] + bne .L3705 + ldr r2, [r4, #-3352] + mov r1, r5 + mov r0, r7 + add r2, r2, #1 + str r2, [r4, #-3352] + ldr r2, [r4, #2016] + add r2, r2, #1 + str r2, [r4, #2016] + bl __aeabi_uidivmod + sub r5, r5, r1 + ldr r3, [r10, #8] + cmp r9, r5 + mov r0, r1 + movcc r5, r9 + mov r1, fp + lsl r8, r5, #9 + add r0, r3, r0, lsl #9 + mov r2, r8 + bl ftl_memcpy + cmp r6, #0 + bne .L3706 + ldr r3, [r4, #2016] + cmp r3, #2 + bgt .L3706 +.L3741: + mov r0, #0 + b .L3700 +.L3706: + add r3, fp, r8 + sub r9, r9, r5 + str r3, [sp, #12] + add r7, r7, r5 + ldr r3, [sp, #4] + mov r8, r6 + add r3, r3, #1 + str r3, [sp, #4] +.L3705: + mov r3, #0 + str r3, [r4, #2016] +.L3704: + ldr r1, [sp, #24] + ldr r0, [sp, #4] + bl FtlCacheMetchLpa + cmp r0, #0 + beq .L3707 + bl FtlCacheWriteBack +.L3707: + ldr r6, [sp, #4] + ldr r10, .L3768+8 + ldr r5, .L3768+12 + str r5, [r4, #1992] +.L3708: + cmp r8, #0 + bne .L3736 + ldr r3, [sp, #24] + mov r0, r8 + ldr r2, [sp, #4] + sub r1, r3, r2 + bl ftl_do_gc + ldr r2, .L3768+12 + ldrh r3, [r2, #-4] + mov r4, r2 + cmp r3, #5 + bls .L3737 + cmp r3, #31 + bhi .L3741 + ldr r3, .L3768+8 + ldrb r3, [r3, #36] @ zero_extendqisi2 + cmp r3, #0 + bne .L3741 +.L3737: + ldr r5, .L3768+16 +.L3740: + ldr r3, .L3768+20 + ldrh r2, [r3] + movw r3, #65535 + cmp r2, r3 + bne .L3739 + ldr r3, .L3768+24 + ldrh r3, [r3] + cmp r3, r2 + bne .L3739 + ldrh r2, [r5, #-8] + cmp r2, r3 + bne .L3739 + and r0, r8, #7 + bl List_get_gc_head_node + uxth r0, r0 + bl FtlGcRefreshBlock +.L3739: + ldr r3, .L3768+28 + mov r1, #1 + mov r2, #128 + mov r0, r1 + strh r2, [r3] @ movhi + strh r2, [r3, #-2] @ movhi + bl ftl_do_gc + mov r1, #1 + mov r0, #0 + bl ftl_do_gc + ldr r3, .L3768 + ldr r3, [r3, #-3612] + cmp r3, #0 + bne .L3741 + ldrh r3, [r4, #-4] + cmp r3, #2 + bhi .L3741 + add r8, r8, #1 + cmp r8, #256 + bne .L3740 + b .L3741 +.L3745: + str fp, [sp, #12] + b .L3704 +.L3736: + ldrh r1, [r5, #4] + ldr r4, .L3768 + cmp r1, #0 + bne .L3709 + sub r2, r4, #3520 + ldr fp, .L3768+4 + cmp r5, r2 + bne .L3710 + sub r0, r4, #3472 + ldrh r5, [r0, #4] + cmp r5, #0 + bne .L3711 + bl allocate_new_data_superblock + str r5, [fp, #3448] +.L3711: + ldr r0, .L3768+12 + bl allocate_new_data_superblock + ldr r5, .L3768+12 + ldr r1, [fp, #3448] + add r2, r5, #48 + cmp r1, #0 + movne r5, r2 +.L3712: + ldrh r2, [r5, #4] + cmp r2, #0 + bne .L3713 + mov r0, r5 + bl allocate_new_data_superblock +.L3713: + str r5, [r4, #1992] +.L3709: + ldr r1, [r10, #2444] + ldr r2, [r4, #-540] + sub r2, r2, r1 + ldrh r1, [r5, #4] + cmp r2, r8 + movcs r2, r8 + cmp r1, r2 + movcc r3, r1 + movcs r3, r2 + str r3, [sp, #36] + mov r3, #0 +.L3766: + str r3, [sp, #20] + ldr r3, [sp, #20] + ldr r2, [sp, #36] + cmp r3, r2 + bne .L3732 +.L3715: + ldr r3, [sp, #20] + ldr r1, .L3768 + ldr r2, [r10, #2444] + sub r8, r8, r3 + ldr r3, [sp, #16] + ldr r1, [r1, #-540] + cmp r2, r1 + orrcs r3, r3, #1 + cmp r3, #0 + bne .L3733 + ldrh r2, [r5, #4] + cmp r2, #0 + beq .L3733 +.L3735: + mov r3, #0 + str r3, [sp, #16] + b .L3708 +.L3710: + str r1, [fp, #3448] + ldrh r1, [r2, #4] + cmp r1, #0 + movne r5, r2 + bne .L3713 + mov r0, r5 + bl allocate_new_data_superblock + b .L3712 +.L3732: + ldrh r2, [r5, #4] + cmp r2, #0 + beq .L3715 + ldr r3, [sp, #24] + sub r4, r3, r6 + ldr r3, [sp, #16] + clz r4, r4 + lsr r4, r4, #5 + and r2, r4, r3 + ldr r3, [sp, #20] + cmp r3, #0 + moveq r2, #0 + andne r2, r2, #1 + cmp r2, #0 + beq .L3716 + ldr r3, .L3768+32 + add r2, r7, r9 + ldrh r1, [r3] + mls r2, r1, r6, r2 + cmp r1, r2 + bne .L3715 +.L3716: + mov r2, #0 + add r1, sp, #40 + mov r0, r6 + mov fp, #36 + bl log2phys + mov r0, r5 + bl get_new_active_ppa + ldr r2, .L3768+36 + ldr r1, [r10, #2444] + ldr ip, [r10, #2448] + ldrh r2, [r2] + mla ip, fp, r1, ip + mul lr, r2, r1 + str r0, [ip, #4] + ldr r0, .L3768 + bic r3, lr, #3 + str r6, [ip, #16] + str r3, [sp, #28] + ldr lr, [sp, #28] + ldr r3, [r0, #-492] + ldr r0, [r0, #-512] + str r3, [sp, #32] + add r3, r3, lr + str r3, [sp, #8] + str r3, [ip, #12] + ldr r3, .L3768+40 + ldrh lr, [r3] + mul r1, r1, lr + bic r1, r1, #3 + add r1, r0, r1 + ldr r0, [sp, #8] + str r1, [ip, #8] + mov r1, #0 + bl ftl_memset + ldr r3, [sp, #4] + cmp r3, r6 + orreq r4, r4, #1 + cmp r4, #0 + beq .L3717 + cmp r3, r6 + bne .L3718 + ldr r3, .L3768+32 + mov r0, r7 + ldrh r4, [r3] + mov r1, r4 + bl __aeabi_uidivmod + sub r4, r4, r1 + mov fp, r1 + cmp r4, r9 + movcs r4, r9 +.L3719: + ldr r3, .L3768+32 + ldrh r2, [r3] + cmp r2, r4 + bne .L3720 + ldr r3, [sp, #4] + cmp r3, r6 + mulne r1, r4, r6 + ldrne r3, [sp, #12] + ldreq r1, [sp, #12] + subne r1, r1, r7 + addne r1, r3, r1, lsl #9 + ldr r3, [sp, #16] + cmp r3, #0 + beq .L3722 + ldr r2, [r10, #2444] + mov ip, #36 + ldr r0, [r10, #2448] + mla r2, ip, r2, r0 + str r1, [r2, #8] +.L3723: + ldr r2, .L3768+44 + ldr r3, [sp, #32] + ldr r1, [sp, #28] + strh r2, [r3, r1] @ movhi + ldr r1, .L3768 + ldr r3, [sp, #8] + ldr r2, [r1, #-3328] + str r2, [r3, #4] + add r2, r2, #1 + cmn r2, #1 + ldr r3, [sp, #8] + moveq r2, #0 + str r2, [r1, #-3328] + ldr r2, [sp, #40] + str r6, [r3, #8] + add r6, r6, #1 + str r2, [r3, #12] + ldrh r2, [r5] + strh r2, [r3, #2] @ movhi + ldr r2, [r10, #2444] + ldr r3, [sp, #20] + add r2, r2, #1 + str r2, [r10, #2444] + add r3, r3, #1 + b .L3766 +.L3718: + ldr r3, .L3768+32 + add r4, r7, r9 + mov fp, #0 + ldrh r2, [r3] + smulbb r2, r2, r6 + sub r4, r4, r2 + uxth r4, r4 + b .L3719 +.L3722: + ldr r2, [r10, #2448] + mov ip, #36 + ldr r0, [r10, #2444] + mla r0, ip, r0, r2 + ldr r2, .L3768+40 + ldrh r2, [r2] +.L3767: + ldr r0, [r0, #8] + b .L3764 +.L3720: + ldr r2, [sp, #40] + cmn r2, #1 + beq .L3724 + ldr r1, [r10, #2448] + mov r0, #36 + str r2, [sp, #48] + ldr r2, [r10, #2444] + str r6, [sp, #60] + mla r2, r0, r2, r1 + add r0, sp, #44 + ldr r1, [r2, #8] + ldr r2, [r2, #12] + str r1, [sp, #52] + mov r1, #1 + str r2, [sp, #56] + mov r2, #0 + bl FlashReadPages + ldr r2, [sp, #44] + cmn r2, #1 + ldr r2, .L3768 + ldreq r1, [r2, #-3164] + addeq r1, r1, #1 + streq r1, [r2, #-3164] + beq .L3727 + ldr r3, [sp, #8] + ldr r1, [r3, #8] + cmp r6, r1 + beq .L3727 + ldr r1, [r2, #-3164] + ldr r0, .L3768+48 + add r1, r1, #1 + str r1, [r2, #-3164] + mov r2, r6 + ldr r1, [r3, #8] + bl printk +.L3727: + ldr r3, [sp, #4] + lsl r2, r4, #9 + cmp r3, r6 + bne .L3728 + ldr r0, [r10, #2448] + mov ip, #36 + ldr r1, [r10, #2444] + mla r1, ip, r1, r0 + ldr r0, [r1, #8] + ldr r1, [sp, #12] + add r0, r0, fp, lsl #9 +.L3764: + bl ftl_memcpy + b .L3723 +.L3724: + ldr r2, [r10, #2448] + mov r1, #36 + ldr r0, [r10, #2444] + mla r0, r1, r0, r2 + ldr r2, .L3768+40 + mov r1, #0 + ldrh r2, [r2] + ldr r0, [r0, #8] + bl ftl_memset + b .L3727 +.L3728: + ldr r3, .L3768+32 + mov lr, #36 + ldr r0, [r10, #2444] + ldr ip, [r10, #2448] + ldrh r1, [r3] + ldr r3, [sp, #12] + mla r0, lr, r0, ip + mul r1, r6, r1 + sub r1, r1, r7 + add r1, r3, r1, lsl #9 + b .L3767 +.L3717: + ldr r3, [sp, #16] + cmp r3, #0 + beq .L3729 + ldr r2, [r10, #2444] + ldr r1, [r10, #2448] + ldr r3, .L3768+32 + mla fp, fp, r2, r1 + ldrh r2, [r3] + ldr r3, [sp, #12] + mul r2, r6, r2 + sub r2, r2, r7 + add r2, r3, r2, lsl #9 + str r2, [fp, #8] + b .L3723 +.L3729: + ldr r3, .L3768+32 + ldr r2, [r10, #2444] + ldr r0, [r10, #2448] + ldrh r1, [r3] + mla fp, fp, r2, r0 + ldrh r2, [r3, #4] + ldr r3, [sp, #12] + mul r1, r6, r1 + ldr r0, [fp, #8] + sub r1, r1, r7 + add r1, r3, r1, lsl #9 + b .L3764 +.L3733: + bl FtlCacheWriteBack + cmp r8, #1 + mov r2, #0 + str r2, [r10, #2444] + bhi .L3708 + b .L3735 +.L3744: + mvn r0, #0 + b .L3700 +.L3769: + .align 2 +.L3768: + .word .LANCHOR2 + .word .LANCHOR1 + .word .LANCHOR0 + .word .LANCHOR2-3520 + .word .LANCHOR2-2656 + .word .LANCHOR2-3284 + .word .LANCHOR2-2666 + .word .LANCHOR2-2718 + .word .LANCHOR0+2396 + .word .LANCHOR0+2402 + .word .LANCHOR0+2400 + .word -3947 + .word .LC166 + .fnend + .size ftl_write, .-ftl_write + .align 2 + .global ftl_vendor_write + .syntax unified + .arm + .fpu softvfp + .type ftl_vendor_write, %function +ftl_vendor_write: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + mov r3, r2 + mov r2, r1 + mov r1, r0 + mov r0, #16 + b ftl_write + .fnend + .size ftl_vendor_write, .-ftl_vendor_write + .align 2 + .global FlashBootVendorWrite + .syntax unified + .arm + .fpu softvfp + .type FlashBootVendorWrite, %function +FlashBootVendorWrite: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + mov r4, r0 + mov r5, r1 + mov r6, r2 + bl rknand_device_lock + ldr r3, .L3775 + ldr r3, [r3, #500] + cmp r3, #1 + mvnne r4, #0 + bne .L3772 + mov r0, r4 + mov r2, r6 + mov r1, r5 + bl ftl_vendor_write + mov r4, r0 +.L3772: + bl rknand_device_unlock + mov r0, r4 + pop {r4, r5, r6, pc} +.L3776: + .align 2 +.L3775: + .word .LANCHOR1 + .fnend + .size FlashBootVendorWrite, .-FlashBootVendorWrite + .align 2 + .global ftl_sys_write + .syntax unified + .arm + .fpu softvfp + .type ftl_sys_write, %function +ftl_sys_write: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + mov r3, r2 + mov r2, r1 + add r1, r0, #256 + mov r0, #16 + b ftl_write + .fnend + .size ftl_sys_write, .-ftl_sys_write + .align 2 + .global StorageSysDataStore + .syntax unified + .arm + .fpu softvfp + .type StorageSysDataStore, %function +StorageSysDataStore: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + mov r5, r1 + mov r4, r0 + bl rknand_device_lock + mov r2, r5 + mov r1, #1 + mov r0, r4 + bl ftl_sys_write + mov r4, r0 + bl rknand_device_unlock + mov r0, r4 + pop {r4, r5, r6, pc} + .fnend + .size StorageSysDataStore, .-StorageSysDataStore + .align 2 + .global FtlDumpSysBlock + .syntax unified + .arm + .fpu softvfp + .type FtlDumpSysBlock, %function +FtlDumpSysBlock: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + lsl r8, r0, #10 + ldr r4, .L3788 + .pad #24 + sub sp, sp, #24 + mov r6, r0 + mov r5, #0 + ldr r7, .L3788+4 + ldr r3, [r4, #-524] + add r9, r4, #1760 + ldr r10, .L3788+8 + str r3, [r4, #1768] + ldr r3, [r4, #-500] + str r3, [r4, #1772] +.L3781: + ldrh r2, [r7] + sxth r3, r5 + cmp r3, r2 + blt .L3783 + add sp, sp, #24 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L3783: + mov r2, #1 + orr r3, r3, r8 + mov r1, r2 + mov r0, r9 + str r3, [r4, #1764] + bl FlashReadPages + ldr r2, [r4, #1768] + mov r1, r6 + ldr r3, [r4, #1772] + mov r0, r10 + ldr r2, [r2] + str r2, [sp, #16] + ldr r2, [r3, #12] + str r2, [sp, #12] + ldr r2, [r3, #8] + str r2, [sp, #8] + ldr r2, [r3, #4] + str r2, [sp, #4] + ldr r3, [r3] + ldr r2, [r4, #1760] + str r3, [sp] + ldr r3, [r4, #1764] + bl printk + ldr r3, [r4, #1772] + ldr r3, [r3] + cmn r3, #1 + beq .L3782 + mov r3, #768 + mov r2, #4 + ldr r1, [r4, #-524] + ldr r0, .L3788+12 + bl rknand_print_hex +.L3782: + add r5, r5, #1 + b .L3781 +.L3789: + .align 2 +.L3788: + .word .LANCHOR2 + .word .LANCHOR0+2392 + .word .LC167 + .word .LC168 + .fnend + .size FtlDumpSysBlock, .-FtlDumpSysBlock + .align 2 + .global dump_map_info + .syntax unified + .arm + .fpu softvfp + .type dump_map_info, %function +dump_map_info: + .fnstart + @ args = 0, pretend = 0, frame = 16 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L3805 + movw r2, #2332 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #44 + sub sp, sp, #44 + ldrh r6, [r3, r2] + str r3, [sp, #24] +.L3791: + ldr r3, .L3805+4 + ldr r4, .L3805+8 + ldrh r3, [r3] + cmp r3, r6 + bhi .L3798 + ldr r10, .L3805+12 + mov r7, #0 + sub r9, r4, #388 + add fp, r4, #1760 +.L3799: + ldrh r3, [r9] + sxth r5, r7 + cmp r5, r3 + bge .L3802 + lsl r5, r5, #1 + mov r6, #0 + ldr r8, .L3805+16 + b .L3803 +.L3793: + str r3, [sp, #32] + mov r1, r6 + ldr r3, .L3805+20 + str r2, [sp, #36] + ldrb r0, [r3, r7] @ zero_extendqisi2 + bl V2P_block + str r0, [sp, #28] + bl FtlBbmIsBadBlock + cmp r0, #0 + ldr r3, [sp, #32] + ldr r2, [sp, #36] + bne .L3792 + ldr r1, [sp, #28] + mla r0, r2, r5, r8 + lsl r1, r1, #10 + stmib r0, {r1, fp} + mul r1, r9, r5 + add r5, r5, #1 + uxth r5, r5 + add ip, r1, #3 + cmp r1, #0 + movlt r1, ip + bic r1, r1, #3 + add r1, r10, r1 + str r1, [r0, #12] +.L3792: + add r7, r7, #1 +.L3800: + uxth r1, r7 + cmp r3, r1 + bhi .L3793 + cmp r5, #0 + bne .L3794 +.L3797: + add r6, r6, #1 + uxth r6, r6 + b .L3791 +.L3794: + ldr r9, .L3805+24 + mov r0, r8 + mov r7, #0 + mov r8, #36 + mov r2, #1 + mov r1, r5 + bl FlashReadPages +.L3795: + uxth r3, r7 + cmp r5, r3 + bls .L3797 + ldr r3, [r4, #-536] + mla r3, r8, r7, r3 + add r7, r7, #1 + ldr r1, [r3, #12] + ldr r2, [r3, #4] + ldr r3, [r3, #8] + ldr r0, [r3, #4] + str r0, [sp, #16] + mov r0, r9 + ldr r3, [r3] + str r3, [sp, #12] + ldr r3, [r1, #12] + str r3, [sp, #8] + ldr r3, [r1, #8] + str r3, [sp, #4] + ldr r3, [r1, #4] + str r3, [sp] + ldr r3, [r1] + ubfx r1, r2, #10, #16 + bl printk + b .L3795 +.L3798: + ldr r2, .L3805+28 + mov r7, #0 + ldr r8, [r4, #-536] + mov r5, r7 + ldr fp, [r4, #-2696] + ldrh r3, [r2] + ldrh r9, [r2, #78] + mov r2, #36 + ldr r10, [r4, #-2692] + b .L3800 +.L3801: + ldr r2, [r4, #-472] + mov r0, fp + ldrh r2, [r2, r5] + orr r3, r3, r2, lsl #10 + mov r2, #1 + mov r1, r2 + str r3, [r4, #1764] + bl FlashReadPages + ldr r2, [r4, #1768] + ldr r1, [r4, #-472] + ldr r3, [r4, #1772] + ldr r0, [r2, #4] + ldrh r1, [r1, r5] + str r0, [sp, #20] + mov r0, r8 + ldr r2, [r2] + str r2, [sp, #16] + ldr r2, [r3, #12] + str r2, [sp, #12] + ldr r2, [r3, #8] + str r2, [sp, #8] + ldr r2, [r3, #4] + str r2, [sp, #4] + ldr r3, [r3] + ldr r2, [r4, #1760] + str r3, [sp] + ldr r3, [r4, #1764] + bl printk +.L3803: + ldrh r2, [r10] + sxth r3, r6 + add r6, r6, #1 + cmp r3, r2 + blt .L3801 + add r7, r7, #1 + b .L3799 +.L3802: + ldr r3, [sp, #24] + mov r2, #2 + ldr r1, [r4, #-472] + movw r5, #2428 + ldr r0, .L3805+32 + ldr r3, [r3, #2420] + bl rknand_print_hex + ldr r3, [sp, #24] + mov r2, #4 + ldr r1, [r4, #-452] + ldr r0, .L3805+36 + ldrh r3, [r3, r5] + bl rknand_print_hex + ldr r3, [sp, #24] + mov r2, #4 + ldr r1, [r4, #-448] + ldr r0, .L3805+40 + ldrh r3, [r3, r5] + add sp, sp, #44 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, lr} + b rknand_print_hex +.L3806: + .align 2 +.L3805: + .word .LANCHOR0 + .word .LANCHOR0+2334 + .word .LANCHOR2 + .word .LANCHOR0+2392 + .word .LC113 + .word .LANCHOR0+2350 + .word .LC169 + .word .LANCHOR0+2324 + .word .LC170 + .word .LC171 + .word .LC172 + .fnend + .size dump_map_info, .-dump_map_info + .align 2 + .global flash_boot_enter_slc_mode + .syntax unified + .arm + .fpu softvfp + .type flash_boot_enter_slc_mode, %function +flash_boot_enter_slc_mode: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L3809 + ldr r2, [r3, #2268] + ldr r3, .L3809+4 + cmp r2, r3 + bxne lr + b flash_enter_slc_mode +.L3810: + .align 2 +.L3809: + .word .LANCHOR0 + .word 1446522928 + .fnend + .size flash_boot_enter_slc_mode, .-flash_boot_enter_slc_mode + .align 2 + .global flash_boot_exit_slc_mode + .syntax unified + .arm + .fpu softvfp + .type flash_boot_exit_slc_mode, %function +flash_boot_exit_slc_mode: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L3813 + ldr r2, [r3, #2268] + ldr r3, .L3813+4 + cmp r2, r3 + bxne lr + b flash_exit_slc_mode +.L3814: + .align 2 +.L3813: + .word .LANCHOR0 + .word 1446522928 + .fnend + .size flash_boot_exit_slc_mode, .-flash_boot_exit_slc_mode + .align 2 + .global write_idblock + .syntax unified + .arm + .fpu softvfp + .type write_idblock, %function +write_idblock: + .fnstart + @ args = 0, pretend = 0, frame = 112 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r6, r0 + ldr r4, .L3864 + .pad #124 + sub sp, sp, #124 + mov r0, #256000 + mov r10, r1 + mov r5, r2 + ldr r3, [r4, #48] + ldr r8, [r4, #40] + ldrb r7, [r3, #9] @ zero_extendqisi2 + bl ftl_malloc + subs r3, r0, #0 + str r3, [sp, #8] + beq .L3842 + add r0, r6, #508 + add r0, r0, #3 + lsr r9, r0, #9 + cmp r9, #8 + bls .L3840 + cmp r9, #500 + bhi .L3842 +.L3817: + ldr r2, [r10] + ldr r3, .L3864+4 + cmp r2, r3 + bne .L3842 + smulbb r7, r7, r8 + uxth fp, r7 + sub r0, fp, #1 + mov r1, fp + add r0, r0, r9 + bl __aeabi_uidiv + str r0, [sp, #32] + add r0, r10, #254976 + add r0, r0, #512 + mov r3, #0 + movw r2, #63871 +.L3821: + ldr r1, [r0, #-4]! + cmp r1, #0 + bne .L3818 + ldr r1, [r10, r3, lsl #2] + add r3, r3, #1 + cmp r3, #4096 + sub r2, r2, #1 + movhi r3, #0 + cmp r2, #4096 + str r1, [r0, #512] + bne .L3821 +.L3820: + mov r3, #5 + mov r1, r5 + mov r2, #4 + ldr r0, .L3864+8 + bl rknand_print_hex + ldrb r2, [r4, #37] @ zero_extendqisi2 + sub r5, r5, #4 + ldr r1, [r10, #512] + ldr r0, .L3864+12 + bl printk + ldr r2, .L3864+16 + mov r1, r9 + ldrh r3, [r4, #150] + ldr r0, .L3864+20 + ldr r2, [r2, #1716] + str r2, [sp] + mov r2, r9 + bl printk + ldrb r3, [r4, #37] @ zero_extendqisi2 + ldr r2, [r10, #512] + ldr r4, .L3864 + cmp r2, r3 + strhi r3, [r10, #512] + lsl r3, r9, #7 + str r3, [sp, #40] + mov r3, #0 + str r3, [sp, #20] + str r3, [sp, #12] +.L3838: + ldr r2, [r5, #4] + ldrb r3, [r4, #37] @ zero_extendqisi2 + cmp r2, r3 + bcs .L3823 + ldr r3, .L3864+16 + ldr r3, [r3, #1716] + cmp r2, r3 + bcc .L3823 + ldr r3, [sp, #32] + ldr r1, [sp, #12] + cmp r1, #0 + cmpne r3, #1 + bls .L3824 + ldr r3, [r5] + add r3, r3, #1 + cmp r2, r3 + beq .L3823 +.L3824: + mov r2, #512 + mov r1, #0 + ldr r0, [sp, #8] + bl memset + ldr r3, [r4, #48] + mov r2, r9 + ldr r6, [r5, #4] + ldr r7, [r4, #40] + ldrb r3, [r3, #9] @ zero_extendqisi2 + ldr r0, .L3864+24 + mul r6, r6, fp + str r3, [sp, #16] + ldrh r3, [sp, #16] + mov r1, r6 + smulbb r7, r7, r3 + bl printk + mov r0, #0 + uxth r7, r7 + bl flash_boot_enter_slc_mode + mov r0, r6 + ldr r1, [sp, #16] + bl __aeabi_uidiv + mov r2, #0 + mov r1, r0 + mov r0, r2 + bl FlashEraseBlock + cmp r7, r9 + movcs r8, #1 + bcs .L3825 + mov r2, #0 + mov r8, #2 + add r1, r6, r7 + mov r0, r2 + bl FlashEraseBlock +.L3825: + mov r0, #0 + bl flash_boot_exit_slc_mode + ldr r3, [r4, #48] + ldrh r0, [r3, #10] + ldrb r1, [r3, #12] @ zero_extendqisi2 + lsl r0, r0, #2 + mul r0, r8, r0 + mov r8, #0 + bl __aeabi_idiv + mov r1, r7 + str r0, [sp, #44] + mov r0, r6 + bl __aeabi_uidivmod + sub r3, r6, r1 + str r1, [sp, #28] + str r3, [sp, #36] + str r10, [sp, #24] +.L3826: + ldr r3, [sp, #44] + cmp r3, r8 + bhi .L3830 + mov r1, r6 + mov r3, #0 + mov r2, r9 + ldr r0, .L3864+28 + bl printk + ldr r3, [r4, #48] + mov r2, r9 + ldr r6, [r5, #4] + mov r8, #0 + ldr r7, [r4, #40] + ldrb r3, [r3, #9] @ zero_extendqisi2 + ldr r0, .L3864+32 + mul r6, r6, fp + str r3, [sp, #16] + ldrh r3, [sp, #16] + mov r1, r6 + smulbb r7, r7, r3 + bl printk + uxth r7, r7 + mov r0, r6 + mov r1, r7 + bl __aeabi_uidivmod + sub r3, r6, r1 + ldr r2, [sp, #8] + str r3, [sp, #36] + ldr r3, [sp, #16] + str r1, [sp, #24] + str r2, [sp, #28] + mul r3, r3, r1 + ubfx r3, r3, #2, #2 +.L3831: + cmp r8, r9 + bcc .L3833 + mov r3, #0 + mov r2, r9 + mov r1, r6 + ldr r0, .L3864+36 + bl printk + ldr r2, [sp, #8] + mov r3, r10 + mov r6, #0 +.L3836: + mov r7, r2 + mov r8, r3 + ldr r0, [r7] + add r2, r2, #4 + ldr r1, [r8] + add r3, r3, #4 + cmp r0, r1 + beq .L3834 + mov r2, #512 + mov r1, #0 + ldr r0, [sp, #8] + bl memset + ldr r3, [r8] + ldr r1, [sp, #12] + ldr r0, .L3864+40 + str r3, [sp, #4] + ldr r3, [r7] + str r3, [sp] + mov r3, r6 + bic r6, r6, #255 + ldr r2, [r5, #4] + lsl r6, r6, #2 + bl printk + mov r3, #256 + mov r2, #4 + add r1, r10, r6 + ldr r0, .L3864+44 + bl rknand_print_hex + ldr r1, [sp, #8] + mov r3, #256 + mov r2, #4 + ldr r0, .L3864+48 + add r1, r1, r6 + bl rknand_print_hex + mov r0, #0 + bl flash_boot_enter_slc_mode + ldr r1, [r5, #4] + mov r2, #0 + mov r0, r2 + mul r1, r1, fp + bl FlashEraseBlock + ldr r3, [sp, #32] + cmp r3, #1 + bls .L3835 + ldr r1, [r5, #4] + mov r2, #0 + mov r0, r2 + mla r1, r1, fp, fp + bl FlashEraseBlock +.L3835: + mov r0, #0 + bl flash_boot_exit_slc_mode + ldr r1, [r5, #4] + ldr r0, .L3864+52 + bl printk +.L3823: + ldr r3, [sp, #12] + add r5, r5, #4 + add r3, r3, #1 + cmp r3, #5 + str r3, [sp, #12] + bne .L3838 + ldr r0, [sp, #8] + bl ftl_free + ldr r3, [sp, #20] + clz r0, r3 + lsr r0, r0, #5 + rsb r0, r0, #0 +.L3815: + add sp, sp, #124 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L3840: + mov r9, #8 + b .L3817 +.L3818: + ldr r0, .L3864+56 + bl printk + b .L3820 +.L3830: + ldr r3, [sp, #28] + add r2, r3, r8 + lsrs r2, r2, #2 + beq .L3827 + ldrb r0, [r4, #152] @ zero_extendqisi2 + add r1, r2, #1 + add r3, r4, r1, lsl #1 + cmp r0, #0 + ldrh r3, [r3, #156] + beq .L3828 + ldr r0, [r4, #2268] + ldr ip, .L3864+60 + cmp r0, ip + moveq r3, r1 +.L3828: + sub r3, r3, #-1073741823 + lsl r3, r3, #2 + str r3, [sp, #56] +.L3827: + movw r3, #61424 + str r3, [sp, #60] + add r3, r4, r2, lsl #1 + ldrh r7, [r3, #156] + ldrb r3, [r4, #152] @ zero_extendqisi2 + cmp r3, #0 + beq .L3829 + ldr r3, [r4, #2268] + ldr r1, .L3864+60 + cmp r3, r1 + moveq r7, r2 +.L3829: + ldr r2, [sp, #36] + add r8, r8, #4 + ldr r3, [sp, #16] + uxth r8, r8 + mla r3, r7, r3, r2 + ldr r2, .L3864+16 + add r7, r7, #1 + ldrb r0, [r2, #1722] @ zero_extendqisi2 + uxth r7, r7 + str r3, [sp, #52] + ldrb r3, [r4, #2316] @ zero_extendqisi2 + str r3, [sp, #48] + bl FlashBchSel + mov r0, #0 + bl flash_boot_enter_slc_mode + ldr r2, [r4, #48] + ldr r3, [sp, #52] + ldrb r1, [r2, #9] @ zero_extendqisi2 + mov r0, r3 + bl __aeabi_uidiv + add r3, sp, #56 + ldr r2, [sp, #24] + mov r1, r0 + mov r0, #0 + bl FlashProgPage + mov r0, #0 + bl flash_boot_exit_slc_mode + ldr r0, [sp, #48] + bl FlashBchSel + ldr r1, [sp, #16] + ldr r0, [sp, #36] + bl __aeabi_uidiv + mov r2, r7 + mov r1, r0 + mov r0, #0 + bl FlashPageProgMsbFFData + ldr r3, [sp, #24] + add r3, r3, #2048 + str r3, [sp, #24] + b .L3826 +.L3833: + ldr r2, [sp, #24] + rsb r7, r3, #4 + ldrb r0, [r4, #152] @ zero_extendqisi2 + uxth r7, r7 + add r2, r2, r8 + lsr r2, r2, #2 + cmp r0, #0 + add r1, r4, r2, lsl #1 + ldrh r1, [r1, #156] + beq .L3832 + ldr r0, [r4, #2268] + ldr ip, .L3864+60 + cmp r0, ip + moveq r1, r2 +.L3832: + ldr r2, [sp, #36] + add r8, r7, r8 + uxth r8, r8 + add r3, r3, r2 + ldr r2, [sp, #16] + mla r3, r1, r2, r3 + ldr r2, [r4, #48] + ldrb r1, [r2, #9] @ zero_extendqisi2 + ldr r2, .L3864+16 + str r3, [sp, #52] + ldrb r3, [r4, #2316] @ zero_extendqisi2 + ldrb r0, [r2, #1722] @ zero_extendqisi2 + str r1, [sp, #48] + str r3, [sp, #44] + bl FlashBchSel + mov r0, #0 + bl flash_boot_enter_slc_mode + ldr r3, [sp, #52] + ldr r1, [sp, #48] + mov r0, r3 + bl __aeabi_uidiv + mov r3, #0 + mov r1, r0 + ldr r2, [sp, #28] + mov r0, r3 + bl FlashReadPage + mov r0, #0 + bl flash_boot_exit_slc_mode + ldr r0, [sp, #44] + bl FlashBchSel + ldr r3, [sp, #28] + add r3, r3, r7, lsl #9 + str r3, [sp, #28] + mov r3, #0 + b .L3831 +.L3834: + ldr r1, [sp, #40] + add r6, r6, #1 + cmp r1, r6 + bne .L3836 + ldr r3, [sp, #20] + add r3, r3, #1 + str r3, [sp, #20] + b .L3823 +.L3842: + mvn r0, #0 + b .L3815 +.L3865: + .align 2 +.L3864: + .word .LANCHOR0 + .word -52655045 + .word .LC174 + .word .LC175 + .word .LANCHOR2 + .word .LC176 + .word .LC177 + .word .LC178 + .word .LC179 + .word .LC180 + .word .LC181 + .word .LC182 + .word .LC183 + .word .LC184 + .word .LC173 + .word 1446522928 + .fnend + .size write_idblock, .-write_idblock + .align 2 + .global write_loader_lba + .syntax unified + .arm + .fpu softvfp + .type write_loader_lba, %function +write_loader_lba: + .fnstart + @ args = 0, pretend = 0, frame = 40 + @ frame_needed = 0, uses_anonymous_args = 0 + cmp r0, #64 + push {r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + mov r5, r0 + .pad #48 + sub sp, sp, #48 + mov r6, r1 + mov r8, r2 + ldr r4, .L3890 + bne .L3867 + ldr r2, [r2] + ldr r3, .L3890+4 + cmp r2, r3 + bne .L3867 + mov r3, #1 + mov r0, #256000 + strb r3, [r4, #2020] + bl ftl_malloc + mov r2, #256000 + mov r1, #0 + str r0, [r4, #2024] + bl ftl_memset + str r5, [r4, #2028] +.L3867: + str r6, [sp] + mov r3, r5 + ldr r2, [r8] + ldr r1, [r4, #2024] + ldr r0, .L3890+8 + bl printk + ldrb r3, [r4, #2020] @ zero_extendqisi2 + cmp r3, #0 + beq .L3866 + sub r0, r5, #64 + ldr r7, [r4, #2024] + cmp r0, #500 + bcs .L3869 + rsb r2, r5, #564 + mov r1, r8 + cmp r6, r2 + add r0, r7, r0, lsl #9 + movcc r2, r6 + lsl r2, r2, #9 + bl ftl_memcpy +.L3870: + ldr r3, [r4, #2028] + cmp r5, r3 + beq .L3879 + mov r3, #0 + cmp r7, r3 + strb r3, [r4, #2020] + mov r8, r3 + beq .L3880 + mov r0, r7 + bl ftl_free +.L3880: + str r8, [r4, #2024] + b .L3879 +.L3869: + cmp r5, #564 + bcc .L3870 + ldr r3, .L3890+12 + ldr r0, [r4, #2028] + ldr r3, [r3, #48] + sub r0, r0, #64 + cmp r0, #500 + ldrb r3, [r3, #9] @ zero_extendqisi2 + movcs r0, #500 + cmp r3, #4 + beq .L3871 + mov r3, #2 + str r3, [sp, #8] + mov r3, #3 + str r3, [sp, #12] + mov r3, #4 + str r3, [sp, #16] + mov r3, #5 + str r3, [sp, #20] + mov r3, #6 + str r3, [sp, #24] +.L3872: + movw r3, #63872 +.L3878: + ldr r2, [r7, r3, lsl #2] + cmp r2, #0 + beq .L3876 + add r3, r3, #128 + lsl r0, r3, #2 +.L3877: + mov r1, r7 + add r2, sp, #8 + mov r7, #0 + bl write_idblock + ldr r0, [r4, #2024] + strb r7, [r4, #2020] + bl ftl_free + str r7, [r4, #2024] +.L3879: + add r5, r5, r6 + str r5, [r4, #2028] +.L3866: + add sp, sp, #48 + @ sp needed + pop {r4, r5, r6, r7, r8, pc} +.L3871: + mov r2, #0 + add r3, sp, #8 +.L3875: + cmp r0, #256 + lslhi r1, r2, #1 + strls r2, [r3, r2, lsl #2] + strhi r1, [r3, r2, lsl #2] + add r2, r2, #1 + cmp r2, #5 + bne .L3875 + b .L3872 +.L3876: + sub r3, r3, #1 + cmp r3, #4096 + bne .L3878 + lsl r0, r0, #9 + b .L3877 +.L3891: + .align 2 +.L3890: + .word .LANCHOR2 + .word -52655045 + .word .LC185 + .word .LANCHOR0 + .fnend + .size write_loader_lba, .-write_loader_lba + .align 2 + .global FtlWrite + .syntax unified + .arm + .fpu softvfp + .type FtlWrite, %function +FtlWrite: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + mov r6, r2 + sub r2, r1, #64 + mov r4, r1 + cmp r2, #1984 + mov r7, r3 + movcs r2, #0 + movcc r2, #1 + cmp r0, #0 + mov r5, r0 + movne r2, #0 + cmp r2, #0 + beq .L3893 + mov r2, r3 + mov r1, r6 + mov r0, r4 + bl write_loader_lba +.L3893: + mov r3, r7 + mov r2, r6 + mov r1, r4 + mov r0, r5 + pop {r4, r5, r6, r7, r8, lr} + b ftl_write + .fnend + .size FtlWrite, .-FtlWrite + .align 2 + .global rknand_sys_storage_ioctl + .syntax unified + .arm + .fpu softvfp + .type rknand_sys_storage_ioctl, %function +rknand_sys_storage_ioctl: + .fnstart + @ args = 0, pretend = 0, frame = 520 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L3955 + push {r4, r5, r6, r7, lr} + .save {r4, r5, r6, r7, lr} + mov r4, r1 + .pad #524 + sub sp, sp, #524 + mov r5, r2 + cmp r1, r3 + beq .L3900 + bhi .L3901 + sub r3, r3, #2080 + sub r3, r3, #6 + cmp r1, r3 + beq .L3902 + bhi .L3903 + sub r3, r3, #238 + cmp r1, r3 + beq .L3904 + add r3, r3, #237 + cmp r1, r3 + beq .L3905 +.L3935: + mvn r4, #21 + b .L3898 +.L3903: + ldr r3, .L3955+4 + cmp r1, r3 + beq .L3906 + add r3, r3, #1 + cmp r1, r3 + beq .L3907 + sub r3, r3, #124 + cmp r1, r3 + bne .L3935 + ldr r0, .L3955+8 + bl printk + mov r2, #520 + mov r1, r5 + mov r0, sp + bl rk_copy_from_user + cmp r0, #0 + bne .L3918 + ldr r2, [sp] + ldr r3, .L3955+12 + cmp r2, r3 + bne .L3915 + ldr r2, [sp, #4] + cmp r2, #512 + ldrls r1, .L3955+16 + bhi .L3915 +.L3953: + add r0, sp, #8 + bl memcpy + b .L3947 +.L3901: + ldr r3, .L3955+20 + cmp r1, r3 + mov r6, r3 + beq .L3909 + bhi .L3910 + sub r3, r3, #2512 + sub r3, r3, #14 + cmp r1, r3 + beq .L3900 + add r3, r3, #10 + cmp r1, r3 + bne .L3935 +.L3900: + ldr r3, .L3955+24 + cmp r4, r3 + mov r7, r3 + ldreq r0, .L3955+28 + beq .L3949 + ldr r3, .L3955+32 + cmp r4, r3 + ldreq r0, .L3955+36 + ldrne r0, .L3955+40 +.L3949: + bl printk + mov r2, #520 + mov r1, r5 + mov r0, sp + bl rk_copy_from_user + cmp r0, #0 + bne .L3918 + ldr r2, [sp] + ldr r3, .L3955+44 + cmp r2, r3 + bne .L3952 + ldr r3, .L3955+32 + ldr r6, .L3955+48 + cmp r4, r3 + bne .L3928 + ldr r3, [r6, #2032] + mov r2, #16 + mov r1, sp + mov r0, r5 + ldr r3, [r3, #20] + str r3, [sp, #4] + strb r3, [sp, #8] + bl rk_copy_to_user + cmp r0, #0 + bne .L3952 +.L3919: + mov r4, #0 +.L3898: + mov r0, r4 + add sp, sp, #524 + @ sp needed + pop {r4, r5, r6, r7, pc} +.L3910: + ldr r3, .L3955+52 + cmp r1, r3 + beq .L3909 + bcc .L3911 + add r3, r3, #1 + cmp r1, r3 + bne .L3935 +.L3911: + ldr r0, .L3955+56 + bl printk + mov r2, #520 + mov r1, r5 + mov r0, sp + bl rk_copy_from_user + cmp r0, #0 + bne .L3918 + ldr r2, [sp] + ldr r3, .L3955+60 + cmp r2, r3 + bne .L3915 + ldr r2, [sp, #4] + cmp r2, #504 + bhi .L3915 + ldr r3, .L3955+64 + mov r1, sp + add r2, r2, #8 + cmp r4, r3 + ldr r4, .L3955+48 + bne .L3934 + ldr r0, [r4, #2564] + bl memcpy + ldr r1, [r4, #2564] + mov r0, #2 + b .L3950 +.L3905: + ldr r0, .L3955+68 + bl printk + mov r2, #520 + mov r1, r5 + mov r0, sp + bl rk_copy_from_user + cmp r0, #0 + beq .L3912 +.L3918: + ldr r0, .L3955+72 + bl printk +.L3952: + mvn r4, #13 + b .L3898 +.L3912: + ldr r2, [sp] + ldr r3, .L3955+76 + cmp r2, r3 + beq .L3913 +.L3915: + mvn r4, #0 +.L3914: + mov r1, r4 + ldr r0, .L3955+80 + bl printk + b .L3898 +.L3913: + ldr r3, [sp, #4] + cmp r3, #512 + bhi .L3915 + ldr r4, .L3955+48 + mov r2, #512 + mov r0, sp + ldr r1, [r4, #2032] + bl memcpy + ldr r2, [r4, #2036] + ldr r3, .L3955+84 + cmp r2, r3 + beq .L3916 + mov r1, #0 + mov r2, #128 + add r0, sp, #64 + str r1, [sp, #8] + str r1, [sp, #12] + bl memset +.L3916: + mov r2, #256 + mov r1, #0 + add r0, sp, r2 + str r1, [sp, #16] + bl memset +.L3947: + mov r2, #520 + mov r1, sp + mov r0, r5 + bl rk_copy_to_user + cmp r0, #0 + bne .L3952 +.L3951: + mov r4, #0 + b .L3914 +.L3902: + ldr r0, .L3955+88 + bl printk + mov r2, #520 + mov r1, r5 + mov r0, sp + bl rk_copy_from_user + cmp r0, #0 + bne .L3918 + ldr r2, [sp] + ldr r3, .L3955+76 + cmp r2, r3 + bne .L3915 + ldr r3, [sp, #4] + cmp r3, #512 + bhi .L3915 + ldr r2, .L3955+48 + ldr r3, .L3955+84 + ldr r1, [r2, #2036] + cmp r1, r3 + mvnne r4, #1 + bne .L3898 + ldr r3, [sp, #12] + sub r1, r3, #1 + cmp r1, #127 + mvnhi r4, #2 + bhi .L3898 + ldr r4, [r2, #2032] + add r1, sp, #64 + str r3, [r4, #12] + add r0, r4, #64 + ldr r2, [sp, #12] + bl memcpy + mov r1, r4 + mov r0, #1 +.L3950: + bl StorageSysDataStore + mov r4, r0 + b .L3914 +.L3907: + ldr r0, .L3955+92 + bl printk + mov r2, #520 + mov r1, r5 + mov r0, sp + bl rk_copy_from_user + cmp r0, #0 + bne .L3918 + ldr r2, [sp] + ldr r3, .L3955+96 + cmp r2, r3 + bne .L3915 + ldr r3, [sp, #4] + cmp r3, #512 + bhi .L3915 + ldr r5, .L3955+48 + ldr r3, [r5, #2040] + cmp r3, #0 + beq .L3919 + ldr r3, [r5, #2044] + ldr r2, .L3955+100 + ldr r1, [r3] + cmp r1, r2 + beq .L3920 + str r2, [r3] + mov r2, #504 + ldr r3, [r5, #2044] + str r2, [r3, #4] + mov r2, #0 + str r2, [r3, #8] + str r2, [r3, #12] +.L3920: + ldr r1, [r5, #2044] + mov r4, #0 + mov r0, r4 + str r4, [r1, #16] + bl StorageSysDataStore + ldr r3, [r5, #2032] + ldr r2, .L3955+76 + ldr r1, [r3] + cmp r1, r2 + strne r2, [r3] + movne r2, #504 + ldrne r3, [r5, #2032] + ldr r6, [r5, #2032] + stmibne r3, {r2, r4} + mov r4, #0 + mov r2, #128 + mov r1, r4 + str r4, [r6, #12] + add r0, r6, #64 + bl memset + mov r1, r6 + mov r0, #1 + bl StorageSysDataStore + str r4, [r5, #2040] + str r4, [r5, #2036] + b .L3914 +.L3906: + ldr r0, .L3955+104 + bl printk + mov r2, #520 + mov r1, r5 + mov r0, sp + bl rk_copy_from_user + cmp r0, #0 + bne .L3918 + ldr r2, [sp] + ldr r3, .L3955+108 + cmp r2, r3 + bne .L3915 + ldr r3, [sp, #4] + cmp r3, #512 + bhi .L3915 + ldr r5, .L3955+48 + ldr r3, [r5, #2040] + cmp r3, #1 + beq .L3919 + ldr r2, [r5, #2044] + ldr r3, .L3955+100 + ldr r1, [r2] + cmp r1, r3 + beq .L3922 + str r3, [r2] + mov r2, #504 + ldr r3, [r5, #2044] + str r2, [r3, #4] + mov r2, #0 + str r2, [r3, #8] + str r2, [r3, #12] +.L3922: + ldr r1, [r5, #2044] + mov r3, #1 + mov r0, #0 + mov r4, #0 + str r3, [r1, #16] + bl StorageSysDataStore + ldr r3, [r5, #2032] + ldr r2, .L3955+76 + ldr r1, [r3] + cmp r1, r2 + strne r2, [r3] + movne r1, #504 + ldrne r3, [r5, #2032] + movne r2, #0 + ldr r6, [r5, #2032] + stmibne r3, {r1, r2} + mov r2, #128 + mov r1, r4 + str r4, [r6, #12] + add r0, r6, #64 + bl memset + mov r1, r6 + mov r0, #1 + bl StorageSysDataStore + mov r3, #1 + str r3, [r5, #2040] + b .L3914 +.L3928: + ldr r3, [r6, #2560] + cmp r3, #10 + bhi .L3952 + ldr r2, [r6, #2032] + ldr r1, [sp, #4] + ldr r3, [r2, #24] + cmp r3, r1 + cmpne r3, #0 + movne r3, #1 + moveq r3, #0 + beq .L3929 + ldr r0, .L3955+112 + bl printk + ldr r3, [r6, #2560] + add r3, r3, #1 + str r3, [r6, #2560] + b .L3952 +.L3929: + cmp r4, r7 + str r3, [r6, #2560] + movne r3, #1 + strne r1, [r2, #24] + streq r3, [r2, #20] + mov r1, r2 + streq r3, [r2, #24] + mov r0, #1 + strne r3, [r2, #20] + bl StorageSysDataStore + cmn r0, #1 + bne .L3951 + mvn r4, #1 + b .L3914 +.L3909: + ldr r0, .L3955+116 + bl printk + mov r2, #520 + mov r1, r5 + mov r0, sp + bl rk_copy_from_user + cmp r0, #0 + bne .L3918 + ldr r2, [sp] + ldr r3, .L3955+60 + cmp r2, r3 + bne .L3915 + ldr r2, [sp, #4] + cmp r2, #504 + bhi .L3915 + ldr r3, .L3955+48 + cmp r4, r6 + ldreq r1, [r3, #2564] + ldrne r1, [r3, #2568] + add r1, r1, #8 + b .L3953 +.L3934: + ldr r0, [r4, #2568] + bl memcpy + ldr r1, [r4, #2568] + mov r0, #3 + b .L3950 +.L3904: + bl rknand_dev_flush + b .L3951 +.L3956: + .align 2 +.L3955: + .word 1074031656 + .word 1074029694 + .word .LC191 + .word 1094995539 + .word .LANCHOR2+2048 + .word 1074034192 + .word 1074031666 + .word .LC192 + .word 1074031676 + .word .LC193 + .word .LC194 + .word 1280262987 + .word .LANCHOR2 + .word 1074034194 + .word .LC197 + .word 1145980246 + .word 1074034193 + .word .LC186 + .word .LC187 + .word 1263358532 + .word .LC198 + .word -1067903959 + .word .LC188 + .word .LC189 + .word 1112753220 + .word 1146313043 + .word .LC190 + .word 1112755781 + .word .LC195 + .word .LC196 + .fnend + .size rknand_sys_storage_ioctl, .-rknand_sys_storage_ioctl + .align 2 + .global rk_ftl_storage_sys_init + .syntax unified + .arm + .fpu softvfp + .type rk_ftl_storage_sys_init, %function +rk_ftl_storage_sys_init: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + mvn r3, #0 + ldr r4, .L3967 + mov r5, #0 + mov r2, #512 + ldr r1, [r4, #2004] + add r0, r4, #2048 + str r3, [r4, #2028] + strb r5, [r4, #2020] + add r3, r1, #512 + str r1, [r4, #2044] + str r3, [r4, #2032] + add r3, r1, #1024 + add r1, r1, #1536 + str r3, [r4, #2564] + str r5, [r4, #2024] + str r5, [r4, #2572] + str r1, [r4, #2568] + bl ftl_memcpy + ldr r6, [r4, #2044] + str r5, [r4, #2036] + str r5, [r4, #2560] + ldr r7, [r6, #508] + ldr r3, [r6, #16] + cmp r7, r5 + str r3, [r4, #2040] + beq .L3958 + mov r1, #508 + mov r0, r6 + bl js_hash + cmp r7, r0 + beq .L3958 + str r5, [r6, #16] + ldr r0, .L3967+4 + str r5, [r4, #2040] + bl printk +.L3958: + ldr r3, [r4, #2040] + mov r0, #2 + ldr r1, [r4, #2564] + cmp r3, #0 + ldrne r3, .L3967+8 + strne r3, [r4, #2036] + bl StorageSysDataLoad + ldr r1, [r4, #2568] + mov r0, #3 + bl StorageSysDataLoad + pop {r4, r5, r6, r7, r8, lr} + b rknand_sys_storage_init +.L3968: + .align 2 +.L3967: + .word .LANCHOR2 + .word .LC199 + .word -1067903959 + .fnend + .size rk_ftl_storage_sys_init, .-rk_ftl_storage_sys_init + .align 2 + .global StorageSysDataDeInit + .syntax unified + .arm + .fpu softvfp + .type StorageSysDataDeInit, %function +StorageSysDataDeInit: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + mov r0, #0 + bx lr + .fnend + .size StorageSysDataDeInit, .-StorageSysDataDeInit + .align 2 + .global rk_ftl_vendor_storage_init + .syntax unified + .arm + .fpu softvfp + .type rk_ftl_vendor_storage_init, %function +rk_ftl_vendor_storage_init: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + mov r0, #65536 + ldr r6, .L3980 + bl ftl_malloc + cmp r0, #0 + str r0, [r6, #2576] + beq .L3976 + ldr r10, .L3980+4 + mov r7, #0 + ldr r9, .L3980+8 + mov r4, r7 + mov r8, r7 +.L3974: + ldr r2, [r6, #2576] + mov r1, #128 + lsl r0, r8, #7 + bl FlashBootVendorRead + cmp r0, #0 + bne .L3972 + ldr r1, [r6, #2576] + mov r0, r10 + add r2, r1, #61440 + ldr r3, [r1, #4] + ldr r2, [r2, #4092] + ldr r1, [r1] + bl printk + ldr r5, [r6, #2576] + ldr r3, [r5] + cmp r3, r9 + bne .L3973 + add r2, r5, #61440 + ldr r3, [r5, #4] + ldr r2, [r2, #4092] + cmp r3, r4 + sub r2, r2, r3 + clz r2, r2 + lsr r2, r2, #5 + movls r2, #0 + cmp r2, #0 + movne r7, r8 + movne r4, r3 +.L3973: + add r8, r8, #1 + cmp r8, #2 + bne .L3974 + cmp r4, #0 + beq .L3975 + mov r2, r5 + mov r1, #128 + lsl r0, r7, #7 + bl FlashBootVendorRead + cmp r0, #0 + bne .L3972 + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L3975: + mov r2, #65536 + mov r1, r4 + mov r0, r5 + bl memset + mov r3, #1 + add r2, r5, #61440 + str r3, [r5, #4] + mov r0, r4 + str r9, [r5] + str r3, [r2, #4092] + ldr r3, .L3980+12 + strh r4, [r5, #12] @ movhi + strh r3, [r5, #14] @ movhi + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L3972: + ldr r0, [r6, #2576] + bl kfree + mov r3, #0 + mvn r0, #0 + str r3, [r6, #2576] + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L3976: + mvn r0, #11 + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L3981: + .align 2 +.L3980: + .word .LANCHOR2 + .word .LC200 + .word 1380668996 + .word -1032 + .fnend + .size rk_ftl_vendor_storage_init, .-rk_ftl_vendor_storage_init + .align 2 + .global rk_ftl_vendor_read + .syntax unified + .arm + .fpu softvfp + .type rk_ftl_vendor_read, %function +rk_ftl_vendor_read: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L3992 + ldr ip, [r3, #2576] + cmp ip, #0 + beq .L3987 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + mov r3, #0 + ldrh r4, [ip, #10] +.L3984: + cmp r3, r4 + bcc .L3986 + mvn r0, #0 + pop {r4, r5, r6, pc} +.L3986: + add lr, ip, r3, lsl #3 + ldrh r5, [lr, #16] + cmp r5, r0 + bne .L3985 + ldrh r4, [lr, #20] + mov r0, r1 + ldrh r1, [lr, #18] + cmp r4, r2 + movcs r4, r2 + add r1, r1, #1024 + mov r2, r4 + add r1, ip, r1 + bl memcpy + mov r0, r4 + pop {r4, r5, r6, pc} +.L3985: + add r3, r3, #1 + b .L3984 +.L3987: + mvn r0, #0 + bx lr +.L3993: + .align 2 +.L3992: + .word .LANCHOR2 + .fnend + .size rk_ftl_vendor_read, .-rk_ftl_vendor_read + .align 2 + .global rk_ftl_vendor_write + .syntax unified + .arm + .fpu softvfp + .type rk_ftl_vendor_write, %function +rk_ftl_vendor_write: + .fnstart + @ args = 0, pretend = 0, frame = 24 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L4015 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #28 + sub sp, sp, #28 + ldr r4, [r3, #2576] + cmp r4, #0 + beq .L4009 + mov r8, r2 + ldrh r2, [r4, #10] + add r6, r8, #63 + ldrh r3, [r4, #8] + mov fp, r1 + bic r6, r6, #63 + mov r7, #0 + str r3, [sp, #4] +.L3996: + cmp r7, r2 + bcc .L4004 + ldrh r1, [r4, #14] + cmp r6, r1 + bhi .L4009 + add r3, r4, r2, lsl #3 + uxth r6, r6 + strh r0, [r3, #16] @ movhi + ldrh r2, [r4, #12] + strh r8, [r3, #20] @ movhi + strh r2, [r3, #18] @ movhi + add r2, r2, r6 + sub r6, r1, r6 + strh r2, [r4, #12] @ movhi + strh r6, [r4, #14] @ movhi + mov r2, r8 + ldrh r0, [r3, #18] + mov r1, fp + add r0, r0, #1024 + add r0, r4, r0 + bl memcpy + ldrh r3, [r4, #10] + add r3, r3, #1 + strh r3, [r4, #10] @ movhi + b .L4014 +.L4004: + add r5, r4, r7, lsl #3 + ldrh r3, [r5, #16] + cmp r3, r0 + str r3, [sp, #8] + bne .L3997 + ldrh r1, [r5, #20] + add r3, r4, #1024 + add r1, r1, #63 + bic r1, r1, #63 + cmp r8, r1 + str r1, [sp, #12] + bls .L3998 + ldrh r1, [r4, #14] + cmp r6, r1 + subls r2, r2, #1 + ldrhls r10, [r5, #18] + strls r2, [sp, #16] + bls .L3999 +.L4009: + mvn r0, #0 + b .L3994 +.L4000: + ldrh r9, [r5, #20] + add r0, r3, r10 + ldrh r2, [r5, #16] + add r7, r7, #1 + ldrh r1, [r5, #18] + strh r9, [r5, #12] @ movhi + add r9, r9, #63 + bic r9, r9, #63 + strh r2, [r5, #8] @ movhi + strh r10, [r5, #10] @ movhi + add r1, r3, r1 + mov r2, r9 + str r3, [sp, #20] + bl memcpy + ldr r3, [sp, #20] + add r10, r10, r9 +.L3999: + ldr r2, [sp, #16] + add r5, r5, #8 + cmp r7, r2 + bcc .L4000 + ldrh r2, [sp, #8] + add r7, r4, r7, lsl #3 + uxth r5, r10 + uxtah r0, r3, r10 + strh r8, [r7, #20] @ movhi + strh r2, [r7, #16] @ movhi + mov r1, fp + strh r5, [r7, #18] @ movhi + mov r2, r8 + bl memcpy + uxth r3, r6 + ldrh r6, [r4, #14] + add r5, r5, r3 + sub r6, r6, r3 + ldr r3, [sp, #12] + strh r5, [r4, #12] @ movhi + add r6, r6, r3 + strh r6, [r4, #14] @ movhi +.L4014: + ldr r3, [r4, #4] + add r2, r4, #61440 + mov r1, #128 + add r3, r3, #1 + str r3, [r4, #4] + str r3, [r2, #4092] + mov r2, r4 + ldrh r3, [r4, #8] + add r3, r3, #1 + uxth r3, r3 + cmp r3, #1 + movhi r3, #0 + strh r3, [r4, #8] @ movhi + ldr r3, [sp, #4] + lsl r0, r3, #7 + bl FlashBootVendorWrite + mov r0, #0 +.L3994: + add sp, sp, #28 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L3998: + ldrh r0, [r5, #18] + mov r2, r8 + mov r1, fp + add r0, r3, r0 + bl memcpy + strh r8, [r5, #20] @ movhi + b .L4014 +.L3997: + add r7, r7, #1 + b .L3996 +.L4016: + .align 2 +.L4015: + .word .LANCHOR2 + .fnend + .size rk_ftl_vendor_write, .-rk_ftl_vendor_write + .align 2 + .global rk_ftl_vendor_storage_ioctl + .syntax unified + .arm + .fpu softvfp + .type rk_ftl_vendor_storage_ioctl, %function +rk_ftl_vendor_storage_ioctl: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + mov r0, #4096 + mov r5, r2 + mov r6, r1 + bl ftl_malloc + subs r4, r0, #0 + mvneq r5, #0 + beq .L4017 + ldr r3, .L4033 + cmp r6, r3 + beq .L4020 + add r3, r3, #1 + cmp r6, r3 + beq .L4021 +.L4031: + mvn r5, #13 + b .L4019 +.L4020: + mov r2, #8 + mov r1, r5 + bl rk_copy_from_user + cmp r0, #0 + bne .L4031 + ldr r2, [r4] + ldr r3, .L4033+4 + cmp r2, r3 + beq .L4023 +.L4024: + mvn r5, #0 +.L4019: + mov r0, r4 + bl kfree +.L4017: + mov r0, r5 + pop {r4, r5, r6, pc} +.L4023: + ldrh r2, [r4, #6] + add r1, r4, #8 + ldrh r0, [r4, #4] + bl rk_ftl_vendor_read + cmn r0, #1 + beq .L4024 + uxth r2, r0 + strh r0, [r4, #6] @ movhi + mov r1, r4 + mov r0, r5 + add r2, r2, #8 + bl rk_copy_to_user + subs r5, r0, #0 + beq .L4019 + b .L4031 +.L4021: + mov r2, #8 + mov r1, r5 + bl rk_copy_from_user + cmp r0, #0 + bne .L4031 + ldr r2, [r4] + ldr r3, .L4033+4 + cmp r2, r3 + bne .L4024 + ldrh r2, [r4, #6] + movw r3, #4087 + cmp r2, r3 + bhi .L4024 + add r2, r2, #8 + mov r1, r5 + mov r0, r4 + bl rk_copy_from_user + cmp r0, #0 + bne .L4031 + ldrh r2, [r4, #6] + add r1, r4, #8 + ldrh r0, [r4, #4] + bl rk_ftl_vendor_write + mov r5, r0 + b .L4019 +.L4034: + .align 2 +.L4033: + .word 1074034177 + .word 1448232273 + .fnend + .size rk_ftl_vendor_storage_ioctl, .-rk_ftl_vendor_storage_ioctl + .global SecureBootUnlockTryCount + .global SecureBootCheckOK + .global SecureBootEn + .global gpVendor1Info + .global gpVendor0Info + .global g_idb_buffer + .global gSnSectorData + .global gpDrmKeyInfo + .global gpBootConfig + .global ftl_dma32_buffer_size + .global ftl_dma32_buffer + .global gLoaderBootInfo + .global RK29_NANDC1_REG_BASE + .global RK29_NANDC_REG_BASE + .global gc_ink_free_return_value + .global check_valid_page_count_table + .global FtlUpdateVaildLpnCount + .global g_ect_tbl_power_up_flush + .global last_cache_match_count + .global power_up_flag + .global g_LowFormat + .global gFtlInitStatus + .global DeviceCapacity + .global ToshibaRefValue + .global Toshiba15RefValue + .global ToshibaA19RefValue + .global SamsungRefValue + .global refValueDefault + .global FbbtBlk + .global random_seed + .global gSlcNandParaInfo + .global gNandParaInfo + .global g_page_map_check_enable + .global g_power_lost_ecc_error_blk + .global g_power_lost_recovery_flag + .global c_mlc_erase_count_value + .global g_recovery_ppa_tbl + .global g_recovery_page_min_ver + .global g_recovery_page_num + .global g_cur_erase_blk + .global g_gc_skip_write_count + .global g_gc_head_data_block_count + .global g_gc_head_data_block + .global g_ftl_nand_free_count + .global g_in_swl_replace + .global g_in_gc_progress + .global g_all_blk_used_slc_mode + .global g_max_erase_count + .global g_totle_sys_slc_erase_count + .global g_totle_slc_erase_count + .global g_min_erase_count + .global g_totle_avg_erase_count + .global g_totle_mlc_erase_count + .global g_totle_l2p_write_count + .global g_totle_cache_write_count + .global g_tmp_data_superblock_id + .global g_totle_read_page_count + .global g_totle_discard_page_count + .global g_totle_read_sector + .global g_totle_write_sector + .global g_totle_write_page_count + .global g_totle_gc_page_count + .global g_gc_blk_index + .global g_gc_merge_free_blk_threshold + .global g_gc_free_blk_threshold + .global g_gc_refresh_block_temp_tbl + .global g_free_slc_blk_num + .global g_gc_refresh_block_temp_num + .global g_gc_bad_block_temp_tbl + .global g_gc_bad_block_gc_index + .global g_gc_bad_block_temp_num + .global g_gc_next_blk_3 + .global g_gc_next_blk_2 + .global g_gc_next_blk_1 + .global g_gc_next_blk + .global g_gc_cur_blk_max_valid_pages + .global g_gc_cur_blk_valid_pages + .global g_gc_page_offset + .global g_gc_blk_num + .global p_gc_blk_tbl + .global p_gc_page_info + .global g_sys_ext_data + .global g_sys_save_data + .global gp_last_act_superblock + .global g_gc_superblock + .global g_gc_temp_superblock + .global g_buffer_superblock + .global g_active_superblock + .global g_num_data_superblocks + .global g_num_free_superblocks + .global p_data_block_list_tail + .global p_data_block_list_head + .global p_free_data_block_list_head + .global p_data_block_list_table + .global g_l2p_last_update_region_id + .global p_l2p_map_buf + .global p_l2p_ram_map + .global g_totle_vendor_block + .global p_vendor_region_ppn_table + .global p_vendor_block_ver_table + .global p_vendor_block_valid_page_count + .global p_vendor_block_table + .global g_totle_map_block + .global p_map_region_ppn_check_table + .global p_map_region_ppn_table + .global p_map_block_ver_table + .global p_map_block_valid_page_count + .global p_map_block_table + .global p_blk_mode_table + .global p_valid_page_count_check_table + .global p_valid_page_count_table + .global g_totle_swl_count + .global p_swl_mul_table + .global p_erase_count_table + .global g_ect_tbl_info_size + .global gp_ect_tbl_info + .global g_gc_num_req + .global c_gc_page_buf_num + .global gp_gc_page_buf_info + .global p_gc_data_buf + .global p_gc_spare_buf + .global p_io_spare_buf + .global p_io_data_buf_1 + .global p_io_data_buf_0 + .global p_sys_spare_buf + .global p_vendor_data_buf + .global p_sys_data_buf_1 + .global p_sys_data_buf + .global g_wr_page_num + .global req_wr_io + .global c_wr_page_buf_num + .global p_wr_io_data_buf + .global p_wr_io_spare_buf + .global p_plane_order_table + .global g_req_cache + .global req_gc_dst + .global req_gc + .global req_erase + .global req_prgm + .global req_read + .global req_sys + .global gVendorBlkInfo + .global gL2pMapInfo + .global gSysFreeQueue + .global gSysInfo + .global gBbtInfo + .global g_flash_read_only_en + .global g_inkDie_check_enable + .global g_SlcPartLbaEndSector + .global g_MaxLbn + .global g_VaildLpn + .global g_MaxLpn + .global g_MaxLbaSector + .global g_GlobalDataVersion + .global g_GlobalSysVersion + .global ftl_gc_temp_power_lost_recovery_flag + .global c_ftl_nand_max_data_blks + .global c_ftl_nand_data_op_blks_per_plane + .global c_ftl_nand_data_blks_per_plane + .global c_ftl_nand_max_sys_blks + .global c_ftl_nand_init_sys_blks_per_plane + .global c_ftl_nand_sys_blks_per_plane + .global c_ftl_vendor_part_size + .global c_ftl_nand_max_vendor_blks + .global c_ftl_nand_max_map_blks + .global c_ftl_nand_map_blks_per_plane + .global c_ftl_nand_vendor_region_num + .global c_ftl_nand_l2pmap_ram_region_num + .global c_ftl_nand_map_region_num + .global c_ftl_nand_totle_phy_blks + .global c_ftl_nand_reserved_blks + .global c_ftl_nand_byte_pre_oob + .global c_ftl_nand_byte_pre_page + .global c_ftl_nand_sec_pre_page_shift + .global c_ftl_nand_sec_pre_page + .global c_ftl_nand_page_pre_super_blk + .global c_ftl_nand_page_pre_slc_blk + .global c_ftl_nand_page_pre_blk + .global c_ftl_nand_bbm_buf_size + .global c_ftl_nand_ext_blk_pre_plane + .global c_ftl_nand_blk_pre_plane + .global c_ftl_nand_planes_num + .global c_ftl_nand_blks_per_die + .global c_ftl_nand_planes_per_die + .global c_ftl_nand_die_num + .global c_ftl_nand_type + .global gMasterTempBuf + .global gMasterInfo + .global gNandcDumpWriteEn + .global gToggleModeClkDiv + .global gBootDdrMode + .global gNandcEccBits + .global gpNandc1 + .global gpNandc + .global g_nandc_version_data + .global gNandcVer + .global gNandChipMap + .global gNandIDataBuf + .global idb_flash_slc_mode + .global FlashDdrTunningReadCount + .global FlashWaitBusyScheduleEn + .global gNandPhyInfo + .global gFlashProgCheckSpareBuffer + .global gFlashProgCheckBuffer + .global gFlashSpareBuffer + .global gFlashPageBuffer1 + .global gFlashPageBuffer0 + .global gpFlashSaveInfo + .global gReadRetryInfo + .global gpNandParaInfo + .global gNandOptPara + .global g_nand_ecc_en + .global g_slc2KBNand + .global g_maxRetryCount + .global g_maxRegNum + .global g_retryMode + .global gNandIDBResBlkNumSaveInFlash + .global gNandIDBResBlkNum + .global gNandFlashResEndPageAddr + .global gNandFlashInfoBlockAddr + .global gNandFlashIdbBlockAddr + .global gNandFlashInfoBlockEcc + .global gNandFlashIDBEccBits + .global gNandFlashEccBits + .global gNandRandomizer + .global gBlockPageAlignSize + .global gTotleBlock + .global gNandMaxChip + .global gNandMaxDie + .global gFlashInterfaceMode + .global gFlashCurMode + .global gFlashSlcMode + .global gFlashOnfiModeEn + .global gFlashToggleModeEn + .global gFlashSdrModeEn + .global gMultiPageProgEn + .global gMultiPageReadEn + .global gpReadRetrial + .global mlcPageToSlcPageTbl + .global slcPageToMlcPageTbl + .global DieAddrs + .global gDieOp + .global DieCsIndex + .global IDByte + .global read_retry_cur_offset + .section .rodata + .set .LANCHOR3,. + 0 + .type __func__.23812, %object + .size __func__.23812, 11 +__func__.23812: + .ascii "FtlMemInit\000" + .type samsung_14nm_slc_rr, %object + .size samsung_14nm_slc_rr, 26 +samsung_14nm_slc_rr: + .byte 0 + .byte 10 + .byte -10 + .byte 20 + .byte -20 + .byte 30 + .byte -30 + .byte 40 + .byte -40 + .byte 50 + .byte -50 + .byte 60 + .byte -60 + .byte -70 + .byte -80 + .byte -90 + .byte -100 + .byte -110 + .byte -120 + .byte -9 + .byte 70 + .byte 80 + .byte 90 + .byte -125 + .byte -115 + .byte 100 + .type samsung_14nm_mlc_rr, %object + .size samsung_14nm_mlc_rr, 104 +samsung_14nm_mlc_rr: + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte -4 + .byte 3 + .byte -4 + .byte -6 + .byte 6 + .byte 0 + .byte 6 + .byte -10 + .byte -10 + .byte 4 + .byte -10 + .byte 16 + .byte 12 + .byte -4 + .byte 12 + .byte 8 + .byte -16 + .byte 10 + .byte -16 + .byte 24 + .byte 18 + .byte -14 + .byte 18 + .byte -4 + .byte -22 + .byte -16 + .byte -22 + .byte -8 + .byte 24 + .byte -9 + .byte 24 + .byte 8 + .byte -28 + .byte -4 + .byte -28 + .byte 16 + .byte 30 + .byte 10 + .byte 30 + .byte 10 + .byte -34 + .byte 6 + .byte -34 + .byte 0 + .byte 36 + .byte -8 + .byte 36 + .byte -8 + .byte -40 + .byte -2 + .byte -40 + .byte -20 + .byte -46 + .byte -4 + .byte -46 + .byte -30 + .byte 3 + .byte 0 + .byte 3 + .byte -3 + .byte -2 + .byte -4 + .byte -2 + .byte -6 + .byte -4 + .byte -4 + .byte -4 + .byte -10 + .byte -6 + .byte -8 + .byte -6 + .byte -14 + .byte -9 + .byte -8 + .byte -9 + .byte -18 + .byte -52 + .byte 22 + .byte -52 + .byte 10 + .byte 42 + .byte 4 + .byte 42 + .byte 4 + .byte 48 + .byte -9 + .byte 48 + .byte 4 + .byte -58 + .byte 12 + .byte -58 + .byte 0 + .byte -64 + .byte -24 + .byte -64 + .byte -6 + .byte 9 + .byte 18 + .byte 9 + .byte 8 + .type __func__.24591, %object + .size __func__.24591, 17 +__func__.24591: + .ascii "FtlDumpBlockInfo\000" + .type __func__.24610, %object + .size __func__.24610, 16 +__func__.24610: + .ascii "FtlScanAllBlock\000" + .type __func__.24878, %object + .size __func__.24878, 17 +__func__.24878: + .ascii "ftl_scan_all_ppa\000" + .type __func__.24559, %object + .size __func__.24559, 12 +__func__.24559: + .ascii "FtlCheckVpc\000" + .type __func__.24858, %object + .size __func__.24858, 21 +__func__.24858: + .ascii "FtlVpcCheckAndModify\000" + .type __func__.23885, %object + .size __func__.23885, 8 +__func__.23885: + .ascii "FtlInit\000" + .data + .align 2 + .set .LANCHOR1,. + 0 + .type random_seed, %object + .size random_seed, 256 +random_seed: + .short 22378 + .short 1512 + .short 25245 + .short 17827 + .short 25756 + .short 19440 + .short 9026 + .short 10030 + .short 29528 + .short 20467 + .short 29676 + .short 24432 + .short 31328 + .short 6872 + .short 13426 + .short 13842 + .short 8783 + .short 1108 + .short 782 + .short 28837 + .short 30729 + .short 9505 + .short 18676 + .short 23085 + .short 18730 + .short 1085 + .short 32609 + .short 14697 + .short 20858 + .short 15170 + .short 30365 + .short 1607 + .short 32298 + .short 4995 + .short 18905 + .short 1976 + .short 9592 + .short 20204 + .short 17443 + .short 13615 + .short 23330 + .short 29369 + .short 13947 + .short 9398 + .short 32398 + .short 8984 + .short 27600 + .short 21785 + .short 6019 + .short 6311 + .short 31598 + .short 30210 + .short 19327 + .short 13896 + .short 11347 + .short 27545 + .short 3107 + .short 26575 + .short 32270 + .short 19852 + .short 20601 + .short 8349 + .short 9290 + .short 29819 + .short 13579 + .short 3661 + .short 28676 + .short 27331 + .short 32574 + .short 8693 + .short 31253 + .short 9081 + .short 5399 + .short 6842 + .short 20087 + .short 5537 + .short 1274 + .short 11617 + .short 9530 + .short 4866 + .short 8035 + .short 23219 + .short 1178 + .short 23272 + .short 7383 + .short 18944 + .short 12488 + .short 12871 + .short 29340 + .short 20532 + .short 11022 + .short 22514 + .short 228 + .short 22363 + .short 24978 + .short 14584 + .short 12138 + .short 3092 + .short 17916 + .short 16863 + .short 14554 + .short 31457 + .short 29474 + .short 25311 + .short 24121 + .short 3684 + .short 28037 + .short 22865 + .short 22839 + .short 25217 + .short 13217 + .short 27186 + .short 14938 + .short 11180 + .short 29754 + .short 24180 + .short 15150 + .short 32455 + .short 20434 + .short 23848 + .short 29983 + .short 16120 + .short 14769 + .short 20041 + .short 29803 + .short 28406 + .short 17598 + .short 28087 + .type ToshibaA19RefValue, %object + .size ToshibaA19RefValue, 45 +ToshibaA19RefValue: + .byte 4 + .byte 5 + .byte 6 + .byte 7 + .byte 13 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 4 + .byte 4 + .byte 124 + .byte 126 + .byte 0 + .byte 0 + .byte 124 + .byte 120 + .byte 120 + .byte 0 + .byte 124 + .byte 118 + .byte 116 + .byte 114 + .byte 0 + .byte 8 + .byte 8 + .byte 0 + .byte 0 + .byte 0 + .byte 11 + .byte 126 + .byte 118 + .byte 116 + .byte 0 + .byte 16 + .byte 118 + .byte 114 + .byte 112 + .byte 0 + .byte 2 + .byte 0 + .byte 126 + .byte 124 + .byte 0 + .type Toshiba15RefValue, %object + .size Toshiba15RefValue, 95 +Toshiba15RefValue: + .byte 4 + .byte 5 + .byte 6 + .byte 7 + .byte 13 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 2 + .byte 4 + .byte 2 + .byte 0 + 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112 + .type SamsungRefValue, %object + .size SamsungRefValue, 64 +SamsungRefValue: + .byte -89 + .byte -92 + .byte -91 + .byte -90 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 5 + .byte 10 + .byte 0 + .byte 0 + .byte 40 + .byte 0 + .byte -20 + .byte -40 + .byte -19 + .byte -11 + .byte -19 + .byte -26 + .byte 10 + .byte 15 + .byte 5 + .byte 0 + .byte 15 + .byte 10 + .byte -5 + .byte -20 + .byte -24 + .byte -17 + .byte -24 + .byte -36 + .byte -15 + .byte -5 + .byte -2 + .byte -16 + .byte 10 + .byte 0 + .byte -5 + .byte -20 + .byte -48 + .byte -30 + .byte -48 + .byte -62 + .byte 20 + .byte 15 + .byte -5 + .byte -20 + .byte -24 + .byte -5 + .byte -24 + .byte -36 + .byte 30 + .byte 20 + .byte -5 + .byte -20 + .byte -5 + .byte -1 + .byte -5 + .byte -8 + .byte 7 + .byte 12 + .byte 2 + .byte 0 + .type gNandParaInfo, %object + .size gNandParaInfo, 32 +gNandParaInfo: + .byte 0 + .byte 0 + .space 5 + .byte 0 + .byte 1 + .byte 8 + .short 128 + .byte 2 + .byte 1 + .short 2048 + .short 0 + .byte 1 + .byte 0 + .byte 24 + .byte 32 + .byte 1 + .byte 0 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .type gFtlInitStatus, %object + .size gFtlInitStatus, 4 +gFtlInitStatus: + .word -1 + .type NandFlashParaTbl, %object + .size NandFlashParaTbl, 2752 +NandFlashParaTbl: + .byte 6 + .byte 44 + .byte 100 + .byte 68 + .byte 75 + .byte -87 + .byte 0 + .byte 4 + .byte 1 + .byte 16 + .short 256 + .byte 2 + .byte 2 + .short 2048 + .short 479 + .byte 3 + .byte 17 + .byte 40 + .byte 32 + .byte 1 + .byte 0 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte 44 + .byte 68 + .byte 68 + .byte 75 + .byte -87 + .byte 0 + .byte 4 + .byte 1 + .byte 16 + .short 256 + .byte 2 + .byte 2 + .short 1064 + .short 479 + .byte 3 + .byte 17 + .byte 40 + .byte 32 + .byte 1 + .byte 0 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte 44 + .byte 104 + .byte 4 + .byte 74 + .byte -87 + .byte 0 + .byte 4 + .byte 1 + .byte 8 + .short 256 + .byte 2 + .byte 2 + .short 2048 + .short 287 + .byte 1 + .byte 0 + .byte 24 + .byte 32 + .byte 1 + .byte 0 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 5 + .byte 44 + .byte -120 + .byte 4 + .byte 75 + .byte -87 + .byte 0 + .byte 4 + .byte 1 + .byte 16 + .short 256 + .byte 2 + .byte 2 + .short 2048 + .short 287 + .byte 1 + .byte 0 + .byte 24 + .byte 32 + .byte 1 + .byte 0 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte 44 + .byte -88 + .byte 5 + .byte -53 + .byte -87 + .byte 0 + .byte 4 + .byte 2 + .byte 16 + .short 256 + .byte 2 + .byte 2 + .short 2048 + .short 287 + .byte 1 + .byte 0 + .byte 24 + .byte 32 + .byte 1 + .byte 0 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte 44 + .byte 104 + .byte 4 + .byte 70 + .byte -119 + .byte 0 + .byte 4 + .byte 1 + .byte 8 + .short 256 + .byte 2 + .byte 2 + .short 2048 + .short 287 + .byte 1 + .byte 0 + .byte 24 + .byte 32 + .byte 1 + .byte 0 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte 44 + .byte 72 + .byte 4 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.byte 24 + .byte 32 + .byte 1 + .byte 0 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte 44 + .byte 72 + .byte 4 + .byte 70 + .byte -123 + .byte 0 + .byte 4 + .byte 1 + .byte 8 + .short 256 + .byte 2 + .byte 2 + .short 1024 + .short 287 + .byte 1 + .byte 0 + .byte 24 + .byte 32 + .byte 1 + .byte 0 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte 44 + .byte -120 + .byte 5 + .byte -58 + .byte -119 + .byte 0 + .byte 4 + .byte 2 + .byte 8 + .short 256 + .byte 2 + .byte 2 + .short 2048 + .short 287 + .byte 1 + .byte 0 + .byte 24 + .byte 32 + .byte 1 + .byte 0 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 5 + .byte 44 + .byte -120 + .byte 36 + .byte 75 + .byte -87 + .byte 0 + .byte 4 + .byte 1 + .byte 16 + .short 256 + .byte 2 + .byte 2 + .short 2048 + .short 287 + .byte 1 + .byte 0 + .byte 24 + .byte 32 + .byte 1 + .byte 0 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte 44 + .byte 104 + .byte 0 + .byte 39 + .byte -87 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.byte 3 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte -83 + .byte -34 + .byte -108 + .byte -38 + .byte 116 + .byte -60 + .byte 2 + .byte 1 + .byte 16 + .short 256 + .byte 2 + .byte 2 + .short 2090 + .short 473 + .byte 1 + .byte 4 + .byte 40 + .byte 32 + .byte 4 + .byte 1 + .byte 3 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte -83 + .byte -34 + .byte -108 + .byte -21 + .byte 116 + .byte 68 + .byte 2 + .byte 1 + .byte 32 + .short 256 + .byte 2 + .byte 2 + .short 1066 + .short 473 + .byte 1 + .byte 7 + .byte 40 + .byte 32 + .byte 4 + .byte 1 + .byte 3 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte -83 + .byte -43 + .byte -108 + .byte -38 + .byte 116 + .byte -60 + .byte 2 + .byte 1 + .byte 16 + .short 256 + .byte 2 + .byte 2 + .short 530 + .short 473 + .byte 1 + .byte 3 + .byte 40 + .byte 32 + .byte 4 + .byte 1 + .byte 3 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte -83 + .byte -41 + .byte -108 + .byte -102 + .byte 116 + .byte 66 + .byte 2 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.byte 3 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte -83 + .byte -34 + .byte 20 + .byte -85 + .byte 66 + .byte 74 + .byte 2 + .byte 1 + .byte 32 + .short 256 + .byte 2 + .byte 2 + .short 1056 + .short 473 + .byte 2 + .byte 6 + .byte 40 + .byte 32 + .byte 3 + .byte 1 + .byte 3 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte -83 + .byte 58 + .byte 20 + .byte -85 + .byte 66 + .byte 74 + .byte 2 + .byte 1 + .byte 32 + .short 256 + .byte 2 + .byte 2 + .short 2092 + .short 473 + .byte 2 + .byte 5 + .byte 40 + .byte 32 + .byte 3 + .byte 1 + .byte 3 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte -83 + .byte -43 + .byte -108 + .byte -102 + .byte 116 + .byte 66 + .byte 2 + .byte 1 + .byte 16 + .short 256 + .byte 2 + .byte 1 + .short 1024 + .short 273 + .byte 1 + .byte 0 + .byte 24 + .byte 32 + .byte 4 + .byte 1 + .byte 3 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte -83 + .byte 58 + .byte 20 + .byte 3 + .byte 8 + .byte 80 + .byte 2 + .byte 1 + .byte 32 + .short 388 + .byte 2 + .byte 2 + .short 1362 + .short 473 + .byte 9 + .byte 8 + .byte 40 + .byte 32 + .byte 3 + .byte 1 + .byte 3 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte -119 + .byte 100 + .byte 68 + .byte 75 + .byte -87 + .byte 0 + .byte 7 + .byte 1 + .byte 16 + .short 256 + .byte 2 + .byte 2 + .short 2048 + .short 479 + .byte 3 + .byte 17 + .byte 40 + .byte 32 + .byte 1 + .byte 0 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte -119 + .byte -120 + .byte 36 + .byte 75 + .byte -87 + .byte -124 + .byte 7 + .byte 1 + .byte 16 + .short 256 + .byte 2 + .byte 2 + .short 2048 + .short 479 + .byte 3 + .byte 17 + .byte 40 + .byte 32 + .byte 1 + .byte 0 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte -119 + .byte -120 + .byte 36 + .byte 75 + .byte -87 + .byte 0 + .byte 7 + .byte 1 + .byte 16 + .short 256 + .byte 2 + .byte 2 + .short 2048 + .short 279 + .byte 1 + .byte 0 + .byte 24 + .byte 32 + .byte 1 + .byte 0 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte -119 + .byte 104 + .byte 36 + .byte 74 + .byte -87 + .byte 0 + .byte 7 + .byte 1 + .byte 8 + .short 256 + .byte 2 + .byte 2 + .short 2048 + .short 279 + .byte 1 + .byte 0 + .byte 24 + .byte 32 + .byte 1 + .byte 0 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte -119 + .byte 104 + .byte 4 + .byte 74 + .byte -87 + .byte 0 + .byte 7 + .byte 1 + .byte 8 + .short 256 + .byte 2 + .byte 2 + .short 2048 + .short 279 + .byte 1 + .byte 0 + .byte 24 + .byte 32 + .byte 1 + .byte 0 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte -119 + .byte -41 + .byte -108 + .byte 62 + .byte -124 + .byte 0 + .byte 7 + .byte 1 + .byte 8 + .short 256 + .byte 2 + .byte 2 + .short 2048 + .short 279 + .byte 1 + .byte 0 + .byte 24 + .byte 32 + .byte 1 + .byte 0 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte -119 + .byte 104 + .byte 4 + .byte 70 + .byte -87 + .byte 0 + .byte 7 + .byte 1 + .byte 8 + .short 256 + .byte 2 + .byte 2 + .short 2048 + .short 279 + .byte 1 + .byte 0 + .byte 24 + .byte 32 + .byte 1 + .byte 0 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 5 + .byte -119 + .byte 100 + .byte 100 + .byte 60 + .byte -95 + .byte 0 + .byte 7 + .byte 1 + .byte 32 + .short 512 + .byte 2 + .byte 1 + .short 1024 + .short 455 + .byte 4 + .byte 17 + .byte 40 + .byte 32 + .byte 1 + .byte 0 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 5 + .byte -119 + .byte -124 + .byte 100 + .byte 60 + .byte -91 + .byte 0 + .byte 7 + .byte 1 + .byte 32 + .short 512 + .byte 2 + .byte 2 + .short 1024 + .short 455 + .byte 4 + .byte 17 + .byte 40 + .byte 32 + .byte 1 + .byte 0 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte -119 + .byte -120 + .byte 36 + .byte 59 + .byte -87 + .byte 0 + .byte 7 + .byte 1 + .byte 16 + .short 192 + .byte 2 + .byte 2 + .short 2048 + .short 279 + .byte 12 + .byte 0 + .byte 24 + .byte 32 + .byte 1 + .byte 0 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte -104 + .byte -41 + .byte -124 + .byte -109 + .byte 114 + .byte 87 + .byte 1 + .byte 1 + .byte 32 + .short 256 + .byte 2 + .byte 1 + .short 1060 + .short 1473 + .byte 2 + .byte 33 + .byte 40 + .byte 32 + .byte 2 + .byte 1 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte -104 + .byte -34 + .byte -124 + .byte -109 + .byte 114 + .byte 87 + .byte 1 + .byte 1 + .byte 32 + .short 256 + .byte 2 + .byte 1 + .short 2092 + .short 1473 + .byte 2 + .byte 33 + .byte 40 + .byte 32 + .byte 2 + .byte 1 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte -104 + .byte 58 + .byte -123 + .byte -109 + .byte 118 + .byte 87 + .byte 1 + .byte 2 + .byte 32 + .short 256 + .byte 2 + .byte 1 + .short 2092 + .short 1505 + .byte 2 + .byte 33 + .byte 40 + .byte 32 + .byte 2 + .byte 1 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte -104 + .byte -43 + .byte -124 + .byte 50 + .byte 114 + .byte 86 + .byte 1 + .byte 1 + .byte 16 + .short 128 + .byte 2 + .byte 1 + .short 2056 + .short 1473 + .byte 2 + .byte 33 + .byte 40 + .byte 32 + .byte 2 + .byte 1 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte -104 + .byte -41 + .byte -108 + .byte 50 + .byte 118 + .byte 86 + .byte 1 + .byte 1 + .byte 16 + .short 128 + .byte 2 + .byte 2 + .short 2058 + .short 1489 + .byte 2 + .byte 33 + .byte 40 + .byte 32 + .byte 2 + .byte 1 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte -104 + .byte -34 + .byte -108 + .byte -126 + .byte 118 + .byte 86 + .byte 1 + .byte 1 + .byte 16 + .short 256 + .byte 2 + .byte 2 + .short 2062 + .short 1489 + .byte 1 + .byte 33 + .byte 40 + .byte 32 + .byte 2 + .byte 1 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte -104 + .byte -34 + .byte -108 + .byte -109 + .byte 118 + .byte 80 + .byte 1 + .byte 1 + .byte 32 + .short 256 + .byte 2 + .byte 2 + .short 1066 + .short 1497 + .byte 2 + .byte 34 + .byte 40 + .byte 32 + .byte 3 + .byte 1 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte -104 + .byte 58 + .byte -107 + .byte -109 + .byte 122 + .byte 80 + .byte 1 + .byte 2 + .byte 32 + .short 256 + .byte 2 + .byte 2 + .short 1066 + .short 1497 + .byte 2 + .byte 34 + .byte 40 + .byte 32 + .byte 3 + .byte 1 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte -104 + .byte -41 + .byte -108 + .byte 50 + .byte 118 + .byte 85 + .byte 1 + .byte 1 + .byte 16 + .short 128 + .byte 2 + .byte 2 + .short 2050 + .short 401 + .byte 2 + .byte 0 + .byte 24 + .byte 32 + .byte 1 + .byte 1 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte -104 + .byte -34 + .byte -108 + .byte -109 + .byte 118 + .byte 87 + .byte 1 + .byte 1 + .byte 32 + .short 256 + .byte 2 + .byte 2 + .short 1058 + .short 1497 + .byte 2 + .byte 33 + .byte 40 + .byte 32 + .byte 3 + .byte 1 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte -104 + .byte -41 + .byte -124 + .byte -109 + .byte 114 + .byte 80 + .byte 1 + .byte 1 + .byte 32 + .short 256 + .byte 2 + .byte 1 + .short 1060 + .short 1473 + .byte 2 + .byte 34 + .byte 40 + .byte 32 + .byte 3 + .byte 1 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte -104 + .byte -34 + .byte -108 + .byte -109 + .byte 118 + .byte 81 + .byte 1 + .byte 1 + .byte 32 + .short 256 + .byte 2 + .byte 2 + .short 1074 + .short 1497 + .byte 2 + .byte 35 + .byte 40 + .byte 32 + .byte 3 + .byte 1 + .byte 4 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte -104 + .byte 58 + .byte -108 + .byte -109 + .byte 118 + .byte 81 + .byte 1 + .byte 1 + .byte 32 + .short 256 + .byte 2 + .byte 2 + .short 2106 + .short 1497 + .byte 2 + .byte 35 + .byte 40 + .byte 32 + .byte 3 + .byte 1 + .byte 4 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte -104 + .byte -41 + .byte -124 + .byte -109 + .byte 114 + .byte 81 + .byte 1 + .byte 1 + .byte 32 + .short 256 + .byte 2 + .byte 1 + .short 1056 + .short 1497 + .byte 2 + .byte 35 + .byte 40 + .byte 32 + .byte 3 + .byte 1 + .byte 4 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte -104 + .byte -34 + .byte -108 + .byte -109 + .byte 118 + .byte -47 + .byte 1 + .byte 1 + .byte 32 + .short 256 + .byte 2 + .byte 2 + .short 1074 + .short 1497 + .byte 2 + .byte 35 + .byte 40 + .byte 32 + .byte 3 + .byte 1 + .byte 4 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte 69 + .byte -34 + .byte -108 + .byte -109 + .byte 118 + .byte 87 + .byte 8 + .byte 1 + .byte 32 + .short 256 + .byte 2 + .byte 2 + .short 1058 + .short 1497 + .byte 2 + .byte 66 + .byte 40 + .byte 32 + .byte 3 + .byte 1 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte 69 + .byte -41 + .byte -124 + .byte -109 + .byte 114 + .byte 87 + .byte 8 + .byte 1 + .byte 32 + .short 256 + .byte 2 + .byte 1 + .short 1060 + .short 1473 + .byte 2 + .byte 66 + .byte 40 + .byte 32 + .byte 2 + .byte 1 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte 69 + .byte -34 + .byte -92 + .byte -126 + .byte 118 + .byte 86 + .byte 8 + .byte 1 + .byte 16 + .short 256 + .byte 2 + .byte 2 + .short 2082 + .short 473 + .byte 1 + .byte 65 + .byte 40 + .byte 32 + .byte 3 + .byte 1 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte 69 + .byte -34 + .byte -108 + .byte -109 + .byte 118 + .byte 80 + .byte 8 + .byte 1 + .byte 32 + .short 256 + .byte 2 + .byte 2 + .short 1066 + .short 1497 + .byte 2 + .byte 67 + .byte 40 + .byte 32 + .byte 3 + .byte 1 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte 69 + .byte -41 + .byte -124 + .byte -109 + .byte 114 + .byte 80 + .byte 8 + .byte 1 + .byte 32 + .short 256 + .byte 2 + .byte 1 + .short 1060 + .short 1473 + .byte 2 + .byte 67 + .byte 40 + .byte 32 + .byte 3 + .byte 1 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte 69 + .byte -34 + .byte -92 + .byte -126 + .byte 118 + .byte -41 + .byte 8 + .byte 1 + .byte 16 + .short 256 + .byte 2 + .byte 2 + .short 2090 + .short 1241 + .byte 1 + .byte 66 + .byte 40 + .byte 32 + .byte 3 + .byte 1 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte 69 + .byte -34 + .byte -124 + .byte -109 + .byte 114 + .byte 87 + .byte 8 + .byte 1 + .byte 32 + .short 256 + .byte 2 + .byte 1 + .short 2092 + .short 1473 + .byte 2 + .byte 66 + .byte 40 + .byte 32 + .byte 3 + .byte 1 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte 69 + .byte 58 + .byte -108 + .byte -109 + .byte 118 + .byte 81 + .byte 8 + .byte 1 + .byte 32 + .short 256 + .byte 2 + .byte 2 + .short 2106 + .short 473 + .byte 2 + .byte 68 + .byte 40 + .byte 32 + .byte 3 + .byte 1 + .byte 4 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte 69 + .byte -34 + .byte -108 + .byte -109 + .byte 118 + .byte 81 + .byte 8 + .byte 1 + .byte 32 + .short 256 + .byte 2 + .byte 2 + .short 1074 + .short 473 + .byte 2 + .byte 68 + .byte 40 + .byte 32 + .byte 3 + .byte 1 + .byte 4 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte 69 + .byte 58 + .byte -92 + .byte -109 + .byte 122 + .byte 80 + .byte 8 + .byte 1 + .byte 32 + .short 256 + .byte 2 + .byte 2 + .short 2138 + .short 1497 + .byte 2 + .byte 0 + .byte 40 + .byte 32 + .byte 3 + .byte 1 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte 69 + .byte -34 + .byte -108 + .byte -126 + .byte 118 + .byte 86 + .byte 8 + .byte 1 + .byte 16 + .short 256 + .byte 2 + .byte 2 + .short 2062 + .short 473 + .byte 1 + .byte 0 + .byte 40 + .byte 32 + .byte 3 + .byte 1 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte 69 + .byte -34 + .byte -108 + .byte -109 + .byte 118 + .byte -41 + .byte 8 + .byte 1 + .byte 32 + .short 256 + .byte 2 + .byte 2 + .short 1058 + .short 1497 + .byte 2 + .byte 66 + .byte 40 + .byte 32 + .byte 3 + .byte 1 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 5 + .byte -20 + .byte -41 + .byte -108 + .byte 126 + .byte 100 + .byte 68 + .byte 0 + .byte 1 + .byte 16 + .short 128 + .byte 2 + .byte 2 + .short 2048 + .short 473 + .byte 2 + .byte 49 + .byte 60 + .byte 36 + .byte 3 + .byte 0 + .byte 3 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte -20 + .byte -34 + .byte -43 + .byte 126 + .byte 104 + .byte 68 + .byte 0 + .byte 2 + .byte 16 + .short 128 + .byte 2 + .byte 2 + .short 2048 + .short 505 + .byte 2 + .byte 49 + .byte 60 + .byte 36 + .byte 3 + .byte 0 + .byte 3 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte -20 + .byte -41 + .byte -108 + .byte 122 + .byte 84 + .byte 67 + .byte 0 + .byte 1 + .byte 16 + .short 128 + .byte 2 + .byte 2 + .short 2076 + .short 409 + .byte 2 + .byte 0 + .byte 40 + .byte 36 + .byte 3 + .byte 1 + .byte 3 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte -20 + .byte -34 + .byte -43 + .byte 122 + .byte 88 + .byte 67 + .byte 0 + .byte 2 + .byte 16 + .short 128 + .byte 2 + .byte 2 + .short 2076 + .short 441 + .byte 2 + .byte 0 + .byte 40 + .byte 36 + .byte 3 + .byte 1 + .byte 3 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte -20 + .byte -43 + .byte -108 + .byte 118 + .byte 84 + .byte 67 + .byte 0 + .byte 1 + .byte 16 + .short 128 + .byte 2 + .byte 2 + .short 1038 + .short 281 + .byte 2 + .byte 0 + .byte 24 + .byte 36 + .byte 3 + .byte 1 + .byte 3 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte -20 + .byte -41 + .byte 20 + .byte 118 + .byte 84 + .byte -62 + .byte 0 + .byte 1 + .byte 16 + .short 128 + .byte 2 + .byte 2 + .short 2076 + .short 1169 + .byte 2 + .byte 0 + .byte 24 + .byte 40 + .byte 3 + .byte 1 + .byte 3 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte -20 + .byte -34 + .byte -108 + .byte -61 + .byte -92 + .byte -54 + .byte 0 + .byte 1 + .byte 32 + .short 792 + .byte 2 + .byte 1 + .short 688 + .short 1217 + .byte 11 + .byte 50 + .byte 40 + .byte 32 + .byte 3 + .byte 1 + .byte 1 + .byte 0 + .byte 1 + .byte 0 + .space 4 + .type NandOptPara, %object + .size NandOptPara, 128 +NandOptPara: + .byte 1 + .byte 0 + .byte 49 + .byte 63 + .byte 0 + .byte 49 + .byte -128 + .byte 21 + .byte 0 + .byte 50 + .byte 17 + .byte -128 + .byte 112 + .byte 120 + .byte 120 + .byte 3 + .byte 1 + .byte 0 + .space 14 + .byte 2 + .byte 0 + .byte 49 + .byte 63 + .byte 0 + .byte 49 + .byte -128 + .byte 21 + .byte 0 + .byte 0 + .byte 17 + .byte -127 + .byte 112 + .byte -15 + .byte -14 + .byte 0 + .byte 0 + .byte 0 + .space 14 + .byte 3 + .byte 0 + .byte 49 + .byte 63 + .byte 0 + .byte 49 + .byte -128 + .byte 21 + .byte 96 + .byte 96 + .byte 17 + .byte -127 + .byte 112 + .byte -15 + .byte -14 + .byte 0 + .byte 0 + .byte 0 + .space 14 + .byte 4 + .byte 0 + .byte 49 + .byte 63 + .byte 0 + .byte 49 + .byte -128 + .byte 21 + .byte 96 + .byte 96 + .byte 17 + .byte -127 + .byte 112 + .byte 112 + .byte 112 + .byte 0 + .byte 0 + .byte 0 + .space 14 + .type refValueDefault, %object + .size refValueDefault, 28 +refValueDefault: + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 6 + .byte 10 + .byte 6 + .byte 0 + .byte -3 + .byte -7 + .byte -8 + .byte 0 + .byte -6 + .byte -13 + .byte -15 + .byte 0 + .byte -11 + .byte -20 + .byte -23 + .byte 0 + .byte 0 + .byte -26 + .byte -30 + .byte 0 + .byte 0 + .byte -32 + .byte -37 + .type gSlcNandParaInfo, %object + .size gSlcNandParaInfo, 32 +gSlcNandParaInfo: + .byte 2 + .byte -104 + .byte -15 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 1 + .byte 1 + .byte 4 + .short 64 + .byte 1 + .byte 1 + .short 1024 + .short 256 + .byte 0 + .byte 0 + .byte 16 + .byte 40 + .byte 1 + .byte 0 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .type ftl_gc_temp_block_bops_scan_page_addr, %object + .size ftl_gc_temp_block_bops_scan_page_addr, 2 +ftl_gc_temp_block_bops_scan_page_addr: + .short -1 + .space 2 + .type power_up_flag, %object + .size power_up_flag, 4 +power_up_flag: + .word 1 + .bss + .align 2 + .set .LANCHOR0,. + 0 + .set .LANCHOR2,. + 8184 + .type gNandChipMap, %object + .size gNandChipMap, 32 +gNandChipMap: + .space 32 + .type p_blk_mode_table, %object + .size p_blk_mode_table, 4 +p_blk_mode_table: + .space 4 + .type g_slc2KBNand, %object + .size g_slc2KBNand, 1 +g_slc2KBNand: + .space 1 + .type gNandIDBResBlkNum, %object + .size gNandIDBResBlkNum, 1 +gNandIDBResBlkNum: + .space 1 + .space 2 + .type gBlockPageAlignSize, %object + .size gBlockPageAlignSize, 4 +gBlockPageAlignSize: + .space 4 + .type gNandRandomizer, %object + .size gNandRandomizer, 1 +gNandRandomizer: + .space 1 + .space 3 + .type gpNandParaInfo, %object + .size gpNandParaInfo, 4 +gpNandParaInfo: + .space 4 + .type gNandOptPara, %object + .size gNandOptPara, 32 +gNandOptPara: + .space 32 + .type g_retryMode, %object + .size g_retryMode, 1 +g_retryMode: + .space 1 + .type g_maxRegNum, %object + .size g_maxRegNum, 1 +g_maxRegNum: + .space 1 + .space 2 + .type gpNandc, %object + .size gpNandc, 4 +gpNandc: + .space 4 + .type NANDC_FMCTL, %object + .size NANDC_FMCTL, 4 +NANDC_FMCTL: + .space 4 + .type NANDC_FMWAIT, %object + .size NANDC_FMWAIT, 4 +NANDC_FMWAIT: + .space 4 + .type NANDC_FLCTL, %object + .size NANDC_FLCTL, 4 +NANDC_FLCTL: + .space 4 + .type NANDC_BCHCTL, %object + .size NANDC_BCHCTL, 4 +NANDC_BCHCTL: + .space 4 + .type NANDC_DLL_CTL_REG0, %object + .size NANDC_DLL_CTL_REG0, 4 +NANDC_DLL_CTL_REG0: + .space 4 + .type NANDC_DLL_CTL_REG1, %object + .size NANDC_DLL_CTL_REG1, 4 +NANDC_DLL_CTL_REG1: + .space 4 + .type NANDC_RANDMZ_CFG, %object + .size NANDC_RANDMZ_CFG, 4 +NANDC_RANDMZ_CFG: + .space 4 + .type NANDC_FMWAIT_SYN, %object + .size NANDC_FMWAIT_SYN, 4 +NANDC_FMWAIT_SYN: + .space 4 + .type gNandPhyInfo, %object + .size gNandPhyInfo, 28 +gNandPhyInfo: + .space 28 + .type gFlashSlcMode, %object + .size gFlashSlcMode, 1 +gFlashSlcMode: + .space 1 + .space 3 + .type slcPageToMlcPageTbl, %object + .size slcPageToMlcPageTbl, 1024 +slcPageToMlcPageTbl: + .space 1024 + .type DieAddrs, %object + .size DieAddrs, 32 +DieAddrs: + .space 32 + .type FlashWaitBusyScheduleEn, %object + .size FlashWaitBusyScheduleEn, 4 +FlashWaitBusyScheduleEn: + .space 4 + .type gReadRetryInfo, %object + .size gReadRetryInfo, 852 +gReadRetryInfo: + .space 852 + .type read_retry_cur_offset, %object + .size read_retry_cur_offset, 4 +read_retry_cur_offset: + .space 4 + .type IDByte, %object + .size IDByte, 32 +IDByte: + .space 32 + .type gDieOp, %object + .size gDieOp, 128 +gDieOp: + .space 128 + .type gFlashCurMode, %object + .size gFlashCurMode, 1 +gFlashCurMode: + .space 1 + .type gFlashInterfaceMode, %object + .size gFlashInterfaceMode, 1 +gFlashInterfaceMode: + .space 1 + .type gNandMaxDie, %object + .size gNandMaxDie, 1 +gNandMaxDie: + .space 1 + .space 1 + .type DieCsIndex, %object + .size DieCsIndex, 8 +DieCsIndex: + .space 8 + .type gMultiPageProgEn, %object + .size gMultiPageProgEn, 1 +gMultiPageProgEn: + .space 1 + .space 3 + .type g_inkDie_check_enable, %object + .size g_inkDie_check_enable, 4 +g_inkDie_check_enable: + .space 4 + .type idb_flash_slc_mode, %object + .size idb_flash_slc_mode, 4 +idb_flash_slc_mode: + .space 4 + .type gFlashToggleModeEn, %object + .size gFlashToggleModeEn, 1 +gFlashToggleModeEn: + .space 1 + .space 3 + .type gBootDdrMode, %object + .size gBootDdrMode, 4 +gBootDdrMode: + .space 4 + .type gNandcVer, %object + .size gNandcVer, 4 +gNandcVer: + .space 4 + .type g_nandc_version_data, %object + .size g_nandc_version_data, 4 +g_nandc_version_data: + .space 4 + .type gMasterTempBuf, %object + .size gMasterTempBuf, 4 +gMasterTempBuf: + .space 4 + .type gMasterInfo, %object + .size gMasterInfo, 32 +gMasterInfo: + .space 32 + .type gNandcDumpWriteEn, %object + .size gNandcDumpWriteEn, 4 +gNandcDumpWriteEn: + .space 4 + .type gNandcEccBits, %object + .size gNandcEccBits, 4 +gNandcEccBits: + .space 4 + .type gNandFlashEccBits, %object + .size gNandFlashEccBits, 1 +gNandFlashEccBits: + .space 1 + .space 3 + .type c_ftl_nand_sys_blks_per_plane, %object + .size c_ftl_nand_sys_blks_per_plane, 4 +c_ftl_nand_sys_blks_per_plane: + .space 4 + .type c_ftl_nand_planes_num, %object + .size c_ftl_nand_planes_num, 2 +c_ftl_nand_planes_num: + .space 2 + .space 2 + .type c_ftl_nand_max_sys_blks, %object + .size c_ftl_nand_max_sys_blks, 4 +c_ftl_nand_max_sys_blks: + .space 4 + .type c_ftl_nand_data_blks_per_plane, %object + .size c_ftl_nand_data_blks_per_plane, 2 +c_ftl_nand_data_blks_per_plane: + .space 2 + .type c_ftl_nand_blk_pre_plane, %object + .size c_ftl_nand_blk_pre_plane, 2 +c_ftl_nand_blk_pre_plane: + .space 2 + .type c_ftl_nand_max_data_blks, %object + .size c_ftl_nand_max_data_blks, 4 +c_ftl_nand_max_data_blks: + .space 4 + .type c_ftl_nand_totle_phy_blks, %object + .size c_ftl_nand_totle_phy_blks, 4 +c_ftl_nand_totle_phy_blks: + .space 4 + .type c_ftl_nand_type, %object + .size c_ftl_nand_type, 2 +c_ftl_nand_type: + .space 2 + .type c_ftl_nand_die_num, %object + .size c_ftl_nand_die_num, 2 +c_ftl_nand_die_num: + .space 2 + .type c_ftl_nand_planes_per_die, %object + .size c_ftl_nand_planes_per_die, 2 +c_ftl_nand_planes_per_die: + .space 2 + .type p_plane_order_table, %object + .size p_plane_order_table, 32 +p_plane_order_table: + .space 32 + .type c_mlc_erase_count_value, %object + .size c_mlc_erase_count_value, 2 +c_mlc_erase_count_value: + .space 2 + .type c_ftl_nand_ext_blk_pre_plane, %object + .size c_ftl_nand_ext_blk_pre_plane, 2 +c_ftl_nand_ext_blk_pre_plane: + .space 2 + .type c_ftl_vendor_part_size, %object + .size c_ftl_vendor_part_size, 2 +c_ftl_vendor_part_size: + .space 2 + .type c_ftl_nand_blks_per_die, %object + .size c_ftl_nand_blks_per_die, 2 +c_ftl_nand_blks_per_die: + .space 2 + .type c_ftl_nand_page_pre_blk, %object + .size c_ftl_nand_page_pre_blk, 2 +c_ftl_nand_page_pre_blk: + .space 2 + .type c_ftl_nand_page_pre_slc_blk, %object + .size c_ftl_nand_page_pre_slc_blk, 2 +c_ftl_nand_page_pre_slc_blk: + .space 2 + .type c_ftl_nand_page_pre_super_blk, %object + .size c_ftl_nand_page_pre_super_blk, 2 +c_ftl_nand_page_pre_super_blk: + .space 2 + .type c_ftl_nand_sec_pre_page, %object + .size c_ftl_nand_sec_pre_page, 2 +c_ftl_nand_sec_pre_page: + .space 2 + .type c_ftl_nand_sec_pre_page_shift, %object + .size c_ftl_nand_sec_pre_page_shift, 2 +c_ftl_nand_sec_pre_page_shift: + .space 2 + .type c_ftl_nand_byte_pre_page, %object + .size c_ftl_nand_byte_pre_page, 2 +c_ftl_nand_byte_pre_page: + .space 2 + .type c_ftl_nand_byte_pre_oob, %object + .size c_ftl_nand_byte_pre_oob, 2 +c_ftl_nand_byte_pre_oob: + .space 2 + .type c_ftl_nand_reserved_blks, %object + .size c_ftl_nand_reserved_blks, 2 +c_ftl_nand_reserved_blks: + .space 2 + .space 2 + .type DeviceCapacity, %object + .size DeviceCapacity, 4 +DeviceCapacity: + .space 4 + .type c_ftl_nand_max_vendor_blks, %object + .size c_ftl_nand_max_vendor_blks, 2 +c_ftl_nand_max_vendor_blks: + .space 2 + .type c_ftl_nand_vendor_region_num, %object + .size c_ftl_nand_vendor_region_num, 2 +c_ftl_nand_vendor_region_num: + .space 2 + .type c_ftl_nand_map_blks_per_plane, %object + .size c_ftl_nand_map_blks_per_plane, 2 +c_ftl_nand_map_blks_per_plane: + .space 2 + .space 2 + .type c_ftl_nand_max_map_blks, %object + .size c_ftl_nand_max_map_blks, 4 +c_ftl_nand_max_map_blks: + .space 4 + .type c_ftl_nand_init_sys_blks_per_plane, %object + .size c_ftl_nand_init_sys_blks_per_plane, 4 +c_ftl_nand_init_sys_blks_per_plane: + .space 4 + .type c_ftl_nand_map_region_num, %object + .size c_ftl_nand_map_region_num, 2 +c_ftl_nand_map_region_num: + .space 2 + .type c_ftl_nand_l2pmap_ram_region_num, %object + .size c_ftl_nand_l2pmap_ram_region_num, 2 +c_ftl_nand_l2pmap_ram_region_num: + .space 2 + .type g_MaxLbaSector, %object + .size g_MaxLbaSector, 4 +g_MaxLbaSector: + .space 4 + .type g_page_map_check_enable, %object + .size g_page_map_check_enable, 2 +g_page_map_check_enable: + .space 2 + .type g_totle_vendor_block, %object + .size g_totle_vendor_block, 2 +g_totle_vendor_block: + .space 2 + .type p_vendor_block_table, %object + .size p_vendor_block_table, 4 +p_vendor_block_table: + .space 4 + .type g_wr_page_num, %object + .size g_wr_page_num, 4 +g_wr_page_num: + .space 4 + .type req_wr_io, %object + .size req_wr_io, 4 +req_wr_io: + .space 4 + .type g_MaxLpn, %object + .size g_MaxLpn, 4 +g_MaxLpn: + .space 4 + .type gBbtInfo, %object + .size gBbtInfo, 60 +gBbtInfo: + .space 60 + .type gSysFreeQueue, %object + .size gSysFreeQueue, 2056 +gSysFreeQueue: + .space 2056 + .type g_flash_read_only_en, %object + .size g_flash_read_only_en, 4 +g_flash_read_only_en: + .space 4 + .type req_erase, %object + .size req_erase, 4 +req_erase: + .space 4 + .type p_erase_count_table, %object + .size p_erase_count_table, 4 +p_erase_count_table: + .space 4 + .type g_totle_sys_slc_erase_count, %object + .size g_totle_sys_slc_erase_count, 4 +g_totle_sys_slc_erase_count: + .space 4 + .type g_sys_save_data, %object + .size g_sys_save_data, 48 +g_sys_save_data: + .space 48 + .type p_data_block_list_table, %object + .size p_data_block_list_table, 4 +p_data_block_list_table: + .space 4 + .type p_data_block_list_head, %object + .size p_data_block_list_head, 4 +p_data_block_list_head: + .space 4 + .type p_valid_page_count_table, %object + .size p_valid_page_count_table, 4 +p_valid_page_count_table: + .space 4 + .type p_data_block_list_tail, %object + .size p_data_block_list_tail, 4 +p_data_block_list_tail: + .space 4 + .type g_num_data_superblocks, %object + .size g_num_data_superblocks, 2 +g_num_data_superblocks: + .space 2 + .space 2 + .type p_free_data_block_list_head, %object + .size p_free_data_block_list_head, 4 +p_free_data_block_list_head: + .space 4 + .type g_num_free_superblocks, %object + .size g_num_free_superblocks, 2 +g_num_free_superblocks: + .space 2 + .space 2 + .type g_active_superblock, %object + .size g_active_superblock, 48 +g_active_superblock: + .space 48 + .type g_buffer_superblock, %object + .size g_buffer_superblock, 48 +g_buffer_superblock: + .space 48 + .type g_gc_temp_superblock, %object + .size g_gc_temp_superblock, 48 +g_gc_temp_superblock: + .space 48 + .type p_l2p_ram_map, %object + .size p_l2p_ram_map, 4 +p_l2p_ram_map: + .space 4 + .type g_l2p_last_update_region_id, %object + .size g_l2p_last_update_region_id, 2 +g_l2p_last_update_region_id: + .space 2 + .type FtlUpdateVaildLpnCount, %object + .size FtlUpdateVaildLpnCount, 2 +FtlUpdateVaildLpnCount: + .space 2 + .type g_VaildLpn, %object + .size g_VaildLpn, 4 +g_VaildLpn: + .space 4 + .type g_totle_read_page_count, %object + .size g_totle_read_page_count, 4 +g_totle_read_page_count: + .space 4 + .type g_totle_discard_page_count, %object + .size g_totle_discard_page_count, 4 +g_totle_discard_page_count: + .space 4 + .type g_totle_write_page_count, %object + .size g_totle_write_page_count, 4 +g_totle_write_page_count: + .space 4 + .type g_totle_cache_write_count, %object + .size g_totle_cache_write_count, 4 +g_totle_cache_write_count: + .space 4 + .type g_totle_l2p_write_count, %object + .size g_totle_l2p_write_count, 4 +g_totle_l2p_write_count: + .space 4 + .type g_totle_gc_page_count, %object + .size g_totle_gc_page_count, 4 +g_totle_gc_page_count: + .space 4 + .type g_totle_write_sector, %object + .size g_totle_write_sector, 4 +g_totle_write_sector: + .space 4 + .type g_totle_read_sector, %object + .size g_totle_read_sector, 4 +g_totle_read_sector: + .space 4 + .type g_GlobalSysVersion, %object + .size g_GlobalSysVersion, 4 +g_GlobalSysVersion: + .space 4 + .type g_GlobalDataVersion, %object + .size g_GlobalDataVersion, 4 +g_GlobalDataVersion: + .space 4 + .type g_totle_mlc_erase_count, %object + .size g_totle_mlc_erase_count, 4 +g_totle_mlc_erase_count: + .space 4 + .type g_totle_slc_erase_count, %object + .size g_totle_slc_erase_count, 4 +g_totle_slc_erase_count: + .space 4 + .type g_totle_avg_erase_count, %object + .size g_totle_avg_erase_count, 4 +g_totle_avg_erase_count: + .space 4 + .type g_max_erase_count, %object + .size g_max_erase_count, 4 +g_max_erase_count: + .space 4 + .type g_min_erase_count, %object + .size g_min_erase_count, 4 +g_min_erase_count: + .space 4 + .type c_ftl_nand_data_op_blks_per_plane, %object + .size c_ftl_nand_data_op_blks_per_plane, 2 +c_ftl_nand_data_op_blks_per_plane: + .space 2 + .space 2 + .type gSysInfo, %object + .size gSysInfo, 16 +gSysInfo: + .space 16 + .type g_gc_superblock, %object + .size g_gc_superblock, 48 +g_gc_superblock: + .space 48 + .type g_sys_ext_data, %object + .size g_sys_ext_data, 512 +g_sys_ext_data: + .space 512 + .type g_all_blk_used_slc_mode, %object + .size g_all_blk_used_slc_mode, 4 +g_all_blk_used_slc_mode: + .space 4 + .type g_gc_free_blk_threshold, %object + .size g_gc_free_blk_threshold, 2 +g_gc_free_blk_threshold: + .space 2 + .type g_gc_merge_free_blk_threshold, %object + .size g_gc_merge_free_blk_threshold, 2 +g_gc_merge_free_blk_threshold: + .space 2 + .type g_gc_skip_write_count, %object + .size g_gc_skip_write_count, 4 +g_gc_skip_write_count: + .space 4 + .type g_gc_blk_index, %object + .size g_gc_blk_index, 2 +g_gc_blk_index: + .space 2 + .space 2 + .type g_in_swl_replace, %object + .size g_in_swl_replace, 4 +g_in_swl_replace: + .space 4 + .type g_gc_num_req, %object + .size g_gc_num_req, 4 +g_gc_num_req: + .space 4 + .type gp_gc_page_buf_info, %object + .size gp_gc_page_buf_info, 4 +gp_gc_page_buf_info: + .space 4 + .type p_gc_data_buf, %object + .size p_gc_data_buf, 4 +p_gc_data_buf: + .space 4 + .type p_gc_spare_buf, %object + .size p_gc_spare_buf, 4 +p_gc_spare_buf: + .space 4 + .type req_gc, %object + .size req_gc, 4 +req_gc: + .space 4 + .type c_gc_page_buf_num, %object + .size c_gc_page_buf_num, 4 +c_gc_page_buf_num: + .space 4 + .type p_gc_blk_tbl, %object + .size p_gc_blk_tbl, 4 +p_gc_blk_tbl: + .space 4 + .type g_gc_blk_num, %object + .size g_gc_blk_num, 2 +g_gc_blk_num: + .space 2 + .space 2 + .type p_gc_page_info, %object + .size p_gc_page_info, 4 +p_gc_page_info: + .space 4 + .type g_gc_page_offset, %object + .size g_gc_page_offset, 2 +g_gc_page_offset: + .space 2 + .type g_gc_next_blk, %object + .size g_gc_next_blk, 2 +g_gc_next_blk: + .space 2 + .type g_gc_next_blk_1, %object + .size g_gc_next_blk_1, 2 +g_gc_next_blk_1: + .space 2 + .type g_gc_next_blk_2, %object + .size g_gc_next_blk_2, 2 +g_gc_next_blk_2: + .space 2 + .type g_gc_next_blk_3, %object + .size g_gc_next_blk_3, 2 +g_gc_next_blk_3: + .space 2 + .type g_gc_bad_block_temp_num, %object + .size g_gc_bad_block_temp_num, 2 +g_gc_bad_block_temp_num: + .space 2 + .type g_gc_bad_block_temp_tbl, %object + .size g_gc_bad_block_temp_tbl, 34 +g_gc_bad_block_temp_tbl: + .space 34 + .type g_gc_bad_block_gc_index, %object + .size g_gc_bad_block_gc_index, 2 +g_gc_bad_block_gc_index: + .space 2 + .type mlcPageToSlcPageTbl, %object + .size mlcPageToSlcPageTbl, 2048 +mlcPageToSlcPageTbl: + .space 2048 + .type gNandMaxChip, %object + .size gNandMaxChip, 1 +gNandMaxChip: + .space 1 + .space 1 + .type gTotleBlock, %object + .size gTotleBlock, 2 +gTotleBlock: + .space 2 + .type g_free_slc_blk_num, %object + .size g_free_slc_blk_num, 2 +g_free_slc_blk_num: + .space 2 + .space 2 + .type g_SlcPartLbaEndSector, %object + .size g_SlcPartLbaEndSector, 4 +g_SlcPartLbaEndSector: + .space 4 + .type g_in_gc_progress, %object + .size g_in_gc_progress, 4 +g_in_gc_progress: + .space 4 + .type g_gc_head_data_block, %object + .size g_gc_head_data_block, 4 +g_gc_head_data_block: + .space 4 + .type g_gc_head_data_block_count, %object + .size g_gc_head_data_block_count, 4 +g_gc_head_data_block_count: + .space 4 + .type g_cur_erase_blk, %object + .size g_cur_erase_blk, 4 +g_cur_erase_blk: + .space 4 + .type g_gc_refresh_block_temp_num, %object + .size g_gc_refresh_block_temp_num, 2 +g_gc_refresh_block_temp_num: + .space 2 + .space 2 + .type c_wr_page_buf_num, %object + .size c_wr_page_buf_num, 4 +c_wr_page_buf_num: + .space 4 + .type req_read, %object + .size req_read, 4 +req_read: + .space 4 + .type req_gc_dst, %object + .size req_gc_dst, 4 +req_gc_dst: + .space 4 + .type req_prgm, %object + .size req_prgm, 4 +req_prgm: + .space 4 + .type p_sys_data_buf, %object + .size p_sys_data_buf, 4 +p_sys_data_buf: + .space 4 + .type p_sys_data_buf_1, %object + .size p_sys_data_buf_1, 4 +p_sys_data_buf_1: + .space 4 + .type p_vendor_data_buf, %object + .size p_vendor_data_buf, 4 +p_vendor_data_buf: + .space 4 + .type p_wr_io_data_buf, %object + .size p_wr_io_data_buf, 4 +p_wr_io_data_buf: + .space 4 + .type p_io_data_buf_0, %object + .size p_io_data_buf_0, 4 +p_io_data_buf_0: + .space 4 + .type p_io_data_buf_1, %object + .size p_io_data_buf_1, 4 +p_io_data_buf_1: + .space 4 + .type p_sys_spare_buf, %object + .size p_sys_spare_buf, 4 +p_sys_spare_buf: + .space 4 + .type p_io_spare_buf, %object + .size p_io_spare_buf, 4 +p_io_spare_buf: + .space 4 + .type p_wr_io_spare_buf, %object + .size p_wr_io_spare_buf, 4 +p_wr_io_spare_buf: + .space 4 + .type g_ect_tbl_info_size, %object + .size g_ect_tbl_info_size, 2 +g_ect_tbl_info_size: + .space 2 + .space 2 + .type p_swl_mul_table, %object + .size p_swl_mul_table, 4 +p_swl_mul_table: + .space 4 + .type gp_ect_tbl_info, %object + .size gp_ect_tbl_info, 4 +gp_ect_tbl_info: + .space 4 + .type p_valid_page_count_check_table, %object + .size p_valid_page_count_check_table, 4 +p_valid_page_count_check_table: + .space 4 + .type p_map_block_table, %object + .size p_map_block_table, 4 +p_map_block_table: + .space 4 + .type p_map_block_valid_page_count, %object + .size p_map_block_valid_page_count, 4 +p_map_block_valid_page_count: + .space 4 + .type p_vendor_block_valid_page_count, %object + .size p_vendor_block_valid_page_count, 4 +p_vendor_block_valid_page_count: + .space 4 + .type p_vendor_block_ver_table, %object + .size p_vendor_block_ver_table, 4 +p_vendor_block_ver_table: + .space 4 + .type p_vendor_region_ppn_table, %object + .size p_vendor_region_ppn_table, 4 +p_vendor_region_ppn_table: + .space 4 + .type p_map_region_ppn_table, %object + .size p_map_region_ppn_table, 4 +p_map_region_ppn_table: + .space 4 + .type p_map_region_ppn_check_table, %object + .size p_map_region_ppn_check_table, 4 +p_map_region_ppn_check_table: + .space 4 + .type p_map_block_ver_table, %object + .size p_map_block_ver_table, 4 +p_map_block_ver_table: + .space 4 + .type p_l2p_map_buf, %object + .size p_l2p_map_buf, 4 +p_l2p_map_buf: + .space 4 + .type c_ftl_nand_bbm_buf_size, %object + .size c_ftl_nand_bbm_buf_size, 2 +c_ftl_nand_bbm_buf_size: + .space 2 + .space 2 + .type gL2pMapInfo, %object + .size gL2pMapInfo, 44 +gL2pMapInfo: + .space 44 + .type g_totle_map_block, %object + .size g_totle_map_block, 2 +g_totle_map_block: + .space 2 + .space 2 + .type g_req_cache, %object + .size g_req_cache, 4 +g_req_cache: + .space 4 + .type g_tmp_data_superblock_id, %object + .size g_tmp_data_superblock_id, 2 +g_tmp_data_superblock_id: + .space 2 + .space 2 + .type g_totle_swl_count, %object + .size g_totle_swl_count, 4 +g_totle_swl_count: + .space 4 + .type ftl_gc_temp_power_lost_recovery_flag, %object + .size ftl_gc_temp_power_lost_recovery_flag, 4 +ftl_gc_temp_power_lost_recovery_flag: + .space 4 + .type g_recovery_page_min_ver, %object + .size g_recovery_page_min_ver, 4 +g_recovery_page_min_ver: + .space 4 + .type gNandIDataBuf, %object + .size gNandIDataBuf, 2048 +gNandIDataBuf: + .space 2048 + .type RK29_NANDC_REG_BASE, %object + .size RK29_NANDC_REG_BASE, 4 +RK29_NANDC_REG_BASE: + .space 4 + .type ftl_dma32_buffer_size, %object + .size ftl_dma32_buffer_size, 4 +ftl_dma32_buffer_size: + .space 4 + .type ftl_dma32_buffer, %object + .size ftl_dma32_buffer, 4 +ftl_dma32_buffer: + .space 4 + .type gFlashPageBuffer0, %object + .size gFlashPageBuffer0, 4 +gFlashPageBuffer0: + .space 4 + .type FlashDdrTunningReadCount, %object + .size FlashDdrTunningReadCount, 4 +FlashDdrTunningReadCount: + .space 4 + .type gpReadRetrial, %object + .size gpReadRetrial, 4 +gpReadRetrial: + .space 4 + .type gpFlashSaveInfo, %object + .size gpFlashSaveInfo, 4 +gpFlashSaveInfo: + .space 4 + .type gNandFlashInfoBlockAddr, %object + .size gNandFlashInfoBlockAddr, 4 +gNandFlashInfoBlockAddr: + .space 4 + .type gNandFlashIdbBlockAddr, %object + .size gNandFlashIdbBlockAddr, 4 +gNandFlashIdbBlockAddr: + .space 4 + .type gNandIDBResBlkNumSaveInFlash, %object + .size gNandIDBResBlkNumSaveInFlash, 1 +gNandIDBResBlkNumSaveInFlash: + .space 1 + .type g_maxRetryCount, %object + .size g_maxRetryCount, 1 +g_maxRetryCount: + .space 1 + .type gNandFlashIDBEccBits, %object + .size gNandFlashIDBEccBits, 1 +gNandFlashIDBEccBits: + .space 1 + .space 1 + .type gFlashPageBuffer1, %object + .size gFlashPageBuffer1, 4 +gFlashPageBuffer1: + .space 4 + .type gFlashSpareBuffer, %object + .size gFlashSpareBuffer, 4 +gFlashSpareBuffer: + .space 4 + .type gFlashProgCheckBuffer, %object + .size gFlashProgCheckBuffer, 4 +gFlashProgCheckBuffer: + .space 4 + .type gFlashProgCheckSpareBuffer, %object + .size gFlashProgCheckSpareBuffer, 4 +gFlashProgCheckSpareBuffer: + .space 4 + .type g_nand_ecc_en, %object + .size g_nand_ecc_en, 1 +g_nand_ecc_en: + .space 1 + .type gMultiPageReadEn, %object + .size gMultiPageReadEn, 1 +gMultiPageReadEn: + .space 1 + .type FbbtBlk, %object + .size FbbtBlk, 16 +FbbtBlk: + .space 16 + .space 2 + .type req_sys, %object + .size req_sys, 36 +req_sys: + .space 36 + .type g_MaxLbn, %object + .size g_MaxLbn, 4 +g_MaxLbn: + .space 4 + .type gVendorBlkInfo, %object + .size gVendorBlkInfo, 44 +gVendorBlkInfo: + .space 44 + .type g_ect_tbl_power_up_flush, %object + .size g_ect_tbl_power_up_flush, 2 +g_ect_tbl_power_up_flush: + .space 2 + .type g_power_lost_ecc_error_blk, %object + .size g_power_lost_ecc_error_blk, 2 +g_power_lost_ecc_error_blk: + .space 2 + .type g_power_lost_recovery_flag, %object + .size g_power_lost_recovery_flag, 2 +g_power_lost_recovery_flag: + .space 2 + .space 2 + .type g_recovery_page_num, %object + .size g_recovery_page_num, 4 +g_recovery_page_num: + .space 4 + .type g_recovery_ppa_tbl, %object + .size g_recovery_ppa_tbl, 128 +g_recovery_ppa_tbl: + .space 128 + .type gc_ink_free_return_value, %object + .size gc_ink_free_return_value, 2 +gc_ink_free_return_value: + .space 2 + .type g_gc_cur_blk_valid_pages, %object + .size g_gc_cur_blk_valid_pages, 2 +g_gc_cur_blk_valid_pages: + .space 2 + .type g_gc_cur_blk_max_valid_pages, %object + .size g_gc_cur_blk_max_valid_pages, 2 +g_gc_cur_blk_max_valid_pages: + .space 2 + .space 2 + .type gp_last_act_superblock, %object + .size gp_last_act_superblock, 4 +gp_last_act_superblock: + .space 4 + .type gc_discard_updated, %object + .size gc_discard_updated, 4 +gc_discard_updated: + .space 4 + .type g_LowFormat, %object + .size g_LowFormat, 4 +g_LowFormat: + .space 4 + .type gLoaderBootInfo, %object + .size gLoaderBootInfo, 4 +gLoaderBootInfo: + .space 4 + .type RK29_NANDC1_REG_BASE, %object + .size RK29_NANDC1_REG_BASE, 4 +RK29_NANDC1_REG_BASE: + .space 4 + .type g_ftl_nand_free_count, %object + .size g_ftl_nand_free_count, 4 +g_ftl_nand_free_count: + .space 4 + .type last_cache_match_count, %object + .size last_cache_match_count, 4 +last_cache_match_count: + .space 4 + .type idb_write_enable, %object + .size idb_write_enable, 1 +idb_write_enable: + .space 1 + .space 3 + .type idb_buf, %object + .size idb_buf, 4 +idb_buf: + .space 4 + .type idb_last_lba, %object + .size idb_last_lba, 4 +idb_last_lba: + .space 4 + .type gpDrmKeyInfo, %object + .size gpDrmKeyInfo, 4 +gpDrmKeyInfo: + .space 4 + .type SecureBootCheckOK, %object + .size SecureBootCheckOK, 4 +SecureBootCheckOK: + .space 4 + .type SecureBootEn, %object + .size SecureBootEn, 4 +SecureBootEn: + .space 4 + .type gpBootConfig, %object + .size gpBootConfig, 4 +gpBootConfig: + .space 4 + .type gSnSectorData, %object + .size gSnSectorData, 512 +gSnSectorData: + .space 512 + .type SecureBootUnlockTryCount, %object + .size SecureBootUnlockTryCount, 4 +SecureBootUnlockTryCount: + .space 4 + .type gpVendor0Info, %object + .size gpVendor0Info, 4 +gpVendor0Info: + .space 4 + .type gpVendor1Info, %object + .size gpVendor1Info, 4 +gpVendor1Info: + .space 4 + .type g_idb_buffer, %object + .size g_idb_buffer, 4 +g_idb_buffer: + .space 4 + .type g_vendor, %object + .size g_vendor, 4 +g_vendor: + .space 4 + .type check_valid_page_count_table, %object + .size check_valid_page_count_table, 8192 +check_valid_page_count_table: + .space 8192 + .type g_gc_refresh_block_temp_tbl, %object + .size g_gc_refresh_block_temp_tbl, 34 +g_gc_refresh_block_temp_tbl: + .space 34 + .space 2 + .type gToggleModeClkDiv, %object + .size gToggleModeClkDiv, 4 +gToggleModeClkDiv: + .space 4 + .type gpNandc1, %object + .size gpNandc1, 4 +gpNandc1: + .space 4 + .type gNandFlashResEndPageAddr, %object + .size gNandFlashResEndPageAddr, 4 +gNandFlashResEndPageAddr: + .space 4 + .type gNandFlashInfoBlockEcc, %object + .size gNandFlashInfoBlockEcc, 1 +gNandFlashInfoBlockEcc: + .space 1 + .type gFlashOnfiModeEn, %object + .size gFlashOnfiModeEn, 1 +gFlashOnfiModeEn: + .space 1 + .type gFlashSdrModeEn, %object + .size gFlashSdrModeEn, 1 +gFlashSdrModeEn: + .space 1 + .section .rodata.str1.1,"aMS",%progbits,1 +.LC1: + .ascii "FlashEraseBlocks pageAddr error %x\012\000" +.LC2: + .ascii "phyBlk = 0x%x die = %d block_in_die = 0x%x 0x%8x\012" + .ascii "\000" +.LC3: + .ascii "FtlFreeSysBlkQueueOut free count = %d\012\000" +.LC4: + .ascii "FtlFreeSysBlkQueueOut = %x, free count = %d, error\012" + .ascii "\000" +.LC5: + .ascii "FtlFreeSysBlkQueueOut = %x, free count = %d\012\000" +.LC6: + .ascii "FLASH INFO:\012\000" +.LC7: + .ascii "FLASH ID: %x\012\000" +.LC8: + .ascii "Device Capacity: %d MB\012\000" +.LC9: + .ascii "FMWAIT: %x %x %x %x\012\000" +.LC10: + .ascii "FTL INFO:\012\000" +.LC11: + .ascii "g_MaxLpn = 0x%x\012\000" +.LC12: + .ascii "g_VaildLpn = 0x%x\012\000" +.LC13: + .ascii "read_page_count = 0x%x\012\000" +.LC14: + .ascii "discard_page_count = 0x%x\012\000" +.LC15: + .ascii "write_page_count = 0x%x\012\000" +.LC16: + .ascii "cache_write_count = 0x%x\012\000" +.LC17: + .ascii "l2p_write_count = 0x%x\012\000" +.LC18: + .ascii "gc_page_count = 0x%x\012\000" +.LC19: + .ascii "totle_write = %d MB\012\000" +.LC20: + .ascii "totle_read = %d MB\012\000" +.LC21: + .ascii "GSV = 0x%x\012\000" +.LC22: + .ascii "GDV = 0x%x\012\000" +.LC23: + .ascii "bad blk num = %d %d\012\000" +.LC24: + .ascii "free_superblocks = 0x%x\012\000" +.LC25: + .ascii "mlc_EC = 0x%x\012\000" +.LC26: + .ascii "slc_EC = 0x%x\012\000" +.LC27: + .ascii "avg_EC = 0x%x\012\000" +.LC28: + .ascii "sys_EC = 0x%x\012\000" +.LC29: + .ascii "max_EC = 0x%x\012\000" +.LC30: + .ascii "min_EC = 0x%x\012\000" +.LC31: + .ascii "PLT = 0x%x\012\000" +.LC32: + .ascii "POT = 0x%x\012\000" +.LC33: + .ascii "MaxSector = 0x%x\012\000" +.LC34: + .ascii "init_sys_blks_pp = 0x%x\012\000" +.LC35: + .ascii "sys_blks_pp = 0x%x\012\000" +.LC36: + .ascii "free sysblock = 0x%x\012\000" +.LC37: + .ascii "data_blks_pp = 0x%x\012\000" +.LC38: + .ascii "data_op_blks_pp = 0x%x\012\000" +.LC39: + .ascii "max_data_blks = 0x%x\012\000" +.LC40: + .ascii "Sys.id = 0x%x\012\000" +.LC41: + .ascii "Bbt.id = 0x%x\012\000" +.LC42: + .ascii "ACT.page = 0x%x\012\000" +.LC43: + .ascii "ACT.plane = 0x%x\012\000" +.LC44: + .ascii "ACT.id = 0x%x\012\000" +.LC45: + .ascii "ACT.mode = 0x%x\012\000" +.LC46: + .ascii "ACT.a_pages = 0x%x\012\000" +.LC47: + .ascii "ACT VPC = 0x%x\012\000" +.LC48: + .ascii "BUF.page = 0x%x\012\000" +.LC49: + .ascii "BUF.plane = 0x%x\012\000" +.LC50: + .ascii "BUF.id = 0x%x\012\000" +.LC51: + .ascii "BUF.mode = 0x%x\012\000" +.LC52: + .ascii "BUF.a_pages = 0x%x\012\000" +.LC53: + .ascii "BUF VPC = 0x%x\012\000" +.LC54: + .ascii "TMP.page = 0x%x\012\000" +.LC55: + .ascii "TMP.plane = 0x%x\012\000" +.LC56: + .ascii "TMP.id = 0x%x\012\000" +.LC57: + .ascii "TMP.mode = 0x%x\012\000" +.LC58: + .ascii "TMP.a_pages = 0x%x\012\000" +.LC59: + .ascii "GC.page = 0x%x\012\000" +.LC60: + .ascii "GC.plane = 0x%x\012\000" +.LC61: + .ascii "GC.id = 0x%x\012\000" +.LC62: + .ascii "GC.mode = 0x%x\012\000" +.LC63: + .ascii "GC.a_pages = 0x%x\012\000" +.LC64: + .ascii "WR_CHK = 0x%x %x %x %x\012\000" +.LC65: + .ascii "Read Err = 0x%x\012\000" +.LC66: + .ascii "Prog Err = 0x%x\012\000" +.LC67: + .ascii "gc_free_blk_th= 0x%x\012\000" +.LC68: + .ascii "gc_merge_free_blk_th= 0x%x\012\000" +.LC69: + .ascii "gc_skip_write_count= 0x%x\012\000" +.LC70: + .ascii "gc_blk_index= 0x%x\012\000" +.LC71: + .ascii "free min EC= 0x%x\012\000" +.LC72: + .ascii "free max EC= 0x%x\012\000" +.LC73: + .ascii "GC__SB VPC = 0x%x\012\000" +.LC74: + .ascii "%d. [0x%x]=0x%x 0x%x 0x%x\012\000" +.LC75: + .ascii "free %d. [0x%x] 0x%x 0x%x\012\000" +.LC76: + .ascii "FTL version: 5.0.63 20210616\000" +.LC77: + .ascii "%s\012\000" +.LC78: + .ascii "swblk %x ,avg = %x max= %x vpc= %x,ec=%x ,max ec=%x" + .ascii "\012\000" +.LC79: + .ascii "FtlGcRefreshBlock 0x%x\012\000" +.LC80: + .ascii "FtlGcMarkBadPhyBlk %d 0x%x\012\000" +.LC81: + .ascii "%s error allocating memory. return -1\012\000" +.LC82: + .ascii "%s %p:0x%x:\000" +.LC83: + .ascii "%x \000" +.LC84: + .ascii "\000" +.LC85: + .ascii "otp error! %d\000" +.LC86: + .ascii "rr\000" +.LC87: + .ascii "%d statReg->V6.mtrans_cnt=%d flReg.V6.page_num=%d\012" + .ascii "\000" +.LC88: + .ascii "nandc:\000" +.LC89: + .ascii "%d flReg.d32=%x %x\012\000" +.LC90: + .ascii "sdr read ok %x ecc=%d\012\000" +.LC91: + .ascii "sync para %d\012\000" +.LC92: + .ascii "TOG mode Read error %x %x\012\000" +.LC93: + .ascii "read retry status %x %x %x\012\000" +.LC94: + .ascii "micron RR %d row=%x,count %d,status=%d\012\000" +.LC95: + .ascii "samsung RR %d row=%x,count %d,status=%d\012\000" +.LC96: + .ascii "ECC:%d\012\000" +.LC97: + .ascii "No.%d FLASH ID:%x %x %x %x %x %x\012\000" +.LC98: + .ascii "FlashLoadPhyInfo fail %x!!\012\000" +.LC99: + .ascii "Read pageadd=%x ecc=%x err=%x\012\000" +.LC100: + .ascii "data:\000" +.LC101: + .ascii "spare:\000" +.LC102: + .ascii "ReadRetry pageadd=%x ecc=%x err=%x\012\000" +.LC103: + .ascii "FLFB:%d %d\012\000" +.LC104: + .ascii "prog error: = %x\012\000" +.LC105: + .ascii "prog read error: = %x\012\000" +.LC106: + .ascii "prog read REFRESH: = %x\012\000" +.LC107: + .ascii "prog read s error: = %x %x %x\012\000" +.LC108: + .ascii "prog read d error: = %x %x %x\012\000" +.LC109: + .ascii "id = %x,%x addr= %x,spare= %x %x %x %x data= %x\012" + .ascii "\000" +.LC110: + .ascii "...%s enter...\012\000" +.LC111: + .ascii "superBlkID = %x vpc=%x\012\000" +.LC112: + .ascii "flashmode = %x pagenum = %x %x\012\000" +.LC113: + .ascii "id = %x,%x addr= %x,spare= %x %x %x %x data=%x %x\012" + .ascii "\000" +.LC114: + .ascii "blk = %x vpc=%x mode = %x\012\000" +.LC115: + .ascii "mlc id = %x,%x addr= %x,spare= %x %x %x %x data=%x " + .ascii "%x\012\000" +.LC116: + .ascii "slc id = %x,%x addr= %x,spare= %x %x %x %x data=%x " + .ascii "%x\012\000" +.LC117: + .ascii "ftl_scan_all_ppa blk %x page %x flag: %x\012\000" +.LC118: + .ascii "ftl_scan_all_ppa blk %x page %x flag: %x .........." + .ascii "..... is bad block\012\000" +.LC119: + .ascii "addr= %x, status= %d,spare= %x %x %x %x data=%x %x\012" + .ascii "\000" +.LC120: + .ascii "%s finished\012\000" +.LC121: + .ascii "FlashMakeFactorBbt %d\012\000" +.LC122: + .ascii "bad block:%d %d\012\000" +.LC123: + .ascii "FMFB:%d %d\012\000" +.LC124: + .ascii "E:bad block:%d\012\000" +.LC125: + .ascii "FMFB:Save %d %d\012\000" +.LC126: + .ascii "FtlBbmTblFlush id=%x,page=%x,previd=%x cnt=%d\012\000" +.LC127: + .ascii "FtlBbmTblFlush error:%x\012\000" +.LC128: + .ascii "FtlBbmTblFlush error = %x error count = %d\012\000" +.LC129: + .ascii "FtlGcFreeBadSuperBlk 0x%x\012\000" +.LC130: + .ascii "decrement_vpc_count %x = %d\012\000" +.LC131: + .ascii "decrement_vpc_count %x = %d in free list\012\000" +.LC132: + .ascii "FtlVpcTblFlush error = %x error count = %d\012\000" +.LC133: + .ascii "page map lost: %x %x\012\000" +.LC134: + .ascii "FtlMapWritePage error = %x\012\000" +.LC135: + .ascii "FtlMapWritePage error = %x error count = %d\012\000" +.LC136: + .ascii "FtlVendorPartRead refresh = %x phyAddr = %x\012\000" +.LC137: + .ascii "no ect\000" +.LC138: + .ascii "slc mode\000" +.LC139: + .ascii "BBT:\000" +.LC140: + .ascii "region_id = %x phyAddr = %x\012\000" +.LC141: + .ascii "map_ppn:\000" +.LC142: + .ascii "load_l2p_region refresh = %x phyAddr = %x\012\000" +.LC143: + .ascii "FtlCheckVpc2 %x = %x %x\012\000" +.LC144: + .ascii "free blk vpc error %x = %x %x\012\000" +.LC145: + .ascii "error_flag %x\012\000" +.LC146: + .ascii "Ftlscanalldata = %x\012\000" +.LC147: + .ascii "scan lpa = %x ppa= %x\012\000" +.LC148: + .ascii "lba = %x,addr= %x,spare= %x %x %x %x data=%x %x\012" + .ascii "\000" +.LC149: + .ascii "RSB refresh addr %x\012\000" +.LC150: + .ascii "spuer block %x vpn is 0\012 \000" +.LC151: + .ascii "g_recovery_ppa %x ver %x\012 \000" +.LC152: + .ascii "FtlCheckVpc %x = %x %x\012\000" +.LC153: + .ascii "FtlGcScanTempBlk Error ID %x %x!!!!!!! \012\000" +.LC154: + .ascii "FtlGcScanTempBlkError ID %x %x!!!!!!!\012\000" +.LC155: + .ascii "GC des block %x done\012\000" +.LC156: + .ascii "too many bad block = %d %d\012\000" +.LC157: + .ascii "%d GC datablk = %x vpc %x %x\012\000" +.LC158: + .ascii "SWL %x, FSB = %x vpc= %x,ec=%x th=%x\012\000" +.LC159: + .ascii "Ftlwrite decrement_vpc_count %x = %d\012\000" +.LC160: + .ascii "rk_ftl_de_init %x\012\000" +.LC161: + .ascii "...%s: no bad block mapping table, format device\012" + .ascii "\000" +.LC162: + .ascii "...%s FtlSysBlkInit error ,format device!\012\000" +.LC163: + .ascii "FtlInit %x\012\000" +.LC164: + .ascii "fix power lost blk = %x vpc=%x\012\000" +.LC165: + .ascii "erase power lost blk = %x vpc=%x\012\000" +.LC166: + .ascii "FtlWrite: lpa error:%x %x\012\000" +.LC167: + .ascii "id = %x,%x addr= %x,spare= %x %x %x %x data = %x\012" + .ascii "\000" +.LC168: + .ascii ":\000" +.LC169: + .ascii "phyBlk = %x,addr= %x,spare= %x %x %x %x data=%x %x\012" + .ascii "\000" +.LC170: + .ascii "Mblk:\000" +.LC171: + .ascii "L2P:\000" +.LC172: + .ascii "L2PC:\000" +.LC173: + .ascii "write_idblock fix data %x %x\012\000" +.LC174: + .ascii "idblk:\000" +.LC175: + .ascii "idb reverse %x %x\012\000" +.LC176: + .ascii "write_idblock totle_sec %x %x %x %x\012\000" +.LC177: + .ascii "IDBlockWriteData %x %x\012\000" +.LC178: + .ascii "IDBlockWriteData %x %x ret= %x\012\000" +.LC179: + .ascii "IdBlockReadData %x %x\012\000" +.LC180: + .ascii "IdBlockReadData %x %x ret= %x\012\000" +.LC181: + .ascii "write and check error:%d idb=%x,offset=%x,r=%x,w=%x" + .ascii "\012\000" +.LC182: + .ascii "write\000" +.LC183: + .ascii "read\000" +.LC184: + .ascii "write_idblock error %d\012\000" +.LC185: + .ascii "wl_lba %p %x %x %x\012\000" +.LC186: + .ascii "RKNAND_GET_DRM_KEY\012\000" +.LC187: + .ascii "rk_copy_from_user error\012\000" +.LC188: + .ascii "RKNAND_STORE_DRM_KEY\012\000" +.LC189: + .ascii "RKNAND_DIASBLE_SECURE_BOOT\012\000" +.LC190: + .ascii "RKNAND_ENASBLE_SECURE_BOOT\012\000" +.LC191: + .ascii "RKNAND_GET_SN_SECTOR\012\000" +.LC192: + .ascii "RKNAND_LOADER_UNLOCK\012\000" +.LC193: + .ascii "RKNAND_LOADER_STATUS\012\000" +.LC194: + .ascii "RKNAND_LOADER_LOCK\012\000" +.LC195: + .ascii "LockKey not match %d\012\000" +.LC196: + .ascii "RKNAND_GET_VENDOR_SECTOR\012\000" +.LC197: + .ascii "RKNAND_STORE_VENDOR_SECTOR\012\000" +.LC198: + .ascii "return ret = %lx\012\000" +.LC199: + .ascii "secureBootEn check error\012\000" +.LC200: + .ascii "\0013vendor storage %x,%x,%x\012\000" diff --git a/drivers/rk_nand/rk_ftl_arm_v7_thumb.S b/drivers/rk_nand/rk_ftl_arm_v7_thumb.S new file mode 100644 index 00000000000..a67898acb67 --- /dev/null +++ b/drivers/rk_nand/rk_ftl_arm_v7_thumb.S @@ -0,0 +1,30192 @@ +/* + * Copyright (c) 2016-2017, Fuzhou Rockchip Electronics Co., Ltd + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * date: 2021-07-26 + */ + .syntax unified + .arch armv7-a + .eabi_attribute 20, 1 + .eabi_attribute 21, 1 + .eabi_attribute 23, 3 + .eabi_attribute 24, 1 + .eabi_attribute 25, 1 + .eabi_attribute 26, 2 + .eabi_attribute 30, 4 + .eabi_attribute 34, 1 + .eabi_attribute 18, 4 + .file "rk_ftl_arm_v7.c" + .thumb + .text + .align 1 + .thumb + .thumb_func + .fpu softvfp + .type ndelay, %function +ndelay: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L2 + addw r0, r0, #999 + umull r0, r1, r0, r3 + ldr r3, .L2+4 + ldr r3, [r3, #8] + lsrs r0, r1, #6 + bx r3 @ indirect register sibling call +.L3: + .align 2 +.L2: + .word 274877907 + .word arm_delay_ops + .fnend + .size ndelay, .-ndelay + .align 1 + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type flash_read_ecc, %function +flash_read_ecc: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L5 + push {r4, lr} + .save {r4, lr} + ldr r4, [r3, r0, lsl #3] + add r3, r3, r0, lsl #3 + movs r0, #80 + ldrb r3, [r3, #4] @ zero_extendqisi2 + add r4, r4, r3, lsl #8 + movs r3, #122 + str r3, [r4, #2056] + bl ndelay + ldr r3, [r4, #2048] + ldr r0, [r4, #2048] + and r3, r3, #15 + and r0, r0, #15 + cmp r0, r3 + it cc + movcc r0, r3 + ldr r3, [r4, #2048] + and r3, r3, #15 + cmp r3, r0 + it cc + movcc r3, r0 + ldr r0, [r4, #2048] + and r0, r0, #15 + cmp r0, r3 + it cc + movcc r0, r3 + pop {r4, pc} +.L6: + .align 2 +.L5: + .word .LANCHOR0 + .fnend + .size flash_read_ecc, .-flash_read_ecc + .align 1 + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type ftl_set_blk_mode.part.9, %function +ftl_set_blk_mode.part.9: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L8 + lsrs r1, r0, #5 + and r0, r0, #31 + ldr r2, [r3, #32] + movs r3, #1 + lsl r0, r3, r0 + ldr r3, [r2, r1, lsl #2] + orrs r3, r3, r0 + str r3, [r2, r1, lsl #2] + bx lr +.L9: + .align 2 +.L8: + .word .LANCHOR0 + .fnend + .size ftl_set_blk_mode.part.9, .-ftl_set_blk_mode.part.9 + .align 1 + .global FlashMemCmp8 + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FlashMemCmp8, %function +FlashMemCmp8: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L18 + push {r4, r5, lr} + .save {r4, r5, lr} + ldrb r3, [r3, #36] @ zero_extendqisi2 + cbz r3, .L13 + ldrb r4, [r0, #1] @ zero_extendqisi2 + ldrb r3, [r1, #1] @ zero_extendqisi2 + cmp r4, r3 + beq .L17 + movs r3, #0 +.L13: + cmp r3, r2 + bne .L15 +.L17: + movs r0, #0 + pop {r4, r5, pc} +.L15: + ldrb r5, [r0, r3] @ zero_extendqisi2 + ldrb r4, [r1, r3] @ zero_extendqisi2 + adds r3, r3, #1 + cmp r5, r4 + beq .L13 + mov r0, r3 + pop {r4, r5, pc} +.L19: + .align 2 +.L18: + .word .LANCHOR0 + .fnend + .size FlashMemCmp8, .-FlashMemCmp8 + .align 1 + .global FlashRsvdBlkChk + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FlashRsvdBlkChk, %function +FlashRsvdBlkChk: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r2, .L23 + push {r4, lr} + .save {r4, lr} + ldrb r4, [r2, #37] @ zero_extendqisi2 + ldr r3, [r2, #40] + muls r3, r4, r3 + cmp r3, r1 + bls .L22 + adds r0, r0, #0 + it ne + movne r0, #1 + pop {r4, pc} +.L22: + movs r0, #1 + pop {r4, pc} +.L24: + .align 2 +.L23: + .word .LANCHOR0 + .fnend + .size FlashRsvdBlkChk, .-FlashRsvdBlkChk + .align 1 + .global FlashGetRandomizer + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FlashGetRandomizer, %function +FlashGetRandomizer: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L33 + and r2, r1, #127 + push {r4, lr} + .save {r4, lr} + ldrh r4, [r3, r2, lsl #1] + ldr r3, .L33+4 + ldrb r3, [r3, #44] @ zero_extendqisi2 + cbz r3, .L25 + bl FlashRsvdBlkChk + cbz r0, .L25 + orr r4, r4, #-1073741824 +.L25: + mov r0, r4 + pop {r4, pc} +.L34: + .align 2 +.L33: + .word .LANCHOR1 + .word .LANCHOR0 + .fnend + .size FlashGetRandomizer, .-FlashGetRandomizer + .align 1 + .global FlashSetRandomizer + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FlashSetRandomizer, %function +FlashSetRandomizer: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + and r2, r1, #127 + ldr r3, .L43 + mov r6, r0 + ldr r4, .L43+4 + ldrh r5, [r3, r2, lsl #1] + ldrb r2, [r4, #44] @ zero_extendqisi2 + cbz r2, .L36 + bl FlashRsvdBlkChk + cbz r0, .L36 + orr r5, r5, #-1073741824 +.L36: + ldr r3, [r4, r6, lsl #3] + str r5, [r3, #336] + pop {r4, r5, r6, pc} +.L44: + .align 2 +.L43: + .word .LANCHOR1 + .word .LANCHOR0 + .fnend + .size FlashSetRandomizer, .-FlashSetRandomizer + .align 1 + .global FlashBlockAlignInit + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FlashBlockAlignInit, %function +FlashBlockAlignInit: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + cmp r0, #512 + ldr r3, .L51 + bls .L46 + mov r2, #1024 +.L50: + str r2, [r3, #40] + bx lr +.L46: + cmp r0, #256 + bls .L48 + mov r2, #512 + b .L50 +.L48: + cmp r0, #128 + bhi .L49 + str r0, [r3, #40] + bx lr +.L49: + mov r2, #256 + b .L50 +.L52: + .align 2 +.L51: + .word .LANCHOR0 + .fnend + .size FlashBlockAlignInit, .-FlashBlockAlignInit + .align 1 + .global FlashReadCmd + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FlashReadCmd, %function +FlashReadCmd: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + push {r4, r5} + .save {r4, r5} + ldr r4, .L55 + ldr r3, [r4, r0, lsl #3] + add r2, r4, r0, lsl #3 + ldr r4, [r4, #48] + ldrb r2, [r2, #4] @ zero_extendqisi2 + ldrb r4, [r4, #7] @ zero_extendqisi2 + lsls r2, r2, #8 + cmp r4, #1 + itt eq + moveq r5, #38 + addeq r4, r3, r2 + add r3, r3, r2 + mov r2, #0 + it eq + streq r5, [r4, #2056] + str r2, [r3, #2056] + str r2, [r3, #2052] + str r2, [r3, #2052] + uxtb r2, r1 + str r2, [r3, #2052] + lsrs r2, r1, #8 + str r2, [r3, #2052] + lsrs r2, r1, #16 + str r2, [r3, #2052] + movs r2, #48 + str r2, [r3, #2056] + pop {r4, r5} + b FlashSetRandomizer +.L56: + .align 2 +.L55: + .word .LANCHOR0 + .fnend + .size FlashReadCmd, .-FlashReadCmd + .align 1 + .global FlashReadDpDataOutCmd + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FlashReadDpDataOutCmd, %function +FlashReadDpDataOutCmd: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + push {r4, r5, r6} + .save {r4, r5, r6} + uxtb r6, r1 + ldr r4, .L61 + lsrs r5, r1, #8 + ldr r3, [r4, r0, lsl #3] + add r2, r4, r0, lsl #3 + ldrb r4, [r4, #68] @ zero_extendqisi2 + ldrb r2, [r2, #4] @ zero_extendqisi2 + cmp r4, #1 + lsr r4, r1, #16 + lsl r2, r2, #8 + add r3, r3, r2 + bne .L58 + movs r2, #6 + str r2, [r3, #2056] + movs r2, #0 + str r2, [r3, #2052] + str r2, [r3, #2052] + str r6, [r3, #2052] + str r5, [r3, #2052] + str r4, [r3, #2052] +.L60: + movs r2, #224 + str r2, [r3, #2056] + pop {r4, r5, r6} + b FlashSetRandomizer +.L58: + movs r2, #0 + str r2, [r3, #2056] + str r2, [r3, #2052] + str r2, [r3, #2052] + str r6, [r3, #2052] + str r5, [r3, #2052] + str r4, [r3, #2052] + movs r4, #5 + str r4, [r3, #2056] + str r2, [r3, #2052] + str r2, [r3, #2052] + b .L60 +.L62: + .align 2 +.L61: + .word .LANCHOR0 + .fnend + .size FlashReadDpDataOutCmd, .-FlashReadDpDataOutCmd + .align 1 + .global FlashProgFirstCmd + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FlashProgFirstCmd, %function +FlashProgFirstCmd: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + push {r4, r5} + .save {r4, r5} + lsrs r2, r1, #16 + ldr r4, .L64 + ldr r3, [r4, r0, lsl #3] + add r4, r4, r0, lsl #3 + ldrb r4, [r4, #4] @ zero_extendqisi2 + add r3, r3, r4, lsl #8 + movs r4, #128 + str r4, [r3, #2056] + movs r4, #0 + str r4, [r3, #2052] + str r4, [r3, #2052] + uxtb r4, r1 + str r4, [r3, #2052] + lsrs r4, r1, #8 + str r4, [r3, #2052] + str r2, [r3, #2052] + pop {r4, r5} + b FlashSetRandomizer +.L65: + .align 2 +.L64: + .word .LANCHOR0 + .fnend + .size FlashProgFirstCmd, .-FlashProgFirstCmd + .align 1 + .global FlashEraseCmd + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FlashEraseCmd, %function +FlashEraseCmd: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, lr} + .save {r4, r5, lr} + ldr r4, .L71 + ldr r3, [r4, r0, lsl #3] + add r0, r4, r0, lsl #3 + ldrb r0, [r0, #4] @ zero_extendqisi2 + lsls r0, r0, #8 + cbz r2, .L67 + adds r2, r3, r0 + movs r5, #96 + str r5, [r2, #2056] + uxtb r5, r1 + str r5, [r2, #2052] + lsrs r5, r1, #8 + str r5, [r2, #2052] + lsrs r5, r1, #16 + str r5, [r2, #2052] + ldr r2, [r4, #40] + add r1, r1, r2 +.L67: + add r3, r3, r0 + movs r2, #96 + str r2, [r3, #2056] + uxtb r2, r1 + str r2, [r3, #2052] + lsrs r2, r1, #8 + lsrs r1, r1, #16 + str r2, [r3, #2052] + movs r2, #208 + str r1, [r3, #2052] + str r2, [r3, #2056] + pop {r4, r5, pc} +.L72: + .align 2 +.L71: + .word .LANCHOR0 + .fnend + .size FlashEraseCmd, .-FlashEraseCmd + .align 1 + .global FlashProgDpSecondCmd + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FlashProgDpSecondCmd, %function +FlashProgDpSecondCmd: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + push {r4, r5, r6} + .save {r4, r5, r6} + lsrs r2, r1, #16 + ldr r5, .L74 + ldr r3, [r5, r0, lsl #3] + add r4, r5, r0, lsl #3 + ldrb r6, [r4, #4] @ zero_extendqisi2 + ldrb r4, [r5, #63] @ zero_extendqisi2 + add r3, r3, r6, lsl #8 + str r4, [r3, #2056] + movs r4, #0 + str r4, [r3, #2052] + str r4, [r3, #2052] + uxtb r4, r1 + str r4, [r3, #2052] + lsrs r4, r1, #8 + str r4, [r3, #2052] + str r2, [r3, #2052] + pop {r4, r5, r6} + b FlashSetRandomizer +.L75: + .align 2 +.L74: + .word .LANCHOR0 + .fnend + .size FlashProgDpSecondCmd, .-FlashProgDpSecondCmd + .align 1 + .global FlashProgSecondCmd + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FlashProgSecondCmd, %function +FlashProgSecondCmd: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r3, r4, r5, lr} + .save {r3, r4, r5, lr} + ldr r3, .L77 + ldr r4, [r3, r0, lsl #3] + add r3, r3, r0, lsl #3 + ldr r0, .L77+4 + ldrb r5, [r3, #4] @ zero_extendqisi2 + ldr r3, .L77+8 + add r4, r4, r5, lsl #8 + ldr r3, [r3, #4] + blx r3 + movs r3, #16 + str r3, [r4, #2056] + pop {r3, r4, r5, pc} +.L78: + .align 2 +.L77: + .word .LANCHOR0 + .word 64424500 + .word arm_delay_ops + .fnend + .size FlashProgSecondCmd, .-FlashProgSecondCmd + .align 1 + .global FlashProgDpFirstCmd + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FlashProgDpFirstCmd, %function +FlashProgDpFirstCmd: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r2, .L80 + ldr r3, [r2, r0, lsl #3] + add r0, r2, r0, lsl #3 + ldrb r2, [r2, #62] @ zero_extendqisi2 + ldrb r1, [r0, #4] @ zero_extendqisi2 + add r3, r3, r1, lsl #8 + str r2, [r3, #2056] + bx lr +.L81: + .align 2 +.L80: + .word .LANCHOR0 + .fnend + .size FlashProgDpFirstCmd, .-FlashProgDpFirstCmd + .align 1 + .global FlashReadStatus + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FlashReadStatus, %function +FlashReadStatus: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r3, r4, r5, lr} + .save {r3, r4, r5, lr} + movs r2, #112 + ldr r3, .L83 + ldr r5, [r3, r0, lsl #3] + add r3, r3, r0, lsl #3 + movs r0, #80 + ldrb r4, [r3, #4] @ zero_extendqisi2 + add r3, r5, r4, lsl #8 + adds r4, r4, #8 + lsls r4, r4, #8 + str r2, [r3, #2056] + bl ndelay + ldr r0, [r5, r4] + pop {r3, r4, r5, pc} +.L84: + .align 2 +.L83: + .word .LANCHOR0 + .fnend + .size FlashReadStatus, .-FlashReadStatus + .align 1 + .global js_hash + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type js_hash, %function +js_hash: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L88 + add r1, r1, r0 + push {r4, lr} + .save {r4, lr} +.L86: + cmp r0, r1 + bne .L87 + mov r0, r3 + pop {r4, pc} +.L87: + lsrs r2, r3, #2 + ldrb r4, [r0], #1 @ zero_extendqisi2 + add r2, r2, r3, lsl #5 + add r2, r2, r4 + eors r3, r3, r2 + b .L86 +.L89: + .align 2 +.L88: + .word 1204201446 + .fnend + .size js_hash, .-js_hash + .align 1 + .global FlashLoadIdbInfo + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FlashLoadIdbInfo, %function +FlashLoadIdbInfo: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + movs r0, #0 + bx lr + .fnend + .size FlashLoadIdbInfo, .-FlashLoadIdbInfo + .align 1 + .global FlashPrintInfo + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FlashPrintInfo, %function +FlashPrintInfo: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + bx lr + .fnend + .size FlashPrintInfo, .-FlashPrintInfo + .align 1 + .global ToshibaSetRRPara + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type ToshibaSetRRPara, %function +ToshibaSetRRPara: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + add r8, r1, r1, lsl #2 + ldr r9, .L100+8 + mov r5, r0 + mov r6, r1 + movs r4, #0 + ldr r7, .L100 + add r10, r9, #256 +.L93: + ldrb r3, [r7, #85] @ zero_extendqisi2 + cmp r4, r3 + bcc .L97 + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L97: + movs r3, #85 + movs r0, #200 + str r3, [r5, #8] + ldrsb r3, [r4, r10] + str r3, [r5, #4] + bl ndelay + ldrb r3, [r7, #84] @ zero_extendqisi2 + cmp r3, #34 + bne .L94 + add r3, r4, r8 + add r3, r3, r10 +.L99: + ldrsb r3, [r3, #5] +.L98: + str r3, [r5] + adds r4, r4, #1 + b .L93 +.L94: + cmp r3, #35 + bne .L96 + ldr r2, .L100+4 + add r3, r4, r8 + add r3, r3, r2 + b .L99 +.L96: + add r3, r9, r6 + ldrsb r3, [r3, #396] + b .L98 +.L101: + .align 2 +.L100: + .word .LANCHOR0 + .word .LANCHOR1+301 + .word .LANCHOR1 + .fnend + .size ToshibaSetRRPara, .-ToshibaSetRRPara + .align 1 + .global SamsungSetRRPara + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type SamsungSetRRPara, %function +SamsungSetRRPara: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + movs r4, #0 + ldr r7, .L105 + mov r6, r0 + mov r9, #161 + mov r10, r4 + ldr r8, .L105+4 + add r1, r7, r1, lsl #2 + adds r5, r1, #3 +.L103: + ldrb r3, [r8, #85] @ zero_extendqisi2 + cmp r4, r3 + bcc .L104 + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L104: + str r9, [r6, #8] + mov r0, #300 + str r10, [r6] + ldrsb r3, [r7, r4] + adds r4, r4, #1 + str r3, [r6] + ldrsb r3, [r5, #1]! + str r3, [r6] + bl ndelay + b .L103 +.L106: + .align 2 +.L105: + .word .LANCHOR1+404 + .word .LANCHOR0 + .fnend + .size SamsungSetRRPara, .-SamsungSetRRPara + .align 1 + .global ftl_flash_suspend + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type ftl_flash_suspend, %function +ftl_flash_suspend: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L108 + ldr r2, [r3, #88] + ldr r1, [r2] + str r1, [r3, #92] + ldr r1, [r2, #4] + str r1, [r3, #96] + ldr r1, [r2, #8] + str r1, [r3, #100] + ldr r1, [r2, #12] + str r1, [r3, #104] + ldr r1, [r2, #304] + str r1, [r3, #108] + ldr r1, [r2, #308] + str r1, [r3, #112] + ldr r1, [r2, #336] + ldr r2, [r2, #344] + str r1, [r3, #116] + str r2, [r3, #120] + bx lr +.L109: + .align 2 +.L108: + .word .LANCHOR0 + .fnend + .size ftl_flash_suspend, .-ftl_flash_suspend + .global __aeabi_uidiv + .global __aeabi_uidivmod + .align 1 + .global LogAddr2PhyAddr + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type LogAddr2PhyAddr, %function +LogAddr2PhyAddr: + .fnstart + @ args = 4, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #12 + mov r9, r2 + ldr r4, .L115 + mov fp, r3 + mov r10, r1 + mov r7, r0 + ldr r5, [r0, #4] + ldrh r2, [r4, #136] + ldrh r3, [r4, #138] + ldrh r6, [r4, #40] + smulbb r3, r3, r2 + ldrb r2, [r4, #36] @ zero_extendqisi2 + uxth r3, r3 + cmp r2, #1 + it eq + lsleq r6, r6, #1 + ubfx r2, r5, #10, #16 + mov r1, r3 + str r3, [sp, #4] + mov r0, r2 + it eq + uxtheq r6, r6 + str r2, [sp] + bl __aeabi_uidiv + ldr r3, [sp, #4] + uxth r8, r0 + ldr r2, [sp] + mov r1, r3 + mov r0, r2 + bl __aeabi_uidivmod + cmp r10, #1 + uxth r1, r1 + ubfx r0, r5, #0, #10 + bne .L112 + ldrb r3, [r4, #152] @ zero_extendqisi2 + cbnz r3, .L112 + add r0, r4, r0, lsl #1 + ldrh r0, [r0, #156] +.L112: + add r4, r4, r8, lsl #2 + ldr r3, [r4, #1180] + mla r6, r6, r1, r3 + ldrb r3, [sp, #48] @ zero_extendqisi2 + cmp r3, #1 + add r0, r0, r6 + str r0, [r9] + str r8, [fp] + bls .L114 + ldr r0, [r7, #4] + ldr r3, [r7, #40] + add r0, r0, #1024 + subs r3, r0, r3 + rsbs r0, r3, #0 + adcs r0, r0, r3 +.L113: + add sp, sp, #12 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L114: + movs r0, #0 + b .L113 +.L116: + .align 2 +.L115: + .word .LANCHOR0 + .fnend + .size LogAddr2PhyAddr, .-LogAddr2PhyAddr + .align 1 + .global FlashReadStatusEN + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FlashReadStatusEN, %function +FlashReadStatusEN: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L129 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + ldr r5, [r3, r0, lsl #3] + add r0, r3, r0, lsl #3 + ldrb r4, [r0, #4] @ zero_extendqisi2 + ldr r0, [r3, #48] + ldrb r0, [r0, #8] @ zero_extendqisi2 + cmp r0, #2 + mov r0, r3 + lsl r3, r4, #8 + add r4, r4, #8 + bne .L118 + cbnz r2, .L119 + ldrb r2, [r0, #65] @ zero_extendqisi2 +.L128: + add r3, r3, r5 + str r2, [r3, #2056] + ldrb r0, [r0, #67] @ zero_extendqisi2 + cbz r0, .L123 + add r6, r5, r4, lsl #8 + movs r2, #0 +.L122: + cmp r2, r0 + bcc .L124 +.L123: + lsls r4, r4, #8 + movs r0, #80 + bl ndelay + ldr r0, [r5, r4] + uxtb r0, r0 + pop {r4, r5, r6, pc} +.L119: + ldrb r2, [r0, #66] @ zero_extendqisi2 + b .L128 +.L124: + lsls r3, r2, #3 + adds r2, r2, #1 + lsr r3, r1, r3 + uxtb r3, r3 + str r3, [r6, #4] + b .L122 +.L118: + add r3, r3, r5 + movs r2, #112 + str r2, [r3, #2056] + b .L123 +.L130: + .align 2 +.L129: + .word .LANCHOR0 + .fnend + .size FlashReadStatusEN, .-FlashReadStatusEN + .align 1 + .global FlashWaitReadyEN + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FlashWaitReadyEN, %function +FlashWaitReadyEN: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + mov r4, r0 + mov r5, r1 + mov r6, r2 +.L132: + mov r2, r6 + mov r1, r5 + mov r0, r4 + bl FlashReadStatusEN + cmp r0, #255 + mov r3, r0 + beq .L132 + lsls r3, r3, #25 + bmi .L131 + movs r1, #3 + movs r0, #1 + bl usleep_range + b .L132 +.L131: + pop {r4, r5, r6, pc} + .fnend + .size FlashWaitReadyEN, .-FlashWaitReadyEN + .align 1 + .global FlashScheduleEnSet + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FlashScheduleEnSet, %function +FlashScheduleEnSet: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L138 + ldr r2, [r3, #1212] + str r0, [r3, #1212] + mov r0, r2 + bx lr +.L139: + .align 2 +.L138: + .word .LANCHOR0 + .fnend + .size FlashScheduleEnSet, .-FlashScheduleEnSet + .align 1 + .global FlashGetPageSize + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FlashGetPageSize, %function +FlashGetPageSize: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L141 + ldr r3, [r3, #48] + ldrb r0, [r3, #9] @ zero_extendqisi2 + bx lr +.L142: + .align 2 +.L141: + .word .LANCHOR0 + .fnend + .size FlashGetPageSize, .-FlashGetPageSize + .align 1 + .global NandcReadDontCaseBusyEn + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type NandcReadDontCaseBusyEn, %function +NandcReadDontCaseBusyEn: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + bx lr + .fnend + .size NandcReadDontCaseBusyEn, .-NandcReadDontCaseBusyEn + .align 1 + .global NandcGetChipIf + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type NandcGetChipIf, %function +NandcGetChipIf: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r2, .L145 + add r3, r2, r0, lsl #3 + ldr r0, [r2, r0, lsl #3] + ldrb r3, [r3, #4] @ zero_extendqisi2 + adds r3, r3, #8 + add r0, r0, r3, lsl #8 + bx lr +.L146: + .align 2 +.L145: + .word .LANCHOR0 + .fnend + .size NandcGetChipIf, .-NandcGetChipIf + .align 1 + .global NandcSetDdrPara + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type NandcSetDdrPara, %function +NandcSetDdrPara: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L148 + ldr r2, [r3, #88] + lsls r3, r0, #8 + orr r0, r3, r0, lsl #16 + orr r0, r0, #1 + str r0, [r2, #304] + bx lr +.L149: + .align 2 +.L148: + .word .LANCHOR0 + .fnend + .size NandcSetDdrPara, .-NandcSetDdrPara + .align 1 + .global NandcSetDdrDiv + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type NandcSetDdrDiv, %function +NandcSetDdrDiv: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L151 + orr r0, r0, #16640 + ldr r3, [r3, #88] + str r0, [r3, #344] + bx lr +.L152: + .align 2 +.L151: + .word .LANCHOR0 + .fnend + .size NandcSetDdrDiv, .-NandcSetDdrDiv + .align 1 + .global NandcSetDdrMode + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type NandcSetDdrMode, %function +NandcSetDdrMode: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L156 + ldr r2, [r3, #88] + ldr r3, [r2] + cbnz r0, .L154 + bfi r3, r0, #13, #1 +.L155: + str r3, [r2] + bx lr +.L154: + orr r3, r3, #253952 + b .L155 +.L157: + .align 2 +.L156: + .word .LANCHOR0 + .fnend + .size NandcSetDdrMode, .-NandcSetDdrMode + .align 1 + .global NandcSetMode + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type NandcSetMode, %function +NandcSetMode: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L165 + ands r1, r0, #6 + ldr r2, [r3, #88] + ldr r3, [r2] + beq .L159 + lsls r1, r0, #29 + orr r3, r3, #24576 + movw r1, #8322 + bfc r3, #15, #1 + str r1, [r2, #344] + add r1, r1, #1040384 + addw r1, r1, #3969 + orr r3, r3, #196608 + str r1, [r2, #304] + it mi + orrmi r3, r3, #32768 + movs r1, #38 + str r1, [r2, #308] + movs r1, #39 + str r1, [r2, #308] +.L161: + str r3, [r2] + movs r0, #0 + bx lr +.L159: + bfi r3, r1, #13, #1 + b .L161 +.L166: + .align 2 +.L165: + .word .LANCHOR0 + .fnend + .size NandcSetMode, .-NandcSetMode + .align 1 + .global NandcFlashCs + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type NandcFlashCs, %function +NandcFlashCs: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L168 + movs r2, #1 + ldr r1, [r3, r0, lsl #3] + add r0, r3, r0, lsl #3 + ldrb r0, [r0, #4] @ zero_extendqisi2 + ldr r3, [r1] + lsls r2, r2, r0 + bfi r3, r2, #0, #8 + str r3, [r1] + bx lr +.L169: + .align 2 +.L168: + .word .LANCHOR0 + .fnend + .size NandcFlashCs, .-NandcFlashCs + .align 1 + .global NandcFlashDeCs + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type NandcFlashDeCs, %function +NandcFlashDeCs: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L171 + ldr r2, [r3, r0, lsl #3] + ldr r3, [r2] + bfc r3, #0, #8 + bfc r3, #17, #1 + str r3, [r2] + bx lr +.L172: + .align 2 +.L171: + .word .LANCHOR0 + .fnend + .size NandcFlashDeCs, .-NandcFlashDeCs + .align 1 + .global HynixSetRRPara + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type HynixSetRRPara, %function +HynixSetRRPara: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #12 + mov r7, r3 + ldr r5, .L181 + mov r6, r0 + mov r8, r1 + mov r9, r2 + ldr r3, [r5, #48] + ldrb r3, [r3, #19] @ zero_extendqisi2 + cmp r3, #6 + bne .L174 + movs r3, #20 + add r4, r5, #1216 + add r3, r3, r0, lsl #6 + add r3, r3, r7, lsl #2 +.L180: + add r4, r4, r3 + b .L175 +.L174: + cmp r3, #7 + bne .L176 + movs r3, #160 + movs r4, #28 + smlabb r4, r3, r0, r4 + movs r3, #10 + add r2, r5, #1216 + smlabb r3, r3, r7, r4 + adds r4, r2, r3 +.L175: + add r3, r5, r6, lsl #3 + ldr r10, [r5, r6, lsl #3] + mov r0, r6 + ldrb fp, [r3, #4] @ zero_extendqisi2 + add r8, r8, #-1 + bl NandcFlashCs + movs r3, #54 + add r8, r8, r9 + subs r4, r4, #1 + lsl fp, fp, #8 + add r0, r10, fp + str r3, [r0, #2056] + add r3, r9, #-1 + mov r9, r0 +.L178: + cmp r3, r8 + bne .L179 + movs r3, #22 + add r10, r10, fp + str r3, [r10, #2056] + mov r0, r6 + add r5, r5, r6 + bl NandcFlashDeCs + strb r7, [r5, #2068] + add sp, sp, #12 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L176: + cmp r3, #8 + bne .L177 + addw r4, r5, #1244 + add r3, r7, r7, lsl #2 + b .L180 +.L177: + adds r4, r7, #2 + add r4, r4, r0, lsl #3 + add r4, r5, r4, lsl #3 + addw r4, r4, #1220 + b .L175 +.L179: + ldrb r2, [r3, #1]! @ zero_extendqisi2 + movs r0, #200 + str r2, [r9, #2052] + str r3, [sp, #4] + bl ndelay + ldrsb r2, [r4, #1]! + ldr r3, [sp, #4] + str r2, [r9, #2048] + b .L178 +.L182: + .align 2 +.L181: + .word .LANCHOR0 + .fnend + .size HynixSetRRPara, .-HynixSetRRPara + .align 1 + .global FlashSetReadRetryDefault + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FlashSetReadRetryDefault, %function +FlashSetReadRetryDefault: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + ldr r5, .L189 + ldr r3, [r5, #48] + ldrb r3, [r3, #19] @ zero_extendqisi2 + subs r3, r3, #1 + cmp r3, #7 + bhi .L183 + movs r4, #0 + addw r6, r5, #2072 +.L186: + ldrb r3, [r6, r4, lsl #3] @ zero_extendqisi2 + uxtb r0, r4 + cmp r3, #173 + bne .L185 + movs r3, #0 + ldr r2, .L189+4 + ldrb r1, [r5, #1217] @ zero_extendqisi2 + bl HynixSetRRPara +.L185: + adds r4, r4, #1 + cmp r4, #4 + bne .L186 +.L183: + pop {r4, r5, r6, pc} +.L190: + .align 2 +.L189: + .word .LANCHOR0 + .word .LANCHOR0+1220 + .fnend + .size FlashSetReadRetryDefault, .-FlashSetReadRetryDefault + .align 1 + .global FlashWaitCmdDone + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FlashWaitCmdDone, %function +FlashWaitCmdDone: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r3, r4, r5, r6, r7, lr} + .save {r3, r4, r5, r6, r7, lr} + mov r7, r0 + ldr r5, .L198 + add r4, r5, r0, lsl #4 + ldr r3, [r4, #2112] + cbz r3, .L193 + ldrb r6, [r4, #2104] @ zero_extendqisi2 + add r5, r5, r7, lsl #2 + mov r0, r6 + bl NandcFlashCs + ldr r2, [r5, #1180] + mov r0, r6 + ldr r1, [r4, #2108] + adds r2, r2, #0 + it ne + movne r2, #1 + bl FlashWaitReadyEN + mov r1, r0 + mov r0, r6 + bl NandcFlashDeCs + ldr r3, [r4, #2112] + sbfx r1, r1, #0, #1 + str r1, [r3] + movs r3, #0 + ldr r2, [r4, #2116] + str r3, [r4, #2112] + cbz r2, .L193 + str r1, [r2] + str r3, [r4, #2116] +.L193: + movs r0, #0 + pop {r3, r4, r5, r6, r7, pc} +.L199: + .align 2 +.L198: + .word .LANCHOR0 + .fnend + .size FlashWaitCmdDone, .-FlashWaitCmdDone + .align 1 + .global NandcDelayns + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type NandcDelayns, %function +NandcDelayns: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r3, lr} + .save {r3, lr} + bl ndelay + movs r0, #0 + pop {r3, pc} + .fnend + .size NandcDelayns, .-NandcDelayns + .align 1 + .global NandcWaitFlashReadyNoDelay + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type NandcWaitFlashReadyNoDelay, %function +NandcWaitFlashReadyNoDelay: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L206 + push {r0, r1, r2, r4, r5, lr} + .save {r4, r5, lr} + .pad #12 + ldr r4, .L206+4 + ldr r5, [r3, r0, lsl #3] +.L203: + ldr r3, [r5] + str r3, [sp, #4] + ldr r3, [sp, #4] + lsls r3, r3, #22 + bmi .L204 + movs r0, #10 + bl ndelay + subs r4, r4, #1 + bne .L203 + mov r0, #-1 +.L201: + add sp, sp, #12 + @ sp needed + pop {r4, r5, pc} +.L204: + movs r0, #0 + b .L201 +.L207: + .align 2 +.L206: + .word .LANCHOR0 + .word 100000 + .fnend + .size NandcWaitFlashReadyNoDelay, .-NandcWaitFlashReadyNoDelay + .align 1 + .global NandcWaitFlashReady + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type NandcWaitFlashReady, %function +NandcWaitFlashReady: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r4, r5, lr} + .save {r4, r5, lr} + .pad #12 + ldr r3, .L213 + ldr r4, .L213+4 + ldr r5, [r3, r0, lsl #3] + movs r0, #130 + bl ndelay +.L210: + ldr r3, [r5] + str r3, [sp, #4] + ldr r3, [sp, #4] + lsls r3, r3, #22 + bmi .L211 + movs r1, #2 + movs r0, #1 + bl usleep_range + subs r4, r4, #1 + bne .L210 + mov r0, #-1 +.L208: + add sp, sp, #12 + @ sp needed + pop {r4, r5, pc} +.L211: + movs r0, #0 + b .L208 +.L214: + .align 2 +.L213: + .word .LANCHOR0 + .word 100000 + .fnend + .size NandcWaitFlashReady, .-NandcWaitFlashReady + .align 1 + .global FlashReset + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FlashReset, %function +FlashReset: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L216 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + mov r4, r0 + ldr r5, [r3, r0, lsl #3] + add r3, r3, r0, lsl #3 + ldrb r6, [r3, #4] @ zero_extendqisi2 + bl NandcFlashCs + movs r3, #255 + mov r0, r4 + add r5, r5, r6, lsl #8 + str r3, [r5, #2056] + bl NandcWaitFlashReady + mov r0, r4 + pop {r4, r5, r6, lr} + b NandcFlashDeCs +.L217: + .align 2 +.L216: + .word .LANCHOR0 + .fnend + .size FlashReset, .-FlashReset + .align 1 + .global flash_enter_slc_mode + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type flash_enter_slc_mode, %function +flash_enter_slc_mode: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + mov r6, r0 + ldr r5, .L224 + ldrb r3, [r5, #152] @ zero_extendqisi2 + cbz r3, .L218 + bl NandcFlashCs + add r3, r5, r6, lsl #3 + ldr r7, [r5, r6, lsl #3] + ldrb r8, [r3, #4] @ zero_extendqisi2 + ldrb r3, [r3, #2072] @ zero_extendqisi2 + cmp r3, #44 + lsl r8, r8, #8 + bne .L220 + add r4, r7, r8 + movs r3, #239 + str r3, [r4, #2056] + movs r3, #145 + str r3, [r4, #2052] + movs r0, #50 + bl ndelay + movs r3, #0 + movs r2, #1 + str r3, [r4, #2048] + movs r0, #100 + str r2, [r4, #2048] + str r3, [r4, #2048] + str r3, [r4, #2048] + bl ndelay +.L220: + mov r0, r6 + add r7, r7, r8 + bl NandcWaitFlashReadyNoDelay + movs r3, #218 + mov r0, r6 + str r3, [r7, #2056] + bl NandcWaitFlashReady + movs r3, #2 + strb r3, [r5, #2232] +.L218: + pop {r4, r5, r6, r7, r8, pc} +.L225: + .align 2 +.L224: + .word .LANCHOR0 + .fnend + .size flash_enter_slc_mode, .-flash_enter_slc_mode + .align 1 + .global flash_exit_slc_mode + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type flash_exit_slc_mode, %function +flash_exit_slc_mode: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + mov r6, r0 + ldr r5, .L232 + ldrb r3, [r5, #152] @ zero_extendqisi2 + cbz r3, .L226 + bl NandcFlashCs + add r3, r5, r6, lsl #3 + ldr r7, [r5, r6, lsl #3] + ldrb r8, [r3, #4] @ zero_extendqisi2 + ldrb r3, [r3, #2072] @ zero_extendqisi2 + cmp r3, #44 + lsl r8, r8, #8 + bne .L228 + add r4, r7, r8 + movs r3, #239 + str r3, [r4, #2056] + movs r3, #145 + str r3, [r4, #2052] + movs r0, #50 + bl ndelay + movs r3, #2 + movs r0, #100 + str r3, [r4, #2048] + movs r3, #1 + str r3, [r4, #2048] + movs r3, #0 + str r3, [r4, #2048] + str r3, [r4, #2048] + bl ndelay +.L228: + mov r0, r6 + add r7, r7, r8 + bl NandcWaitFlashReadyNoDelay + movs r3, #223 + mov r0, r6 + str r3, [r7, #2056] + bl NandcWaitFlashReady + movs r3, #0 + strb r3, [r5, #2232] +.L226: + pop {r4, r5, r6, r7, r8, pc} +.L233: + .align 2 +.L232: + .word .LANCHOR0 + .fnend + .size flash_exit_slc_mode, .-flash_exit_slc_mode + .align 1 + .global FlashEraseBlock + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FlashEraseBlock, %function +FlashEraseBlock: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + mov r4, r0 + mov r5, r1 + mov r6, r2 + bl NandcWaitFlashReady + mov r0, r4 + bl NandcFlashCs + mov r2, r6 + mov r1, r5 + mov r0, r4 + bl FlashEraseCmd + mov r0, r4 + bl NandcWaitFlashReady + mov r1, r5 + mov r0, r4 + bl FlashReadStatus + mov r1, r0 + mov r0, r4 + bl NandcFlashDeCs + and r0, r1, #1 + pop {r4, r5, r6, pc} + .fnend + .size FlashEraseBlock, .-FlashEraseBlock + .align 1 + .global FlashSetInterfaceMode + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FlashSetInterfaceMode, %function +FlashSetInterfaceMode: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #12 + movs r5, #0 + ldr r6, .L263 + mov ip, #128 + mov lr, #1 + mov r9, #32 + mov r10, #5 + ldrb r3, [r6, #2233] @ zero_extendqisi2 + addw r8, r6, #2072 + and r2, r3, #4 + and r3, r3, #1 + str r2, [sp, #4] + mov r2, r5 + str r3, [sp] +.L245: + ldrb r4, [r5, r8] @ zero_extendqisi2 + cmp r4, #152 + beq .L236 + cmp r4, #69 + beq .L236 + cmp r4, #173 + beq .L236 + cmp r4, #44 + bne .L237 +.L236: + cmp r0, #1 + add r3, r6, r5 + ldr r1, [r6, r5] + ldrb r3, [r3, #4] @ zero_extendqisi2 + bne .L238 + ldr r7, [sp] + cbz r7, .L237 + lsls r3, r3, #8 + cmp r4, #173 + mov r7, #239 + add fp, r1, r3 + str r7, [fp, #2056] + bne .L239 + str r0, [fp, #2052] +.L262: + str r2, [fp, #2048] + b .L243 +.L239: + cmp r4, #44 + itete eq + streq r0, [fp, #2052] + strne ip, [fp, #2052] + streq r10, [fp, #2048] + strne r0, [fp, #2048] +.L243: + add r3, r3, r1 + str r2, [r3, #2048] + str r2, [r3, #2048] + str r2, [r3, #2048] +.L237: + adds r5, r5, #8 + cmp r5, #32 + bne .L245 + movs r0, #0 + bl NandcWaitFlashReady + movs r0, #0 + add sp, sp, #12 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L238: + ldr r7, [sp, #4] + cmp r7, #0 + beq .L237 + lsls r3, r3, #8 + cmp r4, #173 + mov r7, #239 + add fp, r1, r3 + str r7, [fp, #2056] + bne .L242 + str lr, [fp, #2052] + str r9, [fp, #2048] + b .L243 +.L242: + cmp r4, #44 + bne .L244 + movs r4, #35 + str lr, [fp, #2052] + str r4, [fp, #2048] + b .L243 +.L244: + str ip, [fp, #2052] + b .L262 +.L264: + .align 2 +.L263: + .word .LANCHOR0 + .fnend + .size FlashSetInterfaceMode, .-FlashSetInterfaceMode + .align 1 + .global FlashReadSpare + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FlashReadSpare, %function +FlashReadSpare: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r3, r4, r5, r6, r7, lr} + .save {r3, r4, r5, r6, r7, lr} + mov r7, r2 + ldr r5, .L266 + ldr r3, .L266+4 + ldr r4, [r5, r0, lsl #3] + add r5, r5, r0, lsl #3 + ldrb r3, [r3, #477] @ zero_extendqisi2 + ldrb r2, [r5, #4] @ zero_extendqisi2 + lsls r3, r3, #9 + add r4, r4, r2, lsl #8 + movs r2, #0 + str r2, [r4, #2056] + str r3, [r4, #2052] + lsrs r3, r3, #8 + str r3, [r4, #2052] + uxtb r3, r1 + str r3, [r4, #2052] + lsrs r3, r1, #8 + lsrs r1, r1, #16 + str r3, [r4, #2052] + movs r3, #48 + str r1, [r4, #2052] + str r3, [r4, #2056] + bl NandcWaitFlashReady + ldr r3, [r4, #2048] + strb r3, [r7] + pop {r3, r4, r5, r6, r7, pc} +.L267: + .align 2 +.L266: + .word .LANCHOR0 + .word .LANCHOR1 + .fnend + .size FlashReadSpare, .-FlashReadSpare + .align 1 + .global SandiskProgTestBadBlock + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type SandiskProgTestBadBlock, %function +SandiskProgTestBadBlock: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L269 + push {r4, lr} + .save {r4, lr} + ldr r4, [r3, r0, lsl #3] + add r3, r3, r0, lsl #3 + ldrb r3, [r3, #4] @ zero_extendqisi2 + add r4, r4, r3, lsl #8 + movs r3, #162 + str r3, [r4, #2056] + movs r3, #128 + str r3, [r4, #2056] + movs r3, #0 + str r3, [r4, #2052] + str r3, [r4, #2052] + uxtb r3, r1 + str r3, [r4, #2052] + lsrs r3, r1, #8 + lsrs r1, r1, #16 + str r3, [r4, #2052] + movs r3, #16 + str r1, [r4, #2052] + str r3, [r4, #2056] + bl NandcWaitFlashReady + movs r3, #112 + movs r0, #80 + str r3, [r4, #2056] + bl ndelay + ldr r0, [r4, #2048] + and r0, r0, #1 + pop {r4, pc} +.L270: + .align 2 +.L269: + .word .LANCHOR0 + .fnend + .size SandiskProgTestBadBlock, .-SandiskProgTestBadBlock + .align 1 + .global SandiskSetRRPara + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type SandiskSetRRPara, %function +SandiskSetRRPara: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + movs r3, #239 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + str r3, [r0, #8] + movs r3, #17 + mov r5, r0 + mov r4, r1 + str r3, [r0, #4] + movs r0, #200 + bl ndelay + ldr r0, .L277 + add r4, r4, r4, lsl #2 + ldr r1, .L277+4 + movs r2, #0 + sub r6, r0, #45 +.L272: + ldrb r3, [r1, #85] @ zero_extendqisi2 + cmp r2, r3 + bcc .L275 + movs r0, #0 + pop {r4, r5, r6, lr} + b NandcWaitFlashReady +.L275: + ldrb r3, [r1, #84] @ zero_extendqisi2 + cmp r3, #67 + add r3, r2, r4 + ite eq + addeq r3, r3, r6 + addne r3, r3, r0 + ldrsb r3, [r3, #5] + adds r2, r2, #1 + str r3, [r5] + b .L272 +.L278: + .align 2 +.L277: + .word .LANCHOR1+301 + .word .LANCHOR0 + .fnend + .size SandiskSetRRPara, .-SandiskSetRRPara + .align 1 + .global micron_auto_read_calibration_config + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type micron_auto_read_calibration_config, %function +micron_auto_read_calibration_config: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + mov r5, r0 + mov r6, r1 + bl NandcWaitFlashReady + ldr r0, .L280 + ldr r4, [r0, r5, lsl #3] + add r0, r0, r5, lsl #3 + ldrb r3, [r0, #4] @ zero_extendqisi2 + movs r0, #200 + add r4, r4, r3, lsl #8 + movs r3, #239 + str r3, [r4, #2056] + movs r3, #150 + str r3, [r4, #2052] + bl ndelay + movs r3, #0 + str r6, [r4, #2048] + str r3, [r4, #2048] + str r3, [r4, #2048] + str r3, [r4, #2048] + pop {r4, r5, r6, pc} +.L281: + .align 2 +.L280: + .word .LANCHOR0 + .fnend + .size micron_auto_read_calibration_config, .-micron_auto_read_calibration_config + .align 1 + .global FlashEraseSLc2KBlocks + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FlashEraseSLc2KBlocks, %function +FlashEraseSLc2KBlocks: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + .pad #16 + movs r5, #0 + ldr r8, .L292 + mov r6, r0 + mov r9, r1 + mov r7, r5 + ldr r10, .L292+4 +.L283: + cmp r7, r9 + bne .L288 + movs r0, #0 + add sp, sp, #16 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L288: + sub r3, r9, r7 + add r2, sp, #8 + uxtb r3, r3 + movs r1, #0 + adds r0, r6, r5 + str r3, [sp] + add r3, sp, #12 + bl LogAddr2PhyAddr + ldrb r2, [r8, #2234] @ zero_extendqisi2 + ldr r3, [sp, #12] + cmp r2, r3 + bhi .L284 + mov r3, #-1 + str r3, [r6, r5] +.L285: + adds r7, r7, #1 + adds r5, r5, #36 + b .L283 +.L284: + add r2, r8, r3 + add r3, r8, r3, lsl #4 + ldrb r4, [r2, #2236] @ zero_extendqisi2 + strb r4, [r3, #2104] + mov r0, r4 + bl NandcWaitFlashReady + mov r0, r4 + bl NandcFlashCs + movs r2, #0 + ldr r1, [sp, #8] + mov r0, r4 + bl FlashEraseCmd + mov r0, r4 + bl NandcWaitFlashReady + mov r0, r4 + ldr r1, [sp, #8] + bl FlashReadStatus + sbfx r0, r0, #0, #1 + ldr r1, [sp, #8] + str r0, [r6, r5] + movs r2, #0 + ldr r3, [r8, #40] + mov r0, r4 + add r1, r1, r3 + bl FlashEraseCmd + mov r0, r4 + bl NandcWaitFlashReady + mov r0, r4 + ldr r1, [sp, #8] + bl FlashReadStatus + lsls r3, r0, #31 + itt mi + movmi r3, #-1 + strmi r3, [r6, r5] + ldr r3, [r6, r5] + adds r3, r3, #1 + bne .L287 + ldr r1, [sp, #8] + mov r0, r10 + bl printk +.L287: + mov r0, r4 + bl NandcFlashDeCs + b .L285 +.L293: + .align 2 +.L292: + .word .LANCHOR0 + .word .LC1 + .fnend + .size FlashEraseSLc2KBlocks, .-FlashEraseSLc2KBlocks + .align 1 + .global FlashEraseBlocks + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FlashEraseBlocks, %function +FlashEraseBlocks: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r9, r0 + ldr r4, .L325 + .pad #20 + sub sp, sp, #20 + mov r10, r1 + mov r8, r2 + ldrb r5, [r4, #36] @ zero_extendqisi2 + cbz r5, .L296 + mov r1, r2 + bl FlashEraseSLc2KBlocks +.L294: + add sp, sp, #20 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L305: + movs r3, #36 + add r2, sp, #8 + mul r6, r3, r5 + sub r3, r8, r5 + uxtb r3, r3 + movs r1, #0 + str r3, [sp] + add r3, sp, #12 + add fp, r9, r6 + mov r0, fp + bl LogAddr2PhyAddr + ldrb r3, [r4, #2234] @ zero_extendqisi2 + mov r7, r0 + ldr r0, [sp, #12] + cmp r3, r0 + bhi .L298 + mov r3, #-1 + str r3, [r9, r6] +.L299: + adds r5, r5, #1 +.L296: + cmp r5, r8 + bcc .L305 + ldr r6, .L325+4 + movs r5, #0 +.L306: + ldrb r3, [r4, #2234] @ zero_extendqisi2 + cmp r5, r3 + bcc .L308 + ldr r3, [r4, #2248] + cmp r3, #0 + bne .L309 +.L310: + movs r0, #0 + b .L294 +.L298: + ldrb r3, [r4, #2244] @ zero_extendqisi2 + cmp r3, #0 + add r3, r4, r0, lsl #4 + it eq + moveq r7, #0 + ldr r3, [r3, #2112] + cbz r3, .L301 + uxtb r0, r0 + bl FlashWaitCmdDone +.L301: + ldr r2, [sp, #12] + movs r0, #0 + lsls r3, r2, #4 + adds r1, r4, r3 + str r0, [r1, #2116] + ldr r0, [sp, #8] + str fp, [r1, #2112] + str r0, [r1, #2108] + cbz r7, .L302 + adds r6, r6, #36 + add r6, r6, r9 + str r6, [r1, #2116] +.L302: + add r2, r2, r4 + add r3, r3, r4 + ldrb r6, [r2, #2236] @ zero_extendqisi2 + mov r0, r6 + strb r6, [r3, #2104] + bl NandcFlashCs + cmp r10, #1 + mov r0, r6 + bne .L303 + ldrb r3, [r4, #152] @ zero_extendqisi2 + cbz r3, .L303 + bl flash_enter_slc_mode +.L304: + ldr r3, [sp, #12] + mov r0, r6 + ldr r1, [sp, #8] + add r5, r5, r7 + add r3, r4, r3, lsl #2 + ldr r2, [r3, #1180] + adds r2, r2, #0 + it ne + movne r2, #1 + bl FlashWaitReadyEN + mov r2, r7 + ldr r1, [sp, #8] + mov r0, r6 + bl FlashEraseCmd + mov r0, r6 + bl NandcFlashDeCs + b .L299 +.L303: + bl flash_exit_slc_mode + b .L304 +.L308: + uxtb r0, r5 + bl FlashWaitCmdDone + cmp r10, #1 + bne .L307 + ldrb r3, [r4, #152] @ zero_extendqisi2 + cbz r3, .L307 + lsls r3, r5, #4 + ldrb r0, [r6, r3] @ zero_extendqisi2 + bl flash_exit_slc_mode +.L307: + adds r5, r5, #1 + b .L306 +.L309: + ldrb r3, [r4, #2072] @ zero_extendqisi2 + cmp r3, #69 + bne .L310 + movs r3, #0 + movs r2, #36 + mov r1, r3 +.L311: + cmp r3, r8 + beq .L310 + mul r0, r2, r3 + adds r3, r3, #1 + str r1, [r9, r0] + b .L311 +.L326: + .align 2 +.L325: + .word .LANCHOR0 + .word .LANCHOR0+2104 + .fnend + .size FlashEraseBlocks, .-FlashEraseBlocks + .align 1 + .global FlashReadDpCmd + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FlashReadDpCmd, %function +FlashReadDpCmd: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + mov r6, r0 + ldr r0, .L332 + mov r7, r1 + uxtb r9, r2 + lsr r8, r2, #8 + lsrs r5, r2, #16 + uxtb lr, r7 + ldr r2, [r0, #48] + lsr ip, r7, #8 + add r1, r0, r6, lsl #3 + ldr r3, [r0, r6, lsl #3] + ldrb r4, [r1, #4] @ zero_extendqisi2 + ldrb r1, [r0, #68] @ zero_extendqisi2 + ldrb r2, [r2, #7] @ zero_extendqisi2 + cmp r1, #1 + lsl r4, r4, #8 + lsr r1, r7, #16 + bne .L328 + cmp r2, #1 + itt eq + addeq r2, r3, r4 + moveq r10, #38 + add r4, r4, r3 + it eq + streq r10, [r2, #2056] + ldrb r3, [r0, #61] @ zero_extendqisi2 + mov r10, #0 + ldrb r2, [r0, #60] @ zero_extendqisi2 + mov r0, r6 + str r2, [r4, #2056] + str r10, [r4, #2052] + str r10, [r4, #2052] + str lr, [r4, #2052] + str ip, [r4, #2052] + str r1, [r4, #2052] + str r3, [r4, #2056] + bl NandcWaitFlashReady + movs r3, #48 + str r10, [r4, #2056] + str r10, [r4, #2052] + str r10, [r4, #2052] + str r9, [r4, #2052] + str r8, [r4, #2052] + str r5, [r4, #2052] + str r3, [r4, #2056] +.L330: + mov r1, r7 + mov r0, r6 + pop {r4, r5, r6, r7, r8, r9, r10, lr} + b FlashSetRandomizer +.L328: + cmp r2, #1 + ittt eq + addeq r2, r3, r4 + moveq r10, #38 + streq r10, [r2, #2056] + add r3, r3, r4 + ldrb r2, [r0, #60] @ zero_extendqisi2 + str r2, [r3, #2056] + ldrb r2, [r0, #61] @ zero_extendqisi2 + str lr, [r3, #2052] + str ip, [r3, #2052] + str r1, [r3, #2052] + str r2, [r3, #2056] + movs r2, #48 + str r9, [r3, #2052] + str r8, [r3, #2052] + str r5, [r3, #2052] + str r2, [r3, #2056] + b .L330 +.L333: + .align 2 +.L332: + .word .LANCHOR0 + .fnend + .size FlashReadDpCmd, .-FlashReadDpCmd + .align 1 + .global ftl_flash_de_init + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type ftl_flash_de_init, %function +ftl_flash_de_init: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, lr} + .save {r4, lr} + movs r0, #0 + ldr r4, .L344 + bl NandcWaitFlashReady + bl FlashSetReadRetryDefault + ldr r0, [r4, #2252] + cbz r0, .L335 + movs r0, #0 + bl flash_enter_slc_mode +.L336: + ldrb r3, [r4, #2256] @ zero_extendqisi2 + cbz r3, .L337 + ldrb r3, [r4, #2233] @ zero_extendqisi2 + lsls r3, r3, #31 + bpl .L337 + movs r0, #1 + bl FlashSetInterfaceMode + movs r0, #1 + bl NandcSetMode + movs r3, #0 + strb r3, [r4, #2256] +.L337: + ldr r3, [r4] + movs r0, #0 + str r0, [r3, #336] + pop {r4, pc} +.L335: + bl flash_exit_slc_mode + b .L336 +.L345: + .align 2 +.L344: + .word .LANCHOR0 + .fnend + .size ftl_flash_de_init, .-ftl_flash_de_init + .align 1 + .global NandcRandmzSel + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type NandcRandmzSel, %function +NandcRandmzSel: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L347 + ldr r3, [r3, r0, lsl #3] + str r1, [r3, #336] + bx lr +.L348: + .align 2 +.L347: + .word .LANCHOR0 + .fnend + .size NandcRandmzSel, .-NandcRandmzSel + .global __aeabi_idiv + .align 1 + .global NandcTimeCfg + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type NandcTimeCfg, %function +NandcTimeCfg: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, lr} + .save {r4, lr} + mov r4, r0 + movs r0, #0 + bl rknand_get_clk_rate + ldr r1, .L359 + bl __aeabi_idiv + ldr r3, .L359+4 + cmp r0, #250 + ldr r3, [r3, #88] + ble .L350 + movw r2, #8354 +.L357: + str r2, [r3, #4] + pop {r4, pc} +.L350: + cmp r0, #220 + ble .L352 +.L358: + movw r2, #8322 + b .L357 +.L352: + cmp r0, #185 + ble .L353 + movw r2, #4226 + b .L357 +.L353: + cmp r0, #160 + ble .L354 + movw r2, #4194 + b .L357 +.L354: + cmp r4, #35 + bhi .L355 + movw r2, #4193 + b .L357 +.L355: + cmp r4, #99 + bhi .L358 + movw r2, #4225 + b .L357 +.L360: + .align 2 +.L359: + .word 1000000 + .word .LANCHOR0 + .fnend + .size NandcTimeCfg, .-NandcTimeCfg + .align 1 + .global FlashTimingCfg + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FlashTimingCfg, %function +FlashTimingCfg: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + sub r3, r0, #4192 + subs r3, r3, #1 + cmp r3, #1 + bls .L362 + sub r3, r0, #4224 + subs r3, r3, #1 + cmp r3, #1 + bls .L362 + movw r3, #8322 + cmp r0, r3 + bne .L363 +.L362: + ldr r3, .L364 + ldr r3, [r3, #88] + str r0, [r3, #4] +.L363: + ldr r3, .L364+4 + ldrb r0, [r3, #489] @ zero_extendqisi2 + b NandcTimeCfg +.L365: + .align 2 +.L364: + .word .LANCHOR0 + .word .LANCHOR1 + .fnend + .size FlashTimingCfg, .-FlashTimingCfg + .align 1 + .global NandcInit + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type NandcInit, %function +NandcInit: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r3, r4, r5, lr} + .save {r3, r4, r5, lr} + movs r2, #1 + ldr r3, .L368 + movs r1, #0 + movs r5, #0 + str r2, [r3, #12] + movs r2, #2 + str r2, [r3, #20] + movs r2, #3 + stm r3, {r0, r1} + str r0, [r3, #8] + str r0, [r3, #16] + str r0, [r3, #24] + str r0, [r3, #88] + str r2, [r3, #28] + ldr r2, [r0] + and r2, r2, #253952 + ubfx r4, r2, #13, #1 + bfi r2, r1, #13, #1 + ldr r1, [r0, #352] + orr r2, r2, #256 + str r4, [r3, #2260] + movw r4, #2049 + ubfx r1, r1, #16, #4 + str r1, [r3, #2264] + ldr r1, [r0, #352] + cmp r1, r4 + str r1, [r3, #2268] + mov r4, r3 + itt eq + moveq r3, #8 + streq r3, [r4, #2264] + str r2, [r0] + movs r0, #40 + ldr r3, [r4, #88] + str r5, [r3, #336] + bl NandcTimeCfg + ldr r3, [r4, #88] + movw r2, #8322 + mov r0, #36864 + str r2, [r3, #344] + ldr r2, .L368+4 + str r2, [r3, #304] + bl ftl_malloc + str r0, [r4, #2272] + str r0, [r4, #2276] + add r0, r0, #32768 + str r0, [r4, #2280] + str r5, [r4, #2300] + str r5, [r4, #2308] + pop {r3, r4, r5, pc} +.L369: + .align 2 +.L368: + .word .LANCHOR0 + .word 1579009 + .fnend + .size NandcInit, .-NandcInit + .align 1 + .global NandcGetTimeCfg + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type NandcGetTimeCfg, %function +NandcGetTimeCfg: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, lr} + .save {r4, r5, lr} + ldr r4, .L371 + ldr r5, [r4, #88] + ldr r5, [r5, #4] + str r5, [r0] + ldr r0, [r4, #88] + ldr r0, [r0] + str r0, [r1] + ldr r1, [r4, #88] + ldr r1, [r1, #304] + str r1, [r2] + ldr r1, [r4, #88] + ldr r2, [r1, #308] + ldr r1, [r1, #344] + uxtb r2, r2 + orr r2, r2, r1, lsl #16 + str r2, [r3] + pop {r4, r5, pc} +.L372: + .align 2 +.L371: + .word .LANCHOR0 + .fnend + .size NandcGetTimeCfg, .-NandcGetTimeCfg + .align 1 + .global NandcBchSel + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type NandcBchSel, %function +NandcBchSel: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L381 + movs r1, #0 + push {r4, lr} + .save {r4, lr} + movs r4, #1 + ldr r2, [r3, #88] + str r0, [r3, #2312] + mov r3, r1 + str r4, [r2, #8] + movs r4, #16 + cmp r0, r4 + bfi r3, r4, #8, #8 + bfi r3, r1, #18, #1 + bne .L374 +.L377: + bfc r3, #4, #1 +.L375: + orr r3, r3, #1 + str r3, [r2, #12] + pop {r4, pc} +.L374: + cmp r0, #24 + bne .L376 + orr r3, r3, #16 + b .L375 +.L376: + cmp r0, #40 + orr r3, r3, #262144 + orr r3, r3, #16 + bne .L375 + b .L377 +.L382: + .align 2 +.L381: + .word .LANCHOR0 + .fnend + .size NandcBchSel, .-NandcBchSel + .align 1 + .global FlashBchSel + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FlashBchSel, %function +FlashBchSel: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L384 + strb r0, [r3, #2316] + b NandcBchSel +.L385: + .align 2 +.L384: + .word .LANCHOR0 + .fnend + .size FlashBchSel, .-FlashBchSel + .align 1 + .global ftl_flash_resume + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type ftl_flash_resume, %function +ftl_flash_resume: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + movs r5, #0 + ldr r4, .L394 + ldr r2, [r4, #88] + addw r6, r4, #2072 + ldr r1, [r4, #92] + str r1, [r2] + ldr r1, [r4, #96] + ldr r2, [r4, #88] + str r1, [r2, #4] + ldr r1, [r4, #100] + str r1, [r2, #8] + ldr r1, [r4, #104] + str r1, [r2, #12] + ldr r1, [r4, #108] + str r1, [r2, #304] + ldr r1, [r4, #112] + str r1, [r2, #308] + ldr r1, [r4, #116] + str r1, [r2, #336] + ldr r1, [r4, #120] + str r1, [r2, #344] +.L388: + ldrb r3, [r6, r5, lsl #3] @ zero_extendqisi2 + subs r3, r3, #1 + uxtb r3, r3 + cmp r3, #253 + bhi .L387 + uxtb r0, r5 + bl FlashReset +.L387: + adds r5, r5, #1 + cmp r5, #4 + bne .L388 + ldrb r3, [r4, #2256] @ zero_extendqisi2 + cbz r3, .L389 + movs r0, #1 + bl NandcSetMode + ldrb r0, [r4, #2233] @ zero_extendqisi2 + bl FlashSetInterfaceMode + ldrb r0, [r4, #2233] @ zero_extendqisi2 + bl NandcSetMode + ldrb r0, [r4, #109] @ zero_extendqisi2 + bl NandcSetDdrPara +.L389: + ldr r3, [r4, #48] + pop {r4, r5, r6, lr} + ldrb r0, [r3, #20] @ zero_extendqisi2 + b FlashBchSel +.L395: + .align 2 +.L394: + .word .LANCHOR0 + .fnend + .size ftl_flash_resume, .-ftl_flash_resume + .align 1 + .global ftl_nandc_get_irq_status + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type ftl_nandc_get_irq_status, %function +ftl_nandc_get_irq_status: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r0, [r0, #372] + bx lr + .fnend + .size ftl_nandc_get_irq_status, .-ftl_nandc_get_irq_status + .align 1 + .global rk_nandc_flash_ready + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type rk_nandc_flash_ready, %function +rk_nandc_flash_ready: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, [r0, #368] + orr r3, r3, #2 + str r3, [r0, #368] + ldr r3, [r0, #364] + bic r3, r3, #2 + str r3, [r0, #364] + bx lr + .fnend + .size rk_nandc_flash_ready, .-rk_nandc_flash_ready + .align 1 + .global NandcIqrWaitFlashReady + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type NandcIqrWaitFlashReady, %function +NandcIqrWaitFlashReady: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + bx lr + .fnend + .size NandcIqrWaitFlashReady, .-NandcIqrWaitFlashReady + .align 1 + .global rk_nandc_flash_xfer_completed + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type rk_nandc_flash_xfer_completed, %function +rk_nandc_flash_xfer_completed: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, [r0, #368] + orr r3, r3, #1 + str r3, [r0, #368] + ldr r3, [r0, #364] + bic r3, r3, #1 + str r3, [r0, #364] + bx lr + .fnend + .size rk_nandc_flash_xfer_completed, .-rk_nandc_flash_xfer_completed + .align 1 + .global NandcSendDumpDataStart + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type NandcSendDumpDataStart, %function +NandcSendDumpDataStart: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r2, [r0, #16] + .pad #8 + sub sp, sp, #8 + ldr r3, .L401 + str r2, [sp, #4] + ldr r2, [sp, #4] + bfc r2, #2, #1 + str r2, [sp, #4] + ldr r2, [sp, #4] + str r2, [r0, #16] + str r3, [r0, #8] + orr r3, r3, #4 + str r3, [r0, #8] + add sp, sp, #8 + @ sp needed + bx lr +.L402: + .align 2 +.L401: + .word 538969130 + .fnend + .size NandcSendDumpDataStart, .-NandcSendDumpDataStart + .align 1 + .global NandcSendDumpDataDone + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type NandcSendDumpDataDone, %function +NandcSendDumpDataDone: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + .pad #8 + sub sp, sp, #8 +.L404: + ldr r3, [r0, #8] + str r3, [sp, #4] + ldr r3, [sp, #4] + lsls r3, r3, #11 + bpl .L404 + add sp, sp, #8 + @ sp needed + bx lr + .fnend + .size NandcSendDumpDataDone, .-NandcSendDumpDataDone + .align 1 + .global NandcXferStart + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type NandcXferStart, %function +NandcXferStart: + .fnstart + @ args = 8, pretend = 0, frame = 16 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #20 + sub sp, sp, #20 + mov r6, r1 + ldr r1, [sp, #60] + str r2, [sp, #4] + ldr fp, [sp, #56] + cmp r1, #0 + bne .L421 + adds r1, fp, #0 + it ne + movne r1, #1 +.L408: + ldr r4, .L426 + mov ip, #16 + movs r5, #0 + ldr r7, [r4, r0, lsl #3] + add r0, r4, r0, lsl #3 + ldr r8, [r7, #12] + ldrb r0, [r0, #4] @ zero_extendqisi2 + bfi r8, ip, #8, #8 + bfi r8, r5, #3, #1 + bfi r5, r6, #1, #1 + bfi r8, r0, #5, #3 + orr r5, r5, #8 + movs r0, #1 + bfi r5, r0, #5, #2 + lsrs r3, r3, r0 + orr r5, r5, #536870912 + orr r5, r5, #1024 + bfi r5, r3, #4, #1 + ldr r3, [r4, #2264] + cmp r3, #3 + bls .L409 + ldr r3, [r7, #16] + str r3, [sp, #12] + ldr r3, [sp, #12] + bfc r3, #2, #1 + str r3, [sp, #12] + cmp r1, #0 + beq .L410 + cmp r6, #0 + bne .L411 +.L419: + ldr r2, [sp, #4] + adds r2, r2, #1 + asrs r2, r2, #1 + bfi r5, r2, #22, #6 + cmp fp, #0 + beq .L412 + mov r0, fp +.L413: + ldr r3, [r4, #2280] + ubfx r9, r5, #22, #5 + mov r2, r6 + lsl r1, r9, #10 + str r0, [r4, #2284] + str r3, [r4, #2288] + bl rknand_dma_map_single + mov r2, r6 + str r0, [r4, #2292] + lsl r1, r9, #7 + ldr r0, [r4, #2288] + clz r6, r6 + bl rknand_dma_map_single + movs r3, #1 + str r0, [r4, #2296] + str r3, [r4, #2300] + movs r2, #16 + ldr r3, [r4, #2292] + tst fp, #3 + lsr r6, r6, #5 + str r3, [r7, #20] + ldr r3, [r4, #2296] + str r3, [r7, #24] + mov r3, #0 + str r3, [sp, #12] + ldr r3, [sp, #12] + bfi r3, r2, #9, #5 + it eq + moveq r2, #2 + str r3, [sp, #12] + ldr r3, [sp, #12] + orr r3, r3, #448 + str r3, [sp, #12] + ittt eq + ldreq r3, [sp, #12] + bfieq r3, r2, #3, #3 + streq r3, [sp, #12] + ldr r3, [sp, #12] + orr r3, r3, #4 + str r3, [sp, #12] + ldr r3, [sp, #12] + bfi r3, r6, #1, #1 + str r3, [sp, #12] + ldr r3, [sp, #12] + orr r3, r3, #1 + str r3, [sp, #12] +.L410: + ldr r3, [sp, #12] + str r3, [r7, #16] +.L409: + str r8, [r7, #12] + str r5, [r7, #8] + orr r5, r5, #4 + str r5, [r7, #8] + add sp, sp, #20 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L421: + movs r1, #1 + b .L408 +.L411: + ldr r3, [r4, #2312] + cmp r3, #25 + ldr r3, [sp, #4] + ite cc + movcc r10, #64 + movcs r10, #128 + lsr r9, r3, #1 + ldr r3, [sp, #60] + str r3, [sp] + movs r3, #0 + mov r0, r3 +.L415: + cmp r0, r9 + bcs .L419 + ldr r1, [sp, #60] + bic lr, r3, #3 + cbz r1, .L416 + ldr r2, [sp] + ldr r1, [r2], #4 @ unaligned + str r2, [sp] + mov r2, r1 + ldr r1, [r4, #2280] + mov ip, r1 + str r2, [ip, lr] +.L417: + adds r0, r0, #1 + add r3, r3, r10 + b .L415 +.L416: + ldr r1, [r4, #2280] + mov r2, #-1 + str r2, [r1, lr] + b .L417 +.L412: + ldr r0, [r4, #2276] + b .L413 +.L427: + .align 2 +.L426: + .word .LANCHOR0 + .fnend + .size NandcXferStart, .-NandcXferStart + .align 1 + .global Ftl_log2 + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type Ftl_log2, %function +Ftl_log2: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + movs r1, #0 + movs r2, #1 +.L429: + cmp r2, r0 + uxth r3, r1 + add r1, r1, #1 + bls .L430 + subs r0, r3, #1 + uxth r0, r0 + bx lr +.L430: + lsls r2, r2, #1 + b .L429 + .fnend + .size Ftl_log2, .-Ftl_log2 + .align 1 + .global FtlPrintInfo + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FtlPrintInfo, %function +FtlPrintInfo: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + bx lr + .fnend + .size FtlPrintInfo, .-FtlPrintInfo + .align 1 + .global FtlSysBlkNumInit + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FtlSysBlkNumInit, %function +FtlSysBlkNumInit: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L433 + cmp r0, #24 + it cc + movcc r0, #24 + ldrh r2, [r3, #2324] + ldrh r1, [r3, #2334] + str r0, [r3, #2320] + muls r2, r0, r2 + subs r0, r1, r0 + ldr r1, [r3, #2340] + strh r0, [r3, #2332] @ movhi + movs r0, #0 + str r2, [r3, #2328] + subs r2, r1, r2 + str r2, [r3, #2336] + bx lr +.L434: + .align 2 +.L433: + .word .LANCHOR0 + .fnend + .size FtlSysBlkNumInit, .-FtlSysBlkNumInit + .align 1 + .global FtlConstantsInit + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FtlConstantsInit, %function +FtlConstantsInit: + .fnstart + @ args = 0, pretend = 0, frame = 16 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #20 + sub sp, sp, #20 + ldrh r1, [r0, #14] + mov r5, r0 + ldr r4, .L462 + str r1, [sp] + ldrh r1, [sp] + ldrh ip, [r0, #8] + ldrh r2, [r0, #10] + ldrh r3, [r0, #12] + addw r0, r4, #2350 + strh r1, [r4, #2334] @ movhi + movs r1, #0 + strh ip, [r4, #2344] @ movhi + strh r2, [r4, #2346] @ movhi + strh r3, [r4, #2348] @ movhi +.L436: + strb r1, [r1, r0] + adds r1, r1, #1 + cmp r1, #32 + bne .L436 + ldrh r0, [r5, #14] + ldrh r1, [r5, #20] + cmp r1, r0, lsr #8 + bcs .L437 + uxtb r10, r3 + ldr r9, .L462+4 + lsl r1, r10, #1 + uxtb r1, r1 + str r1, [sp, #4] + subs r1, r2, #1 + muls r1, r3, r1 + str r1, [sp, #12] + movs r1, #0 +.L438: + cmp r1, r3 + bcs .L440 + ldr r6, [sp, #12] + sub lr, r1, r3 + uxtb r0, r1 + add lr, lr, r9 + adds r6, r1, r6 + add r6, r9, r6 + str r6, [sp, #8] + movs r6, #0 + mov r8, r6 + b .L441 +.L439: + ldr r7, [sp, #8] + add fp, r10, r0 + strb r0, [lr, r6] + add r8, r8, #1 + strb fp, [r7, r6] + ldr r7, [sp, #4] + add r0, r0, r7 + uxtb r0, r0 +.L441: + cmp r8, r2 + add r6, r6, r3 + bcc .L439 + adds r1, r1, #1 + b .L438 +.L440: + lsls r2, r2, #1 + strh r2, [r4, #2346] @ movhi + ldr r2, [sp] + lsrs r7, r2, #1 + strh r7, [r4, #2334] @ movhi +.L437: + movs r2, #5 + ldrb r9, [r4, #36] @ zero_extendqisi2 + strh r2, [r4, #2382] @ movhi + movs r2, #0 + strh r2, [r4, #2384] @ movhi + cmp ip, #1 + mov r2, #4352 + it eq + strheq ip, [r4, #2382] @ movhi + strh r2, [r4, #2386] @ movhi + cmp r9, #0 + beq .L443 + mov r2, #384 + strh r2, [r4, #2386] @ movhi +.L443: + ldrh r7, [r4, #2346] + ldrh r6, [r4, #2334] + ldrh r8, [r5, #16] + ldrh fp, [r5, #20] + smulbb r7, r7, r3 + ldrh r1, [r5, #18] + smulbb r3, r3, r6 + strh r8, [r4, #2390] @ movhi + mov r0, fp + strh fp, [r4, #2396] @ movhi + uxth r7, r7 + strh r1, [r4, #2392] @ movhi + strh r3, [r4, #2388] @ movhi + smulbb r3, r7, r8 + str r1, [sp] + strh r7, [r4, #2324] @ movhi + strh r3, [r4, #2394] @ movhi + bl Ftl_log2 + lsl r3, fp, #9 + cmp r6, #1024 + strh r0, [r4, #2398] @ movhi + mov r10, r0 + uxth r3, r3 + ldr r1, [sp] + ldrh r0, [r4, #2386] + strh r3, [r4, #2400] @ movhi + lsr r3, r3, #8 + strh r3, [r4, #2402] @ movhi + mul r1, fp, r1 + ldrh r3, [r5, #26] + lsl r0, r0, #3 + strh r3, [r4, #2404] @ movhi + mul r3, r6, r7 + str r3, [r4, #2340] + itt hi + uxtbhi r3, r6 + strhhi r3, [r4, #2384] @ movhi + ldrh r3, [r4, #2384] + subs r3, r6, r3 + muls r3, r7, r3 + mul r3, fp, r3 + mul r8, r8, r3 + asr r3, r8, #11 + str r3, [r4, #2408] + bl __aeabi_idiv + uxth r0, r0 + cmp r0, #4 + itet ls + movls r3, #4 + strhhi r0, [r4, #2412] @ movhi + strhls r3, [r4, #2412] @ movhi + cmp r9, #0 + beq .L447 + mov r3, #640 + strh r3, [r4, #2386] @ movhi +.L447: + ldrh r3, [r4, #2386] + lsls r6, r6, #6 + mov r1, r7 + ldrh r0, [r4, #2412] + asr r3, r3, r10 + add r10, r10, #9 + asr r6, r6, r10 + adds r3, r3, #2 + strh r6, [r4, #2416] @ movhi + uxth r6, r6 + strh r3, [r4, #2414] @ movhi + mul r3, r6, r7 + adds r6, r6, #8 + str r3, [r4, #2420] + bl __aeabi_uidiv + uxtah r0, r6, r0 + cmp r7, #1 + it eq + addeq r0, r0, #4 + str r0, [r4, #2320] + ldrh r0, [r4, #2320] + bl FtlSysBlkNumInit + ldr r5, [r4, #2336] + mov r0, #2048 + ldr r3, [r4, #2320] + ldrh r6, [r4, #2396] + str r3, [r4, #2424] + lsls r3, r5, #2 + ldrh r5, [r4, #2390] + mov r1, r6 + muls r5, r3, r5 + ldrh r3, [r4, #2398] + adds r3, r3, #9 + lsrs r5, r5, r3 + adds r5, r5, #2 + uxth r5, r5 + strh r5, [r4, #2428] @ movhi + bl __aeabi_idiv + ldrh r2, [r4, #2412] + movs r3, #0 + str r3, [r4, #2432] + strh r0, [r4, #2430] @ movhi + adds r3, r2, #3 + ldrb r0, [r4, #152] @ zero_extendqisi2 + strh r3, [r4, #2412] @ movhi + ldr r3, [r4, #2420] + adds r1, r3, #3 + str r1, [r4, #2420] + cbz r0, .L450 + adds r3, r3, #5 + adds r2, r2, #4 + strh r2, [r4, #2412] @ movhi +.L461: + str r3, [r4, #2420] +.L451: + ldrh r2, [r4, #2332] + movs r3, #0 + strh r3, [r4, #2436] @ movhi + movs r0, #0 + lsrs r3, r2, #3 + add r3, r3, r2, lsl #1 + adds r3, r3, #52 + add r5, r3, r5, lsl #2 + cmp r5, r6, lsl #9 + itt cc + movcc r3, #1 + strhcc r3, [r4, #2436] @ movhi + add sp, sp, #20 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L450: + cmp r1, #7 + bhi .L451 + movs r3, #8 + b .L461 +.L463: + .align 2 +.L462: + .word .LANCHOR0 + .word .LANCHOR0+2350 + .fnend + .size FtlConstantsInit, .-FtlConstantsInit + .align 1 + .global IsBlkInVendorPart + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type IsBlkInVendorPart, %function +IsBlkInVendorPart: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r2, .L471 + ldrh r3, [r2, #2438] + cbz r3, .L470 + ldr r3, [r2, #2440] + ldrh r2, [r2, #2412] + add r2, r3, r2, lsl #1 +.L466: + cmp r3, r2 + bne .L467 +.L470: + movs r0, #0 + bx lr +.L467: + ldrh r1, [r3], #2 + cmp r0, r1 + bne .L466 + movs r0, #1 + bx lr +.L472: + .align 2 +.L471: + .word .LANCHOR0 + .fnend + .size IsBlkInVendorPart, .-IsBlkInVendorPart + .align 1 + .global FtlCacheMetchLpa + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FtlCacheMetchLpa, %function +FtlCacheMetchLpa: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r2, .L481 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + ldr r3, [r2, #2444] + cbz r3, .L480 + ldr r5, [r2, #2448] + movs r6, #36 + movs r2, #0 +.L476: + mla r4, r6, r2, r5 + ldr r4, [r4, #16] + cmp r4, r0 + bcc .L475 + cmp r4, r1 + bls .L478 +.L475: + adds r2, r2, #1 + cmp r3, r2 + bne .L476 +.L480: + movs r0, #0 + pop {r4, r5, r6, pc} +.L478: + movs r0, #1 + pop {r4, r5, r6, pc} +.L482: + .align 2 +.L481: + .word .LANCHOR0 + .fnend + .size FtlCacheMetchLpa, .-FtlCacheMetchLpa + .align 1 + .global FtlGetCap + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FtlGetCap, %function +FtlGetCap: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L484 + ldr r0, [r3, #2432] + bx lr +.L485: + .align 2 +.L484: + .word .LANCHOR0 + .fnend + .size FtlGetCap, .-FtlGetCap + .align 1 + .global FtlGetCapacity + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FtlGetCapacity, %function +FtlGetCapacity: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L487 + ldr r0, [r3, #2432] + bx lr +.L488: + .align 2 +.L487: + .word .LANCHOR0 + .fnend + .size FtlGetCapacity, .-FtlGetCapacity + .align 1 + .global ftl_get_density + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type ftl_get_density, %function +ftl_get_density: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L490 + ldr r0, [r3, #2432] + bx lr +.L491: + .align 2 +.L490: + .word .LANCHOR0 + .fnend + .size ftl_get_density, .-ftl_get_density + .align 1 + .global FtlGetLpn + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FtlGetLpn, %function +FtlGetLpn: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L493 + ldr r0, [r3, #2452] + bx lr +.L494: + .align 2 +.L493: + .word .LANCHOR0 + .fnend + .size FtlGetLpn, .-FtlGetLpn + .align 1 + .global FtlBbmMapBadBlock + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FtlBbmMapBadBlock, %function +FtlBbmMapBadBlock: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r4, r5, r6, r7, lr} + .save {r4, r5, r6, r7, lr} + .pad #12 + mov r5, r0 + ldr r4, .L496 + ldrh r7, [r4, #2388] + mov r1, r7 + bl __aeabi_uidiv + uxth r6, r0 + mov r1, r7 + mov r0, r5 + bl __aeabi_uidivmod + add r2, r4, r6, lsl #2 + uxth r3, r1 + ldr r2, [r2, #2484] + lsrs r1, r3, #5 + and r7, r3, #31 + movs r0, #1 + lsls r0, r0, r7 + ldr r7, [r2, r1, lsl #2] + orrs r0, r0, r7 + str r0, [r2, r1, lsl #2] + mov r2, r6 + str r0, [sp] + mov r1, r5 + ldr r0, .L496+4 + bl printk + ldrh r3, [r4, #2462] + movs r0, #0 + adds r3, r3, #1 + strh r3, [r4, #2462] @ movhi + add sp, sp, #12 + @ sp needed + pop {r4, r5, r6, r7, pc} +.L497: + .align 2 +.L496: + .word .LANCHOR0 + .word .LC2 + .fnend + .size FtlBbmMapBadBlock, .-FtlBbmMapBadBlock + .align 1 + .global FtlBbmIsBadBlock + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FtlBbmIsBadBlock, %function +FtlBbmIsBadBlock: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r3, r4, r5, r6, r7, lr} + .save {r3, r4, r5, r6, r7, lr} + mov r7, r0 + ldr r5, .L499 + ldrh r6, [r5, #2388] + mov r1, r6 + bl __aeabi_uidivmod + mov r0, r7 + uxth r4, r1 + mov r1, r6 + bl __aeabi_uidiv + uxth r0, r0 + lsrs r2, r4, #5 + add r5, r5, r0, lsl #2 + and r4, r4, #31 + ldr r3, [r5, #2484] + ldr r0, [r3, r2, lsl #2] + lsrs r0, r0, r4 + and r0, r0, #1 + pop {r3, r4, r5, r6, r7, pc} +.L500: + .align 2 +.L499: + .word .LANCHOR0 + .fnend + .size FtlBbmIsBadBlock, .-FtlBbmIsBadBlock + .align 1 + .global FtlBbtInfoPrint + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FtlBbtInfoPrint, %function +FtlBbtInfoPrint: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + bx lr + .fnend + .size FtlBbtInfoPrint, .-FtlBbtInfoPrint + .align 1 + .global FtlBbtCalcTotleCnt + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FtlBbtCalcTotleCnt, %function +FtlBbtCalcTotleCnt: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L509 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + movs r5, #0 + mov r4, r5 + ldrh r2, [r3, #2388] + ldrh r6, [r3, #2346] + muls r6, r2, r6 +.L503: + uxth r0, r5 + cmp r0, r6 + blt .L505 + mov r0, r4 + pop {r4, r5, r6, pc} +.L505: + bl FtlBbmIsBadBlock + cbz r0, .L504 + adds r4, r4, #1 + uxth r4, r4 +.L504: + adds r5, r5, #1 + b .L503 +.L510: + .align 2 +.L509: + .word .LANCHOR0 + .fnend + .size FtlBbtCalcTotleCnt, .-FtlBbtCalcTotleCnt + .align 1 + .global V2P_block + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type V2P_block, %function +V2P_block: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r3, r4, r5, r6, r7, lr} + .save {r3, r4, r5, r6, r7, lr} + mov r5, r1 + ldr r4, .L512 + mov r7, r0 + ldrh r6, [r4, #2348] + mov r1, r6 + bl __aeabi_uidiv + ldrh r4, [r4, #2388] + smulbb r5, r6, r5 + mov r1, r6 + smulbb r4, r4, r0 + mov r0, r7 + bl __aeabi_uidivmod + adds r0, r5, r1 + add r0, r0, r4 + uxth r0, r0 + pop {r3, r4, r5, r6, r7, pc} +.L513: + .align 2 +.L512: + .word .LANCHOR0 + .fnend + .size V2P_block, .-V2P_block + .align 1 + .global P2V_plane + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type P2V_plane, %function +P2V_plane: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L515 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + mov r6, r0 + ldrh r5, [r3, #2348] + ldrh r1, [r3, #2388] + bl __aeabi_uidiv + mov r1, r5 + smulbb r4, r0, r5 + mov r0, r6 + bl __aeabi_uidivmod + add r1, r1, r4 + uxth r0, r1 + pop {r4, r5, r6, pc} +.L516: + .align 2 +.L515: + .word .LANCHOR0 + .fnend + .size P2V_plane, .-P2V_plane + .align 1 + .global P2V_block_in_plane + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type P2V_block_in_plane, %function +P2V_block_in_plane: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, lr} + .save {r4, lr} + ldr r4, .L518 + ldrh r1, [r4, #2388] + bl __aeabi_uidivmod + uxth r0, r1 + ldrh r1, [r4, #2348] + bl __aeabi_uidiv + uxth r0, r0 + pop {r4, pc} +.L519: + .align 2 +.L518: + .word .LANCHOR0 + .fnend + .size P2V_block_in_plane, .-P2V_block_in_plane + .align 1 + .global ftl_cmp_data_ver + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type ftl_cmp_data_ver, %function +ftl_cmp_data_ver: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + cmp r0, r1 + bls .L521 + subs r0, r0, r1 + cmp r0, #-2147483648 + ite hi + movhi r0, #0 + movls r0, #1 + bx lr +.L521: + subs r0, r1, r0 + cmp r0, #-2147483648 + ite ls + movls r0, #0 + movhi r0, #1 + bx lr + .fnend + .size ftl_cmp_data_ver, .-ftl_cmp_data_ver + .align 1 + .global FtlFreeSysBlkQueueEmpty + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FtlFreeSysBlkQueueEmpty, %function +FtlFreeSysBlkQueueEmpty: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L524 + ldrh r0, [r3, #2522] + clz r0, r0 + lsrs r0, r0, #5 + bx lr +.L525: + .align 2 +.L524: + .word .LANCHOR0 + .fnend + .size FtlFreeSysBlkQueueEmpty, .-FtlFreeSysBlkQueueEmpty + .align 1 + .global FtlFreeSysBlkQueueFull + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FtlFreeSysBlkQueueFull, %function +FtlFreeSysBlkQueueFull: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L527 + ldrh r0, [r3, #2522] + sub r3, r0, #1024 + rsbs r0, r3, #0 + adcs r0, r0, r3 + bx lr +.L528: + .align 2 +.L527: + .word .LANCHOR0 + .fnend + .size FtlFreeSysBlkQueueFull, .-FtlFreeSysBlkQueueFull + .align 1 + .global FtlFreeSysBlkQueueIn + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FtlFreeSysBlkQueueIn, %function +FtlFreeSysBlkQueueIn: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r3, r4, r5, r6, r7, lr} + .save {r3, r4, r5, r6, r7, lr} + subs r3, r0, #1 + uxth r3, r3 + movw r2, #65533 + mov r6, r0 + cmp r3, r2 + bhi .L529 + ldr r4, .L538 + ldrh r3, [r4, #2522] + cmp r3, #1024 + beq .L529 + cbz r1, .L531 + ldr r5, .L538+4 + ldr r3, [r5, #228] + cbnz r3, .L531 + bl P2V_block_in_plane + mov r7, r0 + ldr r0, [r5, #232] + lsls r3, r6, #10 + movs r2, #1 + mov r1, r2 + str r3, [r0, #4] + bl FlashEraseBlocks + ldr r2, [r5, #236] + ldrh r3, [r2, r7, lsl #1] + adds r3, r3, #1 + strh r3, [r2, r7, lsl #1] @ movhi + ldr r3, [r5, #240] + adds r3, r3, #1 + str r3, [r5, #240] +.L531: + ldrh r3, [r4, #2522] + adds r3, r3, #1 + strh r3, [r4, #2522] @ movhi + ldrh r3, [r4, #2520] + add r2, r4, r3, lsl #1 + adds r3, r3, #1 + ubfx r3, r3, #0, #10 + strh r6, [r2, #2524] @ movhi + strh r3, [r4, #2520] @ movhi +.L529: + pop {r3, r4, r5, r6, r7, pc} +.L539: + .align 2 +.L538: + .word .LANCHOR0 + .word .LANCHOR2 + .fnend + .size FtlFreeSysBlkQueueIn, .-FtlFreeSysBlkQueueIn + .align 1 + .global FtlFreeSysBLkSort + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FtlFreeSysBLkSort, %function +FtlFreeSysBLkSort: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L549 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + ldrh r2, [r3, #2522] + cbz r2, .L540 + ldr r2, .L549+4 + movs r0, #0 + ldrh r1, [r3, #2518] + mov r6, r0 + ldrh r5, [r2, #272] + ldrh r2, [r3, #2520] + and r5, r5, #31 +.L542: + uxth r4, r0 + adds r0, r0, #1 + cmp r5, r4 + bgt .L543 + cbz r6, .L540 + strh r1, [r3, #2518] @ movhi + strh r2, [r3, #2520] @ movhi +.L540: + pop {r4, r5, r6, pc} +.L543: + add r4, r3, r1, lsl #1 + adds r1, r1, #1 + ubfx r1, r1, #0, #10 + ldrh r6, [r4, #2524] + add r4, r3, r2, lsl #1 + strh r6, [r4, #2524] @ movhi + movs r6, #1 + add r2, r2, r6 + ubfx r2, r2, #0, #10 + b .L542 +.L550: + .align 2 +.L549: + .word .LANCHOR0 + .word .LANCHOR2 + .fnend + .size FtlFreeSysBLkSort, .-FtlFreeSysBLkSort + .align 1 + .global FtlFreeSysBlkQueueOut + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FtlFreeSysBlkQueueOut, %function +FtlFreeSysBlkQueueOut: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r3, r4, r5, r6, r7, r8, r9, lr} + .save {r3, r4, r5, r6, r7, r8, r9, lr} + ldr r4, .L561 + ldr r5, .L561+4 + mov r7, r4 +.L552: + ldrh r1, [r4, #2522] + cmp r1, #0 + beq .L553 + ldrh r3, [r4, #2518] + subs r1, r1, #1 + ldr r9, [r5, #228] + strh r1, [r4, #2522] @ movhi + add r2, r4, r3, lsl #1 + adds r3, r3, #1 + ubfx r3, r3, #0, #10 + ldrh r6, [r2, #2524] + strh r3, [r4, #2518] @ movhi + cmp r9, #0 + bne .L554 + mov r0, r6 + bl P2V_block_in_plane + mov r8, r0 + ldr r0, [r5, #232] + lsls r3, r6, #10 + str r3, [r0, #4] + ldrb r3, [r4, #152] @ zero_extendqisi2 + cbz r3, .L555 + movs r2, #1 + mov r1, r9 + bl FlashEraseBlocks +.L555: + movs r2, #1 + ldr r0, [r5, #232] + mov r1, r2 + bl FlashEraseBlocks + ldr r2, [r5, #236] + ldrh r3, [r2, r8, lsl #1] + adds r3, r3, #1 + strh r3, [r2, r8, lsl #1] @ movhi + ldr r3, [r5, #240] + adds r3, r3, #1 + str r3, [r5, #240] +.L554: + subs r3, r6, #1 + movw r2, #65533 + uxth r3, r3 + cmp r3, r2 + bls .L557 + ldrh r2, [r7, #2522] + mov r1, r6 + ldr r0, .L561+8 + bl printk + b .L552 +.L553: + ldr r0, .L561+12 + bl printk +.L556: + b .L556 +.L557: + mov r0, r6 + pop {r3, r4, r5, r6, r7, r8, r9, pc} +.L562: + .align 2 +.L561: + .word .LANCHOR0 + .word .LANCHOR2 + .word .LC4 + .word .LC3 + .fnend + .size FtlFreeSysBlkQueueOut, .-FtlFreeSysBlkQueueOut + .align 1 + .global test_node_in_list + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type test_node_in_list, %function +test_node_in_list: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L568 + push {r4, r5, lr} + .save {r4, r5, lr} + movw r5, #65535 + ldr r2, [r0] + ldr r4, [r3, #292] + subs r3, r2, r4 + asrs r0, r3, #1 + ldr r3, .L568+4 + muls r3, r0, r3 + movs r0, #6 + uxth r3, r3 +.L565: + cmp r3, r1 + beq .L566 + ldrh r3, [r2] + cmp r3, r5 + beq .L567 + mla r2, r0, r3, r4 + b .L565 +.L566: + movs r0, #1 + pop {r4, r5, pc} +.L567: + movs r0, #0 + pop {r4, r5, pc} +.L569: + .align 2 +.L568: + .word .LANCHOR2 + .word -1431655765 + .fnend + .size test_node_in_list, .-test_node_in_list + .align 1 + .global insert_data_list + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type insert_data_list, %function +insert_data_list: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #12 + ldr r5, .L585 + ldrh r3, [r5, #2332] + cmp r3, r0 + bls .L572 + ldr r2, .L585+4 + movs r4, #6 + muls r4, r0, r4 + movw r3, #65535 + ldr ip, [r2, #292] + mov r7, r2 + add r1, ip, r4 + strh r3, [r1, #2] @ movhi + strh r3, [ip, r4] @ movhi + ldr r3, [r2, #296] + cbnz r3, .L573 + str r1, [r2, #296] +.L572: + movs r0, #0 + add sp, sp, #12 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L573: + ldrh r6, [r1, #4] + lsl r10, r0, #1 + ldr r8, [r2, #300] + ldrh r2, [r8, r0, lsl #1] + cmp r6, #0 + beq .L583 + muls r6, r2, r6 +.L574: + ldr lr, [r7, #292] + ldrh r5, [r5, #2332] + sub r2, r3, lr + asr r9, r2, #1 + ldr r2, .L585+8 + str r5, [sp] + mul r2, r2, r9 + ldr r9, [r7, #236] + add r5, r9, r10 + uxth r2, r2 + str r5, [sp, #4] + movs r5, #0 +.L581: + adds r5, r5, #1 + ldr r7, [sp] + uxth r5, r5 + cmp r5, r7 + bhi .L572 + cmp r0, r2 + beq .L572 + ldrh r7, [r3, #4] + lsl r10, r2, #1 + ldrh fp, [r8, r2, lsl #1] + cbz r7, .L584 + mul r7, r7, fp +.L576: + cmp r6, r7 + bne .L577 + ldr r7, [sp, #4] + ldrh r10, [r9, r10] + ldrh r7, [r7] + cmp r10, r7 + bcc .L579 +.L578: + strh r2, [ip, r4] @ movhi + ldr r4, .L585+4 + ldrh r2, [r3, #2] + strh r2, [r1, #2] @ movhi + ldr r2, [r4, #296] + cmp r3, r2 + ittte ne + ldrhne r5, [r3, #2] + movne r2, #6 + ldrne r1, [r4, #292] + strheq r0, [r3, #2] @ movhi + iteee eq + streq r1, [r4, #296] + mulne r2, r2, r5 + strhne r0, [r1, r2] @ movhi + strhne r0, [r3, #2] @ movhi + b .L572 +.L583: + mov r6, #-1 + b .L574 +.L584: + mov r7, #-1 + b .L576 +.L577: + bcc .L578 +.L579: + ldrh r7, [r3] + movw r10, #65535 + cmp r7, r10 + bne .L580 + strh r2, [r1, #2] @ movhi + strh r0, [r3] @ movhi + ldr r3, .L585+4 + str r1, [r3, #304] + b .L572 +.L580: + movs r3, #6 + mov r2, r7 + mla r3, r3, r7, lr + b .L581 +.L586: + .align 2 +.L585: + .word .LANCHOR0 + .word .LANCHOR2 + .word -1431655765 + .fnend + .size insert_data_list, .-insert_data_list + .align 1 + .global INSERT_DATA_LIST + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type INSERT_DATA_LIST, %function +INSERT_DATA_LIST: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r3, lr} + .save {r3, lr} + bl insert_data_list + ldr r2, .L588 + ldrh r3, [r2, #308] + adds r3, r3, #1 + strh r3, [r2, #308] @ movhi + pop {r3, pc} +.L589: + .align 2 +.L588: + .word .LANCHOR2 + .fnend + .size INSERT_DATA_LIST, .-INSERT_DATA_LIST + .align 1 + .global insert_free_list + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type insert_free_list, %function +insert_free_list: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + movw r4, #65535 + cmp r0, r4 + beq .L591 + ldr r2, .L597 + movs r1, #6 + mul r7, r1, r0 + ldr ip, [r2, #292] + mov r5, r2 + add r6, ip, r7 + strh r4, [r6, #2] @ movhi + strh r4, [ip, r7] @ movhi + ldr r3, [r2, #312] + cbnz r3, .L592 + str r6, [r2, #312] +.L591: + movs r0, #0 + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L592: + ldr lr, [r2, #292] + ldr r8, [r2, #236] + sub r2, r3, lr + asr r10, r2, #1 + ldr r2, .L597+4 + ldrh r9, [r8, r0, lsl #1] + mul r2, r2, r10 + mov r10, r4 + uxth r2, r2 +.L595: + ldrh r4, [r8, r2, lsl #1] + cmp r4, r9 + bcs .L593 + ldrh r4, [r3] + cmp r4, r10 + bne .L594 + strh r2, [r6, #2] @ movhi + strh r0, [r3] @ movhi + b .L591 +.L594: + mla r3, r1, r4, lr + mov r2, r4 + b .L595 +.L593: + ldrh r1, [r3, #2] + strh r1, [r6, #2] @ movhi + strh r2, [ip, r7] @ movhi + ldr r2, [r5, #312] + cmp r3, r2 + ittte ne + ldrhne r4, [r3, #2] + movne r2, #6 + ldrne r1, [r5, #292] + strheq r0, [r3, #2] @ movhi + iteee eq + streq r6, [r5, #312] + mulne r2, r2, r4 + strhne r0, [r1, r2] @ movhi + strhne r0, [r3, #2] @ movhi + b .L591 +.L598: + .align 2 +.L597: + .word .LANCHOR2 + .word -1431655765 + .fnend + .size insert_free_list, .-insert_free_list + .align 1 + .global INSERT_FREE_LIST + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type INSERT_FREE_LIST, %function +INSERT_FREE_LIST: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r3, lr} + .save {r3, lr} + bl insert_free_list + ldr r2, .L600 + ldrh r3, [r2, #316] + adds r3, r3, #1 + strh r3, [r2, #316] @ movhi + pop {r3, pc} +.L601: + .align 2 +.L600: + .word .LANCHOR2 + .fnend + .size INSERT_FREE_LIST, .-INSERT_FREE_LIST + .align 1 + .global List_remove_node + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type List_remove_node, %function +List_remove_node: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, lr} + .save {r4, r5, r6, r7, lr} + movs r4, #6 + ldr r7, .L607 + muls r1, r4, r1 + movw r6, #65535 + ldr r3, [r0] + ldr r2, [r7, #292] + adds r5, r2, r1 + cmp r5, r3 + ldrh r3, [r2, r1] + bne .L603 + cmp r3, r6 + iteet ne + mlane r3, r4, r3, r2 + moveq r3, #0 + streq r3, [r0] + strne r3, [r0] + it ne + strhne r6, [r3, #2] @ movhi +.L605: + movw r3, #65535 + movs r0, #0 + strh r3, [r2, r1] @ movhi + strh r3, [r5, #2] @ movhi + pop {r4, r5, r6, r7, pc} +.L603: + cmp r3, r6 + ldrh r0, [r5, #2] + bne .L606 + cmp r0, r3 + beq .L605 + muls r4, r0, r4 + strh r3, [r2, r4] @ movhi + b .L605 +.L606: + mla r3, r4, r3, r2 + strh r0, [r3, #2] @ movhi + ldrh r3, [r5, #2] + ldrh r6, [r2, r1] + ldr r0, [r7, #292] + muls r3, r4, r3 + strh r6, [r0, r3] @ movhi + b .L605 +.L608: + .align 2 +.L607: + .word .LANCHOR2 + .fnend + .size List_remove_node, .-List_remove_node + .align 1 + .global List_pop_index_node + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type List_pop_index_node, %function +List_pop_index_node: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + ldr r3, [r0] + cbz r3, .L615 + ldr r2, .L616 + movw r5, #65535 + movs r6, #6 + ldr r2, [r2, #292] +.L611: + cbnz r1, .L612 +.L614: + ldr r4, .L616+4 + subs r3, r3, r2 + asrs r3, r3, #1 + muls r4, r3, r4 + uxth r1, r4 + bl List_remove_node + uxth r0, r4 + pop {r4, r5, r6, pc} +.L612: + ldrh r4, [r3] + cmp r4, r5 + beq .L614 + subs r1, r1, #1 + mla r3, r6, r4, r2 + uxth r1, r1 + b .L611 +.L615: + movw r0, #65535 + pop {r4, r5, r6, pc} +.L617: + .align 2 +.L616: + .word .LANCHOR2 + .word -1431655765 + .fnend + .size List_pop_index_node, .-List_pop_index_node + .align 1 + .global List_get_gc_head_node + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type List_get_gc_head_node, %function +List_get_gc_head_node: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r2, .L624 + push {r4, lr} + .save {r4, lr} + ldr r3, [r2, #296] + cbz r3, .L623 + ldr r1, [r2, #292] + movs r4, #6 + movw r2, #65535 +.L620: + cbz r0, .L621 + ldrh r3, [r3] + cmp r3, r2 + bne .L622 +.L623: + movw r0, #65535 + pop {r4, pc} +.L622: + subs r0, r0, #1 + mla r3, r4, r3, r1 + uxth r0, r0 + b .L620 +.L621: + ldr r0, .L624+4 + subs r3, r3, r1 + asrs r3, r3, #1 + muls r3, r0, r3 + uxth r0, r3 + pop {r4, pc} +.L625: + .align 2 +.L624: + .word .LANCHOR2 + .word -1431655765 + .fnend + .size List_get_gc_head_node, .-List_get_gc_head_node + .align 1 + .global List_update_data_list + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type List_update_data_list, %function +List_update_data_list: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r3, r4, r5, r6, r7, lr} + .save {r3, r4, r5, r6, r7, lr} + mov r5, r0 + ldr r4, .L633 + ldrh r3, [r4, #320] + cmp r3, r0 + beq .L627 + ldrh r3, [r4, #368] + cmp r3, r0 + beq .L627 + ldrh r3, [r4, #416] + cmp r3, r0 + beq .L627 + movs r3, #6 + ldr r1, [r4, #292] + muls r3, r0, r3 + ldr r2, [r4, #296] + adds r0, r1, r3 + cmp r0, r2 + beq .L627 + ldrh r2, [r0, #4] + ldr r7, [r4, #300] + ldrh r6, [r7, r5, lsl #1] + cbz r2, .L631 + muls r2, r6, r2 +.L628: + ldrh r6, [r0, #2] + movw r0, #65535 + cmp r6, r0 + bne .L629 + ldrh r3, [r1, r3] + cmp r3, r6 + beq .L627 +.L629: + movs r0, #6 + ldr r3, .L633+4 + muls r0, r6, r0 + asrs r6, r0, #1 + add r1, r1, r0 + muls r3, r6, r3 + ldrh r6, [r7, r3, lsl #1] + ldrh r3, [r1, #4] + cbz r3, .L632 + muls r3, r6, r3 +.L630: + cmp r2, r3 + bcs .L627 + mov r1, r5 + ldr r0, .L633+8 + bl List_remove_node + ldrh r3, [r4, #308] + mov r0, r5 + subs r3, r3, #1 + strh r3, [r4, #308] @ movhi + bl INSERT_DATA_LIST +.L627: + movs r0, #0 + pop {r3, r4, r5, r6, r7, pc} +.L631: + mov r2, #-1 + b .L628 +.L632: + mov r3, #-1 + b .L630 +.L634: + .align 2 +.L633: + .word .LANCHOR2 + .word -1431655765 + .word .LANCHOR2+296 + .fnend + .size List_update_data_list, .-List_update_data_list + .align 1 + .global ftl_map_blk_alloc_new_blk + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type ftl_map_blk_alloc_new_blk, %function +ftl_map_blk_alloc_new_blk: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r3, r4, r5, r6, r7, lr} + .save {r3, r4, r5, r6, r7, lr} + mov r4, r0 + ldrh r1, [r0, #10] + movs r3, #0 + ldr r2, [r0, #12] +.L636: + uxth r5, r3 + cmp r5, r1 + bcs .L639 + mov r7, r2 + adds r3, r3, #1 + ldrh r6, [r7] + adds r2, r2, #2 + cmp r6, #0 + bne .L636 + bl FtlFreeSysBlkQueueOut + subs r3, r0, #1 + movw r2, #65533 + uxth r3, r3 + mov r1, r0 + strh r0, [r7] @ movhi + cmp r3, r2 + bls .L637 + ldr r3, .L642 + ldr r0, .L642+4 + ldrh r2, [r3, #2522] + bl printk +.L638: + b .L638 +.L637: + ldr r3, [r4, #28] + strh r6, [r4, #2] @ movhi + strh r5, [r4] @ movhi + adds r3, r3, #1 + str r3, [r4, #28] + ldrh r3, [r4, #8] + adds r3, r3, #1 + strh r3, [r4, #8] @ movhi +.L639: + movs r0, #0 + pop {r3, r4, r5, r6, r7, pc} +.L643: + .align 2 +.L642: + .word .LANCHOR0 + .word .LC5 + .fnend + .size ftl_map_blk_alloc_new_blk, .-ftl_map_blk_alloc_new_blk + .align 1 + .global select_l2p_ram_region + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type select_l2p_ram_region, %function +select_l2p_ram_region: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, lr} + .save {r4, r5, r6, r7, lr} + movs r1, #0 + ldr r3, .L654 + movs r4, #12 + movw r5, #65535 + ldr r7, .L654+4 + ldrh r2, [r3, #2430] + ldr r3, [r7, #464] +.L645: + uxth r0, r1 + cmp r0, r2 + bcc .L647 + mov r0, r2 + movs r1, #0 + mov r6, #-2147483648 + mov ip, #12 +.L648: + uxth r5, r1 + cmp r5, r2 + bcc .L650 + cmp r0, r2 + bcc .L646 + ldrh r7, [r7, #468] + mov r0, r2 + movs r1, #0 + mov r4, #-1 +.L651: + uxth r5, r1 + cmp r5, r2 + bcs .L646 + ldr r6, [r3, #4] + cmp r4, r6 + bls .L652 + ldrh ip, [r3] + cmp ip, r7 + itt ne + movne r4, r6 + movne r0, r5 +.L652: + adds r1, r1, #1 + adds r3, r3, #12 + b .L651 +.L647: + adds r1, r1, #1 + mla r6, r4, r1, r3 + ldrh r6, [r6, #-12] + cmp r6, r5 + bne .L645 +.L646: + pop {r4, r5, r6, r7, pc} +.L650: + mla r4, ip, r1, r3 + ldr r4, [r4, #4] + cmp r4, #0 + blt .L649 + cmp r6, r4 + itt hi + movhi r6, r4 + movhi r0, r5 +.L649: + adds r1, r1, #1 + b .L648 +.L655: + .align 2 +.L654: + .word .LANCHOR0 + .word .LANCHOR2 + .fnend + .size select_l2p_ram_region, .-select_l2p_ram_region + .align 1 + .global FtlUpdateVaildLpn + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FtlUpdateVaildLpn, %function +FtlUpdateVaildLpn: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r1, .L662 + push {r4, r5, lr} + .save {r4, r5, lr} + mov r3, r1 + ldrh r2, [r1, #470] + cmp r2, #4 + bhi .L657 + cbnz r0, .L657 + adds r2, r2, #1 + strh r2, [r1, #470] @ movhi + pop {r4, r5, pc} +.L657: + ldr r1, .L662+4 + movs r2, #0 + strh r2, [r3, #470] @ movhi + movw r5, #65535 + str r2, [r3, #472] + ldrh r1, [r1, #2332] + ldr r2, [r3, #300] + add r1, r2, r1, lsl #1 +.L658: + cmp r2, r1 + bne .L660 + pop {r4, r5, pc} +.L660: + ldrh r4, [r2], #2 + cmp r4, r5 + ittt ne + ldrne r0, [r3, #472] + addne r0, r0, r4 + strne r0, [r3, #472] + b .L658 +.L663: + .align 2 +.L662: + .word .LANCHOR2 + .word .LANCHOR0 + .fnend + .size FtlUpdateVaildLpn, .-FtlUpdateVaildLpn + .align 1 + .global ftl_set_blk_mode + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type ftl_set_blk_mode, %function +ftl_set_blk_mode: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + mov r3, r0 + cbz r1, .L665 + b ftl_set_blk_mode.part.9 +.L665: + ldr r2, .L666 + lsrs r0, r0, #5 + and r3, r3, #31 + ldr r1, [r2, #32] + movs r2, #1 + lsl r3, r2, r3 + ldr r2, [r1, r0, lsl #2] + bic r2, r2, r3 + str r2, [r1, r0, lsl #2] + bx lr +.L667: + .align 2 +.L666: + .word .LANCHOR0 + .fnend + .size ftl_set_blk_mode, .-ftl_set_blk_mode + .align 1 + .global ftl_get_blk_mode + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type ftl_get_blk_mode, %function +ftl_get_blk_mode: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L669 + lsrs r2, r0, #5 + and r0, r0, #31 + ldr r3, [r3, #32] + ldr r3, [r3, r2, lsl #2] + lsr r0, r3, r0 + and r0, r0, #1 + bx lr +.L670: + .align 2 +.L669: + .word .LANCHOR0 + .fnend + .size ftl_get_blk_mode, .-ftl_get_blk_mode + .align 1 + .global ftl_sb_update_avl_pages + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type ftl_sb_update_avl_pages, %function +ftl_sb_update_avl_pages: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + movs r3, #0 + push {r4, r5, r6, r7, lr} + .save {r4, r5, r6, r7, lr} + strh r3, [r0, #4] @ movhi + add r4, r0, r2, lsl #1 + movw r7, #65535 + ldr r3, .L678 + adds r4, r4, #14 + ldrh r5, [r3, #2324] +.L672: + cmp r2, r5 + bcc .L674 + ldrh r3, [r3, #2390] + add r4, r0, #16 + movw r6, #65535 + subs r3, r3, #1 + subs r1, r3, r1 + movs r3, #0 + uxth r1, r1 +.L675: + uxth r2, r3 + cmp r5, r2 + bhi .L677 + pop {r4, r5, r6, r7, pc} +.L674: + ldrh r6, [r4, #2]! + adds r2, r2, #1 + uxth r2, r2 + cmp r6, r7 + ittt ne + ldrhne r6, [r0, #4] + addne r6, r6, #1 + strhne r6, [r0, #4] @ movhi + b .L672 +.L677: + ldrh r2, [r4], #2 + adds r3, r3, #1 + cmp r2, r6 + ittt ne + ldrhne r2, [r0, #4] + addne r2, r2, r1 + strhne r2, [r0, #4] @ movhi + b .L675 +.L679: + .align 2 +.L678: + .word .LANCHOR0 + .fnend + .size ftl_sb_update_avl_pages, .-ftl_sb_update_avl_pages + .align 1 + .global make_superblock + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type make_superblock, %function +make_superblock: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r4, r0 + ldr r6, .L692 + add r7, r0, #16 + movw r9, #65535 + movs r5, #0 + strh r5, [r0, #4] @ movhi + ldrh r8, [r6, #2324] + addw r10, r6, #2350 + strb r5, [r0, #7] +.L681: + uxth r3, r5 + cmp r8, r3 + bhi .L683 + ldrb r3, [r4, #7] @ zero_extendqisi2 + ldrh r2, [r6, #2390] + smulbb r3, r3, r2 + strh r3, [r4, #4] @ movhi + movs r3, #0 + strb r3, [r4, #9] + ldr r3, [r6, #2248] + cbz r3, .L684 + ldr r3, .L692+4 + ldrh r2, [r4] + ldr r3, [r3, #236] + ldrh r3, [r3, r2, lsl #1] + cmp r3, #79 + itt ls + movls r3, #1 + strbls r3, [r4, #9] +.L684: + ldrb r3, [r6, #36] @ zero_extendqisi2 + cbz r3, .L685 + movs r3, #1 + strb r3, [r4, #9] +.L685: + movs r0, #0 + pop {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L683: + ldrh r1, [r4] + ldrb r0, [r10, r5] @ zero_extendqisi2 + bl V2P_block + strh r9, [r7] @ movhi + mov fp, r0 + bl FtlBbmIsBadBlock + cbnz r0, .L682 + strh fp, [r7] @ movhi + ldrb r3, [r4, #7] @ zero_extendqisi2 + adds r3, r3, #1 + strb r3, [r4, #7] +.L682: + adds r5, r5, #1 + adds r7, r7, #2 + b .L681 +.L693: + .align 2 +.L692: + .word .LANCHOR0 + .word .LANCHOR2 + .fnend + .size make_superblock, .-make_superblock + .align 1 + .global update_multiplier_value + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type update_multiplier_value, %function +update_multiplier_value: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r3, r4, r5, r6, r7, r8, r9, lr} + .save {r3, r4, r5, r6, r7, r8, r9, lr} + movs r5, #0 + ldr r6, .L700 + mov r7, r0 + mov r4, r5 + ldrh r8, [r6, #2324] + addw r6, r6, #2350 + ldrh r9, [r6, #40] +.L695: + uxth r3, r5 + cmp r8, r3 + bhi .L697 + cbz r4, .L699 + mov r1, r4 + mov r0, #32768 + bl __aeabi_idiv +.L698: + ldr r3, .L700+4 + movs r2, #6 + ldr r3, [r3, #292] + mla r7, r2, r7, r3 + strh r0, [r7, #4] @ movhi + movs r0, #0 + pop {r3, r4, r5, r6, r7, r8, r9, pc} +.L697: + mov r1, r7 + ldrb r0, [r6, r5] @ zero_extendqisi2 + bl V2P_block + bl FtlBbmIsBadBlock + cbnz r0, .L696 + add r4, r4, r9 + uxth r4, r4 +.L696: + adds r5, r5, #1 + b .L695 +.L699: + mov r0, r4 + b .L698 +.L701: + .align 2 +.L700: + .word .LANCHOR0 + .word .LANCHOR2 + .fnend + .size update_multiplier_value, .-update_multiplier_value + .align 1 + .global GetFreeBlockMinEraseCount + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type GetFreeBlockMinEraseCount, %function +GetFreeBlockMinEraseCount: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r2, .L705 + ldr r0, [r2, #312] + cbz r0, .L703 + ldr r3, [r2, #292] + subs r0, r0, r3 + ldr r3, .L705+4 + asrs r0, r0, #1 + muls r0, r3, r0 + ldr r3, [r2, #236] + uxth r0, r0 + ldrh r0, [r3, r0, lsl #1] +.L703: + bx lr +.L706: + .align 2 +.L705: + .word .LANCHOR2 + .word -1431655765 + .fnend + .size GetFreeBlockMinEraseCount, .-GetFreeBlockMinEraseCount + .align 1 + .global GetFreeBlockMaxEraseCount + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type GetFreeBlockMaxEraseCount, %function +GetFreeBlockMaxEraseCount: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r1, .L715 + push {r4, r5, r6, r7, lr} + .save {r4, r5, r6, r7, lr} + ldr r3, [r1, #312] + cbz r3, .L713 + ldrh r2, [r1, #316] + movs r6, #6 + ldr r4, [r1, #292] + movw r7, #65535 + rsb r2, r2, r2, lsl #3 + subs r3, r3, r4 + asrs r3, r3, #1 + asrs r2, r2, #3 + cmp r0, r2 + it gt + uxthgt r0, r2 + ldr r2, .L715+4 + muls r3, r2, r3 + movs r2, #0 + uxth r3, r3 +.L710: + uxth r5, r2 + cmp r0, r5 + bls .L712 + mul r5, r6, r3 + adds r2, r2, #1 + ldrh r5, [r4, r5] + cmp r5, r7 + bne .L714 +.L712: + ldr r2, [r1, #236] + ldrh r0, [r2, r3, lsl #1] + pop {r4, r5, r6, r7, pc} +.L714: + mov r3, r5 + b .L710 +.L713: + mov r0, r3 + pop {r4, r5, r6, r7, pc} +.L716: + .align 2 +.L715: + .word .LANCHOR2 + .word -1431655765 + .fnend + .size GetFreeBlockMaxEraseCount, .-GetFreeBlockMaxEraseCount + .align 1 + .global FtlPrintInfo2buf + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FtlPrintInfo2buf, %function +FtlPrintInfo2buf: + .fnstart + @ args = 0, pretend = 0, frame = 16 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r7, r0 + ldr r4, .L729 + add r5, r7, #12 + .pad #36 + sub sp, sp, #36 + ldr r1, .L729+4 + bl strcpy + ldr r2, [r4, #124] + mov r0, r5 + ldr r1, .L729+8 + bl sprintf + add r5, r5, r0 + ldr r2, [r4, #2408] + mov r0, r5 + ldr r1, .L729+12 + bl sprintf + ldr r3, .L729+16 + add r5, r5, r0 + ldr r3, [r3, #500] + cmp r3, #1 + beq .L718 + subs r0, r5, r7 +.L717: + add sp, sp, #36 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L730: + .align 2 +.L729: + .word .LANCHOR0 + .word .LC6 + .word .LC7 + .word .LC8 + .word .LANCHOR1 +.L718: + add r3, sp, #28 + add r2, sp, #24 + add r1, sp, #20 + add r0, sp, #16 + bl NandcGetTimeCfg + ldr r3, [sp, #28] + mov r0, r5 + ldr r2, [sp, #16] + ldr r1, .L731 + str r3, [sp, #4] + ldr r3, [sp, #24] + str r3, [sp] + ldr r3, [sp, #20] + bl sprintf + adds r6, r5, r0 + ldr r1, .L731+4 + ldr r5, .L731+8 + mov r0, r6 + adds r6, r6, #10 + bl strcpy + ldr r2, [r4, #2452] + mov r0, r6 + ldr r1, .L731+12 + bl sprintf + add r6, r6, r0 + ldr r2, [r5, #472] + ldr r1, .L731+16 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldr r2, [r5, #476] + ldr r1, .L731+20 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldr r2, [r5, #480] + ldr r1, .L731+24 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldr r2, [r5, #484] + ldr r1, .L731+28 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldr r2, [r5, #488] + ldr r1, .L731+32 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldr r2, [r5, #492] + ldr r1, .L731+36 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldr r2, [r5, #496] + ldr r1, .L731+40 + mov r0, r6 + bl sprintf + ldr r2, [r5, #500] + add r6, r6, r0 + ldr r1, .L731+44 + mov r0, r6 + lsrs r2, r2, #11 + bl sprintf + ldr r2, [r5, #504] + add r6, r6, r0 + ldr r1, .L731+48 + mov r0, r6 + lsrs r2, r2, #11 + bl sprintf + add r6, r6, r0 + ldr r2, [r5, #508] + ldr r1, .L731+52 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldr r2, [r5, #512] + ldr r1, .L731+56 + mov r0, r6 + bl sprintf + add r6, r6, r0 + bl FtlBbtCalcTotleCnt + ldrh r2, [r4, #2462] + mov r3, r0 + ldr r1, .L731+60 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldrh r2, [r5, #316] + ldr r1, .L731+64 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldr r2, [r5, #516] + ldr r1, .L731+68 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldr r2, [r5, #520] + ldr r1, .L731+72 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldr r2, [r5, #524] + ldr r1, .L731+76 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldr r2, [r5, #240] + ldr r1, .L731+80 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldr r2, [r5, #528] + ldr r1, .L731+84 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldr r2, [r5, #532] + ldr r1, .L731+88 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldrh r2, [r5, #274] + ldr r1, .L731+92 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldrh r2, [r5, #272] + ldr r1, .L731+96 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldr r2, [r4, #2432] + ldr r1, .L731+100 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldr r2, [r4, #2424] + ldr r1, .L731+104 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldr r2, [r4, #2320] + ldr r1, .L731+108 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldrh r2, [r4, #2522] + ldr r1, .L731+112 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldrh r2, [r4, #2332] + ldr r1, .L731+116 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldrh r2, [r5, #536] + ldr r1, .L731+120 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldr r2, [r4, #2336] + ldr r1, .L731+124 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldrh r2, [r5, #540] + ldr r1, .L731+128 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldrh r2, [r4, #2456] + ldr r1, .L731+132 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldrh r2, [r5, #322] + ldr r1, .L731+136 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldrb r2, [r5, #326] @ zero_extendqisi2 + ldr r1, .L731+140 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldrh r2, [r5, #320] + ldr r1, .L731+144 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldrb r2, [r5, #328] @ zero_extendqisi2 + ldr r1, .L731+148 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldrh r2, [r5, #324] + ldr r1, .L731+152 + mov r0, r6 + bl sprintf + ldr r3, [r5, #300] + add r6, r6, r0 + ldrh r2, [r5, #320] + mov r0, r6 + ldr r1, .L731+156 + ldrh r2, [r3, r2, lsl #1] + bl sprintf + add r6, r6, r0 + ldrh r2, [r5, #370] + ldr r1, .L731+160 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldrb r2, [r5, #374] @ zero_extendqisi2 + ldr r1, .L731+164 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldrh r2, [r5, #368] + ldr r1, .L731+168 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldrb r2, [r5, #376] @ zero_extendqisi2 + ldr r1, .L731+172 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldrh r2, [r5, #372] + ldr r1, .L731+176 + mov r0, r6 + bl sprintf + ldr r3, [r5, #300] + add r6, r6, r0 + ldrh r2, [r5, #368] + mov r0, r6 + ldr r1, .L731+180 + ldrh r2, [r3, r2, lsl #1] + bl sprintf + add r6, r6, r0 + ldrh r2, [r5, #418] + ldr r1, .L731+184 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldrb r2, [r5, #422] @ zero_extendqisi2 + ldr r1, .L731+188 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldrh r2, [r5, #416] + ldr r1, .L731+192 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldrb r2, [r5, #424] @ zero_extendqisi2 + ldr r1, .L731+196 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldrh r2, [r5, #420] + ldr r1, .L731+200 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldrh r2, [r5, #558] + ldr r1, .L731+204 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldrb r2, [r5, #562] @ zero_extendqisi2 + ldr r1, .L731+208 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldrh r2, [r5, #556] + ldr r1, .L731+212 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldrb r2, [r5, #564] @ zero_extendqisi2 + ldr r1, .L731+216 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldrh r2, [r5, #560] + ldr r1, .L731+220 + mov r0, r6 + bl sprintf + ldr r3, [r5, #680] + add r6, r6, r0 + ldr r1, [r5, #1116] + mov r0, r6 + ldr r2, [r4, #2248] + str r3, [sp, #4] + ldr r3, [r5, #688] + orr r2, r2, r1, lsl #8 + ldr r1, .L731+224 + str r3, [sp] + ldr r3, [r5, #684] + bl sprintf + adds r4, r6, r0 + ldr r2, [r5, #676] + ldr r1, .L731+228 + mov r0, r4 + bl sprintf + add r4, r4, r0 + ldr r2, [r5, #700] + ldr r1, .L731+232 + mov r0, r4 + bl sprintf + add r4, r4, r0 + ldrh r2, [r5, #1120] + ldr r1, .L731+236 + mov r0, r4 + bl sprintf + add r4, r4, r0 + ldrh r2, [r5, #1122] + b .L732 +.L733: + .align 2 +.L731: + .word .LC9 + .word .LC10 + .word .LANCHOR2 + .word .LC11 + .word .LC12 + .word .LC13 + .word .LC14 + .word .LC15 + .word .LC16 + .word .LC17 + .word .LC18 + .word .LC19 + .word .LC20 + .word .LC21 + .word .LC22 + .word .LC23 + .word .LC24 + .word .LC25 + .word .LC26 + .word .LC27 + .word .LC28 + .word .LC29 + .word .LC30 + .word .LC31 + .word .LC32 + .word .LC33 + .word .LC34 + .word .LC35 + .word .LC36 + .word .LC37 + .word .LC38 + .word .LC39 + .word .LC40 + .word .LC41 + .word .LC42 + .word .LC43 + .word .LC44 + .word .LC45 + .word .LC46 + .word .LC47 + .word .LC48 + .word .LC49 + .word .LC50 + .word .LC51 + .word .LC52 + .word .LC53 + .word .LC54 + .word .LC55 + .word .LC56 + .word .LC57 + .word .LC58 + .word .LC59 + .word .LC60 + .word .LC61 + .word .LC62 + .word .LC63 + .word .LC64 + .word .LC65 + .word .LC66 + .word .LC67 +.L732: + ldr r1, .L734 + mov r0, r4 + bl sprintf + add r4, r4, r0 + ldr r2, [r5, #1124] + ldr r1, .L734+4 + mov r0, r4 + bl sprintf + add r4, r4, r0 + ldrh r2, [r5, #1128] + ldr r1, .L734+8 + mov r0, r4 + bl sprintf + add r4, r4, r0 + bl GetFreeBlockMinEraseCount + ldr r1, .L734+12 + mov r2, r0 + mov r0, r4 + bl sprintf + add r4, r4, r0 + ldrh r0, [r5, #316] + bl GetFreeBlockMaxEraseCount + ldr r1, .L734+16 + mov r2, r0 + mov r0, r4 + bl sprintf + ldrh r3, [r5, #556] + movw r2, #65535 + add r4, r4, r0 + cmp r3, r2 + beq .L720 + ldr r2, [r5, #300] + mov r0, r4 + ldr r1, .L734+20 + ldrh r2, [r2, r3, lsl #1] + bl sprintf + add r4, r4, r0 +.L720: + movs r0, #0 + ldr r9, .L734+28 + bl List_get_gc_head_node + uxth r3, r0 + movs r6, #0 + movw fp, #65535 + mov r10, #6 +.L722: + cmp r3, fp + beq .L721 + ldr r2, [r5, #236] + mul r8, r10, r3 + mov r0, r4 + mov r1, r9 + ldrh r2, [r2, r3, lsl #1] + str r2, [sp, #8] + ldr r2, [r5, #292] + add r2, r2, r8 + ldrh r2, [r2, #4] + str r2, [sp, #4] + ldr r2, [r5, #300] + ldrh r2, [r2, r3, lsl #1] + str r2, [sp] + mov r2, r6 + bl sprintf + adds r6, r6, #1 + ldr r3, [r5, #292] + cmp r6, #16 + add r4, r4, r0 + ldrh r3, [r3, r8] + bne .L722 +.L721: + ldr r2, [r5, #292] + movs r6, #0 + ldr r3, [r5, #312] + movw r9, #65535 + ldr fp, .L734+32 + mov r10, #6 + subs r3, r3, r2 + asrs r2, r3, #1 + ldr r3, .L734+24 + muls r3, r2, r3 + uxth r3, r3 +.L724: + cmp r3, r9 + beq .L723 + ldr r2, [r5, #236] + mul r8, r10, r3 + mov r0, r4 + mov r1, fp + ldrh r2, [r2, r3, lsl #1] + str r2, [sp, #4] + ldr r2, [r5, #292] + add r2, r2, r8 + ldrh r2, [r2, #4] + str r2, [sp] + mov r2, r6 + adds r6, r6, #1 + bl sprintf + cmp r6, #4 + add r4, r4, r0 + beq .L723 + ldr r3, [r5, #292] + ldrh r3, [r3, r8] + b .L724 +.L723: + subs r0, r4, r7 + b .L717 +.L735: + .align 2 +.L734: + .word .LC68 + .word .LC69 + .word .LC70 + .word .LC71 + .word .LC72 + .word .LC73 + .word -1431655765 + .word .LC74 + .word .LC75 + .fnend + .size FtlPrintInfo2buf, .-FtlPrintInfo2buf + .align 1 + .global ftl_proc_ftl_read + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type ftl_proc_ftl_read, %function +ftl_proc_ftl_read: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r3, r4, r5, lr} + .save {r3, r4, r5, lr} + mov r5, r0 + ldr r2, .L737 + ldr r1, .L737+4 + bl sprintf + adds r4, r5, r0 + mov r0, r4 + bl FtlPrintInfo2buf + add r0, r0, r4 + subs r0, r0, r5 + pop {r3, r4, r5, pc} +.L738: + .align 2 +.L737: + .word .LC76 + .word .LC77 + .fnend + .size ftl_proc_ftl_read, .-ftl_proc_ftl_read + .align 1 + .global GetSwlReplaceBlock + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type GetSwlReplaceBlock, %function +GetSwlReplaceBlock: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #28 + sub sp, sp, #28 + ldr r4, .L765 + ldr r2, [r4, #524] + ldr r3, [r4, #532] + cmp r2, r3 + bcs .L740 + ldr r5, .L765+4 + movs r3, #0 + ldr r0, [r4, #236] + str r3, [r4, #516] + ldrh r1, [r5, #2332] +.L741: + cmp r3, r1 + bcc .L742 + ldr r6, [r4, #516] + mov r0, r6 + bl __aeabi_uidiv + str r0, [r4, #524] + ldr r0, [r4, #520] + ldrh r1, [r5, #2382] + subs r0, r6, r0 + bl __aeabi_uidiv + str r0, [r4, #516] +.L743: + ldr r6, [r4, #532] + ldr r7, [r4, #524] + add r3, r6, #256 + cmp r3, r7 + bls .L748 + ldr r2, [r4, #528] + add r3, r6, #768 + cmp r3, r2 + bls .L748 + ldr r3, .L765+4 + ldr r3, [r3, #2248] + cbnz r3, .L749 +.L751: + movw r5, #65535 +.L750: + mov r0, r5 + add sp, sp, #28 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L742: + ldrh r2, [r0, r3, lsl #1] + adds r3, r3, #1 + ldr r6, [r4, #516] + add r2, r2, r6 + str r2, [r4, #516] + b .L741 +.L740: + ldr r3, [r4, #528] + cmp r2, r3 + bls .L743 + ldr r0, .L765+4 + adds r3, r3, #1 + str r3, [r4, #528] + movs r3, #0 +.L745: + ldrh r2, [r0, #2332] + cmp r3, r2 + bcs .L743 + ldr r1, [r4, #236] + ldrh r2, [r1, r3, lsl #1] + adds r2, r2, #1 + strh r2, [r1, r3, lsl #1] @ movhi + adds r3, r3, #1 + b .L745 +.L749: + cmp r6, #40 + bhi .L751 +.L748: + ldrh r0, [r4, #316] + add r0, r0, r0, lsl #1 + ubfx r0, r0, #2, #16 + bl GetFreeBlockMaxEraseCount + add r3, r6, #64 + mov r9, r0 + cmp r0, r3 + bcs .L752 + cmp r6, #40 + bhi .L751 +.L752: + ldr r3, [r4, #296] + cmp r3, #0 + beq .L751 + ldr r2, .L765+4 + movw r1, #65535 + ldr lr, [r4, #292] + movs r0, #0 + ldr r8, [r4, #236] + mov r10, r1 + ldrh r2, [r2, #2332] + mov fp, #6 + str r2, [sp, #20] + mov r2, r1 +.L753: + ldrh ip, [r3] + cmp ip, r10 + bne .L756 + mov r5, r2 +.L755: + movw r3, #65535 + cmp r5, r3 + beq .L751 + ldrh r10, [r8, r5, lsl #1] + lsl fp, r5, #1 + cmp r6, r10 + bcs .L757 + bl GetFreeBlockMinEraseCount + cmp r6, r0 + it cc + strcc r1, [r4, #532] +.L757: + cmp r7, r10 + bls .L751 + add r3, r10, #128 + cmp r9, r3 + ble .L751 + add r3, r10, #256 + cmp r7, r3 + bhi .L758 + ldr r3, [r4, #528] + add r10, r10, #768 + cmp r10, r3 + bcs .L751 +.L758: + str r9, [sp, #8] + mov r2, r7 + ldrh r3, [r8, fp] + mov r1, r5 + ldr r0, .L765+8 + str r3, [sp, #4] + ldr r3, [r4, #300] + ldrh r3, [r3, fp] + str r3, [sp] + ldr r3, [r4, #528] + bl printk + movs r3, #1 + str r3, [r4, #1132] + b .L750 +.L756: + adds r0, r0, #1 + ldr r5, [sp, #20] + uxth r0, r0 + cmp r0, r5 + bhi .L751 + ldrh r5, [r3, #4] + cbz r5, .L754 + ldr r5, .L765+12 + sub r3, r3, lr + asrs r3, r3, #1 + muls r3, r5, r3 + uxth r5, r3 + ldrh r3, [r8, r5, lsl #1] + cmp r6, r3 + bcs .L755 + cmp r1, r3 + itt hi + movhi r1, r3 + movhi r2, r5 +.L754: + mla r3, fp, ip, lr + b .L753 +.L766: + .align 2 +.L765: + .word .LANCHOR2 + .word .LANCHOR0 + .word .LC78 + .word -1431655765 + .fnend + .size GetSwlReplaceBlock, .-GetSwlReplaceBlock + .align 1 + .global free_data_superblock + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type free_data_superblock, %function +free_data_superblock: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + movw r2, #65535 + push {r3, lr} + .save {r3, lr} + cmp r0, r2 + beq .L768 + ldr r2, .L769 + movs r1, #0 + ldr r2, [r2, #300] + strh r1, [r2, r0, lsl #1] @ movhi + bl INSERT_FREE_LIST +.L768: + movs r0, #0 + pop {r3, pc} +.L770: + .align 2 +.L769: + .word .LANCHOR2 + .fnend + .size free_data_superblock, .-free_data_superblock + .align 1 + .global FtlGcBufInit + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FtlGcBufInit, %function +FtlGcBufInit: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r2, .L780 + mov ip, #1 + ldr r0, .L780+4 + movs r3, #0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + movs r7, #12 + mov r5, r2 + mov lr, #36 + mov r1, r0 + str r3, [r2, #1136] +.L772: + ldrh r4, [r0, #2324] + uxth r8, r3 + adds r6, r3, #1 + cmp r8, r4 + bcc .L775 + ldr r7, .L780 + mov lr, #12 + movs r6, #0 +.L776: + ldr r3, [r2, #1156] + cmp r4, r3 + bcc .L779 + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L775: + uxth r3, r3 + ldr r9, [r2, #1140] + mul r8, r7, r3 + add r4, r9, r8 + str ip, [r4, #8] + ldrh r4, [r0, #2400] + muls r4, r3, r4 + it mi + addmi r4, r4, #3 + bic r10, r4, #3 + ldr r4, [r5, #1144] + add r4, r4, r10 + str r4, [r9, r8] + ldrh r4, [r1, #2402] + muls r4, r3, r4 + it mi + addmi r4, r4, #3 + ldr r10, [r2, #1140] + bic fp, r4, #3 + ldr r4, [r5, #1148] + add r9, r10, r8 + add r4, r4, fp + str r4, [r9, #4] + ldr r4, [r2, #1152] + mla r3, lr, r3, r4 + ldr r4, [r10, r8] + str r4, [r3, #8] + ldr r4, [r9, #4] + str r4, [r3, #12] + mov r3, r6 + b .L772 +.L779: + mul ip, lr, r4 + ldr r0, [r2, #1140] + ldr r5, [r2, #1144] + add r3, r0, ip + str r6, [r3, #8] + ldrh r3, [r1, #2400] + muls r3, r4, r3 + it mi + addmi r3, r3, #3 + bic r3, r3, #3 + add r3, r3, r5 + str r3, [r0, ip] + ldr r3, [r2, #1140] + ldr r0, [r7, #1148] + add ip, ip, r3 + ldrh r3, [r1, #2402] + muls r3, r4, r3 + it mi + addmi r3, r3, #3 + bic r3, r3, #3 + adds r4, r4, #1 + add r3, r3, r0 + uxth r4, r4 + str r3, [ip, #4] + b .L776 +.L781: + .align 2 +.L780: + .word .LANCHOR2 + .word .LANCHOR0 + .fnend + .size FtlGcBufInit, .-FtlGcBufInit + .align 1 + .global FtlGcBufFree + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FtlGcBufFree, %function +FtlGcBufFree: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L789 + push {r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + movs r5, #0 + mov r10, #36 + mov lr, #12 + mov r8, r5 + ldr ip, [r3, #1156] + ldr r6, [r3, #1140] +.L783: + uxth r3, r5 + cmp r1, r3 + bls .L782 + mla r4, r10, r3, r0 + movs r2, #0 +.L784: + uxth r3, r2 + cmp ip, r3 + bls .L785 + mul r3, lr, r3 + ldr r7, [r4, #8] + adds r2, r2, #1 + add r9, r6, r3 + ldr r3, [r6, r3] + cmp r3, r7 + bne .L784 + str r8, [r9, #8] +.L785: + adds r5, r5, #1 + b .L783 +.L782: + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L790: + .align 2 +.L789: + .word .LANCHOR2 + .fnend + .size FtlGcBufFree, .-FtlGcBufFree + .align 1 + .global FtlGcBufAlloc + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FtlGcBufAlloc, %function +FtlGcBufAlloc: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L798 + mov ip, #12 + push {r4, r5, r6, r7, r8, r9, lr} + .save {r4, r5, r6, r7, r8, r9, lr} + movs r4, #0 + mov lr, #1 + mov r8, #36 + ldr r5, [r3, #1156] + ldr r6, [r3, #1140] +.L792: + uxth r2, r4 + cmp r1, r2 + bhi .L796 + pop {r4, r5, r6, r7, r8, r9, pc} +.L796: + mov r9, #0 +.L793: + uxth r3, r9 + cmp r5, r3 + bls .L794 + mla r3, ip, r3, r6 + add r9, r9, #1 + ldr r7, [r3, #8] + cmp r7, #0 + bne .L793 + mla r2, r8, r2, r0 + ldr r7, [r3] + str lr, [r3, #8] + str r7, [r2, #8] + ldr r3, [r3, #4] + str r3, [r2, #12] +.L794: + adds r4, r4, #1 + b .L792 +.L799: + .align 2 +.L798: + .word .LANCHOR2 + .fnend + .size FtlGcBufAlloc, .-FtlGcBufAlloc + .align 1 + .global IsBlkInGcList + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type IsBlkInGcList, %function +IsBlkInGcList: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r2, .L805 + ldr r3, [r2, #1160] + ldrh r2, [r2, #1164] + add r2, r3, r2, lsl #1 +.L801: + cmp r3, r2 + bne .L803 + movs r0, #0 + bx lr +.L803: + ldrh r1, [r3], #2 + cmp r1, r0 + bne .L801 + movs r0, #1 + bx lr +.L806: + .align 2 +.L805: + .word .LANCHOR2 + .fnend + .size IsBlkInGcList, .-IsBlkInGcList + .align 1 + .global FtlGcUpdatePage + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FtlGcUpdatePage, %function +FtlGcUpdatePage: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r3, r4, r5, r6, r7, lr} + .save {r3, r4, r5, r6, r7, lr} + mov r5, r0 + ubfx r0, r0, #10, #16 + mov r6, r1 + mov r7, r2 + movs r4, #0 + bl P2V_block_in_plane + ldr r3, .L811 + ldrh r1, [r3, #1164] + ldr r2, [r3, #1160] +.L808: + uxth ip, r4 + cmp ip, r1 + bcc .L810 + bne .L809 + strh r0, [r2, ip, lsl #1] @ movhi + ldrh r0, [r3, #1164] + adds r0, r0, #1 + strh r0, [r3, #1164] @ movhi + b .L809 +.L810: + adds r4, r4, #1 + add ip, r2, r4, lsl #1 + ldrh ip, [ip, #-2] + cmp ip, r0 + bne .L808 +.L809: + ldrh r2, [r3, #1172] + movs r0, #12 + muls r0, r2, r0 + ldr r2, [r3, #1168] + adds r1, r2, r0 + str r6, [r1, #4] + str r7, [r1, #8] + str r5, [r2, r0] + ldrh r2, [r3, #1172] + adds r2, r2, #1 + strh r2, [r3, #1172] @ movhi + pop {r3, r4, r5, r6, r7, pc} +.L812: + .align 2 +.L811: + .word .LANCHOR2 + .fnend + .size FtlGcUpdatePage, .-FtlGcUpdatePage + .align 1 + .global FtlGcRefreshOpenBlock + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FtlGcRefreshOpenBlock, %function +FtlGcRefreshOpenBlock: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r3, r4, r5, lr} + .save {r3, r4, r5, lr} + mov r5, r0 + ldr r4, .L820 + ldrh r3, [r4, #1174] + cmp r3, r0 + beq .L815 + ldrh r3, [r4, #1176] + cmp r3, r0 + beq .L815 + ldrh r3, [r4, #1178] + cmp r3, r0 + beq .L815 + ldrh r3, [r4, #1180] + cmp r3, r0 + beq .L815 + mov r1, r0 + ldr r0, .L820+4 + bl printk + ldrh r2, [r4, #1174] + movw r3, #65535 + cmp r2, r3 + bne .L817 + strh r5, [r4, #1174] @ movhi +.L815: + movs r0, #0 + pop {r3, r4, r5, pc} +.L817: + ldrh r2, [r4, #1176] + cmp r2, r3 + bne .L818 + strh r5, [r4, #1176] @ movhi + b .L815 +.L818: + ldrh r2, [r4, #1178] + cmp r2, r3 + bne .L819 + strh r5, [r4, #1178] @ movhi + b .L815 +.L819: + ldrh r2, [r4, #1180] + cmp r2, r3 + it eq + strheq r5, [r4, #1180] @ movhi + b .L815 +.L821: + .align 2 +.L820: + .word .LANCHOR2 + .word .LC79 + .fnend + .size FtlGcRefreshOpenBlock, .-FtlGcRefreshOpenBlock + .align 1 + .global FtlGcRefreshBlock + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FtlGcRefreshBlock, %function +FtlGcRefreshBlock: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r3, r4, r5, lr} + .save {r3, r4, r5, lr} + mov r5, r0 + ldr r4, .L832 + ldrh r3, [r4, #1174] + cmp r3, r0 + beq .L830 + ldrh r3, [r4, #1176] + cmp r3, r0 + beq .L830 + ldrh r3, [r4, #1178] + cmp r3, r0 + beq .L830 + ldrh r3, [r4, #1180] + cmp r3, r0 + beq .L830 + mov r1, r0 + ldr r0, .L832+4 + bl printk + ldrh r2, [r4, #1174] + movw r3, #65535 + cmp r2, r3 + bne .L824 + strh r5, [r4, #1174] @ movhi +.L830: + movs r0, #0 + pop {r3, r4, r5, pc} +.L824: + ldrh r2, [r4, #1176] + cmp r2, r3 + bne .L825 + strh r5, [r4, #1176] @ movhi + b .L830 +.L825: + ldrh r2, [r4, #1178] + cmp r2, r3 + bne .L826 + strh r5, [r4, #1178] @ movhi + b .L830 +.L826: + ldrh r2, [r4, #1180] + cmp r2, r3 + bne .L831 + strh r5, [r4, #1180] @ movhi + b .L830 +.L831: + mov r0, #-1 + pop {r3, r4, r5, pc} +.L833: + .align 2 +.L832: + .word .LANCHOR2 + .word .LC79 + .fnend + .size FtlGcRefreshBlock, .-FtlGcRefreshBlock + .align 1 + .global FtlGcMarkBadPhyBlk + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FtlGcMarkBadPhyBlk, %function +FtlGcMarkBadPhyBlk: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + mov r5, r0 + ldr r4, .L842 + bl P2V_block_in_plane + mov r2, r5 + mov r6, r0 + ldrh r1, [r4, #1182] + ldr r0, .L842+4 + bl printk + mov r0, r6 + bl FtlGcRefreshBlock + ldr r3, .L842+8 + ldr r2, [r3, #2248] + mov r3, r4 + cbz r2, .L835 + ldr r1, [r4, #236] + ldrh r2, [r1, r6, lsl #1] + cmp r2, #39 + itt hi + subhi r2, r2, #40 + strhhi r2, [r1, r6, lsl #1] @ movhi +.L835: + ldrh r2, [r3, #1182] + movs r1, #0 + ldr r4, .L842+12 +.L836: + uxth r0, r1 + cmp r2, r0 + bhi .L838 + cmp r2, #15 + itttt ls + addls r1, r2, #1 + strhls r1, [r3, #1182] @ movhi + addls r3, r3, r2, lsl #1 + strhls r5, [r3, #1184] @ movhi + b .L837 +.L838: + adds r1, r1, #1 + add r0, r4, r1, lsl #1 + ldrh r0, [r0, #-2] + cmp r0, r5 + bne .L836 +.L837: + movs r0, #0 + pop {r4, r5, r6, pc} +.L843: + .align 2 +.L842: + .word .LANCHOR2 + .word .LC80 + .word .LANCHOR0 + .word .LANCHOR2+1184 + .fnend + .size FtlGcMarkBadPhyBlk, .-FtlGcMarkBadPhyBlk + .align 1 + .global FtlGcReFreshBadBlk + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FtlGcReFreshBadBlk, %function +FtlGcReFreshBadBlk: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, lr} + .save {r4, lr} + ldr r4, .L850 + ldrh r3, [r4, #1182] + cbz r3, .L845 + ldrh r1, [r4, #1174] + movw r2, #65535 + cmp r1, r2 + bne .L845 + ldrh r2, [r4, #1218] + cmp r2, r3 + itt cs + movcs r3, #0 + strhcs r3, [r4, #1218] @ movhi + ldrh r3, [r4, #1218] + add r3, r4, r3, lsl #1 + ldrh r0, [r3, #1184] + bl P2V_block_in_plane + bl FtlGcRefreshBlock + ldrh r3, [r4, #1218] + adds r3, r3, #1 + strh r3, [r4, #1218] @ movhi +.L845: + movs r0, #0 + pop {r4, pc} +.L851: + .align 2 +.L850: + .word .LANCHOR2 + .fnend + .size FtlGcReFreshBadBlk, .-FtlGcReFreshBadBlk + .align 1 + .global ftl_memset + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type ftl_memset, %function +ftl_memset: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + b memset + .fnend + .size ftl_memset, .-ftl_memset + .align 1 + .global BuildFlashLsbPageTable + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type BuildFlashLsbPageTable, %function +BuildFlashLsbPageTable: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r3, r4, r5, lr} + .save {r3, r4, r5, lr} + mov r4, r1 + cbnz r0, .L854 + ldr r3, .L909 +.L855: + strh r0, [r3, r0, lsl #1] @ movhi + adds r0, r0, #1 + cmp r0, #512 + bne .L855 +.L861: + movs r1, #255 + mov r2, #2048 + ldr r0, .L909+4 + uxth r4, r4 + bl ftl_memset + ldr r1, .L909 + movs r3, #0 + ldr r0, .L909+8 +.L856: + uxth r2, r3 + cmp r4, r2 + bhi .L889 + pop {r3, r4, r5, pc} +.L854: + cmp r0, #1 + bne .L857 + ldr r1, .L909 + movs r3, #0 +.L860: + cmp r3, #3 + uxth r2, r3 + bls .L858 + tst r2, #1 + ite ne + movne r0, #3 + moveq r0, #2 + rsb r2, r0, r2, lsl #1 + uxth r2, r2 +.L858: + strh r2, [r1, r3, lsl #1] @ movhi + adds r3, r3, #1 + cmp r3, #512 + bne .L860 + b .L861 +.L857: + cmp r0, #2 + bne .L862 + ldr r1, .L909 + movs r2, #0 +.L864: + uxth r3, r2 + cmp r2, #1 + ittt hi + lslhi r3, r3, #1 + addhi r3, r3, #-1 + uxthhi r3, r3 + strh r3, [r1, r2, lsl #1] @ movhi + adds r2, r2, #1 + cmp r2, #512 + bne .L864 + b .L861 +.L862: + cmp r0, #3 + bne .L865 + ldr r1, .L909 + movs r3, #0 +.L868: + cmp r3, #5 + uxth r2, r3 + bls .L866 + tst r2, #1 + ite ne + movne r0, #5 + moveq r0, #4 + rsb r2, r0, r2, lsl #1 + uxth r2, r2 +.L866: + strh r2, [r1, r3, lsl #1] @ movhi + adds r3, r3, #1 + cmp r3, #512 + bne .L868 + b .L861 +.L865: + cmp r0, #4 + mov r3, #0 + bne .L869 + ldr r2, .L909+12 + strh r3, [r2, #156] @ movhi + movs r3, #1 + strh r3, [r2, #158] @ movhi + movs r3, #2 + strh r3, [r2, #160] @ movhi + movs r3, #3 + strh r3, [r2, #162] @ movhi + movs r3, #5 + strh r3, [r2, #166] @ movhi + movs r3, #7 + strh r3, [r2, #168] @ movhi + movs r3, #8 + strh r0, [r2, #164] @ movhi + strh r3, [r2, #170]! @ movhi +.L871: + tst r3, #1 + ite ne + movne r1, #7 + moveq r1, #6 + rsb r1, r1, r3, lsl #1 + adds r3, r3, #1 + uxth r3, r3 + strh r1, [r2, #2]! @ movhi + cmp r3, #512 + bne .L871 + b .L861 +.L869: + cmp r0, #5 + bne .L872 + ldr r2, .L909+12 + add r1, r2, #156 +.L873: + strh r3, [r1, r3, lsl #1] @ movhi + adds r3, r3, #1 + cmp r3, #16 + bne .L873 + adds r2, r2, #186 +.L874: + strh r3, [r2, #2]! @ movhi + adds r3, r3, #2 + uxth r3, r3 + cmp r3, #1008 + bne .L874 + b .L861 +.L872: + cmp r0, #6 + bne .L875 + ldr r0, .L909 + mov r1, r3 +.L878: + cmp r1, #5 + uxth r2, r1 + bls .L876 + tst r2, #1 + ite ne + movne r2, #12 + moveq r2, #10 + subs r2, r3, r2 + uxth r2, r2 +.L876: + strh r2, [r0, r1, lsl #1] @ movhi + adds r1, r1, #1 + cmp r1, #512 + add r3, r3, #3 + uxth r3, r3 + bne .L878 + b .L861 +.L875: + cmp r0, #9 + bne .L879 + ldr r2, .L909+12 + movw r1, #1021 + strh r3, [r2, #156] @ movhi + movs r3, #1 + strh r3, [r2, #158] @ movhi + mov r3, r2 + movs r2, #2 + strh r2, [r3, #160]! @ movhi + movs r2, #3 +.L880: + strh r2, [r3, #2]! @ movhi + adds r2, r2, #2 + uxth r2, r2 + cmp r2, r1 + bne .L880 + b .L861 +.L879: + cmp r0, #10 + bne .L881 + ldr r2, .L909+12 + add r1, r2, #156 +.L882: + strh r3, [r1, r3, lsl #1] @ movhi + adds r3, r3, #1 + cmp r3, #63 + bne .L882 + add r2, r2, #280 + movw r1, #961 +.L883: + strh r3, [r2, #2]! @ movhi + adds r3, r3, #2 + uxth r3, r3 + cmp r3, r1 + bne .L883 + b .L861 +.L881: + cmp r0, #11 + bne .L884 + ldr r2, .L909+12 + movs r3, #0 + add r1, r2, #156 +.L885: + strh r3, [r1, r3, lsl #1] @ movhi + adds r3, r3, #1 + cmp r3, #8 + bne .L885 + adds r2, r2, #170 +.L887: + tst r3, #1 + ite ne + movne r1, #7 + moveq r1, #6 + rsb r1, r1, r3, lsl #1 + adds r3, r3, #1 + uxth r3, r3 + strh r1, [r2, #2]! @ movhi + cmp r3, #512 + bne .L887 + b .L861 +.L884: + cmp r0, #12 + bne .L861 + ldr r3, .L909+12 + movs r2, #0 + strh r2, [r3, #156] @ movhi + movs r2, #1 + strh r2, [r3, #158] @ movhi + movs r2, #2 + strh r2, [r3, #160] @ movhi + movs r2, #3 + strh r2, [r3, #162]! @ movhi + movs r2, #4 +.L888: + subs r1, r2, #1 + add r1, r1, r2, lsr #1 + adds r2, r2, #1 + uxth r2, r2 + strh r1, [r3, #2]! @ movhi + cmp r2, #512 + bne .L888 + b .L861 +.L889: + ldrh r2, [r1, r3, lsl #1] + adds r3, r3, #1 + add r5, r0, r2, lsl #1 + strh r2, [r5, #1220] @ movhi + b .L856 +.L910: + .align 2 +.L909: + .word .LANCHOR0+156 + .word .LANCHOR2+1220 + .word .LANCHOR2 + .word .LANCHOR0 + .fnend + .size BuildFlashLsbPageTable, .-BuildFlashLsbPageTable + .align 1 + .global FlashDieInfoInit + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FlashDieInfoInit, %function +FlashDieInfoInit: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L925 + push {r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + movs r7, #0 + ldr r4, .L925+4 + ldr r6, .L925+8 + ldrh r0, [r3, #478] + addw r10, r4, #2072 + strb r7, [r4, #2234] + mov r9, r10 + strb r7, [r6, #3268] + bl FlashBlockAlignInit + movs r2, #8 + mov r1, r7 + addw r0, r4, #2236 + bl ftl_memset + movs r2, #32 + mov r1, r7 + addw r0, r4, #1180 + bl ftl_memset + movs r2, #128 + mov r1, r7 + addw r0, r4, #2104 + bl ftl_memset + ldr r5, [r4, #48] + add r8, r5, #1 +.L913: + ldrb r2, [r5] @ zero_extendqisi2 + add r1, r10, r7, lsl #3 + mov r0, r8 + bl FlashMemCmp8 + cbnz r0, .L912 + ldrb r3, [r4, #2234] @ zero_extendqisi2 + add r2, r4, r3, lsl #2 + str r0, [r2, #1180] + adds r2, r3, #1 + add r3, r3, r4 + strb r2, [r4, #2234] + strb r7, [r3, #2236] +.L912: + adds r7, r7, #1 + cmp r7, #4 + bne .L913 + ldrb r3, [r4, #2234] @ zero_extendqisi2 + strb r3, [r6, #3268] + ldrb r3, [r5, #8] @ zero_extendqisi2 + cmp r3, #2 + beq .L914 +.L918: + ldrh r2, [r5, #14] + ldrb r3, [r4, #2234] @ zero_extendqisi2 + smulbb r3, r3, r2 + ldrb r2, [r5, #13] @ zero_extendqisi2 + smulbb r3, r3, r2 + strh r3, [r6, #3270] @ movhi + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L914: + ldr r10, [r4, #40] + movs r7, #0 +.L917: + ldrb r2, [r5] @ zero_extendqisi2 + add r1, r9, r7, lsl #3 + mov r0, r8 + bl FlashMemCmp8 + cbnz r0, .L915 + ldrh r3, [r5, #14] + ldrb r2, [r4, #2234] @ zero_extendqisi2 + and r1, r3, #65280 + ldrb r3, [r5, #13] @ zero_extendqisi2 + mul r3, r10, r3 + muls r3, r1, r3 + add r1, r4, r2, lsl #2 + str r3, [r1, #1180] + ldrb r0, [r5, #23] @ zero_extendqisi2 + cbz r0, .L916 + lsls r3, r3, #1 + str r3, [r1, #1180] +.L916: + adds r3, r2, #1 + add r2, r2, r4 + strb r3, [r4, #2234] + strb r7, [r2, #2236] +.L915: + adds r7, r7, #1 + cmp r7, #4 + bne .L917 + b .L918 +.L926: + .align 2 +.L925: + .word .LANCHOR1 + .word .LANCHOR0 + .word .LANCHOR2 + .fnend + .size FlashDieInfoInit, .-FlashDieInfoInit + .align 1 + .global ftl_read_flash_info + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type ftl_read_flash_info, %function +ftl_read_flash_info: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + movs r2, #11 + movs r1, #0 + mov r4, r0 + movs r5, #1 + bl ftl_memset + ldr r3, .L930 + ldr r2, [r3, #48] + ldr r1, [r3, #40] + ldrb r2, [r2, #9] @ zero_extendqisi2 + smulbb r2, r2, r1 + strh r2, [r4, #4] @ unaligned + ldrb r2, [r3, #2316] @ zero_extendqisi2 + strb r2, [r4, #7] + ldr r2, [r3, #2432] + str r2, [r4] @ unaligned + ldr r2, [r3, #48] + addw r3, r3, #2236 + ldrb r0, [r3, #-2] @ zero_extendqisi2 + ldrb r1, [r2, #9] @ zero_extendqisi2 + strb r1, [r4, #6] + movs r1, #32 + strb r1, [r4, #8] + ldrb r2, [r2, #7] @ zero_extendqisi2 + strb r2, [r4, #9] + movs r2, #0 + strb r2, [r4, #10] +.L928: + uxtb r1, r2 + cmp r0, r1 + bhi .L929 + pop {r4, r5, r6, pc} +.L929: + ldrb r1, [r2, r3] @ zero_extendqisi2 + adds r2, r2, #1 + ldrb r6, [r4, #10] @ zero_extendqisi2 + lsl r1, r5, r1 + orrs r1, r1, r6 + strb r1, [r4, #10] + b .L928 +.L931: + .align 2 +.L930: + .word .LANCHOR0 + .fnend + .size ftl_read_flash_info, .-ftl_read_flash_info + .align 1 + .global FtlMemInit + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FtlMemInit, %function +FtlMemInit: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r3, r4, r5, r6, r7, r8, r9, lr} + .save {r3, r4, r5, r6, r7, r8, r9, lr} + movw r3, #65535 + ldr r4, .L1034 + movs r6, #0 + mov r0, #1024 + movs r7, #12 + ldr r5, .L1034+4 + mov r8, #36 + str r3, [r4, #3284] + strh r3, [r4, #1174] @ movhi + strh r3, [r4, #1176] @ movhi + strh r3, [r4, #1178] @ movhi + strh r3, [r4, #1180] @ movhi + movs r3, #32 + strh r3, [r4, #1120] @ movhi + movs r3, #128 + strh r3, [r4, #1122] @ movhi + strh r6, [r4, #3272] @ movhi + str r6, [r4, #3276] + str r6, [r4, #1116] + str r6, [r4, #508] + str r6, [r4, #512] + str r6, [r4, #496] + str r6, [r4, #484] + str r6, [r4, #480] + str r6, [r4, #488] + str r6, [r4, #492] + str r6, [r4, #476] + str r6, [r4, #516] + str r6, [r4, #520] + str r6, [r4, #240] + str r6, [r4, #528] + str r6, [r4, #532] + str r6, [r4, #3280] + str r6, [r4, #1132] + str r6, [r4, #3288] + str r6, [r4, #1124] + str r6, [r4, #3292] + strh r6, [r4, #1128] @ movhi + strh r6, [r4, #1182] @ movhi + strh r6, [r4, #3296] @ movhi + strh r6, [r4, #1218] @ movhi + ldrh r1, [r5, #2396] + bl __aeabi_idiv + ldrh r3, [r5, #2324] + str r0, [r4, #3300] + str r6, [r5, #2444] + lsls r3, r3, #2 + cmp r0, r3 + ldrh r0, [r5, #2394] + it hi + strhi r3, [r4, #3300] + lsls r0, r0, #1 + bl ftl_malloc + str r0, [r4, #1160] + ldrh r0, [r5, #2394] + muls r0, r7, r0 + bl ftl_malloc + ldrh r6, [r5, #2324] + str r0, [r4, #1168] + mul r6, r8, r6 + lsl r9, r6, #3 + mov r0, r9 + bl ftl_malloc + str r0, [r4, #3304] + mov r0, r6 + bl ftl_malloc + str r0, [r4, #3308] + mov r0, r9 + bl ftl_malloc + str r0, [r4, #3312] + mov r0, r6 + bl ftl_malloc + str r0, [r4, #232] + mov r0, r6 + bl ftl_malloc + str r0, [r4, #1152] + ldr r0, [r4, #3300] + mul r0, r8, r0 + bl ftl_malloc + ldrh r3, [r5, #2324] + ldrh r6, [r5, #2400] + str r0, [r5, #2448] + lsls r3, r3, #1 + mov r0, r6 + adds r3, r3, #1 + str r3, [r4, #1156] + bl ftl_malloc + str r0, [r4, #3316] + mov r0, r6 + bl ftl_malloc + str r0, [r4, #3320] + mov r0, r6 + bl ftl_malloc + str r0, [r4, #3324] + ldr r0, [r4, #1156] + muls r0, r6, r0 + bl ftl_malloc + str r0, [r4, #1144] + ldr r0, [r4, #3300] + muls r0, r6, r0 + bl ftl_malloc + str r0, [r4, #3328] + mov r0, r6 + bl ftl_malloc + str r0, [r4, #3332] + mov r0, r6 + bl ftl_malloc + str r0, [r4, #3336] + ldr r0, [r4, #1156] + muls r0, r7, r0 + bl ftl_malloc + ldrh r3, [r5, #2402] + ldrh r6, [r5, #2324] + str r0, [r4, #1140] + muls r6, r3, r6 + mov r0, r6 + bl ftl_malloc + str r0, [r4, #3340] + lsls r0, r6, #3 + bl ftl_malloc + ldrh r3, [r5, #2402] + str r0, [r4, #3344] + ldr r0, [r4, #1156] + muls r0, r3, r0 + bl ftl_malloc + ldrh r3, [r5, #2402] + str r0, [r4, #1148] + ldr r0, [r4, #3300] + muls r0, r3, r0 + bl ftl_malloc + str r0, [r4, #3348] + ldrh r0, [r5, #2334] + lsls r0, r0, #1 + uxth r0, r0 + strh r0, [r4, #3352] @ movhi + bl ftl_malloc + ldrh r3, [r4, #3352] + str r0, [r4, #3356] + ldr r0, .L1034+8 + addw r3, r3, #547 + lsrs r3, r3, #9 + and r0, r0, r3, lsl #9 + strh r3, [r4, #3352] @ movhi + bl ftl_malloc + ldrh r6, [r5, #2334] + str r0, [r4, #3360] + adds r0, r0, #32 + str r0, [r4, #236] + lsls r6, r6, #1 + mov r0, r6 + bl ftl_malloc + str r0, [r4, #3364] + mov r0, r6 + bl ftl_malloc + ldr r6, [r5, #2420] + str r0, [r4, #300] + lsls r6, r6, #1 + mov r0, r6 + bl ftl_malloc + str r0, [r4, #3368] + mov r0, r6 + bl ftl_malloc + str r0, [r4, #3372] + ldrh r0, [r5, #2334] + lsrs r0, r0, #3 + adds r0, r0, #4 + bl ftl_malloc + str r0, [r5, #32] + ldrh r0, [r5, #2412] + lsls r0, r0, #1 + bl ftl_malloc + str r0, [r5, #2440] + ldrh r0, [r5, #2412] + lsls r0, r0, #1 + bl ftl_malloc + str r0, [r4, #3376] + ldrh r0, [r5, #2412] + lsls r0, r0, #2 + bl ftl_malloc + str r0, [r4, #3380] + ldrh r0, [r5, #2414] + lsls r0, r0, #2 + bl ftl_malloc + ldrh r2, [r5, #2414] + movs r1, #0 + str r0, [r4, #3384] + lsls r2, r2, #2 + bl ftl_memset + ldrh r6, [r5, #2428] + lsls r6, r6, #2 + mov r0, r6 + bl ftl_malloc + str r0, [r4, #3388] + mov r0, r6 + bl ftl_malloc + str r0, [r4, #3392] + ldr r0, [r5, #2420] + ldr r6, .L1034+12 + lsls r0, r0, #2 + bl ftl_malloc + str r0, [r4, #3396] + ldrh r0, [r5, #2430] + muls r0, r7, r0 + bl ftl_malloc + ldrh r3, [r5, #2430] + str r0, [r4, #464] + ldrh r0, [r5, #2400] + muls r0, r3, r0 + bl ftl_malloc + ldrh r3, [r5, #2334] + str r0, [r4, #3400] + movs r0, #6 + muls r0, r3, r0 + bl ftl_malloc + str r0, [r4, #292] + ldrh r0, [r5, #2388] + ldrh r3, [r5, #2346] + adds r0, r0, #31 + asrs r0, r0, #5 + strh r0, [r4, #3404] @ movhi + muls r0, r3, r0 + lsls r0, r0, #2 + bl ftl_malloc + ldrh r2, [r4, #3404] + movs r3, #1 + ldrh r7, [r5, #2346] + str r0, [r5, #2484] + lsls r2, r2, #2 + mov r1, r2 +.L934: + cmp r3, r7 + bcc .L935 + ldr r2, .L1034+16 + movs r1, #0 + add r3, r2, r3, lsl #2 + adds r2, r2, #56 + adds r3, r3, #24 +.L936: + cmp r2, r3 + bne .L937 + ldr r3, [r4, #3368] + cbnz r3, .L938 +.L940: + ldr r1, .L1034+20 + ldr r0, .L1034+24 + bl printk + mov r0, #-1 + pop {r3, r4, r5, r6, r7, r8, r9, pc} +.L935: + ldr r0, [r5, #2484] + adds r3, r3, #1 + add r0, r0, r1 + add r1, r1, r2 + str r0, [r6, #4]! + b .L934 +.L937: + str r1, [r3, #4]! + b .L936 +.L1035: + .align 2 +.L1034: + .word .LANCHOR2 + .word .LANCHOR0 + .word 33553920 + .word .LANCHOR0+2484 + .word .LANCHOR0+2456 + .word .LANCHOR3 + .word .LC81 +.L938: + ldr r3, [r4, #3372] + cmp r3, #0 + beq .L940 + ldr r3, [r4, #3388] + cmp r3, #0 + beq .L940 + ldr r3, [r4, #3396] + cmp r3, #0 + beq .L940 + ldr r3, [r4, #464] + cmp r3, #0 + beq .L940 + ldr r3, [r4, #3400] + cmp r3, #0 + beq .L940 + ldr r3, [r4, #292] + cmp r3, #0 + beq .L940 + ldr r3, [r5, #2484] + cmp r3, #0 + beq .L940 + ldr r3, [r4, #300] + cmp r3, #0 + beq .L940 + ldr r3, [r4, #1160] + cmp r3, #0 + beq .L940 + ldr r3, [r4, #1168] + cmp r3, #0 + beq .L940 + ldr r3, [r4, #3304] + cmp r3, #0 + beq .L940 + ldr r3, [r4, #3312] + cmp r3, #0 + beq .L940 + ldr r3, [r4, #232] + cmp r3, #0 + beq .L940 + ldr r3, [r4, #1152] + cmp r3, #0 + beq .L940 + ldr r3, [r4, #3308] + cmp r3, #0 + beq .L940 + ldr r3, [r4, #3316] + cmp r3, #0 + beq .L940 + ldr r3, [r4, #3320] + cmp r3, #0 + beq .L940 + ldr r3, [r4, #3324] + cmp r3, #0 + beq .L940 + ldr r3, [r4, #1144] + cmp r3, #0 + beq .L940 + ldr r3, [r4, #3332] + cmp r3, #0 + beq .L940 + ldr r3, [r4, #3336] + cmp r3, #0 + beq .L940 + ldr r3, [r4, #1140] + cmp r3, #0 + beq .L940 + ldr r3, [r4, #3340] + cmp r3, #0 + beq .L940 + ldr r3, [r4, #3344] + cmp r3, #0 + beq .L940 + ldr r3, [r4, #1148] + cmp r3, #0 + beq .L940 + ldr r3, [r4, #236] + cmp r3, #0 + beq .L940 + ldr r3, [r4, #3356] + cmp r3, #0 + beq .L940 + ldr r3, .L1036 + ldr r3, [r3, #2440] + cmp r3, #0 + beq .L940 + ldr r3, .L1036+4 + ldr r2, [r3, #3376] + cmp r2, #0 + beq .L940 + ldr r2, [r3, #3380] + cmp r2, #0 + beq .L940 + ldr r3, [r3, #3384] + cmp r3, #0 + beq .L940 + movs r0, #0 + pop {r3, r4, r5, r6, r7, r8, r9, pc} +.L1037: + .align 2 +.L1036: + .word .LANCHOR0 + .word .LANCHOR2 + .fnend + .size FtlMemInit, .-FtlMemInit + .align 1 + .global FtlBbt2Bitmap + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FtlBbt2Bitmap, %function +FtlBbt2Bitmap: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r3, r4, r5, r6, r7, lr} + .save {r3, r4, r5, r6, r7, lr} + mov r5, r1 + ldr r3, .L1043 + mov r4, r0 + movs r1, #0 + mov r0, r5 + movs r7, #1 + ldrh r2, [r3, #3404] + lsls r2, r2, #2 + bl ftl_memset + ldr r0, .L1043+4 + subs r2, r4, #2 + movw ip, #65535 + addw r4, r4, #1022 +.L1040: + ldrh r3, [r2, #2]! + cmp r3, ip + beq .L1038 + lsrs r6, r3, #5 + and r3, r3, #31 + lsl r3, r7, r3 + cmp r2, r4 + ldr r1, [r5, r6, lsl #2] + orr r3, r3, r1 + str r3, [r5, r6, lsl #2] + ldrh r3, [r0, #2462] + add r3, r3, #1 + strh r3, [r0, #2462] @ movhi + bne .L1040 +.L1038: + pop {r3, r4, r5, r6, r7, pc} +.L1044: + .align 2 +.L1043: + .word .LANCHOR2 + .word .LANCHOR0 + .fnend + .size FtlBbt2Bitmap, .-FtlBbt2Bitmap + .align 1 + .global FtlBbtMemInit + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FtlBbtMemInit, %function +FtlBbtMemInit: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r0, .L1046 + movw r3, #65535 + movs r2, #16 + movs r1, #255 + strh r3, [r0, #2456] @ movhi + movs r3, #0 + strh r3, [r0, #2462] @ movhi + addw r0, r0, #2468 + b ftl_memset +.L1047: + .align 2 +.L1046: + .word .LANCHOR0 + .fnend + .size FtlBbtMemInit, .-FtlBbtMemInit + .align 1 + .global FtlFreeSysBlkQueueInit + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FtlFreeSysBlkQueueInit, %function +FtlFreeSysBlkQueueInit: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L1049 + mov r2, #2048 + push {r4, lr} + .save {r4, lr} + movs r4, #0 + mov r1, r4 + strh r0, [r3, #2516] @ movhi + addw r0, r3, #2524 + strh r4, [r3, #2518] @ movhi + strh r4, [r3, #2520] @ movhi + strh r4, [r3, #2522] @ movhi + bl ftl_memset + mov r0, r4 + pop {r4, pc} +.L1050: + .align 2 +.L1049: + .word .LANCHOR0 + .fnend + .size FtlFreeSysBlkQueueInit, .-FtlFreeSysBlkQueueInit + .align 1 + .global ftl_free_no_use_map_blk + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type ftl_free_no_use_map_blk, %function +ftl_free_no_use_map_blk: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr} + movs r1, #0 + ldrh r2, [r0, #10] + mov r4, r0 + ldr r5, [r0, #20] + ldr r7, [r0, #12] + ldr r6, [r0, #24] + lsls r2, r2, #1 + mov r0, r5 + bl ftl_memset + movs r3, #0 +.L1052: + ldrh r1, [r4, #6] + uxth r2, r3 + cmp r1, r2 + bhi .L1056 + ldr r3, .L1071 + movs r6, #0 + mov r9, r6 + mov fp, r6 + ldrh r2, [r3, #2392] + ldrh r3, [r4] + strh r2, [r5, r3, lsl #1] @ movhi + ldrh r10, [r5] +.L1057: + ldrh r3, [r4, #10] + uxth r1, r6 + cmp r3, r1 + bhi .L1061 + mov r0, r9 + pop {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L1056: + uxth r2, r3 + ldr r1, [r6, r2, lsl #2] + movs r2, #0 + ubfx r1, r1, #10, #16 +.L1053: + ldrh ip, [r4, #10] + uxth r0, r2 + cmp ip, r0 + bhi .L1055 + adds r3, r3, #1 + b .L1052 +.L1055: + uxth r0, r2 + ldrh ip, [r7, r0, lsl #1] + cmp ip, r1 + bne .L1054 + cbz r1, .L1054 + ldrh ip, [r5, r0, lsl #1] + add ip, ip, #1 + strh ip, [r5, r0, lsl #1] @ movhi +.L1054: + adds r2, r2, #1 + b .L1053 +.L1061: + uxth r2, r6 + ldrh r3, [r5, r2, lsl #1] + lsl r8, r2, #1 + cmp r10, r3 + bls .L1058 + ldrh r0, [r7, r2, lsl #1] + add r8, r8, r7 + cbnz r0, .L1059 +.L1060: + adds r6, r6, #1 + b .L1057 +.L1058: + cmp r3, #0 + bne .L1060 + ldrh r0, [r7, r2, lsl #1] + add r8, r8, r7 + cmp r0, #0 + beq .L1060 +.L1062: + movs r1, #1 + bl FtlFreeSysBlkQueueIn + strh fp, [r8] @ movhi + ldrh r3, [r4, #8] + subs r3, r3, #1 + strh r3, [r4, #8] @ movhi + b .L1060 +.L1059: + mov r9, r1 + mov r10, r3 + cmp r3, #0 + beq .L1062 + b .L1060 +.L1072: + .align 2 +.L1071: + .word .LANCHOR0 + .fnend + .size ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk + .align 1 + .global FtlL2PDataInit + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FtlL2PDataInit, %function +FtlL2PDataInit: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r3, r4, r5, r6, r7, lr} + .save {r3, r4, r5, r6, r7, lr} + movs r1, #0 + ldr r4, .L1076 + movs r7, #12 + ldr r5, .L1076+4 + ldr r2, [r4, #2420] + ldr r0, [r5, #3372] + lsls r2, r2, #1 + bl ftl_memset + ldrh r3, [r4, #2400] + movs r1, #255 + ldrh r2, [r4, #2430] + ldr r0, [r5, #3400] + muls r2, r3, r2 + bl ftl_memset + movs r2, #0 + mov r3, r5 + movw r1, #65535 + mov ip, r2 +.L1074: + ldrh r5, [r4, #2430] + uxth r0, r2 + adds r6, r2, #1 + cmp r5, r0 + bhi .L1075 + ldr r2, [r4, #2420] + strh r1, [r3, #3410] @ movhi + strh r1, [r3, #3408] @ movhi + strh r2, [r3, #3418] @ movhi + movw r2, #61634 + strh r2, [r3, #3412] @ movhi + ldrh r2, [r3, #3452] + strh r2, [r3, #3416] @ movhi + ldrh r2, [r4, #2428] + strh r2, [r3, #3414] @ movhi + ldr r2, [r3, #3368] + str r2, [r3, #3420] + ldr r2, [r3, #3396] + str r2, [r3, #3424] + ldr r2, [r3, #3372] + str r2, [r3, #3428] + ldr r2, [r3, #3388] + str r2, [r3, #3432] + pop {r3, r4, r5, r6, r7, pc} +.L1075: + uxth r2, r2 + ldr r0, [r3, #464] + mul r5, r7, r2 + add lr, r0, r5 + str ip, [lr, #4] + strh r1, [r0, r5] @ movhi + ldr r0, [r3, #464] + add r0, r0, r5 + ldrh r5, [r4, #2400] + muls r2, r5, r2 + ldr r5, [r3, #3400] + bic r2, r2, #3 + add r2, r2, r5 + str r2, [r0, #8] + mov r2, r6 + b .L1074 +.L1077: + .align 2 +.L1076: + .word .LANCHOR0 + .word .LANCHOR2 + .fnend + .size FtlL2PDataInit, .-FtlL2PDataInit + .align 1 + .global FtlVariablesInit + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FtlVariablesInit, %function +FtlVariablesInit: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + movw r3, #65535 + ldr r6, .L1079 + movs r4, #0 + mov r1, r4 + ldr r5, .L1079+4 + ldrh r2, [r6, #2412] + ldr r0, [r6, #2440] + strh r3, [r5, #3460] @ movhi + mov r3, #-1 + str r3, [r5, #3472] + lsls r2, r2, #1 + str r4, [r5, #3456] + str r4, [r5, #3464] + str r4, [r5, #3468] + str r4, [r6, #2248] + strh r4, [r6, #2438] @ movhi + bl ftl_memset + ldrh r2, [r6, #2334] + mov r1, r4 + ldr r0, [r5, #236] + lsls r2, r2, #1 + bl ftl_memset + ldrh r2, [r6, #2334] + mov r1, r4 + ldr r0, [r5, #3356] + lsls r2, r2, #1 + bl ftl_memset + mov r1, r4 + movs r2, #48 + add r0, r5, #244 + bl ftl_memset + mov r2, #512 + mov r1, r4 + add r0, r5, #604 + bl ftl_memset + bl FtlGcBufInit + bl FtlL2PDataInit + mov r0, r4 + pop {r4, r5, r6, pc} +.L1080: + .align 2 +.L1079: + .word .LANCHOR0 + .word .LANCHOR2 + .fnend + .size FtlVariablesInit, .-FtlVariablesInit + .align 1 + .global SupperBlkListInit + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type SupperBlkListInit, %function +SupperBlkListInit: + .fnstart + @ args = 0, pretend = 0, frame = 16 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + movs r5, #0 + ldr r6, .L1091 + movs r2, #6 + mov r9, r5 + mov r10, r5 + ldr r4, .L1091+4 + movw fp, #65535 + ldrh r3, [r6, #2334] + mov r8, r6 + .pad #20 + sub sp, sp, #20 + movs r1, #0 + ldr r0, [r4, #292] + muls r2, r3, r2 + bl ftl_memset + str r5, [r4, #312] + str r5, [r4, #296] + str r5, [r4, #304] + strh r5, [r4, #308] @ movhi + strh r5, [r4, #316] @ movhi + strh r5, [r4, #3272] @ movhi +.L1082: + ldrh r3, [r8, #2332] + sxth r7, r5 + cmp r7, r3 + bge .L1089 + ldrh r3, [r8, #2390] + uxth r1, r5 + ldrh r2, [r8, #2324] + str r1, [sp, #4] + str r3, [sp] + movs r3, #0 + mov r6, r3 + b .L1090 +.L1084: + add r0, r8, r1 + ldr r1, [sp, #4] + ldrb r0, [r0, #2350] @ zero_extendqisi2 + str r3, [sp, #12] + str r2, [sp, #8] + bl V2P_block + bl FtlBbmIsBadBlock + ldr r2, [sp, #8] + ldr r3, [sp, #12] + cbnz r0, .L1083 + ldr r1, [sp] + add r6, r6, r1 + sxth r6, r6 +.L1083: + adds r3, r3, #1 +.L1090: + sxth r1, r3 + cmp r1, r2 + blt .L1084 + lsls r2, r7, #1 + cbz r6, .L1085 + mov r1, r6 + str r2, [sp] + mov r0, #32768 + bl __aeabi_idiv + ldr r2, [sp] + sxth r6, r0 +.L1086: + ldr r3, [r4, #292] + add r2, r2, r7 + add r3, r3, r2, lsl #1 + strh r6, [r3, #4] @ movhi + ldrh r3, [r4, #320] + cmp r7, r3 + beq .L1087 + ldrh r3, [r4, #368] + cmp r7, r3 + beq .L1087 + ldrh r3, [r4, #416] + cmp r7, r3 + beq .L1087 + ldr r3, [r4, #300] + uxth r0, r5 + ldrh r3, [r3, r7, lsl #1] + cbnz r3, .L1088 + add r9, r9, #1 + uxth r9, r9 + bl INSERT_FREE_LIST +.L1087: + adds r5, r5, #1 + b .L1082 +.L1085: + ldr r3, [r4, #300] + strh fp, [r3, r7, lsl #1] @ movhi + b .L1086 +.L1088: + add r10, r10, #1 + uxth r10, r10 + bl INSERT_DATA_LIST + b .L1087 +.L1089: + movs r0, #0 + strh r10, [r4, #308] @ movhi + strh r9, [r4, #316] @ movhi + add sp, sp, #20 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L1092: + .align 2 +.L1091: + .word .LANCHOR0 + .word .LANCHOR2 + .fnend + .size SupperBlkListInit, .-SupperBlkListInit + .align 1 + .global FtlGcPageVarInit + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FtlGcPageVarInit, %function +FtlGcPageVarInit: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r3, r4, r5, lr} + .save {r3, r4, r5, lr} + movs r1, #255 + ldr r5, .L1094 + movs r3, #0 + ldr r4, .L1094+4 + ldrh r2, [r5, #2394] + ldr r0, [r4, #1160] + strh r3, [r4, #1164] @ movhi + lsls r2, r2, #1 + strh r3, [r4, #1172] @ movhi + bl ftl_memset + ldrh r3, [r5, #2394] + movs r2, #12 + ldr r0, [r4, #1168] + movs r1, #255 + muls r2, r3, r2 + bl ftl_memset + pop {r3, r4, r5, lr} + b FtlGcBufInit +.L1095: + .align 2 +.L1094: + .word .LANCHOR0 + .word .LANCHOR2 + .fnend + .size FtlGcPageVarInit, .-FtlGcPageVarInit + .align 1 + .global ftl_memcpy + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type ftl_memcpy, %function +ftl_memcpy: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + b memcpy + .fnend + .size ftl_memcpy, .-ftl_memcpy + .align 1 + .global FlashReadIdbData + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FlashReadIdbData, %function +FlashReadIdbData: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r3, lr} + .save {r3, lr} + mov r2, #2048 + ldr r1, .L1098 + bl ftl_memcpy + movs r0, #0 + pop {r3, pc} +.L1099: + .align 2 +.L1098: + .word .LANCHOR2+3476 + .fnend + .size FlashReadIdbData, .-FlashReadIdbData + .align 1 + .global FlashLoadPhyInfoInRam + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FlashLoadPhyInfoInRam, %function +FlashLoadPhyInfoInRam: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + movs r4, #0 + ldr r6, .L1108 + ldr r8, .L1108+16 +.L1103: + ldrb r2, [r6, #-1] @ zero_extendqisi2 + mov r1, r8 + mov r0, r6 + lsls r7, r4, #5 + bl FlashMemCmp8 + mov r5, r0 + cbnz r0, .L1101 + ldr r4, .L1108+4 + mov r1, r0 + add r6, r4, #504 + addw r3, r4, #3256 + add r6, r6, r7 + add r7, r7, r4 + ldrb r2, [r7, #526] @ zero_extendqisi2 + mov r0, r3 +.L1102: + lsls r7, r1, #5 + ldrb r7, [r7, r3] @ zero_extendqisi2 + cmp r7, r2 + beq .L1105 + adds r1, r1, #1 + cmp r1, #4 + bne .L1102 +.L1105: + add r1, r0, r1, lsl #5 + movs r2, #32 + ldr r0, .L1108+8 + bl ftl_memcpy + movs r2, #32 + mov r1, r6 + ldr r0, .L1108+12 + bl ftl_memcpy + ldrh r0, [r4, #478] + bl FlashBlockAlignInit + b .L1100 +.L1101: + adds r4, r4, #1 + adds r6, r6, #32 + cmp r4, #86 + bne .L1103 + mov r5, #-1 +.L1100: + mov r0, r5 + pop {r4, r5, r6, r7, r8, pc} +.L1109: + .align 2 +.L1108: + .word .LANCHOR1+505 + .word .LANCHOR1 + .word .LANCHOR0+52 + .word .LANCHOR1+468 + .word .LANCHOR0+2072 + .fnend + .size FlashLoadPhyInfoInRam, .-FlashLoadPhyInfoInRam + .align 1 + .global NandcCopy1KB + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type NandcCopy1KB, %function +NandcCopy1KB: + .fnstart + @ args = 4, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + cmp r1, #1 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + mov r4, r2 + add r2, r0, #4096 + add r5, r0, #512 + add r0, r2, r4, lsl #9 + ldr r6, [sp, #16] + bne .L1111 + cbz r3, .L1112 + mov r2, #1024 + mov r1, r3 + bl ftl_memcpy +.L1112: + cbz r6, .L1110 + lsrs r4, r4, #1 + ldr r3, [r6] @ unaligned + add r4, r4, r4, lsl #1 + lsls r4, r4, #2 + str r3, [r5, r4, lsl #2] + pop {r4, r5, r6, pc} +.L1111: + cbz r3, .L1115 + mov r1, r0 + mov r2, #1024 + mov r0, r3 + bl ftl_memcpy +.L1115: + cbz r6, .L1110 + lsrs r4, r4, #1 + add r4, r4, r4, lsl #1 + lsls r4, r4, #2 + ldr r3, [r5, r4, lsl #2] + strb r3, [r6] + lsrs r2, r3, #8 + strb r2, [r6, #1] + lsrs r2, r3, #16 + lsrs r3, r3, #24 + strb r2, [r6, #2] + strb r3, [r6, #3] +.L1110: + pop {r4, r5, r6, pc} + .fnend + .size NandcCopy1KB, .-NandcCopy1KB + .align 1 + .global ftl_memcpy32 + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type ftl_memcpy32, %function +ftl_memcpy32: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + movs r3, #0 + push {r4, lr} + .save {r4, lr} +.L1127: + cmp r3, r2 + bne .L1128 + pop {r4, pc} +.L1128: + ldr r4, [r1, r3, lsl #2] + str r4, [r0, r3, lsl #2] + adds r3, r3, #1 + b .L1127 + .fnend + .size ftl_memcpy32, .-ftl_memcpy32 + .align 1 + .global ftl_memcmp + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type ftl_memcmp, %function +ftl_memcmp: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + b memcmp + .fnend + .size ftl_memcmp, .-ftl_memcmp + .align 1 + .global timer_get_time + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type timer_get_time, %function +timer_get_time: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L1131 + ldr r0, [r3] + b jiffies_to_msecs +.L1132: + .align 2 +.L1131: + .word jiffies + .fnend + .size timer_get_time, .-timer_get_time + .align 1 + .global FlashSramLoadStore + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FlashSramLoadStore, %function +FlashSramLoadStore: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + push {r4, r5} + .save {r4, r5} + ldr r4, .L1136 + ldr r4, [r4, #1180] + add r4, r4, #4096 + add r4, r4, r1 + cbnz r2, .L1134 + mov r2, r3 + mov r1, r4 +.L1135: + pop {r4, r5} + b ftl_memcpy +.L1134: + mov r1, r0 + mov r2, r3 + mov r0, r4 + b .L1135 +.L1137: + .align 2 +.L1136: + .word .LANCHOR4 + .fnend + .size FlashSramLoadStore, .-FlashSramLoadStore + .align 1 + .global FlashCs123Init + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FlashCs123Init, %function +FlashCs123Init: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + bx lr + .fnend + .size FlashCs123Init, .-FlashCs123Init + .align 1 + .global ftl_dma32_malloc + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type ftl_dma32_malloc, %function +ftl_dma32_malloc: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + cmp r0, #8192 + push {r3, r4, r5, lr} + .save {r3, r4, r5, lr} + mov r4, r0 + ble .L1140 + pop {r3, r4, r5, lr} + b ftl_malloc +.L1140: + ldr r5, .L1142 + adds r4, r4, #63 + bic r4, r4, #63 + ldr r3, [r5, #1184] + cmp r4, r3 + ble .L1141 + mov r0, #16384 + bl ftl_malloc + mov r3, #16384 + str r0, [r5, #1188] + str r3, [r5, #1184] +.L1141: + ldr r3, [r5, #1184] + ldr r0, [r5, #1188] + subs r3, r3, r4 + add r4, r4, r0 + str r3, [r5, #1184] + str r4, [r5, #1188] + pop {r3, r4, r5, pc} +.L1143: + .align 2 +.L1142: + .word .LANCHOR4 + .fnend + .size ftl_dma32_malloc, .-ftl_dma32_malloc + .align 1 + .global rk_nand_suspend + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type rk_nand_suspend, %function +rk_nand_suspend: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + b ftl_flash_suspend + .fnend + .size rk_nand_suspend, .-rk_nand_suspend + .align 1 + .global rk_nand_resume + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type rk_nand_resume, %function +rk_nand_resume: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + b ftl_flash_resume + .fnend + .size rk_nand_resume, .-rk_nand_resume + .align 1 + .global rk_ftl_get_capacity + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type rk_ftl_get_capacity, %function +rk_ftl_get_capacity: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L1147 + ldr r0, [r3, #2432] + bx lr +.L1148: + .align 2 +.L1147: + .word .LANCHOR0 + .fnend + .size rk_ftl_get_capacity, .-rk_ftl_get_capacity + .align 1 + .global rk_nandc_get_irq_status + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type rk_nandc_get_irq_status, %function +rk_nandc_get_irq_status: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r0, [r0, #372] + bx lr + .fnend + .size rk_nandc_get_irq_status, .-rk_nandc_get_irq_status + .align 1 + .global rknand_proc_ftlread + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type rknand_proc_ftlread, %function +rknand_proc_ftlread: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + b ftl_proc_ftl_read + .fnend + .size rknand_proc_ftlread, .-rknand_proc_ftlread + .align 1 + .global ReadFlashInfo + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type ReadFlashInfo, %function +ReadFlashInfo: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + b ftl_read_flash_info + .fnend + .size ReadFlashInfo, .-ReadFlashInfo + .align 1 + .global rknand_print_hex + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type rknand_print_hex, %function +rknand_print_hex: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr} + movs r5, #0 + ldr r7, .L1161 + mov r10, r0 + mov r6, r1 + mov r8, r2 + ldr fp, .L1161+4 + mov r9, r3 + mov r4, r5 +.L1153: + cmp r4, r9 + bne .L1159 + ldr r1, .L1161+4 + ldr r0, .L1161+8 + pop {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr} + b printk +.L1159: + cbnz r5, .L1154 + mov r3, r4 + mov r2, r6 + mov r1, r10 + ldr r0, .L1161+12 + bl printk +.L1154: + cmp r8, #4 + bne .L1155 + ldr r1, [r6, r4, lsl #2] +.L1160: + mov r0, r7 + adds r5, r5, #1 + bl printk + cmp r5, #15 + bls .L1158 + movs r5, #0 + mov r1, fp + ldr r0, .L1161+8 + bl printk +.L1158: + adds r4, r4, #1 + b .L1153 +.L1155: + cmp r8, #2 + ite eq + ldrsheq r1, [r6, r4, lsl #1] + ldrbne r1, [r6, r4] @ zero_extendqisi2 + b .L1160 +.L1162: + .align 2 +.L1161: + .word .LC83 + .word .LC84 + .word .LC77 + .word .LC82 + .fnend + .size rknand_print_hex, .-rknand_print_hex + .align 1 + .global HynixGetReadRetryDefault + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type HynixGetReadRetryDefault, %function +HynixGetReadRetryDefault: + .fnstart + @ args = 0, pretend = 0, frame = 56 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + movs r3, #172 + ldr r7, .L1279 + cmp r0, #2 + mov r1, #173 + mov r2, #174 + .pad #60 + sub sp, sp, #60 + mov r4, r0 + strb r3, [r7, #1220] + mov r3, #175 + strb r0, [r7, #1216] + strb r1, [r7, #1221] + strb r2, [r7, #1222] + strb r3, [r7, #1223] + bne .L1164 + movs r3, #167 + movs r5, #7 + strb r3, [r7, #1220] + movs r2, #247 + ldr r3, .L1279+4 + strb r2, [r3, #3401] +.L1229: + movs r6, #4 + b .L1165 +.L1164: + cmp r0, #3 + bne .L1166 + movs r3, #176 + strb r3, [r7, #1220] + movs r3, #177 + strb r3, [r7, #1221] + movs r3, #178 + strb r3, [r7, #1222] + movs r3, #179 + strb r3, [r7, #1223] + movs r3, #180 + strb r3, [r7, #1224] + movs r3, #181 + strb r3, [r7, #1225] + movs r3, #182 + strb r3, [r7, #1226] + movs r3, #183 +.L1274: + movs r5, #8 + strb r3, [r7, #1227] + mov r6, r5 +.L1165: + subs r3, r4, #1 + cmp r3, #1 + bhi .L1171 + ldr fp, .L1279+12 + mov r10, #0 + ldr r2, .L1279+8 +.L1172: + ldrb r1, [r7, #2234] @ zero_extendqisi2 + uxtb r3, r10 + cmp r1, r3 + bhi .L1178 +.L1179: + ldr r3, .L1279 + strb r6, [r3, #1217] + strb r5, [r3, #1218] + add sp, sp, #60 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L1166: + cmp r0, #4 + bne .L1167 + movs r0, #204 + strb r1, [r7, #1225] + strb r0, [r7, #1220] + movs r0, #191 + strb r0, [r7, #1221] + movs r0, #170 + strb r0, [r7, #1222] + movs r0, #171 + strb r0, [r7, #1223] + movs r0, #205 + strb r0, [r7, #1224] + strb r2, [r7, #1226] + b .L1274 +.L1167: + cmp r0, #5 + bne .L1168 + movs r3, #56 + movs r5, #8 + strb r3, [r7, #1220] + movs r3, #57 + strb r3, [r7, #1221] + movs r3, #58 + strb r3, [r7, #1222] + movs r3, #59 + strb r3, [r7, #1223] + b .L1229 +.L1168: + cmp r0, #6 + bne .L1169 + movs r3, #14 + movs r5, #12 + strb r3, [r7, #1220] + movs r3, #15 + strb r3, [r7, #1221] + movs r3, #16 + strb r3, [r7, #1222] + movs r3, #17 + strb r3, [r7, #1223] + b .L1229 +.L1169: + cmp r0, #7 + bne .L1170 + movs r3, #176 + movs r5, #12 + strb r3, [r7, #1220] + movs r3, #177 + strb r3, [r7, #1221] + movs r3, #178 + strb r3, [r7, #1222] + movs r3, #179 + strb r3, [r7, #1223] + movs r3, #180 + strb r3, [r7, #1224] + movs r3, #181 + strb r3, [r7, #1225] + movs r3, #182 + strb r3, [r7, #1226] + movs r3, #183 + strb r3, [r7, #1227] + movs r3, #212 + strb r3, [r7, #1228] + movs r3, #213 + strb r3, [r7, #1229] + movs r6, #10 + b .L1165 +.L1170: + cmp r0, #8 + mov r5, #7 + bne .L1229 + movs r3, #6 + strb r5, [r7, #1221] + strb r3, [r7, #1220] + movs r3, #9 + strb r3, [r7, #1223] + movs r3, #10 + strb r0, [r7, #1222] + movs r5, #50 + strb r3, [r7, #1224] + movs r6, #5 + b .L1165 +.L1178: + add r3, r3, r7 + mov r8, #0 + ldrb r3, [r3, #2236] @ zero_extendqisi2 + ldr r1, [r7, r3, lsl #3] + add r4, fp, r3, lsl #6 + add r3, r7, r3, lsl #3 + ldrb r9, [r3, #4] @ zero_extendqisi2 + adds r4, r4, #20 + add r9, r1, r9, lsl #8 + movs r1, #55 + addw r3, r9, #2056 +.L1173: + add r0, fp, r8 + str r1, [r3] + ldrb r0, [r0, #4] @ zero_extendqisi2 + str r2, [sp, #8] + str r1, [sp, #4] + str r0, [r9, #2052] + movs r0, #80 + str r3, [sp] + bl ndelay + ldr r0, [r9, #2048] + ldr r3, [sp] + ldr r1, [sp, #4] + strb r0, [r4, r8] + add r8, r8, #1 + uxtb r0, r8 + ldr r2, [sp, #8] + cmp r6, r0 + bhi .L1173 + mov r0, r4 + movs r1, #0 +.L1176: + movs r3, #1 + add lr, r2, r1 +.L1175: + ldrb ip, [lr, r3, lsl #2] @ zero_extendqisi2 + ldrb r8, [r0] @ zero_extendqisi2 + add ip, ip, r8 + strb ip, [r0, r3, lsl #3] + adds r3, r3, #1 + cmp r3, #7 + bne .L1175 + adds r1, r1, #1 + adds r0, r0, #1 + cmp r1, #4 + bne .L1176 + movs r3, #0 + add r10, r10, #1 + strb r3, [r4, #16] + strb r3, [r4, #24] + strb r3, [r4, #32] + strb r3, [r4, #40] + strb r3, [r4, #48] + strb r3, [r4, #41] + strb r3, [r4, #49] + b .L1172 +.L1171: + subs r3, r4, #3 + cmp r3, #5 + bhi .L1179 + smulbb r3, r6, r5 + ldr r8, .L1279 + asrs r2, r3, #1 + lsls r3, r3, #4 + str r3, [sp, #48] + lsls r3, r2, #2 + str r2, [sp, #8] + str r3, [sp, #44] + lsls r3, r2, #1 + str r3, [sp, #28] + movs r3, #0 + str r3, [sp, #24] +.L1180: + ldrb r3, [sp, #24] @ zero_extendqisi2 + str r3, [sp, #12] + ldr r2, [sp, #12] + ldrb r3, [r8, #2234] @ zero_extendqisi2 + cmp r3, r2 + bls .L1179 + ldr r3, [sp, #12] + add r3, r8, r3 + ldrb r10, [r3, #2236] @ zero_extendqisi2 + ldr fp, [r8, r10, lsl #3] + mov r0, r10 + add r3, r8, r10, lsl #3 + ldrb r9, [r3, #4] @ zero_extendqisi2 + movs r3, #255 + add r7, fp, r9, lsl #8 + str r3, [r7, #2056] + bl NandcWaitFlashReady + cmp r4, #7 + bne .L1181 + ldr r3, .L1279+12 + movs r0, #160 + mla r0, r0, r10, r3 + add r3, r0, #28 +.L1275: + str r3, [sp, #16] + cmp r4, #4 + add r3, fp, r9, lsl #8 + mov r2, #54 + str r2, [r3, #2056] + bne .L1184 + movs r2, #255 + str r2, [r3, #2052] + movs r2, #64 + str r2, [r3, #2048] + movs r2, #204 +.L1276: + str r2, [r3, #2052] + movs r2, #77 + b .L1277 +.L1181: + cmp r4, #8 + beq .L1183 + ldr r0, .L1279+12 + add r0, r0, r10, lsl #6 + add r3, r0, #20 + b .L1275 +.L1280: + .align 2 +.L1279: + .word .LANCHOR0 + .word .LANCHOR1 + .word .LANCHOR1+3384 + .word .LANCHOR0+1216 +.L1184: + subs r2, r4, #5 + cmp r2, #1 + bhi .L1186 + ldrb r2, [r8, #1220] @ zero_extendqisi2 + str r2, [r3, #2052] + movs r2, #82 +.L1277: + str r2, [r3, #2048] +.L1185: + add r3, fp, r9, lsl #8 + movs r2, #22 + cmp r4, #6 + str r2, [r3, #2056] + mov r2, #23 + str r2, [r3, #2056] + mov r2, #4 + str r2, [r3, #2056] + mov r2, #25 + str r2, [r3, #2056] + mov r2, #0 + str r2, [r3, #2056] + str r2, [r3, #2052] + str r2, [r3, #2052] + it eq + moveq r2, #31 + str r2, [r3, #2052] + movs r2, #2 + str r2, [r3, #2052] + movs r2, #0 + str r2, [r3, #2052] +.L1228: + add r3, fp, r9, lsl #8 + movs r2, #48 + mov r0, r10 + str r2, [r3, #2056] + bl NandcWaitFlashReady + subs r3, r4, #5 + cmp r3, #1 + str r3, [sp, #32] + bls .L1231 + cmp r4, #8 + beq .L1231 + cmp r4, #7 + ite eq + moveq r2, #32 + movne r2, #2 +.L1189: + ldr r3, .L1281 + subs r2, r2, #1 + add r7, fp, r9, lsl #8 + ldr r3, [r3, #1192] + str r7, [sp, #4] + subs r1, r3, #1 + uxtab r2, r3, r2 + mov r0, r1 +.L1190: + ldr r7, [sp, #4] + ldr r7, [r7, #2048] + strb r7, [r0, #1]! + cmp r0, r2 + bne .L1190 + cmp r4, #8 + bne .L1191 + movs r2, #0 +.L1193: + ldrb r0, [r3, r2, lsl #2] @ zero_extendqisi2 + uxtb r1, r2 + cmp r0, #50 + beq .L1192 + add r0, r3, r2, lsl #2 + ldrb r0, [r0, #1] @ zero_extendqisi2 + cmp r0, #5 + beq .L1192 + adds r2, r2, #1 + cmp r2, #8 + bne .L1193 +.L1194: + movs r1, #0 + ldr r0, .L1281+4 + bl printk +.L1196: + b .L1196 +.L1186: + cmp r4, #7 + bne .L1185 + movs r2, #174 + str r2, [r3, #2052] + movs r2, #0 + str r2, [r3, #2048] + movs r2, #176 + b .L1276 +.L1231: + movs r2, #16 + b .L1189 +.L1192: + cmp r1, #6 + bhi .L1194 +.L1195: + ldr r3, .L1281 + ldr r3, [r3, #1192] + str r3, [sp] +.L1205: + ldr r2, [sp] + ldr r0, [sp, #48] + subs r1, r3, r2 + cmp r1, r0 + blt .L1206 + ldr r3, .L1281 + ldr r1, [r3, #1192] + ldr r3, [sp, #28] + adds r0, r1, r3 + movs r3, #8 +.L1208: + mov ip, r0 + movs r7, #0 +.L1207: + ldr r2, [sp, #8] + adds r7, r7, #1 + ldrh lr, [ip] + cmp r2, r7 + mvn lr, lr + strh lr, [ip], #2 @ movhi + bgt .L1207 + ldr r2, [sp, #44] + subs r3, r3, #1 + add r0, r0, r2 + bne .L1208 + str r3, [sp, #20] +.L1214: + movs r7, #0 + mov r0, r7 +.L1213: + movs r2, #1 + mov ip, r1 + lsls r2, r2, r0 + mov lr, #0 + str r2, [sp, #36] + movs r2, #16 + str r2, [sp, #40] +.L1211: + ldrh r2, [ip] + str r2, [sp, #52] + ldr r2, [sp, #36] + mov r3, r2 + ldr r2, [sp, #52] + bics r3, r3, r2 + ldr r2, [sp, #28] + it eq + addeq lr, lr, #1 + add ip, ip, r2 + ldr r2, [sp, #40] + subs r2, r2, #1 + str r2, [sp, #40] + bne .L1211 + cmp lr, #8 + add r0, r0, #1 + ittt hi + ldrhi r2, [sp, #36] + orrhi r7, r7, r2 + uxthhi r7, r7 + cmp r0, #16 + bne .L1213 + ldr r3, [sp, #20] + ldr r2, [sp, #8] + strh r7, [r1], #2 @ movhi + adds r3, r3, #1 + cmp r2, r3 + str r3, [sp, #20] + bgt .L1214 + ldr r3, .L1281 + ldr r1, [r3, #1192] + movs r3, #0 + subs r0, r1, #4 + add r7, r1, #28 +.L1217: + ldr ip, [r0, #4]! + cmp ip, #0 + bne .L1216 + adds r3, r3, #1 +.L1216: + cmp r7, r0 + bne .L1217 + cmp r3, #7 + ble .L1218 + ldr r0, .L1281+8 + mov r3, #1024 + movs r2, #1 + bl rknand_print_hex + movs r1, #0 + ldr r0, .L1281+4 + bl printk +.L1219: + b .L1219 +.L1191: + cmp r4, #7 + bne .L1197 + movs r2, #0 +.L1199: + ldrb r0, [r3, r2, lsl #2] @ zero_extendqisi2 + uxtb r1, r2 + cmp r0, #12 + beq .L1198 + add r0, r3, r2, lsl #2 + ldrb r0, [r0, #1] @ zero_extendqisi2 + cmp r0, #10 + beq .L1198 + adds r2, r2, #1 + cmp r2, #8 + bne .L1199 +.L1200: + movs r1, #0 + ldr r0, .L1281+4 + bl printk +.L1201: + b .L1201 +.L1198: + cmp r1, #6 + bls .L1195 + b .L1200 +.L1197: + cmp r4, #6 + bne .L1195 + adds r3, r3, #7 +.L1202: + ldrb r2, [r1, #1]! @ zero_extendqisi2 + cmp r2, #12 + beq .L1195 + ldrb r2, [r1, #8] @ zero_extendqisi2 + cmp r2, #4 + beq .L1195 + cmp r1, r3 + bne .L1202 + movs r1, #0 + ldr r0, .L1281+4 + bl printk +.L1204: + b .L1204 +.L1206: + ldr r1, [sp, #4] + ldr r1, [r1, #2048] + strb r1, [r3], #1 + b .L1205 +.L1218: + cmp r4, #6 + beq .L1233 + cmp r4, #7 + beq .L1234 + cmp r4, #8 + ite eq + moveq r7, #5 + movne r7, #8 +.L1220: + subs r3, r6, #1 + ldr r0, [sp, #16] + uxtb r3, r3 + mov ip, #0 + adds r3, r3, #1 + mov r2, r3 +.L1221: + ldr r1, [sp] + str r0, [sp, #16] +.L1222: + ldr r3, [sp, #16] + ldrb lr, [r1], #1 @ zero_extendqisi2 + strb lr, [r3], #1 + str r3, [sp, #16] + ldr r3, [sp] + sub lr, r1, r3 + uxtb lr, lr + cmp r6, lr + bhi .L1222 + ldr r1, [sp] + add ip, ip, #1 + cmp r5, ip + add r0, r0, r7 + add r1, r1, r2 + str r1, [sp] + bgt .L1221 + add r9, fp, r9, lsl #8 + movs r3, #255 + mov r0, r10 + str r3, [r9, #2056] + bl NandcWaitFlashReady + ldr r3, [sp, #32] + cmp r3, #1 + bhi .L1224 + movs r3, #54 + ldr r2, [sp, #4] + str r3, [r9, #2056] + mov r1, #-1 + ldrb r3, [r8, #1220] @ zero_extendqisi2 + ldr r0, [sp, #12] + str r3, [r2, #2052] + movs r3, #0 + str r3, [r2, #2048] + movs r3, #22 + str r3, [r9, #2056] + bl FlashReadCmd +.L1225: + mov r0, r10 + bl NandcWaitFlashReady + ldr r3, [sp, #24] + adds r3, r3, #1 + str r3, [sp, #24] + b .L1180 +.L1233: + movs r7, #4 + b .L1220 +.L1234: + movs r7, #10 + b .L1220 +.L1224: + cmp r4, #8 + ite eq + moveq r3, #190 + movne r3, #56 + str r3, [r9, #2056] + b .L1225 +.L1183: + movs r3, #120 + movs r2, #23 + str r3, [r7, #2056] + movs r3, #0 + str r3, [r7, #2052] + movs r1, #25 + str r3, [r7, #2052] + str r3, [r7, #2052] + str r2, [r7, #2056] + movs r2, #4 + str r2, [r7, #2056] + str r1, [r7, #2056] + movs r1, #218 + str r1, [r7, #2056] + movs r1, #21 + str r3, [r7, #2056] + str r3, [r7, #2052] + str r3, [r7, #2052] + str r1, [r7, #2052] + str r2, [r7, #2052] + str r3, [r7, #2052] + ldr r3, .L1281+12 + str r3, [sp, #16] + b .L1228 +.L1282: + .align 2 +.L1281: + .word .LANCHOR4 + .word .LC85 + .word .LC86 + .word .LANCHOR0+1244 + .fnend + .size HynixGetReadRetryDefault, .-HynixGetReadRetryDefault + .align 1 + .global FlashGetReadRetryDefault + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FlashGetReadRetryDefault, %function +FlashGetReadRetryDefault: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + mov r3, r0 + cmp r0, #0 + beq .L1283 + subs r2, r0, #1 + cmp r2, #7 + bhi .L1285 + b HynixGetReadRetryDefault +.L1285: + cmp r0, #49 + bne .L1286 + ldr r0, .L1306 + movs r2, #64 + ldr r1, .L1306+4 + strb r3, [r0, #1216] + movs r3, #4 + strb r3, [r0, #1217] + movs r3, #15 + strb r3, [r0, #1218] +.L1304: + addw r0, r0, #1220 + b ftl_memcpy +.L1286: + cmp r0, #33 + beq .L1287 + sub r2, r0, #65 + cmp r2, #1 + bhi .L1288 +.L1287: + ldr r0, .L1306 + strb r3, [r0, #1216] + movs r3, #4 +.L1305: + strb r3, [r0, #1217] + movs r3, #7 + strb r3, [r0, #1218] + movs r2, #45 + ldr r1, .L1306+8 + b .L1304 +.L1288: + cmp r0, #34 + beq .L1289 + cmp r0, #67 + bne .L1290 +.L1289: + ldr r0, .L1306 + strb r3, [r0, #1216] + movs r3, #5 + b .L1305 +.L1290: + cmp r0, #35 + beq .L1291 + cmp r0, #68 + bne .L1283 +.L1291: + ldr r0, .L1306 + movs r2, #95 + ldr r1, .L1306+12 + strb r3, [r0, #1216] + movs r3, #5 + strb r3, [r0, #1217] + movs r3, #17 + strb r3, [r0, #1218] + b .L1304 +.L1283: + bx lr +.L1307: + .align 2 +.L1306: + .word .LANCHOR0 + .word .LANCHOR1+404 + .word .LANCHOR1+256 + .word .LANCHOR1+301 + .fnend + .size FlashGetReadRetryDefault, .-FlashGetReadRetryDefault + .align 1 + .global NandcXferComp + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type NandcXferComp, %function +NandcXferComp: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + .pad #8 + ldr r5, .L1347 + ldr r3, [r5, #2264] + ldr r4, [r5, r0, lsl #3] + cmp r3, #3 + bls .L1339 + ldr r3, [r4, #16] + lsls r6, r3, #29 + bpl .L1339 + ldr r6, [r4, #16] + ldr r3, [r4, #8] + ubfx r6, r6, #1, #1 + str r3, [sp] + cmp r6, #0 + beq .L1310 + ldr r7, .L1347+4 + movs r6, #0 + ldr r8, .L1347+12 +.L1311: + ldr r2, [r4, #28] + ldr r3, [sp] + ubfx r2, r2, #16, #5 + ubfx r3, r3, #22, #6 + cmp r2, r3 + bge .L1319 + ldr r3, [r5, #2264] + cmp r3, #5 + bhi .L1312 +.L1315: + adds r6, r6, #1 + bics r3, r6, #-16777216 + bne .L1314 + ldr r2, [r4, #28] + mov r1, r6 + ldr r3, [sp] + mov r0, r7 + ubfx r2, r2, #16, #5 + ubfx r3, r3, #22, #6 + bl printk + mov r3, #512 + movs r2, #4 + mov r1, r4 + mov r0, r8 + bl rknand_print_hex +.L1314: + movs r1, #5 + movs r0, #1 + bl usleep_range + b .L1311 +.L1312: + ldr r3, [r4] + str r3, [sp, #4] + ldr r3, [sp, #4] + lsls r0, r3, #18 + bpl .L1315 + ldr r3, [sp, #4] + lsls r1, r3, #14 + bpl .L1315 +.L1319: + ldr r3, [r5, #2300] + cbz r3, .L1320 + ldr r1, [sp] + movs r2, #0 + ldr r0, [r5, #2292] + ubfx r1, r1, #22, #5 + lsls r1, r1, #10 + bl rknand_dma_unmap_single + ldr r1, [sp] + movs r2, #0 + ldr r0, [r5, #2296] + ubfx r1, r1, #22, #5 + lsls r1, r1, #7 + bl rknand_dma_unmap_single +.L1320: + movs r3, #0 + str r3, [r5, #2300] +.L1308: + add sp, sp, #8 + @ sp needed + pop {r4, r5, r6, r7, r8, pc} +.L1310: + ldr r7, .L1347+8 + ldr r8, .L1347+12 +.L1321: + ldr r3, [sp] + lsls r2, r3, #11 + bpl .L1323 + ldr r3, [r5, #2308] + cbz r3, .L1324 + mov r0, r4 + bl NandcSendDumpDataStart +.L1324: + ldr r3, [r5, #2300] + cbz r3, .L1325 + ldr r1, [sp] + movs r2, #1 + ldr r0, [r5, #2292] + ubfx r1, r1, #22, #5 + lsls r1, r1, #10 + bl rknand_dma_unmap_single + ldr r1, [sp] + movs r2, #1 + ldr r0, [r5, #2296] + ubfx r1, r1, #22, #5 + lsls r1, r1, #7 + bl rknand_dma_unmap_single +.L1325: + ldr r3, [r5, #2308] + cmp r3, #0 + beq .L1320 + mov r0, r4 + bl NandcSendDumpDataDone + b .L1320 +.L1323: + ldr r3, [r4, #8] + adds r6, r6, #1 + str r3, [sp] + bics r3, r6, #-16777216 + bne .L1322 + ldr r2, [sp] + mov r1, r6 + ldr r3, [r4, #28] + mov r0, r7 + ubfx r3, r3, #16, #5 + bl printk + mov r3, #512 + movs r2, #4 + mov r1, r4 + mov r0, r8 + bl rknand_print_hex +.L1322: + movs r1, #5 + movs r0, #1 + bl usleep_range + b .L1321 +.L1339: + ldr r3, [r4, #8] + str r3, [sp] + ldr r3, [sp] + lsls r3, r3, #11 + bpl .L1339 + b .L1308 +.L1348: + .align 2 +.L1347: + .word .LANCHOR0 + .word .LC87 + .word .LC89 + .word .LC88 + .fnend + .size NandcXferComp, .-NandcXferComp + .align 1 + .global NandcXferData + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type NandcXferData, %function +NandcXferData: + .fnstart + @ args = 4, pretend = 0, frame = 80 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r8, r3 + ldr r3, .L1385 + tst r8, #63 + .pad #92 + sub sp, sp, #92 + mov r7, r0 + mov r5, r1 + mov r10, r2 + ldr fp, [sp, #128] + mov r9, r3 + ldr r6, [r3, r0, lsl #3] + bne .L1350 + cmp fp, #0 + bne .L1351 + movs r2, #64 + movs r1, #255 + add r0, sp, #24 + bl ftl_memset + add fp, sp, #24 +.L1351: + mov r1, r5 + mov r0, r7 + stm sp, {r8, fp} + movs r3, #0 + mov r2, r10 + bl NandcXferStart + mov r1, r5 + mov r0, r7 + bl NandcXferComp + cmp r5, #0 + bne .L1375 + ldr r3, [r9, #2312] + lsr r0, r10, #1 + mov r2, r5 + cmp r3, #25 + mov r3, r5 + ite cc + movcc r4, #64 + movcs r4, #128 +.L1354: + cmp r2, r0 + add fp, fp, #4 + add r7, r4, r3 + bcc .L1355 + movs r2, #0 + lsr r0, r10, #2 + ldr r1, [r9, #2312] + ldr r4, [r9, #2264] + mov r9, r2 +.L1356: + cmp r2, r0 + bcs .L1352 + cbnz r1, .L1362 +.L1352: + movs r3, #0 + str r3, [r6, #16] +.L1363: + ldr r3, .L1385 + ldr r3, [r3, #2264] + cmp r3, #5 + bls .L1349 + cbnz r5, .L1349 + ldr r3, [r6] + and r2, r3, #139264 + cmp r2, #139264 + ittt eq + moveq r9, #-1 + orreq r3, r3, #131072 + streq r3, [r6] +.L1349: + mov r0, r9 + add sp, sp, #92 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L1355: + ldr r1, [r9, #2280] + bic r3, r3, #3 + adds r2, r2, #1 + ldr r3, [r1, r3] + strb r3, [fp, #-4] + lsrs r1, r3, #8 + strb r1, [fp, #-3] + lsrs r1, r3, #16 + lsrs r3, r3, #24 + strb r1, [fp, #-2] + strb r3, [fp, #-1] + mov r3, r7 + b .L1354 +.L1362: + add r3, r2, #8 + ldr r3, [r6, r3, lsl #2] + str r3, [sp, #20] + ldr r3, [sp, #20] + lsls r7, r3, #29 + bmi .L1378 + ldr r3, [sp, #20] + ubfx r3, r3, #15, #1 + cmp r3, #0 + bne .L1378 + cmp r4, #5 + bls .L1358 + ldr r7, [sp, #20] + ldr r3, [sp, #20] + ubfx r7, r7, #3, #5 + ubfx lr, r3, #27, #1 + ldr r3, [sp, #20] + ldr ip, [sp, #20] + orr r7, r7, lr, lsl #5 + ubfx r3, r3, #16, #5 + ubfx ip, ip, #29, #1 + orr r3, r3, ip, lsl #5 + cmp r7, r3 + ldr r3, [sp, #20] + itete hi + ldrhi r7, [sp, #20] + ldrls r7, [sp, #20] + ubfxhi r3, r3, #3, #5 + ubfxls r3, r3, #16, #5 + ite hi + ubfxhi r7, r7, #27, #1 + ubfxls r7, r7, #29, #1 +.L1384: + orr r3, r3, r7, lsl #5 +.L1360: + cmp r9, r3 + it cc + movcc r9, r3 +.L1357: + adds r2, r2, #1 + b .L1356 +.L1358: + cmp r4, #3 + bls .L1360 + ldr r7, [sp, #20] + ldr r3, [sp, #20] + ubfx r7, r7, #3, #5 + ubfx lr, r3, #28, #1 + ldr r3, [sp, #20] + ldr ip, [sp, #20] + orr r7, r7, lr, lsl #5 + ubfx r3, r3, #16, #5 + ubfx ip, ip, #30, #1 + orr r3, r3, ip, lsl #5 + cmp r7, r3 + ldr r3, [sp, #20] + itete hi + ldrhi r7, [sp, #20] + ldrls r7, [sp, #20] + ubfxhi r3, r3, #3, #5 + ubfxls r3, r3, #16, #5 + ite hi + ubfxhi r7, r7, #28, #1 + ubfxls r7, r7, #30, #1 + b .L1384 +.L1378: + mov r9, #-1 + b .L1357 +.L1375: + mov r9, #0 + b .L1352 +.L1350: + cmp r1, #1 + bne .L1364 + cmp fp, #0 + mov r4, fp + mov r9, #0 + ite ne + movne r3, #4 + moveq r3, #0 + str r3, [sp, #8] +.L1365: + cmp r9, r10 + bcc .L1367 + mov r9, #0 + b .L1363 +.L1367: + and fp, r9, #3 + cmp r8, #0 + beq .L1380 + add r3, r8, r9, lsl #9 +.L1366: + str r4, [sp] + mov r2, fp + movs r1, #1 + mov r0, r6 + bl NandcCopy1KB + movs r3, #0 + movs r2, #2 + str r3, [sp, #4] + movs r1, #1 + str r3, [sp] + mov r0, r7 + mov r3, fp + add r9, r9, #2 + bl NandcXferStart + movs r1, #1 + mov r0, r7 + bl NandcXferComp + ldr r3, [sp, #8] + add r4, r4, r3 + b .L1365 +.L1380: + mov r3, r8 + b .L1366 +.L1364: + movs r4, #0 + movs r2, #2 + mov r3, r4 + str r4, [sp, #4] + str r4, [sp] + mov r1, r4 + bl NandcXferStart + mov r9, r4 + cmp fp, r4 + ite ne + movne r3, #4 + moveq r3, r4 + str r3, [sp, #12] + str r8, [sp, #8] +.L1368: + cmp r4, r10 + bcs .L1363 + mov r1, r5 + mov r0, r7 + bl NandcXferComp + adds r4, r4, #2 + ldr r3, [r6, #32] + cmp r10, r4 + str r3, [sp, #20] + bls .L1369 + movs r3, #0 + movs r2, #2 + str r3, [sp, #4] + movs r1, #0 + str r3, [sp] + mov r0, r7 + and r3, r4, #3 + bl NandcXferStart +.L1369: + ldr r3, [sp, #20] + lsls r3, r3, #29 + bmi .L1381 + ldr r3, [sp, #20] + ldr r2, [sp, #20] + ubfx r3, r3, #3, #5 + ubfx r2, r2, #27, #1 + orr r3, r3, r2, lsl #5 + cmp r9, r3 + it cc + movcc r9, r3 +.L1370: + cmp r8, #0 + sub r2, r4, #2 + ldr r3, [sp, #8] + and r2, r2, #3 + str fp, [sp] + it eq + moveq r3, #0 + movs r1, #0 + mov r0, r6 + bl NandcCopy1KB + ldr r3, [sp, #8] + add r3, r3, #1024 + str r3, [sp, #8] + ldr r3, [sp, #12] + add fp, fp, r3 + b .L1368 +.L1381: + mov r9, #-1 + b .L1370 +.L1386: + .align 2 +.L1385: + .word .LANCHOR0 + .fnend + .size NandcXferData, .-NandcXferData + .align 1 + .global FlashReadRawPage + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FlashReadRawPage, %function +FlashReadRawPage: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + .pad #8 + mov r8, r3 + ldr r3, .L1389 + mov r6, r1 + mov r7, r2 + mov r4, r0 + ldrb r5, [r3, #477] @ zero_extendqisi2 + cbnz r0, .L1388 + ldr r1, .L1389+4 + ldrb r3, [r1, #37] @ zero_extendqisi2 + ldr r0, [r1, #40] + muls r0, r3, r0 + cmp r0, r6 + it hi + movhi r5, #4 +.L1388: + mov r0, r4 + bl NandcWaitFlashReady + mov r0, r4 + bl NandcFlashCs + mov r1, r6 + mov r0, r4 + bl FlashReadCmd + mov r0, r4 + bl NandcWaitFlashReady + mov r3, r7 + mov r2, r5 + str r8, [sp] + movs r1, #0 + mov r0, r4 + bl NandcXferData + mov r1, r0 + mov r0, r4 + bl NandcFlashDeCs + mov r0, r1 + add sp, sp, #8 + @ sp needed + pop {r4, r5, r6, r7, r8, pc} +.L1390: + .align 2 +.L1389: + .word .LANCHOR1 + .word .LANCHOR0 + .fnend + .size FlashReadRawPage, .-FlashReadRawPage + .align 1 + .global FlashDdrTunningRead + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FlashDdrTunningRead, %function +FlashDdrTunningRead: + .fnstart + @ args = 4, pretend = 0, frame = 16 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r7, r3 + ldr r4, .L1416 + .pad #20 + sub sp, sp, #20 + mov fp, r2 + stm sp, {r0, r1} + ldr r3, [r4, #88] + ldr r3, [r3, #304] + str r3, [sp, #12] + ldr r3, [r4, #2264] + cmp r3, #8 + ldr r3, [sp, #56] + ite cc + movcc r10, #6 + movcs r10, #12 + cmp r3, #0 + beq .L1405 + movs r0, #1 + bl FlashSetInterfaceMode + movs r0, #1 + bl NandcSetMode + ldr r0, [sp] + bl FlashReset + mov r3, r7 + mov r2, fp + ldm sp, {r0, r1} + bl FlashReadRawPage + mov r5, r0 + ldrb r0, [r4, #2233] @ zero_extendqisi2 + bl FlashSetInterfaceMode + ldrb r0, [r4, #2233] @ zero_extendqisi2 + bl NandcSetMode + adds r3, r5, #1 + bne .L1394 +.L1403: + mov r5, #-1 +.L1391: + mov r0, r5 + add sp, sp, #20 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L1394: + mov r2, r5 + ldr r1, [sp, #4] + ldr r0, .L1416+4 + bl printk + cmp r5, #9 + bhi .L1396 + ldr r3, [sp] + ldr r3, [r4, r3, lsl #3] + ldr r2, [r3, #3840] + ldr r2, [r3] + orr r2, r2, #131072 + str r2, [r3] +.L1396: + ldr r2, .L1416+8 + ldr r3, [r2, #1196] + adds r3, r3, #1 + cmp r3, #2048 + str r3, [r2, #1196] + bcc .L1391 + movs r7, #0 + mov fp, r7 + str r7, [r2, #1196] +.L1393: + mov r9, #0 + mov r8, #-1 + mov r6, r9 + mov r4, r9 + str r9, [sp, #8] +.L1401: + uxtb r0, r10 + bl NandcSetDdrPara + mov r3, r7 + mov r2, fp + ldm sp, {r0, r1} + bl FlashReadRawPage + adds r3, r5, #1 + cmp r0, r3 + bhi .L1397 + cmp r0, #2 + bhi .L1407 + adds r4, r4, #1 + cmp r4, #9 + bls .L1407 + mov r3, r6 + mov r5, r0 + sub r6, r10, r4 + mov r8, #0 +.L1399: + ldr r2, [sp, #8] + cmp r4, r2 + it ls + movls r6, r3 +.L1400: + cbz r6, .L1402 + mov r1, r6 + ldr r0, .L1416+12 + bl printk + uxtb r0, r6 + bl NandcSetDdrPara +.L1402: + cmp r8, #0 + beq .L1391 + ldm sp, {r1, r2} + ldr r0, .L1416+16 + bl printk + ldr r3, [sp, #56] + cmp r3, #0 + beq .L1403 + ldr r3, [sp, #12] + ubfx r0, r3, #8, #8 + bl NandcSetDdrPara + b .L1391 +.L1405: + mov r5, #1024 + b .L1393 +.L1397: + ldr r3, [sp, #8] + cmp r4, r3 + bls .L1408 + cmp r4, #7 + sub r6, r9, r4 + bhi .L1400 + str r4, [sp, #8] +.L1408: + movs r4, #0 + b .L1398 +.L1407: + mov r8, #0 + mov r9, r10 + mov r5, r0 + mov r7, r8 + mov fp, r8 +.L1398: + add r10, r10, #2 + cmp r10, #69 + bls .L1401 + mov r3, r6 + mov r6, r9 + b .L1399 +.L1417: + .align 2 +.L1416: + .word .LANCHOR0 + .word .LC90 + .word .LANCHOR4 + .word .LC91 + .word .LC92 + .fnend + .size FlashDdrTunningRead, .-FlashDdrTunningRead + .align 1 + .global FlashReadPage + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FlashReadPage, %function +FlashReadPage: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #12 + mov r7, r2 + mov r5, r0 + mov r6, r1 + mov r8, r3 + bl FlashReadRawPage + adds r2, r0, #1 + mov r4, r0 + bne .L1419 + ldr r9, .L1437+4 + ldrb fp, [r9, #44] @ zero_extendqisi2 + mov r10, r9 + cmp fp, #0 + bne .L1420 +.L1422: + ldrb r3, [r10, #2256] @ zero_extendqisi2 + cbz r3, .L1419 + ldr r3, [r10, #88] + mov r1, r6 + mov r2, r7 + mov r0, r5 + ldr r9, [r3, #304] + movs r3, #1 + str r3, [sp] + mov r3, r8 + bl FlashDdrTunningRead + adds r1, r0, #1 + mov r4, r0 + beq .L1423 + ldrb r3, [r10, #2316] @ zero_extendqisi2 + cmp r0, r3, lsr #1 + bls .L1419 +.L1423: + ubfx r0, r9, #8, #8 + bl NandcSetDdrPara + b .L1419 +.L1420: + movs r3, #0 + mov r2, r7 + strb r3, [r9, #44] + mov r1, r6 + mov r3, r8 + mov r0, r5 + bl FlashReadRawPage + adds r3, r0, #1 + strb fp, [r9, #44] + beq .L1422 + mov r4, r0 +.L1419: + ldr r9, .L1437+8 + ldr r10, [r9, #1200] + cmp r10, #0 + beq .L1418 + adds r2, r4, #1 + bne .L1418 + mov r3, r8 + mov r2, r7 + mov r1, r6 + mov r0, r5 + blx r10 + mov r3, r6 + mov r4, r0 + mov r1, r0 + mov r2, r5 + ldr r0, .L1437 + bl printk + adds r3, r4, #1 + bne .L1418 + ldr r3, .L1437+4 + ldrb r3, [r3, #152] @ zero_extendqisi2 + cbz r3, .L1418 + mov r0, r5 + bl flash_enter_slc_mode + ldr r4, [r9, #1200] + mov r3, r8 + mov r2, r7 + mov r1, r6 + mov r0, r5 + blx r4 + mov r4, r0 + mov r0, r5 + bl flash_exit_slc_mode +.L1418: + mov r0, r4 + add sp, sp, #12 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L1438: + .align 2 +.L1437: + .word .LC93 + .word .LANCHOR0 + .word .LANCHOR4 + .fnend + .size FlashReadPage, .-FlashReadPage + .align 1 + .global FlashDdrParaScan + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FlashDdrParaScan, %function +FlashDdrParaScan: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + .pad #8 + mov r6, r0 + ldr r4, .L1450 + movs r5, #0 + mov r7, r1 + ldrb r0, [r4, #2233] @ zero_extendqisi2 + bl FlashSetInterfaceMode + ldrb r0, [r4, #2233] @ zero_extendqisi2 + bl NandcSetMode + mov r3, r5 + mov r2, r5 + mov r1, r7 + str r5, [sp] + mov r0, r6 + bl FlashDdrTunningRead + mov r3, r5 + mov r8, r0 + mov r2, r5 + mov r1, r7 + mov r0, r6 + bl FlashReadRawPage + adds r0, r0, #1 + beq .L1440 + cmp r8, #-1 + bne .L1441 +.L1440: + ldrb r3, [r4, #2233] @ zero_extendqisi2 + lsls r3, r3, #31 + bpl .L1441 + movs r0, #1 + bl FlashSetInterfaceMode + movs r0, #1 + bl NandcSetMode + movs r3, #0 +.L1449: + movs r0, #0 + strb r3, [r4, #2256] + add sp, sp, #8 + @ sp needed + pop {r4, r5, r6, r7, r8, pc} +.L1441: + movs r3, #1 + b .L1449 +.L1451: + .align 2 +.L1450: + .word .LANCHOR0 + .fnend + .size FlashDdrParaScan, .-FlashDdrParaScan + .align 1 + .global FlashLoadPhyInfo + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FlashLoadPhyInfo, %function +FlashLoadPhyInfo: + .fnstart + @ args = 0, pretend = 0, frame = 16 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + movs r3, #60 + .pad #20 + sub sp, sp, #20 + ldr r6, .L1466 + movs r5, #0 + mov r8, #4 + strb r3, [sp, #12] + movs r3, #40 + strb r3, [sp, #13] + movs r3, #24 + strb r3, [sp, #14] + movs r3, #16 + ldr r4, .L1466+4 + mov r7, #-1 + strb r3, [sp, #15] + mov r0, r5 + ldr r3, [r6, #40] + ldr r10, .L1466+24 + str r5, [r4, #1208] + str r3, [sp, #4] + ldr r3, [r4, #1192] + str r3, [r4, #1204] + bl flash_enter_slc_mode +.L1453: + add fp, r5, #1 + mov r9, #0 +.L1455: + add r3, sp, #12 + ldrb r0, [r3, r9] @ zero_extendqisi2 + bl FlashBchSel + movs r3, #0 + ldr r2, [r4, #1192] + mov r1, r5 + mov r0, r3 + bl FlashReadRawPage + adds r0, r0, #1 + bne .L1454 + movs r3, #0 + ldr r2, [r4, #1192] + mov r1, fp + mov r0, r3 + bl FlashReadRawPage + adds r0, r0, #1 + bne .L1454 + add r9, r9, #1 + cmp r9, #4 + bne .L1455 +.L1456: + ldr r3, [sp, #4] + subs r8, r8, #1 + add r5, r5, r3 + bne .L1453 + mov r0, r8 + b .L1465 +.L1457: + movw r1, #2036 + add r0, r9, #12 + bl js_hash + ldr r3, [r9, #8] + cmp r3, r0 + bne .L1463 + movs r2, #32 + add r1, r9, #160 + ldr r0, .L1466+8 + bl ftl_memcpy + ldr r1, [r4, #1204] + movs r2, #32 + ldr r0, .L1466+12 + adds r1, r1, #192 + bl ftl_memcpy + ldr r1, [r4, #1204] + mov r2, #852 + ldr r0, .L1466+16 + adds r1, r1, #224 + bl ftl_memcpy + ldrh r0, [r10, #478] + bl FlashBlockAlignInit + ldr r7, [r4, #1204] + mov r0, r5 + str r5, [r4, #1208] + ldr r1, [r6, #40] + ldr r3, [r7, #1076] + strb r3, [r6, #2256] + bl __aeabi_uidiv + adds r0, r0, #1 + cmp r0, #1 + itet ls + movls r3, #2 + strhi r0, [r4, #1212] + strls r3, [r4, #1212] + ldrh r3, [r7, #14] + movs r7, #0 + strb r3, [r4, #1216] + b .L1456 +.L1463: + mov r7, #-1 + b .L1456 +.L1454: + ldr r9, [r4, #1204] + ldr r2, .L1466+20 + ldr r3, [r9] + cmp r3, r2 + bne .L1456 + cmp r7, #0 + bne .L1457 + ldr r1, [r6, #40] + mov r0, r5 + bl __aeabi_uidiv + adds r0, r0, #1 + str r0, [r4, #1212] + mov r0, r7 +.L1465: + bl flash_exit_slc_mode + mov r0, r7 + add sp, sp, #20 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L1467: + .align 2 +.L1466: + .word .LANCHOR0 + .word .LANCHOR4 + .word .LANCHOR1+468 + .word .LANCHOR0+52 + .word .LANCHOR0+1216 + .word 1312902724 + .word .LANCHOR1 + .fnend + .size FlashLoadPhyInfo, .-FlashLoadPhyInfo + .align 1 + .global ToshibaReadRetrial + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type ToshibaReadRetrial, %function +ToshibaReadRetrial: + .fnstart + @ args = 0, pretend = 0, frame = 24 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r8, r0 + ldr r4, .L1495 + .pad #28 + sub sp, sp, #28 + mov fp, r3 + str r1, [sp, #12] + str r2, [sp, #8] + bl NandcWaitFlashReady + add r3, r4, r8, lsl #3 + ldr r6, [r4, r8, lsl #3] + ldrb r1, [r3, #4] @ zero_extendqisi2 + ldrb r3, [r4, #84] @ zero_extendqisi2 + add r7, r1, #8 + subs r3, r3, #67 + add r7, r6, r7, lsl #8 + cmp r3, #1 + lsl r3, r1, #8 + str r3, [sp, #16] + bls .L1485 + ldrb r5, [r4, #2256] @ zero_extendqisi2 + cbz r5, .L1470 + movs r5, #1 + movs r0, #0 + bl NandcSetDdrMode +.L1470: + lsls r3, r1, #8 + movs r2, #92 + adds r3, r6, r3 + str r2, [r3, #2056] + movs r2, #197 + str r2, [r3, #2056] +.L1469: + mov r3, #-1 + mov r9, #1 + str r3, [sp, #4] + lsls r3, r1, #8 + str r3, [sp, #20] +.L1471: + ldr r3, .L1495+4 + ldrb r3, [r3, #1217] @ zero_extendqisi2 + adds r3, r3, #1 + cmp r9, r3 + bcc .L1480 + ldr r10, [sp, #4] +.L1479: + ldrb r2, [r4, #84] @ zero_extendqisi2 + movs r1, #0 + mov r0, r7 + subs r2, r2, #67 + cmp r2, #1 + bhi .L1481 + bl SandiskSetRRPara +.L1482: + ldr r3, [sp, #16] + movs r2, #255 + add r6, r6, r3 + str r2, [r6, #2056] + ldrb r2, [r4, #2316] @ zero_extendqisi2 + add r2, r2, r2, lsl #1 + cmp r10, r2, asr #2 + bcc .L1483 + cmp r10, #-1 + it ne + movne r10, #256 +.L1483: + mov r0, r8 + bl NandcWaitFlashReady + cbz r5, .L1468 + movs r0, #4 + bl NandcSetDdrMode +.L1468: + mov r0, r10 + add sp, sp, #28 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L1485: + movs r5, #0 + b .L1469 +.L1480: + ldrb r3, [r4, #84] @ zero_extendqisi2 + mov r0, r7 + uxtb r1, r9 + subs r3, r3, #67 + cmp r3, #1 + bhi .L1472 + bl SandiskSetRRPara +.L1473: + ldrb r3, [r4, #84] @ zero_extendqisi2 + cmp r3, #34 + bne .L1474 + ldr r3, .L1495+4 + ldrb r3, [r3, #1217] @ zero_extendqisi2 + subs r3, r3, #3 + cmp r9, r3 + itttt eq + ldreq r3, [sp, #20] + moveq r2, #179 + addeq r3, r6, r3 + streq r2, [r3, #2056] +.L1474: + ldr r3, [sp, #16] + movs r2, #38 + adds r3, r6, r3 + str r2, [r3, #2056] + movs r2, #93 + str r2, [r3, #2056] + cbz r5, .L1475 + movs r0, #4 + bl NandcSetDdrMode + mov r3, fp + ldr r2, [sp, #8] + ldr r1, [sp, #12] + mov r0, r8 + bl FlashReadRawPage + mov r10, r0 + movs r0, #0 + bl NandcSetDdrMode +.L1476: + cmp r10, #-1 + beq .L1477 + ldrb r2, [r4, #2316] @ zero_extendqisi2 + ldr r3, [sp, #4] + add r2, r2, r2, lsl #1 + cmp r3, #-1 + it eq + moveq r3, r10 + str r3, [sp, #4] + cmp r10, r2, asr #2 + bcc .L1479 + mov fp, #0 + str fp, [sp, #8] +.L1477: + add r9, r9, #1 + b .L1471 +.L1472: + bl ToshibaSetRRPara + b .L1473 +.L1475: + mov r3, fp + ldr r2, [sp, #8] + ldr r1, [sp, #12] + mov r0, r8 + bl FlashReadRawPage + mov r10, r0 + b .L1476 +.L1481: + bl ToshibaSetRRPara + b .L1482 +.L1496: + .align 2 +.L1495: + .word .LANCHOR0 + .word .LANCHOR4 + .fnend + .size ToshibaReadRetrial, .-ToshibaReadRetrial + .align 1 + .global SamsungReadRetrial + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type SamsungReadRetrial, %function +SamsungReadRetrial: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r8, r0 + ldr r5, .L1510 + mov r9, r3 + mov fp, r1 + mov r10, r2 + bl NandcWaitFlashReady + movs r7, #1 + mov r4, #-1 + add r3, r5, r8, lsl #3 + ldrb r6, [r3, #4] @ zero_extendqisi2 + add r3, r6, #8 + ldr r6, [r5, r8, lsl #3] + add r6, r6, r3, lsl #8 +.L1498: + ldr r3, .L1510+4 + ldrb r3, [r3, #1217] @ zero_extendqisi2 + adds r3, r3, #1 + cmp r7, r3 + bcc .L1502 +.L1501: + movs r1, #0 + mov r0, r6 + bl SamsungSetRRPara + ldrb r3, [r5, #2316] @ zero_extendqisi2 + add r3, r3, r3, lsl #1 + cmp r4, r3, asr #2 + bcc .L1497 + adds r3, r4, #1 + it ne + movne r4, #256 +.L1497: + mov r0, r4 + pop {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L1502: + uxtb r1, r7 + mov r0, r6 + bl SamsungSetRRPara + mov r2, r10 + mov r3, r9 + mov r1, fp + mov r0, r8 + bl FlashReadRawPage + adds r2, r0, #1 + beq .L1499 + ldrb r3, [r5, #2316] @ zero_extendqisi2 + cmp r4, #-1 + it eq + moveq r4, r0 + add r3, r3, r3, lsl #1 + cmp r0, r3, asr #2 + bcc .L1505 + mov r9, #0 + mov r10, r9 +.L1499: + adds r7, r7, #1 + b .L1498 +.L1505: + mov r4, r0 + b .L1501 +.L1511: + .align 2 +.L1510: + .word .LANCHOR0 + .word .LANCHOR4 + .fnend + .size SamsungReadRetrial, .-SamsungReadRetrial + .align 1 + .global MicronReadRetrial + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type MicronReadRetrial, %function +MicronReadRetrial: + .fnstart + @ args = 0, pretend = 0, frame = 24 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r7, r3 + ldr r3, .L1536 + mov r10, r2 + .pad #36 + sub sp, sp, #36 + mov r5, r0 + str r1, [sp, #24] + ldrb r2, [r3, #2316] @ zero_extendqisi2 + ldrb r3, [r3, #152] @ zero_extendqisi2 + cmp r3, #0 + bne .L1513 + add r2, r2, r2, lsl #1 + asr fp, r2, #2 +.L1514: + movs r3, #0 + str r3, [sp, #8] + ldr r3, .L1536 + add r3, r3, r5, lsl #3 + str r3, [sp, #28] +.L1524: + mov r0, r5 + mov r9, #0 + bl NandcWaitFlashReady + ldr r3, .L1536 + mov r4, #-1 + ldr r3, [r3, r5, lsl #3] + str r3, [sp, #16] + ldr r3, [sp, #28] + ldrb r3, [r3, #4] @ zero_extendqisi2 + str r3, [sp, #20] + ldr r2, [sp, #20] + ldr r3, [sp, #16] + add r6, r3, r2, lsl #8 +.L1515: + ldr r3, .L1536+4 + ldrb r3, [r3, #1217] @ zero_extendqisi2 + cmp r9, r3 + bcc .L1519 +.L1518: + ldr r3, [sp, #16] + movs r0, #200 + ldr r2, [sp, #20] + movs r6, #0 + add r8, r3, r2, lsl #8 + movs r3, #239 + str r3, [r8, #2056] + movs r3, #137 + str r3, [r8, #2052] + bl ndelay + cmp r4, fp + str r6, [r8, #2048] + str r6, [r8, #2048] + str r6, [r8, #2048] + str r6, [r8, #2048] + bcc .L1520 + adds r1, r4, #1 + mov r3, r9 + it ne + movne r4, #256 + ldr r2, [sp, #24] + str r4, [sp] + mov r1, r9 + ldr r0, .L1536+8 + bl printk + ldr r3, [sp, #8] + cmp r3, #0 + bne .L1522 + ldr r3, .L1536 + ldrb r3, [r3, #152] @ zero_extendqisi2 + cmp r3, #0 + beq .L1512 + adds r2, r4, #1 + bne .L1512 + movs r1, #3 + mov r0, r5 + bl micron_auto_read_calibration_config + movs r3, #1 + str r3, [sp, #8] + b .L1524 +.L1513: + ldr r3, .L1536+12 + smull r2, r3, r2, r3 + mov fp, r3 + b .L1514 +.L1519: + movs r3, #239 + movs r0, #200 + str r3, [r6, #2056] + movs r3, #137 + str r3, [r6, #2052] + mov r8, #0 + bl ndelay + add r3, r9, #1 + mov r2, r10 + str r3, [r6, #2048] + mov r0, r5 + str r8, [r6, #2048] + str r3, [sp, #12] + mov r3, r7 + str r8, [r6, #2048] + ldr r1, [sp, #24] + str r8, [r6, #2048] + bl FlashReadRawPage + adds r3, r0, #1 + beq .L1516 + cmp r4, #-1 + it eq + moveq r4, r0 + cmp r0, fp + bcc .L1526 + mov r7, r8 + mov r10, r8 +.L1516: + ldr r9, [sp, #12] + b .L1515 +.L1526: + mov r4, r0 + mov r7, r8 + mov r10, r8 + b .L1518 +.L1522: + mov r1, r6 + mov r0, r5 + bl micron_auto_read_calibration_config + adds r3, r4, #1 + it ne + movne r4, #256 +.L1512: + mov r0, r4 + add sp, sp, #36 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L1520: + ldr r3, [sp, #8] + cmp r3, #0 + beq .L1512 + mov r1, r6 + mov r0, r5 + bl micron_auto_read_calibration_config + mov r4, #256 + b .L1512 +.L1537: + .align 2 +.L1536: + .word .LANCHOR0 + .word .LANCHOR4 + .word .LC94 + .word 1431655766 + .fnend + .size MicronReadRetrial, .-MicronReadRetrial + .align 1 + .global HynixReadRetrial + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type HynixReadRetrial, %function +HynixReadRetrial: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #12 + mov r9, r3 + ldr r5, .L1555 + mov r8, #0 + mov r6, #-1 + mov fp, r2 + mov r7, r0 + str r1, [sp, #4] + ldr r3, [r5, #48] + adds r2, r5, r0 + ldrb r4, [r2, #1228] @ zero_extendqisi2 + ldrb r10, [r5, #1218] @ zero_extendqisi2 + ldrb r3, [r3, #19] @ zero_extendqisi2 + subs r3, r3, #7 + cmp r3, #1 + it ls + ldrbls r4, [r2, #1236] @ zero_extendqisi2 + bl NandcWaitFlashReady +.L1540: + cmp r8, r10 + bcc .L1545 +.L1544: + ldr r3, [r5, #48] + add r7, r7, r5 + ldrb r3, [r3, #19] @ zero_extendqisi2 + subs r3, r3, #7 + cmp r3, #1 + ldrb r3, [r5, #2316] @ zero_extendqisi2 + ite ls + strbls r4, [r7, #1236] + strbhi r4, [r7, #1228] + add r3, r3, r3, lsl #1 + cmp r6, r3, asr #2 + bcc .L1538 + adds r3, r6, #1 + it ne + movne r6, #256 +.L1538: + mov r0, r6 + add sp, sp, #12 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L1545: + adds r4, r4, #1 + ldr r2, .L1555+4 + uxtb r4, r4 + ldrb r1, [r5, #1217] @ zero_extendqisi2 + mov r0, r7 + cmp r10, r4 + it ls + movls r4, #0 + mov r3, r4 + bl HynixSetRRPara + mov r2, fp + mov r3, r9 + ldr r1, [sp, #4] + mov r0, r7 + bl FlashReadRawPage + adds r2, r0, #1 + beq .L1542 + ldrb r3, [r5, #2316] @ zero_extendqisi2 + cmp r6, #-1 + it eq + moveq r6, r0 + add r3, r3, r3, lsl #1 + cmp r0, r3, asr #2 + bcc .L1549 + mov r9, #0 + mov fp, r9 +.L1542: + add r8, r8, #1 + b .L1540 +.L1549: + mov r6, r0 + b .L1544 +.L1556: + .align 2 +.L1555: + .word .LANCHOR0 + .word .LANCHOR0+1220 + .fnend + .size HynixReadRetrial, .-HynixReadRetrial + .align 1 + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type samsung_read_retrial, %function +samsung_read_retrial: + .fnstart + @ args = 0, pretend = 0, frame = 16 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #28 + sub sp, sp, #28 + mov r10, r0 + mov fp, r2 + mov r9, r3 + str r1, [sp, #12] + bl NandcWaitFlashReady + ldr r3, .L1582 + ldr r2, [r3, r10, lsl #3] + str r3, [sp, #20] + str r2, [sp, #8] + add r2, r3, r10, lsl #3 + ldrb r6, [r2, #4] @ zero_extendqisi2 + ldrb r2, [r3, #2232] @ zero_extendqisi2 + cmp r2, #0 + bne .L1558 + ldr r3, [sp, #8] + lsl r8, r6, #8 + mov r4, #-1 + movs r7, #1 + add r5, r3, r8 + addw r3, r5, #2056 + str r3, [sp, #16] +.L1562: + ldr r3, [sp, #16] + movs r6, #0 + ldr r1, [sp, #12] + mov r0, r10 + mov r2, r3 + movs r3, #239 + str r3, [r2] + movs r3, #141 + str r3, [r5, #2052] + mov r2, fp + ldr r3, .L1582+4 + ldrsb r3, [r7, r3] + str r3, [r5, #2048] + mov r3, r9 + str r6, [r5, #2048] + str r6, [r5, #2048] + str r6, [r5, #2048] + bl FlashReadRawPage + adds r1, r0, #1 + beq .L1559 + ldr r3, [sp, #20] + cmp r4, #-1 + it eq + moveq r4, r0 + ldrb r3, [r3, #2316] @ zero_extendqisi2 + add r3, r3, r3, lsl #1 + cmp r0, r3, asr #2 + bcc .L1570 + mov r9, r6 + mov fp, r6 +.L1559: + adds r7, r7, #1 + cmp r7, #26 + bne .L1562 +.L1561: + ldr r3, [sp, #8] + add r3, r3, r8 + mov r8, r3 + movs r3, #239 + str r3, [r8, #2056] + movs r3, #141 +.L1581: + str r3, [r5, #2052] + movs r3, #0 + str r3, [r5, #2048] + str r3, [r5, #2048] + str r3, [r5, #2048] + str r3, [r5, #2048] + ldr r3, .L1582 + ldrb r3, [r3, #2316] @ zero_extendqisi2 + add r3, r3, r3, lsl #1 + cmp r4, r3, asr #2 + bcc .L1568 + adds r3, r4, #1 + ldr r2, [sp, #12] + it ne + movne r4, #256 + mov r3, r7 + str r4, [sp] + mov r1, r7 + ldr r0, .L1582+8 + bl printk +.L1568: + mov r0, r10 + bl NandcWaitFlashReady + mov r0, r4 + add sp, sp, #28 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L1570: + mov r4, r0 + b .L1561 +.L1558: + ldr r3, [sp, #8] + lsls r6, r6, #8 + ldr r8, .L1582+12 + mov r4, #-1 + movs r7, #1 + adds r5, r3, r6 + addw r3, r5, #2056 + str r3, [sp, #16] +.L1567: + ldr r3, [sp, #16] + mov r0, r10 + ldr r1, [sp, #12] + mov r2, r3 + movs r3, #239 + str r3, [r2] + movs r3, #137 + str r3, [r5, #2052] + mov r2, fp + ldrb r3, [r8, #4] @ zero_extendqisi2 + str r3, [r5, #2048] + ldrb r3, [r8, #5] @ zero_extendqisi2 + str r3, [r5, #2048] + ldrb r3, [r8, #6] @ zero_extendqisi2 + str r3, [r5, #2048] + ldrb r3, [r8, #7] @ zero_extendqisi2 + str r3, [r5, #2048] + mov r3, r9 + bl FlashReadRawPage + adds r2, r0, #1 + beq .L1564 + ldr r3, .L1582 + cmp r4, #-1 + it eq + moveq r4, r0 + ldrb r3, [r3, #2316] @ zero_extendqisi2 + add r3, r3, r3, lsl #1 + cmp r0, r3, asr #2 + bcc .L1571 + mov r9, #0 + mov fp, r9 +.L1564: + adds r7, r7, #1 + add r8, r8, #4 + cmp r7, #26 + bne .L1567 +.L1566: + ldr r3, [sp, #8] + add r3, r3, r6 + mov r6, r3 + movs r3, #239 + str r3, [r6, #2056] + movs r3, #137 + b .L1581 +.L1571: + mov r4, r0 + b .L1566 +.L1583: + .align 2 +.L1582: + .word .LANCHOR0 + .word .LANCHOR3+11 + .word .LC95 + .word .LANCHOR3+37 + .fnend + .size samsung_read_retrial, .-samsung_read_retrial + .align 1 + .global FlashProgPage + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FlashProgPage, %function +FlashProgPage: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + .pad #8 + mov r8, r3 + ldr r3, .L1587 + mov r5, r1 + mov r7, r2 + mov r4, r0 + ldrb r6, [r3, #477] @ zero_extendqisi2 + cbnz r0, .L1585 + ldr r1, .L1587+4 + ldrb r3, [r1, #37] @ zero_extendqisi2 + ldr r0, [r1, #40] + muls r0, r3, r0 + cmp r0, r5 + bls .L1585 + ldrb r3, [r1, #36] @ zero_extendqisi2 + cmp r3, #0 + it ne + movne r6, #4 +.L1585: + mov r0, r4 + bl NandcWaitFlashReady + mov r0, r4 + bl NandcFlashCs + mov r1, r5 + mov r0, r4 + bl FlashProgFirstCmd + mov r3, r7 + mov r2, r6 + str r8, [sp] + movs r1, #1 + mov r0, r4 + bl NandcXferData + mov r1, r5 + mov r0, r4 + bl FlashProgSecondCmd + mov r0, r4 + bl NandcWaitFlashReady + mov r1, r5 + mov r0, r4 + bl FlashReadStatus + mov r1, r0 + mov r0, r4 + bl NandcFlashDeCs + and r0, r1, #1 + add sp, sp, #8 + @ sp needed + pop {r4, r5, r6, r7, r8, pc} +.L1588: + .align 2 +.L1587: + .word .LANCHOR1 + .word .LANCHOR0 + .fnend + .size FlashProgPage, .-FlashProgPage + .align 1 + .global FlashSavePhyInfo + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FlashSavePhyInfo, %function +FlashSavePhyInfo: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + ldr r4, .L1602 + ldr r5, .L1602+4 + ldr r3, [r4, #1192] + ldrb r0, [r4, #1218] @ zero_extendqisi2 + ldr r8, .L1602+12 + str r3, [r4, #1204] + bl FlashBchSel + mov r2, #2048 + movs r1, #0 + ldr r0, [r4, #1192] + bl ftl_memset + ldr r3, [r4, #1204] + movs r2, #32 + addw r1, r5, #2072 + str r8, [r3] + ldr r0, [r4, #1204] + ldrb r3, [r5, #2234] @ zero_extendqisi2 + adds r0, r0, #16 + strh r3, [r0, #-4] @ movhi + ldrb r3, [r5, #37] @ zero_extendqisi2 + strh r3, [r0, #-2] @ movhi + ldrb r3, [r5, #2256] @ zero_extendqisi2 + str r3, [r0, #1060] + bl ftl_memcpy + ldr r0, [r4, #1204] + movs r2, #8 + addw r1, r5, #2236 + adds r0, r0, #80 + bl ftl_memcpy + ldr r0, [r4, #1204] + movs r2, #32 + addw r1, r5, #1180 + adds r0, r0, #96 + bl ftl_memcpy + ldr r0, [r4, #1204] + movs r2, #32 + ldr r1, .L1602+8 + adds r0, r0, #160 + bl ftl_memcpy + ldr r0, [r4, #1204] + movs r2, #32 + add r1, r5, #52 + adds r0, r0, #192 + bl ftl_memcpy + ldr r0, [r4, #1204] + mov r2, #852 + add r1, r5, #1216 + adds r0, r0, #224 + bl ftl_memcpy + ldr r6, [r4, #1204] + movw r1, #2036 + add r0, r6, #12 + bl js_hash + mov r3, #1592 + str r0, [r6, #8] + str r3, [r6, #4] + movs r6, #0 + ldr r3, [r4, #1220] + mov r7, r6 + movs r0, #0 + str r3, [r4, #1204] + bl flash_enter_slc_mode +.L1595: + ldr r1, [r5, #40] + movs r2, #0 + mov r0, r2 + muls r1, r7, r1 + bl FlashEraseBlock + ldrb r9, [r5, #152] @ zero_extendqisi2 + cmp r9, #0 + beq .L1590 + mov r9, #0 +.L1591: + ldr r1, [r5, #40] + movs r3, #0 + ldr r2, [r4, #1192] + mov r0, r3 + mla r1, r1, r7, r9 + add r9, r9, #1 + bl FlashProgPage + cmp r9, #10 + bne .L1591 +.L1592: + ldr r1, [r5, #40] + movs r3, #0 + ldr r2, [r4, #1220] + mov r0, r3 + add r10, r7, #1 + muls r1, r7, r1 + bl FlashReadRawPage + adds r0, r0, #1 + beq .L1593 + ldr r9, [r4, #1204] + ldr r3, [r9] + cmp r3, r8 + bne .L1593 + movw r1, #2036 + add r0, r9, #12 + bl js_hash + ldr r3, [r9, #8] + cmp r3, r0 + bne .L1593 + ldr r3, [r5, #40] + cmp r6, #1 + str r10, [r4, #1212] + mul r7, r7, r3 + str r7, [r4, #1208] + beq .L1596 + movs r6, #1 +.L1593: + mov r7, r10 + cmp r7, #4 + bne .L1595 +.L1594: + movs r0, #0 + bl flash_exit_slc_mode + clz r0, r6 + lsrs r0, r0, #5 + negs r0, r0 + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L1590: + ldr r1, [r5, #40] + mov r3, r9 + ldr r2, [r4, #1192] + mov r0, r9 + muls r1, r7, r1 + bl FlashProgPage + ldr r1, [r5, #40] + mov r3, r9 + ldr r2, [r4, #1192] + mov r0, r9 + muls r1, r7, r1 + adds r1, r1, #1 + bl FlashProgPage + b .L1592 +.L1596: + movs r6, #2 + b .L1594 +.L1603: + .align 2 +.L1602: + .word .LANCHOR4 + .word .LANCHOR0 + .word .LANCHOR1+468 + .word 1312902724 + .fnend + .size FlashSavePhyInfo, .-FlashSavePhyInfo + .align 1 + .global FlashReadIdbDataRaw + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FlashReadIdbDataRaw, %function +FlashReadIdbDataRaw: + .fnstart + @ args = 0, pretend = 0, frame = 16 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + movs r3, #60 + .pad #20 + sub sp, sp, #20 + ldr r4, .L1622 + mov r10, r0 + strb r3, [sp, #12] + movs r3, #40 + strb r3, [sp, #13] + movs r3, #24 + strb r3, [sp, #14] + movs r3, #16 + strb r3, [sp, #15] + ldrb r3, [r4, #2316] @ zero_extendqisi2 + str r3, [sp, #4] + ldr r3, [r4, #2252] + cbz r3, .L1605 + movs r0, #0 + bl flash_enter_slc_mode +.L1605: + ldr r6, .L1622+4 + mov r8, #-1 + movs r5, #2 + mov r2, #2048 + movs r1, #0 + mov r0, r10 + bl ftl_memset +.L1606: + ldrb r3, [r4, #37] @ zero_extendqisi2 + cmp r5, r3 + bcc .L1611 +.L1610: + ldr r0, [sp, #4] + bl FlashBchSel + ldr r3, [r4, #2252] + cbz r3, .L1604 + movs r0, #0 + bl flash_exit_slc_mode +.L1604: + mov r0, r8 + add sp, sp, #20 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L1611: + movs r7, #0 + add fp, sp, #12 +.L1608: + ldrb r9, [r7, fp] @ zero_extendqisi2 + mov r0, r9 + bl FlashBchSel + ldr r1, [r4, #40] + movs r3, #0 + ldr r2, [r6, #1192] + mov r0, r3 + muls r1, r5, r1 + bl FlashReadRawPage + adds r0, r0, #1 + bne .L1607 + adds r7, r7, #1 + cmp r7, #4 + bne .L1608 +.L1609: + adds r5, r5, #1 + b .L1606 +.L1614: + mov r8, #0 + b .L1610 +.L1607: + ldr r3, [r6, #1192] + ldr r2, .L1622+8 + ldr r3, [r3] + cmp r3, r2 + bne .L1609 + mov r1, r9 + ldr r0, .L1622+12 + bl printk + mov r2, #2048 + ldr r1, [r6, #1192] + mov r0, r10 + bl ftl_memcpy + ldr r3, [r6, #1192] + ldr r3, [r3, #512] + strb r3, [r4, #37] + ldr r3, [r6, #1212] + cmp r5, r3 + bcs .L1614 + str r5, [r6, #1212] + mov r8, #0 + bl FlashSavePhyInfo + b .L1609 +.L1623: + .align 2 +.L1622: + .word .LANCHOR0 + .word .LANCHOR4 + .word -52655045 + .word .LC96 + .fnend + .size FlashReadIdbDataRaw, .-FlashReadIdbDataRaw + .align 1 + .global FlashInit + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FlashInit, %function +FlashInit: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r7, r0 + ldr r5, .L1740 + .pad #28 + sub sp, sp, #28 + mov r0, #32768 + movs r6, #0 + bl ftl_malloc + str r0, [r5, #1192] + mov r0, #32768 + bl ftl_malloc + str r0, [r5, #1220] + mov r0, #4096 + ldr r4, .L1740+4 + mov r8, r6 + bl ftl_dma32_malloc + str r0, [r5, #1224] + mov r0, #32768 + bl ftl_malloc + ldr fp, .L1740+40 + str r0, [r5, #1228] + mov r0, #4096 + bl ftl_dma32_malloc + movs r3, #50 + str r0, [r5, #1232] + strb r3, [r4, #37] + mov r0, r7 + strb r3, [r5, #1216] + addw r7, r4, #2072 + movs r3, #128 + str r6, [r5, #1212] + str r3, [r4, #40] + movs r3, #60 + strb r6, [r4, #2256] + str r6, [r5, #1196] + strb r6, [r4, #36] + strb r6, [r5, #1236] + strb r3, [r5, #1218] + bl NandcInit +.L1630: + ldr r3, [r4, r6, lsl #3] + uxtb r9, r6 + add r2, r4, r6, lsl #3 + mov r0, r9 + ldrb r10, [r2, #4] @ zero_extendqisi2 + str r3, [sp, #20] + bl FlashReset + mov r0, r9 + bl NandcFlashCs + ldr r3, [sp, #20] + movs r0, #200 + add r10, r3, r10, lsl #8 + movs r3, #144 + str r3, [r10, #2056] + str r8, [r10, #2052] + bl ndelay + ldr r2, [r10, #2048] + uxtb r2, r2 + strb r2, [r7] + cmp r2, #44 + ldr r1, [r10, #2048] + strb r1, [r7, #1] + ldr r1, [r10, #2048] + strb r1, [r7, #2] + ldr r1, [r10, #2048] + strb r1, [r7, #3] + ldr r1, [r10, #2048] + strb r1, [r7, #4] + ldr r1, [r10, #2048] + strb r1, [r7, #5] + bne .L1625 + movs r2, #239 + movs r0, #200 + str r2, [r10, #2056] + movs r2, #1 + str r2, [r10, #2052] + bl ndelay + movs r2, #4 + str r2, [r10, #2048] + str r8, [r10, #2048] + str r8, [r10, #2048] + str r8, [r10, #2048] +.L1625: + mov r0, r9 + bl NandcFlashDeCs + ldrb r2, [r7] @ zero_extendqisi2 + subs r3, r2, #1 + uxtb r3, r3 + cmp r3, #253 + bhi .L1626 + ldrb r1, [r7, #5] @ zero_extendqisi2 + mov r0, fp + ldrb r3, [r7, #1] @ zero_extendqisi2 + str r1, [sp, #12] + ldrb r1, [r7, #4] @ zero_extendqisi2 + str r1, [sp, #8] + ldrb r1, [r7, #3] @ zero_extendqisi2 + str r1, [sp, #4] + ldrb r1, [r7, #2] @ zero_extendqisi2 + str r1, [sp] + adds r1, r6, #1 + bl printk +.L1626: + cbnz r6, .L1627 + ldrb r3, [r4, #2072] @ zero_extendqisi2 + subs r3, r3, #1 + uxtb r3, r3 + cmp r3, #253 + bhi .L1681 + ldrb r3, [r4, #2073] @ zero_extendqisi2 + cmp r3, #255 + beq .L1681 +.L1627: + ldrb r3, [r7] @ zero_extendqisi2 + adds r6, r6, #1 + adds r7, r7, #8 + cmp r3, #181 + itt eq + moveq r3, #44 + strbeq r3, [r7, #-8] + cmp r6, #4 + bne .L1630 + ldrb r3, [r4, #2072] @ zero_extendqisi2 + cmp r3, #173 + beq .L1631 + ldr r0, [r4, #2260] + bl NandcSetDdrMode +.L1631: + mov r2, #852 + movs r1, #0 + ldr r0, .L1740+8 + bl ftl_memset + ldr r6, .L1740+12 + ldr r3, .L1740+16 + ldr r1, [r4, #2268] + add r2, r3, #468 + cmp r1, r6 + str r2, [r4, #48] + mov r2, #0 + strb r2, [r4, #44] + bne .L1632 + ldrb r2, [r3, #487] @ zero_extendqisi2 + cmp r2, #50 + itt ne + movne r2, #1 + strne r2, [r4, #2252] +.L1632: + ldrb r2, [r4, #2073] @ zero_extendqisi2 + cmp r2, #161 + beq .L1633 + cmp r2, #241 + beq .L1633 + cmp r2, #218 + beq .L1633 + and r0, r2, #253 + cmp r0, #209 + beq .L1633 + cmp r2, #220 + bne .L1634 + ldrb r0, [r4, #2075] @ zero_extendqisi2 + cmp r0, #149 + bne .L1634 +.L1633: + movs r7, #16 + movs r0, #1 + strb r7, [r4, #37] + strb r7, [r5, #1218] + ldrb r7, [r4, #2072] @ zero_extendqisi2 + strb r0, [r4, #36] + strb r2, [r3, #3414] + cmp r7, #152 + strb r7, [r3, #3413] + bne .L1636 + ldrsb r7, [r4, #2076] + cmp r7, #0 + blt .L1637 + movs r0, #24 + strb r0, [r5, #1218] +.L1636: + cmp r1, r6 + beq .L1639 + movw r0, #2049 + cmp r1, r0 + bne .L1640 +.L1639: + movs r1, #16 + strb r1, [r5, #1218] +.L1640: + cmp r2, #218 + bne .L1641 + mov r1, #2048 +.L1734: + strh r1, [r3, #3426] @ movhi + strb r2, [r3, #3414] +.L1642: + movs r2, #32 + ldr r1, .L1740+20 + ldr r0, .L1740+24 + bl ftl_memcpy + ldr r1, .L1740+28 + movs r2, #32 + sub r0, r1, #2944 + bl ftl_memcpy +.L1634: + ldrb r3, [r4, #36] @ zero_extendqisi2 + cmp r3, #0 + bne .L1645 + bl FlashLoadPhyInfoInRam + cbnz r0, .L1647 + ldr r3, [r4, #48] + ldrh r3, [r3, #16] + lsrs r3, r3, #8 + lsls r7, r3, #31 + and r0, r3, #7 + strb r0, [r4, #2233] + bmi .L1647 + movs r3, #1 + strb r3, [r4, #2256] + bl FlashSetInterfaceMode + ldrb r0, [r4, #2233] @ zero_extendqisi2 + bl NandcSetMode +.L1647: + ldr r3, [r4, #48] + ldrb r3, [r3, #26] @ zero_extendqisi2 + strb r3, [r4, #152] + bl FlashLoadPhyInfo + cmp r0, #0 + beq .L1645 + ldr r3, [r4, #2260] + cmp r3, #0 + beq .L1650 + movs r0, #1 + bl FlashSetInterfaceMode + movs r0, #1 +.L1735: + bl NandcSetMode + bl FlashLoadPhyInfo + cmp r0, #0 + beq .L1645 + movs r0, #1 + bl FlashSetInterfaceMode + movs r0, #1 + bl NandcSetMode + ldr r3, [r4, #48] + ldr r0, .L1740+32 + ldrh r1, [r3, #14] + bl printk + bl FlashLoadPhyInfoInRam + adds r1, r0, #1 + beq .L1624 + bl FlashDieInfoInit + ldr r3, [r4, #48] + ldrb r0, [r3, #19] @ zero_extendqisi2 + bl FlashGetReadRetryDefault + ldr r3, [r4, #48] + ldr r2, .L1740+36 + ldrb r1, [r3, #9] @ zero_extendqisi2 + ldrh r2, [r2, #3270] + addw r2, r2, #4095 + cmp r1, r2, asr #12 + blt .L1652 + ldrh r2, [r3, #14] + adds r2, r2, #255 + cmp r1, r2, asr #8 + bge .L1653 + b .L1741 +.L1742: + .align 2 +.L1740: + .word .LANCHOR4 + .word .LANCHOR0 + .word .LANCHOR0+1216 + .word 1446522928 + .word .LANCHOR1 + .word .LANCHOR1+3288 + .word .LANCHOR0+52 + .word .LANCHOR1+3412 + .word .LC98 + .word .LANCHOR2 + .word .LC97 +.L1741: +.L1652: + ldrh r2, [r3, #14] + bic r2, r2, #255 + strh r2, [r3, #14] @ movhi +.L1653: + ldrb r3, [r4, #2233] @ zero_extendqisi2 + tst r3, #6 + beq .L1654 + bl FlashSavePhyInfo + movs r0, #0 + bl flash_enter_slc_mode + ldr r1, [r5, #1208] + movs r0, #0 + bl FlashDdrParaScan + movs r0, #0 + bl flash_exit_slc_mode +.L1654: + bl FlashSavePhyInfo +.L1645: + ldr r7, [r4, #48] + mov r8, #0 + str r8, [r5, #1200] + ldrb r3, [r7, #26] @ zero_extendqisi2 + ldrb r1, [r7, #12] @ zero_extendqisi2 + ldrh r0, [r7, #10] + strb r3, [r4, #152] + ldrh r3, [r7, #16] + ubfx r2, r3, #7, #1 + strb r2, [r4, #44] + ubfx r2, r3, #3, #1 + strb r2, [r5, #1237] + ubfx r2, r3, #4, #1 + ubfx r3, r3, #8, #3 + strb r2, [r4, #2244] + strb r3, [r4, #2233] + bl __aeabi_idiv + mov r1, r0 + ldrb r0, [r7, #18] @ zero_extendqisi2 + bl BuildFlashLsbPageTable + bl FlashDieInfoInit + ldr r3, [r4, #48] + ldrh r2, [r3, #16] + lsls r2, r2, #25 + bpl .L1656 + ldrb r0, [r3, #19] @ zero_extendqisi2 + ldrb r3, [r4, #1217] @ zero_extendqisi2 + strb r0, [r4, #84] + strb r3, [r4, #85] + ldrb r3, [r4, #1218] @ zero_extendqisi2 + strb r3, [r5, #1217] + subs r3, r0, #1 + cmp r3, #7 + bhi .L1657 + ldr r3, .L1743 + str r3, [r5, #1200] + subs r3, r0, #5 + cmp r3, #1 + bls .L1658 + cmp r0, #8 + bne .L1659 +.L1658: + movs r3, #1 + str r3, [r4, #2308] +.L1659: + cmp r0, #7 + ldr r3, .L1743+4 + beq .L1660 + sub r2, r3, #8 + cmp r0, #8 + it ne + movne r3, r2 +.L1660: + subs r1, r3, #1 + movs r2, #0 + adds r3, r3, #31 +.L1662: + ldrsb r7, [r1, #1]! + cbnz r7, .L1661 + adds r2, r2, #1 +.L1661: + cmp r3, r1 + bne .L1662 + cmp r2, #27 + bls .L1656 + bl FlashGetReadRetryDefault + bl FlashSavePhyInfo +.L1656: + ldr r3, [r4, #2268] + cmp r3, r6 + bne .L1674 + ldrb r2, [r4, #152] @ zero_extendqisi2 + cbz r2, .L1674 + ldr r2, [r4, #48] + movs r1, #0 + strb r1, [r2, #18] +.L1674: + ldrb r2, [r4, #2072] @ zero_extendqisi2 + cmp r2, #44 + bne .L1675 + ldrb r2, [r4, #2256] @ zero_extendqisi2 + cbz r2, .L1675 + cmp r3, r6 + bne .L1676 + ldrb r3, [r4, #152] @ zero_extendqisi2 + cbnz r3, .L1675 +.L1676: + movs r3, #0 + movs r0, #1 + strb r3, [r4, #2256] + bl FlashSetInterfaceMode + movs r0, #1 + bl NandcSetMode +.L1675: + ldrb r3, [r4, #2233] @ zero_extendqisi2 + tst r3, #6 + beq .L1677 + ldrb r2, [r4, #2256] @ zero_extendqisi2 + cbnz r2, .L1678 + lsls r3, r3, #31 + bmi .L1677 +.L1678: + movs r0, #0 + bl flash_enter_slc_mode + ldr r1, [r5, #1208] + movs r0, #0 + bl FlashDdrParaScan + movs r0, #0 + bl flash_exit_slc_mode +.L1677: + ldr r3, [r4, #48] + movs r6, #16 + ldrb r0, [r3, #20] @ zero_extendqisi2 + bl FlashBchSel + ldr r0, .L1743+8 + bl FlashReadIdbDataRaw + ldr r0, .L1743+12 + strb r6, [r4, #37] + bl FlashTimingCfg + ldr r5, [r4, #48] + ldrb r2, [r4, #2073] @ zero_extendqisi2 + ldrb r3, [r5, #12] @ zero_extendqisi2 + ldrh r7, [r5, #14] + strh r3, [r4, #132] @ movhi + ldrb r3, [r5, #7] @ zero_extendqisi2 + str r3, [r4, #128] + lsl r3, r2, r6 + orr r3, r3, r2, lsl #8 + ldrb r2, [r4, #2072] @ zero_extendqisi2 + orrs r3, r3, r2 + ldrb r2, [r4, #2075] @ zero_extendqisi2 + orr r3, r3, r2, lsl #24 + str r3, [r4, #124] + ldrb r3, [r4, #2234] @ zero_extendqisi2 + strh r3, [r4, #134] @ movhi + ldrb r3, [r5, #13] @ zero_extendqisi2 + strh r7, [r4, #138] @ movhi + strh r3, [r4, #136] @ movhi + ldrh r3, [r5, #10] + strh r3, [r4, #140] @ movhi + ldrb r1, [r5, #12] @ zero_extendqisi2 + ldrh r0, [r5, #10] + bl __aeabi_idiv + strh r0, [r4, #142] @ movhi + ldrb r2, [r5, #9] @ zero_extendqisi2 + strh r2, [r4, #144] @ movhi + ldrh r1, [r5, #10] + ldrb r3, [r5, #9] @ zero_extendqisi2 + smulbb r3, r3, r1 + mov r1, #512 + strh r1, [r4, #148] @ movhi + ldrb r1, [r4, #37] @ zero_extendqisi2 + uxth r3, r3 + strh r1, [r4, #150] @ movhi + ldrb r1, [r4, #36] @ zero_extendqisi2 + strh r3, [r4, #146] @ movhi + cmp r1, #1 + bne .L1679 + lsls r3, r3, #1 + lsrs r1, r7, #1 + lsls r2, r2, #1 + strb r6, [r4, #37] + strh r3, [r4, #146] @ movhi + movs r3, #8 + strh r1, [r4, #138] @ movhi + strh r2, [r4, #144] @ movhi + strh r3, [r4, #150] @ movhi +.L1679: + ldrb r0, [r5, #20] @ zero_extendqisi2 + bl FlashBchSel + bl ftl_flash_suspend + movs r0, #0 +.L1624: + add sp, sp, #28 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L1641: + cmp r2, #220 + bne .L1643 + mov r1, #4096 + b .L1734 +.L1643: + cmp r2, #211 + itttt eq + moveq r2, #4096 + strheq r2, [r3, #3426] @ movhi + moveq r2, #2 + strbeq r2, [r3, #3425] + b .L1642 +.L1650: + ldrb r0, [r4, #2233] @ zero_extendqisi2 + bl FlashSetInterfaceMode + ldrb r0, [r4, #2233] @ zero_extendqisi2 + b .L1735 +.L1657: + sub r3, r0, #17 + cmp r3, #2 + bhi .L1664 + ldr r3, .L1743+16 + cmp r0, #19 + str r3, [r5, #1200] + beq .L1665 +.L1739: + movs r3, #7 + b .L1737 +.L1665: + movs r3, #15 +.L1737: + strb r3, [r5, #1217] + b .L1656 +.L1664: + cmp r0, #33 + beq .L1666 + sub r3, r0, #65 + cmp r3, #1 + bhi .L1667 +.L1666: + ldr r3, .L1743+20 + str r3, [r5, #1200] + movs r3, #4 + strb r3, [r4, #85] + b .L1739 +.L1667: + sub r3, r0, #67 + uxtb r3, r3 + cmp r3, #1 + bls .L1668 + sub r2, r0, #34 + cmp r2, #1 + bhi .L1669 +.L1668: + ldr r2, .L1743+20 + cmp r0, #35 + str r2, [r5, #1200] + beq .L1670 + cmp r0, #68 + beq .L1670 + movs r2, #7 +.L1736: + cmp r3, #1 + strb r2, [r5, #1217] + ite ls + movls r3, #4 + movhi r3, #5 + strb r3, [r4, #85] + b .L1656 +.L1670: + movs r2, #17 + b .L1736 +.L1669: + cmp r0, #49 + bne .L1673 + ldr r3, .L1743+24 + str r3, [r5, #1200] + b .L1656 +.L1673: + cmp r0, #50 + ittt eq + ldreq r3, .L1743+28 + streq r8, [r4, #2252] + streq r3, [r5, #1200] + b .L1656 +.L1681: + mvn r0, #1 + b .L1624 +.L1637: + strb r0, [r5, #1236] + b .L1636 +.L1744: + .align 2 +.L1743: + .word HynixReadRetrial + .word .LANCHOR0+1244 + .word .LANCHOR2+3476 + .word 150000 + .word MicronReadRetrial + .word ToshibaReadRetrial + .word SamsungReadRetrial + .word samsung_read_retrial + .fnend + .size FlashInit, .-FlashInit + .align 1 + .global FlashPageProgMsbFFData + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FlashPageProgMsbFFData, %function +FlashPageProgMsbFFData: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + mov r6, r0 + ldr r5, .L1765 + mov r7, r1 + mov r4, r2 + ldrb r3, [r5, #152] @ zero_extendqisi2 + cbz r3, .L1746 + ldr r3, [r5, #2252] + cbnz r3, .L1745 +.L1746: + ldr r3, [r5, #48] + ldrb r2, [r3, #19] @ zero_extendqisi2 + subs r3, r2, #5 + uxtb r3, r3 + cmp r3, #30 + bhi .L1747 + ldr r1, .L1765+4 + lsr r3, r1, r3 + lsls r3, r3, #31 + bmi .L1748 +.L1752: + cmp r2, #68 + bne .L1745 +.L1748: + ldr r9, .L1765+8 + movw r10, #65535 + ldr r8, .L1765+12 +.L1750: + ldr r3, [r5, #48] + ldrh r3, [r3, #10] + cmp r3, r4 + bhi .L1751 + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L1751: + add r3, r9, r4, lsl #1 + ldrh r3, [r3, #1220] + cmp r3, r10 + bne .L1745 + mov r2, #32768 + movs r1, #255 + ldr r0, [r8, #1220] + bl ftl_memset + ldr r3, [r8, #1220] + adds r1, r4, r7 + mov r0, r6 + adds r4, r4, #1 + uxth r4, r4 + mov r2, r3 + bl FlashProgPage + b .L1750 +.L1747: + cmp r2, #50 + bne .L1752 + b .L1748 +.L1745: + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L1766: + .align 2 +.L1765: + .word .LANCHOR0 + .word 1073758215 + .word .LANCHOR2 + .word .LANCHOR4 + .fnend + .size FlashPageProgMsbFFData, .-FlashPageProgMsbFFData + .align 1 + .global FlashReadSlc2KPages + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FlashReadSlc2KPages, %function +FlashReadSlc2KPages: + .fnstart + @ args = 0, pretend = 0, frame = 16 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L1824 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r4, r0 + ldr r7, .L1824+4 + mov r8, #0 + .pad #28 + sub sp, sp, #28 + ldrb fp, [r3, #477] @ zero_extendqisi2 + str r1, [sp, #8] + str r2, [sp, #12] +.L1768: + ldr r3, [sp, #8] + cmp r8, r3 + bne .L1792 + movs r0, #0 + add sp, sp, #28 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L1792: + ldr r3, [sp, #8] + add r2, sp, #20 + ldr r1, [sp, #12] + mov r0, r4 + sub r3, r3, r8 + uxtb r3, r3 + str r3, [sp] + add r3, sp, #16 + bl LogAddr2PhyAddr + ldrb r2, [r7, #2234] @ zero_extendqisi2 + ldr r3, [sp, #16] + cmp r2, r3 + bhi .L1769 + mov r3, #-1 + str r3, [r4] +.L1770: + add r8, r8, #1 + adds r4, r4, #36 + b .L1768 +.L1769: + add r3, r3, r7 + mov r9, #0 + ldrb r5, [r3, #2236] @ zero_extendqisi2 + mov r0, r5 + bl NandcWaitFlashReady + mov r0, r5 + bl NandcFlashCs +.L1771: + ldr r1, [sp, #20] + mov r0, r5 + bl FlashReadCmd + mov r0, r5 + bl NandcWaitFlashReady + ldr r3, [r4, #12] + mov r2, fp + movs r1, #0 + mov r0, r5 + str r3, [sp] + ldr r3, [r4, #8] + bl NandcXferData + ldr r3, .L1824+8 + mov r6, r0 + ldrb r3, [r3, #1236] @ zero_extendqisi2 + cmp r3, #0 + bne .L1772 +.L1775: + adds r0, r6, #1 + beq .L1773 +.L1774: + cmp r9, #0 + beq .L1777 +.L1776: + mov r6, #256 +.L1777: + mov r9, #0 +.L1778: + ldr r3, [r7, #40] + mov r0, r5 + ldr r1, [sp, #20] + add r1, r1, r3 + bl FlashReadCmd + mov r0, r5 + bl NandcWaitFlashReady + ldr r3, [r4, #8] + cbz r3, .L1779 + add r3, r3, #2048 +.L1779: + ldr r2, [r4, #12] + cbz r2, .L1780 + adds r2, r2, #8 +.L1780: + str r2, [sp] + movs r1, #0 + mov r2, fp + mov r0, r5 + bl NandcXferData + ldr r3, .L1824+8 + mov r10, r0 + ldrb r2, [r3, #1236] @ zero_extendqisi2 + cmp r2, #0 + bne .L1781 +.L1784: + cmp r10, #-1 + beq .L1782 +.L1783: + cmp r9, #0 + beq .L1786 +.L1785: + mov r10, #256 +.L1786: + mov r0, r5 + bl NandcFlashDeCs + ldrb r3, [r7, #2316] @ zero_extendqisi2 + cmp r6, r10 + it cc + movcc r6, r10 + add r3, r3, r3, lsl #1 + cmp r6, r3, asr #2 + bhi .L1787 + movs r3, #0 +.L1823: + str r3, [r4] + ldr r3, [r4, #12] + cbz r3, .L1788 + ldr r2, [r3, #12] + adds r2, r2, #1 + bne .L1788 + ldr r2, [r3, #8] + adds r1, r2, #1 + bne .L1788 + ldr r3, [r3] + adds r3, r3, #1 + it ne + strne r2, [r4] +.L1788: + ldr r3, [r4] + adds r2, r3, #1 + bne .L1770 + ldr r1, [r4, #4] + ldrb r2, [r7, #2316] @ zero_extendqisi2 + ldr r0, .L1824+12 + bl printk + ldr r1, [r4, #8] + cbz r1, .L1790 + movs r3, #8 + movs r2, #4 + ldr r0, .L1824+16 + bl rknand_print_hex +.L1790: + ldr r1, [r4, #12] + cmp r1, #0 + beq .L1770 + movs r3, #4 + ldr r0, .L1824+20 + mov r2, r3 + bl rknand_print_hex + b .L1770 +.L1772: + mov r0, r5 + bl flash_read_ecc + cmp r0, #5 + bls .L1775 + mov r6, #256 + b .L1774 +.L1773: + cmp r9, #10 + beq .L1776 + add r9, r9, #1 + b .L1771 +.L1781: + mov r0, r5 + bl flash_read_ecc + cmp r0, #5 + bls .L1784 + mov r10, #256 + b .L1783 +.L1782: + cmp r9, #10 + beq .L1785 + add r9, r9, #1 + b .L1778 +.L1787: + mov r3, #256 + b .L1823 +.L1825: + .align 2 +.L1824: + .word .LANCHOR1 + .word .LANCHOR0 + .word .LANCHOR4 + .word .LC99 + .word .LC100 + .word .LC101 + .fnend + .size FlashReadSlc2KPages, .-FlashReadSlc2KPages + .align 1 + .global FlashReadPages + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FlashReadPages, %function +FlashReadPages: + .fnstart + @ args = 0, pretend = 0, frame = 40 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #52 + sub sp, sp, #52 + ldr r4, .L1917 + mov r9, r0 + str r1, [sp, #32] + ldrb r3, [r4, #36] @ zero_extendqisi2 + str r2, [sp, #20] + cbnz r3, .L1827 + ldr r2, .L1917+4 + mov r8, r3 + ldr r10, .L1917+12 + str r3, [sp, #12] + ldrb r2, [r2, #477] @ zero_extendqisi2 + str r2, [sp, #28] + ldrb r2, [r4, #44] @ zero_extendqisi2 + str r2, [sp, #36] +.L1828: + ldr r3, [sp, #12] + ldr r2, [sp, #32] + cmp r3, r2 + bcc .L1866 + movs r0, #0 + b .L1826 +.L1827: + bl FlashReadSlc2KPages +.L1826: + add sp, sp, #52 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L1866: + ldr r2, [sp, #12] + movs r3, #36 + ldr r1, [sp, #20] + muls r3, r2, r3 + add r7, r9, r3 + str r3, [sp, #16] + ldr r3, [r7, #4] + mov r0, r7 + str r3, [sp, #24] + ldr r3, [sp, #32] + subs r3, r3, r2 + add r2, sp, #44 + uxtb r3, r3 + str r3, [sp] + add r3, sp, #40 + bl LogAddr2PhyAddr + ldrb r2, [r4, #2234] @ zero_extendqisi2 + mov r6, r0 + ldr r3, [sp, #40] + cmp r2, r3 + bhi .L1830 + ldr r2, [sp, #16] + mov r3, #-1 + str r3, [r9, r2] +.L1831: + ldr r3, [sp, #12] + adds r3, r3, #1 + str r3, [sp, #12] + b .L1828 +.L1830: + add r3, r3, r4 + ldrb r5, [r3, #2236] @ zero_extendqisi2 + ldrb r3, [r10, #1237] @ zero_extendqisi2 + mov r0, r5 + cmp r3, #0 + it eq + moveq r6, #0 + bl NandcWaitFlashReady + ldr r3, [r4, #48] + ldrb r2, [r3, #19] @ zero_extendqisi2 + subs r3, r2, #1 + cmp r3, #7 + bhi .L1833 + subs r2, r2, #7 + adds r1, r4, r5 + cmp r2, #1 + add r2, r4, r5 + ldrb r3, [r1, #1228] @ zero_extendqisi2 + ldrb r2, [r2, #2068] @ zero_extendqisi2 + it ls + ldrbls r3, [r1, #1236] @ zero_extendqisi2 + cmp r2, r3 + beq .L1833 + ldr r2, .L1917+8 + mov r0, r5 + ldrb r1, [r4, #1217] @ zero_extendqisi2 + bl HynixSetRRPara +.L1833: + mov r0, r5 + bl NandcFlashCs + ldr r3, [sp, #20] + cmp r3, #1 + beq .L1835 + ldr r3, [sp, #24] + cmp r3, #0 + bge .L1836 +.L1835: + ldrb r3, [r4, #152] @ zero_extendqisi2 + cbz r3, .L1836 + mov r0, r5 + bl flash_enter_slc_mode +.L1843: + ldr r1, [sp, #44] + adds r0, r1, #1 + bne .L1838 + cmp r5, #255 + beq .L1868 +.L1838: + cbz r6, .L1840 + ldr r2, [r4, #40] + mov r0, r5 + add r2, r2, r1 + bl FlashReadDpCmd +.L1841: + mov r0, r5 + bl NandcWaitFlashReady + cbz r6, .L1839 + ldr r1, [sp, #44] + mov r0, r5 + bl FlashReadDpDataOutCmd +.L1839: + ldr r3, [r7, #12] + movs r1, #0 + ldr r2, [sp, #28] + mov r0, r5 + str r3, [sp] + ldr r3, [r7, #8] + bl NandcXferData + ldrb r3, [r4, #44] @ zero_extendqisi2 + mov fp, r0 + cbz r3, .L1842 + cmp r0, #-1 + bne .L1842 + mov r3, #0 + movs r6, #0 + strb r3, [r4, #44] + b .L1843 +.L1836: + mov r0, r5 + bl flash_exit_slc_mode + b .L1843 +.L1840: + mov r0, r5 + bl FlashReadCmd + b .L1841 +.L1868: + movs r6, #0 + b .L1839 +.L1842: + cbz r6, .L1844 + ldr r3, [r4, #40] + mov r0, r5 + ldr r1, [sp, #44] + add r1, r1, r3 + bl FlashReadDpDataOutCmd + ldr r3, [sp, #16] + movs r1, #0 + mov r0, r5 + adds r3, r3, #36 + add r3, r3, r9 + ldr r2, [r3, #12] + str r2, [sp] + ldr r2, [sp, #28] + ldr r3, [r3, #8] + bl NandcXferData + cmp r0, #-1 + mov r8, r0 + it eq + moveq r6, #0 +.L1844: + mov r0, r5 + bl NandcFlashDeCs + ldrb r3, [sp, #36] @ zero_extendqisi2 + cmp fp, #-1 + strb r3, [r4, #44] + bne .L1845 + ldrb r3, [r4, #2256] @ zero_extendqisi2 + cbnz r3, .L1846 +.L1850: + ldr r6, [r10, #1200] + cmp r6, #0 + bne .L1847 + ldr r3, [r7, #12] + mov r0, r5 + ldr r2, [r7, #8] + ldr r1, [sp, #44] + bl FlashReadRawPage + b .L1916 +.L1846: + ldr r3, [r4, #88] + mov r0, r5 + ldr r1, [sp, #44] + ldr r6, [r3, #304] + movs r3, #1 + str r3, [sp] + ldr r3, [r7, #12] + ldr r2, [r7, #8] + bl FlashDdrTunningRead + cmp r0, #-1 + mov fp, r0 + beq .L1849 + ldrb r3, [r4, #2316] @ zero_extendqisi2 + cmp r0, r3, lsr #1 + bls .L1869 +.L1849: + ubfx r0, r6, #8, #8 + bl NandcSetDdrPara + cmp fp, #-1 + beq .L1850 +.L1869: + movs r6, #0 +.L1845: + ldrb r3, [r4, #2316] @ zero_extendqisi2 + add r3, r3, r3, lsl #1 + cmp fp, r3, asr #2 + bls .L1858 + ldr r3, [r10, #1200] + cmp r3, #0 + bne .L1858 + mov fp, #256 + b .L1853 +.L1918: + .align 2 +.L1917: + .word .LANCHOR0 + .word .LANCHOR1 + .word .LANCHOR0+1220 + .word .LANCHOR4 +.L1847: + ldr r3, [r7, #12] + mov r0, r5 + ldr r2, [r7, #8] + ldr r1, [sp, #44] + blx r6 + cmp r0, #-1 + mov fp, r0 + bne .L1851 + ldr r3, [r4, #48] + ldrb r3, [r3, #19] @ zero_extendqisi2 + subs r3, r3, #1 + cmp r3, #7 + bhi .L1852 + movs r3, #0 + ldr r2, .L1919 + ldrb r1, [r4, #1217] @ zero_extendqisi2 + mov r0, r5 + bl HynixSetRRPara +.L1852: + ldr r3, [r7, #12] + mov r0, r5 + ldr r2, [r7, #8] + ldr r1, [sp, #44] + bl FlashReadRawPage + ldrb r2, [r4, #2316] @ zero_extendqisi2 + mov fp, r0 + mov r3, r0 + ldr r1, [r7, #4] + ldr r0, .L1919+4 + bl printk + cmp fp, #-1 + bne .L1851 + ldrb r6, [r4, #152] @ zero_extendqisi2 + cbz r6, .L1853 + ldr r3, [sp, #20] + mov r0, r5 + cmp r3, #1 + beq .L1854 + ldr r3, [sp, #24] + cmp r3, #0 + bge .L1855 +.L1854: + bl flash_enter_slc_mode +.L1856: + ldr r6, [r10, #1200] + mov r0, r5 + ldr r3, [r7, #12] + ldr r2, [r7, #8] + ldr r1, [sp, #44] + blx r6 +.L1916: + cmp r0, #-1 + mov fp, r0 + mov r6, #0 + bne .L1858 +.L1853: + ldr r3, [sp, #16] + str fp, [r9, r3] +.L1859: + ldr r3, [sp, #16] + ldr r3, [r9, r3] + adds r2, r3, #1 + bne .L1861 + ldr r1, [r7, #4] + ldrb r2, [r4, #2316] @ zero_extendqisi2 + ldr r0, .L1919+8 + bl printk + ldr r1, [r7, #12] + cbz r1, .L1861 + movs r3, #4 + ldr r0, .L1919+12 + mov r2, r3 + bl rknand_print_hex +.L1861: + cbz r6, .L1863 + ldrb r3, [r4, #2316] @ zero_extendqisi2 + add r3, r3, r3, lsl #1 + cmp r8, r3, asr #2 + bls .L1864 + ldr r3, [r10, #1200] + cmp r3, #0 + it eq + moveq r8, #256 +.L1864: + ldr r3, [sp, #16] + cmp r8, #-1 + add r3, r3, #36 + str r8, [r9, r3] + beq .L1863 + cmp r8, #256 + itt ne + movne r2, #0 + strne r2, [r9, r3] +.L1863: + ldr r3, [sp, #12] + add r3, r3, r6 + str r3, [sp, #12] + ldr r3, [sp, #20] + cmp r3, #1 + beq .L1865 + ldr r3, [sp, #24] + cmp r3, #0 + bge .L1831 +.L1865: + ldrb r3, [r4, #152] @ zero_extendqisi2 + cmp r3, #0 + beq .L1831 + mov r0, r5 + bl flash_exit_slc_mode + b .L1831 +.L1855: + bl flash_exit_slc_mode + b .L1856 +.L1851: + movs r6, #0 +.L1858: + cmp fp, #256 + beq .L1853 + ldr r2, [sp, #16] + movs r3, #0 + str r3, [r9, r2] + b .L1859 +.L1920: + .align 2 +.L1919: + .word .LANCHOR0+1220 + .word .LC102 + .word .LC99 + .word .LC101 + .fnend + .size FlashReadPages, .-FlashReadPages + .align 1 + .global FlashLoadFactorBbt + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FlashLoadFactorBbt, %function +FlashLoadFactorBbt: + .fnstart + @ args = 0, pretend = 0, frame = 56 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + movs r2, #16 + ldr r7, .L1932 + .pad #60 + sub sp, sp, #60 + movs r1, #0 + mov fp, #-1 + ldr r4, .L1932+4 + movs r5, #0 + ldrh r3, [r7, #136] + mov r10, r5 + ldrh r6, [r7, #138] + mov r8, r7 + addw r0, r4, #1238 + mov r9, r4 + smulbb r6, r6, r3 + bl ftl_memset + ldr r3, [r4, #1224] + uxth r6, r6 + str r5, [sp, #28] + str r3, [sp, #32] + add r3, r6, fp + uxth r3, r3 + str r3, [sp, #8] +.L1922: + ldrb r3, [r8, #2234] @ zero_extendqisi2 + uxtb r7, r5 + cmp r3, r7 + bhi .L1928 + mov r0, fp + add sp, sp, #60 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L1928: + ldr r4, [sp, #8] + mul r3, r7, r6 + sub r2, r6, #12 + str r2, [sp, #4] +.L1923: + ldr r2, [sp, #4] + cmp r4, r2 + ble .L1925 + adds r2, r4, r3 + add r0, sp, #20 + lsls r2, r2, #10 + str r3, [sp, #12] + str r2, [sp, #24] + movs r2, #1 + mov r1, r2 + bl FlashReadPages + ldr r2, [sp, #20] + ldr r3, [sp, #12] + adds r2, r2, #1 + beq .L1924 + ldr r2, [r9, #1224] + ldrh r1, [r2] + movw r2, #61664 + cmp r1, r2 + bne .L1924 + add r10, r10, #1 + mov r1, r7 + uxth r10, r10 + add r7, r9, r7, lsl #1 + ldr r0, .L1932+8 + mov r2, r4 + bl printk + strh r4, [r7, #1238] @ movhi +.L1925: + ldrb r3, [r8, #2234] @ zero_extendqisi2 + adds r5, r5, #1 + cmp r3, r10 + it eq + moveq fp, #0 + b .L1922 +.L1924: + subs r4, r4, #1 + uxth r4, r4 + b .L1923 +.L1933: + .align 2 +.L1932: + .word .LANCHOR0 + .word .LANCHOR4 + .word .LC103 + .fnend + .size FlashLoadFactorBbt, .-FlashLoadFactorBbt + .align 1 + .global FlashProgSlc2KPages + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FlashProgSlc2KPages, %function +FlashProgSlc2KPages: + .fnstart + @ args = 0, pretend = 0, frame = 48 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L1961 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r10, r1 + ldr r8, .L1961+20 + .pad #60 + sub sp, sp, #60 + mov r9, r2 + mov r4, r0 + ldrb fp, [r3, #477] @ zero_extendqisi2 + mov r6, r0 + movs r7, #0 +.L1935: + cmp r7, r10 + bne .L1941 + ldr r8, .L1961+24 + mov r10, #0 + ldr fp, .L1961+28 +.L1942: + cmp r7, r10 + bne .L1949 + movs r0, #0 + add sp, sp, #60 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L1941: + sub r3, r10, r7 + add r2, sp, #12 + uxtb r3, r3 + mov r1, r9 + mov r0, r6 + str r3, [sp] + add r3, sp, #16 + bl LogAddr2PhyAddr + ldrb r2, [r8, #2234] @ zero_extendqisi2 + ldr r3, [sp, #16] + cmp r2, r3 + bhi .L1936 + mov r3, #-1 + str r3, [r6] +.L1937: + adds r7, r7, #1 + adds r6, r6, #36 + b .L1935 +.L1936: + add r3, r3, r8 + ldrb r5, [r3, #2236] @ zero_extendqisi2 + mov r0, r5 + bl NandcWaitFlashReady + mov r0, r5 + bl NandcFlashCs + mov r0, r5 + ldr r1, [sp, #12] + bl FlashProgFirstCmd + ldr r3, [r6, #12] + mov r2, fp + movs r1, #1 + mov r0, r5 + str r3, [sp] + ldr r3, [r6, #8] + bl NandcXferData + mov r0, r5 + ldr r1, [sp, #12] + bl FlashProgSecondCmd + mov r0, r5 + bl NandcWaitFlashReady + mov r0, r5 + ldr r1, [sp, #12] + bl FlashReadStatus + sbfx r0, r0, #0, #1 + ldr r1, [sp, #12] + str r0, [r6] + mov r0, r5 + ldr r3, [r8, #40] + add r1, r1, r3 + bl FlashProgFirstCmd + ldr r3, [r6, #8] + cbz r3, .L1938 + add r3, r3, #2048 +.L1938: + ldr r2, [r6, #12] + cbz r2, .L1939 + adds r2, r2, #8 +.L1939: + str r2, [sp] + movs r1, #1 + mov r2, fp + mov r0, r5 + bl NandcXferData + ldr r3, [r8, #40] + mov r0, r5 + ldr r1, [sp, #12] + add r1, r1, r3 + bl FlashProgSecondCmd + mov r0, r5 + bl NandcWaitFlashReady + mov r0, r5 + ldr r1, [sp, #12] + bl FlashReadStatus + lsls r2, r0, #31 + mov r0, r5 + itt mi + movmi r3, #-1 + strmi r3, [r6] + bl NandcFlashDeCs + b .L1937 +.L1949: + ldr r3, [r4] + adds r3, r3, #1 + bne .L1943 + ldr r1, [r4, #4] + ldr r0, .L1961+4 + bl printk +.L1944: + add r10, r10, #1 + adds r4, r4, #36 + b .L1942 +.L1943: + sub r3, r7, r10 + add r2, sp, #12 + uxtb r3, r3 + mov r1, r9 + mov r0, r4 + str r3, [sp] + add r3, sp, #16 + bl LogAddr2PhyAddr + ldr r2, [r8, #1228] + movs r3, #0 + mov r6, r4 + add r5, sp, #20 + str r3, [r2] + ldr r2, [r8, #1232] + str r3, [r2] + ldmia r6!, {r0, r1, r2, r3} + stmia r5!, {r0, r1, r2, r3} + ldmia r6!, {r0, r1, r2, r3} + stmia r5!, {r0, r1, r2, r3} + mov r2, r9 + ldr r3, [r6] + movs r1, #1 + add r0, sp, #20 + str r3, [r5] + ldr r3, [r8, #1228] + str r3, [sp, #28] + ldr r3, [r8, #1232] + str r3, [sp, #32] + bl FlashReadPages + ldr r5, [sp, #20] + adds r3, r5, #1 + bne .L1945 + ldr r1, [r4, #4] + ldr r0, .L1961+8 + bl printk + str r5, [r4] +.L1945: + ldr r5, [sp, #20] + cmp r5, #256 + bne .L1946 + ldr r1, [r4, #4] + ldr r0, .L1961+12 + bl printk + str r5, [r4] +.L1946: + ldr r3, [r4, #12] + cbz r3, .L1947 + ldr r2, [r3] + ldr r3, [r8, #1232] + ldr r3, [r3] + cmp r2, r3 + beq .L1947 + ldr r1, [r4, #4] + ldr r0, .L1961+16 + bl printk + mov r3, #-1 + str r3, [r4] +.L1947: + ldr r3, [r4, #8] + cmp r3, #0 + beq .L1944 + ldr r2, [r3] + ldr r3, [r8, #1228] + ldr r3, [r3] + cmp r2, r3 + beq .L1944 + ldr r1, [r4, #4] + mov r0, fp + bl printk + mov r3, #-1 + str r3, [r4] + b .L1944 +.L1962: + .align 2 +.L1961: + .word .LANCHOR1 + .word .LC104 + .word .LC105 + .word .LC106 + .word .LC107 + .word .LANCHOR0 + .word .LANCHOR4 + .word .LC108 + .fnend + .size FlashProgSlc2KPages, .-FlashProgSlc2KPages + .align 1 + .global FtlLoadFactoryBbt + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FtlLoadFactoryBbt, %function +FtlLoadFactoryBbt: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #12 + movs r6, #0 + ldr r3, .L1973 + ldr r7, .L1973+4 + ldr r5, .L1973+8 + ldr r2, [r3, #3316] + ldr r9, [r3, #3340] + subw r8, r7, #2466 + mov r10, r8 + add fp, r5, #1256 + str r2, [r5, #1264] + str r9, [r5, #1268] +.L1964: + ldrh r3, [r8, #2346] + cmp r6, r3 + bcc .L1969 + movs r0, #0 + add sp, sp, #12 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L1969: + ldrh r4, [r8, #2388] + movw r3, #65535 + strh r3, [r7, #2]! @ movhi + movw r3, #61664 + subs r4, r4, #1 + uxth r4, r4 +.L1965: + ldrh r2, [r10, #2388] + sub r1, r2, #16 + cmp r4, r1 + ble .L1967 + mla r2, r6, r2, r4 + str r3, [sp, #4] + mov r0, fp + lsls r2, r2, #10 + str r2, [r5, #1260] + movs r2, #1 + mov r1, r2 + bl FlashReadPages + ldr r2, [r5, #1256] + ldr r3, [sp, #4] + adds r2, r2, #1 + beq .L1966 + ldrh r2, [r9] + cmp r2, r3 + bne .L1966 + strh r4, [r7] @ movhi +.L1967: + adds r6, r6, #1 + b .L1964 +.L1966: + subs r4, r4, #1 + uxth r4, r4 + b .L1965 +.L1974: + .align 2 +.L1973: + .word .LANCHOR2 + .word .LANCHOR0+2466 + .word .LANCHOR4 + .fnend + .size FtlLoadFactoryBbt, .-FtlLoadFactoryBbt + .align 1 + .global FtlGetLastWrittenPage + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FtlGetLastWrittenPage, %function +FtlGetLastWrittenPage: + .fnstart + @ args = 0, pretend = 0, frame = 104 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L1986 + cmp r1, #1 + push {r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + lsl r8, r0, #10 + .pad #104 + sub sp, sp, #104 + mov r2, r1 + mov r7, r1 + it eq + ldrheq r5, [r3, #2392] + mov r6, #0 + it ne + ldrhne r5, [r3, #2390] + add r3, sp, #40 + str r3, [sp, #16] + movs r1, #1 + add r0, sp, #4 + str r6, [sp, #12] + subs r5, r5, #1 + sxth r5, r5 + orr r3, r5, r8 + str r3, [sp, #8] + bl FlashReadPages + ldr r3, [sp, #40] + adds r3, r3, #1 + bne .L1978 +.L1979: + cmp r6, r5 + ble .L1982 +.L1978: + mov r0, r5 + add sp, sp, #104 + @ sp needed + pop {r4, r5, r6, r7, r8, pc} +.L1982: + adds r3, r6, r5 + mov r2, r7 + add r3, r3, r3, lsr #31 + movs r1, #1 + add r0, sp, #4 + asrs r4, r3, #1 + sxth r3, r4 + orr r3, r3, r8 + str r3, [sp, #8] + bl FlashReadPages + ldr r3, [sp, #40] + adds r3, r3, #1 + bne .L1980 + ldr r3, [sp, #44] + adds r3, r3, #1 + bne .L1980 + ldr r3, [sp, #4] + adds r3, r3, #1 + beq .L1980 + subs r4, r4, #1 + sxth r5, r4 + b .L1979 +.L1980: + adds r4, r4, #1 + sxth r6, r4 + b .L1979 +.L1987: + .align 2 +.L1986: + .word .LANCHOR0 + .fnend + .size FtlGetLastWrittenPage, .-FtlGetLastWrittenPage + .align 1 + .global FtlLoadBbt + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FtlLoadBbt, %function +FtlLoadBbt: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + movw r10, #61649 + ldr r8, .L2016+16 + ldr r5, .L2016 + ldr r3, [r8, #3316] + ldr r7, [r8, #3340] + ldr r4, .L2016+4 + add r9, r5, #1256 + str r3, [r5, #1264] + str r7, [r5, #1268] + bl FtlBbtMemInit + ldrh r6, [r4, #2388] + subs r6, r6, #1 + uxth r6, r6 +.L1989: + ldrh r3, [r4, #2388] + subs r3, r3, #48 + cmp r6, r3 + ble .L1992 + lsls r3, r6, #10 + movs r2, #1 + mov r1, r2 + mov r0, r9 + str r3, [r5, #1260] + bl FlashReadPages + ldr r3, [r5, #1256] + adds r3, r3, #1 + bne .L1990 + ldr r3, [r5, #1260] + movs r2, #1 + mov r1, r2 + mov r0, r9 + adds r3, r3, #1 + str r3, [r5, #1260] + bl FlashReadPages +.L1990: + ldr r3, [r5, #1256] + adds r3, r3, #1 + beq .L1991 + ldrh r3, [r7] + cmp r3, r10 + bne .L1991 + ldr r3, [r7, #4] + strh r6, [r4, #2456] @ movhi + str r3, [r4, #2464] + ldrh r3, [r7, #8] + strh r3, [r4, #2460] @ movhi +.L1992: + ldrh r3, [r4, #2456] + movw r2, #65535 + cmp r3, r2 + beq .L2006 + ldrh r3, [r4, #2460] + cmp r3, r2 + beq .L1996 + lsls r3, r3, #10 + movs r2, #1 + mov r1, r2 + ldr r0, .L2016+8 + str r3, [r5, #1260] + bl FlashReadPages + ldr r3, [r5, #1256] + adds r3, r3, #1 + beq .L1996 + ldrh r2, [r7] + movw r3, #61649 + cmp r2, r3 + bne .L1996 + ldr r3, [r7, #4] + ldr r2, [r4, #2464] + cmp r3, r2 + bls .L1996 + ldrh r2, [r4, #2460] + str r3, [r4, #2464] + ldrh r3, [r7, #8] + strh r2, [r4, #2456] @ movhi + strh r3, [r4, #2460] @ movhi +.L1996: + ldr r9, .L2016+8 + movs r1, #1 + ldrh r0, [r4, #2456] + movw r10, #61649 + bl FtlGetLastWrittenPage + sxth r6, r0 + adds r0, r0, #1 + strh r0, [r4, #2458] @ movhi +.L1998: + cmp r6, #0 + blt .L2003 + ldrh r3, [r4, #2456] + movs r2, #1 + mov r1, r2 + mov r0, r9 + orr r3, r6, r3, lsl #10 + str r3, [r5, #1260] + ldr r3, [r8, #3316] + str r3, [r5, #1264] + bl FlashReadPages + ldr r3, [r5, #1256] + adds r3, r3, #1 + beq .L1999 + ldrh r3, [r7] + cmp r3, r10 + bne .L1999 +.L2003: + ldrh r3, [r7, #10] + ldrh r0, [r7, #12] + strh r3, [r4, #2462] @ movhi + movw r3, #65535 + cmp r0, r3 + bne .L2000 +.L2001: + ldr r7, .L2016+12 + movs r6, #0 +.L2004: + ldrh r3, [r4, #2346] + cmp r6, r3 + bcc .L2005 + movs r0, #0 + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L1991: + subs r6, r6, #1 + uxth r6, r6 + b .L1989 +.L1999: + subs r6, r6, #1 + sxth r6, r6 + b .L1998 +.L2000: + ldr r2, [r4, #2320] + cmp r0, r2 + beq .L2001 + ldrh r3, [r4, #2334] + lsrs r3, r3, #2 + cmp r2, r3 + bcs .L2001 + cmp r0, r3 + bcs .L2001 + bl FtlSysBlkNumInit + b .L2001 +.L2005: + ldrh r2, [r8, #3404] + ldr r1, [r5, #1264] + ldr r0, [r7, #4]! + lsls r2, r2, #2 + mla r1, r6, r2, r1 + adds r6, r6, #1 + bl ftl_memcpy + b .L2004 +.L2006: + mov r0, #-1 + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L2017: + .align 2 +.L2016: + .word .LANCHOR4 + .word .LANCHOR0 + .word .LANCHOR4+1256 + .word .LANCHOR0+2480 + .word .LANCHOR2 + .fnend + .size FtlLoadBbt, .-FtlLoadBbt + .align 1 + .global FtlScanSysBlk + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FtlScanSysBlk, %function +FtlScanSysBlk: + .fnstart + @ args = 0, pretend = 0, frame = 24 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + movs r6, #0 + ldr r5, .L2098 + mov r1, r6 + .pad #28 + sub sp, sp, #28 + ldr r4, .L2098+4 + ldr r2, [r5, #2420] + mov fp, r5 + strh r6, [r5, #2438] @ movhi + ldr r0, [r4, #3396] + strh r6, [r4, #3452] @ movhi + lsls r2, r2, #2 + bl ftl_memset + ldr r2, [r5, #2420] + mov r1, r6 + ldr r0, [r4, #3368] + lsls r2, r2, #1 + bl ftl_memset + ldrh r2, [r5, #2412] + mov r1, r6 + ldr r0, [r4, #3380] + lsls r2, r2, #2 + bl ftl_memset + ldrh r2, [r5, #2412] + mov r1, r6 + ldr r0, [r5, #2440] + mov r6, r5 + lsls r2, r2, #1 + bl ftl_memset + movs r2, #16 + movs r1, #255 + add r0, r4, #540 + bl ftl_memset + ldrh r3, [r5, #2332] + str r3, [sp, #4] +.L2019: + ldrh r3, [r6, #2334] + ldr r2, [sp, #4] + cmp r3, r2 + bls .L2060 + ldr r2, [r4, #1148] + movs r7, #0 + ldrh r8, [r6, #2324] + mov r10, #36 + ldr r9, [r4, #3304] + str r2, [sp, #8] + ldr r3, [r4, #1144] + ldrh r2, [r6, #2402] + str r7, [sp] + b .L2061 +.L2022: + str r3, [sp, #16] + ldr r3, .L2098+8 + ldr r1, [sp, #4] + str r2, [sp, #20] + ldrb r0, [r3, r7] @ zero_extendqisi2 + bl V2P_block + str r0, [sp, #12] + bl FtlBbmIsBadBlock + ldr r3, [sp, #16] + ldr r2, [sp, #20] + cbnz r0, .L2020 + ldr r1, [sp] + mla r0, r10, r1, r9 + ldr r1, [sp, #12] + lsls r1, r1, #10 + str r3, [r0, #8] + str r1, [r0, #4] + ldr r1, [sp] + muls r1, r2, r1 + it mi + addmi r1, r1, #3 + bic ip, r1, #3 + ldr r1, [sp, #8] + add r1, r1, ip + str r1, [r0, #12] + ldr r1, [sp] + adds r1, r1, #1 + uxth r1, r1 + str r1, [sp] +.L2020: + adds r7, r7, #1 +.L2061: + uxth r1, r7 + cmp r8, r1 + bhi .L2022 + ldr r3, [sp] + cbnz r3, .L2023 +.L2059: + ldr r3, [sp, #4] + adds r3, r3, #1 + uxth r3, r3 + str r3, [sp, #4] + b .L2019 +.L2023: + movs r2, #1 + ldr r1, [sp] + mov r0, r9 + bl FlashReadPages + movs r3, #0 +.L2096: + str r3, [sp, #8] + ldr r2, [sp] + ldrh r3, [sp, #8] + cmp r2, r3 + bls .L2059 + ldr r3, [sp, #8] + movs r2, #36 + mul r9, r2, r3 + ldr r3, [r4, #3304] + add r2, r3, r9 + ldr r3, [r3, r9] + ldr r7, [r2, #4] + ldr r8, [r2, #12] + adds r3, r3, #1 + ubfx r7, r7, #10, #16 + bne .L2027 + mov r10, #16 +.L2029: + ldr r0, [r4, #3304] + movs r2, #1 + mov r1, r2 + add r0, r0, r9 + ldr r3, [r0, #4] + adds r3, r3, #1 + str r3, [r0, #4] + bl FlashReadPages + ldrh r3, [r8] + movw r2, #65535 + cmp r3, r2 + ldr r3, [r4, #3304] + bne .L2026 + mov r2, #-1 + str r2, [r3, r9] + ldr r3, [r4, #3304] + ldr r3, [r3, r9] + cmp r3, r2 + beq .L2028 +.L2027: + ldr r2, [r4, #508] + ldr r3, [r8, #4] + adds r1, r2, #1 + beq .L2030 + cmp r2, r3 + bhi .L2031 +.L2030: + adds r2, r3, #1 + itt ne + addne r2, r3, #1 + strne r2, [r4, #508] +.L2031: + ldrh r2, [r8] + movw r1, #61604 + cmp r2, r1 + beq .L2033 + bhi .L2034 + movw r3, #61574 + cmp r2, r3 + beq .L2035 +.L2032: + ldr r3, [sp, #8] + adds r3, r3, #1 + b .L2096 +.L2026: + ldr r3, [r3, r9] + adds r3, r3, #1 + bne .L2027 + add r10, r10, #-1 + uxth r10, r10 + cmp r10, #0 + bne .L2029 +.L2028: + ldrb r1, [r6, #152] @ zero_extendqisi2 + cbnz r1, .L2097 +.L2057: + mov r0, r7 + bl FtlFreeSysBlkQueueIn + b .L2032 +.L2034: + movw r3, #61634 + cmp r2, r3 + beq .L2036 + movw r3, #65535 + cmp r2, r3 + bne .L2032 +.L2097: + movs r1, #0 + b .L2057 +.L2036: + ldr r1, [r5, #2420] + ldrh r0, [r4, #3452] + ldr r9, [r4, #3396] + uxth ip, r1 + add r3, ip, #-1 + sub ip, ip, r0 + add ip, ip, #-1 + sxth r3, r3 + sxth ip, ip +.L2038: + cmp r3, ip + bgt .L2044 + cmp r3, #0 + bge .L2074 + b .L2032 +.L2044: + ldr r2, [r8, #4] + lsl r10, r3, #2 + mov lr, r2 + ldr r2, [r9, r3, lsl #2] + cmp lr, r2 + bls .L2039 + ldr r2, [r9] + cbnz r2, .L2040 + cmp r1, r0 + itt ne + addne r0, r0, #1 + strhne r0, [r4, #3452] @ movhi +.L2040: + uxth ip, r3 + movs r2, #0 +.L2041: + uxth r0, r2 + sxth r1, r2 + cmp r0, ip + bcc .L2042 + ldr r2, [r4, #3396] + cmp r3, #0 + ldr r1, [r8, #4] + str r1, [r2, r10] + ldr r2, [r4, #3368] + strh r7, [r2, r3, lsl #1] @ movhi + blt .L2032 + ldrh r0, [r4, #3452] + ldr r2, [r5, #2420] + subs r2, r2, r0 + subs r2, r2, #1 + sxth r2, r2 + cmp r3, r2 + bgt .L2032 +.L2074: + ldr r2, [r4, #3396] + adds r0, r0, #1 + ldr r1, [r8, #4] + strh r0, [r4, #3452] @ movhi + str r1, [r2, r3, lsl #2] + ldr r2, [r4, #3368] +.L2094: + strh r7, [r2, r3, lsl #1] @ movhi + b .L2032 +.L2042: + ldr r0, [r4, #3396] + adds r2, r2, #1 + add lr, r0, r1, lsl #2 + ldr lr, [lr, #4] + str lr, [r0, r1, lsl #2] + ldr r0, [r4, #3368] + add lr, r0, r1, lsl #1 + ldrh lr, [lr, #2] + strh lr, [r0, r1, lsl #1] @ movhi + b .L2041 +.L2039: + subs r3, r3, #1 + sxth r3, r3 + b .L2038 +.L2099: + .align 2 +.L2098: + .word .LANCHOR0 + .word .LANCHOR2 + .word .LANCHOR0+2350 +.L2035: + ldrh lr, [r5, #2412] + ldrh r0, [r5, #2438] + ldr r9, [r4, #3380] + add ip, lr, #-1 + sxth r3, ip + sub ip, ip, r0 +.L2047: + cmp r3, ip + ble .L2052 + ldr r2, [r8, #4] + lsl r10, r3, #2 + ldr r1, [r9, r3, lsl #2] + cmp r2, r1 + bls .L2048 + ldr r2, [r9] + cbnz r2, .L2049 + cmp lr, r0 + itt ne + addne r0, r0, #1 + strhne r0, [r6, #2438] @ movhi +.L2049: + uxth ip, r3 + movs r2, #0 +.L2050: + uxth r0, r2 + sxth r1, r2 + cmp r0, ip + bcc .L2051 + ldr r2, [r4, #3380] + ldr r1, [r8, #4] + str r1, [r2, r10] + ldr r2, [r6, #2440] + strh r7, [r2, r3, lsl #1] @ movhi +.L2052: + cmp r3, #0 + blt .L2032 + ldrh r2, [r6, #2412] + ldrh r1, [r6, #2438] + subs r2, r2, #1 + subs r2, r2, r1 + sxth r2, r2 + cmp r3, r2 + bgt .L2032 + adds r1, r1, #1 + ldr r2, [r4, #3380] + strh r1, [r6, #2438] @ movhi + ldr r1, [r8, #4] + str r1, [r2, r3, lsl #2] + ldr r2, [r6, #2440] + b .L2094 +.L2051: + ldr r0, [r4, #3380] + adds r2, r2, #1 + add lr, r0, r1, lsl #2 + ldr lr, [lr, #4] + str lr, [r0, r1, lsl #2] + ldr r0, [r6, #2440] + add lr, r0, r1, lsl #1 + ldrh lr, [lr, #2] + strh lr, [r0, r1, lsl #1] @ movhi + b .L2050 +.L2048: + subs r3, r3, #1 + sxth r3, r3 + b .L2047 +.L2033: + ldrh r1, [r4, #540] + movw r2, #65535 + cmp r1, r2 + bne .L2054 + strh r7, [r4, #540] @ movhi +.L2095: + str r3, [r4, #548] + b .L2032 +.L2054: + ldrh r0, [r4, #544] + cmp r0, r2 + beq .L2055 + movs r1, #1 + bl FtlFreeSysBlkQueueIn +.L2055: + ldr r2, [r4, #548] + ldr r3, [r8, #4] + cmp r2, r3 + bcs .L2056 + ldrh r3, [r4, #540] + strh r7, [r4, #540] @ movhi + strh r3, [r4, #544] @ movhi + ldr r3, [r8, #4] + b .L2095 +.L2056: + strh r7, [r4, #544] @ movhi + b .L2032 +.L2060: + ldr r1, [r4, #3368] + ldrh r3, [r1] + cbz r3, .L2062 +.L2065: + ldr r1, [r5, #2440] + ldrh r2, [r1] + cbz r2, .L2063 +.L2085: + movs r0, #0 + add sp, sp, #28 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2062: + ldrh r2, [r4, #3452] + cmp r2, #0 + beq .L2065 + ldr r0, [r6, #2420] +.L2066: + sxth r2, r3 + cmp r2, r0 + bcs .L2065 + ldrh r6, [r1, r2, lsl #1] + adds r3, r3, #1 + cmp r6, #0 + beq .L2066 + mov r3, r2 + movs r7, #0 +.L2067: + ldr r1, [fp, #2420] + cmp r3, r1 + bcs .L2065 + ldr r1, [r4, #3368] + subs r0, r3, r2 + ldrh r6, [r1, r3, lsl #1] + strh r6, [r1, r0, lsl #1] @ movhi + ldr r1, [r4, #3396] + ldr r6, [r1, r3, lsl #2] + str r6, [r1, r0, lsl #2] + ldr r1, [r4, #3368] + strh r7, [r1, r3, lsl #1] @ movhi + adds r3, r3, #1 + sxth r3, r3 + b .L2067 +.L2063: + ldrh r3, [r5, #2438] + cmp r3, #0 + beq .L2085 + ldrh r0, [r5, #2412] +.L2070: + sxth r3, r2 + cmp r3, r0 + mov r5, r3 + bge .L2085 + ldrh r6, [r1, r3, lsl #1] + adds r2, r2, #1 + cmp r6, #0 + beq .L2070 + movs r0, #0 +.L2071: + ldrh r2, [fp, #2412] + cmp r3, r2 + bge .L2085 + ldr r2, [fp, #2440] + subs r1, r3, r5 + ldrh r6, [r2, r3, lsl #1] + strh r6, [r2, r1, lsl #1] @ movhi + ldr r2, [r4, #3380] + ldr r6, [r2, r3, lsl #2] + str r6, [r2, r1, lsl #2] + ldr r2, [fp, #2440] + strh r0, [r2, r3, lsl #1] @ movhi + adds r3, r3, #1 + sxth r3, r3 + b .L2071 + .fnend + .size FtlScanSysBlk, .-FtlScanSysBlk + .align 1 + .global FtlLoadSysInfo + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FtlLoadSysInfo, %function +FtlLoadSysInfo: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + movs r1, #0 + ldr r4, .L2128 + .pad #36 + sub sp, sp, #36 + ldr r5, .L2128+4 + ldr r3, [r4, #3316] + ldr r6, .L2128+8 + ldrh r2, [r5, #2332] + ldr r0, [r4, #300] + str r3, [r6, #1264] + ldr r3, [r4, #3340] + lsls r2, r2, #1 + str r3, [r6, #1268] + bl ftl_memset + ldrh r0, [r4, #540] + movw r3, #65535 + cmp r0, r3 + bne .L2101 +.L2112: + mov r0, #-1 +.L2100: + add sp, sp, #36 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2101: + movs r1, #1 + ldr fp, .L2128+36 + bl FtlGetLastWrittenPage + ldrsh r9, [r4, #540] + add r10, r6, #1256 + sxth r7, r0 + adds r0, r0, #1 + strh r0, [r4, #542] @ movhi +.L2103: + cmp r7, #0 + blt .L2111 + orr r3, r7, r9, lsl #10 + movs r2, #1 + mov r1, r2 + str r3, [r6, #1260] + mov r0, r10 + ldr r3, [r4, #3316] + str r3, [r6, #1264] + bl FlashReadPages + ldrb r3, [r5, #36] @ zero_extendqisi2 + cmp r3, #0 + beq .L2104 + ldr r8, [r6, #1268] + ldr r3, [r8, #12] + str r3, [sp, #28] + cbz r3, .L2104 + ldr r2, [r6, #1264] + ldrh r1, [r5, #2400] + mov r0, r2 + str r2, [sp, #24] + bl js_hash + ldr r3, [sp, #28] + cmp r3, r0 + beq .L2104 + cbnz r7, .L2105 + ldrh r1, [r4, #544] + ldr r2, [sp, #24] + cmp r9, r1 + beq .L2105 + ldr r2, [r2] + mov r0, fp + str r3, [sp, #12] + ldrh r1, [r4, #540] + str r2, [sp, #16] + ldr r3, [r8, #8] + ldr r2, [r6, #1256] + str r3, [sp, #8] + ldr r3, [r8, #4] + str r3, [sp, #4] + ldr r3, [r8] + str r3, [sp] + ldr r3, [r6, #1260] + bl printk + ldrsh r9, [r4, #544] + ldrh r7, [r5, #2392] +.L2107: + subs r7, r7, #1 + sxth r7, r7 + b .L2103 +.L2105: + mov r3, #-1 + str r3, [r6, #1256] +.L2104: + ldr r3, [r6, #1256] + adds r3, r3, #1 + beq .L2107 + ldr r3, [r4, #3316] + ldr r2, .L2128+12 + ldr r3, [r3] + cmp r3, r2 + bne .L2107 + ldr r3, [r4, #3340] + ldrh r2, [r3] + movw r3, #61604 + cmp r2, r3 + bne .L2107 +.L2111: + movs r2, #48 + ldr r1, [r6, #1264] + ldr r0, .L2128+16 + bl ftl_memcpy + ldrh r2, [r5, #2332] + ldr r1, [r6, #1264] + ldr r0, [r4, #300] + lsls r2, r2, #1 + adds r1, r1, #48 + bl ftl_memcpy + ldrh r1, [r5, #2332] + ldr r3, [r6, #1264] + ldr r0, [r5, #32] + lsrs r2, r1, #3 + lsls r1, r1, #1 + adds r1, r1, #51 + adds r2, r2, #4 + bic r1, r1, #3 + add r1, r1, r3 + bl ftl_memcpy + ldrh r3, [r5, #2436] + cbz r3, .L2109 + ldrh r1, [r5, #2332] + ldrh r2, [r5, #2428] + ldr r0, [r4, #3392] + lsrs r3, r1, #3 + lsls r2, r2, #2 + add r3, r3, r1, lsl #1 + ldr r1, [r6, #1264] + adds r3, r3, #52 + ubfx r3, r3, #2, #14 + add r1, r1, r3, lsl #2 + bl ftl_memcpy +.L2109: + ldr r2, [r4, #244] + ldr r3, .L2128+12 + cmp r2, r3 + bne .L2112 + ldrb r1, [r4, #254] @ zero_extendqisi2 + ldrh r3, [r5, #2346] + ldrh r2, [r4, #252] + cmp r1, r3 + strh r2, [r4, #546] @ movhi + bne .L2112 + ldrh r3, [r5, #2390] + ldrh r1, [r5, #2396] + ldr r0, [r5, #2336] + str r2, [r6, #1292] + muls r3, r2, r3 + str r3, [r5, #2452] + muls r3, r1, r3 + ldrh r1, [r5, #2324] + str r3, [r5, #2432] + ldrh r3, [r5, #2462] + subs r0, r0, r3 + subs r0, r0, r2 + bl __aeabi_uidiv + ldrh r3, [r4, #260] + strh r0, [r4, #536] @ movhi + ldrh r1, [r4, #258] + lsrs r2, r3, #6 + and r3, r3, #63 + strb r3, [r4, #326] + strh r2, [r4, #322] @ movhi + ldrh r2, [r4, #262] + ldrb r3, [r4, #255] @ zero_extendqisi2 + strh r1, [r4, #320] @ movhi + strh r2, [r4, #368] @ movhi + ldrh r2, [r4, #264] + strb r3, [r4, #328] + movw r3, #65535 + strh r3, [r4, #556] @ movhi + movs r3, #0 + strh r3, [r4, #558] @ movhi + lsrs r0, r2, #6 + and r2, r2, #63 + strb r2, [r4, #374] + ldrb r2, [r4, #256] @ zero_extendqisi2 + strh r0, [r4, #370] @ movhi + strb r3, [r4, #562] + strb r2, [r4, #376] + ldrh r2, [r4, #266] + strb r3, [r4, #564] + strh r2, [r4, #416] @ movhi + ldrh r2, [r4, #268] + lsrs r0, r2, #6 + and r2, r2, #63 + strb r2, [r4, #422] + ldrb r2, [r4, #257] @ zero_extendqisi2 + strh r0, [r4, #418] @ movhi + strb r2, [r4, #424] + str r3, [r4, #496] + ldr r2, [r4, #276] + str r3, [r4, #484] + str r3, [r4, #476] + str r3, [r4, #492] + str r2, [r4, #516] + str r3, [r4, #520] + ldr r2, [r4, #508] + str r3, [r4, #528] + str r3, [r4, #488] + ldr r3, [r4, #284] + cmp r3, r2 + ldr r2, [r4, #512] + it hi + strhi r3, [r4, #508] + ldr r3, [r4, #280] + cmp r3, r2 + it hi + strhi r3, [r4, #512] + movw r3, #65535 + cmp r1, r3 + beq .L2115 + ldr r0, .L2128+20 + bl make_superblock +.L2115: + ldrh r2, [r4, #368] + movw r3, #65535 + cmp r2, r3 + beq .L2116 + ldr r0, .L2128+24 + bl make_superblock +.L2116: + ldrh r2, [r4, #416] + movw r3, #65535 + cmp r2, r3 + beq .L2117 + ldr r0, .L2128+28 + bl make_superblock +.L2117: + ldrh r2, [r4, #556] + movw r3, #65535 + cmp r2, r3 + beq .L2118 + ldr r0, .L2128+32 + bl make_superblock +.L2118: + movs r0, #0 + b .L2100 +.L2129: + .align 2 +.L2128: + .word .LANCHOR2 + .word .LANCHOR0 + .word .LANCHOR4 + .word 1179929683 + .word .LANCHOR2+244 + .word .LANCHOR2+320 + .word .LANCHOR2+368 + .word .LANCHOR2+416 + .word .LANCHOR2+556 + .word .LC109 + .fnend + .size FtlLoadSysInfo, .-FtlLoadSysInfo + .align 1 + .global FtlDumpBlockInfo + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FtlDumpBlockInfo, %function +FtlDumpBlockInfo: + .fnstart + @ args = 0, pretend = 0, frame = 72 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + ubfx r0, r0, #10, #16 + ldr r4, .L2144 + .pad #100 + sub sp, sp, #100 + mov r9, r1 + ldr r7, .L2144+4 + bl P2V_block_in_plane + ldr r1, .L2144+8 + mov r6, r0 + ldr r0, .L2144+12 + ldrh r8, [r4, #2390] + bl printk + ldr r3, [r7, #300] + mov r1, r6 + ldr r0, .L2144+16 + ldrh r2, [r3, r6, lsl #1] + bl printk + add r0, sp, #96 + strh r6, [r0, #-48]! @ movhi + bl make_superblock + ldrb r5, [r4, #152] @ zero_extendqisi2 + str r7, [sp, #44] + cbz r5, .L2131 + cmp r9, #0 + bne .L2142 + mov r0, r6 + bl ftl_get_blk_mode + cmp r0, #1 + mov r5, r0 + bne .L2131 + ldrh r8, [r4, #2392] +.L2131: + ldr r9, .L2144 + mov r2, r8 + ldrh r3, [r4, #2390] + mov r1, r5 + ldr r0, .L2144+20 + mov r10, #36 + bl printk + movs r3, #0 + str r3, [sp, #28] +.L2132: + ldr r3, .L2144+4 + add ip, sp, #62 + ldrh fp, [r9, #2324] + movw lr, #65535 + ldrh r7, [r9, #2402] + ldr r2, [r3, #1144] + ldr r0, [r3, #3304] + ldr r3, [r3, #1148] + str r2, [sp, #32] + ldrh r2, [r9, #2400] + str r3, [sp, #40] + str r2, [sp, #36] + movs r2, #0 + mov r4, r2 +.L2133: + uxth r3, r2 + cmp fp, r3 + bhi .L2137 + ldr fp, .L2144+24 + movs r7, #0 + mov r2, r5 + mov r1, r4 + bl FlashReadPages +.L2138: + uxth r3, r7 + cmp r4, r3 + bhi .L2139 + ldr r6, [sp, #28] + adds r6, r6, #1 + uxth r3, r6 + cmp r8, r3 + str r3, [sp, #28] + bne .L2132 +.L2140: + movs r0, #0 + add sp, sp, #100 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2142: + movs r5, #0 + b .L2131 +.L2137: + ldrh r3, [ip, #2]! + cmp r3, lr + beq .L2134 + ldr r6, [sp, #28] + mla r1, r10, r4, r0 + orr r3, r6, r3, lsl #10 + ldr r6, [sp, #32] + str r3, [r1, #4] + ldr r3, [sp, #36] + muls r3, r4, r3 + it mi + addmi r3, r3, #3 + bic r3, r3, #3 + add r3, r3, r6 + ldr r6, [sp, #40] + str r3, [r1, #8] + mov r3, r7 + muls r3, r4, r3 + add r4, r4, #1 + it mi + addmi r3, r3, #3 + uxth r4, r4 + bic r3, r3, #3 + add r3, r3, r6 + str r3, [r1, #12] +.L2134: + adds r2, r2, #1 + b .L2133 +.L2139: + ldr r3, [sp, #44] + mul r0, r10, r7 + ldrh r1, [sp, #48] + adds r7, r7, #1 + ldr ip, [r3, #3304] + add r2, ip, r0 + ldr lr, [r2, #8] + ldr r3, [r2, #12] + ldr r6, [lr, #4] + str r6, [sp, #20] + ldr r6, [lr] + str r6, [sp, #16] + ldr r6, [r3, #12] + str r6, [sp, #12] + ldr r6, [r3, #8] + str r6, [sp, #8] + ldr r6, [r3, #4] + str r6, [sp, #4] + ldr r3, [r3] + str r3, [sp] + ldr r3, [r2, #4] + ldr r2, [ip, r0] + mov r0, fp + bl printk + b .L2138 +.L2145: + .align 2 +.L2144: + .word .LANCHOR0 + .word .LANCHOR2 + .word .LANCHOR3+141 + .word .LC110 + .word .LC111 + .word .LC112 + .word .LC113 + .fnend + .size FtlDumpBlockInfo, .-FtlDumpBlockInfo + .align 1 + .global FtlScanAllBlock + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FtlScanAllBlock, %function +FtlScanAllBlock: + .fnstart + @ args = 0, pretend = 0, frame = 56 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + movs r7, #0 + ldr r5, .L2158 + .pad #84 + sub sp, sp, #84 + ldr r1, .L2158+4 + ldr r0, .L2158+8 + bl printk +.L2147: + ldr r3, .L2158+12 + uxth r0, r7 + ldrh r3, [r3, #2334] + cmp r3, r0 + bhi .L2157 + movs r0, #0 + add sp, sp, #84 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2157: + add r4, sp, #80 + movw r10, #65535 + strh r0, [r4, #-48]! @ movhi + mov fp, #36 + bl ftl_get_blk_mode + ldr r2, [r5, #300] + uxth r1, r7 + mov r3, r0 + ldr r0, .L2158+16 + ldrh r2, [r2, r1, lsl #1] + bl printk + mov r0, r4 + bl make_superblock + ldr r3, .L2158+12 + movs r2, #0 + ldr r0, [r5, #3304] + add r8, sp, #46 + ldr r9, [r5, #1148] + mov r4, r2 + ldrh ip, [r3, #2324] + ldr r3, [r5, #1144] + str r3, [sp, #24] + ldr r3, .L2158+12 + ldrh r3, [r3, #2400] + str r3, [sp, #28] + ldr r3, .L2158+12 + ldrh lr, [r3, #2402] +.L2148: + uxth r3, r2 + cmp ip, r3 + bhi .L2152 + ldr r10, .L2158+20 + mov r8, #0 + mov r9, #36 + movs r2, #0 + mov r1, r4 + bl FlashReadPages +.L2153: + uxth r3, r8 + cmp r4, r3 + bhi .L2154 + ldr r10, .L2158+24 + mov r8, #0 + mov r9, #36 + movs r2, #1 + mov r1, r4 + ldr r0, [r5, #3304] + bl FlashReadPages +.L2155: + uxth r3, r8 + cmp r4, r3 + bhi .L2156 + adds r7, r7, #1 + b .L2147 +.L2152: + ldrh r3, [r8, #2]! + cmp r3, r10 + beq .L2149 + mla r1, fp, r4, r0 + ldr r6, [sp, #24] + lsls r3, r3, #10 + str r3, [r1, #4] + ldr r3, [sp, #28] + muls r3, r4, r3 + it mi + addmi r3, r3, #3 + bic r3, r3, #3 + add r3, r3, r6 + str r3, [r1, #8] + mov r3, lr + muls r3, r4, r3 + add r4, r4, #1 + it mi + addmi r3, r3, #3 + uxth r4, r4 + bic r3, r3, #3 + add r3, r3, r9 + str r3, [r1, #12] +.L2149: + adds r2, r2, #1 + b .L2148 +.L2154: + mul r2, r9, r8 + ldr r0, [r5, #3304] + ldrh r1, [sp, #32] + add r8, r8, #1 + add lr, r0, r2 + ldr fp, [lr, #8] + ldr r3, [lr, #12] + ldr r6, [fp, #4] + str r6, [sp, #20] + ldr r6, [fp] + str r6, [sp, #16] + ldr r6, [r3, #12] + str r6, [sp, #12] + ldr r6, [r3, #8] + str r6, [sp, #8] + ldr r6, [r3, #4] + str r6, [sp, #4] + ldr r3, [r3] + str r3, [sp] + ldr r2, [r0, r2] + mov r0, r10 + ldr r3, [lr, #4] + bl printk + b .L2153 +.L2156: + mul r2, r9, r8 + ldr r0, [r5, #3304] + ldrh r1, [sp, #32] + add r8, r8, #1 + add lr, r0, r2 + ldr fp, [lr, #8] + ldr r3, [lr, #12] + ldr r6, [fp, #4] + str r6, [sp, #20] + ldr r6, [fp] + str r6, [sp, #16] + ldr r6, [r3, #12] + str r6, [sp, #12] + ldr r6, [r3, #8] + str r6, [sp, #8] + ldr r6, [r3, #4] + str r6, [sp, #4] + ldr r3, [r3] + str r3, [sp] + ldr r2, [r0, r2] + mov r0, r10 + ldr r3, [lr, #4] + bl printk + b .L2155 +.L2159: + .align 2 +.L2158: + .word .LANCHOR2 + .word .LANCHOR3+158 + .word .LC110 + .word .LANCHOR0 + .word .LC114 + .word .LC115 + .word .LC116 + .fnend + .size FtlScanAllBlock, .-FtlScanAllBlock + .align 1 + .global ftl_scan_all_ppa + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type ftl_scan_all_ppa, %function +ftl_scan_all_ppa: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #28 + sub sp, sp, #28 + ldr r5, .L2176 + ldr r6, .L2176+4 + ldrh r4, [r5, #2388] + subs r4, r4, #16 + lsl r10, r4, #10 +.L2161: + ldrh r3, [r5, #2388] + cmp r4, r3 + blt .L2169 + ldr r1, .L2176+8 + ldr r0, .L2176+12 + add sp, sp, #28 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, lr} + b printk +.L2169: + uxth r8, r4 + mov r0, r8 + bl ftl_get_blk_mode + ldrb r3, [r5, #152] @ zero_extendqisi2 + cbz r3, .L2162 + ldrh r3, [r5, #2332] + cmp r4, r3 + bge .L2163 + ldrh r3, [r5, #2404] + cmp r4, r3 + blt .L2163 +.L2162: + cmp r0, #1 + bne .L2164 +.L2163: + ldrh r7, [r5, #2392] + mov r9, #-2147483648 +.L2165: + mov r3, r9 + mov r2, r7 + mov r1, r4 + ldr r0, .L2176+16 + bl printk + mov r0, r8 + bl FtlBbmIsBadBlock + cbz r0, .L2166 + mov r3, r9 + mov r2, r7 + mov r1, r4 + ldr r0, .L2176+20 + bl printk +.L2166: + ldr fp, .L2176+32 + mov r8, #0 +.L2167: + cmp r8, r7 + bne .L2168 + adds r4, r4, #1 + add r10, r10, #1024 + b .L2161 +.L2164: + ldrh r7, [r5, #2390] + mov r9, #0 + b .L2165 +.L2168: + add r3, r9, r10 + movs r2, #0 + add r3, r3, r8 + movs r1, #1 + str r3, [r6, #1260] + add r8, r8, #1 + ldr r3, [fp, #3316] + ldr r0, .L2176+24 + str r2, [r6, #1256] + str r3, [r6, #1264] + ldr r3, [fp, #3340] + str r3, [r6, #1268] + bl FlashReadPages + ldr r2, [r6, #1264] + ldr r3, [r6, #1268] + ldr r0, .L2176+28 + ldr r1, [r2, #4] + str r1, [sp, #16] + ldr r2, [r2] + ldr r1, [r6, #1260] + str r2, [sp, #12] + ldr r2, [r3, #12] + str r2, [sp, #8] + ldr r2, [r3, #8] + str r2, [sp, #4] + ldr r2, [r3, #4] + str r2, [sp] + ldr r2, [r6, #1256] + ldr r3, [r3] + bl printk + b .L2167 +.L2177: + .align 2 +.L2176: + .word .LANCHOR0 + .word .LANCHOR4 + .word .LANCHOR3+174 + .word .LC120 + .word .LC117 + .word .LC118 + .word .LANCHOR4+1256 + .word .LC119 + .word .LANCHOR2 + .fnend + .size ftl_scan_all_ppa, .-ftl_scan_all_ppa + .align 1 + .global FlashProgPages + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FlashProgPages, %function +FlashProgPages: + .fnstart + @ args = 0, pretend = 0, frame = 64 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #76 + sub sp, sp, #76 + ldr r5, .L2230 + mov r4, r0 + mov r9, r2 + str r1, [sp, #8] + ldr r6, [r5, #48] + ldrb r7, [r5, #36] @ zero_extendqisi2 + str r3, [sp, #20] + ldrb r6, [r6, #19] @ zero_extendqisi2 + str r6, [sp, #16] + cbnz r7, .L2179 + ldr r3, .L2230+4 + ldrb r3, [r3, #477] @ zero_extendqisi2 + str r3, [sp, #12] +.L2180: + ldr r3, [sp, #8] + cmp r7, r3 + bcc .L2193 + ldr r7, .L2230+8 + movs r6, #0 +.L2194: + ldrb r3, [r5, #2234] @ zero_extendqisi2 + cmp r6, r3 + bcc .L2196 + ldr r3, [sp, #20] + cmp r3, #0 + bne .L2197 +.L2205: + movs r0, #0 + b .L2178 +.L2179: + bl FlashProgSlc2KPages +.L2178: + add sp, sp, #76 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2193: + movs r3, #36 + add r2, sp, #28 + mul r8, r3, r7 + ldr r3, [sp, #8] + mov r1, r9 + subs r3, r3, r7 + uxtb r3, r3 + add fp, r4, r8 + mov r0, fp + str r3, [sp] + add r3, sp, #32 + bl LogAddr2PhyAddr + ldrb r3, [r5, #2234] @ zero_extendqisi2 + mov r10, r0 + ldr r0, [sp, #32] + cmp r3, r0 + bhi .L2182 + mov r3, #-1 + str r3, [r4, r8] +.L2183: + adds r7, r7, #1 + b .L2180 +.L2182: + ldrb r3, [r5, #2244] @ zero_extendqisi2 + cmp r3, #0 + add r3, r5, r0, lsl #4 + it eq + moveq r10, #0 + ldr r3, [r3, #2112] + cbz r3, .L2185 + uxtb r0, r0 + bl FlashWaitCmdDone +.L2185: + ldr r3, [sp, #32] + movs r1, #0 + add r2, r5, r3, lsl #4 + str r1, [r2, #2116] + ldr r1, [sp, #28] + str fp, [r2, #2112] + str r1, [r2, #2108] + cmp r10, #0 + beq .L2186 + add r1, r8, #36 + add r1, r1, r4 + str r1, [r2, #2116] +.L2186: + adds r2, r5, r3 + add r3, r5, r3, lsl #4 + ldrb r6, [r2, #2236] @ zero_extendqisi2 + strb r6, [r3, #2104] + mov r0, r6 + ldrb r3, [r5, #2234] @ zero_extendqisi2 + cmp r3, #1 + bne .L2187 + bl NandcWaitFlashReady +.L2188: + ldr r3, [sp, #16] + subs r3, r3, #1 + cmp r3, #7 + bhi .L2189 + adds r3, r5, r6 + ldrb r3, [r3, #2068] @ zero_extendqisi2 + cbz r3, .L2189 + movs r3, #0 + ldr r2, .L2230+12 + ldrb r1, [r5, #1217] @ zero_extendqisi2 + mov r0, r6 + bl HynixSetRRPara +.L2189: + mov r0, r6 + bl NandcFlashCs + cmp r9, #1 + mov r0, r6 + bne .L2190 + ldrb r3, [r5, #152] @ zero_extendqisi2 + cmp r3, #0 + beq .L2190 + bl flash_enter_slc_mode +.L2191: + ldr r1, [sp, #28] + mov r0, r6 + bl FlashProgFirstCmd + ldr r3, [fp, #12] + movs r1, #1 + ldr r2, [sp, #12] + mov r0, r6 + str r3, [sp] + ldr r3, [fp, #8] + bl NandcXferData + cmp r10, #0 + beq .L2192 + ldr r1, [sp, #28] + mov r0, r6 + bl FlashProgDpFirstCmd + ldr r3, [sp, #32] + mov r0, r6 + ldr r1, [sp, #28] + add r8, r8, #36 + add r8, r8, r4 + add r3, r5, r3, lsl #2 + ldr r2, [r3, #1180] + adds r2, r2, #0 + it ne + movne r2, #1 + bl FlashWaitReadyEN + ldr r3, [r5, #40] + mov r0, r6 + ldr r1, [sp, #28] + add r1, r1, r3 + bl FlashProgDpSecondCmd + ldr r3, [r8, #12] + movs r1, #1 + ldr r2, [sp, #12] + mov r0, r6 + str r3, [sp] + ldr r3, [r8, #8] + bl NandcXferData +.L2192: + ldr r1, [sp, #28] + mov r0, r6 + bl FlashProgSecondCmd + mov r0, r6 + add r7, r7, r10 + bl NandcFlashDeCs + b .L2183 +.L2187: + bl NandcFlashCs + ldr r3, [sp, #32] + mov r0, r6 + ldr r1, [sp, #28] + add r3, r5, r3, lsl #2 + ldr r2, [r3, #1180] + adds r2, r2, #0 + it ne + movne r2, #1 + bl FlashWaitReadyEN + mov r0, r6 + bl NandcFlashDeCs + b .L2188 +.L2190: + bl flash_exit_slc_mode + b .L2191 +.L2196: + uxtb r0, r6 + bl FlashWaitCmdDone + cmp r9, #1 + bne .L2195 + ldrb r3, [r5, #152] @ zero_extendqisi2 + cbz r3, .L2195 + lsls r3, r6, #4 + ldrb r0, [r7, r3] @ zero_extendqisi2 + bl flash_exit_slc_mode +.L2195: + adds r6, r6, #1 + b .L2194 +.L2197: + ldr r7, .L2230+16 + mov r8, #0 + ldr r10, .L2230+32 +.L2198: + ldr r3, [sp, #8] + cmp r8, r3 + beq .L2205 + ldr r3, [r4] + adds r3, r3, #1 + bne .L2199 + ldr r1, [r4, #4] + ldr r0, .L2230+20 + bl printk +.L2200: + add r8, r8, #1 + adds r4, r4, #36 + b .L2198 +.L2199: + ldr r3, [sp, #8] + add r2, sp, #28 + mov r1, r9 + mov r0, r4 + mov r6, r4 + sub r3, r3, r8 + uxtb r3, r3 + str r3, [sp] + add r3, sp, #32 + bl LogAddr2PhyAddr + ldr r2, [r7, #1228] + movs r3, #0 + add r5, sp, #36 + str r3, [r2] + ldr r2, [r7, #1232] + str r3, [r2] + ldmia r6!, {r0, r1, r2, r3} + stmia r5!, {r0, r1, r2, r3} + ldmia r6!, {r0, r1, r2, r3} + stmia r5!, {r0, r1, r2, r3} + mov r2, r9 + ldr r3, [r6] + movs r1, #1 + add r0, sp, #36 + str r3, [r5] + ldr r3, [r7, #1228] + str r3, [sp, #44] + ldr r3, [r7, #1232] + str r3, [sp, #48] + bl FlashReadPages + ldr r5, [sp, #36] + adds r3, r5, #1 + bne .L2201 + ldr r1, [r4, #4] + ldr r0, .L2230+24 + bl printk + str r5, [r4] +.L2201: + ldr r3, [r4, #12] + cbz r3, .L2202 + ldr r2, [r3] + ldr r3, [r7, #1232] + ldr r3, [r3] + cmp r2, r3 + beq .L2202 + ldr r1, [r4, #4] + ldr r0, .L2230+28 + bl printk + mov r3, #-1 + str r3, [r4] +.L2202: + ldr r3, [r4, #8] + cmp r3, #0 + beq .L2200 + ldr r2, [r3] + ldr r3, [r7, #1228] + ldr r3, [r3] + cmp r2, r3 + beq .L2200 + ldr r1, [r4, #4] + mov r0, r10 + bl printk + mov r3, #-1 + str r3, [r4] + b .L2200 +.L2231: + .align 2 +.L2230: + .word .LANCHOR0 + .word .LANCHOR1 + .word .LANCHOR0+2104 + .word .LANCHOR0+1220 + .word .LANCHOR4 + .word .LC104 + .word .LC105 + .word .LC107 + .word .LC108 + .fnend + .size FlashProgPages, .-FlashProgPages + .align 1 + .global FlashTestBlk + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FlashTestBlk, %function +FlashTestBlk: + .fnstart + @ args = 0, pretend = 0, frame = 104 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, lr} + .save {r4, r5, lr} + mov r4, r0 + ldr r5, .L2235 + .pad #108 + sub sp, sp, #108 + ldr r3, [r5, #1212] + cmp r0, r3 + bcc .L2234 + ldr r3, [r5, #1220] + add r0, sp, #40 + movs r2, #32 + movs r1, #165 + str r0, [sp, #16] + lsls r4, r4, #10 + str r3, [sp, #12] + bl ftl_memset + movs r2, #8 + movs r1, #90 + ldr r0, [r5, #1220] + bl ftl_memset + movs r2, #1 + add r0, sp, #4 + mov r1, r2 + str r4, [sp, #8] + bl FlashEraseBlocks + movs r3, #1 + add r0, sp, #4 + mov r2, r3 + mov r1, r3 + bl FlashProgPages + ldr r4, [sp, #4] + movs r2, #1 + movs r1, #0 + add r0, sp, #4 + adds r4, r4, #0 + it ne + movne r4, #1 + negs r4, r4 + bl FlashEraseBlocks +.L2232: + mov r0, r4 + add sp, sp, #108 + @ sp needed + pop {r4, r5, pc} +.L2234: + movs r4, #0 + b .L2232 +.L2236: + .align 2 +.L2235: + .word .LANCHOR4 + .fnend + .size FlashTestBlk, .-FlashTestBlk + .align 1 + .global FlashMakeFactorBbt + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FlashMakeFactorBbt, %function +FlashMakeFactorBbt: + .fnstart + @ args = 0, pretend = 0, frame = 80 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #84 + sub sp, sp, #84 + ldr r4, .L2293 + ldr r0, .L2293+4 + ldr r3, [r4, #1224] + ldr r5, .L2293 + str r3, [sp, #24] + ldr r3, .L2293+8 + ldrh r1, [r3, #136] + ldrh r6, [r3, #138] + smulbb r6, r6, r1 + ldr r1, [r3, #48] + ldrb r2, [r1, #24] @ zero_extendqisi2 + uxth r6, r6 + movs r1, #1 + str r2, [sp, #28] + ldrh r2, [r3, #40] + ldrb r3, [r3, #36] @ zero_extendqisi2 + str r2, [sp, #20] + cmp r3, #1 + itttt eq + moveq r3, r2 + lsleq r3, r3, #1 + uxtheq r3, r3 + streq r3, [sp, #20] + bl printk + ldr r0, [r4, #1224] + mov r2, #4096 + movs r1, #0 + ldr r4, .L2293+8 + bl ftl_memset + lsrs r3, r6, #4 + str r3, [sp, #32] + movs r3, #0 + str r3, [sp, #12] +.L2239: + ldrb r8, [sp, #12] @ zero_extendqisi2 + ldrb r3, [r4, #2234] @ zero_extendqisi2 + cmp r3, r8 + bhi .L2266 + add sp, sp, #84 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2266: + add r3, r5, r8, lsl #1 + ldrh r7, [r3, #1238] + cmp r7, #0 + bne .L2240 + ldrh r2, [r4, #144] + mov r1, r7 + ldr r0, [r5, #1192] + add fp, r4, r8, lsl #2 + mov r9, r7 + mov r10, r7 + lsls r2, r2, #9 + bl ftl_memset + add r3, r4, r8 + str r7, [sp, #4] + ldrb r3, [r3, #2236] @ zero_extendqisi2 + str r3, [sp, #8] +.L2241: + ldrh r3, [sp, #4] + cmp r3, r6 + str r3, [sp, #16] + bcc .L2252 +.L2251: + mov r2, r9 + mov r1, r8 + ldr r0, .L2293+12 + bl printk + ldrb r3, [r4, #2234] @ zero_extendqisi2 + ldr r2, [sp, #32] + muls r3, r2, r3 + cmp r9, r3 + blt .L2253 + ldrh r2, [r4, #144] + movs r1, #0 + ldr r0, [r5, #1192] + lsls r2, r2, #9 + bl ftl_memset +.L2253: + cmp r8, #0 + bne .L2255 + ldrh fp, [r5, #1212] + mov r10, #1 + ldr r9, .L2293+20 +.L2256: + ldrb r3, [r4, #37] @ zero_extendqisi2 + cmp r3, fp + bhi .L2258 + subs r3, r6, #1 + sub r9, r6, #50 + uxth r10, r3 + mov fp, #1 +.L2259: + cmp r10, r9 + bgt .L2261 + ldrb r3, [r4, #37] @ zero_extendqisi2 + ldr r2, [r5, #1212] + subs r3, r3, r2 + cmp r7, r3 + bcc .L2255 + ldrh r2, [r4, #144] + movs r1, #0 + ldr r0, [r5, #1192] + lsls r2, r2, #9 + bl ftl_memset +.L2255: + ldrb r9, [sp, #12] @ zero_extendqisi2 + subs r7, r6, #1 + ldr fp, .L2293+24 + uxth r7, r7 + add r10, r5, r8, lsl #1 + mul r9, r6, r9 +.L2263: + mov r1, r8 + mov r2, r7 + mov r0, fp + bl printk + ldr r1, [r5, #1192] +.L2264: + lsrs r2, r7, #5 + and r3, r7, #31 + ldr r2, [r1, r2, lsl #2] + lsr r3, r2, r3 + ands r3, r3, #1 + bne .L2265 + ldr r1, [sp, #24] + movw r2, #61664 + strh r7, [r10, #1238] @ movhi + add r0, sp, #44 + strh r2, [r1] @ movhi + movs r2, #1 + strh r7, [r1, #2] @ movhi + strh r3, [r1, #8] @ movhi + mov r1, r2 + ldr r3, [r5, #1192] + str r3, [sp, #52] + ldr r3, [r5, #1224] + str r3, [sp, #56] + add r3, r7, r9 + lsls r3, r3, #10 + str r3, [sp, #48] + bl FlashEraseBlocks + movs r3, #1 + add r0, sp, #44 + mov r2, r3 + mov r1, r3 + bl FlashProgPages + ldr r3, [sp, #44] + cmp r3, #0 + beq .L2240 + subs r7, r7, #1 + uxth r7, r7 + b .L2263 +.L2252: + movs r3, #255 + strb r3, [sp, #42] + strb r3, [sp, #43] + ldr r3, [sp, #28] + lsls r1, r3, #31 + bpl .L2243 + ldr r3, [fp, #1180] + add r2, sp, #42 + ldr r0, [sp, #8] + add r3, r3, r10 + mov r1, r3 + str r3, [sp, #36] + bl FlashReadSpare + ldrb r2, [r4, #36] @ zero_extendqisi2 + ldr r3, [sp, #36] + cmp r2, #1 + bne .L2243 + ldr r1, [r4, #40] + add r2, sp, #43 + ldr r0, [sp, #8] + add r1, r1, r3 + bl FlashReadSpare + ldrb r3, [sp, #42] @ zero_extendqisi2 + ldrb r2, [sp, #43] @ zero_extendqisi2 + ands r3, r3, r2 + strb r3, [sp, #42] +.L2243: + ldr r3, [sp, #28] + lsls r2, r3, #30 + bpl .L2245 + ldr r3, [r4, #48] + add r2, sp, #43 + ldr r0, [sp, #8] + ldrh r1, [r3, #10] + ldr r3, [fp, #1180] + subs r1, r1, #1 + add r1, r1, r3 + add r1, r1, r10 + bl FlashReadSpare +.L2245: + ldr r3, [r4, #48] + ldrb r2, [r3, #7] @ zero_extendqisi2 + cmp r2, #1 + beq .L2246 + cmp r2, #8 + beq .L2246 + ldrb r3, [r3, #18] @ zero_extendqisi2 + cmp r3, #12 + bne .L2247 +.L2246: + ldrb r3, [sp, #42] @ zero_extendqisi2 + cmp r3, #0 + beq .L2268 + ldrb r0, [sp, #43] @ zero_extendqisi2 + clz r0, r0 + lsrs r0, r0, #5 +.L2248: + ldr r3, [sp, #28] + lsls r3, r3, #29 + bpl .L2249 + ldr r1, [fp, #1180] + ldr r0, [sp, #8] + add r1, r1, r10 + bl SandiskProgTestBadBlock +.L2249: + cbz r0, .L2250 + ldr r2, [sp, #4] + mov r1, r8 + ldr r0, .L2293+16 + add r9, r9, #1 + bl printk + ldr r3, [sp, #16] + uxth r9, r9 + ldr r1, [r5, #1192] + and r2, r3, #31 + lsrs r0, r3, #5 + movs r3, #1 + lsl r2, r3, r2 + ldr r3, [r1, r0, lsl #2] + orrs r3, r3, r2 + ldr r2, [sp, #32] + str r3, [r1, r0, lsl #2] + ldrb r3, [r4, #2234] @ zero_extendqisi2 + muls r3, r2, r3 + cmp r9, r3 + bgt .L2251 +.L2250: + ldr r3, [sp, #4] + adds r3, r3, #1 + str r3, [sp, #4] + ldr r3, [sp, #20] + add r10, r10, r3 + b .L2241 +.L2247: + ldrb r3, [sp, #42] @ zero_extendqisi2 + cmp r3, #255 + bne .L2268 + ldrb r0, [sp, #43] @ zero_extendqisi2 + subs r0, r0, #255 + it ne + movne r0, #1 + b .L2248 +.L2268: + movs r0, #1 + b .L2248 +.L2258: + mov r0, fp + bl FlashTestBlk + cbz r0, .L2257 + mov r1, fp + mov r0, r9 + bl printk + ldr r1, [r5, #1192] + lsr r0, fp, #5 + and r3, fp, #31 + lsl r2, r10, r3 + adds r7, r7, #1 + ldr r3, [r1, r0, lsl #2] + uxth r7, r7 + orrs r3, r3, r2 + str r3, [r1, r0, lsl #2] +.L2257: + add fp, fp, #1 + uxth fp, fp + b .L2256 +.L2261: + mov r0, r10 + bl FlashTestBlk + cbz r0, .L2260 + mov r1, r10 + ldr r0, .L2293+20 + bl printk + ldr r0, [r5, #1192] + lsr ip, r10, #5 + and r2, r10, #31 + lsl r1, fp, r2 + ldr r2, [r0, ip, lsl #2] + orrs r2, r2, r1 + str r2, [r0, ip, lsl #2] +.L2260: + add r3, r10, #-1 + uxth r10, r3 + b .L2259 +.L2265: + subs r7, r7, #1 + uxth r7, r7 + b .L2264 +.L2240: + ldr r3, [sp, #12] + adds r3, r3, #1 + str r3, [sp, #12] + b .L2239 +.L2294: + .align 2 +.L2293: + .word .LANCHOR4 + .word .LC121 + .word .LANCHOR0 + .word .LC123 + .word .LC122 + .word .LC124 + .word .LC125 + .fnend + .size FlashMakeFactorBbt, .-FlashMakeFactorBbt + .align 1 + .global FtlLowFormatEraseBlock + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FtlLowFormatEraseBlock, %function +FtlLowFormatEraseBlock: + .fnstart + @ args = 0, pretend = 0, frame = 24 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L2342 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #28 + sub sp, sp, #28 + str r0, [sp, #8] + mov r10, r3 + ldr r6, [r3, #228] + str r1, [sp, #4] + cmp r6, #0 + bne .L2324 + ldr r5, .L2342+4 + mov r7, r6 + mov r4, r6 + mov r9, #36 + mov fp, r10 + str r0, [r10, #3292] + ldrb r3, [r5, #2244] @ zero_extendqisi2 + str r3, [sp, #16] + ldrb r3, [r5, #152] @ zero_extendqisi2 + str r3, [sp, #12] +.L2297: + ldrh r0, [r5, #2324] + uxth r1, r6 + cmp r0, r1 + bhi .L2302 + cmp r7, #0 + beq .L2295 + ldr r3, [sp, #12] + mov r8, #0 + mov r2, r7 + ldr r0, [r10, #232] + strb r8, [r5, #2244] + mov r9, #36 + adds r6, r3, #0 + it ne + movne r6, #1 + mov r1, r6 + bl FlashEraseBlocks + ldrb r3, [sp, #16] @ zero_extendqisi2 + strb r3, [r5, #2244] +.L2304: + uxth r2, r8 + cmp r7, r2 + bhi .L2306 + ldr r3, [sp, #4] + cmp r3, #0 + bne .L2307 + uxth r6, r6 + mov fp, #6 + movs r3, #1 + str r3, [sp, #12] +.L2308: + ldr r7, .L2342 + mov r9, #0 +.L2318: + ldr r10, .L2342+4 + mov r8, #0 + mov r5, r8 +.L2309: + ldrh r1, [r10, #2324] + uxth r3, r8 + cmp r1, r3 + bhi .L2313 + cbz r5, .L2295 + movs r3, #1 + mov r8, #0 + mov r2, r6 + mov r1, r5 + ldr r0, [r7, #232] + strb r8, [r10, #2244] + bl FlashProgPages + ldrb r3, [sp, #16] @ zero_extendqisi2 + strb r3, [r10, #2244] + mov r10, #36 +.L2315: + uxth r3, r8 + cmp r5, r3 + bhi .L2317 + add r9, r9, fp + ldr r3, [sp, #12] + uxth r9, r9 + cmp r3, r9 + bhi .L2318 + mov r8, #0 + mov r9, #36 +.L2319: + uxth r3, r8 + cmp r5, r3 + bhi .L2321 + ldr r3, [sp, #8] + cmp r3, #63 + bls .L2322 + ldr r3, [sp, #4] + cbz r3, .L2295 +.L2322: + mov r2, r5 + mov r1, r6 + ldr r0, [r7, #232] + bl FlashEraseBlocks +.L2295: + mov r0, r4 + add sp, sp, #28 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2302: + uxth r1, r6 + ldr r0, [r10, #232] + movs r3, #0 + mul ip, r9, r1 + str r3, [r0, ip] + adds r0, r5, r1 + ldrb r0, [r0, #2350] @ zero_extendqisi2 + ldr r1, [sp, #8] + bl V2P_block + ldr r3, [sp, #4] + mov r8, r0 + cbz r3, .L2298 + bl IsBlkInVendorPart + cbnz r0, .L2299 +.L2298: + mov r0, r8 + bl FtlBbmIsBadBlock + cbnz r0, .L2300 + ldr r1, [r10, #232] + mla ip, r9, r7, r1 + lsl r1, r8, #10 + str r0, [ip, #8] + str r1, [ip, #4] + ldr r0, [fp, #3344] + ldrh r1, [r5, #2402] + muls r1, r7, r1 + add r7, r7, #1 + it mi + addmi r1, r1, #3 + uxth r7, r7 + bic r1, r1, #3 + add r1, r1, r0 + str r1, [ip, #12] +.L2299: + adds r6, r6, #1 + b .L2297 +.L2300: + adds r4, r4, #1 + uxth r4, r4 + b .L2299 +.L2306: + mul r2, r9, r8 + ldr r1, [r10, #232] + add ip, r1, r2 + ldr r2, [r1, r2] + adds r2, r2, #1 + bne .L2305 + ldr r0, [ip, #4] + adds r4, r4, #1 + uxth r4, r4 + ubfx r0, r0, #10, #16 + bl FtlBbmMapBadBlock +.L2305: + add r8, r8, #1 + b .L2304 +.L2307: + ldrh r3, [r5, #2392] + str r3, [sp, #12] + ldrb r3, [r5, #152] @ zero_extendqisi2 + cbnz r3, .L2325 + ldr r3, [sp, #12] + movs r6, #1 + lsr fp, r3, #2 + b .L2308 +.L2325: + movs r6, #1 + mov fp, r6 + b .L2308 +.L2313: + uxth r3, r8 + movs r2, #36 + ldr r0, [r7, #232] + mul r1, r2, r3 + add r3, r3, r10 + movs r2, #0 + str r2, [r0, r1] + ldr r1, [sp, #8] + ldrb r0, [r3, #2350] @ zero_extendqisi2 + bl V2P_block + ldr r3, [sp, #4] + str r0, [sp, #20] + cbz r3, .L2310 + bl IsBlkInVendorPart + cbnz r0, .L2311 +.L2310: + ldr r0, [sp, #20] + bl FtlBbmIsBadBlock + cbnz r0, .L2311 + ldr r1, [r7, #232] + movs r3, #36 + ldr r0, [r7, #3336] + mla r1, r3, r5, r1 + ldr r3, [sp, #20] + add r3, r9, r3, lsl #10 + str r3, [r1, #4] + ldr r3, [r7, #3332] + str r3, [r1, #8] + ldrh r3, [r10, #2402] + muls r3, r5, r3 + add r5, r5, #1 + it mi + addmi r3, r3, #3 + uxth r5, r5 + bic r3, r3, #3 + add r3, r3, r0 + str r3, [r1, #12] +.L2311: + add r8, r8, #1 + b .L2309 +.L2317: + mul r3, r10, r8 + ldr r2, [r7, #232] + adds r1, r2, r3 + ldr r3, [r2, r3] + cbz r3, .L2316 + ldr r0, [r1, #4] + adds r4, r4, #1 + uxth r4, r4 + ubfx r0, r0, #10, #16 + bl FtlBbmMapBadBlock +.L2316: + add r8, r8, #1 + b .L2315 +.L2321: + ldr r3, [sp, #4] + cbz r3, .L2320 + mul r3, r9, r8 + ldr r2, [r7, #232] + adds r1, r2, r3 + ldr r3, [r2, r3] + cbnz r3, .L2320 + ldr r0, [r1, #4] + movs r1, #1 + ubfx r0, r0, #10, #16 + bl FtlFreeSysBlkQueueIn +.L2320: + add r8, r8, #1 + b .L2319 +.L2324: + movs r4, #0 + b .L2295 +.L2343: + .align 2 +.L2342: + .word .LANCHOR2 + .word .LANCHOR0 + .fnend + .size FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock + .align 1 + .global FtlBbmTblFlush + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FtlBbmTblFlush, %function +FtlBbmTblFlush: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #12 + ldr r7, .L2358 + ldr r6, [r7, #228] + cmp r6, #0 + bne .L2346 + ldr r4, .L2358+4 + mov r1, r6 + ldr r0, [r7, #3316] + ldr r5, .L2358+8 + ldr r3, [r7, #3340] + add r8, r4, #2480 + ldrh r2, [r4, #2400] + str r0, [r5, #1264] + str r3, [r5, #1268] + bl ftl_memset +.L2347: + ldrh r3, [r4, #2346] + cmp r6, r3 + blt .L2348 + ldr r6, [r5, #1268] + movs r2, #16 + movs r1, #255 + ldr fp, .L2358+24 + mov r8, #0 + mov r0, r6 + mov r9, r8 + bl ftl_memset + movw r3, #61649 + strh r3, [r6] @ movhi + ldr r3, [r4, #2464] + str r3, [r6, #4] + ldrh r3, [r4, #2456] + strh r3, [r6, #2] @ movhi + ldrh r3, [r4, #2460] + strh r3, [r6, #8] @ movhi + ldrh r3, [r4, #2462] + strh r3, [r6, #10] @ movhi + ldr r3, [r4, #2320] + strh r3, [r6, #12] @ movhi +.L2349: + ldr r3, [r7, #3316] + mov r10, #0 + ldrh r2, [r4, #2458] + ldrh r1, [r4, #2456] + str r3, [r5, #1264] + ldr r3, [r7, #3340] + str r10, [r5, #1256] + str r3, [r5, #1268] + orr r3, r2, r1, lsl #10 + ldrh r0, [r6, #10] + str r3, [r5, #1260] + ldrh r3, [r4, #2460] + str r0, [sp] + ldr r0, .L2358+12 + bl printk + ldrh r3, [r4, #2392] + ldrh r2, [r4, #2458] + subs r3, r3, #1 + cmp r2, r3 + blt .L2350 + ldr r3, [r4, #2464] + ldrh r2, [r4, #2456] + ldr r0, [r7, #232] + adds r3, r3, #1 + strh r10, [r4, #2458] @ movhi + str r3, [r4, #2464] + str r3, [r6, #4] + ldrh r3, [r4, #2460] + strh r2, [r6, #8] @ movhi + strh r2, [r4, #2460] @ movhi + movs r2, #1 + strh r3, [r4, #2456] @ movhi + mov r1, r2 + lsls r3, r3, #10 + str r3, [r5, #1260] + str r3, [r0, #4] + bl FlashEraseBlocks +.L2350: + movs r3, #1 + mov r0, fp + mov r2, r3 + mov r1, r3 + bl FlashProgPages + ldrh r3, [r4, #2458] + adds r3, r3, #1 + strh r3, [r4, #2458] @ movhi + ldr r3, [r5, #1256] + adds r2, r3, #1 + bne .L2351 + add r8, r8, #1 + ldr r1, [r5, #1260] + uxth r8, r8 + ldr r0, .L2358+16 + bl printk + cmp r8, #3 + bls .L2349 + mov r2, r8 + ldr r1, [r5, #1260] + ldr r0, .L2358+20 + bl printk + movs r3, #1 + str r3, [r7, #228] +.L2346: + movs r0, #0 + add sp, sp, #12 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2348: + ldrh r2, [r7, #3404] + ldr r3, [r5, #1264] + ldr r1, [r8, #4]! + mul r0, r6, r2 + lsls r2, r2, #2 + adds r6, r6, #1 + add r0, r3, r0, lsl #2 + bl ftl_memcpy + b .L2347 +.L2354: + mov r9, #1 + b .L2349 +.L2351: + add r9, r9, #1 + cmp r9, #1 + ble .L2354 + cmp r3, #256 + bne .L2346 + b .L2349 +.L2359: + .align 2 +.L2358: + .word .LANCHOR2 + .word .LANCHOR0 + .word .LANCHOR4 + .word .LC126 + .word .LC127 + .word .LC128 + .word .LANCHOR4+1256 + .fnend + .size FtlBbmTblFlush, .-FtlBbmTblFlush + .align 1 + .global allocate_data_superblock + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type allocate_data_superblock, %function +allocate_data_superblock: + .fnstart + @ args = 0, pretend = 0, frame = 16 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r5, r0 + ldr r4, .L2409 + .pad #20 + sub sp, sp, #20 + ldr r3, [r4, #228] + cmp r3, #0 + bne .L2361 +.L2362: + ldr r3, .L2409+4 + ldr r7, .L2409+8 + ldrb r2, [r5, #8] @ zero_extendqisi2 + cmp r5, r3 + bne .L2363 + ldrh ip, [r4, #316] + ldr r3, [r4, #1132] + lsr r6, ip, #1 + mul r0, r3, ip + adds r1, r6, #1 + add r1, r1, r0, lsr #2 + ldr r0, [r7, #2248] + uxth r1, r1 + cbz r0, .L2364 + ldr r0, [r4, #532] + cmp r0, #39 + bhi .L2364 + cmp r0, #2 + bls .L2391 + tst ip, #1 + beq .L2387 + cmp r3, #0 + beq .L2391 +.L2387: + mov r1, r6 + b .L2364 +.L2363: + cmp r2, #1 + bne .L2391 + ldrh r3, [r7, #2344] + cmp r3, #1 + beq .L2391 + ldrb r3, [r7, #152] @ zero_extendqisi2 + cmp r3, #0 + bne .L2391 + ldrh r3, [r4, #316] + ldr r0, [r7, #2248] + lsrs r1, r3, #3 + cbz r0, .L2364 + ldr r0, [r4, #532] + cmp r0, #1 + bhi .L2364 + rsb r3, r3, r3, lsl #3 + ubfx r1, r3, #3, #16 +.L2364: + cbz r1, .L2365 + subs r1, r1, #1 + uxth r1, r1 +.L2365: + ldr r0, .L2409+12 + bl List_pop_index_node + ldrh r3, [r4, #316] + uxth r9, r0 + subs r3, r3, #1 + strh r3, [r4, #316] @ movhi + ldrh r3, [r7, #2332] + cmp r3, r9 + bls .L2362 + ldr r3, [r4, #300] + movw fp, #65535 + mov r6, r9 + ldrh r8, [r3, r9, lsl #1] + cmp r8, #0 + bne .L2362 + strh r9, [r5] @ movhi + mov r0, r5 + bl make_superblock + ldrb r3, [r5, #7] @ zero_extendqisi2 + cmp r3, #0 + beq .L2367 + ldr r0, [r4, #232] + movs r2, #36 + ldrh r1, [r7, #2324] + add r10, r5, #16 + mov ip, r10 + mov lr, r8 + mov r3, r0 + str r2, [sp, #8] + mla r1, r2, r1, r0 + str r1, [sp, #4] +.L2368: + ldr r2, [sp, #4] + cmp r2, r3 + bne .L2370 + ldr r3, [r7, #2248] + cbz r3, .L2371 + ldr r3, .L2409+16 + cmp r5, r3 + bne .L2371 + ldr r3, [r4, #236] + ldrh r3, [r3, r6, lsl #1] + cmp r3, #40 + itt hi + movhi r3, #0 + strbhi r3, [r4, #328] +.L2371: + ldrb r3, [r5, #8] @ zero_extendqisi2 + ldr r2, [r4, #236] + cmp r3, #0 + bne .L2372 + ldrh r3, [r2, r6, lsl #1] + cmp r3, #0 + beq .L2373 + ldrh r1, [r7, #2382] + add r3, r3, r1 +.L2407: + strh r3, [r2, r6, lsl #1] @ movhi + movs r1, #0 + ldr r3, [r4, #516] + mov r0, r9 + adds r3, r3, #1 + str r3, [r4, #516] + bl ftl_set_blk_mode +.L2375: + ldr r3, [r4, #236] + ldr r2, [r4, #528] + ldrh r0, [r7, #2382] + ldrh r3, [r3, r6, lsl #1] + ldrh r1, [r7, #2332] + cmp r3, r2 + ldr r2, [r4, #516] + it hi + strhi r3, [r4, #528] + ldr r3, [r4, #520] + mla r0, r2, r0, r3 + bl __aeabi_uidiv + ldr r2, [r4, #3360] + ldr r1, [r4, #232] + str r0, [r4, #524] + ldr r3, [r2, #16] + adds r3, r3, #1 + str r3, [r2, #16] + movs r2, #36 + mla r2, r2, r8, r1 + adds r3, r1, #4 + adds r2, r2, #40 +.L2377: + adds r3, r3, #36 + cmp r2, r3 + bne .L2378 + ldrb r3, [r7, #152] @ zero_extendqisi2 + cbz r3, .L2379 + ldrb r3, [r5, #8] @ zero_extendqisi2 + mov r2, r8 + ldr r0, [r4, #232] + cmp r3, #1 + ite eq + moveq r1, #0 + movne r1, #1 + bl FlashEraseBlocks +.L2379: + ldrb r1, [r5, #8] @ zero_extendqisi2 + mov r2, r8 + ldr r0, [r4, #232] + mov fp, #0 + bl FlashEraseBlocks + mov r3, fp + movs r1, #36 +.L2381: + uxth r2, fp + cmp r8, r2 + bhi .L2383 + cmp r3, #0 + ble .L2384 + mov r0, r9 + bl update_multiplier_value + bl FtlBbmTblFlush +.L2384: + ldrb r2, [r5, #7] @ zero_extendqisi2 + cmp r2, #0 + bne .L2385 + ldr r3, [r4, #300] + movw r2, #65535 + strh r2, [r3, r6, lsl #1] @ movhi + b .L2362 +.L2391: + movs r1, #0 + b .L2365 +.L2367: + ldr r3, [r4, #300] + strh fp, [r3, r9, lsl #1] @ movhi + b .L2362 +.L2370: + str lr, [r3, #8] + str lr, [r3, #12] + ldrh r1, [ip], #2 + cmp r1, fp + beq .L2369 + ldr r2, [sp, #8] + lsls r1, r1, #10 + mla r2, r2, r8, r0 + add r8, r8, #1 + uxth r8, r8 + str r1, [r2, #4] +.L2369: + adds r3, r3, #36 + b .L2368 +.L2373: + movs r3, #2 + b .L2407 +.L2372: + ldrh r3, [r2, r6, lsl #1] + mov r0, r9 + adds r3, r3, #1 + strh r3, [r2, r6, lsl #1] @ movhi + ldr r3, [r4, #520] + adds r3, r3, #1 + str r3, [r4, #520] + bl ftl_set_blk_mode.part.9 + b .L2375 +.L2378: + ldr r1, [r3, #-36] + bic r1, r1, #1020 + bic r1, r1, #3 + str r1, [r3, #-36] + b .L2377 +.L2383: + mul r2, r1, fp + ldr r0, [r4, #232] + add ip, r0, r2 + ldr r2, [r0, r2] + adds r0, r2, #1 + bne .L2382 + ldr r0, [ip, #4] + adds r3, r3, #1 + str r1, [sp, #12] + str r2, [sp, #8] + ubfx r0, r0, #10, #16 + str r3, [sp, #4] + bl FtlBbmMapBadBlock + ldr r2, [sp, #8] + ldr r1, [sp, #12] + ldr r3, [sp, #4] + strh r2, [r10] @ movhi + ldrb r2, [r5, #7] @ zero_extendqisi2 + subs r2, r2, #1 + strb r2, [r5, #7] +.L2382: + add fp, fp, #1 + add r10, r10, #2 + b .L2381 +.L2385: + ldrh r3, [r7, #2390] + strh r9, [r5] @ movhi + smulbb r3, r3, r2 + movs r2, #0 + strh r2, [r5, #2] @ movhi + strb r2, [r5, #6] + ldr r2, [r4, #508] + uxth r3, r3 + strh r3, [r5, #4] @ movhi + str r2, [r5, #12] + adds r2, r2, #1 + str r2, [r4, #508] + ldr r2, [r4, #300] + ldrh r1, [r5] + strh r3, [r2, r1, lsl #1] @ movhi +.L2361: + movs r0, #0 + add sp, sp, #20 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2410: + .align 2 +.L2409: + .word .LANCHOR2 + .word .LANCHOR2+416 + .word .LANCHOR0 + .word .LANCHOR2+312 + .word .LANCHOR2+320 + .fnend + .size allocate_data_superblock, .-allocate_data_superblock + .align 1 + .global FtlGcFreeBadSuperBlk + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FtlGcFreeBadSuperBlk, %function +FtlGcFreeBadSuperBlk: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #12 + mov r9, r0 + ldr r4, .L2423 + ldrh r3, [r4, #1182] + cbz r3, .L2412 + ldr r8, .L2423+8 + movs r6, #0 + add r10, r4, #1184 +.L2413: + ldrh r2, [r8, #2324] + uxth r3, r6 + cmp r2, r3 + bhi .L2419 + bl FtlGcReFreshBadBlk +.L2412: + movs r0, #0 + add sp, sp, #12 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2419: + uxtah r3, r8, r6 + mov r1, r9 + movs r7, #0 + ldrb r0, [r3, #2350] @ zero_extendqisi2 + bl V2P_block + ldr r2, .L2423+4 + mov fp, r0 +.L2414: + ldrh r3, [r4, #1182] + uxth r5, r7 + cmp r3, r5 + bhi .L2418 + adds r6, r6, #1 + b .L2413 +.L2418: + uxth r3, r7 + add r1, r4, r3, lsl #1 + ldrh r1, [r1, #1184] + cmp r1, fp + bne .L2415 + mov r1, fp + mov r0, r2 + str r3, [sp, #4] + str r2, [sp] + bl printk + mov r0, fp + bl FtlBbmMapBadBlock + bl FtlBbmTblFlush + ldr r3, [sp, #4] + ldrh r1, [r4, #1182] + ldr r2, [sp] + add r3, r10, r3, lsl #1 +.L2416: + cmp r5, r1 + bcc .L2417 + subs r1, r1, #1 + strh r1, [r4, #1182] @ movhi +.L2415: + adds r7, r7, #1 + b .L2414 +.L2417: + ldrh r0, [r3, #2]! + adds r5, r5, #1 + uxth r5, r5 + strh r0, [r3, #-2] @ movhi + b .L2416 +.L2424: + .align 2 +.L2423: + .word .LANCHOR2 + .word .LC129 + .word .LANCHOR0 + .fnend + .size FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk + .align 1 + .global update_vpc_list + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type update_vpc_list, %function +update_vpc_list: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r2, .L2433 + push {r3, r4, r5, lr} + .save {r3, r4, r5, lr} + mov r4, r0 + mov r5, r2 + ldr r3, [r2, #300] + ldrh r3, [r3, r0, lsl #1] + cbnz r3, .L2426 + ldrh r1, [r2, #556] + cmp r1, r0 + bne .L2427 + movw r3, #65535 + strh r3, [r2, #556] @ movhi +.L2428: + mov r1, r4 + ldr r0, .L2433+4 + bl List_remove_node + ldrh r3, [r5, #308] + mov r0, r4 + subs r3, r3, #1 + strh r3, [r5, #308] @ movhi + bl free_data_superblock + mov r0, r4 + bl FtlGcFreeBadSuperBlk + movs r3, #1 + b .L2425 +.L2427: + ldrh r1, [r2, #320] + cmp r1, r0 + beq .L2425 + ldrh r1, [r2, #368] + cmp r1, r0 + beq .L2425 + ldrh r2, [r2, #416] + cmp r2, r0 + bne .L2428 +.L2425: + mov r0, r3 + pop {r3, r4, r5, pc} +.L2426: + bl List_update_data_list + movs r3, #0 + b .L2425 +.L2434: + .align 2 +.L2433: + .word .LANCHOR2 + .word .LANCHOR2+296 + .fnend + .size update_vpc_list, .-update_vpc_list + .align 1 + .global decrement_vpc_count + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type decrement_vpc_count, %function +decrement_vpc_count: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r3, r4, r5, lr} + .save {r3, r4, r5, lr} + movw r3, #65535 + cmp r0, r3 + mov r4, r0 + ldr r5, .L2445 + beq .L2436 + ldr r3, [r5, #300] + ldrh r2, [r3, r0, lsl #1] + cbnz r2, .L2437 + mov r1, r0 + ldr r0, .L2445+4 + bl printk + ldr r3, [r5, #300] + movs r2, #32 + mov r1, r4 + add r0, r5, #312 + strh r2, [r3, r4, lsl #1] @ movhi + bl test_node_in_list + cbz r0, .L2438 + mov r1, r4 + add r0, r5, #312 + bl List_remove_node + ldrh r3, [r5, #316] + mov r0, r4 + subs r3, r3, #1 + strh r3, [r5, #316] @ movhi + bl INSERT_DATA_LIST + ldr r3, [r5, #300] + mov r1, r4 + ldr r0, .L2445+8 + ldrh r2, [r3, r4, lsl #1] + bl printk +.L2438: + mov r0, r4 + bl FtlGcRefreshBlock +.L2441: + movs r0, #0 + pop {r3, r4, r5, pc} +.L2437: + subs r2, r2, #1 + strh r2, [r3, r0, lsl #1] @ movhi +.L2436: + ldrh r0, [r5, #3460] + movw r3, #65535 + cmp r0, r3 + bne .L2440 + strh r4, [r5, #3460] @ movhi + b .L2441 +.L2440: + cmp r4, r0 + beq .L2441 + bl update_vpc_list + adds r0, r0, #0 + strh r4, [r5, #3460] @ movhi + it ne + movne r0, #1 + pop {r3, r4, r5, pc} +.L2446: + .align 2 +.L2445: + .word .LANCHOR2 + .word .LC130 + .word .LC131 + .fnend + .size decrement_vpc_count, .-decrement_vpc_count + .align 1 + .global FtlSlcSuperblockCheck + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FtlSlcSuperblockCheck, %function +FtlSlcSuperblockCheck: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r3, r4, r5, r6, r7, lr} + .save {r3, r4, r5, r6, r7, lr} + mov r4, r0 + ldrh r3, [r0, #4] + cmp r3, #0 + beq .L2447 + ldrh r3, [r0] + movw r6, #65535 + cmp r3, r6 + beq .L2447 + ldrb r3, [r0, #6] @ zero_extendqisi2 + ldr r5, .L2458 + ldr r7, .L2458+4 + adds r3, r3, #8 + ldrh r3, [r0, r3, lsl #1] +.L2451: + cmp r3, r6 + beq .L2453 + ldrb r2, [r4, #8] @ zero_extendqisi2 + cmp r2, #1 + bne .L2454 + ldrb r3, [r5, #152] @ zero_extendqisi2 + cbnz r3, .L2454 + ldrh r3, [r4, #2] + add r3, r7, r3, lsl #1 + ldrh r3, [r3, #1220] + cmp r3, r6 + bne .L2454 + ldrh r3, [r4, #4] + ldrh r0, [r4] + subs r3, r3, #1 + strh r3, [r4, #4] @ movhi + bl decrement_vpc_count + ldrh r2, [r4, #4] + cbnz r2, .L2453 + ldrh r3, [r4, #2] + strb r2, [r4, #6] + adds r3, r3, #1 + strh r3, [r4, #2] @ movhi + pop {r3, r4, r5, r6, r7, pc} +.L2453: + ldrb r3, [r4, #6] @ zero_extendqisi2 + ldrh r2, [r5, #2324] + adds r3, r3, #1 + uxtb r3, r3 + cmp r2, r3 + strb r3, [r4, #6] + bne .L2452 + ldrh r3, [r4, #2] + adds r3, r3, #1 + strh r3, [r4, #2] @ movhi + movs r3, #0 + strb r3, [r4, #6] +.L2452: + ldrb r3, [r4, #6] @ zero_extendqisi2 + adds r3, r3, #8 + ldrh r3, [r4, r3, lsl #1] + b .L2451 +.L2454: + ldrb r3, [r5, #152] @ zero_extendqisi2 + cbz r3, .L2447 + cmp r2, #1 + bne .L2447 + ldrh r2, [r4, #2] + ldrh r3, [r5, #2392] + cmp r2, r3 + bcc .L2447 + ldr r3, .L2458+4 + ldrh r1, [r4] + ldrh r0, [r4, #4] + ldr r2, [r3, #300] + ldrh r3, [r2, r1, lsl #1] + subs r3, r3, r0 + strh r3, [r2, r1, lsl #1] @ movhi + movs r3, #0 + ldrh r2, [r5, #2390] + strh r3, [r4, #4] @ movhi + strb r3, [r4, #6] + strh r2, [r4, #2] @ movhi +.L2447: + pop {r3, r4, r5, r6, r7, pc} +.L2459: + .align 2 +.L2458: + .word .LANCHOR0 + .word .LANCHOR2 + .fnend + .size FtlSlcSuperblockCheck, .-FtlSlcSuperblockCheck + .align 1 + .global get_new_active_ppa + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type get_new_active_ppa, %function +get_new_active_ppa: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + movs r3, #0 + push {r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + strb r3, [r0, #10] + mov r4, r0 + movw r7, #65535 + ldrb r3, [r0, #6] @ zero_extendqisi2 + ldr r5, .L2475 + ldr r6, .L2475+4 + adds r3, r3, #8 + ldrh r2, [r0, r3, lsl #1] +.L2461: + cmp r2, r7 + beq .L2462 + ldrb r3, [r4, #8] @ zero_extendqisi2 + ldrh r1, [r4, #2] + cmp r3, #1 + ldrh r3, [r4, #4] + bne .L2464 + ldrb r0, [r5, #152] @ zero_extendqisi2 + cbnz r0, .L2464 + add r0, r6, r1, lsl #1 + ldrh r0, [r0, #1220] + cmp r0, r7 + bne .L2464 + subs r3, r3, #1 + ldrh r0, [r4] + strh r3, [r4, #4] @ movhi + bl decrement_vpc_count +.L2462: + ldrb r3, [r4, #6] @ zero_extendqisi2 + ldrh r2, [r5, #2324] + adds r3, r3, #1 + uxtb r3, r3 + cmp r2, r3 + strb r3, [r4, #6] + bne .L2463 + ldrh r3, [r4, #2] + adds r3, r3, #1 + strh r3, [r4, #2] @ movhi + movs r3, #0 + strb r3, [r4, #6] +.L2463: + ldrb r3, [r4, #6] @ zero_extendqisi2 + adds r3, r3, #8 + ldrh r2, [r4, r3, lsl #1] + b .L2461 +.L2464: + ldr r8, .L2475+4 + orr r6, r1, r2, lsl #10 + movw r7, #65535 + subs r3, r3, #1 + strh r3, [r4, #4] @ movhi +.L2465: + ldrb r3, [r4, #6] @ zero_extendqisi2 + ldrh r1, [r5, #2324] +.L2467: + adds r3, r3, #1 + uxtb r3, r3 + cmp r3, r1 + itttt eq + ldrheq r3, [r4, #2] + addeq r3, r3, #1 + strheq r3, [r4, #2] @ movhi + moveq r3, #0 + add r2, r3, #8 + ldrh r2, [r4, r2, lsl #1] + cmp r2, r7 + beq .L2467 + strb r3, [r4, #6] + ldrb r3, [r4, #8] @ zero_extendqisi2 + cmp r3, #1 + bne .L2460 + ldrb r2, [r5, #152] @ zero_extendqisi2 + ldrh r3, [r4, #2] + cbnz r2, .L2469 + add r3, r8, r3, lsl #1 + ldrh r3, [r3, #1220] + cmp r3, r7 + bne .L2460 + ldrh r3, [r4, #4] + cbz r3, .L2460 + subs r3, r3, #1 + ldrh r0, [r4] + strh r3, [r4, #4] @ movhi + bl decrement_vpc_count + b .L2465 +.L2469: + ldrh r2, [r5, #2392] + cmp r3, r2 + bcc .L2460 + ldr r3, .L2475+4 + ldrh r1, [r4] + ldrh r0, [r4, #4] + ldr r2, [r3, #300] + ldrh r3, [r2, r1, lsl #1] + subs r3, r3, r0 + strh r3, [r2, r1, lsl #1] @ movhi + movs r3, #0 + ldrh r2, [r5, #2390] + strh r3, [r4, #4] @ movhi + strb r3, [r4, #6] + strh r2, [r4, #2] @ movhi +.L2460: + mov r0, r6 + pop {r4, r5, r6, r7, r8, pc} +.L2476: + .align 2 +.L2475: + .word .LANCHOR0 + .word .LANCHOR2 + .fnend + .size get_new_active_ppa, .-get_new_active_ppa + .align 1 + .global FtlVpcTblFlush + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FtlVpcTblFlush, %function +FtlVpcTblFlush: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr} + ldr r4, .L2500 + ldr r3, [r4, #228] + cmp r3, #0 + bne .L2479 + ldr r5, .L2500+4 + movs r1, #255 + ldr r2, [r4, #3316] + ldr r7, [r4, #3340] + ldr r6, .L2500+8 + str r2, [r5, #1264] + ldrh r2, [r4, #540] + str r7, [r5, #1268] + str r3, [r7, #12] + strh r2, [r7, #2] @ movhi + movw r2, #61604 + strh r2, [r7] @ movhi + ldr r2, [r4, #548] + str r3, [r7, #8] + ldr r3, .L2500+12 + str r2, [r7, #4] + ldrh r2, [r4, #322] + str r3, [r4, #244] + ldr r3, .L2500+16 + str r3, [r4, #248] + ldrh r3, [r4, #546] + strh r3, [r4, #252] @ movhi + ldrh r3, [r6, #2346] + strb r3, [r4, #254] + ldrh r3, [r4, #320] + strh r3, [r4, #258] @ movhi + ldrb r3, [r4, #326] @ zero_extendqisi2 + orr r3, r3, r2, lsl #6 + ldrh r2, [r4, #370] + strh r3, [r4, #260] @ movhi + ldrb r3, [r4, #328] @ zero_extendqisi2 + strb r3, [r4, #255] + ldrh r3, [r4, #368] + strh r3, [r4, #262] @ movhi + ldrb r3, [r4, #374] @ zero_extendqisi2 + orr r3, r3, r2, lsl #6 + strh r3, [r4, #264] @ movhi + ldrb r3, [r4, #376] @ zero_extendqisi2 + strb r3, [r4, #256] + ldrh r3, [r4, #416] + strh r3, [r4, #266] @ movhi + ldrh r2, [r4, #418] + ldrb r3, [r4, #422] @ zero_extendqisi2 + ldr r0, [r5, #1264] + orr r3, r3, r2, lsl #6 + ldrh r2, [r6, #2400] + strh r3, [r4, #268] @ movhi + ldrb r3, [r4, #424] @ zero_extendqisi2 + strb r3, [r4, #257] + ldr r3, [r4, #516] + str r3, [r4, #276] + ldr r3, [r4, #508] + str r3, [r4, #284] + ldr r3, [r4, #512] + str r3, [r4, #280] + ldrh r3, [r4, #1174] + strh r3, [r4, #288] @ movhi + ldrh r3, [r4, #1176] + strh r3, [r4, #290] @ movhi + bl ftl_memset + movs r2, #48 + add r1, r4, #244 + ldr r0, [r5, #1264] + bl ftl_memcpy + ldrh r2, [r6, #2332] + ldr r0, [r5, #1264] + ldr r1, [r4, #300] + lsls r2, r2, #1 + adds r0, r0, #48 + bl ftl_memcpy + ldrh r0, [r6, #2332] + ldr r3, [r5, #1264] + ldr r1, [r6, #32] + lsrs r2, r0, #3 + lsls r0, r0, #1 + adds r0, r0, #51 + adds r2, r2, #4 + bic r0, r0, #3 + add r0, r0, r3 + bl ftl_memcpy + ldrh r3, [r6, #2436] + cbz r3, .L2480 + ldrh r0, [r6, #2332] + ldrh r2, [r6, #2428] + ldr r1, [r4, #3388] + lsrs r3, r0, #3 + lsls r2, r2, #2 + add r3, r3, r0, lsl #1 + ldr r0, [r5, #1264] + adds r3, r3, #52 + ubfx r3, r3, #2, #14 + add r0, r0, r3, lsl #2 + bl ftl_memcpy +.L2480: + ldr fp, .L2500+24 + mov r8, #0 + movw r9, #65535 + mov r10, r8 + movs r0, #0 + bl FtlUpdateVaildLpn +.L2481: + ldr r3, [r4, #3316] + ldrh r1, [r4, #542] + ldrh r2, [r4, #540] + str r3, [r5, #1264] + ldr r3, [r4, #3340] + str r3, [r5, #1268] + orr r3, r1, r2, lsl #10 + str r3, [r5, #1260] + ldrh r3, [r6, #2392] + subs r3, r3, #1 + cmp r1, r3 + blt .L2482 + ldrh r9, [r4, #544] + strh r10, [r4, #542] @ movhi + strh r2, [r4, #544] @ movhi + bl FtlFreeSysBlkQueueOut + ldr r3, [r4, #508] + strh r0, [r4, #540] @ movhi + adds r2, r3, #1 + str r3, [r4, #548] + str r2, [r4, #508] + lsls r2, r0, #10 + str r2, [r5, #1260] + str r3, [r7, #4] + strh r0, [r7, #2] @ movhi +.L2482: + ldrb r3, [r6, #36] @ zero_extendqisi2 + cbz r3, .L2483 + ldrh r1, [r6, #2400] + ldr r0, [r4, #3316] + bl js_hash + str r0, [r7, #12] +.L2483: + movs r3, #1 + mov r0, fp + mov r2, r3 + mov r1, r3 + bl FlashProgPages + ldrh r3, [r4, #542] + ldr r2, [r5, #1256] + adds r3, r3, #1 + uxth r3, r3 + adds r1, r2, #1 + strh r3, [r4, #542] @ movhi + bne .L2484 + cmp r3, #1 + add r8, r8, #1 + it eq + ldrheq r3, [r6, #2392] + uxth r8, r8 + itt eq + addeq r3, r3, #-1 + strheq r3, [r4, #542] @ movhi + cmp r8, #3 + bls .L2481 + mov r2, r8 + ldr r1, [r5, #1260] + ldr r0, .L2500+20 + bl printk + movs r3, #1 + str r3, [r4, #228] +.L2479: + movs r0, #0 + pop {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2484: + cmp r3, #1 + beq .L2481 + cmp r2, #256 + beq .L2481 + movw r3, #65535 + cmp r9, r3 + beq .L2479 + movs r1, #1 + mov r0, r9 + bl FtlFreeSysBlkQueueIn + b .L2479 +.L2501: + .align 2 +.L2500: + .word .LANCHOR2 + .word .LANCHOR4 + .word .LANCHOR0 + .word 1179929683 + .word 1342177379 + .word .LC132 + .word .LANCHOR4+1256 + .fnend + .size FtlVpcTblFlush, .-FtlVpcTblFlush + .align 1 + .global FtlSuperblockPowerLostFix + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FtlSuperblockPowerLostFix, %function +FtlSuperblockPowerLostFix: + .fnstart + @ args = 0, pretend = 0, frame = 40 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + mov r4, r0 + ldr r5, .L2517 + .pad #40 + sub sp, sp, #40 + ldr r10, [r5, #228] + cmp r10, #0 + bne .L2502 + ldr r3, .L2517+4 + ldrb r2, [r3, #152] @ zero_extendqisi2 + mov r8, r3 + cmp r2, #0 + beq .L2513 + ldrb r3, [r0, #8] @ zero_extendqisi2 + cmp r3, #1 + bne .L2513 + ldrh r7, [r0, #4] + mov r10, r3 +.L2504: + mov r3, #-1 + ldr r6, [r5, #3340] + str r3, [sp, #20] + mov r9, #0 + ldr r3, [r5, #3316] + movw r2, #61589 + str r6, [sp, #16] + str r3, [sp, #12] + mvn r3, #2 + str r3, [r6, #8] + mvn r3, #1 + str r3, [r6, #12] + ldrh r3, [r4] + strh r9, [r6] @ movhi + strh r3, [r6, #2] @ movhi + ldr r3, [r5, #3316] + str r2, [r3] + add r2, r2, #304087040 + ldr r3, [r5, #3316] + add r2, r2, #1269760 + addw r2, r2, #1507 + str r2, [r3, #4] +.L2505: + adds r7, r7, #-1 + bcc .L2508 + ldrh r3, [r4, #4] + cbnz r3, .L2506 +.L2508: + ldr r2, [r5, #300] + ldrh r1, [r4] + ldrh r0, [r4, #4] + ldrh r3, [r2, r1, lsl #1] + subs r3, r3, r0 + strh r3, [r2, r1, lsl #1] @ movhi + ldrh r3, [r8, #2390] + strh r3, [r4, #2] @ movhi + movs r3, #0 + strb r3, [r4, #6] + strh r3, [r4, #4] @ movhi +.L2502: + add sp, sp, #40 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L2513: + movs r7, #12 + b .L2504 +.L2506: + mov r0, r4 + bl get_new_active_ppa + str r0, [sp, #8] + adds r0, r0, #1 + beq .L2508 + ldr r3, [r5, #512] + movs r1, #1 + add r0, sp, #4 + str r3, [r6, #4] + adds r3, r3, #1 + adds r2, r3, #1 + mov r2, r10 + it eq + moveq r3, r9 + str r3, [r5, #512] + movs r3, #0 + bl FlashProgPages + ldrh r0, [r4] + bl decrement_vpc_count + b .L2505 +.L2518: + .align 2 +.L2517: + .word .LANCHOR2 + .word .LANCHOR0 + .fnend + .size FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix + .align 1 + .global ftl_map_blk_gc + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type ftl_map_blk_gc, %function +ftl_map_blk_gc: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #12 + mov r4, r0 + ldr r5, [r0, #12] + ldr r10, [r0, #24] + bl ftl_free_no_use_map_blk + ldrh r3, [r4, #10] + ldrh r2, [r4, #8] + subs r3, r3, #4 + cmp r2, r3 + blt .L2520 + uxth r0, r0 + ldrh r9, [r5, r0, lsl #1] + cmp r9, #0 + beq .L2520 + ldr r3, [r4, #32] + cbnz r3, .L2520 + movs r2, #1 + str r2, [r4, #32] + strh r3, [r5, r0, lsl #1] @ movhi + ldrh r3, [r4, #8] + ldrh r2, [r4, #2] + subs r3, r3, #1 + strh r3, [r4, #8] @ movhi + ldr r3, .L2531 + ldrh r3, [r3, #2392] + cmp r2, r3 + bcc .L2521 + mov r0, r4 + bl ftl_map_blk_alloc_new_blk +.L2521: + ldr r5, .L2531+4 + movs r6, #0 + ldr fp, .L2531+16 +.L2522: + ldrh r2, [r4, #6] + uxth r3, r6 + cmp r2, r3 + bhi .L2527 + movs r1, #1 + mov r0, r9 + bl FtlFreeSysBlkQueueIn + movs r3, #0 + str r3, [r4, #32] +.L2520: + ldr r3, .L2531 + ldrh r2, [r4, #2] + ldrh r3, [r3, #2392] + cmp r2, r3 + bcc .L2525 + mov r0, r4 + bl ftl_map_blk_alloc_new_blk + b .L2525 +.L2527: + uxth r7, r6 + add r2, r10, r7, lsl #2 + str r2, [sp] + ldr r2, [r10, r7, lsl #2] + cmp r9, r2, lsr #10 + bne .L2523 + ldr r2, [fp, #3320] + ldr r8, [fp, #3340] + ldr r0, .L2531+8 + str r2, [r5, #1264] + str r8, [r5, #1268] + ldr r2, [r10, r7, lsl #2] + str r3, [sp, #4] + str r2, [r5, #1260] + movs r2, #1 + mov r1, r2 + bl FlashReadPages + ldr r2, [r5, #1256] + ldr r3, [sp, #4] + adds r2, r2, #1 + bne .L2524 +.L2526: + ldr r2, [sp] + movs r3, #0 + ldr r0, .L2531+12 + str r3, [r2] + ldrh r2, [r8, #8] + ldr r1, [r5, #1260] + bl printk + movs r3, #1 + str r3, [fp, #228] +.L2525: + movs r0, #0 + add sp, sp, #12 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2524: + ldrh r2, [r8, #8] + cmp r2, r3 + bne .L2526 + ldrh r2, [r8] + ldrh r3, [r4, #4] + cmp r2, r3 + bne .L2526 + ldr r2, [r5, #1264] + mov r1, r7 + mov r0, r4 + bl FtlMapWritePage +.L2523: + adds r6, r6, #1 + b .L2522 +.L2532: + .align 2 +.L2531: + .word .LANCHOR0 + .word .LANCHOR4 + .word .LANCHOR4+1256 + .word .LC133 + .word .LANCHOR2 + .fnend + .size ftl_map_blk_gc, .-ftl_map_blk_gc + .align 1 + .global Ftl_write_map_blk_to_last_page + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type Ftl_write_map_blk_to_last_page, %function +Ftl_write_map_blk_to_last_page: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r4, r0 + ldr r6, .L2543 + ldr r5, [r6, #228] + cbnz r5, .L2534 + ldrh r3, [r0] + movw r2, #65535 + ldr r7, [r0, #12] + cmp r3, r2 + bne .L2535 + ldrh r3, [r0, #8] + adds r3, r3, #1 + strh r3, [r0, #8] @ movhi + bl FtlFreeSysBlkQueueOut + strh r0, [r7] @ movhi + ldr r3, [r4, #28] + strh r5, [r4, #2] @ movhi + strh r5, [r4] @ movhi + adds r3, r3, #1 + str r3, [r4, #28] +.L2534: + movs r0, #0 + pop {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2535: + ldrh r10, [r7, r3, lsl #1] + movs r1, #255 + ldrh r3, [r0, #2] + ldr r8, .L2543+8 + ldr r7, [r6, #3340] + ldr fp, [r0, #24] + orr r3, r3, r10, lsl #10 + ldr r9, .L2543+12 + str r7, [r8, #1268] + str r3, [r8, #1260] + ldr r3, [r6, #3316] + str r3, [r8, #1264] + ldr r3, [r0, #28] + str r3, [r7, #4] + movw r3, #64245 + strh r3, [r7, #8] @ movhi + ldrh r3, [r0, #4] + strh r10, [r7, #2] @ movhi + strh r3, [r7] @ movhi + ldrh r2, [r9, #2392] + ldr r0, [r6, #3316] + lsls r2, r2, #3 + bl ftl_memset + mov r3, r5 + mov r2, r5 +.L2536: + ldrh r0, [r4, #6] + uxth r1, r3 + cmp r0, r1 + bhi .L2538 + ldrb r3, [r9, #36] @ zero_extendqisi2 + cbz r3, .L2539 + ldrh r1, [r9, #2400] + ldr r0, [r8, #1264] + bl js_hash + str r0, [r7, #12] +.L2539: + movs r2, #1 + movs r3, #0 + mov r1, r2 + ldr r0, .L2543+4 + bl FlashProgPages + ldrh r3, [r4, #2] + mov r0, r4 + adds r3, r3, #1 + strh r3, [r4, #2] @ movhi + bl ftl_map_blk_gc + b .L2534 +.L2538: + uxth r0, r3 + ldr r1, [fp, r0, lsl #2] + cmp r10, r1, lsr #10 + bne .L2537 + ldr r1, [r6, #3316] + adds r2, r2, #1 + uxth r2, r2 + str r0, [r1, r2, lsl #3] + ldr r1, [r6, #3316] + ldr r0, [fp, r0, lsl #2] + add r1, r1, r2, lsl #3 + str r0, [r1, #4] +.L2537: + adds r3, r3, #1 + b .L2536 +.L2544: + .align 2 +.L2543: + .word .LANCHOR2 + .word .LANCHOR4+1256 + .word .LANCHOR4 + .word .LANCHOR0 + .fnend + .size Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page + .align 1 + .global FtlMapWritePage + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FtlMapWritePage, %function +FtlMapWritePage: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #12 + mov r4, r0 + ldr r8, .L2569+20 + mov fp, r1 + movs r6, #0 + ldr r7, .L2569 + mov r9, r8 + str r2, [sp] +.L2546: + ldr r3, [r8, #492] + adds r3, r3, #1 + str r3, [r8, #492] + ldrh r3, [r7, #2392] + ldrh r2, [r4, #2] + subs r3, r3, #1 + cmp r2, r3 + bge .L2547 + ldrh r2, [r4] + movw r3, #65535 + cmp r2, r3 + bne .L2548 +.L2547: + mov r0, r4 + bl Ftl_write_map_blk_to_last_page +.L2548: + ldr r1, [r9, #228] + cmp r1, #0 + bne .L2564 + ldrh r2, [r4] + ldr r3, [r4, #12] + ldr r5, .L2569+4 + ldr r0, [r9, #3340] + ldrh r10, [r3, r2, lsl #1] + movs r2, #16 + ldrh r3, [r4, #2] + str r0, [r5, #1268] + orr r3, r3, r10, lsl #10 + str r3, [r5, #1260] + ldr r3, [sp] + str r3, [r5, #1264] + bl ftl_memset + ldr r3, [r5, #1268] + ldr r2, [r4, #28] + strh fp, [r3, #8] @ movhi + str r2, [r3, #4] + ldrh r2, [r4, #4] + str r3, [sp, #4] + strh r10, [r3, #2] @ movhi + strh r2, [r3] @ movhi + ldrb r2, [r7, #36] @ zero_extendqisi2 + cbz r2, .L2550 + ldrh r1, [r7, #2400] + ldr r0, [r5, #1264] + bl js_hash + ldr r3, [sp, #4] + str r0, [r3, #12] +.L2550: + movs r3, #1 + ldr r0, .L2569+8 + mov r2, r3 + mov r1, r3 + bl FlashProgPages + ldrh r3, [r4, #2] + adds r3, r3, #1 + uxth r3, r3 + strh r3, [r4, #2] @ movhi + ldr r2, [r5, #1256] + adds r1, r2, #1 + bne .L2551 + ldr r1, [r5, #1260] + adds r6, r6, #1 + ldr r0, .L2569+12 + uxth r6, r6 + bl printk + ldrh r3, [r4, #2] + cmp r3, #2 + ittt ls + ldrhls r3, [r7, #2392] + addls r3, r3, #-1 + strhls r3, [r4, #2] @ movhi + cmp r6, #3 + bls .L2546 + ldr r3, .L2569+4 + mov r2, r6 + ldr r0, .L2569+16 + ldr r1, [r3, #1260] + bl printk + movs r3, #1 + str r3, [r9, #228] +.L2564: + movs r0, #0 + add sp, sp, #12 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2551: + cbz r2, .L2554 + cmp r3, #1 + strh r10, [r4, #40] @ movhi + bne .L2555 +.L2556: + movs r3, #0 + str r3, [r4, #36] + b .L2546 +.L2555: + cmp r2, #256 +.L2568: + beq .L2556 + ldr r3, [r4, #36] + cmp r3, #0 + bne .L2556 + ldr r3, .L2569+4 + ldr r2, [r3, #1260] + ldr r3, [r4, #24] + str r2, [r3, fp, lsl #2] + b .L2564 +.L2554: + cmp r3, #1 + b .L2568 +.L2570: + .align 2 +.L2569: + .word .LANCHOR0 + .word .LANCHOR4 + .word .LANCHOR4+1256 + .word .LC134 + .word .LC135 + .word .LANCHOR2 + .fnend + .size FtlMapWritePage, .-FtlMapWritePage + .align 1 + .global flush_l2p_region + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type flush_l2p_region, %function +flush_l2p_region: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r3, r4, r5, lr} + .save {r3, r4, r5, lr} + movs r4, #12 + ldr r5, .L2572 + muls r4, r0, r4 + ldr r3, [r5, #464] + add r0, r5, #3408 + adds r2, r3, r4 + ldrh r1, [r3, r4] + ldr r2, [r2, #8] + bl FtlMapWritePage + ldr r3, [r5, #464] + movs r0, #0 + add r4, r4, r3 + ldr r3, [r4, #4] + bic r3, r3, #-2147483648 + str r3, [r4, #4] + pop {r3, r4, r5, pc} +.L2573: + .align 2 +.L2572: + .word .LANCHOR2 + .fnend + .size flush_l2p_region, .-flush_l2p_region + .align 1 + .global FtlMapTblRecovery + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FtlMapTblRecovery, %function +FtlMapTblRecovery: + .fnstart + @ args = 0, pretend = 0, frame = 32 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #36 + sub sp, sp, #36 + ldr r3, [r0, #24] + mov r4, r0 + movs r1, #0 + movs r7, #0 + ldr fp, .L2615+8 + str r3, [sp, #4] + ldr r3, [r0, #12] + ldr r5, .L2615 + ldr r6, .L2615+4 + str r3, [sp, #8] + ldr r3, [r0, #16] + str r3, [sp, #20] + ldrh r3, [r0, #6] + str r3, [sp, #12] + ldrh r3, [r0, #8] + ldr r0, [sp, #4] + str r3, [sp, #16] + ldr r3, [sp, #12] + lsls r2, r3, #2 + bl ftl_memset + ldr r2, [fp, #3316] + ldr r8, [fp, #3340] + str r7, [r4, #32] + str r2, [r5, #1264] + movw r2, #65535 + str r8, [r5, #1268] + strh r2, [r4] @ movhi + strh r2, [r4, #2] @ movhi + movs r2, #1 + str r7, [r4, #28] + str r2, [r4, #36] +.L2575: + ldr r3, [sp, #16] + sxth r10, r7 + cmp r10, r3 + bge .L2594 + ldr r3, [sp, #16] + lsl r9, r10, #1 + subs r2, r3, #1 + cmp r10, r2 + bne .L2576 + ldr r3, [sp, #8] + movs r1, #1 + ldr fp, .L2615+12 + ldrh r0, [r3, r10, lsl #1] + add r9, r9, r3 + bl FtlGetLastWrittenPage + ldr r2, [sp, #20] + sxth r3, r0 + adds r0, r0, #1 + strh r7, [r4] @ movhi + strh r0, [r4, #2] @ movhi + sub r7, fp, #1256 + ldr r2, [r2, r10, lsl #2] + mov r10, #0 + adds r3, r3, #1 + str r3, [sp, #8] + str r2, [r4, #28] +.L2577: + ldr r3, [sp, #8] + sxth r2, r10 + cmp r2, r3 + blt .L2580 +.L2594: + mov r0, r4 + bl ftl_free_no_use_map_blk + ldrh r2, [r4, #2] + ldrh r3, [r6, #2392] + cmp r2, r3 + bne .L2582 + mov r0, r4 + bl ftl_map_blk_alloc_new_blk +.L2582: + mov r0, r4 + bl ftl_map_blk_gc + mov r0, r4 + bl ftl_map_blk_gc + movs r0, #0 + add sp, sp, #36 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2580: + ldrh r1, [r9] + mov r0, fp + orr r2, r2, r1, lsl #10 + str r2, [r5, #1260] + movs r2, #1 + mov r1, r2 + bl FlashReadPages + ldrb r2, [r6, #36] @ zero_extendqisi2 + cbz r2, .L2578 + ldr r2, [r5, #1268] + ldr r2, [r2, #12] + str r2, [sp, #16] + cbz r2, .L2578 + ldrh r1, [r6, #2400] + ldr r0, [r5, #1264] + bl js_hash + ldr r2, [sp, #16] + cmp r2, r0 + itt ne + movne r2, #-1 + strne r2, [r5, #1256] +.L2578: + ldr r2, [r7, #1256] + adds r2, r2, #1 + beq .L2579 + ldrh r2, [r8, #8] + ldr r3, [sp, #12] + cmp r3, r2 + bls .L2579 + ldrh r1, [r4, #4] + ldrh r0, [r8] + cmp r0, r1 + ittt eq + ldreq r1, [r7, #1260] + ldreq r3, [sp, #4] + streq r1, [r3, r2, lsl #2] +.L2579: + add r10, r10, #1 + b .L2577 +.L2576: + ldr r3, .L2615+8 + ldr r0, .L2615+12 + ldr r2, [r3, #3316] + ldr r3, [sp, #8] + str r2, [r5, #1264] + add r3, r3, r9 + ldrh r2, [r6, #2392] + str r3, [sp, #24] + ldr r3, [sp, #8] + subs r2, r2, #1 + ldrh r1, [r3, r10, lsl #1] + orr r2, r2, r1, lsl #10 + str r2, [r5, #1260] + movs r2, #1 + mov r1, r2 + bl FlashReadPages + ldr r2, [r5, #1256] + adds r2, r2, #1 + beq .L2596 + ldrh r1, [r8] + ldrh r2, [r4, #4] + cmp r1, r2 + bne .L2596 + ldrh r1, [r8, #8] + movw r2, #64245 + cmp r1, r2 + beq .L2584 +.L2596: + ldr r9, .L2615 + mov r10, #0 +.L2585: + ldrh r1, [r6, #2392] + sxth r2, r10 + cmp r2, r1 + bge .L2592 + ldr r3, [sp, #24] + ldr r0, .L2615+12 + ldrh r1, [r3] + orr r2, r2, r1, lsl #10 + str r2, [r9, #1260] + movs r2, #1 + mov r1, r2 + bl FlashReadPages + ldrb r2, [r6, #36] @ zero_extendqisi2 + cbz r2, .L2589 + ldr r2, [r9, #1268] + ldr r2, [r2, #12] + str r2, [sp, #28] + cbz r2, .L2589 + ldrh r1, [r6, #2400] + ldr r0, [r9, #1264] + bl js_hash + ldr r2, [sp, #28] + cmp r2, r0 + itt ne + movne r2, #-1 + strne r2, [r9, #1256] +.L2589: + ldr r2, [r9, #1256] + adds r2, r2, #1 + beq .L2590 + ldrh r2, [r8, #8] + ldr r3, [sp, #12] + cmp r3, r2 + bls .L2590 + ldrh r1, [r4, #4] + ldrh r0, [r8] + cmp r0, r1 + ittt eq + ldreq r1, [r9, #1260] + ldreq r3, [sp, #4] + streq r1, [r3, r2, lsl #2] +.L2590: + add r10, r10, #1 + b .L2585 +.L2584: + movs r0, #0 + mov lr, #4 +.L2586: + ldrh r1, [r6, #2392] + sxth r2, r0 + subs r1, r1, #1 + cmp r2, r1 + blt .L2588 +.L2592: + adds r7, r7, #1 + b .L2575 +.L2588: + ldr ip, [fp, #3316] + ldr r3, [sp, #12] + ldr r1, [ip, r2, lsl #3] + uxth r9, r1 + cmp r3, r9 + bls .L2587 + add r2, lr, r2, lsl #3 + ldr r3, [sp, #4] + ldr r2, [ip, r2] + str r2, [r3, r9, lsl #2] +.L2587: + adds r0, r0, #1 + b .L2586 +.L2616: + .align 2 +.L2615: + .word .LANCHOR4 + .word .LANCHOR0 + .word .LANCHOR2 + .word .LANCHOR4+1256 + .fnend + .size FtlMapTblRecovery, .-FtlMapTblRecovery + .align 1 + .global FtlLoadVonderInfo + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FtlLoadVonderInfo, %function +FtlLoadVonderInfo: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r3, lr} + .save {r3, lr} + ldr r3, .L2618 + ldr r0, .L2618+4 + ldrh r2, [r3, #2412] + add r0, r0, #1296 + strh r2, [r0, #10] @ movhi + movw r2, #61574 + strh r2, [r0, #4] @ movhi + ldrh r2, [r3, #2438] + strh r2, [r0, #8] @ movhi + ldrh r2, [r3, #2414] + ldr r3, [r3, #2440] + strh r2, [r0, #6] @ movhi + str r3, [r0, #12] + ldr r3, .L2618+8 + ldr r2, [r3, #3380] + str r2, [r0, #16] + ldr r2, [r3, #3376] + ldr r3, [r3, #3384] + str r2, [r0, #20] + str r3, [r0, #24] + bl FtlMapTblRecovery + movs r0, #0 + pop {r3, pc} +.L2619: + .align 2 +.L2618: + .word .LANCHOR0 + .word .LANCHOR4 + .word .LANCHOR2 + .fnend + .size FtlLoadVonderInfo, .-FtlLoadVonderInfo + .align 1 + .global FtlLoadMapInfo + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FtlLoadMapInfo, %function +FtlLoadMapInfo: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r3, lr} + .save {r3, lr} + bl FtlL2PDataInit + ldr r0, .L2621 + bl FtlMapTblRecovery + movs r0, #0 + pop {r3, pc} +.L2622: + .align 2 +.L2621: + .word .LANCHOR2+3408 + .fnend + .size FtlLoadMapInfo, .-FtlLoadMapInfo + .align 1 + .global FtlVendorPartWrite + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FtlVendorPartWrite, %function +FtlVendorPartWrite: + .fnstart + @ args = 0, pretend = 0, frame = 56 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L2635 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r10, r2 + mov r5, r1 + adds r1, r0, r1 + .pad #60 + sub sp, sp, #60 + mov r7, r0 + ldrh r2, [r3, #2386] + str r3, [sp] + cmp r1, r2 + bhi .L2631 + ldrh r6, [r3, #2398] + mov r9, #0 + ldr r8, .L2635+8 + lsr r6, r0, r6 + lsl fp, r6, #2 +.L2625: + cbnz r5, .L2630 +.L2623: + mov r0, r9 + add sp, sp, #60 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2630: + ldr r3, [r8, #3384] + mov r0, r7 + ldr r2, [r3, fp] + ldr r3, [sp] + str r2, [sp, #12] + ldrh r3, [r3, #2396] + mov r1, r3 + str r3, [sp, #8] + bl __aeabi_uidivmod + ldr r3, [sp, #8] + ldr r2, [sp, #12] + str r1, [sp, #4] + subs r4, r3, r1 + uxth r4, r4 + cmp r5, r4 + it cc + uxthcc r4, r5 + cbz r2, .L2627 + cmp r4, r3 + beq .L2627 + ldr r3, [r8, #3324] + add r0, sp, #20 + str r2, [sp, #24] + movs r2, #1 + mov r1, r2 + str r3, [sp, #28] + movs r3, #0 + str r3, [sp, #32] + bl FlashReadPages +.L2628: + lsls r3, r4, #9 + ldr r0, [r8, #3324] + mov r1, r10 + mov r2, r3 + str r3, [sp, #8] + ldr r3, [sp, #4] + subs r5, r5, r4 + add r7, r7, r4 + add fp, fp, #4 + add r0, r0, r3, lsl #9 + bl ftl_memcpy + mov r1, r6 + ldr r2, [r8, #3324] + ldr r0, .L2635+4 + adds r6, r6, #1 + bl FtlMapWritePage + ldr r3, [sp, #8] + adds r0, r0, #1 + it eq + moveq r9, #-1 + add r10, r10, r3 + b .L2625 +.L2627: + ldr r3, [sp] + movs r1, #0 + ldr r0, [r8, #3324] + ldrh r2, [r3, #2400] + bl ftl_memset + b .L2628 +.L2631: + mov r9, #-1 + b .L2623 +.L2636: + .align 2 +.L2635: + .word .LANCHOR0 + .word .LANCHOR4+1296 + .word .LANCHOR2 + .fnend + .size FtlVendorPartWrite, .-FtlVendorPartWrite + .align 1 + .global Ftl_save_ext_data + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type Ftl_save_ext_data, %function +Ftl_save_ext_data: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r2, .L2639 + ldr r3, .L2639+4 + ldr r1, [r2, #604] + cmp r1, r3 + bne .L2637 + ldr r3, .L2639+8 + movs r1, #1 + movs r0, #0 + str r3, [r2, #608] + ldr r3, [r2, #500] + str r3, [r2, #692] + ldr r3, [r2, #504] + str r3, [r2, #696] + ldr r3, [r2, #496] + str r3, [r2, #612] + ldr r3, [r2, #484] + str r3, [r2, #616] + ldr r3, [r2, #476] + str r3, [r2, #620] + ldr r3, [r2, #492] + str r3, [r2, #624] + ldr r3, [r2, #520] + str r3, [r2, #632] + ldr r3, [r2, #240] + add r2, r2, #604 + str r3, [r2, #32] + ldr r3, [r2, #-124] + str r3, [r2, #36] + ldr r3, [r2, #-116] + str r3, [r2, #40] + ldr r3, [r2, #-76] + str r3, [r2, #44] + ldr r3, [r2, #-72] + str r3, [r2, #48] + ldr r3, [r2, #512] + str r3, [r2, #60] + ldr r3, [r2, #2672] + str r3, [r2, #64] + b FtlVendorPartWrite +.L2637: + bx lr +.L2640: + .align 2 +.L2639: + .word .LANCHOR2 + .word 1179929683 + .word 1342177379 + .fnend + .size Ftl_save_ext_data, .-Ftl_save_ext_data + .align 1 + .global FtlEctTblFlush + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FtlEctTblFlush, %function +FtlEctTblFlush: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L2648 + push {r4, lr} + .save {r4, lr} + ldr r2, [r3, #2248] + ldr r3, .L2648+4 + cmp r2, #0 + beq .L2646 + ldr r2, [r3, #532] + cmp r2, #39 + ite hi + movhi r2, #32 + movls r2, #4 +.L2642: + ldr r4, .L2648+8 + ldrh r1, [r4, #1340] + cmp r1, #31 + ittt ls + addls r1, r1, #1 + movls r2, #1 + strhls r1, [r4, #1340] @ movhi + cbnz r0, .L2644 + ldr r1, [r3, #3360] + ldr r0, [r1, #20] + ldr r1, [r1, #16] + add r2, r2, r0 + cmp r1, r2 + bcc .L2645 +.L2644: + ldr r2, [r3, #3360] + movs r0, #64 + ldr r1, [r2, #16] + str r1, [r2, #20] + ldr r1, .L2648+12 + str r1, [r2] + ldrh r1, [r3, #3352] + ldr r2, [r3, #3360] + lsls r3, r1, #9 + str r3, [r2, #12] + ldr r3, [r2, #8] + adds r3, r3, #1 + str r3, [r2, #8] + movs r3, #0 + str r3, [r2, #4] + bl FtlVendorPartWrite + bl Ftl_save_ext_data +.L2645: + movs r0, #0 + pop {r4, pc} +.L2646: + movs r2, #32 + b .L2642 +.L2649: + .align 2 +.L2648: + .word .LANCHOR0 + .word .LANCHOR2 + .word .LANCHOR4 + .word 1112818501 + .fnend + .size FtlEctTblFlush, .-FtlEctTblFlush + .align 1 + .global FtlVendorPartRead + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FtlVendorPartRead, %function +FtlVendorPartRead: + .fnstart + @ args = 0, pretend = 0, frame = 56 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L2660 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r9, r2 + mov r6, r1 + adds r1, r0, r1 + .pad #60 + sub sp, sp, #60 + mov r7, r0 + ldrh r2, [r3, #2386] + str r3, [sp, #8] + cmp r1, r2 + bhi .L2659 + ldrh r5, [r3, #2398] + mov r8, #0 + ldr r10, .L2660+16 + lsr r5, r0, r5 + lsl fp, r5, #2 +.L2652: + cbnz r6, .L2658 +.L2650: + mov r0, r8 + add sp, sp, #60 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2658: + ldr r3, [r10, #3384] + mov r0, r7 + ldr r3, [r3, fp] + str r3, [sp, #12] + ldr r3, [sp, #8] + ldrh r4, [r3, #2396] + mov r1, r4 + bl __aeabi_uidivmod + subs r4, r4, r1 + ldr r3, [sp, #12] + uxth r4, r4 + str r1, [sp, #4] + cmp r6, r4 + it cc + uxthcc r4, r6 + lsls r2, r4, #9 + str r2, [sp, #12] + cbz r3, .L2654 + ldr r2, [r10, #3324] + add r0, sp, #20 + str r3, [sp, #24] + str r3, [sp, #12] + str r2, [sp, #28] + movs r2, #0 + str r2, [sp, #32] + movs r2, #1 + mov r1, r2 + bl FlashReadPages + ldr r3, .L2660+4 + ldr r2, [sp, #20] + adds r2, r2, #1 + ldr r2, [r3, #1256] + it eq + moveq r8, #-1 + ldr r3, [sp, #12] + cmp r2, #256 + bne .L2656 + mov r2, r3 + mov r1, r5 + ldr r0, .L2660+8 + bl printk + ldr r2, [r10, #3324] + mov r1, r5 + ldr r0, .L2660+12 + bl FtlMapWritePage +.L2656: + ldr r1, [r10, #3324] + lsls r2, r4, #9 + ldr r3, [sp, #4] + mov r0, r9 + add r1, r1, r3, lsl #9 + bl ftl_memcpy +.L2657: + adds r5, r5, #1 + subs r6, r6, r4 + add r7, r7, r4 + add r9, r9, r4, lsl #9 + add fp, fp, #4 + b .L2652 +.L2654: + lsls r2, r4, #9 + mov r1, r3 + mov r0, r9 + bl ftl_memset + b .L2657 +.L2659: + mov r8, #-1 + b .L2650 +.L2661: + .align 2 +.L2660: + .word .LANCHOR0 + .word .LANCHOR4 + .word .LC136 + .word .LANCHOR4+1296 + .word .LANCHOR2 + .fnend + .size FtlVendorPartRead, .-FtlVendorPartRead + .align 1 + .global FtlLoadEctTbl + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FtlLoadEctTbl, %function +FtlLoadEctTbl: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, lr} + .save {r4, lr} + movs r0, #64 + ldr r4, .L2664 + ldr r2, [r4, #3360] + ldrh r1, [r4, #3352] + bl FtlVendorPartRead + ldr r3, [r4, #3360] + ldr r2, [r3] + ldr r3, .L2664+4 + cmp r2, r3 + beq .L2663 + ldr r1, .L2664+8 + ldr r0, .L2664+12 + bl printk + ldrh r2, [r4, #3352] + movs r1, #0 + ldr r0, [r4, #3360] + lsls r2, r2, #9 + bl ftl_memset +.L2663: + movs r0, #0 + pop {r4, pc} +.L2665: + .align 2 +.L2664: + .word .LANCHOR2 + .word 1112818501 + .word .LC137 + .word .LC77 + .fnend + .size FtlLoadEctTbl, .-FtlLoadEctTbl + .align 1 + .global Ftl_load_ext_data + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type Ftl_load_ext_data, %function +Ftl_load_ext_data: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r3, r4, r5, lr} + .save {r3, r4, r5, lr} + movs r1, #1 + ldr r4, .L2671 + movs r0, #0 + ldr r5, .L2671+4 + add r2, r4, #604 + bl FtlVendorPartRead + ldr r3, [r4, #604] + cmp r3, r5 + beq .L2667 + mov r2, #512 + movs r1, #0 + add r0, r4, #604 + bl ftl_memset + str r5, [r4, #604] +.L2667: + ldr r3, [r4, #604] + cmp r3, r5 + bne .L2668 + ldr r3, [r4, #692] + str r3, [r4, #500] + ldr r3, [r4, #696] + str r3, [r4, #504] + ldr r3, [r4, #612] + str r3, [r4, #496] + ldr r3, [r4, #616] + str r3, [r4, #484] + ldr r3, [r4, #620] + str r3, [r4, #476] + ldr r3, [r4, #624] + str r3, [r4, #492] + ldr r3, [r4, #632] + str r3, [r4, #520] + ldr r3, [r4, #636] + str r3, [r4, #240] + ldr r3, [r4, #640] + str r3, [r4, #480] + ldr r3, [r4, #644] + str r3, [r4, #488] + ldr r3, [r4, #648] + str r3, [r4, #528] + ldr r3, [r4, #652] + str r3, [r4, #532] + ldr r3, [r4, #664] + str r3, [r4, #1116] +.L2668: + ldr r1, [r4, #672] + movs r3, #0 + ldr r2, .L2671+8 + str r3, [r4, #3276] + ldr r5, .L2671+12 + cmp r1, r2 + bne .L2669 + ldrb r2, [r5, #152] @ zero_extendqisi2 + cbz r2, .L2670 + str r3, [r4, #672] + bl Ftl_save_ext_data +.L2669: + ldrh r2, [r5, #2382] + ldr r3, [r4, #520] + ldr r0, [r4, #516] + ldrh r1, [r5, #2332] + mla r0, r0, r2, r3 + bl __aeabi_uidiv + str r0, [r4, #524] + pop {r3, r4, r5, pc} +.L2670: + movs r3, #1 + ldr r1, .L2671+16 + ldr r0, .L2671+20 + str r3, [r5, #2248] + bl printk + b .L2669 +.L2672: + .align 2 +.L2671: + .word .LANCHOR2 + .word 1179929683 + .word 305432421 + .word .LANCHOR0 + .word .LC138 + .word .LC77 + .fnend + .size Ftl_load_ext_data, .-Ftl_load_ext_data + .align 1 + .global FtlMapBlkWriteDumpData + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FtlMapBlkWriteDumpData, %function +FtlMapBlkWriteDumpData: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + mov r6, r0 + ldr r3, [r0, #36] + cbz r3, .L2673 + ldr r2, .L2679 + movs r3, #0 + str r3, [r0, #36] + ldrh r5, [r0, #6] + ldr r3, [r2, #228] + ldr r1, [r0, #24] + cbnz r3, .L2673 + ldr r4, .L2679+4 + subs r5, r5, #1 + ldr r0, [r2, #3320] + uxth r5, r5 + ldr r2, [r2, #3340] + str r0, [r4, #1264] + str r2, [r4, #1268] + ldr r2, [r1, r5, lsl #2] + str r2, [r4, #1260] + cbz r2, .L2677 + movs r2, #1 + add r0, r4, #1256 + mov r1, r2 + bl FlashReadPages +.L2678: + ldr r2, [r4, #1264] + mov r1, r5 + mov r0, r6 + pop {r4, r5, r6, lr} + b FtlMapWritePage +.L2677: + ldr r3, .L2679+8 + movs r1, #255 + ldrh r2, [r3, #2400] + bl ftl_memset + b .L2678 +.L2673: + pop {r4, r5, r6, pc} +.L2680: + .align 2 +.L2679: + .word .LANCHOR2 + .word .LANCHOR4 + .word .LANCHOR0 + .fnend + .size FtlMapBlkWriteDumpData, .-FtlMapBlkWriteDumpData + .align 1 + .global FlashReadFacBbtData + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FlashReadFacBbtData, %function +FlashReadFacBbtData: + .fnstart + @ args = 0, pretend = 0, frame = 40 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + mov r8, r2 + ldr r2, .L2693 + .pad #40 + sub sp, sp, #40 + mov r5, r0 + mov r9, r1 + ldr r7, .L2693+4 + ldrh r3, [r2, #138] + ldrh r2, [r2, #136] + smulbb r3, r3, r2 + ldr r2, [r7, #1192] + uxth r3, r3 + str r2, [sp, #12] + ldr r2, [r7, #1224] + subs r6, r3, #1 + mul r10, r1, r3 + uxth r6, r6 + sub r4, r3, #16 + str r2, [sp, #16] +.L2682: + cmp r6, r4 + bgt .L2688 + mov r0, #-1 + b .L2681 +.L2688: + add r3, r6, r10 + movs r2, #1 + lsls r3, r3, #10 + mov r1, r2 + add r0, sp, #4 + str r3, [sp, #8] + bl FlashReadPages + ldr r3, [sp, #4] + adds r3, r3, #1 + beq .L2683 + ldr r3, [r7, #1224] + ldrh r2, [r3] + movw r3, #61664 + cmp r2, r3 + bne .L2683 + cbz r5, .L2689 + cmp r9, #0 + bne .L2685 + mov r1, r9 + movs r4, #1 +.L2686: + ldr r0, [r7, #1212] + uxth r3, r1 + adds r1, r1, #1 + cmp r3, r0 + bcc .L2687 +.L2685: + mov r2, r8 + ldr r1, [r7, #1192] + mov r0, r5 + bl ftl_memcpy + movs r3, #4 + ldr r0, .L2693+8 + mov r2, r3 + mov r1, r5 + bl rknand_print_hex + movs r0, #0 +.L2681: + add sp, sp, #40 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L2687: + ldr r0, [r7, #1192] + lsrs r6, r3, #5 + and r3, r3, #31 + lsl r3, r4, r3 + ldr r2, [r0, r6, lsl #2] + orrs r3, r3, r2 + str r3, [r0, r6, lsl #2] + b .L2686 +.L2683: + subs r6, r6, #1 + uxth r6, r6 + b .L2682 +.L2689: + mov r0, r5 + b .L2681 +.L2694: + .align 2 +.L2693: + .word .LANCHOR0 + .word .LANCHOR4 + .word .LC139 + .fnend + .size FlashReadFacBbtData, .-FlashReadFacBbtData + .align 1 + .global FlashGetBadBlockList + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FlashGetBadBlockList, %function +FlashGetBadBlockList: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L2705 + push {r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + mov r5, r0 + ldr r6, .L2705+4 + ldr r3, [r3, #48] + ldr r0, [r6, #1220] + ldrb r4, [r3, #13] @ zero_extendqisi2 + ldrh r3, [r3, #14] + smulbb r4, r4, r3 + uxth r4, r4 + adds r2, r4, #7 + asrs r2, r2, #3 + bl FlashReadFacBbtData + adds r0, r0, #1 + mov ip, r6 + bne .L2696 +.L2700: + movs r3, #0 +.L2697: + movw r2, #65535 + movs r0, #0 + strh r2, [r5, r3, lsl #1] @ movhi + pop {r4, r5, r6, r7, r8, pc} +.L2696: + movs r2, #0 + lsr lr, r4, #4 + mov r3, r2 + subs r4, r4, #1 + mov r8, #1 +.L2698: + uxth r1, r2 + cmp r1, r4 + bge .L2697 + ldr r6, [ip, #1220] + lsrs r7, r1, #5 + and r0, r1, #31 + lsl r0, r8, r0 + adds r2, r2, #1 + ldr r6, [r6, r7, lsl #2] + tst r0, r6 + ittt ne + addne r0, r3, #1 + strhne r1, [r5, r3, lsl #1] @ movhi + uxthne r3, r0 + cmp r3, lr + bcc .L2698 + b .L2700 +.L2706: + .align 2 +.L2705: + .word .LANCHOR0 + .word .LANCHOR4 + .fnend + .size FlashGetBadBlockList, .-FlashGetBadBlockList + .align 1 + .global FtlMakeBbt + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FtlMakeBbt, %function +FtlMakeBbt: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #12 + ldr r6, .L2728 + ldr r7, [r6, #228] + cmp r7, #0 + bne .L2708 + ldr r9, .L2728+8 + ldr r8, .L2728+12 + bl FtlBbtMemInit + subw r10, r9, #2484 + sub fp, r9, #18 + mov r4, r10 + bl FtlLoadFactoryBbt +.L2709: + ldrh r3, [r10, #2346] + cmp r7, r3 + bcc .L2715 + movs r5, #0 +.L2716: + ldrh r3, [r4, #2404] + uxth r0, r5 + adds r5, r5, #1 + cmp r3, r0 + bhi .L2717 + ldrh r5, [r4, #2468] + movw r7, #65535 + subs r5, r5, #1 + uxth r5, r5 +.L2718: + ldrh r3, [r4, #2468] + subs r3, r3, #48 + cmp r5, r3 + ble .L2722 + mov r0, r5 + bl FtlBbmIsBadBlock + cmp r0, #1 + beq .L2719 + mov r0, r5 + bl FlashTestBlk + cmp r0, #0 + beq .L2720 + mov r0, r5 + bl FtlBbmMapBadBlock +.L2719: + subs r5, r5, #1 + uxth r5, r5 + b .L2718 +.L2715: + ldr r3, [r6, #3340] + movw r2, #65535 + ldr r0, [r6, #3316] + str r3, [sp] + str r3, [r8, #1268] + ldrh r3, [fp, #2]! + str r0, [r8, #1264] + cmp r3, r2 + beq .L2710 + ldrh r5, [r10, #2388] + movs r2, #1 + mov r1, r2 + ldr r0, .L2728+4 + mla r5, r7, r5, r3 + lsls r3, r5, #10 + str r3, [r8, #1260] + bl FlashReadPages + ldrh r2, [r10, #2388] + ldr r1, [r8, #1264] + ldr r0, [r9] + adds r2, r2, #7 + asrs r2, r2, #3 + bl ftl_memcpy +.L2711: + uxth r0, r5 + adds r7, r7, #1 + add r9, r9, #4 + bl FtlBbmMapBadBlock + b .L2709 +.L2710: + mov r1, r7 + bl FlashGetBadBlockList + ldr r1, [r9] + ldr r0, [r8, #1264] + bl FtlBbt2Bitmap + ldrh r3, [r10, #2388] +.L2727: + subs r3, r3, #1 + uxth r3, r3 + str r3, [sp, #4] +.L2712: + ldr r3, [sp, #4] + ldrh r0, [r4, #2388] + smlabb r0, r0, r7, r3 + uxth r0, r0 + bl FtlBbmIsBadBlock + cmp r0, #1 + beq .L2713 + ldrh r3, [sp, #4] + movs r2, #16 + movs r1, #0 + ldr r0, [r6, #3340] + strh r3, [fp] @ movhi + bl ftl_memset + ldr r2, [sp] + movw r3, #61664 + strh r3, [r2] @ movhi + movs r3, #0 + str r3, [r2, #4] + ldrh r3, [fp] + ldrh r5, [r4, #2388] + strh r3, [r2, #2] @ movhi + ldrh r3, [fp] + ldrh r2, [r6, #3404] + ldr r1, [r9] + ldr r0, [r8, #1264] + mla r5, r7, r5, r3 + lsls r2, r2, #2 + lsls r3, r5, #10 + str r3, [r8, #1260] + bl ftl_memcpy + movs r2, #1 + ldr r0, .L2728+4 + mov r1, r2 + bl FlashEraseBlocks + movs r3, #1 + ldr r0, .L2728+4 + mov r2, r3 + mov r1, r3 + bl FlashProgPages + ldr r3, [r8, #1256] + adds r3, r3, #1 + bne .L2711 + uxth r0, r5 + bl FtlBbmMapBadBlock + b .L2712 +.L2713: + ldr r3, [sp, #4] + b .L2727 +.L2717: + bl FtlBbmMapBadBlock + b .L2716 +.L2720: + ldrh r3, [r4, #2456] + cmp r3, r7 + bne .L2721 + strh r5, [r4, #2456] @ movhi + b .L2719 +.L2721: + strh r5, [r4, #2460] @ movhi +.L2722: + ldrh r3, [r4, #2456] + movs r5, #0 + ldr r0, [r6, #232] + movs r2, #2 + str r5, [r4, #2464] + movs r1, #1 + strh r5, [r4, #2458] @ movhi + lsls r3, r3, #10 + str r3, [r0, #4] + ldrh r3, [r4, #2460] + lsls r3, r3, #10 + str r3, [r0, #40] + bl FlashEraseBlocks + ldrh r0, [r4, #2456] + bl FtlBbmMapBadBlock + ldrh r0, [r4, #2460] + bl FtlBbmMapBadBlock + bl FtlBbmTblFlush + ldr r3, [r4, #2464] + ldrh r2, [r4, #2460] + strh r5, [r4, #2458] @ movhi + adds r3, r3, #1 + str r3, [r4, #2464] + ldrh r3, [r4, #2456] + strh r2, [r4, #2456] @ movhi + strh r3, [r4, #2460] @ movhi + bl FtlBbmTblFlush +.L2708: + movs r0, #0 + add sp, sp, #12 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2729: + .align 2 +.L2728: + .word .LANCHOR2 + .word .LANCHOR4+1256 + .word .LANCHOR0+2484 + .word .LANCHOR4 + .fnend + .size FtlMakeBbt, .-FtlMakeBbt + .align 1 + .global log2phys + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type log2phys, %function +log2phys: + .fnstart + @ args = 0, pretend = 0, frame = 16 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L2745 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #20 + sub sp, sp, #20 + str r2, [sp, #8] + mov fp, r1 + mov r8, r3 + ldr r2, [r3, #2452] + str r0, [sp] + cmp r0, r2 + bcs .L2731 + ldrh r3, [r3, #2398] + movs r5, #12 + ldr r4, .L2745+4 + adds r3, r3, #7 + str r3, [sp, #4] + movs r3, #0 + ldr r2, [sp, #4] + ldr r7, [r4, #464] + lsr r6, r0, r2 + ldrh r2, [r8, #2430] + uxth r10, r6 +.L2732: + uxth r9, r3 + cmp r9, r2 + bcc .L2737 + bl select_l2p_ram_region + muls r5, r0, r5 + movw r2, #65535 + mov r9, r0 + ldrh r1, [r7, r5] + adds r3, r7, r5 + cmp r1, r2 + beq .L2738 + ldr r3, [r3, #4] + cmp r3, #0 + bge .L2738 + bl flush_l2p_region +.L2738: + ldr r3, [r4, #3388] + uxth r6, r6 + ldr r3, [r3, r6, lsl #2] + cmp r3, #0 + bne .L2739 + ldr r2, [r4, #464] + movs r1, #255 + str r3, [sp, #12] + adds r0, r2, r5 + ldrh r2, [r8, #2400] + ldr r0, [r0, #8] + bl ftl_memset + ldr r2, [r4, #464] + ldr r3, [sp, #12] + strh r10, [r2, r5] @ movhi + ldr r2, [r4, #464] + add r5, r5, r2 + str r3, [r5, #4] + b .L2734 +.L2731: + ldr r3, [sp, #8] + mov r0, #-1 + cbnz r3, .L2730 + str r0, [fp] +.L2730: + add sp, sp, #20 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2737: + adds r3, r3, #1 + mla r1, r5, r3, r7 + ldrh r1, [r1, #-12] + cmp r1, r10 + bne .L2732 +.L2734: + ldr r2, [sp, #4] + movs r3, #1 + ldr r0, [sp, #8] + ldr r1, .L2745+4 + lsls r3, r3, r2 + ldr r2, [sp] + subs r3, r3, #1 + ands r3, r3, r2 + movs r2, #12 + uxth r3, r3 + cbnz r0, .L2735 + ldr r0, [r1, #464] + mla r2, r2, r9, r0 + ldr r2, [r2, #8] + ldr r3, [r2, r3, lsl #2] + str r3, [fp] +.L2736: + ldr r2, [r1, #464] + movs r3, #12 + mla r9, r3, r9, r2 + ldr r3, [r9, #4] + adds r2, r3, #1 + beq .L2743 + adds r3, r3, #1 + str r3, [r9, #4] +.L2743: + movs r0, #0 + b .L2730 +.L2735: + mul r2, r2, r9 + ldr r0, [r4, #464] + ldr r5, [fp] + add r0, r0, r2 + ldr r0, [r0, #8] + str r5, [r0, r3, lsl #2] + ldr r3, [r4, #464] + strh r10, [r4, #468] @ movhi + add r2, r2, r3 + ldr r3, [r2, #4] + orr r3, r3, #-2147483648 + str r3, [r2, #4] + b .L2736 +.L2739: + ldr r2, [r4, #464] + ldr r7, .L2745+8 + str r3, [sp, #12] + add r2, r2, r5 + ldr r2, [r2, #8] + add r0, r7, #1256 + str r3, [r7, #1260] + str r2, [r7, #1264] + ldr r2, [r4, #3340] + str r2, [r7, #1268] + movs r2, #1 + mov r1, r2 + bl FlashReadPages + ldr r2, [r7, #1268] + ldr r3, [sp, #12] + ldrh r2, [r2, #8] + cmp r2, r10 + beq .L2740 + mov r2, r3 + mov r1, r6 + ldr r0, .L2745+12 + bl printk + movs r3, #4 + ldr r1, [r7, #1268] + mov r2, r3 + ldr r0, .L2745+16 + bl rknand_print_hex + ldrh r3, [r8, #2428] + movs r2, #4 + ldr r1, [r4, #3388] + ldr r0, .L2745+20 + bl rknand_print_hex + movs r3, #1 + str r3, [r4, #228] +.L2741: + ldr r3, .L2745+4 + movs r1, #0 + ldr r3, [r3, #464] + adds r2, r3, r5 + str r1, [r2, #4] + strh r10, [r3, r5] @ movhi + b .L2734 +.L2740: + ldr r2, [r7, #1256] + cmp r2, #256 + bne .L2741 + mov r2, r3 + mov r1, r6 + ldr r0, .L2745+24 + bl printk + ldr r3, [r4, #464] + mov r1, r6 + ldr r0, .L2745+28 + add r3, r3, r5 + ldr r2, [r3, #8] + bl FtlMapWritePage + b .L2741 +.L2746: + .align 2 +.L2745: + .word .LANCHOR0 + .word .LANCHOR2 + .word .LANCHOR4 + .word .LC140 + .word .LC101 + .word .LC141 + .word .LC142 + .word .LANCHOR2+3408 + .fnend + .size log2phys, .-log2phys + .align 1 + .global FtlWriteDumpData + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FtlWriteDumpData, %function +FtlWriteDumpData: + .fnstart + @ args = 0, pretend = 0, frame = 40 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + .pad #40 + sub sp, sp, #40 + ldr r4, .L2765 + ldr r3, [r4, #228] + cmp r3, #0 + bne .L2747 + ldrh r2, [r4, #324] + cmp r2, #0 + beq .L2749 + ldrb r3, [r4, #328] @ zero_extendqisi2 + cmp r3, #0 + bne .L2749 + ldr r7, .L2765+4 + ldrb r1, [r4, #327] @ zero_extendqisi2 + ldrh r3, [r7, #2390] + muls r3, r1, r3 + cmp r2, r3 + beq .L2749 + ldrb r9, [r4, #330] @ zero_extendqisi2 + cmp r9, #0 + bne .L2747 + ldr r6, [r7, #2452] + mov r2, r9 + mov r1, sp + ldrh r8, [r7, #2324] + subs r6, r6, #1 + mov r0, r6 + bl log2phys + ldr r3, [sp] + ldr r5, [r4, #3340] + ldr r0, [r4, #3316] + str r3, [sp, #8] + adds r3, r3, #1 + str r6, [sp, #20] + str r0, [sp, #12] + str r5, [sp, #16] + str r9, [r5, #4] + beq .L2751 + mov r2, r9 + movs r1, #1 + add r0, sp, #4 + bl FlashReadPages +.L2752: + ldr r9, .L2765+8 + movs r7, #0 + lsl r8, r8, #2 + mov r10, r7 + movw r3, #61589 + strh r3, [r5] @ movhi +.L2753: + cmp r8, r7 + bne .L2757 +.L2754: + movs r3, #1 +.L2764: + strb r3, [r4, #330] +.L2747: + add sp, sp, #40 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L2751: + ldrh r2, [r7, #2400] + movs r1, #255 + bl ftl_memset + b .L2752 +.L2757: + ldrh r3, [r4, #324] + cmp r3, #0 + beq .L2754 + ldr r3, [sp, #8] + mov r0, r9 + str r6, [r5, #8] + adds r7, r7, #1 + str r3, [r5, #12] + ldrh r3, [r4, #320] + strh r3, [r5, #2] @ movhi + bl get_new_active_ppa + ldr r3, [r4, #512] + movs r1, #1 + str r0, [sp, #8] + add r0, sp, #4 + str r3, [r5, #4] + adds r3, r3, #1 + adds r2, r3, #1 + it eq + moveq r3, r10 + str r3, [r4, #512] + movs r3, #0 + mov r2, r3 + bl FlashProgPages + ldrh r0, [r4, #320] + bl decrement_vpc_count + b .L2753 +.L2749: + movs r3, #0 + b .L2764 +.L2766: + .align 2 +.L2765: + .word .LANCHOR2 + .word .LANCHOR0 + .word .LANCHOR2+320 + .fnend + .size FtlWriteDumpData, .-FtlWriteDumpData + .align 1 + .global l2p_flush + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type l2p_flush, %function +l2p_flush: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r3, r4, r5, r6, r7, lr} + .save {r3, r4, r5, r6, r7, lr} + movs r4, #0 + ldr r5, .L2771 + movs r7, #12 + ldr r6, .L2771+4 + bl FtlWriteDumpData +.L2768: + ldrh r3, [r5, #2430] + uxth r0, r4 + cmp r3, r0 + bhi .L2770 + movs r0, #0 + pop {r3, r4, r5, r6, r7, pc} +.L2770: + ldr r2, [r6, #464] + uxth r3, r4 + mla r3, r7, r3, r2 + ldr r3, [r3, #4] + cmp r3, #0 + bge .L2769 + bl flush_l2p_region +.L2769: + adds r4, r4, #1 + b .L2768 +.L2772: + .align 2 +.L2771: + .word .LANCHOR0 + .word .LANCHOR2 + .fnend + .size l2p_flush, .-l2p_flush + .align 1 + .global allocate_new_data_superblock + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type allocate_new_data_superblock, %function +allocate_new_data_superblock: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + mov r6, r0 + ldr r4, .L2799 + ldr r3, [r4, #228] + cbnz r3, .L2774 + ldrh r5, [r0] + movw r3, #65535 + cmp r5, r3 + beq .L2775 + ldr r3, [r4, #300] + mov r0, r5 + ldrh r3, [r3, r5, lsl #1] + cbz r3, .L2776 + bl INSERT_DATA_LIST +.L2775: + ldr r2, .L2799+4 + movs r3, #0 + strb r3, [r6, #8] + cmp r6, r2 + beq .L2777 + ldr r3, .L2799+8 + ldrh r1, [r3, #2344] + cmp r1, #1 + beq .L2777 + ldrb r0, [r3, #152] @ zero_extendqisi2 + cbz r0, .L2778 +.L2777: + movs r3, #1 + strb r3, [r6, #8] +.L2779: + ldrh r0, [r4, #3460] + movw r3, #65535 + cmp r0, r3 + beq .L2784 + cmp r5, r0 + bne .L2785 + ldr r3, [r4, #300] + ldrh r3, [r3, r0, lsl #1] + cbz r3, .L2786 +.L2785: + bl update_vpc_list +.L2786: + movw r3, #65535 + strh r3, [r4, #3460] @ movhi +.L2784: + mov r0, r6 + bl allocate_data_superblock + bl l2p_flush + movs r0, #0 + bl FtlEctTblFlush + bl FtlVpcTblFlush +.L2774: + movs r0, #0 + pop {r4, r5, r6, pc} +.L2776: + bl INSERT_FREE_LIST + b .L2775 +.L2778: + subs r2, r2, #48 + cmp r6, r2 + bne .L2779 + cmp r1, #3 + beq .L2781 + ldr r2, [r4, #1116] + cmp r2, #1 + bne .L2782 +.L2781: + movs r2, #1 + strb r2, [r4, #328] +.L2782: + ldr r3, [r3, #2248] + cmp r3, #0 + beq .L2779 + ldr r3, [r4, #532] + cmp r3, #39 + itt ls + movls r3, #1 + strbls r3, [r4, #328] + b .L2779 +.L2800: + .align 2 +.L2799: + .word .LANCHOR2 + .word .LANCHOR2+368 + .word .LANCHOR0 + .fnend + .size allocate_new_data_superblock, .-allocate_new_data_superblock + .align 1 + .global FtlCheckVpc + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FtlCheckVpc, %function +FtlCheckVpc: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #12 + movs r4, #0 + ldr r5, .L2821 + ldr r6, .L2821+4 + ldr r1, .L2821+8 + mov r8, r5 + ldr r0, .L2821+12 + bl printk + mov r2, #8192 + movs r1, #0 + ldr r0, .L2821+4 + bl memset +.L2802: + ldr r3, [r5, #2452] + cmp r4, r3 + bcc .L2804 + ldr r5, .L2821+16 + movs r4, #0 + ldr r9, .L2821+4 + mov r7, r4 + ldr r10, .L2821+28 +.L2805: + ldrh r2, [r8, #2332] + uxth r3, r4 + cmp r2, r3 + bhi .L2807 + ldr r4, [r5, #312] + cbz r4, .L2808 + ldr r3, [r5, #292] + movs r6, #0 + ldrh r8, [r5, #316] + mov fp, #6 + ldr r9, .L2821+4 + subs r4, r4, r3 + ldr r3, .L2821+20 + asrs r4, r4, #1 + ldr r10, .L2821+32 + muls r4, r3, r4 + uxth r4, r4 +.L2809: + uxth r3, r6 + cmp r8, r3 + bls .L2808 + ldr r3, [r5, #300] + ldrh r2, [r3, r4, lsl #1] + cbz r2, .L2810 + movs r7, #1 + ldrh r3, [r9, r4, lsl #1] + mov r1, r4 + mov r0, r10 + bl printk +.L2810: + mul r4, fp, r4 + ldr r3, [r5, #292] + adds r6, r6, #1 + ldrh r4, [r3, r4] + movw r3, #65535 + cmp r4, r3 + bne .L2809 +.L2808: + mov r1, r7 + ldr r0, .L2821+24 + bl printk + add sp, sp, #12 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2804: + movs r2, #0 + add r1, sp, #4 + mov r0, r4 + bl log2phys + ldr r0, [sp, #4] + adds r3, r0, #1 + beq .L2803 + ubfx r0, r0, #10, #16 + bl P2V_block_in_plane + ldrh r3, [r6, r0, lsl #1] + adds r3, r3, #1 + strh r3, [r6, r0, lsl #1] @ movhi +.L2803: + adds r4, r4, #1 + b .L2802 +.L2807: + ldr r3, [r5, #300] + uxth r6, r4 + ldrh r2, [r3, r6, lsl #1] + ldrh r3, [r9, r6, lsl #1] + cmp r2, r3 + beq .L2806 + mov r1, r6 + mov r0, r10 + bl printk + ldr r3, [r5, #300] + movw r2, #65535 + ldrh r3, [r3, r6, lsl #1] + cmp r3, r2 + beq .L2806 + ldrh r2, [r9, r6, lsl #1] + cmp r2, r3 + it hi + movhi r7, #1 +.L2806: + adds r4, r4, #1 + b .L2805 +.L2822: + .align 2 +.L2821: + .word .LANCHOR0 + .word check_valid_page_count_table + .word .LANCHOR3+191 + .word .LC110 + .word .LANCHOR2 + .word -1431655765 + .word .LC145 + .word .LC143 + .word .LC144 + .fnend + .size FtlCheckVpc, .-FtlCheckVpc + .align 1 + .global Ftlscanalldata + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type Ftlscanalldata, %function +Ftlscanalldata: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + movs r5, #0 + ldr r4, .L2837 + .pad #32 + sub sp, sp, #32 + movs r1, #0 + ldr r7, .L2837+4 + add r8, r4, #1256 + ldr r0, .L2837+8 + bl printk +.L2824: + ldr r3, [r7, #2452] + cmp r5, r3 + bcc .L2830 + add sp, sp, #32 + @ sp needed + pop {r4, r5, r6, r7, r8, pc} +.L2830: + movs r2, #0 + add r1, sp, #28 + mov r0, r5 + bl log2phys + ubfx r3, r5, #0, #11 + cbnz r3, .L2825 + ldr r2, [sp, #28] + mov r1, r5 + ldr r0, .L2837+12 + bl printk +.L2825: + ldr r3, [sp, #28] + adds r2, r3, #1 + beq .L2827 + str r3, [r4, #1260] + movs r1, #1 + ldr r3, .L2837+16 + mov r0, r8 + str r5, [r4, #1272] + ldr r2, [r3, #3316] + ldr r6, [r3, #3340] + str r2, [r4, #1264] + movs r2, #0 + str r6, [r4, #1268] + str r2, [r4, #1256] + bl FlashReadPages + ldr r3, [r4, #1256] + cmp r3, #256 + beq .L2828 + adds r3, r3, #1 + beq .L2828 + ldr r3, [r6, #8] + cmp r5, r3 + beq .L2827 +.L2828: + ldr r2, [r4, #1264] + ldr r3, [r4, #1268] + ldr r0, .L2837+20 + ldr r1, [r2, #4] + str r1, [sp, #16] + mov r1, r5 + ldr r2, [r2] + str r2, [sp, #12] + ldr r2, [r3, #12] + str r2, [sp, #8] + ldr r2, [r3, #8] + str r2, [sp, #4] + ldr r2, [r3, #4] + str r2, [sp] + ldr r2, [r4, #1260] + ldr r3, [r3] + bl printk +.L2827: + adds r5, r5, #1 + b .L2824 +.L2838: + .align 2 +.L2837: + .word .LANCHOR4 + .word .LANCHOR0 + .word .LC146 + .word .LC147 + .word .LANCHOR2 + .word .LC148 + .fnend + .size Ftlscanalldata, .-Ftlscanalldata + .align 1 + .global FtlReUsePrevPpa + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FtlReUsePrevPpa, %function +FtlReUsePrevPpa: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r4, r5, r6, r7, lr} + .save {r4, r5, r6, r7, lr} + .pad #12 + mov r6, r0 + ldr r5, .L2848 + ubfx r0, r1, #10, #16 + str r1, [sp, #4] + bl P2V_block_in_plane + ldr r2, [r5, #300] + ldrh r3, [r2, r0, lsl #1] + cbnz r3, .L2840 + ldr r4, [r5, #312] + cbz r4, .L2841 + ldr r1, [r5, #292] + mov ip, #6 + ldr r2, .L2848+4 + movw lr, #65535 + ldrh r7, [r5, #316] + subs r4, r4, r1 + asrs r4, r4, #1 + muls r4, r2, r4 + uxth r4, r4 +.L2842: + uxth r2, r3 + cmp r7, r2 + bls .L2841 + cmp r4, r0 + bne .L2843 + mov r1, r4 + ldr r0, .L2848+8 + bl List_remove_node + ldrh r3, [r5, #316] + mov r0, r4 + subs r3, r3, #1 + strh r3, [r5, #316] @ movhi + bl INSERT_DATA_LIST + ldr r2, [r5, #300] + ldrh r3, [r2, r4, lsl #1] + adds r3, r3, #1 + strh r3, [r2, r4, lsl #1] @ movhi +.L2841: + movs r2, #1 + add r1, sp, #4 + mov r0, r6 + bl log2phys + add sp, sp, #12 + @ sp needed + pop {r4, r5, r6, r7, pc} +.L2843: + mul r4, ip, r4 + adds r3, r3, #1 + ldrh r4, [r1, r4] + cmp r4, lr + bne .L2842 + b .L2841 +.L2840: + adds r3, r3, #1 + strh r3, [r2, r0, lsl #1] @ movhi + b .L2841 +.L2849: + .align 2 +.L2848: + .word .LANCHOR2 + .word -1431655765 + .word .LANCHOR2+312 + .fnend + .size FtlReUsePrevPpa, .-FtlReUsePrevPpa + .align 1 + .global FtlRecoverySuperblock + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FtlRecoverySuperblock, %function +FtlRecoverySuperblock: + .fnstart + @ args = 0, pretend = 0, frame = 56 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + movw r2, #65535 + ldrh r3, [r0] + .pad #60 + sub sp, sp, #60 + mov r4, r0 + cmp r3, r2 + beq .L2999 + ldrh r3, [r0, #2] + ldr r6, .L3009 + str r3, [sp, #8] + ldr r1, [sp, #8] + ldrh r3, [r6, #2390] + cmp r3, r1 + mov r3, #0 + bne .L2853 + strh r3, [r0, #4] @ movhi +.L3007: + strb r3, [r4, #6] +.L2999: + movs r0, #0 + add sp, sp, #60 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2853: + ldrh r0, [r0, #16] +.L2854: + cmp r0, r2 + add r3, r3, #1 + beq .L2855 + ldrb r1, [r4, #8] @ zero_extendqisi2 + ldrb r3, [r4, #6] @ zero_extendqisi2 + cmp r1, #1 + str r3, [sp, #20] + bne .L2856 + bl FtlGetLastWrittenPage + adds r7, r0, #1 + mov r5, r0 + beq .L2857 + ldrb r3, [r6, #152] @ zero_extendqisi2 + cmp r3, #0 + bne .L2931 + add r3, r6, r0, lsl #1 + ldrh r7, [r3, #156] +.L2858: + ldr r3, .L3009+4 + movs r2, #0 + ldrh ip, [r6, #2324] + movw r9, #65535 + mov r10, #36 + mov fp, r2 + ldr r0, [r3, #3304] + ldr r8, [r3, #1148] + ldrh r3, [r6, #2402] + mov r6, r2 + str r3, [sp, #4] + add r3, r4, #16 + mov lr, r3 + str r3, [sp, #16] +.L2859: + uxth r3, r2 + cmp ip, r3 + bhi .L2862 + ldrb r3, [r4, #8] @ zero_extendqisi2 + cmp r3, #1 + bne .L2932 + ldr r3, .L3009 + ldrb r3, [r3, #152] @ zero_extendqisi2 + adds r3, r3, #0 + it ne + movne r3, #1 +.L3000: + str r3, [sp, #24] + mov r1, r6 + ldr r2, [sp, #24] + mov r9, #0 + bl FlashReadPages + ldr r3, .L3009+4 + ldr r2, [r3, #512] + mov r8, r3 + mov fp, r3 + add r10, r2, #-1 + movw r2, #65535 + str r2, [sp, #12] +.L2864: + uxth r3, r9 + cmp r6, r3 + bhi .L2869 + bne .L2867 + ldr r3, [r8, #3304] + adds r5, r5, #1 + uxth fp, r5 + ldr r0, [r3, #4] +.L3001: + ubfx r0, r0, #10, #16 + bl P2V_plane + ldrb r2, [r4, #8] @ zero_extendqisi2 + str r0, [sp, #4] + ldr r3, .L3009 + cmp r2, #1 + bne .L2871 + ldrb r1, [r3, #152] @ zero_extendqisi2 + cbnz r1, .L2871 + add r5, r3, fp, lsl #1 + ldrh fp, [r5, #156] +.L2871: + ldrh r3, [r3, #2390] + cmp r3, fp + itttt eq + moveq r3, #0 + strheq fp, [r4, #2] @ movhi + strbeq r3, [r4, #6] + strheq r3, [r4, #4] @ movhi + ldrh r3, [sp, #20] + str r3, [sp, #28] + ldr r3, [sp, #8] + cmp fp, r3 + bne .L2873 + ldr r3, [sp, #4] + ldr r1, [sp, #28] + cmp r3, r1 + bne .L2873 + mov r2, r3 +.L3008: + mov r1, fp + mov r0, r4 + bl ftl_sb_update_avl_pages + b .L2999 +.L2855: + uxth r1, r3 + adds r1, r1, #8 + ldrh r0, [r4, r1, lsl #1] + b .L2854 +.L2856: + movs r1, #0 + bl FtlGetLastWrittenPage + mov r5, r0 + adds r0, r0, #1 + beq .L2857 +.L2931: + mov r7, r5 + b .L2858 +.L2857: + movs r3, #0 + strh r3, [r4, #2] @ movhi + b .L3007 +.L2862: + ldrh r3, [lr], #2 + cmp r3, r9 + beq .L2860 + mla r1, r10, r6, r0 + orr r3, r7, r3, lsl #10 + str r3, [r1, #4] + ldr r3, [sp, #4] + muls r3, r6, r3 + add r6, r6, #1 + it mi + addmi r3, r3, #3 + uxth r6, r6 + bic r3, r3, #3 + add r3, r3, r8 + str fp, [r1, #8] + str r3, [r1, #12] +.L2860: + adds r2, r2, #1 + b .L2859 +.L2932: + movs r3, #0 + b .L3000 +.L2869: + movs r3, #36 + ldr r1, [fp, #3304] + mul r3, r3, r9 + adds r2, r1, r3 + ldr r3, [r1, r3] + cbnz r3, .L2865 + ldr r2, [r2, #12] + ldr r3, [r2, #4] + adds r1, r3, #1 + beq .L2866 + ldr r1, [fp, #512] + mov r0, r3 + bl ftl_cmp_data_ver + cbz r0, .L2866 + adds r3, r3, #1 + str r3, [fp, #512] +.L2866: + ldr r3, [r2] + adds r3, r3, #1 + bne .L2868 +.L2867: + ldr r3, [r8, #3304] + uxth r9, r9 + movs r2, #36 + uxth fp, r5 + mla r9, r2, r9, r3 + ldr r0, [r9, #4] + b .L3001 +.L2865: + ldr r1, [r2, #4] + ldr r0, .L3009+8 + bl printk + uxth r3, r7 + ldr r2, .L3009+12 + str r3, [sp, #12] + ldrh r3, [r4] + strh r3, [r2, #1342] @ movhi +.L2868: + add r9, r9, #1 + b .L2864 +.L2873: + ldr r1, [sp, #12] + movw r3, #65535 + cmp r1, r3 + bne .L2874 + cmp r2, #0 + bne .L2875 +.L2874: + uxth r3, r7 + uxth r7, r7 + str r3, [sp, #20] + mov r9, #-1 + ldr r3, [r8, #3472] + adds r3, r3, #1 + it eq + streq r10, [r8, #3472] + ldr r3, [r8, #3472] + mov r8, r9 + str r3, [sp, #32] + ldr r3, [sp, #8] + adds r3, r3, #7 + cmp r7, r3 + ldr r7, .L3009+4 + itett gt + ldrgt r3, [sp, #20] + ldrle r5, [sp, #8] + subgt r5, r3, #7 + uxthgt r5, r5 +.L2878: + ldr r3, [sp, #20] + cmp r5, r3 + bhi .L2891 + ldr r3, .L3009 + movw lr, #65535 + ldr r0, [r7, #3304] + mov ip, #36 + ldrh r3, [r3, #2324] + str r3, [sp, #36] + ldr r3, [sp, #16] + str r3, [sp, #12] + movs r3, #0 + mov r6, r3 + b .L2892 +.L2880: + ldr r1, [sp, #12] + ldrh r2, [r1], #2 + cmp r2, lr + str r1, [sp, #12] + beq .L2879 + mla r1, ip, r6, r0 + adds r6, r6, #1 + orr r2, r5, r2, lsl #10 + uxth r6, r6 + str r2, [r1, #4] +.L2879: + adds r3, r3, #1 +.L2892: + ldr r1, [sp, #36] + uxth r2, r3 + cmp r2, r1 + bcc .L2880 + mov r1, r6 + ldr r2, [sp, #24] + bl FlashReadPages + ldr r3, .L3009 + movs r2, #36 + add ip, r7, r5, lsl #1 + movw r1, #65535 + ldrb r0, [r3, #152] @ zero_extendqisi2 + ldr r3, [r7, #3304] + mla r6, r2, r6, r3 +.L2881: + cmp r6, r3 + bne .L2890 + adds r5, r5, #1 + uxth r5, r5 + b .L2878 +.L2890: + ldr r2, [r3] + cbnz r2, .L2882 + ldr r2, [r3, #12] + ldrh lr, [r2] + cmp lr, r1 + beq .L2883 + ldr r2, [r2, #4] + cmp r2, #-1 + beq .L2883 + cmp r9, #-1 + ldr r8, [r7, #3472] + str r2, [r7, #3472] + bne .L2883 + ldrh r2, [ip, #1220] + cmp r2, r1 + bne .L2884 + cbz r0, .L2883 +.L2884: + cmp r10, r8 + it ne + movne r9, r8 +.L2883: + adds r3, r3, #36 + b .L2881 +.L3010: + .align 2 +.L3009: + .word .LANCHOR0 + .word .LANCHOR2 + .word .LC149 + .word .LANCHOR4 +.L2882: + ldr r3, .L3011 + ldrh r2, [r4] + strh r2, [r3, #1342] @ movhi + ldrb r3, [r4, #8] @ zero_extendqisi2 + cbnz r3, .L2875 + ldr r3, .L3011+4 + movw r2, #65535 + add r5, r3, r5, lsl #1 + ldrh r1, [r5, #1220] + cmp r1, r2 + bne .L2886 + cmp r9, #-1 + beq .L2887 + str r9, [r3, #3472] +.L2875: + ldr r6, [sp, #8] + movs r2, #1 + ldr r5, .L3011+4 + ldr r3, .L3011 + strh r2, [r3, #1344] @ movhi +.L2893: + ldr r3, .L3011+8 + movw r8, #65535 + ldr r0, [r5, #3304] + mov r9, #36 + movs r2, #0 + ldrh ip, [r3, #2324] + ldrb r3, [r3, #152] @ zero_extendqisi2 + str r2, [sp, #12] + mov r1, r3 + ldr r3, [sp, #16] + str r3, [sp, #20] +.L2894: + uxth r3, r2 + cmp ip, r3 + bhi .L2897 + ldr r2, [sp, #24] + ldr r1, [sp, #12] + bl FlashReadPages + movs r3, #0 +.L3006: + str r3, [sp, #20] + ldr r2, [sp, #12] + ldrh r3, [sp, #20] + cmp r2, r3 + bhi .L2925 + ldrb r3, [r4, #8] @ zero_extendqisi2 + adds r6, r6, #1 + uxth r6, r6 + ldr r2, .L3011+8 + cmp r3, #1 + bne .L2926 + ldrb r3, [r2, #152] @ zero_extendqisi2 + cbz r3, .L2926 + ldrh r3, [r2, #2392] + cmp r3, r6 + bne .L2926 + cmp fp, r6 + beq .L2902 +.L2926: + ldrh r3, [r2, #2390] + cmp r3, r6 + bne .L2893 + ldrh r2, [r2, #2324] + movw r0, #65535 + movs r3, #0 + strh r6, [r4, #2] @ movhi + strh r3, [r4, #4] @ movhi +.L2927: + uxth r1, r3 + cmp r1, r2 + bcs .L2999 + ldr r1, [sp, #16] + ldrh r5, [r1], #2 + cmp r5, r0 + str r1, [sp, #16] + add r1, r3, #1 + bne .L3007 + mov r3, r1 + b .L2927 +.L2887: + ldr r2, [sp, #32] + cmp r10, r2 + beq .L2888 +.L3003: + str r2, [r3, #3472] + b .L2875 +.L2888: + ldr r2, [r3, #3472] +.L3002: + subs r2, r2, #1 + b .L3003 +.L2886: + cmp r8, r10 + beq .L2889 + cmp r8, #-1 + beq .L2875 + str r8, [r3, #3472] + b .L2875 +.L2889: + ldr r2, [r3, #3472] + cmp r10, r2 + bne .L3002 + b .L2875 +.L2891: + mov r3, #-1 + str r3, [r7, #3472] + b .L2875 +.L2897: + ldr r7, [sp, #20] + ldrh r3, [r7], #2 + cmp r3, r8 + str r7, [sp, #20] + beq .L2895 + ldr r7, [sp, #12] + orr r3, r6, r3, lsl #10 + mla r7, r9, r7, r0 + str r3, [r7, #4] + ldrb lr, [r4, #8] @ zero_extendqisi2 + cmp lr, #1 + bne .L2896 + cbz r1, .L2896 + orr r3, r3, #-2147483648 + str r3, [r7, #4] +.L2896: + ldr r3, [sp, #12] + adds r3, r3, #1 + uxth r3, r3 + str r3, [sp, #12] +.L2895: + adds r2, r2, #1 + b .L2894 +.L2925: + ldr r3, [sp, #20] + mov r8, #36 + mul r8, r8, r3 + ldr r3, [r5, #3304] + str r3, [sp, #32] + add r9, r3, r8 + ldr r7, [r9, #4] + ubfx r0, r7, #10, #16 + str r7, [sp, #52] + bl P2V_plane + ldr r3, [sp, #8] + cmp r6, r3 + bcc .L2899 + ldr r3, [sp, #32] + bne .L2900 + ldr r2, [sp, #28] + cmp r2, r0 + bhi .L2899 +.L2900: + cmp r6, fp + bne .L2901 + ldr r2, [sp, #4] + cmp r2, r0 + beq .L2902 +.L2901: + ldr r3, [r3, r8] + adds r3, r3, #1 + beq .L2903 + ldr r3, [r9, #12] + movw r2, #61589 + ldrh r1, [r3] + cmp r1, r2 + beq .L2904 + ldrh r0, [r4] +.L3004: + bl decrement_vpc_count + b .L2899 +.L2904: + ldr r10, [r3, #4] + cmp r10, #-1 + beq .L2905 + ldr r1, [r5, #512] + mov r0, r10 + bl ftl_cmp_data_ver + cbz r0, .L2905 + add r2, r10, #1 + str r2, [r5, #512] +.L2905: + ldr r7, [r3, #8] + add r1, sp, #48 + ldr r3, [r3, #12] + movs r2, #0 + mov r0, r7 + str r3, [sp, #44] + bl log2phys + ldr r1, [r5, #3472] + adds r0, r1, #1 + beq .L2906 + mov r0, r10 + bl ftl_cmp_data_ver + cmp r0, #0 + beq .L2906 + ldr r3, [sp, #44] + adds r2, r3, #1 + beq .L2907 + ldr r0, [r5, #3304] + movs r2, #0 + movs r1, #1 + add r0, r0, r8 + str r3, [r0, #4] + ldr r9, [r0, #12] + bl FlashReadPages + ldr r2, [r5, #3304] + ldr r1, [r2, r8] + add r3, r2, r8 + adds r1, r1, #1 + bne .L2908 +.L2909: + mov r3, #-1 + str r3, [sp, #44] +.L2916: + ldr r0, [sp, #44] + adds r1, r0, #1 + beq .L2899 +.L2930: + ubfx r0, r0, #10, #16 + bl P2V_block_in_plane + ldr r3, [r5, #300] + mov r1, r0 + ldrh r3, [r3, r0, lsl #1] + cmp r3, #0 + bne .L3004 + ldr r0, .L3011+12 + bl printk + b .L2899 +.L2907: + ldr r3, [sp, #52] + ldr r2, [sp, #48] + cmp r2, r3 + bne .L2899 + movs r2, #1 + add r1, sp, #44 + mov r0, r7 + bl log2phys +.L2899: + ldr r3, [sp, #20] + adds r3, r3, #1 + b .L3006 +.L2908: + ldr r1, [r9, #8] + cmp r7, r1 + bne .L2909 + ldr r1, [r9, #4] + ldr r0, [r5, #3472] + str r1, [sp, #32] + bl ftl_cmp_data_ver + cmp r0, #0 + beq .L2909 + ldr r1, [sp, #48] + ldr r0, [sp, #52] + cmp r1, r0 + bne .L2911 +.L2914: + ldr r1, [sp, #44] + mov r0, r7 + bl FtlReUsePrevPpa + b .L2909 +.L2911: + ldr r0, [sp, #44] + cmp r1, r0 + beq .L2909 + adds r0, r1, #1 + beq .L2912 + str r1, [r3, #4] + movs r2, #0 + movs r1, #1 + mov r0, r3 + ldr r9, [r3, #12] + bl FlashReadPages +.L2913: + ldr r3, [r5, #3304] + ldr r3, [r3, r8] + adds r3, r3, #1 + beq .L2914 + ldr r3, [r9, #4] + ldr r0, [r5, #3472] + mov r1, r3 + bl ftl_cmp_data_ver + cmp r0, #0 + beq .L2914 + mov r1, r3 + ldr r0, [sp, #32] + bl ftl_cmp_data_ver + cmp r0, #0 + beq .L2909 + b .L2914 +.L2912: + str r1, [r2, r8] + b .L2913 +.L3012: + .align 2 +.L3011: + .word .LANCHOR4 + .word .LANCHOR2 + .word .LANCHOR0 + .word .LC150 +.L2906: + ldr r3, [sp, #52] + ldr r2, [sp, #48] + cmp r2, r3 + beq .L2916 + ldr r3, [sp, #44] + adds r0, r3, #1 + beq .L2918 + ldr r2, .L3013 + ubfx r3, r3, #10, #21 + ldr r2, [r2, #2340] + cmp r3, r2 + bcs .L2899 +.L2918: + movs r2, #1 + add r1, sp, #52 + mov r0, r7 + bl log2phys + ldr r9, [sp, #48] + cmp r9, #-1 + beq .L2916 + ldr r3, [sp, #44] + cmp r9, r3 + beq .L2920 + ubfx r0, r9, #10, #16 + bl P2V_block_in_plane + ldrh r3, [r5, #320] + cmp r3, r0 + beq .L2921 + ldrh r3, [r5, #368] + cmp r3, r0 + beq .L2921 + ldrh r3, [r5, #416] + cmp r3, r0 + bne .L2916 +.L2921: + ldr r0, [r5, #3304] + movs r2, #0 + movs r1, #1 + str r9, [r0, #4] + ldr r8, [r0, #12] + bl FlashReadPages + ldr r3, [r5, #3304] + ldr r3, [r3] + adds r3, r3, #1 + beq .L2916 + ldr r1, [r8, #4] + mov r0, r10 + bl ftl_cmp_data_ver + cmp r0, #0 + bne .L2916 + movs r2, #1 + add r1, sp, #48 + mov r0, r7 + bl log2phys + b .L2916 +.L2903: + ldrh r3, [r4] + mov r1, r7 + ldr r2, .L3013+4 + ldr r0, .L3013+8 + strh r3, [r2, #1342] @ movhi + mov r2, r10 + bl printk + ldr r3, .L3013+4 + ldr r3, [r3, #1348] + cmp r3, #31 + bhi .L2923 + ldr r2, .L3013+4 + ldr r1, [sp, #52] + add r2, r2, r3, lsl #2 + adds r3, r3, #1 + str r1, [r2, #1352] + ldr r2, .L3013+4 + str r3, [r2, #1348] +.L2923: + ldrh r0, [r4] + bl decrement_vpc_count + ldr r3, [r5, #3472] + adds r2, r3, #1 + bne .L2924 +.L3005: + str r10, [r5, #3472] + b .L2899 +.L2924: + cmp r10, r3 + bcs .L2899 + b .L3005 +.L2902: + ldrb r3, [sp, #4] @ zero_extendqisi2 + strh fp, [r4, #2] @ movhi + ldr r2, [sp, #4] + strb r3, [r4, #6] + b .L3008 +.L2920: + mov r0, r9 + b .L2930 +.L3014: + .align 2 +.L3013: + .word .LANCHOR0 + .word .LANCHOR4 + .word .LC151 + .fnend + .size FtlRecoverySuperblock, .-FtlRecoverySuperblock + .align 1 + .global FtlVpcCheckAndModify + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FtlVpcCheckAndModify, %function +FtlVpcCheckAndModify: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + .pad #8 + movs r5, #0 + ldr r7, .L3026 + ldr r1, .L3026+4 + ldr r0, .L3026+8 + bl printk + ldrh r2, [r7, #2334] + movs r1, #0 + ldr r4, .L3026+12 + lsls r2, r2, #1 + ldr r0, [r4, #3364] + bl ftl_memset +.L3016: + ldr r3, [r7, #2452] + cmp r5, r3 + bcc .L3018 + ldr r10, .L3026+16 + mov r8, #0 + movw r9, #65535 +.L3019: + ldrh r3, [r7, #2332] + uxth r6, r8 + cmp r3, r6 + bhi .L3022 + bl l2p_flush + bl FtlVpcTblFlush + add sp, sp, #8 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L3018: + movs r2, #0 + add r1, sp, #4 + mov r0, r5 + bl log2phys + ldr r0, [sp, #4] + adds r3, r0, #1 + beq .L3017 + ubfx r0, r0, #10, #16 + bl P2V_block_in_plane + ldr r2, [r4, #3364] + ldrh r3, [r2, r0, lsl #1] + adds r3, r3, #1 + strh r3, [r2, r0, lsl #1] @ movhi +.L3017: + adds r5, r5, #1 + b .L3016 +.L3022: + ldr r3, [r4, #300] + uxth r5, r8 + ldrh r2, [r3, r5, lsl #1] + ldr r3, [r4, #3364] + ldrh r3, [r3, r5, lsl #1] + cmp r2, r3 + beq .L3020 + cmp r2, r9 + beq .L3020 + ldrh r1, [r4, #320] + cmp r1, r6 + beq .L3020 + ldrh r1, [r4, #416] + cmp r1, r6 + beq .L3020 + ldrh r1, [r4, #368] + cmp r1, r6 + beq .L3020 + mov r1, r5 + mov r0, r10 + bl printk + ldr r3, [r4, #300] + ldrh r2, [r3, r5, lsl #1] + cbnz r2, .L3021 + ldr r2, [r4, #3364] + ldrh r2, [r2, r5, lsl #1] + strh r2, [r3, r5, lsl #1] @ movhi +.L3020: + add r8, r8, #1 + b .L3019 +.L3021: + ldr r2, [r4, #3364] + mov r0, r6 + ldrh r2, [r2, r5, lsl #1] + strh r2, [r3, r5, lsl #1] @ movhi + bl update_vpc_list + b .L3020 +.L3027: + .align 2 +.L3026: + .word .LANCHOR0 + .word .LANCHOR3+203 + .word .LC110 + .word .LANCHOR2 + .word .LC152 + .fnend + .size FtlVpcCheckAndModify, .-FtlVpcCheckAndModify + .align 1 + .global FtlGcScanTempBlk + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FtlGcScanTempBlk, %function +FtlGcScanTempBlk: + .fnstart + @ args = 0, pretend = 0, frame = 72 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L3078 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #76 + sub sp, sp, #76 + mov r4, r0 + str r1, [sp, #16] + ldrh r6, [r3, #3444] + movw r3, #65535 + cmp r6, r3 + beq .L3062 + cbnz r6, .L3029 +.L3030: + bl FtlGcPageVarInit + b .L3031 +.L3062: + movs r6, #0 +.L3029: + ldr r3, .L3078+4 + ldr r2, [sp, #16] + ldrh r3, [r3, #2390] + cmp r3, r2 + beq .L3030 +.L3031: + ldr r5, .L3078+8 + mov r3, #-1 + str r3, [sp, #12] + movs r3, #0 + str r3, [sp, #4] +.L3032: + ldrh r1, [r4] + movw r3, #65535 + movs r2, #0 + strb r2, [r4, #8] + cmp r1, r3 + beq .L3033 + ldr r7, .L3078+4 +.L3059: + ldr r3, [r5, #3304] + movs r2, #0 + ldrh ip, [r7, #2324] + add lr, r4, #16 + ldr r10, [r5, #1148] + mov fp, r2 + str r3, [sp, #8] + movw r8, #65535 + ldr r3, [r5, #1144] + mov r9, #36 + str r3, [sp, #20] + ldrh r3, [r7, #2400] + str r3, [sp, #24] + ldrh r3, [r7, #2402] + str r3, [sp, #28] +.L3034: + uxth r3, r2 + cmp ip, r3 + bhi .L3038 + mov r10, #0 + movs r2, #0 + mov r1, fp + ldr r0, [sp, #8] + bl FlashReadPages +.L3039: + uxth r3, r10 + cmp fp, r3 + bhi .L3057 + ldr r3, [sp, #4] + adds r6, r6, #1 + uxth r6, r6 + adds r3, r3, #1 + str r3, [sp, #4] + ldr r2, [sp, #4] + ldr r3, [sp, #16] + cmp r3, r2 + bls .L3058 +.L3060: + ldrh r3, [r7, #2390] + cmp r3, r6 + bhi .L3059 + movs r2, #0 + b .L3033 +.L3038: + ldrh r3, [lr], #2 + cmp r3, r8 + beq .L3035 + ldr r1, [sp, #8] + orr r3, r6, r3, lsl #10 + mov r0, fp + mla r1, r9, fp, r1 + str r3, [r1, #4] + ldr r3, [sp, #24] + muls r3, r0, r3 + ldr r0, [sp, #20] + it mi + addmi r3, r3, #3 + bic r3, r3, #3 + add r3, r3, r0 + mov r0, fp + str r3, [r1, #8] + ldr r3, [sp, #28] + muls r3, r0, r3 + it mi + addmi r3, r3, #3 + bic r3, r3, #3 + add r3, r3, r10 + str r3, [r1, #12] + add r3, fp, #1 + uxth fp, r3 +.L3035: + adds r2, r2, #1 + b .L3034 +.L3057: + mov r9, #36 + ldr r8, [r5, #3304] + mul r9, r9, r10 + add r3, r8, r9 + ldr r2, [r3, #4] + str r3, [sp, #20] + ubfx r0, r2, #10, #16 + str r2, [sp, #8] + bl P2V_plane + ldr r8, [r8, r9] + mov r2, r0 + ldr r3, [sp, #20] + ldr r3, [r3, #12] + cmp r8, #0 + bne .L3040 + ldrh r0, [r3] + movw r1, #65535 + cmp r0, r1 + bne .L3041 +.L3044: + ldrb r3, [r7, #152] @ zero_extendqisi2 + cbz r3, .L3074 + movs r3, #1 + str r3, [r5, #3468] +.L3033: + ldr r3, .L3078 + movw r1, #65535 + strh r6, [r4, #2] @ movhi + mov r0, r4 + strb r2, [r4, #6] + strh r1, [r3, #3444] @ movhi + mov r1, r6 + bl ftl_sb_update_avl_pages + b .L3028 +.L3041: + ldr r0, [r3, #8] + ldr r1, [r7, #2452] + cmp r0, r1 + bhi .L3044 + ldrb r2, [r7, #36] @ zero_extendqisi2 + cbnz r2, .L3047 +.L3048: + ldr r2, [r3, #8] + add r10, r10, #1 + ldr r1, [sp, #8] + ldr r0, [r3, #12] + bl FtlGcUpdatePage + b .L3039 +.L3074: + ldrh r1, [r4] + ldr r2, [r5, #300] + strh r3, [r2, r1, lsl #1] @ movhi +.L3077: + ldrh r0, [r4] + bl INSERT_FREE_LIST + movw r3, #65535 + strh r3, [r4] @ movhi + strh r3, [r5, #556] @ movhi +.L3076: + bl FtlGcPageVarInit + movs r6, #0 + b .L3032 +.L3047: + mov r2, r8 + add r1, sp, #32 + str r3, [sp, #20] + bl log2phys + ldr r3, [sp, #20] + ldr r1, [sp, #32] + ldr r2, [r3, #12] + cmp r2, r1 + bne .L3048 + adds r1, r2, #1 + beq .L3048 + str r2, [sp, #40] + movs r1, #1 + ldr r2, [r5, #3336] + add r0, sp, #36 + str r2, [sp, #44] + ldr r2, [r5, #3344] + str r2, [sp, #48] + mov r2, r8 + bl FlashReadPages + ldrh r2, [r7, #2396] + ldr r1, [r5, #3304] + ldr r0, [sp, #44] + ldr r3, [sp, #20] + lsl ip, r2, #7 + add r9, r9, r1 +.L3049: + cmp r8, ip + beq .L3048 + ldr r1, [r9, #8] + ldr r2, [r0, r8, lsl #2] + ldr r1, [r1, r8, lsl #2] + cmp r1, r2 + beq .L3050 + ldr r2, [sp, #40] + ldrh r1, [r4] + ldr r0, .L3078+12 + bl printk + ldrh r2, [r4] + movs r1, #0 + ldr r3, [r5, #300] + strh r1, [r3, r2, lsl #1] @ movhi + b .L3077 +.L3050: + add r8, r8, #1 + b .L3049 +.L3040: + ldr r2, [sp, #8] + ldrh r1, [r4] + ldr r0, .L3078+16 + bl printk + ldr r3, [r7, #2248] + ldrh r2, [r4] + cbnz r3, .L3053 + ldrb r3, [r7, #152] @ zero_extendqisi2 + cbz r3, .L3054 +.L3053: + ldr r3, [r5, #236] + ldrh r3, [r3, r2, lsl #1] + cmp r3, #159 + bls .L3055 +.L3054: + ldr r3, [r5, #3304] + ldr r3, [r3, r9] + adds r3, r3, #1 + bne .L3056 +.L3055: + ldr r3, [r5, #3304] + add r3, r3, r9 + ldr r3, [r3, #4] + str r3, [sp, #12] +.L3056: + ldr r3, [r5, #300] + movs r1, #0 + strh r1, [r3, r2, lsl #1] @ movhi + ldrh r0, [r4] + bl INSERT_FREE_LIST + movw r3, #65535 + strh r3, [r4] @ movhi + b .L3076 +.L3058: + ldr r2, .L3078 + movw r1, #65535 + ldrh r3, [r2, #3444] + cmp r3, r1 + beq .L3060 + ldr r1, [sp, #4] + add r3, r3, r1 + strh r3, [r2, #3444] @ movhi + ldrh r3, [r7, #2390] + cmp r3, r6 + bls .L3060 +.L3028: + ldr r0, [sp, #12] + add sp, sp, #76 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L3079: + .align 2 +.L3078: + .word .LANCHOR1 + .word .LANCHOR0 + .word .LANCHOR2 + .word .LC153 + .word .LC154 + .fnend + .size FtlGcScanTempBlk, .-FtlGcScanTempBlk + .align 1 + .global FtlReadRefresh + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FtlReadRefresh, %function +FtlReadRefresh: + .fnstart + @ args = 0, pretend = 0, frame = 40 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, lr} + .save {r4, r5, r6, r7, r8, r9, lr} + .pad #44 + sub sp, sp, #44 + ldr r5, .L3096 + ldr r9, [r5, #684] + mov r6, r5 + cmp r9, #0 + beq .L3081 + ldr r4, .L3096+4 + ldr r1, [r5, #688] + ldr r2, [r4, #2452] + cmp r1, r2 + bcs .L3082 + mov r5, #2048 +.L3087: + ldr r0, [r6, #688] + ldr r3, [r4, #2452] + cmp r0, r3 + bcc .L3083 +.L3086: + mov r0, #-1 +.L3080: + add sp, sp, #44 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, pc} +.L3083: + movs r2, #0 + mov r1, sp + bl log2phys + ldr r2, [sp] + ldr r3, [r6, #688] + adds r1, r2, #1 + add r3, r3, #1 + str r3, [r6, #688] + beq .L3085 + str r2, [sp, #8] + add r0, sp, #40 + movs r2, #0 + movs r1, #1 + str r2, [r0, #-36]! + str r3, [sp, #20] + str r2, [sp, #12] + str r2, [sp, #16] + bl FlashReadPages + ldr r3, [sp, #4] + cmp r3, #256 + bne .L3086 + ldr r0, [sp] + ubfx r0, r0, #10, #16 + bl P2V_block_in_plane + bl FtlGcRefreshBlock + b .L3086 +.L3085: + subs r5, r5, #1 + bne .L3087 + b .L3086 +.L3082: + ldr r3, [r5, #476] + movs r0, #0 + str r0, [r5, #684] + str r0, [r5, #688] + str r3, [r5, #680] + b .L3080 +.L3081: + ldr r8, [r5, #476] + movw r4, #10000 + ldr r1, [r5, #528] + ldr r7, [r5, #680] + add r3, r8, #1048576 + cmp r1, r4 + ite hi + movhi r4, #31 + movls r4, #63 + cmp r7, r3 + bhi .L3091 + ldr r3, .L3096+4 + lsrs r1, r1, #10 + mov r0, #1000 + adds r1, r1, #1 + ldr r3, [r3, #2452] + muls r0, r3, r0 + bl __aeabi_uidiv + add r0, r0, r7 + cmp r8, r0 + bhi .L3091 + ldrh r3, [r5, #272] + ands r0, r4, r3 + bne .L3093 + ldr r2, [r5, #704] + cmp r3, r2 + beq .L3080 +.L3091: + ldrh r3, [r6, #272] + movs r0, #0 + str r0, [r6, #688] + str r8, [r6, #680] + str r3, [r6, #704] + movs r3, #1 + str r3, [r6, #684] + b .L3080 +.L3093: + mov r0, r9 + b .L3080 +.L3097: + .align 2 +.L3096: + .word .LANCHOR2 + .word .LANCHOR0 + .fnend + .size FtlReadRefresh, .-FtlReadRefresh + .align 1 + .global FtlGcFreeTempBlock + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FtlGcFreeTempBlock, %function +FtlGcFreeTempBlock: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + .pad #8 + ldr r4, .L3136 + ldr r6, .L3136+4 + ldr r2, [r4, #228] + ldrh r1, [r6, #2390] + cbz r2, .L3099 +.L3134: + movs r0, #0 +.L3098: + add sp, sp, #8 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L3099: + ldrh r5, [r4, #416] + movw r7, #65535 + cmp r5, r7 + bne .L3101 +.L3110: + ldrh r2, [r4, #416] + movw r3, #65535 + movs r5, #0 + str r5, [r4, #3468] + cmp r2, r3 + beq .L3134 + bl FtlCacheWriteBack + ldrb r3, [r4, #423] @ zero_extendqisi2 + mov r9, #12 + ldrh r0, [r6, #2390] + ldr r2, [r4, #300] + ldrh r1, [r4, #416] + smulbb r3, r3, r0 + strh r3, [r2, r1, lsl #1] @ movhi + ldr r2, [r4, #496] + ldrh r3, [r4, #1172] + add r3, r3, r2 + str r3, [r4, #496] +.L3111: + ldrh r2, [r4, #1172] + uxth r3, r5 + cmp r2, r3 + bhi .L3115 + movw r0, #65535 + bl decrement_vpc_count + ldrb r3, [r6, #152] @ zero_extendqisi2 + cbz r3, .L3116 + ldrh r1, [r4, #416] + ldr r0, .L3136+8 + bl printk +.L3116: + ldrh r0, [r4, #416] + ldr r3, [r4, #300] + ldrh r3, [r3, r0, lsl #1] + cmp r3, #0 + beq .L3117 + bl INSERT_DATA_LIST +.L3118: + movw r7, #65535 + movs r5, #0 + strh r7, [r4, #416] @ movhi + strh r5, [r4, #1172] @ movhi + strh r5, [r4, #1164] @ movhi + bl l2p_flush + bl FtlVpcTblFlush + ldr r3, [r6, #2248] + strh r7, [r4, #556] @ movhi + cmp r3, #0 + beq .L3119 + ldr r3, [r4, #532] + cmp r3, #39 + bhi .L3119 + ldrh r3, [r4, #536] + ldrh r2, [r4, #316] + cmp r2, r3 + bcs .L3134 + lsls r3, r3, #1 +.L3135: + strh r3, [r4, #1120] @ movhi + b .L3134 +.L3101: + cbz r0, .L3104 + ldr r3, .L3136+12 + ldrh r0, [r3, #3444] + cmp r0, r7 + beq .L3105 +.L3106: + movs r1, #2 +.L3104: + ldr r0, .L3136+16 + bl FtlGcScanTempBlk + str r0, [sp, #4] + adds r0, r0, #1 + beq .L3107 + ldr r2, [r4, #236] + ldrh r3, [r2, r5, lsl #1] + cmp r3, #4 + bls .L3108 + subs r3, r3, #5 + movs r0, #1 + strh r3, [r2, r5, lsl #1] @ movhi + bl FtlEctTblFlush +.L3108: + ldr r3, [r4, #3468] + cbnz r3, .L3109 + ldr r3, [r4, #700] + ldr r0, [sp, #4] + adds r3, r3, #1 + ubfx r0, r0, #10, #16 + str r3, [r4, #700] + bl FtlBbmMapBadBlock + bl FtlBbmTblFlush +.L3109: + movs r3, #0 + str r3, [r4, #3468] +.L3121: + movs r0, #1 + b .L3098 +.L3105: + strh r2, [r3, #3444] @ movhi + ldrh r3, [r4, #316] + cmp r3, #17 + bhi .L3106 + b .L3104 +.L3107: + ldr r3, .L3136+12 + ldrh r2, [r3, #3444] + movw r3, #65535 + cmp r2, r3 + bne .L3121 + b .L3110 +.L3115: + uxth r8, r5 + ldr r10, [r4, #1168] + ldr r3, [r6, #2452] + mul r8, r9, r8 + add r7, r10, r8 + ldr r0, [r7, #8] + cmp r0, r3 + bcc .L3112 +.L3132: + ldrh r0, [r4, #416] + b .L3133 +.L3112: + movs r2, #0 + add r1, sp, #4 + bl log2phys + ldr r0, [r10, r8] + ldr r3, [sp, #4] + cmp r0, r3 + bne .L3114 + ubfx r0, r0, #10, #16 + bl P2V_block_in_plane + movs r2, #1 + mov r8, r0 + adds r1, r7, #4 + ldr r0, [r7, #8] + bl log2phys + mov r0, r8 +.L3133: + bl decrement_vpc_count + b .L3113 +.L3114: + ldr r2, [r7, #4] + cmp r3, r2 + bne .L3132 +.L3113: + adds r5, r5, #1 + b .L3111 +.L3117: + bl INSERT_FREE_LIST + b .L3118 +.L3119: + ldrh r3, [r4, #536] + ldrh r2, [r4, #316] + add r1, r3, r3, lsl #1 + cmp r2, r1, asr #2 + ble .L3134 + ldrb r0, [r6, #152] @ zero_extendqisi2 + cbz r0, .L3120 + subs r3, r3, #2 + b .L3135 +.L3120: + movs r3, #20 + strh r3, [r4, #1120] @ movhi + b .L3098 +.L3137: + .align 2 +.L3136: + .word .LANCHOR2 + .word .LANCHOR0 + .word .LC155 + .word .LANCHOR1 + .word .LANCHOR2+416 + .fnend + .size FtlGcFreeTempBlock, .-FtlGcFreeTempBlock + .align 1 + .global FtlGcPageRecovery + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FtlGcPageRecovery, %function +FtlGcPageRecovery: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r3, r4, r5, lr} + .save {r3, r4, r5, lr} + ldr r5, .L3140 + ldr r4, .L3140+4 + ldrh r1, [r5, #2390] + add r0, r4, #416 + bl FtlGcScanTempBlk + ldrh r2, [r4, #418] + ldrh r3, [r5, #2390] + cmp r2, r3 + bcc .L3138 + add r0, r4, #3408 + bl FtlMapBlkWriteDumpData + movs r0, #0 + bl FtlGcFreeTempBlock + movs r3, #0 + str r3, [r4, #3468] +.L3138: + pop {r3, r4, r5, pc} +.L3141: + .align 2 +.L3140: + .word .LANCHOR0 + .word .LANCHOR2 + .fnend + .size FtlGcPageRecovery, .-FtlGcPageRecovery + .align 1 + .global FtlPowerLostRecovery + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FtlPowerLostRecovery, %function +FtlPowerLostRecovery: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + movs r5, #0 + ldr r4, .L3143 + ldr r3, .L3143+4 + add r6, r4, #320 + add r4, r4, #368 + mov r0, r6 + str r5, [r3, #1348] + bl FtlRecoverySuperblock + mov r0, r6 + bl FtlSlcSuperblockCheck + mov r0, r4 + bl FtlRecoverySuperblock + mov r0, r4 + bl FtlSlcSuperblockCheck + bl FtlGcPageRecovery + movw r0, #65535 + bl decrement_vpc_count + mov r0, r5 + pop {r4, r5, r6, pc} +.L3144: + .align 2 +.L3143: + .word .LANCHOR2 + .word .LANCHOR4 + .fnend + .size FtlPowerLostRecovery, .-FtlPowerLostRecovery + .align 1 + .global FtlSysBlkInit + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FtlSysBlkInit, %function +FtlSysBlkInit: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r3, r4, r5, r6, r7, lr} + .save {r3, r4, r5, r6, r7, lr} + movs r3, #0 + ldr r5, .L3162 + movw r7, #65535 + ldr r6, .L3162+4 + ldr r4, .L3162+8 + ldrh r0, [r5, #2328] + strh r3, [r6, #1344] @ movhi + strh r7, [r6, #1342] @ movhi + bl FtlFreeSysBlkQueueInit + bl FtlScanSysBlk + ldrh r3, [r4, #540] + cmp r3, r7 + mov r7, r6 + bne .L3146 +.L3148: + mov r6, #-1 +.L3145: + mov r0, r6 + pop {r3, r4, r5, r6, r7, pc} +.L3146: + bl FtlLoadSysInfo + mov r6, r0 + cmp r0, #0 + bne .L3148 + bl FtlLoadMapInfo + bl FtlLoadVonderInfo + bl Ftl_load_ext_data + bl FtlLoadEctTbl + bl FtlFreeSysBLkSort + bl SupperBlkListInit + bl FtlPowerLostRecovery + movs r0, #1 + bl FtlUpdateVaildLpn + ldrh r1, [r5, #2430] + mov r3, r6 + ldr r2, [r4, #464] + movs r0, #12 +.L3149: + cmp r3, r1 + bge .L3154 + mla ip, r0, r3, r2 + ldr ip, [ip, #4] + cmp ip, #0 + bge .L3150 +.L3154: + ldrh r2, [r4, #272] + cmp r3, r1 + add r2, r2, #1 + strh r2, [r4, #272] @ movhi + bge .L3161 +.L3151: + ldrh r1, [r4, #320] + ldr r2, [r4, #300] + ldrh r0, [r4, #324] + ldrh r3, [r2, r1, lsl #1] + subs r3, r3, r0 + strh r3, [r2, r1, lsl #1] @ movhi + ldrh r3, [r5, #2390] + ldr r1, [r4, #300] + ldrh r0, [r4, #368] + strh r3, [r4, #322] @ movhi + movs r3, #0 + strb r3, [r4, #326] + strh r3, [r4, #324] @ movhi + ldrh r7, [r4, #372] + ldrh r2, [r1, r0, lsl #1] + subs r2, r2, r7 + strh r2, [r1, r0, lsl #1] @ movhi + strb r3, [r4, #374] + strh r3, [r4, #372] @ movhi + ldrh r3, [r4, #274] + ldrh r2, [r5, #2390] + adds r3, r3, #1 + strh r2, [r4, #370] @ movhi + strh r3, [r4, #274] @ movhi + bl l2p_flush + bl FtlVpcTblFlush + bl FtlVpcTblFlush + b .L3155 +.L3150: + adds r3, r3, #1 + b .L3149 +.L3161: + ldrh r3, [r7, #1344] + cmp r3, #0 + bne .L3151 +.L3155: + ldrh r0, [r4, #320] + movw r3, #65535 + cmp r0, r3 + beq .L3156 + ldrh r3, [r4, #324] + cbnz r3, .L3156 + ldrh r3, [r4, #372] + cbnz r3, .L3156 + bl FtlGcRefreshOpenBlock + ldrh r0, [r4, #368] + bl FtlGcRefreshOpenBlock + bl FtlVpcTblFlush + ldr r0, .L3162+12 + bl allocate_new_data_superblock + ldr r0, .L3162+16 + bl allocate_new_data_superblock +.L3156: + ldrb r3, [r5, #36] @ zero_extendqisi2 + cbnz r3, .L3157 + ldrh r3, [r4, #272] + lsls r3, r3, #27 + bne .L3145 +.L3157: + bl FtlVpcCheckAndModify + b .L3145 +.L3163: + .align 2 +.L3162: + .word .LANCHOR0 + .word .LANCHOR4 + .word .LANCHOR2 + .word .LANCHOR2+320 + .word .LANCHOR2+368 + .fnend + .size FtlSysBlkInit, .-FtlSysBlkInit + .align 1 + .global FtlLowFormat + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FtlLowFormat, %function +FtlLowFormat: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr} + ldr r4, .L3195 + ldr r6, [r4, #228] + cmp r6, #0 + bne .L3166 + ldr r5, .L3195+4 + mov r1, r6 + ldr r0, [r4, #3392] + ldrh r2, [r5, #2428] + lsls r2, r2, #2 + bl ftl_memset + ldrh r2, [r5, #2428] + mov r1, r6 + ldr r0, [r4, #3388] + lsls r2, r2, #2 + bl ftl_memset + ldrh r0, [r5, #2328] + str r6, [r4, #508] + str r6, [r4, #512] + bl FtlFreeSysBlkQueueInit + bl FtlLoadBbt + cbz r0, .L3167 + bl FtlMakeBbt +.L3167: + ldr r0, .L3195+8 + movs r2, #0 +.L3168: + ldrh r1, [r5, #2396] + uxth r3, r2 + adds r2, r2, #1 + cmp r3, r1, lsl #7 + blt .L3169 + ldrh r7, [r5, #2332] + movs r6, #0 +.L3170: + ldrh r3, [r5, #2334] + cmp r3, r7 + bhi .L3171 + ldrh r1, [r5, #2324] + subs r3, r6, #3 + cmp r3, r1, lsl #1 + blt .L3172 + mov r0, r6 + movs r6, #0 + bl __aeabi_uidiv + ldr r3, [r5, #2424] + add r0, r0, r3 + uxth r0, r0 + bl FtlSysBlkNumInit + ldrh r0, [r5, #2328] + bl FtlFreeSysBlkQueueInit + ldrh r7, [r5, #2332] +.L3173: + ldrh r3, [r5, #2334] + cmp r3, r7 + bhi .L3174 +.L3172: + movs r7, #0 + mov r8, r7 +.L3175: + ldrh r3, [r5, #2332] + uxth r0, r7 + adds r7, r7, #1 + cmp r3, r0 + bhi .L3176 + ldrh r3, [r5, #2334] + ldrh r7, [r5, #2324] + ldr fp, [r5, #2336] + str r3, [r4, #3292] + mov r1, r7 + mov r0, fp + bl __aeabi_uidiv + ubfx r9, r0, #5, #16 + mov r10, r0 + add r3, r9, #36 + str r0, [r5, #2452] + strh r3, [r4, #536] @ movhi + movs r3, #24 + muls r3, r7, r3 + cmp r8, r3 + ble .L3177 + mov r1, r7 + sub r0, fp, r8 + bl __aeabi_uidiv + str r0, [r5, #2452] + lsrs r0, r0, #5 + adds r0, r0, #24 + strh r0, [r4, #536] @ movhi +.L3177: + ldr r3, [r5, #2248] + cmp r3, #1 + bne .L3178 + ldrh fp, [r4, #536] + mov r1, r7 + mov r0, r8 + bl __aeabi_uidiv + uxtah r0, fp, r0 + add fp, fp, r0, asr #2 + strh fp, [r4, #536] @ movhi +.L3178: + ldrb r3, [r5, #152] @ zero_extendqisi2 + cbz r3, .L3179 + ldrh fp, [r4, #536] + mov r1, r7 + mov r0, r8 + bl __aeabi_uidiv + uxtah r0, fp, r0 + add fp, fp, r0, asr #2 + strh fp, [r4, #536] @ movhi +.L3179: + ldrh r3, [r5, #2384] + cbz r3, .L3181 + ldrh r2, [r4, #536] + add r2, r2, r3, lsr #1 + strh r2, [r4, #536] @ movhi + mul r2, r7, r3 + cmp r8, r2 + itttt lt + addlt r3, r3, #32 + strlt r10, [r5, #2452] + addlt r3, r3, r9 + strhlt r3, [r4, #536] @ movhi +.L3181: + ldrh r2, [r4, #536] + ldr r3, [r5, #2452] + ldr r9, .L3195+28 + subs r3, r3, r2 + muls r7, r3, r7 + ldrh r3, [r5, #2390] + str r7, [r9, #1292] + muls r7, r3, r7 + ldrh r3, [r5, #2396] + str r7, [r5, #2452] + muls r7, r3, r7 + str r7, [r5, #2432] + bl FtlBbmTblFlush + ldr r2, [r5, #2340] + add r1, r6, r8 + ldrh r3, [r5, #2404] + add r3, r3, r2, lsr #3 + cmp r1, r3 + bls .L3183 + lsrs r2, r2, #5 + ldr r0, .L3195+12 + bl printk +.L3183: + ldrh r2, [r5, #2334] + movs r1, #0 + ldr r0, [r4, #300] + movw r7, #65535 + lsls r2, r2, #1 + bl ftl_memset + ldrh r2, [r5, #2332] + movs r3, #0 + ldr r0, [r5, #32] + movs r1, #255 + ldr r5, .L3195+16 + str r3, [r4, #472] + strh r3, [r4, #558] @ movhi + lsrs r2, r2, #3 + strb r3, [r4, #562] + strb r3, [r4, #564] + strh r3, [r4, #322] @ movhi + strb r3, [r4, #326] + strh r3, [r4, #320] @ movhi + movs r3, #1 + strh r7, [r4, #556] @ movhi + strb r3, [r4, #328] + bl ftl_memset +.L3184: + mov r0, r5 + bl make_superblock + ldrb r3, [r4, #327] @ zero_extendqisi2 + ldrh r2, [r4, #320] + cbnz r3, .L3185 + ldr r3, [r4, #300] + strh r7, [r3, r2, lsl #1] @ movhi + ldrh r3, [r4, #320] + adds r3, r3, #1 + strh r3, [r4, #320] @ movhi + b .L3184 +.L3169: + ldr r6, [r4, #3332] + mvns r1, r3 + orr r1, r3, r1, lsl #16 + str r1, [r6, r3, lsl #2] + ldr r1, [r4, #3336] + str r0, [r1, r3, lsl #2] + b .L3168 +.L3171: + mov r0, r7 + movs r1, #1 + bl FtlLowFormatEraseBlock + adds r7, r7, #1 + add r6, r6, r0 + uxth r6, r6 + uxth r7, r7 + b .L3170 +.L3174: + mov r0, r7 + movs r1, #1 + bl FtlLowFormatEraseBlock + adds r7, r7, #1 + add r6, r6, r0 + uxth r6, r6 + uxth r7, r7 + b .L3173 +.L3176: + movs r1, #0 + bl FtlLowFormatEraseBlock + add r8, r8, r0 + uxth r8, r8 + b .L3175 +.L3185: + ldr r3, [r4, #508] + movw r5, #65535 + ldrh r1, [r4, #324] + ldr r7, .L3195+20 + str r3, [r4, #332] + adds r3, r3, #1 + str r3, [r4, #508] + ldr r3, [r4, #300] + strh r1, [r3, r2, lsl #1] @ movhi + movs r3, #0 + strh r3, [r4, #370] @ movhi + strb r3, [r4, #374] + ldrh r3, [r4, #320] + adds r3, r3, #1 + strh r3, [r4, #368] @ movhi + movs r3, #1 + strb r3, [r4, #376] +.L3186: + mov r0, r7 + bl make_superblock + ldrb r3, [r4, #375] @ zero_extendqisi2 + ldrh r2, [r4, #368] + cbnz r3, .L3187 + ldr r3, [r4, #300] + strh r5, [r3, r2, lsl #1] @ movhi + ldrh r3, [r4, #368] + adds r3, r3, #1 + strh r3, [r4, #368] @ movhi + b .L3186 +.L3187: + ldr r3, [r4, #508] + movw r5, #65535 + ldrh r1, [r4, #372] + str r3, [r4, #380] + adds r3, r3, #1 + str r3, [r4, #508] + ldr r3, [r4, #300] + strh r1, [r3, r2, lsl #1] @ movhi + strh r5, [r4, #416] @ movhi + bl FtlFreeSysBlkQueueOut + movs r3, #0 + strh r0, [r4, #540] @ movhi + strh r3, [r4, #542] @ movhi + ldr r3, [r9, #1292] + strh r5, [r4, #544] @ movhi + strh r3, [r4, #546] @ movhi + ldr r3, [r4, #508] + str r3, [r4, #548] + adds r3, r3, #1 + str r3, [r4, #508] + bl FtlVpcTblFlush + bl FtlSysBlkInit + cbnz r0, .L3166 + ldr r3, .L3195+24 + movs r2, #1 + str r2, [r3, #500] +.L3166: + movs r0, #0 + pop {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L3196: + .align 2 +.L3195: + .word .LANCHOR2 + .word .LANCHOR0 + .word 168778952 + .word .LC156 + .word .LANCHOR2+320 + .word .LANCHOR2+368 + .word .LANCHOR1 + .word .LANCHOR4 + .fnend + .size FtlLowFormat, .-FtlLowFormat + .align 1 + .global FtlReInitForSDUpdata + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FtlReInitForSDUpdata, %function +FtlReInitForSDUpdata: + .fnstart + @ args = 0, pretend = 0, frame = 16 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r3, r4, r5, r6, lr} + .save {r4, r5, r6, lr} + .pad #16 + ldr r4, .L3232 + ldrb r3, [r4, #152] @ zero_extendqisi2 + cbz r3, .L3198 +.L3200: + movs r5, #0 +.L3197: + mov r0, r5 + add sp, sp, #16 + @ sp needed + pop {r4, r5, r6, pc} +.L3198: + ldr r6, .L3232+4 + ldr r0, [r6, #1180] + bl FlashInit + mov r5, r0 + cmp r0, #0 + bne .L3200 + bl FlashLoadFactorBbt + cbz r0, .L3201 + bl FlashMakeFactorBbt +.L3201: + ldr r0, [r6, #1220] + bl FlashReadIdbDataRaw + cbz r0, .L3202 + movs r2, #16 + movs r1, #0 + mov r0, sp + bl FlashReadFacBbtData + ldr r1, [sp] + movs r3, #0 + mov r2, r3 + movs r0, #1 +.L3204: + lsl r6, r0, r2 + adds r2, r2, #1 + tst r6, r1 + it ne + addne r3, r3, #1 + cmp r2, #16 + bne .L3204 + cmp r3, #6 + bhi .L3205 +.L3229: + strb r2, [r4, #37] +.L3206: + ldrb r3, [r4, #37] @ zero_extendqisi2 + strh r3, [r4, #150] @ movhi +.L3202: + ldr r1, .L3232+8 + ldr r0, .L3232+12 + bl printk + ldr r0, .L3232+16 + bl FtlConstantsInit + bl FtlVariablesInit + ldrh r0, [r4, #2328] + movs r4, #1 + bl FtlFreeSysBlkQueueInit +.L3210: + bl FtlLoadBbt + cbz r0, .L3211 +.L3231: + bl FtlLowFormat + cmp r4, #3 + bls .L3212 + mov r5, #-1 + b .L3197 +.L3205: + movs r2, #0 + movs r0, #1 +.L3208: + lsl r6, r0, r2 + adds r2, r2, #1 + tst r6, r1 + it ne + addne r3, r3, #1 + cmp r2, #24 + bne .L3208 + cmp r3, #17 + bls .L3229 + movs r3, #36 + strb r3, [r4, #37] + b .L3206 +.L3212: + adds r4, r4, #1 + b .L3210 +.L3211: + bl FtlSysBlkInit + cmp r0, #0 + bne .L3231 + ldr r3, .L3232+20 + movs r2, #1 + str r2, [r3, #500] + b .L3197 +.L3233: + .align 2 +.L3232: + .word .LANCHOR0 + .word .LANCHOR4 + .word .LC76 + .word .LC77 + .word .LANCHOR0+124 + .word .LANCHOR1 + .fnend + .size FtlReInitForSDUpdata, .-FtlReInitForSDUpdata + .align 1 + .global Ftl_gc_temp_data_write_back + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type Ftl_gc_temp_data_write_back, %function +Ftl_gc_temp_data_write_back: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + ldr r4, .L3249 + ldr r3, [r4, #228] + cbz r3, .L3235 +.L3238: + movs r0, #0 + pop {r4, r5, r6, pc} +.L3235: + ldr r3, .L3249+4 + ldrb r3, [r3, #152] @ zero_extendqisi2 + cbz r3, .L3237 + ldr r3, [r4, #1136] + lsls r3, r3, #31 + bpl .L3237 + ldrh r3, [r4, #420] + cmp r3, #0 + bne .L3238 +.L3237: + movs r3, #0 + movs r5, #0 + movs r6, #36 + mov r2, r3 + ldr r1, [r4, #1136] + ldr r0, [r4, #3308] + bl FlashProgPages +.L3239: + ldr r1, [r4, #1136] + uxth r3, r5 + cmp r3, r1 + bcc .L3241 + ldr r0, [r4, #3308] + bl FtlGcBufFree + movs r3, #0 + str r3, [r4, #1136] + ldrh r3, [r4, #420] + cmp r3, #0 + bne .L3238 + movs r0, #1 + bl FtlGcFreeTempBlock + b .L3248 +.L3241: + muls r3, r6, r3 + ldr r2, [r4, #3308] + adds r5, r5, #1 + adds r1, r2, r3 + ldr r2, [r2, r3] + ldr r0, [r1, #12] + cmp r2, #-1 + bne .L3240 + ldrh r0, [r4, #416] + movs r5, #0 + ldr r1, [r4, #300] + strh r5, [r1, r0, lsl #1] @ movhi + strh r2, [r4, #416] @ movhi + ldr r2, [r4, #700] + adds r2, r2, #1 + str r2, [r4, #700] + ldr r2, [r4, #3308] + add r3, r3, r2 + ldr r0, [r3, #4] + ubfx r0, r0, #10, #16 + bl FtlBbmMapBadBlock + bl FtlBbmTblFlush + bl FtlGcPageVarInit +.L3248: + movs r0, #1 + pop {r4, r5, r6, pc} +.L3240: + ldr r2, [r0, #8] + ldr r1, [r1, #4] + ldr r0, [r0, #12] + bl FtlGcUpdatePage + b .L3239 +.L3250: + .align 2 +.L3249: + .word .LANCHOR2 + .word .LANCHOR0 + .fnend + .size Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back + .align 1 + .global Ftl_get_new_temp_ppa + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type Ftl_get_new_temp_ppa, %function +Ftl_get_new_temp_ppa: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r3, r4, r5, lr} + .save {r3, r4, r5, lr} + movw r3, #65535 + ldr r4, .L3254 + ldrh r2, [r4, #416] + cmp r2, r3 + beq .L3252 + ldrh r3, [r4, #420] + cbnz r3, .L3253 +.L3252: + bl FtlCacheWriteBack + movs r0, #0 + movs r5, #0 + bl FtlGcFreeTempBlock + ldr r0, .L3254+4 + strb r5, [r4, #424] + bl allocate_data_superblock + strh r5, [r4, #1164] @ movhi + strh r5, [r4, #1172] @ movhi + bl l2p_flush + mov r0, r5 + bl FtlEctTblFlush + bl FtlVpcTblFlush +.L3253: + ldr r0, .L3254+4 + pop {r3, r4, r5, lr} + b get_new_active_ppa +.L3255: + .align 2 +.L3254: + .word .LANCHOR2 + .word .LANCHOR2+416 + .fnend + .size Ftl_get_new_temp_ppa, .-Ftl_get_new_temp_ppa + .align 1 + .global ftl_do_gc + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type ftl_do_gc, %function +ftl_do_gc: + .fnstart + @ args = 0, pretend = 0, frame = 32 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L3422 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r8, r0 + .pad #44 + sub sp, sp, #44 + mov r7, r1 + mov r6, r3 + ldr r0, [r3, #228] + cmp r0, #0 + bne .L3355 + ldr r1, .L3422+4 + ldr r4, [r1, #500] + cmp r4, #1 + bne .L3256 + ldr r2, [r3, #3280] + cmp r2, #0 + bne .L3256 + ldrh r0, [r3, #308] + cmp r0, #47 + bls .L3355 + ldrh r1, [r1, #3444] + movw r2, #65535 + cmp r1, r2 + bne .L3258 +.L3261: + ldrh r0, [r6, #1176] + movw r2, #65535 + cmp r0, r2 + bne .L3259 +.L3260: + ldr r3, [r6, #1124] + cmp r8, #1 + add r3, r3, #1 + add r3, r3, r8, lsl #7 + str r3, [r6, #1124] + bne .L3262 + ldr r2, .L3422+8 + ldr r1, [r2, #2248] + mov r9, r2 + cbnz r1, .L3263 + ldrb r2, [r2, #152] @ zero_extendqisi2 + cmp r2, #0 + beq .L3262 +.L3263: + ldr r2, [r6, #532] + cmp r2, #39 + bhi .L3262 + ldr r5, .L3422+12 + movw r4, #65535 + ldrh r2, [r5, #1480] + add r3, r3, r2 + str r3, [r6, #1124] + bl FtlGcReFreshBadBlk + ldrh r3, [r6, #556] + cmp r3, r4 + bne .L3264 + ldrh r2, [r6, #1174] + cmp r2, r3 + bne .L3352 + ldr r3, [r6, #1124] + cmp r3, #1024 + bhi .L3266 + ldrh r3, [r6, #316] + cmp r3, #63 + bhi .L3352 +.L3266: + ldrh r3, [r6, #1122] + movs r2, #0 + ldrh r1, [r6, #316] + strh r2, [r5, #1480] @ movhi + adds r3, r3, #64 + cmp r1, r3 + bgt .L3352 + ldr r3, [r6, #532] + str r2, [r6, #1124] + cmp r3, #0 + bne .L3267 + movs r3, #6 +.L3413: + strh r3, [r5, #1480] @ movhi +.L3268: + movs r0, #32 + bl List_get_gc_head_node + uxth r2, r0 + movw r3, #65535 + str r3, [sp, #16] + cmp r2, r3 + beq .L3272 + ldrh r4, [r6, #1128] + cmp r4, #0 + beq .L3270 + ldrh ip, [r9, #2392] + uxth r10, r0 + ldrh r1, [r9, #2324] + ldr r2, [r6, #300] + mul r1, r1, ip + ldrh r0, [r2, r10, lsl #1] + str r2, [sp, #12] + adds r1, r1, #1 + cmp r0, r1 + bgt .L3272 + add fp, r4, #1 + mov r0, r4 + uxth fp, fp + mov r9, #0 + str r9, [r6, #1132] + strh fp, [r6, #1128] @ movhi + bl List_get_gc_head_node + ldr r3, [sp, #16] + uxth r4, r0 + ldr r2, [sp, #12] + cmp r4, r3 + beq .L3272 + ldrh r3, [r2, r4, lsl #1] + mov r1, fp + ldrh r2, [r2, r10, lsl #1] + ldr r0, .L3422+16 + str r2, [sp] + mov r2, r4 + bl printk + ldrh r3, [r6, #1128] + cmp r3, #40 + bls .L3271 + ldr r3, [r6, #300] + ldrh r3, [r3, r4, lsl #1] + cmp r3, #32 + it hi + strhhi r9, [r6, #1128] @ movhi +.L3271: + movs r3, #6 + strh r3, [r5, #1480] @ movhi +.L3264: + ldrh r2, [r6, #416] + movw r3, #65535 + cmp r2, r3 + bne .L3299 +.L3354: + ldrh r3, [r6, #1174] + movw r2, #65535 + cmp r3, r2 + bne .L3299 + cmp r4, r3 + bne .L3299 + ldrh r3, [r6, #556] + cmp r3, r4 + beq .L3300 +.L3305: + movw r4, #65535 +.L3299: + ldr r3, .L3422+8 + ldr r3, [r3, #2248] + cmp r3, #0 + ite eq + moveq r5, #1 + movne r5, #2 +.L3298: + ldrh r3, [r6, #556] + movw r2, #65535 + cmp r3, r2 + bne .L3308 + cmp r4, r3 + beq .L3309 + strh r4, [r6, #556] @ movhi +.L3310: + ldrh r0, [r6, #556] + movw r7, #65535 + movs r3, #0 + strb r3, [r6, #564] + cmp r0, r7 + beq .L3308 + bl IsBlkInGcList + cbz r0, .L3313 + strh r7, [r6, #556] @ movhi +.L3313: + ldr r3, .L3422+8 + ldrb r3, [r3, #152] @ zero_extendqisi2 + cbz r3, .L3314 + ldrh r0, [r6, #556] + bl ftl_get_blk_mode + strb r0, [r6, #564] +.L3314: + ldrh r2, [r6, #556] + movw r3, #65535 + cmp r2, r3 + beq .L3308 + ldr r0, .L3422+20 + bl make_superblock + ldr r2, .L3422+12 + movs r3, #0 + strh r3, [r6, #558] @ movhi + strb r3, [r6, #562] + strh r3, [r2, #1482] @ movhi + ldrh r1, [r6, #556] + ldr r3, [r6, #300] + ldrh r3, [r3, r1, lsl #1] + strh r3, [r2, #1484] @ movhi +.L3308: + ldrh r3, [r6, #556] + ldrh r2, [r6, #320] + cmp r2, r3 + beq .L3315 + ldrh r2, [r6, #368] + cmp r2, r3 + beq .L3315 + ldrh r2, [r6, #416] + cmp r2, r3 + bne .L3316 +.L3315: + movw r3, #65535 + strh r3, [r6, #556] @ movhi +.L3316: + ldr r7, .L3422+8 +.L3349: + ldr r9, .L3422 + movw r3, #65535 + ldrh fp, [r9, #556] + mov r6, r9 + cmp fp, r3 + bne .L3317 + movs r3, #0 + str r3, [r9, #1132] +.L3318: + ldrh r10, [r6, #1128] + mov r0, r10 + bl List_get_gc_head_node + uxth r2, r0 + cmp r2, fp + strh r2, [r6, #556] @ movhi + bne .L3319 + movs r3, #0 + movs r0, #8 + strh r3, [r6, #1128] @ movhi + b .L3256 +.L3258: + ldrh r3, [r3, #416] + cmp r3, r2 + beq .L3261 + mov r0, r4 + bl FtlGcFreeTempBlock + cmp r0, #0 + beq .L3261 + mov r0, r4 + b .L3256 +.L3259: + ldrh r3, [r6, #1174] + cmp r3, r2 + bne .L3260 + ldrh r1, [r6, #1178] + cmp r1, r3 + beq .L3260 + ldrh r2, [r6, #1180] + cmp r2, r3 + itttt ne + strhne r0, [r6, #1174] @ movhi + strhne r1, [r6, #1176] @ movhi + strhne r2, [r6, #1178] @ movhi + strhne r3, [r6, #1180] @ movhi + b .L3260 +.L3267: + cmp r3, #5 + bhi .L3268 + movs r3, #18 + b .L3413 +.L3270: + movs r3, #1 + strh r3, [r6, #1128] @ movhi +.L3272: + bl GetSwlReplaceBlock + movw r3, #65535 + mov r4, r0 + cmp r0, r3 + bne .L3264 + movs r3, #0 + strh r3, [r5, #1480] @ movhi +.L3262: + ldrh r3, [r6, #556] + movw r4, #65535 + cmp r3, r4 + beq .L3352 + cmp r8, #0 + beq .L3353 + b .L3264 +.L3423: + .align 2 +.L3422: + .word .LANCHOR2 + .word .LANCHOR1 + .word .LANCHOR0 + .word .LANCHOR4 + .word .LC157 + .word .LANCHOR2+556 +.L3352: + ldrh r4, [r6, #416] + movw r3, #65535 + cmp r4, r3 + bne .L3273 + ldrh r5, [r6, #1174] + cmp r5, r4 + bne .L3274 + ldrh r3, [r6, #316] + ldr r2, [r6, #1124] + cmp r3, #24 + ite cc + movcc r3, #5120 + movcs r3, #1024 + cmp r2, r3 + bls .L3274 + ldr r2, .L3424 + movs r3, #0 + str r3, [r6, #1124] + strh r3, [r2, #1480] @ movhi + bl GetSwlReplaceBlock + cmp r0, r5 + mov r4, r0 + bne .L3362 + ldrh r2, [r6, #316] + ldrh r3, [r6, #1122] + cmp r2, r3 + bcs .L3277 + movs r0, #64 + bl List_get_gc_head_node + uxth r3, r0 + cmp r3, r4 + beq .L3279 + ldr r2, [r6, #3276] + ldr r9, .L3424+8 + cbnz r2, .L3280 + ldrh r2, [r9, #2344] + cmp r2, #3 + beq .L3280 + ldr r2, [r6, #1116] + cbnz r2, .L3280 + ldr r2, [r9, #2248] + cbnz r2, .L3280 + ldrb r0, [r9, #152] @ zero_extendqisi2 + cmp r0, #0 + beq .L3281 +.L3280: + ldr r2, [r6, #300] + ldrh r0, [r9, #2344] + ldrh r1, [r2, r3, lsl #1] + ldrh r3, [r9, #2392] + cmp r0, #3 + ldrh r2, [r9, #2324] + mul r2, r3, r2 + ite eq + lsreq r3, r3, #1 + movne r3, #0 + add r3, r3, r2 + cmp r1, r3 + bgt .L3283 + movs r0, #0 + bl List_get_gc_head_node + ldr r3, [r9, #2452] + uxth r5, r0 + ldr r2, [r6, #472] + add r3, r3, r3, lsl #1 + cmp r2, r3, lsr #2 + bls .L3284 +.L3415: + movs r3, #128 + b .L3414 +.L3284: + movs r3, #160 +.L3414: + strh r3, [r6, #1122] @ movhi + movw r3, #65535 + cmp r5, r3 + beq .L3279 +.L3276: + ldr r3, [r6, #300] + mov r4, r5 + ldrh r1, [r6, #1120] + ldrh r2, [r6, #316] + ldrh r3, [r3, r5, lsl #1] + str r1, [sp, #4] + ldr r1, [r6, #236] + ldr r0, .L3424+4 + ldrh r1, [r1, r5, lsl #1] + str r1, [sp] + mov r1, r5 + bl printk + b .L3279 +.L3283: + movs r3, #128 +.L3416: + strh r3, [r6, #1122] @ movhi +.L3279: + bl FtlGcReFreshBadBlk + cmp r8, #0 + bne .L3264 + movw r3, #65535 + cmp r4, r3 + bne .L3264 +.L3353: + ldrh r3, [r6, #316] + cmp r3, #24 + bhi .L3364 + ldr r2, .L3424+8 + cmp r3, #16 + ldrh r5, [r2, #2390] + bls .L3289 + lsrs r5, r5, #5 +.L3288: + ldrh r2, [r6, #1120] + cmp r2, r3 + bcs .L3292 + ldrh r3, [r6, #416] + movw r2, #65535 + cmp r3, r2 + bne .L3293 + ldrh r2, [r6, #1174] + cmp r2, r3 + bne .L3293 + ldr r3, .L3424 + ldrh r0, [r3, #1480] + cbnz r0, .L3294 + ldr r3, .L3424+8 + ldr r2, [r6, #472] + ldr r3, [r3, #2452] + add r3, r3, r3, lsl #1 + cmp r2, r3, lsr #2 + bcs .L3295 +.L3294: + ldrh r3, [r6, #536] + add r3, r3, r3, lsl #1 + asrs r3, r3, #2 +.L3417: + strh r3, [r6, #1120] @ movhi + movs r3, #0 + str r3, [r6, #1132] +.L3256: + add sp, sp, #44 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L3281: + ldr r2, [r6, #300] + ldrh r3, [r2, r3, lsl #1] + cmp r3, #7 + bhi .L3286 + bl List_get_gc_head_node + uxth r5, r0 + b .L3415 +.L3286: + movs r3, #64 + b .L3416 +.L3277: + movs r3, #80 + b .L3416 +.L3362: + mov r5, r0 + b .L3276 +.L3289: + cmp r3, #12 + bls .L3290 + lsrs r5, r5, #4 + b .L3288 +.L3290: + cmp r3, #8 + bls .L3288 + lsrs r5, r5, #2 + b .L3288 +.L3364: + movs r5, #1 + b .L3288 +.L3295: + movs r3, #18 + b .L3417 +.L3293: + ldrh r3, [r6, #536] + add r3, r3, r3, lsl #1 + asrs r3, r3, #2 + strh r3, [r6, #1120] @ movhi +.L3292: + ldr r3, .L3424+8 + ldr r3, [r3, #2248] + cbz r3, .L3366 + cmp r7, #2 + bhi .L3366 + adds r5, r5, #1 + uxth r5, r5 +.L3366: + movw r4, #65535 + b .L3298 +.L3300: + movs r3, #0 + ldrh r2, [r6, #316] + str r3, [r6, #1132] + ldrh r3, [r6, #1120] + ldr r4, .L3424 + cmp r2, r3 + bls .L3301 + ldrh r3, [r4, #1480] + cbnz r3, .L3302 + ldr r3, .L3424+8 + ldr r2, [r6, #472] + ldr r3, [r3, #2452] + add r3, r3, r3, lsl #1 + cmp r2, r3, lsr #2 + bcs .L3303 +.L3302: + ldrh r3, [r6, #536] + add r3, r3, r3, lsl #1 + asrs r3, r3, #2 +.L3418: + strh r3, [r6, #1120] @ movhi + bl FtlReadRefresh + movs r0, #0 + bl List_get_gc_head_node + ldr r3, [r6, #300] + uxth r0, r0 + ldrh r3, [r3, r0, lsl #1] + cmp r3, #4 + bls .L3301 +.L3420: + ldrh r0, [r4, #1480] + b .L3256 +.L3303: + movs r3, #18 + b .L3418 +.L3301: + ldrh r0, [r4, #1480] + cmp r0, #0 + bne .L3305 + ldrh r5, [r6, #536] + add r3, r5, r5, lsl #1 + asrs r3, r3, #2 + strh r3, [r6, #1120] @ movhi + bl List_get_gc_head_node + ldr r3, [r6, #300] + uxth r0, r0 + ldr r1, .L3424+8 + ldrh r2, [r3, r0, lsl #1] + ldrh r0, [r1, #2392] + ldrh r3, [r1, #2324] + muls r3, r0, r3 + add r3, r3, r3, lsr #31 + cmp r2, r3, asr #1 + ble .L3306 + ldrh r3, [r6, #316] + subs r5, r5, #1 + cmp r3, r5 + blt .L3306 + bl FtlReadRefresh + b .L3420 +.L3306: + cmp r2, #0 + bne .L3305 + movw r0, #65535 + bl decrement_vpc_count + ldrh r0, [r6, #316] + adds r0, r0, #1 + b .L3256 +.L3309: + ldrh r3, [r6, #1174] + cmp r3, r4 + beq .L3310 + ldr r2, [r6, #300] + ldrh r3, [r2, r3, lsl #1] + cbnz r3, .L3311 + strh r4, [r6, #1174] @ movhi +.L3311: + ldrh r3, [r6, #1174] + strh r3, [r6, #556] @ movhi + movw r3, #65535 + strh r3, [r6, #1174] @ movhi + b .L3310 +.L3319: + str r0, [sp, #16] + mov r0, r2 + str r2, [sp, #12] + add r10, r10, #1 + bl IsBlkInGcList + ldr r2, [sp, #12] + ldr r3, [sp, #16] + cbz r0, .L3320 + strh r10, [r6, #1128] @ movhi + b .L3318 +.L3320: + ldrh lr, [r7, #2324] + uxth r10, r10 + ldrh r1, [r7, #2390] + uxth r3, r3 + ldr r0, [r6, #300] + strh r10, [r6, #1128] @ movhi + mul r1, lr, r1 + ldrh ip, [r0, r3, lsl #1] + add lr, r1, r1, lsr #31 + cmp ip, lr, asr #1 + bgt .L3322 + cmp r10, #48 + bls .L3323 + cmp ip, #8 + bls .L3323 + ldrh ip, [r6, #1164] + cmp ip, #35 + bhi .L3323 +.L3322: + mov ip, #0 + strh ip, [r6, #1128] @ movhi +.L3323: + ldrh r3, [r0, r3, lsl #1] + cmp r1, r3 + bgt .L3324 + cmp r4, fp + bne .L3324 + ldrh r1, [r6, #1128] + cmp r1, #3 + bhi .L3324 + movs r3, #0 + strh r4, [r6, #556] @ movhi + strh r3, [r6, #1128] @ movhi +.L3421: + ldr r3, .L3424 + ldrh r0, [r3, #1480] + b .L3256 +.L3425: + .align 2 +.L3424: + .word .LANCHOR4 + .word .LC158 + .word .LANCHOR0 +.L3324: + cbnz r3, .L3325 + movw r0, #65535 + bl decrement_vpc_count + ldrh r3, [r6, #1128] + adds r3, r3, #1 + strh r3, [r6, #1128] @ movhi + b .L3318 +.L3325: + movs r3, #0 + strb r3, [r9, #564] + ldrb r3, [r7, #152] @ zero_extendqisi2 + cbz r3, .L3326 + mov r0, r2 + bl ftl_get_blk_mode + strb r0, [r9, #564] +.L3326: + ldr r0, .L3426 + bl make_superblock + ldr r2, .L3426+4 + movs r3, #0 + ldrh r0, [r9, #556] + ldr r1, [r9, #300] + strh r3, [r2, #1482] @ movhi + ldrh r1, [r1, r0, lsl #1] + strh r3, [r9, #558] @ movhi + strb r3, [r9, #562] + strh r1, [r2, #1484] @ movhi +.L3317: + cmp r8, #1 + bne .L3327 + bl FtlReadRefresh +.L3327: + movs r3, #1 + str r3, [r9, #3280] + ldrh r3, [r7, #2390] + str r3, [sp, #16] + ldrb r3, [r7, #152] @ zero_extendqisi2 + cbz r3, .L3328 + ldrb r3, [r9, #564] @ zero_extendqisi2 + cmp r3, #1 + itt eq + ldrheq r3, [r7, #2392] + streq r3, [sp, #16] +.L3328: + ldrh r3, [r9, #558] + ldr r1, [sp, #16] + adds r2, r3, r5 + cmp r2, r1 + itt gt + movgt r2, r1 + subgt r5, r2, r3 + mov r3, #0 + it gt + uxthgt r5, r5 +.L3419: + str r3, [sp, #20] + ldrh r3, [sp, #20] + ldr r6, .L3426+8 + cmp r5, r3 + bls .L3337 + ldr r3, [sp, #20] + movw fp, #65535 + ldrh r10, [r6, #558] + mov ip, #36 + ldrh r9, [r7, #2324] + ldr r0, [r6, #1152] + add r10, r10, r3 + addw r3, r6, #570 + str r3, [sp, #24] + movs r3, #0 + str r3, [sp, #12] + b .L3338 +.L3332: + ldr r1, [sp, #24] + ldrh r2, [r1, #2]! + cmp r2, fp + str r1, [sp, #24] + beq .L3331 + ldr r1, [sp, #12] + orr r2, r10, r2, lsl #10 + mla lr, ip, r1, r0 + str r2, [lr, #4] + mov r2, r1 + adds r2, r2, #1 + uxth r2, r2 + str r2, [sp, #12] +.L3331: + adds r3, r3, #1 +.L3338: + uxth r2, r3 + cmp r9, r2 + bhi .L3332 + ldrb r2, [r6, #564] @ zero_extendqisi2 + mov fp, #0 + ldr r6, .L3426+8 + ldr r1, [sp, #12] + bl FlashReadPages +.L3333: + ldr r2, [sp, #12] + uxth r3, fp + cmp r2, r3 + bhi .L3336 + ldr r3, [sp, #20] + adds r3, r3, #1 + b .L3419 +.L3336: + movs r3, #36 + ldr r2, [r6, #1152] + mul r9, r3, fp + add r1, r2, r9 + ldr r2, [r2, r9] + adds r2, r2, #1 + beq .L3334 + ldr r10, [r1, #12] + movw r2, #61589 + ldrh r1, [r10] + cmp r1, r2 + bne .L3334 + movs r2, #0 + add r1, sp, #32 + ldr r0, [r10, #8] + str r3, [sp, #24] + bl log2phys + ldr r1, [r6, #1152] + ldr r2, [sp, #32] + ldr r3, [sp, #24] + add r1, r1, r9 + ldr r0, [r1, #4] + bic r2, r2, #-2147483648 + cmp r2, r0 + bne .L3334 + ldr r2, .L3426+4 + ldr r0, .L3426+4 + ldr r1, [r1, #16] + ldrh r2, [r2, #1482] + str r3, [sp, #28] + adds r2, r2, #1 + strh r2, [r0, #1482] @ movhi + ldr r0, [r6, #1136] + ldr r2, [r6, #3308] + mla r2, r3, r0, r2 + str r1, [r2, #16] + str r2, [sp, #24] + bl Ftl_get_new_temp_ppa + ldr r2, [sp, #24] + ldr r1, [r6, #3308] + ldr r3, [sp, #28] + str r0, [r2, #4] + ldr r2, [r6, #1136] + mla r3, r3, r2, r1 + ldr r2, [r6, #1152] + add r2, r2, r9 + ldr r1, [r2, #8] + str r1, [r3, #8] + movs r1, #1 + ldr r2, [r2, #12] + str r2, [r3, #12] + ldr r3, [sp, #32] + str r3, [r10, #12] + ldrh r3, [r6, #416] + strh r3, [r10, #2] @ movhi + ldr r3, [r6, #512] + ldr r0, [r6, #1152] + str r3, [r10, #4] + ldr r3, [r6, #1136] + add r0, r0, r9 + adds r3, r3, #1 + str r3, [r6, #1136] + bl FtlGcBufAlloc + ldrb r3, [r7, #152] @ zero_extendqisi2 + cbnz r3, .L3335 + ldrb r2, [r6, #423] @ zero_extendqisi2 + ldr r3, [r6, #1136] + cmp r2, r3 + beq .L3335 + ldrh r3, [r6, #420] + cbnz r3, .L3334 +.L3335: + bl Ftl_gc_temp_data_write_back + cbz r0, .L3334 + ldr r3, .L3426+8 + movs r2, #0 + movw r1, #65535 + str r2, [r3, #3280] + strh r1, [r3, #556] @ movhi + strh r2, [r3, #558] @ movhi + b .L3421 +.L3334: + add fp, fp, #1 + b .L3333 +.L3337: + ldrh r3, [r6, #558] + add r5, r5, r3 + ldr r3, [sp, #16] + uxth r5, r5 + cmp r3, r5 + strh r5, [r6, #558] @ movhi + bhi .L3339 + ldr r3, [r6, #1136] + ldr r5, .L3426+4 + cbz r3, .L3340 + bl Ftl_gc_temp_data_write_back + cbz r0, .L3340 + movs r3, #0 + ldrh r0, [r5, #1480] + str r3, [r6, #3280] + b .L3256 +.L3340: + ldrh r5, [r5, #1482] + cbnz r5, .L3341 + ldrh r2, [r6, #556] + ldr r3, [r6, #300] + ldrh r3, [r3, r2, lsl #1] + cbz r3, .L3341 +.L3342: + ldr r3, [r7, #2452] + cmp r5, r3 + bcs .L3347 + movs r2, #0 + add r1, sp, #36 + mov r0, r5 + bl log2phys + ldr r0, [sp, #36] + adds r3, r0, #1 + beq .L3343 + ubfx r0, r0, #10, #16 + bl P2V_block_in_plane + ldrh r3, [r6, #556] + cmp r3, r0 + bne .L3343 +.L3347: + ldr r3, [r7, #2452] + cmp r5, r3 + bcc .L3341 + ldrh r2, [r6, #556] + movs r1, #0 + ldr r3, [r6, #300] + strh r1, [r3, r2, lsl #1] @ movhi + ldrh r0, [r6, #556] + bl update_vpc_list + bl FtlCacheWriteBack + bl l2p_flush + bl FtlVpcTblFlush +.L3341: + movw r3, #65535 + strh r3, [r6, #556] @ movhi +.L3339: + ldrh r3, [r6, #316] + cmp r3, #2 + bhi .L3348 + ldrh r5, [r7, #2390] + b .L3349 +.L3343: + adds r5, r5, #1 + b .L3342 +.L3348: + movs r2, #0 + str r2, [r6, #3280] + ldr r2, .L3426+4 + ldrh r0, [r2, #1480] + cmp r0, #0 + bne .L3256 + adds r0, r3, #1 + b .L3256 +.L3355: + movs r0, #0 + b .L3256 +.L3274: + cmp r8, #0 + bne .L3354 + b .L3353 +.L3273: + cmp r8, #0 + bne .L3305 + b .L3353 +.L3427: + .align 2 +.L3426: + .word .LANCHOR2+556 + .word .LANCHOR4 + .word .LANCHOR2 + .fnend + .size ftl_do_gc, .-ftl_do_gc + .align 1 + .global FtlCacheWriteBack + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FtlCacheWriteBack, %function +FtlCacheWriteBack: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #12 + ldr r5, .L3470 + ldr r9, [r5, #228] + cmp r9, #0 + bne .L3430 + ldr r4, .L3470+4 + ldr r1, [r4, #2444] + cbz r1, .L3430 + ldr r3, .L3470+8 + ldr r6, [r3, #1488] + ldrb r3, [r4, #152] @ zero_extendqisi2 + cbz r3, .L3455 + ldrb r8, [r6, #8] @ zero_extendqisi2 + add r0, r8, #-1 + rsbs r8, r0, #0 + adc r8, r8, r0 +.L3432: + movs r7, #0 + mov r10, #36 + ldrb r3, [r6, #9] @ zero_extendqisi2 + mov r2, r8 + ldr r0, [r4, #2448] + bl FlashProgPages +.L3433: + ldr r3, [r4, #2444] + cmp r7, r3 + bcc .L3440 +.L3452: + movs r3, #0 + str r3, [r4, #2444] +.L3430: + movs r0, #0 + add sp, sp, #12 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L3455: + mov r8, r9 + b .L3432 +.L3440: + mul fp, r10, r7 + ldr r2, [r4, #2448] + add r0, r2, fp + ldr r2, [r2, fp] + adds r2, r2, #1 + bne .L3434 + mov r10, #0 +.L3435: + ldr r3, [r4, #2444] + cmp r9, r3 + bcc .L3450 + movw r6, #16386 +.L3453: + ldrh r3, [r5, #1182] + cmp r3, #0 + beq .L3452 + movs r1, #1 + mov r0, r1 + bl ftl_do_gc + subs r6, r6, #1 + bne .L3453 + b .L3452 +.L3434: + ldr r2, [r0, #4] + cmp r8, #0 + bne .L3436 +.L3468: + str r2, [sp, #4] + add r1, sp, #4 + movs r2, #1 + ldr r0, [r0, #16] + bl log2phys + ldr r2, [r4, #2448] + add r3, r2, fp + ldr r3, [r3, #12] + ldr r0, [r3, #12] + adds r2, r0, #1 + beq .L3438 + ubfx r0, r0, #10, #16 + bl P2V_block_in_plane + ldr r2, [r5, #300] + mov fp, r0 + ldrh r2, [r2, r0, lsl #1] + cbnz r2, .L3439 + mov r1, r0 + ldr r0, .L3470+12 + bl printk +.L3439: + mov r0, fp + bl decrement_vpc_count +.L3438: + adds r7, r7, #1 + b .L3433 +.L3436: + orr r2, r2, #-2147483648 + b .L3468 +.L3450: + movs r7, #36 + ldr r3, [r4, #2448] + mul r7, r7, r9 + mov fp, #1 + mov r2, #-1 + str r2, [r3, r7] +.L3441: + ldr r2, [r4, #2448] + adds r3, r2, r7 + ldr r2, [r2, r7] + ldr r0, [r3, #4] + adds r2, r2, #1 + beq .L3445 + cmp r8, #0 + bne .L3446 +.L3469: + str r0, [sp, #4] + movs r2, #1 + ldr r0, [r3, #16] + add r1, sp, #4 + bl log2phys + ldr r3, [r4, #2448] + add r7, r7, r3 + ldr r3, [r7, #12] + ldr r0, [r3, #12] + adds r3, r0, #1 + beq .L3448 + ubfx r0, r0, #10, #16 + bl P2V_block_in_plane + ldr r3, [r5, #300] + mov r7, r0 + ldrh r2, [r3, r0, lsl #1] + cbnz r2, .L3449 + mov r1, r0 + ldr r0, .L3470+12 + bl printk +.L3449: + mov r0, r7 + bl decrement_vpc_count +.L3448: + add r9, r9, #1 + b .L3435 +.L3445: + ubfx r0, r0, #10, #16 + bl P2V_block_in_plane + ldrh r3, [r6] + cmp r3, r0 + bne .L3442 + ldr r1, [r5, #300] + ldrh r0, [r6, #4] + ldrh r2, [r1, r3, lsl #1] + subs r2, r2, r0 + strh r2, [r1, r3, lsl #1] @ movhi + ldrh r3, [r4, #2390] + strb r10, [r6, #6] + strh r10, [r6, #4] @ movhi + strh r3, [r6, #2] @ movhi +.L3442: + ldrh r3, [r6, #4] + cbnz r3, .L3443 + mov r0, r6 + bl allocate_new_data_superblock +.L3443: + ldr r3, [r5, #700] + adds r3, r3, #1 + str r3, [r5, #700] + ldr r3, [r4, #2448] + add r3, r3, r7 + ldr r0, [r3, #4] + ubfx r0, r0, #10, #16 + bl FtlGcMarkBadPhyBlk + mov r0, r6 + bl get_new_active_ppa + ldr r3, [r4, #2448] + mov r2, r0 + str r0, [sp, #4] + movs r1, #1 + adds r0, r3, r7 + str r2, [r0, #4] + mov r2, r8 + ldrb r3, [r6, #9] @ zero_extendqisi2 + bl FlashProgPages + ldr r3, [r4, #2448] + ldr r3, [r3, r7] + adds r3, r3, #1 + it eq + streq fp, [r5, #228] + ldr r3, [r5, #228] + cmp r3, #0 + beq .L3441 + b .L3430 +.L3446: + orr r0, r0, #-2147483648 + b .L3469 +.L3471: + .align 2 +.L3470: + .word .LANCHOR2 + .word .LANCHOR0 + .word .LANCHOR4 + .word .LC159 + .fnend + .size FtlCacheWriteBack, .-FtlCacheWriteBack + .align 1 + .global FtlSysFlush + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FtlSysFlush, %function +FtlSysFlush: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L3474 + push {r4, lr} + .save {r4, lr} + ldr r3, [r3, #228] + cbnz r3, .L3473 + ldr r3, .L3474+4 + ldr r4, [r3, #500] + cmp r4, #1 + bne .L3473 + bl FtlCacheWriteBack + bl l2p_flush + mov r0, r4 + bl FtlEctTblFlush + bl FtlVpcTblFlush +.L3473: + movs r0, #0 + pop {r4, pc} +.L3475: + .align 2 +.L3474: + .word .LANCHOR2 + .word .LANCHOR1 + .fnend + .size FtlSysFlush, .-FtlSysFlush + .align 1 + .global FtlDeInit + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FtlDeInit, %function +FtlDeInit: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r3, lr} + .save {r3, lr} + ldr r3, .L3478 + ldr r3, [r3, #500] + cmp r3, #1 + bne .L3477 + bl FtlSysFlush +.L3477: + movs r0, #0 + pop {r3, pc} +.L3479: + .align 2 +.L3478: + .word .LANCHOR1 + .fnend + .size FtlDeInit, .-FtlDeInit + .align 1 + .global ftl_deinit + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type ftl_deinit, %function +ftl_deinit: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r3, lr} + .save {r3, lr} + bl ftl_flash_de_init + bl FtlDeInit + pop {r3, lr} + b ftl_flash_de_init + .fnend + .size ftl_deinit, .-ftl_deinit + .align 1 + .global rk_ftl_de_init + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type rk_ftl_de_init, %function +rk_ftl_de_init: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r3, lr} + .save {r3, lr} + movs r1, #0 + ldr r0, .L3482 + bl printk + pop {r3, lr} + b ftl_deinit +.L3483: + .align 2 +.L3482: + .word .LC160 + .fnend + .size rk_ftl_de_init, .-rk_ftl_de_init + .align 1 + .global ftl_cache_flush + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type ftl_cache_flush, %function +ftl_cache_flush: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + b FtlCacheWriteBack + .fnend + .size ftl_cache_flush, .-ftl_cache_flush + .align 1 + .global rk_ftl_cache_write_back + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type rk_ftl_cache_write_back, %function +rk_ftl_cache_write_back: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + b FtlCacheWriteBack + .fnend + .size rk_ftl_cache_write_back, .-rk_ftl_cache_write_back + .align 1 + .global ftl_discard + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type ftl_discard, %function +ftl_discard: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r4, r5, r6, r7, r8, r9, lr} + .save {r4, r5, r6, r7, r8, r9, lr} + .pad #12 + mov r6, r0 + ldr r7, .L3504 + mov r4, r1 + ldr r3, [r7, #2432] + cmp r3, r0 + bls .L3495 + cmp r3, r1 + bcc .L3495 + adds r2, r0, r1 + cmp r3, r2 + bcc .L3495 + cmp r1, #31 + bls .L3497 + ldr r3, .L3504+4 + ldr r2, [r3, #228] + mov r8, r3 + cbnz r2, .L3497 + bl FtlCacheWriteBack + ldrh r5, [r7, #2396] + mov r0, r6 + mov r1, r5 + bl __aeabi_uidiv + smulbb r3, r0, r5 + mov r9, r0 + subs r6, r6, r3 + uxth r6, r6 + cbz r6, .L3488 + subs r5, r5, r6 + add r9, r0, #1 + cmp r5, r4 + it cs + movcs r5, r4 + uxth r5, r5 + subs r4, r4, r5 +.L3488: + ldr r5, .L3504+8 + mov r3, #-1 + str r3, [sp, #4] +.L3489: + ldrh r3, [r7, #2396] + cmp r4, r3 + bcs .L3491 + ldr r3, .L3504+8 + ldr r2, [r3, #1492] + cmp r2, #32 + bls .L3497 + movs r2, #0 + str r2, [r3, #1492] + bl l2p_flush + bl FtlVpcTblFlush +.L3497: + movs r0, #0 + b .L3486 +.L3491: + movs r2, #0 + mov r1, sp + mov r0, r9 + bl log2phys + ldr r3, [sp] + adds r3, r3, #1 + beq .L3490 + ldr r3, [r5, #1492] + movs r2, #1 + add r1, sp, #4 + mov r0, r9 + adds r3, r3, #1 + str r3, [r5, #1492] + ldr r3, [r8, #480] + adds r3, r3, #1 + str r3, [r8, #480] + bl log2phys + ldr r0, [sp] + ubfx r0, r0, #10, #16 + bl P2V_block_in_plane + bl decrement_vpc_count +.L3490: + ldrh r3, [r7, #2396] + add r9, r9, #1 + subs r4, r4, r3 + b .L3489 +.L3495: + mov r0, #-1 +.L3486: + add sp, sp, #12 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, pc} +.L3505: + .align 2 +.L3504: + .word .LANCHOR0 + .word .LANCHOR2 + .word .LANCHOR4 + .fnend + .size ftl_discard, .-ftl_discard + .align 1 + .global FtlDiscard + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FtlDiscard, %function +FtlDiscard: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + b ftl_discard + .fnend + .size FtlDiscard, .-FtlDiscard + .align 1 + .global ftl_read + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type ftl_read, %function +ftl_read: + .fnstart + @ args = 0, pretend = 0, frame = 56 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r9, r3 + ldr r3, .L3548 + .pad #84 + sub sp, sp, #84 + mov r5, r1 + str r2, [sp, #44] + ldr r3, [r3, #500] + cmp r3, #1 + bne .L3532 + cmp r0, #16 + bne .L3509 + mov r2, r9 + ldr r1, [sp, #44] + add r0, r5, #256 + bl FtlVendorPartRead + mov r8, r0 +.L3507: + mov r0, r8 + add sp, sp, #84 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L3509: + ldr r2, .L3548+4 + ldr r3, [r2, #2432] + cmp r1, r3 + bcs .L3532 + ldr r1, [sp, #44] + cmp r1, r3 + bhi .L3532 + adds r1, r5, r1 + cmp r3, r1 + str r1, [sp, #48] + bcc .L3532 + ldrh r4, [r2, #2396] + mov r0, r5 + mov r1, r4 + bl __aeabi_uidiv + ldr r3, [sp, #48] + mov r1, r4 + str r0, [sp, #36] + subs r0, r3, #1 + bl __aeabi_uidiv + ldr r3, [sp, #36] + ldr r1, [sp, #44] + str r0, [sp, #40] + rsb r3, r3, #1 + add r3, r3, r0 + str r3, [sp, #32] + ldr r3, .L3548+8 + ldr r2, [r3, #504] + add r2, r2, r1 + ldr r1, [sp, #32] + str r2, [r3, #504] + ldr r2, [r3, #476] + add r2, r2, r1 + mov r1, r0 + ldr r0, [sp, #36] + str r2, [r3, #476] + bl FtlCacheMetchLpa + cbz r0, .L3510 + bl FtlCacheWriteBack +.L3510: + ldr r6, [sp, #36] + movs r3, #0 + ldr r4, .L3548+8 + mov r7, r3 + mov r8, r3 + str r3, [sp, #28] + str r3, [sp, #52] +.L3511: + ldr r3, [sp, #32] + cbnz r3, .L3528 + ldr r3, .L3548+8 + ldrh r3, [r3, #1182] + cmp r3, #0 + beq .L3507 + movs r1, #1 + ldr r0, [sp, #32] + bl ftl_do_gc + b .L3507 +.L3528: + movs r2, #0 + add r1, sp, #76 + mov r0, r6 + bl log2phys + ldr r3, [sp, #76] + adds r2, r3, #1 + bne .L3512 + mov r10, #0 +.L3513: + ldr r3, .L3548+4 + ldrh r0, [r3, #2396] + cmp r10, r0 + bcc .L3515 +.L3516: + ldr r3, [sp, #32] + adds r6, r6, #1 + subs r3, r3, #1 + str r3, [sp, #32] + beq .L3520 + ldr r3, .L3548+4 + ldrh r3, [r3, #2324] + cmp r7, r3, lsl #3 + bne .L3511 +.L3520: + cmp r7, #0 + beq .L3511 + movs r2, #0 + mov r1, r7 + ldr r0, [r4, #3304] + mov fp, #0 + bl FlashReadPages + ldr r3, [sp, #28] + lsls r3, r3, #9 + str r3, [sp, #68] + ldr r3, [sp, #56] + lsls r3, r3, #9 + str r3, [sp, #60] + ldr r3, [sp, #52] + lsls r3, r3, #9 + str r3, [sp, #64] +.L3527: + mov r10, #36 + ldr r3, [r4, #3304] + mul r10, r10, fp + ldr r1, [sp, #36] + add r3, r3, r10 + ldr r2, [r3, #16] + cmp r1, r2 + bne .L3522 + ldr r1, [r3, #8] + ldr r3, [r4, #3332] + cmp r1, r3 + bne .L3523 + ldr r3, [sp, #60] + mov r0, r9 + ldr r2, [sp, #64] + add r1, r1, r3 +.L3547: + bl ftl_memcpy +.L3523: + ldr r3, [r4, #3304] + ldr r2, [r3, r10] + add r1, r3, r10 + adds r3, r2, #1 + itttt eq + ldreq r3, [r4, #676] + moveq r8, r2 + addeq r3, r3, #1 + streq r3, [r4, #676] + ldr r3, [r1, #12] + ldr r2, [r1, #16] + ldr r3, [r3, #8] + cmp r2, r3 + beq .L3525 + ldr r3, [r4, #676] + adds r3, r3, #1 + str r3, [r4, #676] + ldr r2, [r1, #8] + ldr r3, [r1, #12] + ldr r0, [r2, #4] + str r0, [sp, #16] + ldr r2, [r2] + ldr r0, .L3548+12 + str r2, [sp, #12] + ldr r2, [r3, #12] + str r2, [sp, #8] + ldr r2, [r3, #8] + str r2, [sp, #4] + ldr r2, [r3, #4] + str r2, [sp] + ldr r2, [r1, #4] + ldr r3, [r3] + ldr r1, [r1, #16] + bl printk +.L3525: + ldr r3, [r4, #3304] + add r2, r3, r10 + ldr r3, [r3, r10] + cmp r3, #256 + bne .L3526 + ldr r0, [r2, #4] + ubfx r0, r0, #10, #16 + bl P2V_block_in_plane + bl FtlGcRefreshBlock +.L3526: + add fp, fp, #1 + cmp r7, fp + bne .L3527 + movs r7, #0 + b .L3511 +.L3515: + mla r0, r0, r6, r10 + cmp r5, r0 + bhi .L3514 + ldr r3, [sp, #48] + cmp r3, r0 + bls .L3514 + subs r0, r0, r5 + mov r2, #512 + movs r1, #0 + add r0, r9, r0, lsl #9 + bl ftl_memset +.L3514: + add r10, r10, #1 + b .L3513 +.L3512: + ldr r2, [r4, #3304] + mov r10, #36 + mla r10, r10, r7, r2 + str r3, [r10, #4] + ldr r3, [sp, #36] + cmp r6, r3 + bne .L3517 + ldr r3, [r4, #3332] + mov r0, r5 + str r3, [r10, #8] + ldr r3, .L3548+4 + ldrh fp, [r3, #2396] + mov r1, fp + bl __aeabi_uidivmod + ldr r2, [sp, #44] + sub r3, fp, r1 + str r1, [sp, #56] + cmp r3, r2 + it cs + movcs r3, r2 + cmp r3, fp + str r3, [sp, #52] + bne .L3518 + str r9, [r10, #8] +.L3518: + ldr r3, .L3548+4 + ldr r2, [r4, #3344] + str r6, [r10, #16] + ldrh r3, [r3, #2402] + muls r3, r7, r3 + adds r7, r7, #1 + bic r3, r3, #3 + add r3, r3, r2 + str r3, [r10, #12] + b .L3516 +.L3517: + ldr r3, [sp, #40] + cmp r6, r3 + bne .L3519 + ldr r3, [r4, #3336] + ldr r1, [sp, #48] + str r3, [r10, #8] + ldr r3, .L3548+4 + ldrh r2, [r3, #2396] + mul r3, r2, r6 + subs r1, r1, r3 + cmp r2, r1 + str r1, [sp, #28] + bne .L3518 +.L3546: + subs r3, r3, r5 + add r3, r9, r3, lsl #9 + str r3, [r10, #8] + b .L3518 +.L3519: + ldr r3, .L3548+4 + ldrh r3, [r3, #2396] + muls r3, r6, r3 + b .L3546 +.L3522: + ldr r1, [sp, #40] + cmp r1, r2 + bne .L3523 + ldr r1, [r3, #8] + ldr r3, [r4, #3336] + cmp r1, r3 + bne .L3523 + ldr r3, .L3548+4 + ldr r2, [sp, #68] + ldrh r0, [r3, #2396] + ldr r3, [sp, #40] + muls r0, r3, r0 + subs r0, r0, r5 + add r0, r9, r0, lsl #9 + b .L3547 +.L3532: + mov r8, #-1 + b .L3507 +.L3549: + .align 2 +.L3548: + .word .LANCHOR1 + .word .LANCHOR0 + .word .LANCHOR2 + .word .LC148 + .fnend + .size ftl_read, .-ftl_read + .align 1 + .global ftl_vendor_read + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type ftl_vendor_read, %function +ftl_vendor_read: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + mov r3, r2 + mov r2, r1 + mov r1, r0 + movs r0, #16 + b ftl_read + .fnend + .size ftl_vendor_read, .-ftl_vendor_read + .align 1 + .global FlashBootVendorRead + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FlashBootVendorRead, %function +FlashBootVendorRead: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + mov r4, r0 + mov r5, r1 + mov r6, r2 + bl rknand_device_lock + ldr r3, .L3554 + ldr r3, [r3, #500] + cmp r3, #1 + bne .L3553 + mov r0, r4 + mov r2, r6 + mov r1, r5 + bl ftl_vendor_read + mov r4, r0 +.L3552: + bl rknand_device_unlock + mov r0, r4 + pop {r4, r5, r6, pc} +.L3553: + mov r4, #-1 + b .L3552 +.L3555: + .align 2 +.L3554: + .word .LANCHOR1 + .fnend + .size FlashBootVendorRead, .-FlashBootVendorRead + .align 1 + .global ftl_sys_read + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type ftl_sys_read, %function +ftl_sys_read: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + mov r3, r2 + mov r2, r1 + add r1, r0, #256 + movs r0, #16 + b ftl_read + .fnend + .size ftl_sys_read, .-ftl_sys_read + .align 1 + .global StorageSysDataLoad + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type StorageSysDataLoad, %function +StorageSysDataLoad: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r3, r4, r5, lr} + .save {r3, r4, r5, lr} + mov r4, r1 + mov r5, r0 + mov r2, #512 + movs r1, #0 + mov r0, r4 + bl ftl_memset + bl rknand_device_lock + mov r2, r4 + movs r1, #1 + mov r0, r5 + bl ftl_sys_read + mov r4, r0 + bl rknand_device_unlock + mov r0, r4 + pop {r3, r4, r5, pc} + .fnend + .size StorageSysDataLoad, .-StorageSysDataLoad + .align 1 + .global FtlRead + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FtlRead, %function +FtlRead: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + b ftl_read + .fnend + .size FtlRead, .-FtlRead + .align 1 + .global FtlInit + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FtlInit, %function +FtlInit: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r3, r4, r5, r6, r7, lr} + .save {r3, r4, r5, r6, r7, lr} + mov r3, #-1 + ldr r7, .L3575 + ldr r2, .L3575+4 + ldr r6, .L3575+8 + ldr r4, .L3575+12 + ldr r1, .L3575+16 + str r3, [r7, #500] + movs r3, #0 + ldr r0, .L3575+20 + str r3, [r2, #1496] + str r3, [r4, #228] + bl printk + add r0, r6, #124 + bl FtlConstantsInit + bl FtlMemInit + bl FtlVariablesInit + ldrh r0, [r6, #2328] + bl FtlFreeSysBlkQueueInit + bl FtlLoadBbt + cbz r0, .L3560 + ldr r1, .L3575+24 + ldr r0, .L3575+28 +.L3574: + bl printk +.L3561: + movs r0, #0 + pop {r3, r4, r5, r6, r7, pc} +.L3560: + bl FtlSysBlkInit + mov r5, r0 + cbz r0, .L3562 + ldr r1, .L3575+24 + ldr r0, .L3575+32 + b .L3574 +.L3562: + movs r1, #1 + str r1, [r7, #500] + bl ftl_do_gc + ldrh r7, [r4, #316] + cmp r7, #15 + bhi .L3563 + movw r6, #65535 +.L3566: + ldrh r3, [r4, #556] + cmp r3, r6 + bne .L3564 + ldrh r3, [r4, #1174] + cmp r3, r6 + bne .L3564 + and r0, r5, #63 + bl List_get_gc_head_node + uxth r0, r0 + bl FtlGcRefreshBlock +.L3564: + movs r1, #1 + mov r0, r1 + bl ftl_do_gc + movs r1, #1 + movs r0, #0 + bl ftl_do_gc + ldrh r2, [r4, #316] + adds r3, r7, #2 + cmp r2, r3 + bhi .L3561 + adds r5, r5, #1 + cmp r5, #4096 + bne .L3566 + b .L3561 +.L3563: + ldrb r3, [r6, #152] @ zero_extendqisi2 + cmp r3, #0 + beq .L3561 + movs r4, #128 +.L3568: + movs r1, #1 + mov r0, r1 + bl ftl_do_gc + subs r4, r4, #1 + bne .L3568 + b .L3561 +.L3576: + .align 2 +.L3575: + .word .LANCHOR1 + .word .LANCHOR4 + .word .LANCHOR0 + .word .LANCHOR2 + .word .LC76 + .word .LC77 + .word .LANCHOR3+224 + .word .LC161 + .word .LC162 + .fnend + .size FtlInit, .-FtlInit + .align 1 + .global rk_ftl_init + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type rk_ftl_init, %function +rk_ftl_init: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r3, r4, r5, lr} + .save {r3, r4, r5, lr} + mov r0, #2048 + ldr r4, .L3581 + movs r5, #0 + bl ftl_dma32_malloc + add r1, r4, #1504 + str r0, [r4, #1500] + addw r0, r4, #1180 + str r5, [r4, #1184] + str r5, [r4, #1180] + str r5, [r4, #1504] + bl rknand_get_reg_addr + ldr r3, [r4, #1180] + cbz r3, .L3580 + bl rk_nandc_irq_init + mov r3, #2048 + mov r2, r5 + mov r1, r5 + ldr r0, [r4, #1500] + bl FlashSramLoadStore + bl rknand_flash_cs_init + ldr r0, [r4, #1180] + bl FlashInit + mov r4, r0 + cbnz r0, .L3579 + bl FtlInit +.L3579: + mov r1, r4 + ldr r0, .L3581+4 + bl printk +.L3577: + mov r0, r4 + pop {r3, r4, r5, pc} +.L3580: + mov r4, #-1 + b .L3577 +.L3582: + .align 2 +.L3581: + .word .LANCHOR4 + .word .LC163 + .fnend + .size rk_ftl_init, .-rk_ftl_init + .align 1 + .global ftl_fix_nand_power_lost_error + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type ftl_fix_nand_power_lost_error, %function +ftl_fix_nand_power_lost_error: + .fnstart + @ args = 0, pretend = 0, frame = 48 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L3597 + push {r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + .pad #48 + sub sp, sp, #48 + mov r8, r3 + ldrb r2, [r3, #152] @ zero_extendqisi2 + cmp r2, #0 + beq .L3583 + ldr r4, .L3597+4 + movw r5, #4097 + ldr r7, .L3597+8 + ldr r0, .L3597+12 + ldr r3, [r4, #300] + ldrh r6, [r7, #1342] + ldrh r2, [r3, r6, lsl #1] + mov r1, r6 + bl printk + ldrh r0, [r4, #320] + lsl r9, r6, #1 + bl FtlGcRefreshOpenBlock + ldrh r0, [r4, #368] + bl FtlGcRefreshOpenBlock + add r0, r4, #320 + bl allocate_new_data_superblock + add r0, r4, #368 + bl allocate_new_data_superblock +.L3585: + subs r5, r5, #1 + beq .L3589 + movs r1, #1 + mov r0, r1 + bl ftl_do_gc + ldr r3, [r4, #300] + ldrh r3, [r3, r9] + cmp r3, #0 + bne .L3585 +.L3589: + ldr r3, [r4, #300] + mov r1, r6 + ldr r0, .L3597+12 + ldrh r2, [r3, r6, lsl #1] + bl printk + ldr r3, [r4, #300] + ldrh r5, [r3, r6, lsl #1] + cbnz r5, .L3587 + add r0, sp, #48 + movw r9, #65535 + strh r6, [r0, #-48]! @ movhi + mov r10, #36 + bl make_superblock + ldrh lr, [r8, #2324] + add r0, sp, #14 + ldr r8, [r4, #232] + mov r2, r5 + mov ip, r5 +.L3590: + uxth r3, r2 + cmp lr, r3 + bhi .L3592 + ldr r3, [r4, #300] + mov r1, r6 + ldr r0, .L3597+16 + ldrh r2, [r3, r6, lsl #1] + bl printk + mov r2, r5 + movs r1, #0 + ldr r0, [r4, #232] + bl FlashEraseBlocks + mov r2, r5 + movs r1, #1 + ldr r0, [r4, #232] + bl FlashEraseBlocks +.L3587: + movw r3, #65535 + strh r3, [r7, #1342] @ movhi +.L3583: + add sp, sp, #48 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L3592: + ldrh r3, [r0, #2]! + cmp r3, r9 + beq .L3591 + mla r1, r10, r5, r8 + adds r5, r5, #1 + lsls r3, r3, #10 + uxth r5, r5 + str r3, [r1, #4] + str ip, [r1, #8] + str ip, [r1, #12] +.L3591: + adds r2, r2, #1 + b .L3590 +.L3598: + .align 2 +.L3597: + .word .LANCHOR0 + .word .LANCHOR2 + .word .LANCHOR4 + .word .LC164 + .word .LC165 + .fnend + .size ftl_fix_nand_power_lost_error, .-ftl_fix_nand_power_lost_error + .align 1 + .global rk_ftl_garbage_collect + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type rk_ftl_garbage_collect, %function +rk_ftl_garbage_collect: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + b ftl_do_gc + .fnend + .size rk_ftl_garbage_collect, .-rk_ftl_garbage_collect + .align 1 + .global ftl_write + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type ftl_write, %function +ftl_write: + .fnstart + @ args = 0, pretend = 0, frame = 80 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r10, r3 + ldr r3, .L3672 + mov r9, r2 + .pad #84 + sub sp, sp, #84 + mov r7, r1 + ldr r2, [r3, #228] + cmp r2, #0 + bne .L3642 + ldr r1, .L3672+4 + ldr r1, [r1, #500] + cmp r1, #1 + bne .L3643 + cmp r0, #16 + bne .L3602 + mov r2, r10 + mov r1, r9 + add r0, r7, #256 + bl FtlVendorPartWrite +.L3600: + add sp, sp, #84 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L3602: + ldr fp, .L3672+16 + str r3, [sp, #4] + ldr r2, [fp, #2432] + cmp r7, r2 + bcs .L3646 + cmp r9, r2 + bhi .L3646 + add r5, r7, r9 + cmp r2, r5 + bcc .L3646 + ldrh r4, [fp, #2396] + mov r2, #2048 + ldr r6, .L3672+8 + mov r0, r7 + mov r1, r4 + str r2, [r6, #1508] + bl __aeabi_uidiv + mov r1, r4 + str r0, [sp] + subs r0, r5, #1 + bl __aeabi_uidiv + ldr r3, [sp, #4] + cmp r9, r4, lsl #1 + ldr r2, [sp] + ldr r1, [fp, #2444] + str r0, [sp, #12] + sub r5, r0, r2 + ldr r2, [r3, #484] + add r8, r5, #1 + add r2, r2, r8 + str r2, [r3, #484] + ldr r2, [r3, #500] + add r2, r2, r9 + str r2, [r3, #500] + ite cs + movcs r2, #1 + movcc r2, #0 + str r2, [sp, #16] + cmp r1, #0 + beq .L3647 + movs r2, #36 + muls r2, r1, r2 + ldr r1, [fp, #2448] + subs r2, r2, #36 + add fp, r1, r2 + ldr r1, [sp] + ldr r2, [fp, #16] + cmp r1, r2 + bne .L3648 + ldr r2, [r3, #488] + mov r1, r4 + mov r0, r7 + adds r2, r2, #1 + str r2, [r3, #488] + ldr r3, [r6, #1512] + adds r3, r3, #1 + str r3, [r6, #1512] + bl __aeabi_uidivmod + subs r4, r4, r1 + ldr r0, [fp, #8] + cmp r4, r9 + mov r3, r1 + it cs + movcs r4, r9 + mov r1, r10 + lsl r8, r4, #9 + add r0, r0, r3, lsl #9 + mov r2, r8 + bl ftl_memcpy + cbnz r5, .L3606 + ldr r3, [r6, #1512] + cmp r3, #2 + bgt .L3606 +.L3642: + movs r0, #0 + b .L3600 +.L3606: + add r3, r10, r8 + sub r9, r9, r4 + str r3, [sp, #8] + add r7, r7, r4 + ldr r3, [sp] + mov r8, r5 + adds r3, r3, #1 + str r3, [sp] +.L3605: + movs r3, #0 + str r3, [r6, #1512] +.L3604: + ldr r1, [sp, #12] + ldr r0, [sp] + bl FtlCacheMetchLpa + cbz r0, .L3607 + bl FtlCacheWriteBack +.L3607: + ldr r5, .L3672+12 + ldr fp, .L3672+16 + str r5, [r6, #1488] + ldr r6, [sp] +.L3608: + ldr r4, .L3672 + cmp r8, #0 + bne .L3637 + ldr r3, [sp, #12] + mov r0, r8 + ldr r2, [sp] + subs r1, r3, r2 + bl ftl_do_gc + ldrh r3, [r4, #316] + cmp r3, #5 + bls .L3638 + cmp r3, #31 + bhi .L3642 + ldr r3, .L3672+16 + ldrb r3, [r3, #36] @ zero_extendqisi2 + cmp r3, #0 + bne .L3642 +.L3638: + movw r5, #65535 + movs r6, #128 +.L3641: + ldrh r3, [r4, #556] + cmp r3, r5 + bne .L3640 + ldrh r3, [r4, #1174] + cmp r3, r5 + bne .L3640 + ldrh r3, [r4, #1176] + cmp r3, r5 + bne .L3640 + and r0, r8, #7 + bl List_get_gc_head_node + uxth r0, r0 + bl FtlGcRefreshBlock +.L3640: + movs r1, #1 + strh r6, [r4, #1122] @ movhi + mov r0, r1 + strh r6, [r4, #1120] @ movhi + bl ftl_do_gc + movs r1, #1 + movs r0, #0 + bl ftl_do_gc + ldr r3, [r4, #228] + cmp r3, #0 + bne .L3642 + ldrh r3, [r4, #316] + cmp r3, #2 + bhi .L3642 + add r8, r8, #1 + cmp r8, #256 + bne .L3641 + b .L3642 +.L3648: + str r10, [sp, #8] + b .L3605 +.L3647: + str r10, [sp, #8] + b .L3604 +.L3637: + ldrh r1, [r5, #4] + cbnz r1, .L3609 + add r2, r4, #320 + ldr r10, .L3672+4 + cmp r5, r2 + bne .L3610 + ldrh r5, [r4, #372] + cbnz r5, .L3611 + add r0, r4, #368 + bl allocate_new_data_superblock + str r5, [r10, #3448] +.L3611: + ldr r5, .L3672+12 + ldr r0, .L3672+12 + bl allocate_new_data_superblock + ldr r1, [r10, #3448] + add r2, r5, #48 + cmp r1, #0 + it ne + movne r5, r2 +.L3612: + ldrh r2, [r5, #4] + cbnz r2, .L3613 + mov r0, r5 + bl allocate_new_data_superblock +.L3613: + ldr r2, .L3672+8 + str r5, [r2, #1488] +.L3609: + ldr r1, [fp, #2444] + ldr r2, [r4, #3300] + ldr r10, .L3672 + subs r2, r2, r1 + ldrh r1, [r5, #4] + cmp r2, r8 + it cs + movcs r2, r8 + cmp r1, r2 + mov r3, r1 + it cs + movcs r3, r2 + str r3, [sp, #36] + movs r3, #0 + str r3, [sp, #20] +.L3614: + ldr r3, [sp, #20] + ldr r2, [sp, #36] + cmp r3, r2 + bne .L3633 +.L3615: + ldr r2, .L3672 + ldr r1, [fp, #2444] + ldr r3, [sp, #20] + ldr r2, [r2, #3300] + sub r8, r8, r3 + cmp r1, r2 + bcs .L3634 + ldr r3, [sp, #16] + cmp r3, #0 + bne .L3634 + ldrh r2, [r5, #4] + cmp r2, #0 + beq .L3634 +.L3636: + movs r3, #0 + str r3, [sp, #16] + b .L3608 +.L3610: + str r1, [r10, #3448] + ldrh r1, [r4, #324] + cbnz r1, .L3650 + mov r0, r5 + bl allocate_new_data_superblock + b .L3612 +.L3650: + mov r5, r2 + b .L3613 +.L3673: + .align 2 +.L3672: + .word .LANCHOR2 + .word .LANCHOR1 + .word .LANCHOR4 + .word .LANCHOR2+320 + .word .LANCHOR0 +.L3633: + ldrh r2, [r5, #4] + cmp r2, #0 + beq .L3615 + ldr r3, [sp, #16] + cbz r3, .L3616 + ldr r3, [sp, #12] + cmp r3, r6 + bne .L3616 + ldr r3, [sp, #20] + cbz r3, .L3616 + ldrh r1, [fp, #2396] + add r2, r7, r9 + ldr r3, [sp, #12] + mls r2, r1, r3, r2 + cmp r1, r2 + bne .L3615 +.L3616: + movs r2, #0 + add r1, sp, #40 + mov r0, r6 + movs r4, #36 + bl log2phys + mov r0, r5 + bl get_new_active_ppa + ldr r1, [fp, #2444] + ldr r2, [fp, #2448] + mla ip, r4, r1, r2 + ldrh r2, [fp, #2402] + str r0, [ip, #4] + mul r0, r2, r1 + str r6, [ip, #16] + bic r3, r0, #3 + str r3, [sp, #28] + ldr r0, [sp, #28] + ldr r3, [r10, #3348] + str r3, [sp, #32] + add r3, r3, r0 + ldrh r0, [fp, #2400] + str r3, [ip, #12] + str r3, [sp, #4] + muls r1, r0, r1 + ldr r0, [r10, #3328] + bic r1, r1, #3 + add r1, r1, r0 + mov r0, r3 + str r1, [ip, #8] + movs r1, #0 + bl ftl_memset + ldr r3, [sp] + cmp r3, r6 + beq .L3617 + ldr r3, [sp, #12] + cmp r3, r6 + bne .L3668 + ldrh r3, [sp, #12] + add r4, r7, r9 + ldrh r2, [fp, #2396] + smulbb r2, r2, r3 + movs r3, #0 + str r3, [sp, #24] + subs r4, r4, r2 + uxth r4, r4 + b .L3620 +.L3617: + ldrh r4, [fp, #2396] + mov r0, r7 + mov r1, r4 + bl __aeabi_uidivmod + subs r4, r4, r1 + str r1, [sp, #24] + cmp r4, r9 + it cs + movcs r4, r9 +.L3620: + ldrh r2, [fp, #2396] + cmp r2, r4 + bne .L3621 + ldr r3, [sp] + ldr r2, [fp, #2444] + ldr r0, [fp, #2448] + cmp r3, r6 + itte ne + mulne r1, r4, r6 + ldrne r3, [sp, #8] + ldreq r1, [sp, #8] + mov r4, #36 + itt ne + subne r1, r1, r7 + addne r1, r3, r1, lsl #9 + ldr r3, [sp, #16] + cbz r3, .L3623 + mla r2, r4, r2, r0 + str r1, [r2, #8] +.L3624: + ldr r3, [sp, #32] + movw r2, #61589 + ldr r1, [sp, #28] + strh r2, [r3, r1] @ movhi + ldr r3, [sp, #4] + ldr r2, [r10, #512] + str r2, [r3, #4] + adds r2, r2, #1 + adds r3, r2, #1 + ldr r3, [sp, #4] + it eq + moveq r2, #0 + str r2, [r10, #512] + ldr r2, [sp, #40] + str r6, [r3, #8] + adds r6, r6, #1 + str r2, [r3, #12] + ldrh r2, [r5] + strh r2, [r3, #2] @ movhi + ldr r3, [sp, #20] + ldr r2, [fp, #2444] + adds r3, r3, #1 + adds r2, r2, #1 + str r3, [sp, #20] + str r2, [fp, #2444] + b .L3614 +.L3623: + mla r0, r4, r2, r0 + ldrh r2, [fp, #2400] +.L3671: + ldr r0, [r0, #8] + b .L3669 +.L3621: + ldr r2, [sp, #40] + movs r0, #36 + adds r1, r2, #1 + beq .L3625 + ldr r1, [fp, #2448] + str r2, [sp, #48] + ldr r2, [fp, #2444] + str r6, [sp, #60] + mla r2, r0, r2, r1 + add r0, sp, #44 + ldr r1, [r2, #8] + ldr r2, [r2, #12] + str r1, [sp, #52] + movs r1, #1 + str r2, [sp, #56] + movs r2, #0 + bl FlashReadPages + ldr r2, [sp, #44] + adds r2, r2, #1 + bne .L3626 + ldr r2, [r10, #676] + adds r2, r2, #1 + str r2, [r10, #676] +.L3628: + ldr r3, [sp] + lsls r2, r4, #9 + cmp r3, r6 + bne .L3629 + ldr r0, [fp, #2448] + movs r4, #36 + ldr r1, [fp, #2444] + ldr r3, [sp, #24] + mla r1, r4, r1, r0 + ldr r0, [r1, #8] + ldr r1, [sp, #8] + add r0, r0, r3, lsl #9 +.L3669: + bl ftl_memcpy + b .L3624 +.L3626: + ldr r3, [sp, #4] + ldr r2, [r3, #8] + cmp r6, r2 + beq .L3628 + ldr r2, [r10, #676] + ldr r0, .L3674 + adds r2, r2, #1 + str r2, [r10, #676] + mov r2, r6 + ldr r1, [r3, #8] + bl printk + b .L3628 +.L3625: + ldr r1, [fp, #2444] + ldr r2, [fp, #2448] + mla r0, r0, r1, r2 + ldrh r2, [fp, #2400] + movs r1, #0 + ldr r0, [r0, #8] + bl ftl_memset + b .L3628 +.L3629: + ldrh r1, [fp, #2396] + movs r4, #36 + ldr r3, [fp, #2448] + ldr r0, [fp, #2444] + muls r1, r6, r1 + mla r0, r4, r0, r3 + ldr r3, [sp, #8] + subs r1, r1, r7 + add r1, r3, r1, lsl #9 + b .L3671 +.L3668: + ldr r3, [sp, #16] + cbz r3, .L3630 + ldr r2, [fp, #2444] + ldr r1, [fp, #2448] + ldr r3, [sp, #8] + mla r4, r4, r2, r1 + ldrh r2, [fp, #2396] + muls r2, r6, r2 + subs r2, r2, r7 + add r2, r3, r2, lsl #9 + str r2, [r4, #8] + b .L3624 +.L3630: + ldrh r1, [fp, #2396] + ldr r2, [fp, #2444] + ldr r0, [fp, #2448] + ldr r3, [sp, #8] + muls r1, r6, r1 + mla r4, r4, r2, r0 + ldrh r2, [fp, #2400] + subs r1, r1, r7 + add r1, r3, r1, lsl #9 + ldr r0, [r4, #8] + b .L3669 +.L3634: + bl FtlCacheWriteBack + cmp r8, #1 + mov r2, #0 + str r2, [fp, #2444] + bhi .L3608 + b .L3636 +.L3646: + mov r0, #-1 + b .L3600 +.L3643: + mov r0, r2 + b .L3600 +.L3675: + .align 2 +.L3674: + .word .LC166 + .fnend + .size ftl_write, .-ftl_write + .align 1 + .global ftl_vendor_write + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type ftl_vendor_write, %function +ftl_vendor_write: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + mov r3, r2 + mov r2, r1 + mov r1, r0 + movs r0, #16 + b ftl_write + .fnend + .size ftl_vendor_write, .-ftl_vendor_write + .align 1 + .global FlashBootVendorWrite + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FlashBootVendorWrite, %function +FlashBootVendorWrite: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + mov r4, r0 + mov r5, r1 + mov r6, r2 + bl rknand_device_lock + ldr r3, .L3680 + ldr r3, [r3, #500] + cmp r3, #1 + bne .L3679 + mov r0, r4 + mov r2, r6 + mov r1, r5 + bl ftl_vendor_write + mov r4, r0 +.L3678: + bl rknand_device_unlock + mov r0, r4 + pop {r4, r5, r6, pc} +.L3679: + mov r4, #-1 + b .L3678 +.L3681: + .align 2 +.L3680: + .word .LANCHOR1 + .fnend + .size FlashBootVendorWrite, .-FlashBootVendorWrite + .align 1 + .global ftl_sys_write + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type ftl_sys_write, %function +ftl_sys_write: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + mov r3, r2 + mov r2, r1 + add r1, r0, #256 + movs r0, #16 + b ftl_write + .fnend + .size ftl_sys_write, .-ftl_sys_write + .align 1 + .global StorageSysDataStore + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type StorageSysDataStore, %function +StorageSysDataStore: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r3, r4, r5, lr} + .save {r3, r4, r5, lr} + mov r5, r1 + mov r4, r0 + bl rknand_device_lock + mov r2, r5 + movs r1, #1 + mov r0, r4 + bl ftl_sys_write + mov r4, r0 + bl rknand_device_unlock + mov r0, r4 + pop {r3, r4, r5, pc} + .fnend + .size StorageSysDataStore, .-StorageSysDataStore + .align 1 + .global FtlDumpSysBlock + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FtlDumpSysBlock, %function +FtlDumpSysBlock: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + lsl r9, r0, #10 + ldr r5, .L3691 + .pad #28 + sub sp, sp, #28 + mov r7, r0 + movs r6, #0 + ldr r4, .L3691+4 + ldr r3, [r5, #3316] + ldr r8, .L3691+12 + ldr fp, .L3691+16 + add r10, r4, #1256 + str r3, [r4, #1264] + ldr r3, [r5, #3340] + str r3, [r4, #1268] +.L3685: + ldrh r2, [r8, #2392] + sxth r3, r6 + cmp r3, r2 + blt .L3687 + add sp, sp, #28 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L3687: + movs r2, #1 + orr r3, r3, r9 + mov r1, r2 + mov r0, r10 + str r3, [r4, #1260] + bl FlashReadPages + ldr r2, [r4, #1264] + mov r1, r7 + ldr r3, [r4, #1268] + mov r0, fp + ldr r2, [r2] + str r2, [sp, #16] + ldr r2, [r3, #12] + str r2, [sp, #12] + ldr r2, [r3, #8] + str r2, [sp, #8] + ldr r2, [r3, #4] + str r2, [sp, #4] + ldr r3, [r3] + ldr r2, [r4, #1256] + str r3, [sp] + ldr r3, [r4, #1260] + bl printk + ldr r3, [r4, #1268] + ldr r3, [r3] + adds r3, r3, #1 + beq .L3686 + mov r3, #768 + movs r2, #4 + ldr r1, [r5, #3316] + ldr r0, .L3691+8 + bl rknand_print_hex +.L3686: + adds r6, r6, #1 + b .L3685 +.L3692: + .align 2 +.L3691: + .word .LANCHOR2 + .word .LANCHOR4 + .word .LC168 + .word .LANCHOR0 + .word .LC167 + .fnend + .size FtlDumpSysBlock, .-FtlDumpSysBlock + .align 1 + .global dump_map_info + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type dump_map_info, %function +dump_map_info: + .fnstart + @ args = 0, pretend = 0, frame = 24 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #52 + sub sp, sp, #52 + ldr r4, .L3708 + ldr r5, .L3708+4 + ldrh r7, [r4, #2332] + addw fp, r4, #2350 +.L3694: + ldrh r3, [r4, #2334] + cmp r3, r7 + bhi .L3702 + ldr r6, .L3708+8 + mov r9, #0 + ldr fp, .L3708+24 + add r10, r6, #1256 +.L3703: + ldrh r3, [r5, #3452] + sxth r7, r9 + cmp r7, r3 + bge .L3706 + lsls r7, r7, #1 + mov r8, #0 + b .L3707 +.L3697: + mov r1, r7 + ldrb r0, [fp, r8] @ zero_extendqisi2 + str r3, [sp, #44] + str r2, [sp, #40] + bl V2P_block + str r0, [sp, #36] + bl FtlBbmIsBadBlock + ldr r2, [sp, #40] + ldr r3, [sp, #44] + cbnz r0, .L3695 + ldr r1, [sp, #36] + mla r0, r10, r6, r9 + lsls r1, r1, #10 + str r3, [r0, #8] + str r1, [r0, #4] + ldr r1, [sp, #32] + muls r1, r6, r1 + it mi + addmi r1, r1, #3 + adds r6, r6, #1 + bic ip, r1, #3 + ldr r1, [sp, #28] + uxth r6, r6 + add r1, r1, ip + str r1, [r0, #12] +.L3695: + add r8, r8, #1 +.L3704: + uxth r1, r8 + cmp r2, r1 + bhi .L3697 + cbnz r6, .L3698 +.L3701: + adds r7, r7, #1 + uxth r7, r7 + b .L3694 +.L3698: + ldr r10, .L3708+28 + mov r0, r9 + mov r8, #0 + mov r9, #36 + movs r2, #1 + mov r1, r6 + bl FlashReadPages +.L3699: + uxth r3, r8 + cmp r6, r3 + bls .L3701 + ldr r3, [r5, #3304] + mla r3, r9, r8, r3 + add r8, r8, #1 + ldr r1, [r3, #12] + ldr r2, [r3, #4] + ldr r3, [r3, #8] + ldr r0, [r3, #4] + str r0, [sp, #16] + mov r0, r10 + ldr r3, [r3] + str r3, [sp, #12] + ldr r3, [r1, #12] + str r3, [sp, #8] + ldr r3, [r1, #8] + str r3, [sp, #4] + ldr r3, [r1, #4] + str r3, [sp] + ldr r3, [r1] + ubfx r1, r2, #10, #16 + bl printk + b .L3699 +.L3702: + ldr r1, [r5, #1148] + mov r8, #0 + ldrh r2, [r4, #2324] + mov r6, r8 + ldr r9, [r5, #3304] + mov r10, #36 + str r1, [sp, #28] + ldrh r1, [r4, #2402] + ldr r3, [r5, #1144] + str r1, [sp, #32] + b .L3704 +.L3705: + ldr r2, [r5, #3368] + mov r0, r10 + ldrh r2, [r2, r7] + orr r3, r3, r2, lsl #10 + movs r2, #1 + mov r1, r2 + str r3, [r6, #1260] + bl FlashReadPages + ldr r2, [r6, #1264] + ldr r1, [r5, #3368] + ldr r3, [r6, #1268] + ldr r0, [r2, #4] + ldrh r1, [r1, r7] + str r0, [sp, #20] + mov r0, fp + ldr r2, [r2] + str r2, [sp, #16] + ldr r2, [r3, #12] + str r2, [sp, #12] + ldr r2, [r3, #8] + str r2, [sp, #8] + ldr r2, [r3, #4] + str r2, [sp, #4] + ldr r3, [r3] + str r3, [sp] + ldr r3, [r6, #1260] + ldr r2, [r6, #1256] + bl printk +.L3707: + ldrh r2, [r4, #2392] + sxth r3, r8 + add r8, r8, #1 + cmp r3, r2 + blt .L3705 + add r9, r9, #1 + b .L3703 +.L3706: + ldr r3, [r4, #2420] + movs r2, #2 + ldr r1, [r5, #3368] + ldr r0, .L3708+12 + bl rknand_print_hex + ldrh r3, [r4, #2428] + movs r2, #4 + ldr r1, [r5, #3388] + ldr r0, .L3708+16 + bl rknand_print_hex + ldrh r3, [r4, #2428] + movs r2, #4 + ldr r1, [r5, #3392] + ldr r0, .L3708+20 + add sp, sp, #52 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, lr} + b rknand_print_hex +.L3709: + .align 2 +.L3708: + .word .LANCHOR0 + .word .LANCHOR2 + .word .LANCHOR4 + .word .LC170 + .word .LC171 + .word .LC172 + .word .LC113 + .word .LC169 + .fnend + .size dump_map_info, .-dump_map_info + .align 1 + .global flash_boot_enter_slc_mode + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type flash_boot_enter_slc_mode, %function +flash_boot_enter_slc_mode: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L3712 + ldr r2, [r3, #2268] + ldr r3, .L3712+4 + cmp r2, r3 + bne .L3710 + b flash_enter_slc_mode +.L3710: + bx lr +.L3713: + .align 2 +.L3712: + .word .LANCHOR0 + .word 1446522928 + .fnend + .size flash_boot_enter_slc_mode, .-flash_boot_enter_slc_mode + .align 1 + .global flash_boot_exit_slc_mode + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type flash_boot_exit_slc_mode, %function +flash_boot_exit_slc_mode: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L3716 + ldr r2, [r3, #2268] + ldr r3, .L3716+4 + cmp r2, r3 + bne .L3714 + b flash_exit_slc_mode +.L3714: + bx lr +.L3717: + .align 2 +.L3716: + .word .LANCHOR0 + .word 1446522928 + .fnend + .size flash_boot_exit_slc_mode, .-flash_boot_exit_slc_mode + .align 1 + .global write_idblock + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type write_idblock, %function +write_idblock: + .fnstart + @ args = 0, pretend = 0, frame = 112 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r7, r0 + ldr r4, .L3766 + .pad #124 + sub sp, sp, #124 + mov r0, #256000 + mov r9, r1 + mov r5, r2 + ldr r3, [r4, #48] + ldr r8, [r4, #40] + ldrb r6, [r3, #9] @ zero_extendqisi2 + bl ftl_malloc + str r0, [sp, #8] + cmp r0, #0 + beq .L3745 + addw r7, r7, #511 + lsr fp, r7, #9 + cmp fp, #8 + bls .L3743 + cmp fp, #500 + bhi .L3745 +.L3720: + ldr r2, [r9] + ldr r3, .L3766+4 + cmp r2, r3 + bne .L3745 + smulbb r6, r6, r8 + uxth r3, r6 + subs r0, r3, #1 + mov r1, r3 + add r0, r0, fp + str r3, [sp, #12] + bl __aeabi_uidiv + str r0, [sp, #32] + add r0, r9, #254976 + add r0, r0, #512 + movs r3, #0 + movw r2, #63871 +.L3724: + ldr r1, [r0, #-4]! + cmp r1, #0 + bne .L3721 + ldr r1, [r9, r3, lsl #2] + adds r3, r3, #1 + cmp r3, #4096 + add r2, r2, #-1 + it hi + movhi r3, #0 + cmp r2, #4096 + str r1, [r0, #512] + bne .L3724 +.L3723: + movs r3, #5 + mov r1, r5 + movs r2, #4 + ldr r0, .L3766+8 + bl rknand_print_hex + ldrb r2, [r4, #37] @ zero_extendqisi2 + subs r5, r5, #4 + ldr r1, [r9, #512] + ldr r0, .L3766+12 + bl printk + ldr r2, .L3766+16 + mov r1, fp + ldrh r3, [r4, #150] + ldr r0, .L3766+20 + ldr r2, [r2, #1212] + str r2, [sp] + mov r2, fp + bl printk + ldrb r3, [r4, #37] @ zero_extendqisi2 + ldr r2, [r9, #512] + ldr r4, .L3766 + cmp r2, r3 + it hi + strhi r3, [r9, #512] + lsl r3, fp, #7 + str r3, [sp, #40] + movs r3, #0 + str r3, [sp, #20] + str r3, [sp, #16] +.L3741: + ldr r2, [r5, #4] + ldrb r3, [r4, #37] @ zero_extendqisi2 + cmp r2, r3 + bcs .L3726 + ldr r3, .L3766+16 + ldr r3, [r3, #1212] + cmp r2, r3 + bcc .L3726 + ldr r3, [sp, #32] + cmp r3, #1 + bls .L3727 + ldr r3, [sp, #16] + cbz r3, .L3727 + ldr r3, [r5] + adds r3, r3, #1 + cmp r2, r3 + beq .L3726 +.L3727: + mov r2, #512 + movs r1, #0 + ldr r0, [sp, #8] + bl memset + ldr r6, [r5, #4] + mov r2, fp + ldr r3, [sp, #12] + ldr r7, [r4, #40] + ldr r0, .L3766+24 + muls r6, r3, r6 + ldr r3, [r4, #48] + ldrb r10, [r3, #9] @ zero_extendqisi2 + mov r1, r6 + bl printk + movs r0, #0 + smulbb r7, r7, r10 + bl flash_boot_enter_slc_mode + mov r1, r10 + mov r0, r6 + bl __aeabi_uidiv + uxth r7, r7 + movs r2, #0 + mov r1, r0 + mov r0, r2 + bl FlashEraseBlock + cmp r7, fp + bcs .L3746 + movs r2, #0 + mov r8, #2 + adds r1, r6, r7 + mov r0, r2 + bl FlashEraseBlock +.L3728: + movs r0, #0 + bl flash_boot_exit_slc_mode + ldr r3, [r4, #48] + ldrh r0, [r3, #10] + ldrb r1, [r3, #12] @ zero_extendqisi2 + lsls r0, r0, #2 + mul r0, r8, r0 + mov r8, #0 + bl __aeabi_idiv + mov r1, r7 + str r0, [sp, #44] + mov r0, r6 + bl __aeabi_uidivmod + subs r3, r6, r1 + str r1, [sp, #28] + str r3, [sp, #36] + str r9, [sp, #24] +.L3729: + ldr r3, [sp, #44] + cmp r3, r8 + bhi .L3733 + mov r1, r6 + movs r3, #0 + mov r2, fp + ldr r0, .L3766+28 + bl printk + ldr r6, [r5, #4] + mov r2, fp + ldr r3, [sp, #12] + mov r8, #0 + ldr r1, [r4, #40] + ldr r0, .L3766+32 + muls r6, r3, r6 + ldr r3, [r4, #48] + ldrb r3, [r3, #9] @ zero_extendqisi2 + str r3, [sp, #24] + ldrh r3, [sp, #24] + smulbb r1, r1, r3 + uxth r7, r1 + mov r1, r6 + bl printk + mov r1, r7 + mov r0, r6 + bl __aeabi_uidivmod + subs r3, r6, r1 + ldr r10, [sp, #8] + str r3, [sp, #44] + ldr r3, [sp, #24] + str r1, [sp, #28] + muls r3, r1, r3 + ubfx r3, r3, #2, #2 +.L3734: + cmp r8, fp + bcc .L3736 + movs r3, #0 + mov r1, r6 + mov r2, fp + ldr r0, .L3766+36 + bl printk + ldr r0, [sp, #8] + mov r3, r9 + movs r6, #0 +.L3739: + mov r7, r0 + mov r8, r3 + ldr r1, [r7] + adds r0, r0, #4 + ldr r2, [r8] + adds r3, r3, #4 + cmp r1, r2 + beq .L3737 + mov r2, #512 + movs r1, #0 + ldr r0, [sp, #8] + bl memset + ldr r3, [r8] + ldr r1, [sp, #16] + ldr r0, .L3766+40 + str r3, [sp, #4] + ldr r3, [r7] + str r3, [sp] + mov r3, r6 + bic r6, r6, #255 + ldr r2, [r5, #4] + lsls r6, r6, #2 + bl printk + mov r3, #256 + movs r2, #4 + add r1, r9, r6 + ldr r0, .L3766+44 + bl rknand_print_hex + ldr r1, [sp, #8] + mov r3, #256 + movs r2, #4 + ldr r0, .L3766+48 + add r1, r1, r6 + bl rknand_print_hex + movs r0, #0 + bl flash_boot_enter_slc_mode + ldr r1, [r5, #4] + movs r2, #0 + ldr r3, [sp, #12] + mov r0, r2 + muls r1, r3, r1 + bl FlashEraseBlock + ldr r3, [sp, #32] + cmp r3, #1 + bls .L3738 + ldr r1, [r5, #4] + movs r2, #0 + ldr r3, [sp, #12] + mov r0, r2 + mla r1, r1, r3, r3 + bl FlashEraseBlock +.L3738: + movs r0, #0 + bl flash_boot_exit_slc_mode + ldr r1, [r5, #4] + ldr r0, .L3766+52 + bl printk +.L3726: + ldr r3, [sp, #16] + adds r5, r5, #4 + adds r3, r3, #1 + cmp r3, #5 + str r3, [sp, #16] + bne .L3741 + ldr r0, [sp, #8] + bl ftl_free + ldr r3, [sp, #20] + clz r0, r3 + lsrs r0, r0, #5 + negs r0, r0 +.L3718: + add sp, sp, #124 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L3743: + mov fp, #8 + b .L3720 +.L3721: + ldr r0, .L3766+56 + bl printk + b .L3723 +.L3746: + mov r8, #1 + b .L3728 +.L3767: + .align 2 +.L3766: + .word .LANCHOR0 + .word -52655045 + .word .LC174 + .word .LC175 + .word .LANCHOR4 + .word .LC176 + .word .LC177 + .word .LC178 + .word .LC179 + .word .LC180 + .word .LC181 + .word .LC182 + .word .LC183 + .word .LC184 + .word .LC173 +.L3733: + ldr r3, [sp, #28] + add r2, r3, r8 + lsrs r2, r2, #2 + beq .L3730 + ldrb r0, [r4, #152] @ zero_extendqisi2 + adds r1, r2, #1 + add r3, r4, r1, lsl #1 + ldrh r3, [r3, #156] + cbz r0, .L3731 + ldr r0, [r4, #2268] + ldr r7, .L3768 + cmp r0, r7 + it eq + moveq r3, r1 +.L3731: + add r3, r3, #1073741824 + subs r3, r3, #1 + lsls r3, r3, #2 + str r3, [sp, #56] +.L3730: + movw r3, #61424 + str r3, [sp, #60] + add r3, r4, r2, lsl #1 + ldrh r7, [r3, #156] + ldrb r3, [r4, #152] @ zero_extendqisi2 + cbz r3, .L3732 + ldr r3, [r4, #2268] + ldr r1, .L3768 + cmp r3, r1 + it eq + moveq r7, r2 +.L3732: + ldr r3, [sp, #36] + add r8, r8, #4 + ldr r2, .L3768+4 + uxth r8, r8 + mla r3, r7, r10, r3 + ldrb r0, [r2, #1218] @ zero_extendqisi2 + adds r7, r7, #1 + uxth r7, r7 + str r3, [sp, #52] + ldrb r3, [r4, #2316] @ zero_extendqisi2 + str r3, [sp, #48] + bl FlashBchSel + movs r0, #0 + bl flash_boot_enter_slc_mode + ldr r2, [r4, #48] + ldr r3, [sp, #52] + ldrb r1, [r2, #9] @ zero_extendqisi2 + mov r0, r3 + bl __aeabi_uidiv + add r3, sp, #56 + ldr r2, [sp, #24] + mov r1, r0 + movs r0, #0 + bl FlashProgPage + movs r0, #0 + bl flash_boot_exit_slc_mode + ldr r0, [sp, #48] + bl FlashBchSel + mov r1, r10 + ldr r0, [sp, #36] + bl __aeabi_uidiv + mov r2, r7 + mov r1, r0 + movs r0, #0 + bl FlashPageProgMsbFFData + ldr r3, [sp, #24] + add r3, r3, #2048 + str r3, [sp, #24] + b .L3729 +.L3736: + rsb r7, r3, #4 + ldrb r0, [r4, #152] @ zero_extendqisi2 + uxth r2, r7 + str r2, [sp, #36] + ldr r2, [sp, #28] + add r2, r2, r8 + lsrs r2, r2, #2 + add r1, r4, r2, lsl #1 + ldrh r1, [r1, #156] + cbz r0, .L3735 + ldr r0, [r4, #2268] + ldr r7, .L3768 + cmp r0, r7 + it eq + moveq r1, r2 +.L3735: + ldr r2, [sp, #44] + add r3, r3, r2 + ldr r2, [sp, #24] + mla r3, r1, r2, r3 + ldr r2, [r4, #48] + ldrb r1, [r2, #9] @ zero_extendqisi2 + ldr r2, .L3768+4 + str r3, [sp, #52] + ldrb r3, [r4, #2316] @ zero_extendqisi2 + ldrb r0, [r2, #1218] @ zero_extendqisi2 + str r1, [sp, #48] + mov r7, r3 + bl FlashBchSel + movs r0, #0 + bl flash_boot_enter_slc_mode + ldr r3, [sp, #52] + ldr r1, [sp, #48] + mov r0, r3 + bl __aeabi_uidiv + movs r3, #0 + mov r2, r10 + mov r1, r0 + mov r0, r3 + bl FlashReadPage + movs r0, #0 + bl flash_boot_exit_slc_mode + mov r0, r7 + bl FlashBchSel + ldr r3, [sp, #36] + add r8, r8, r3 + add r10, r10, r3, lsl #9 + uxth r8, r8 + movs r3, #0 + b .L3734 +.L3737: + ldr r2, [sp, #40] + adds r6, r6, #1 + cmp r2, r6 + bne .L3739 + ldr r3, [sp, #20] + adds r3, r3, #1 + str r3, [sp, #20] + b .L3726 +.L3745: + mov r0, #-1 + b .L3718 +.L3769: + .align 2 +.L3768: + .word 1446522928 + .word .LANCHOR4 + .fnend + .size write_idblock, .-write_idblock + .align 1 + .global write_loader_lba + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type write_loader_lba, %function +write_loader_lba: + .fnstart + @ args = 0, pretend = 0, frame = 40 + @ frame_needed = 0, uses_anonymous_args = 0 + cmp r0, #64 + push {r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + mov r5, r0 + .pad #48 + sub sp, sp, #48 + mov r6, r1 + mov r8, r2 + ldr r4, .L3793 + bne .L3771 + ldr r2, [r2] + ldr r3, .L3793+4 + cmp r2, r3 + bne .L3771 + movs r3, #1 + mov r0, #256000 + strb r3, [r4, #1516] + bl ftl_malloc + mov r2, #256000 + movs r1, #0 + str r0, [r4, #1520] + bl ftl_memset + str r5, [r4, #1524] +.L3771: + str r6, [sp] + mov r3, r5 + ldr r2, [r8] + ldr r1, [r4, #1520] + ldr r0, .L3793+8 + bl printk + ldrb r3, [r4, #1516] @ zero_extendqisi2 + cmp r3, #0 + beq .L3770 + sub r0, r5, #64 + ldr r7, [r4, #1520] + cmp r0, #500 + bcs .L3773 + rsb r2, r5, #564 + mov r1, r8 + cmp r2, r6 + add r0, r7, r0, lsl #9 + it cs + movcs r2, r6 + lsls r2, r2, #9 + bl ftl_memcpy +.L3774: + ldr r3, [r4, #1524] + cmp r5, r3 + beq .L3783 + movs r3, #0 + strb r3, [r4, #1516] + mov r8, r3 + cbz r7, .L3784 + mov r0, r7 + bl ftl_free +.L3784: + str r8, [r4, #1520] + b .L3783 +.L3773: + cmp r5, #564 + bcc .L3774 + ldr r3, .L3793+12 + ldr r0, [r4, #1524] + ldr r3, [r3, #48] + subs r0, r0, #64 + cmp r0, #500 + ldrb r3, [r3, #9] @ zero_extendqisi2 + it cs + movcs r0, #500 + cmp r3, #4 + beq .L3775 + movs r3, #2 + str r3, [sp, #8] + movs r3, #3 + str r3, [sp, #12] + movs r3, #4 + str r3, [sp, #16] + movs r3, #5 + str r3, [sp, #20] + movs r3, #6 + str r3, [sp, #24] +.L3776: + movw r3, #63872 +.L3782: + ldr r2, [r7, r3, lsl #2] + cbz r2, .L3780 + adds r3, r3, #128 + lsls r0, r3, #2 +.L3781: + mov r1, r7 + add r2, sp, #8 + movs r7, #0 + bl write_idblock + ldr r0, [r4, #1520] + strb r7, [r4, #1516] + bl ftl_free + str r7, [r4, #1520] +.L3783: + add r5, r5, r6 + str r5, [r4, #1524] +.L3770: + add sp, sp, #48 + @ sp needed + pop {r4, r5, r6, r7, r8, pc} +.L3775: + movs r2, #0 + add r3, sp, #8 +.L3779: + cmp r0, #256 + itet hi + lslhi r1, r2, #1 + strls r2, [r3, r2, lsl #2] + strhi r1, [r3, r2, lsl #2] + adds r2, r2, #1 + cmp r2, #5 + bne .L3779 + b .L3776 +.L3780: + subs r3, r3, #1 + cmp r3, #4096 + bne .L3782 + lsls r0, r0, #9 + b .L3781 +.L3794: + .align 2 +.L3793: + .word .LANCHOR4 + .word -52655045 + .word .LC185 + .word .LANCHOR0 + .fnend + .size write_loader_lba, .-write_loader_lba + .align 1 + .global FtlWrite + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type FtlWrite, %function +FtlWrite: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + mov r7, r3 + sub r3, r1, #64 + mov r5, r0 + cmp r3, #1984 + mov r4, r1 + mov r6, r2 + bcs .L3796 + cbnz r0, .L3796 + mov r2, r7 + mov r1, r6 + mov r0, r4 + bl write_loader_lba +.L3796: + mov r3, r7 + mov r2, r6 + mov r1, r4 + mov r0, r5 + pop {r4, r5, r6, r7, r8, lr} + b ftl_write + .fnend + .size FtlWrite, .-FtlWrite + .align 1 + .global rknand_sys_storage_ioctl + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type rknand_sys_storage_ioctl, %function +rknand_sys_storage_ioctl: + .fnstart + @ args = 0, pretend = 0, frame = 520 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L3856 + push {r4, r5, r6, r7, lr} + .save {r4, r5, r6, r7, lr} + mov r4, r1 + .pad #524 + sub sp, sp, #524 + mov r5, r2 + cmp r1, r3 + beq .L3799 + bhi .L3800 + subw r3, r3, #2086 + cmp r1, r3 + beq .L3801 + bhi .L3802 + subs r3, r3, #238 + cmp r1, r3 + beq .L3803 + adds r3, r3, #237 + cmp r1, r3 + beq .L3804 +.L3834: + mvn r4, #21 + b .L3797 +.L3802: + ldr r3, .L3856+4 + cmp r1, r3 + beq .L3805 + adds r3, r3, #1 + cmp r1, r3 + beq .L3806 + subs r3, r3, #124 + cmp r1, r3 + bne .L3834 + ldr r0, .L3856+8 + bl printk + mov r2, #520 + mov r1, r5 + mov r0, sp + bl rk_copy_from_user + cmp r0, #0 + bne .L3817 + ldr r2, [sp] + ldr r3, .L3856+12 + cmp r2, r3 + bne .L3814 + ldr r2, [sp, #4] + cmp r2, #512 + bhi .L3814 + ldr r1, .L3856+16 +.L3854: + add r0, sp, #8 + bl memcpy + b .L3848 +.L3800: + ldr r6, .L3856+20 + cmp r1, r6 + beq .L3808 + bhi .L3809 + ldr r3, .L3856+24 + cmp r1, r3 + beq .L3799 + adds r3, r3, #10 + cmp r1, r3 + bne .L3834 +.L3799: + ldr r7, .L3856+24 + cmp r4, r7 + bne .L3824 + ldr r0, .L3856+28 +.L3850: + bl printk + mov r2, #520 + mov r1, r5 + mov r0, sp + bl rk_copy_from_user + cmp r0, #0 + bne .L3817 + ldr r2, [sp] + ldr r3, .L3856+32 + cmp r2, r3 + bne .L3853 + ldr r3, .L3856+36 + ldr r6, .L3856+40 + cmp r4, r3 + bne .L3827 + ldr r3, [r6, #1528] + movs r2, #16 + mov r1, sp + mov r0, r5 + ldr r3, [r3, #20] + str r3, [sp, #4] + strb r3, [sp, #8] + bl rk_copy_to_user + cmp r0, #0 + bne .L3853 +.L3818: + movs r4, #0 +.L3797: + mov r0, r4 + add sp, sp, #524 + @ sp needed + pop {r4, r5, r6, r7, pc} +.L3809: + ldr r3, .L3856+44 + cmp r1, r3 + beq .L3808 + bcc .L3810 + adds r3, r3, #1 + cmp r1, r3 + bne .L3834 +.L3810: + ldr r0, .L3856+48 + bl printk + mov r2, #520 + mov r1, r5 + mov r0, sp + bl rk_copy_from_user + cbnz r0, .L3817 + ldr r2, [sp] + ldr r3, .L3856+52 + cmp r2, r3 + bne .L3814 + ldr r2, [sp, #4] + cmp r2, #504 + bhi .L3814 + ldr r3, .L3856+56 + mov r1, sp + adds r2, r2, #8 + cmp r4, r3 + ldr r4, .L3856+40 + bne .L3833 + ldr r0, [r4, #2060] + bl memcpy + ldr r1, [r4, #2060] + movs r0, #2 + b .L3851 +.L3804: + ldr r0, .L3856+60 + bl printk + mov r2, #520 + mov r1, r5 + mov r0, sp + bl rk_copy_from_user + cbz r0, .L3811 +.L3817: + ldr r0, .L3856+64 + bl printk +.L3853: + mvn r4, #13 + b .L3797 +.L3811: + ldr r2, [sp] + ldr r3, .L3856+68 + cmp r2, r3 + beq .L3812 +.L3814: + mov r4, #-1 +.L3813: + mov r1, r4 + ldr r0, .L3856+72 + bl printk + b .L3797 +.L3812: + ldr r3, [sp, #4] + cmp r3, #512 + bhi .L3814 + ldr r4, .L3856+40 + mov r2, #512 + mov r0, sp + ldr r1, [r4, #1528] + bl memcpy + ldr r2, [r4, #1532] + ldr r3, .L3856+76 + cmp r2, r3 + beq .L3815 + movs r1, #0 + movs r2, #128 + add r0, sp, #64 + str r1, [sp, #8] + str r1, [sp, #12] + bl memset +.L3815: + mov r2, #256 + movs r1, #0 + add r0, sp, r2 + str r1, [sp, #16] + bl memset +.L3848: + mov r2, #520 + mov r1, sp + mov r0, r5 + bl rk_copy_to_user + cmp r0, #0 + bne .L3853 +.L3852: + movs r4, #0 + b .L3813 +.L3801: + ldr r0, .L3856+80 + bl printk + mov r2, #520 + mov r1, r5 + mov r0, sp + bl rk_copy_from_user + cmp r0, #0 + bne .L3817 + ldr r2, [sp] + ldr r3, .L3856+68 + cmp r2, r3 + bne .L3814 + ldr r3, [sp, #4] + cmp r3, #512 + bhi .L3814 + ldr r2, .L3856+40 + ldr r3, .L3856+76 + ldr r1, [r2, #1532] + cmp r1, r3 + bne .L3835 + ldr r3, [sp, #12] + subs r1, r3, #1 + cmp r1, #127 + bhi .L3836 + ldr r4, [r2, #1528] + add r1, sp, #64 + str r3, [r4, #12] + add r0, r4, #64 + ldr r2, [sp, #12] + bl memcpy + mov r1, r4 + movs r0, #1 +.L3851: + bl StorageSysDataStore + mov r4, r0 + b .L3813 +.L3806: + ldr r0, .L3856+84 + bl printk + mov r2, #520 + mov r1, r5 + mov r0, sp + bl rk_copy_from_user + cmp r0, #0 + bne .L3817 + ldr r2, [sp] + ldr r3, .L3856+88 + cmp r2, r3 + bne .L3814 + ldr r3, [sp, #4] + cmp r3, #512 + bhi .L3814 + ldr r5, .L3856+40 + ldr r3, [r5, #1536] + cmp r3, #0 + beq .L3818 + ldr r3, [r5, #1540] + ldr r2, .L3856+92 + ldr r1, [r3] + cmp r1, r2 + beq .L3819 + str r2, [r3] + mov r2, #504 + ldr r3, [r5, #1540] + str r2, [r3, #4] + movs r2, #0 + str r2, [r3, #8] + str r2, [r3, #12] +.L3819: + ldr r1, [r5, #1540] + movs r4, #0 + mov r0, r4 + str r4, [r1, #16] + bl StorageSysDataStore + ldr r3, [r5, #1528] + ldr r2, .L3856+68 + ldr r1, [r3] + cmp r1, r2 + beq .L3820 + str r2, [r3] + mov r2, #504 + ldr r3, [r5, #1528] + str r2, [r3, #4] + str r4, [r3, #8] +.L3820: + ldr r6, [r5, #1528] + movs r4, #0 + movs r2, #128 + mov r1, r4 + str r4, [r6, #12] + add r0, r6, #64 + bl memset + mov r1, r6 + movs r0, #1 + bl StorageSysDataStore + str r4, [r5, #1536] + str r4, [r5, #1532] + b .L3813 +.L3857: + .align 2 +.L3856: + .word 1074031656 + .word 1074029694 + .word .LC191 + .word 1094995539 + .word .LANCHOR4+1544 + .word 1074034192 + .word 1074031666 + .word .LC192 + .word 1280262987 + .word 1074031676 + .word .LANCHOR4 + .word 1074034194 + .word .LC197 + .word 1145980246 + .word 1074034193 + .word .LC186 + .word .LC187 + .word 1263358532 + .word .LC198 + .word -1067903959 + .word .LC188 + .word .LC189 + .word 1112753220 + .word 1146313043 +.L3805: + ldr r0, .L3858 + bl printk + mov r2, #520 + mov r1, r5 + mov r0, sp + bl rk_copy_from_user + cmp r0, #0 + bne .L3817 + ldr r2, [sp] + ldr r3, .L3858+4 + cmp r2, r3 + bne .L3814 + ldr r3, [sp, #4] + cmp r3, #512 + bhi .L3814 + ldr r5, .L3858+8 + ldr r3, [r5, #1536] + cmp r3, #1 + beq .L3818 + ldr r2, [r5, #1540] + ldr r3, .L3858+12 + ldr r1, [r2] + cmp r1, r3 + beq .L3821 + str r3, [r2] + mov r2, #504 + ldr r3, [r5, #1540] + str r2, [r3, #4] + movs r2, #0 + str r2, [r3, #8] + str r2, [r3, #12] +.L3821: + ldr r1, [r5, #1540] + movs r3, #1 + movs r0, #0 + str r3, [r1, #16] + bl StorageSysDataStore + ldr r3, [r5, #1528] + ldr r2, .L3858+16 + ldr r1, [r3] + cmp r1, r2 + beq .L3822 + str r2, [r3] + mov r2, #504 + ldr r3, [r5, #1528] + str r2, [r3, #4] + movs r2, #0 + str r2, [r3, #8] +.L3822: + ldr r6, [r5, #1528] + movs r4, #0 + movs r2, #128 + mov r1, r4 + str r4, [r6, #12] + add r0, r6, #64 + bl memset + mov r1, r6 + movs r0, #1 + bl StorageSysDataStore + movs r3, #1 + str r3, [r5, #1536] + b .L3813 +.L3824: + ldr r3, .L3858+20 + cmp r4, r3 + ite eq + ldreq r0, .L3858+24 + ldrne r0, .L3858+28 + b .L3850 +.L3827: + ldr r3, [r6, #2056] + cmp r3, #10 + bhi .L3853 + ldr r3, [r6, #1528] + ldr r1, [sp, #4] + ldr r2, [r3, #24] + cmp r2, r1 + beq .L3828 + cbz r2, .L3828 + ldr r0, .L3858+32 + bl printk + ldr r3, [r6, #2056] + adds r3, r3, #1 + str r3, [r6, #2056] + b .L3853 +.L3828: + cmp r4, r7 + mov r2, #0 + str r2, [r6, #2056] + itt ne + movne r2, #1 + strne r1, [r3, #24] + mov r0, #1 + it eq + streq r2, [r3, #20] + mov r1, r3 + ite eq + streq r2, [r3, #24] + strne r2, [r3, #20] + bl StorageSysDataStore + adds r0, r0, #1 + bne .L3852 + mvn r4, #1 + b .L3813 +.L3808: + ldr r0, .L3858+36 + bl printk + mov r2, #520 + mov r1, r5 + mov r0, sp + bl rk_copy_from_user + cmp r0, #0 + bne .L3817 + ldr r2, [sp] + ldr r3, .L3858+40 + cmp r2, r3 + bne .L3814 + ldr r2, [sp, #4] + cmp r2, #504 + bhi .L3814 + ldr r3, .L3858+8 + cmp r4, r6 + ite eq + ldreq r1, [r3, #2060] + ldrne r1, [r3, #2064] + adds r1, r1, #8 + b .L3854 +.L3833: + ldr r0, [r4, #2064] + bl memcpy + ldr r1, [r4, #2064] + movs r0, #3 + b .L3851 +.L3803: + bl rknand_dev_flush + b .L3852 +.L3835: + mvn r4, #1 + b .L3797 +.L3836: + mvn r4, #2 + b .L3797 +.L3859: + .align 2 +.L3858: + .word .LC190 + .word 1112755781 + .word .LANCHOR4 + .word 1146313043 + .word 1263358532 + .word 1074031676 + .word .LC193 + .word .LC194 + .word .LC195 + .word .LC196 + .word 1145980246 + .fnend + .size rknand_sys_storage_ioctl, .-rknand_sys_storage_ioctl + .align 1 + .global rk_ftl_storage_sys_init + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type rk_ftl_storage_sys_init, %function +rk_ftl_storage_sys_init: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r3, r4, r5, r6, r7, lr} + .save {r3, r4, r5, r6, r7, lr} + mov r3, #-1 + ldr r4, .L3869 + movs r5, #0 + mov r2, #512 + ldr r1, [r4, #1500] + add r0, r4, #1544 + str r3, [r4, #1524] + strb r5, [r4, #1516] + add r3, r1, #512 + str r1, [r4, #1540] + str r3, [r4, #1528] + add r3, r1, #1024 + add r1, r1, #1536 + str r3, [r4, #2060] + str r5, [r4, #1520] + str r5, [r4, #2068] + str r1, [r4, #2064] + bl ftl_memcpy + ldr r6, [r4, #1540] + str r5, [r4, #1532] + str r5, [r4, #2056] + ldr r7, [r6, #508] + ldr r3, [r6, #16] + str r3, [r4, #1536] + cbz r7, .L3861 + mov r1, #508 + mov r0, r6 + bl js_hash + cmp r7, r0 + beq .L3861 + str r5, [r6, #16] + ldr r0, .L3869+4 + str r5, [r4, #1536] + bl printk +.L3861: + ldr r3, [r4, #1536] + cbz r3, .L3862 + ldr r3, .L3869+8 + str r3, [r4, #1532] +.L3862: + ldr r1, [r4, #2060] + movs r0, #2 + bl StorageSysDataLoad + ldr r1, [r4, #2064] + movs r0, #3 + bl StorageSysDataLoad + pop {r3, r4, r5, r6, r7, lr} + b rknand_sys_storage_init +.L3870: + .align 2 +.L3869: + .word .LANCHOR4 + .word .LC199 + .word -1067903959 + .fnend + .size rk_ftl_storage_sys_init, .-rk_ftl_storage_sys_init + .align 1 + .global StorageSysDataDeInit + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type StorageSysDataDeInit, %function +StorageSysDataDeInit: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + movs r0, #0 + bx lr + .fnend + .size StorageSysDataDeInit, .-StorageSysDataDeInit + .align 1 + .global rk_ftl_vendor_storage_init + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type rk_ftl_vendor_storage_init, %function +rk_ftl_vendor_storage_init: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r0, #65536 + ldr r6, .L3880 + bl ftl_malloc + str r0, [r6, #2072] + cmp r0, #0 + beq .L3878 + ldr r10, .L3880+4 + mov r8, #0 + ldr r9, .L3880+8 + mov r4, r8 + mov r7, r8 +.L3876: + ldr r2, [r6, #2072] + movs r1, #128 + lsls r0, r7, #7 + bl FlashBootVendorRead + cmp r0, #0 + bne .L3874 + ldr r1, [r6, #2072] + movw fp, #65532 + mov r0, r10 + ldr r3, [r1, #4] + ldr r2, [r1, fp] + ldr r1, [r1] + bl printk + ldr r5, [r6, #2072] + ldr r3, [r5] + cmp r3, r9 + bne .L3875 + ldr r3, [r5, fp] + ldr r2, [r5, #4] + cmp r3, r2 + bne .L3875 + cmp r3, r4 + itt hi + movhi r8, r7 + movhi r4, r3 +.L3875: + adds r7, r7, #1 + cmp r7, #2 + bne .L3876 + cbz r4, .L3877 + mov r2, r5 + movs r1, #128 + lsl r0, r8, #7 + bl FlashBootVendorRead + cbnz r0, .L3874 + pop {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L3877: + mov r2, #65536 + mov r1, r4 + mov r0, r5 + bl memset + movs r3, #1 + movw r2, #65532 + str r3, [r5, #4] + mov r0, r4 + str r9, [r5] + str r3, [r5, r2] + movw r3, #64504 + strh r4, [r5, #12] @ movhi + strh r3, [r5, #14] @ movhi + pop {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L3874: + ldr r0, [r6, #2072] + bl kfree + movs r3, #0 + mov r0, #-1 + str r3, [r6, #2072] + pop {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L3878: + mvn r0, #11 + pop {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L3881: + .align 2 +.L3880: + .word .LANCHOR4 + .word .LC200 + .word 1380668996 + .fnend + .size rk_ftl_vendor_storage_init, .-rk_ftl_vendor_storage_init + .align 1 + .global rk_ftl_vendor_read + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type rk_ftl_vendor_read, %function +rk_ftl_vendor_read: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r3, r4, r5, r6, r7, lr} + .save {r3, r4, r5, r6, r7, lr} + mov r7, r0 + ldr r3, .L3888 + mov r0, r1 + ldr r5, [r3, #2072] + cbz r5, .L3887 + ldrh r6, [r5, #10] + movs r3, #0 +.L3884: + cmp r3, r6 + bcc .L3886 +.L3887: + mov r0, #-1 + pop {r3, r4, r5, r6, r7, pc} +.L3886: + add r1, r5, r3, lsl #3 + ldrh r4, [r1, #16] + cmp r4, r7 + bne .L3885 + ldrh r4, [r1, #20] + ldrh r1, [r1, #18] + cmp r4, r2 + it cs + movcs r4, r2 + add r1, r1, #1024 + mov r2, r4 + add r1, r1, r5 + bl memcpy + mov r0, r4 + pop {r3, r4, r5, r6, r7, pc} +.L3885: + adds r3, r3, #1 + b .L3884 +.L3889: + .align 2 +.L3888: + .word .LANCHOR4 + .fnend + .size rk_ftl_vendor_read, .-rk_ftl_vendor_read + .align 1 + .global rk_ftl_vendor_write + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type rk_ftl_vendor_write, %function +rk_ftl_vendor_write: + .fnstart + @ args = 0, pretend = 0, frame = 24 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r8, r2 + ldr r2, .L3910 + .pad #28 + sub sp, sp, #28 + mov r3, r1 + ldr r4, [r2, #2072] + cmp r4, #0 + beq .L3905 + ldrh r2, [r4, #10] + add r6, r8, #63 + ldrh r1, [r4, #8] + bic r6, r6, #63 + movs r7, #0 + str r1, [sp, #4] +.L3892: + cmp r7, r2 + bcc .L3900 + ldrh r1, [r4, #14] + cmp r6, r1 + bhi .L3905 + add r2, r4, r2, lsl #3 + uxth r6, r6 + strh r0, [r2, #16] @ movhi + ldrh r0, [r4, #12] + strh r8, [r2, #20] @ movhi + strh r0, [r2, #18] @ movhi + add r0, r0, r6 + subs r6, r1, r6 + strh r0, [r4, #12] @ movhi + strh r6, [r4, #14] @ movhi + mov r1, r3 + ldrh r0, [r2, #18] + mov r2, r8 + add r0, r0, #1024 + add r0, r0, r4 + bl memcpy + ldrh r3, [r4, #10] + adds r3, r3, #1 + strh r3, [r4, #10] @ movhi + b .L3909 +.L3900: + add r5, r4, r7, lsl #3 + ldrh r1, [r5, #16] + cmp r1, r0 + str r1, [sp, #8] + bne .L3893 + ldrh r1, [r5, #20] + add fp, r4, #1024 + adds r1, r1, #63 + bic r1, r1, #63 + cmp r8, r1 + str r1, [sp, #12] + bls .L3894 + ldrh r1, [r4, #14] + cmp r6, r1 + bhi .L3905 + ldrh r10, [r5, #18] + subs r2, r2, #1 + str r2, [sp, #16] +.L3895: + ldr r2, [sp, #16] + adds r5, r5, #8 + cmp r7, r2 + bcc .L3896 + ldrh r2, [sp, #8] + add r7, r4, r7, lsl #3 + uxth r5, r10 + mov r1, r3 + strh r8, [r7, #20] @ movhi + uxtah r0, fp, r10 + strh r2, [r7, #16] @ movhi + mov r2, r8 + strh r5, [r7, #18] @ movhi + bl memcpy + uxth r3, r6 + ldrh r6, [r4, #14] + add r5, r5, r3 + subs r6, r6, r3 + ldr r3, [sp, #12] + strh r5, [r4, #12] @ movhi + add r6, r6, r3 + strh r6, [r4, #14] @ movhi +.L3909: + ldr r3, [r4, #4] + movw r2, #65532 + movs r1, #128 + adds r3, r3, #1 + str r3, [r4, #4] + str r3, [r4, r2] + mov r2, r4 + ldrh r3, [r4, #8] + adds r3, r3, #1 + uxth r3, r3 + cmp r3, #1 + it hi + movhi r3, #0 + strh r3, [r4, #8] @ movhi + ldr r3, [sp, #4] + lsls r0, r3, #7 + bl FlashBootVendorWrite + movs r0, #0 +.L3890: + add sp, sp, #28 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L3896: + ldrh r9, [r5, #20] + add r0, fp, r10 + ldrh r2, [r5, #16] + adds r7, r7, #1 + ldrh r1, [r5, #18] + strh r9, [r5, #12] @ movhi + add r9, r9, #63 + bic r9, r9, #63 + strh r2, [r5, #8] @ movhi + strh r10, [r5, #10] @ movhi + mov r2, r9 + add r1, r1, fp + str r3, [sp, #20] + add r10, r10, r9 + bl memcpy + ldr r3, [sp, #20] + b .L3895 +.L3894: + ldrh r0, [r5, #18] + mov r2, r8 + mov r1, r3 + add r0, r0, fp + bl memcpy + strh r8, [r5, #20] @ movhi + b .L3909 +.L3893: + adds r7, r7, #1 + b .L3892 +.L3905: + mov r0, #-1 + b .L3890 +.L3911: + .align 2 +.L3910: + .word .LANCHOR4 + .fnend + .size rk_ftl_vendor_write, .-rk_ftl_vendor_write + .align 1 + .global rk_ftl_vendor_storage_ioctl + .syntax unified + .thumb + .thumb_func + .fpu softvfp + .type rk_ftl_vendor_storage_ioctl, %function +rk_ftl_vendor_storage_ioctl: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + mov r0, #4096 + mov r6, r1 + mov r5, r2 + bl ftl_malloc + mov r4, r0 + cmp r0, #0 + beq .L3920 + ldr r3, .L3927 + cmp r6, r3 + beq .L3915 + adds r3, r3, #1 + cmp r6, r3 + beq .L3916 +.L3926: + mvn r5, #13 + b .L3914 +.L3915: + movs r2, #8 + mov r1, r5 + bl rk_copy_from_user + cmp r0, #0 + bne .L3926 + ldr r2, [r4] + ldr r3, .L3927+4 + cmp r2, r3 + beq .L3918 +.L3919: + mov r5, #-1 +.L3914: + mov r0, r4 + bl kfree +.L3912: + mov r0, r5 + pop {r4, r5, r6, pc} +.L3918: + ldrh r2, [r4, #6] + add r1, r4, #8 + ldrh r0, [r4, #4] + bl rk_ftl_vendor_read + adds r3, r0, #1 + beq .L3919 + uxth r2, r0 + strh r0, [r4, #6] @ movhi + mov r1, r4 + adds r2, r2, #8 + mov r0, r5 + bl rk_copy_to_user + cmp r0, #0 + bne .L3926 +.L3922: + mov r5, r0 + b .L3914 +.L3916: + movs r2, #8 + mov r1, r5 + bl rk_copy_from_user + cmp r0, #0 + bne .L3926 + ldr r2, [r4] + ldr r3, .L3927+4 + cmp r2, r3 + bne .L3919 + ldrh r2, [r4, #6] + movw r3, #4087 + cmp r2, r3 + bhi .L3919 + adds r2, r2, #8 + mov r1, r5 + mov r0, r4 + bl rk_copy_from_user + cmp r0, #0 + bne .L3926 + ldrh r2, [r4, #6] + add r1, r4, #8 + ldrh r0, [r4, #4] + bl rk_ftl_vendor_write + b .L3922 +.L3920: + mov r5, #-1 + b .L3912 +.L3928: + .align 2 +.L3927: + .word 1074034177 + .word 1448232273 + .fnend + .size rk_ftl_vendor_storage_ioctl, .-rk_ftl_vendor_storage_ioctl + .global SecureBootUnlockTryCount + .global SecureBootCheckOK + .global SecureBootEn + .global gpVendor1Info + .global gpVendor0Info + .global g_idb_buffer + .global gSnSectorData + .global gpDrmKeyInfo + .global gpBootConfig + .global ftl_dma32_buffer_size + .global ftl_dma32_buffer + .global gLoaderBootInfo + .global RK29_NANDC1_REG_BASE + .global RK29_NANDC_REG_BASE + .global gc_ink_free_return_value + .global check_valid_page_count_table + .global FtlUpdateVaildLpnCount + .global g_ect_tbl_power_up_flush + .global last_cache_match_count + .global power_up_flag + .global g_LowFormat + .global gFtlInitStatus + .global DeviceCapacity + .global ToshibaRefValue + .global Toshiba15RefValue + .global ToshibaA19RefValue + .global SamsungRefValue + .global refValueDefault + .global FbbtBlk + .global random_seed + .global gSlcNandParaInfo + .global gNandParaInfo + .global g_page_map_check_enable + .global g_power_lost_ecc_error_blk + .global g_power_lost_recovery_flag + .global c_mlc_erase_count_value + .global g_recovery_ppa_tbl + .global g_recovery_page_min_ver + .global g_recovery_page_num + .global g_cur_erase_blk + .global g_gc_skip_write_count + .global g_gc_head_data_block_count + .global g_gc_head_data_block + .global g_ftl_nand_free_count + .global g_in_swl_replace + .global g_in_gc_progress + .global g_all_blk_used_slc_mode + .global g_max_erase_count + .global g_totle_sys_slc_erase_count + .global g_totle_slc_erase_count + .global g_min_erase_count + .global g_totle_avg_erase_count + .global g_totle_mlc_erase_count + .global g_totle_l2p_write_count + .global g_totle_cache_write_count + .global g_tmp_data_superblock_id + .global g_totle_read_page_count + .global g_totle_discard_page_count + .global g_totle_read_sector + .global g_totle_write_sector + .global g_totle_write_page_count + .global g_totle_gc_page_count + .global g_gc_blk_index + .global g_gc_merge_free_blk_threshold + .global g_gc_free_blk_threshold + .global g_gc_refresh_block_temp_tbl + .global g_free_slc_blk_num + .global g_gc_refresh_block_temp_num + .global g_gc_bad_block_temp_tbl + .global g_gc_bad_block_gc_index + .global g_gc_bad_block_temp_num + .global g_gc_next_blk_3 + .global g_gc_next_blk_2 + .global g_gc_next_blk_1 + .global g_gc_next_blk + .global g_gc_cur_blk_max_valid_pages + .global g_gc_cur_blk_valid_pages + .global g_gc_page_offset + .global g_gc_blk_num + .global p_gc_blk_tbl + .global p_gc_page_info + .global g_sys_ext_data + .global g_sys_save_data + .global gp_last_act_superblock + .global g_gc_superblock + .global g_gc_temp_superblock + .global g_buffer_superblock + .global g_active_superblock + .global g_num_data_superblocks + .global g_num_free_superblocks + .global p_data_block_list_tail + .global p_data_block_list_head + .global p_free_data_block_list_head + .global p_data_block_list_table + .global g_l2p_last_update_region_id + .global p_l2p_map_buf + .global p_l2p_ram_map + .global g_totle_vendor_block + .global p_vendor_region_ppn_table + .global p_vendor_block_ver_table + .global p_vendor_block_valid_page_count + .global p_vendor_block_table + .global g_totle_map_block + .global p_map_region_ppn_check_table + .global p_map_region_ppn_table + .global p_map_block_ver_table + .global p_map_block_valid_page_count + .global p_map_block_table + .global p_blk_mode_table + .global p_valid_page_count_check_table + .global p_valid_page_count_table + .global g_totle_swl_count + .global p_swl_mul_table + .global p_erase_count_table + .global g_ect_tbl_info_size + .global gp_ect_tbl_info + .global g_gc_num_req + .global c_gc_page_buf_num + .global gp_gc_page_buf_info + .global p_gc_data_buf + .global p_gc_spare_buf + .global p_io_spare_buf + .global p_io_data_buf_1 + .global p_io_data_buf_0 + .global p_sys_spare_buf + .global p_vendor_data_buf + .global p_sys_data_buf_1 + .global p_sys_data_buf + .global g_wr_page_num + .global req_wr_io + .global c_wr_page_buf_num + .global p_wr_io_data_buf + .global p_wr_io_spare_buf + .global p_plane_order_table + .global g_req_cache + .global req_gc_dst + .global req_gc + .global req_erase + .global req_prgm + .global req_read + .global req_sys + .global gVendorBlkInfo + .global gL2pMapInfo + .global gSysFreeQueue + .global gSysInfo + .global gBbtInfo + .global g_flash_read_only_en + .global g_inkDie_check_enable + .global g_SlcPartLbaEndSector + .global g_MaxLbn + .global g_VaildLpn + .global g_MaxLpn + .global g_MaxLbaSector + .global g_GlobalDataVersion + .global g_GlobalSysVersion + .global ftl_gc_temp_power_lost_recovery_flag + .global c_ftl_nand_max_data_blks + .global c_ftl_nand_data_op_blks_per_plane + .global c_ftl_nand_data_blks_per_plane + .global c_ftl_nand_max_sys_blks + .global c_ftl_nand_init_sys_blks_per_plane + .global c_ftl_nand_sys_blks_per_plane + .global c_ftl_vendor_part_size + .global c_ftl_nand_max_vendor_blks + .global c_ftl_nand_max_map_blks + .global c_ftl_nand_map_blks_per_plane + .global c_ftl_nand_vendor_region_num + .global c_ftl_nand_l2pmap_ram_region_num + .global c_ftl_nand_map_region_num + .global c_ftl_nand_totle_phy_blks + .global c_ftl_nand_reserved_blks + .global c_ftl_nand_byte_pre_oob + .global c_ftl_nand_byte_pre_page + .global c_ftl_nand_sec_pre_page_shift + .global c_ftl_nand_sec_pre_page + .global c_ftl_nand_page_pre_super_blk + .global c_ftl_nand_page_pre_slc_blk + .global c_ftl_nand_page_pre_blk + .global c_ftl_nand_bbm_buf_size + .global c_ftl_nand_ext_blk_pre_plane + .global c_ftl_nand_blk_pre_plane + .global c_ftl_nand_planes_num + .global c_ftl_nand_blks_per_die + .global c_ftl_nand_planes_per_die + .global c_ftl_nand_die_num + .global c_ftl_nand_type + .global gMasterTempBuf + .global gMasterInfo + .global gNandcDumpWriteEn + .global gToggleModeClkDiv + .global gBootDdrMode + .global gNandcEccBits + .global gpNandc1 + .global gpNandc + .global g_nandc_version_data + .global gNandcVer + .global gNandChipMap + .global gNandIDataBuf + .global idb_flash_slc_mode + .global FlashDdrTunningReadCount + .global FlashWaitBusyScheduleEn + .global gNandPhyInfo + .global gFlashProgCheckSpareBuffer + .global gFlashProgCheckBuffer + .global gFlashSpareBuffer + .global gFlashPageBuffer1 + .global gFlashPageBuffer0 + .global gpFlashSaveInfo + .global gReadRetryInfo + .global gpNandParaInfo + .global gNandOptPara + .global g_nand_ecc_en + .global g_slc2KBNand + .global g_maxRetryCount + .global g_maxRegNum + .global g_retryMode + .global gNandIDBResBlkNumSaveInFlash + .global gNandIDBResBlkNum + .global gNandFlashResEndPageAddr + .global gNandFlashInfoBlockAddr + .global gNandFlashIdbBlockAddr + .global gNandFlashInfoBlockEcc + .global gNandFlashIDBEccBits + .global gNandFlashEccBits + .global gNandRandomizer + .global gBlockPageAlignSize + .global gTotleBlock + .global gNandMaxChip + .global gNandMaxDie + .global gFlashInterfaceMode + .global gFlashCurMode + .global gFlashSlcMode + .global gFlashOnfiModeEn + .global gFlashToggleModeEn + .global gFlashSdrModeEn + .global gMultiPageProgEn + .global gMultiPageReadEn + .global gpReadRetrial + .global mlcPageToSlcPageTbl + .global slcPageToMlcPageTbl + .global DieAddrs + .global gDieOp + .global DieCsIndex + .global IDByte + .global read_retry_cur_offset + .section .rodata + .set .LANCHOR3,. + 0 + .type __func__.23812, %object + .size __func__.23812, 11 +__func__.23812: + .ascii "FtlMemInit\000" + .type samsung_14nm_slc_rr, %object + .size samsung_14nm_slc_rr, 26 +samsung_14nm_slc_rr: + .byte 0 + .byte 10 + .byte -10 + .byte 20 + .byte -20 + .byte 30 + .byte -30 + .byte 40 + .byte -40 + .byte 50 + .byte -50 + .byte 60 + .byte -60 + .byte -70 + .byte -80 + .byte -90 + .byte -100 + .byte -110 + .byte -120 + .byte -9 + .byte 70 + .byte 80 + .byte 90 + .byte -125 + .byte -115 + .byte 100 + .type samsung_14nm_mlc_rr, %object + .size samsung_14nm_mlc_rr, 104 +samsung_14nm_mlc_rr: + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte -4 + .byte 3 + .byte -4 + .byte -6 + .byte 6 + .byte 0 + .byte 6 + .byte -10 + .byte -10 + .byte 4 + .byte -10 + .byte 16 + .byte 12 + .byte -4 + .byte 12 + .byte 8 + .byte -16 + .byte 10 + .byte -16 + .byte 24 + .byte 18 + .byte -14 + .byte 18 + .byte -4 + .byte -22 + .byte -16 + .byte -22 + .byte -8 + .byte 24 + .byte -9 + .byte 24 + .byte 8 + .byte -28 + .byte -4 + .byte -28 + .byte 16 + .byte 30 + .byte 10 + .byte 30 + .byte 10 + .byte -34 + .byte 6 + .byte -34 + .byte 0 + .byte 36 + .byte -8 + .byte 36 + .byte -8 + .byte -40 + .byte -2 + .byte -40 + .byte -20 + .byte -46 + .byte -4 + .byte -46 + .byte -30 + .byte 3 + .byte 0 + .byte 3 + .byte -3 + .byte -2 + .byte -4 + .byte -2 + .byte -6 + .byte -4 + .byte -4 + .byte -4 + .byte -10 + .byte -6 + .byte -8 + .byte -6 + .byte -14 + .byte -9 + .byte -8 + .byte -9 + .byte -18 + .byte -52 + .byte 22 + .byte -52 + .byte 10 + .byte 42 + .byte 4 + .byte 42 + .byte 4 + .byte 48 + .byte -9 + .byte 48 + .byte 4 + .byte -58 + .byte 12 + .byte -58 + .byte 0 + .byte -64 + .byte -24 + .byte -64 + .byte -6 + .byte 9 + .byte 18 + .byte 9 + .byte 8 + .type __func__.24591, %object + .size __func__.24591, 17 +__func__.24591: + .ascii "FtlDumpBlockInfo\000" + .type __func__.24610, %object + .size __func__.24610, 16 +__func__.24610: + .ascii "FtlScanAllBlock\000" + .type __func__.24878, %object + .size __func__.24878, 17 +__func__.24878: + .ascii "ftl_scan_all_ppa\000" + .type __func__.24559, %object + .size __func__.24559, 12 +__func__.24559: + .ascii "FtlCheckVpc\000" + .type __func__.24858, %object + .size __func__.24858, 21 +__func__.24858: + .ascii "FtlVpcCheckAndModify\000" + .type __func__.23885, %object + .size __func__.23885, 8 +__func__.23885: + .ascii "FtlInit\000" + .data + .align 2 + .set .LANCHOR1,. + 0 + .type random_seed, %object + .size random_seed, 256 +random_seed: + .short 22378 + .short 1512 + .short 25245 + .short 17827 + .short 25756 + .short 19440 + .short 9026 + .short 10030 + .short 29528 + .short 20467 + .short 29676 + .short 24432 + .short 31328 + .short 6872 + .short 13426 + .short 13842 + .short 8783 + .short 1108 + .short 782 + .short 28837 + .short 30729 + .short 9505 + .short 18676 + .short 23085 + .short 18730 + .short 1085 + .short 32609 + .short 14697 + .short 20858 + .short 15170 + .short 30365 + .short 1607 + .short 32298 + .short 4995 + .short 18905 + .short 1976 + .short 9592 + .short 20204 + .short 17443 + .short 13615 + .short 23330 + .short 29369 + .short 13947 + .short 9398 + .short 32398 + .short 8984 + .short 27600 + .short 21785 + .short 6019 + .short 6311 + .short 31598 + .short 30210 + .short 19327 + .short 13896 + .short 11347 + .short 27545 + .short 3107 + .short 26575 + .short 32270 + .short 19852 + .short 20601 + .short 8349 + .short 9290 + .short 29819 + .short 13579 + .short 3661 + .short 28676 + .short 27331 + .short 32574 + .short 8693 + .short 31253 + .short 9081 + .short 5399 + .short 6842 + .short 20087 + .short 5537 + .short 1274 + .short 11617 + .short 9530 + .short 4866 + .short 8035 + .short 23219 + .short 1178 + .short 23272 + .short 7383 + .short 18944 + .short 12488 + .short 12871 + .short 29340 + .short 20532 + .short 11022 + .short 22514 + .short 228 + .short 22363 + .short 24978 + .short 14584 + .short 12138 + .short 3092 + .short 17916 + .short 16863 + .short 14554 + .short 31457 + .short 29474 + .short 25311 + .short 24121 + .short 3684 + .short 28037 + .short 22865 + .short 22839 + .short 25217 + .short 13217 + .short 27186 + .short 14938 + .short 11180 + .short 29754 + .short 24180 + .short 15150 + .short 32455 + .short 20434 + .short 23848 + .short 29983 + .short 16120 + .short 14769 + .short 20041 + .short 29803 + .short 28406 + .short 17598 + .short 28087 + .type ToshibaA19RefValue, %object + .size ToshibaA19RefValue, 45 +ToshibaA19RefValue: + .byte 4 + .byte 5 + .byte 6 + .byte 7 + .byte 13 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 4 + .byte 4 + .byte 124 + .byte 126 + .byte 0 + .byte 0 + .byte 124 + .byte 120 + .byte 120 + .byte 0 + .byte 124 + .byte 118 + .byte 116 + .byte 114 + .byte 0 + .byte 8 + .byte 8 + .byte 0 + .byte 0 + .byte 0 + .byte 11 + .byte 126 + .byte 118 + .byte 116 + .byte 0 + .byte 16 + .byte 118 + .byte 114 + .byte 112 + .byte 0 + .byte 2 + .byte 0 + .byte 126 + .byte 124 + .byte 0 + .type Toshiba15RefValue, %object + .size Toshiba15RefValue, 95 +Toshiba15RefValue: + .byte 4 + .byte 5 + .byte 6 + .byte 7 + .byte 13 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 2 + .byte 4 + .byte 2 + .byte 0 + .byte 0 + .byte 8 + .byte 8 + .byte 0 + .byte 0 + .byte 0 + .byte 124 + .byte 0 + .byte 124 + .byte 124 + .byte 0 + .byte 122 + .byte 0 + .byte 122 + .byte 122 + .byte 0 + .byte 11 + .byte 126 + .byte 118 + .byte 116 + .byte 0 + .byte 120 + .byte 2 + .byte 120 + .byte 122 + .byte 0 + .byte 126 + .byte 4 + .byte 126 + .byte 122 + .byte 0 + .byte 16 + .byte 118 + .byte 114 + .byte 112 + .byte 0 + .byte 118 + .byte 4 + .byte 118 + .byte 120 + .byte 0 + .byte 4 + .byte 4 + .byte 4 + .byte 118 + .byte 0 + .byte 2 + .byte 0 + .byte 126 + .byte 124 + .byte 0 + .byte 6 + .byte 10 + .byte 6 + .byte 2 + .byte 0 + .byte 116 + .byte 124 + .byte 116 + .byte 118 + .byte 0 + .byte 4 + .byte 4 + .byte 124 + .byte 126 + .byte 0 + .byte 0 + .byte 124 + .byte 120 + .byte 120 + .byte 0 + .byte 124 + .byte 118 + .byte 116 + .byte 114 + .byte 0 + .type ToshibaRefValue, %object + .size ToshibaRefValue, 8 +ToshibaRefValue: + .byte 0 + .byte 4 + .byte 124 + .byte 120 + .byte 116 + .byte 8 + .byte 12 + .byte 112 + .type SamsungRefValue, %object + .size SamsungRefValue, 64 +SamsungRefValue: + .byte -89 + .byte -92 + .byte -91 + .byte -90 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 5 + .byte 10 + .byte 0 + .byte 0 + .byte 40 + .byte 0 + .byte -20 + .byte -40 + .byte -19 + .byte -11 + .byte -19 + .byte -26 + .byte 10 + .byte 15 + .byte 5 + .byte 0 + .byte 15 + .byte 10 + .byte -5 + .byte -20 + .byte -24 + .byte -17 + .byte -24 + .byte -36 + .byte -15 + .byte -5 + .byte -2 + .byte -16 + .byte 10 + .byte 0 + .byte -5 + .byte -20 + .byte -48 + .byte -30 + .byte -48 + .byte -62 + .byte 20 + .byte 15 + .byte -5 + .byte -20 + .byte -24 + .byte -5 + .byte -24 + .byte -36 + .byte 30 + .byte 20 + .byte -5 + .byte -20 + .byte -5 + .byte -1 + .byte -5 + .byte -8 + .byte 7 + .byte 12 + .byte 2 + .byte 0 + .type gNandParaInfo, %object + .size gNandParaInfo, 32 +gNandParaInfo: + .byte 0 + .byte 0 + .space 5 + .byte 0 + .byte 1 + .byte 8 + .short 128 + .byte 2 + .byte 1 + .short 2048 + .short 0 + .byte 1 + .byte 0 + .byte 24 + .byte 32 + .byte 1 + .byte 0 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .type gFtlInitStatus, %object + .size gFtlInitStatus, 4 +gFtlInitStatus: + .word -1 + .type NandFlashParaTbl, %object + .size NandFlashParaTbl, 2752 +NandFlashParaTbl: + .byte 6 + .byte 44 + .byte 100 + .byte 68 + .byte 75 + .byte -87 + .byte 0 + .byte 4 + .byte 1 + .byte 16 + .short 256 + .byte 2 + .byte 2 + .short 2048 + .short 479 + .byte 3 + .byte 17 + .byte 40 + .byte 32 + .byte 1 + .byte 0 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte 44 + .byte 68 + .byte 68 + .byte 75 + .byte -87 + .byte 0 + .byte 4 + .byte 1 + .byte 16 + .short 256 + .byte 2 + .byte 2 + .short 1064 + .short 479 + .byte 3 + .byte 17 + .byte 40 + .byte 32 + .byte 1 + .byte 0 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte 44 + .byte 104 + .byte 4 + .byte 74 + .byte -87 + .byte 0 + .byte 4 + .byte 1 + .byte 8 + .short 256 + .byte 2 + .byte 2 + .short 2048 + .short 287 + .byte 1 + .byte 0 + .byte 24 + .byte 32 + .byte 1 + .byte 0 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 5 + .byte 44 + .byte -120 + .byte 4 + .byte 75 + .byte -87 + .byte 0 + .byte 4 + .byte 1 + .byte 16 + .short 256 + .byte 2 + .byte 2 + .short 2048 + .short 287 + .byte 1 + .byte 0 + .byte 24 + .byte 32 + .byte 1 + .byte 0 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte 44 + .byte -88 + .byte 5 + .byte -53 + .byte -87 + .byte 0 + .byte 4 + .byte 2 + .byte 16 + .short 256 + .byte 2 + .byte 2 + .short 2048 + .short 287 + .byte 1 + .byte 0 + .byte 24 + .byte 32 + .byte 1 + .byte 0 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte 44 + .byte 104 + .byte 4 + .byte 70 + .byte -119 + .byte 0 + .byte 4 + .byte 1 + .byte 8 + .short 256 + .byte 2 + .byte 2 + .short 2048 + .short 287 + .byte 1 + .byte 0 + .byte 24 + .byte 32 + .byte 1 + .byte 0 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte 44 + .byte 72 + .byte 4 + .byte 74 + .byte -91 + .byte 0 + .byte 4 + .byte 1 + .byte 8 + .short 256 + .byte 2 + .byte 2 + .short 1024 + .short 287 + .byte 1 + .byte 0 + .byte 24 + .byte 32 + .byte 1 + .byte 0 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte 44 + .byte -124 + .byte 100 + .byte 60 + .byte -91 + .byte 0 + .byte 4 + .byte 1 + .byte 32 + .short 512 + .byte 2 + .byte 2 + .short 1024 + .short 479 + .byte 3 + .byte 17 + .byte 40 + .byte 32 + .byte 1 + .byte 0 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 5 + .byte 44 + .byte -124 + .byte 100 + .byte 84 + .byte -87 + .byte 0 + .byte 4 + .byte 1 + .byte 32 + .short 512 + .byte 2 + .byte 2 + .short 1024 + .short 479 + .byte 4 + .byte 18 + .byte 60 + .byte 32 + .byte 1 + .byte 0 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte 44 + .byte -41 + .byte -108 + .byte 62 + .byte -124 + .byte 0 + .byte 4 + .byte 1 + .byte 8 + .short 128 + .byte 2 + .byte 2 + .short 4096 + .short 279 + .byte 1 + .byte 0 + .byte 24 + .byte 32 + .byte 1 + .byte 0 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte 44 + .byte 72 + .byte 4 + .byte 70 + .byte -123 + .byte 0 + .byte 4 + .byte 1 + .byte 8 + .short 256 + .byte 2 + .byte 2 + .short 1024 + .short 287 + .byte 1 + .byte 0 + .byte 24 + .byte 32 + .byte 1 + .byte 0 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte 44 + .byte -120 + .byte 5 + .byte -58 + .byte -119 + .byte 0 + .byte 4 + .byte 2 + .byte 8 + .short 256 + .byte 2 + .byte 2 + .short 2048 + .short 287 + .byte 1 + .byte 0 + .byte 24 + .byte 32 + .byte 1 + .byte 0 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 5 + .byte 44 + .byte -120 + .byte 36 + .byte 75 + .byte -87 + .byte 0 + .byte 4 + .byte 1 + .byte 16 + .short 256 + .byte 2 + .byte 2 + .short 2048 + .short 287 + .byte 1 + .byte 0 + .byte 24 + .byte 32 + .byte 1 + .byte 0 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte 44 + .byte 104 + .byte 0 + .byte 39 + .byte -87 + .byte 0 + .byte 4 + .byte 1 + .byte 16 + .short 128 + .byte 1 + .byte 2 + .short 2048 + .short 287 + .byte 0 + .byte 0 + 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.byte -109 + .byte 114 + .byte 87 + .byte 8 + .byte 1 + .byte 32 + .short 256 + .byte 2 + .byte 1 + .short 2092 + .short 1473 + .byte 2 + .byte 66 + .byte 40 + .byte 32 + .byte 3 + .byte 1 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte 69 + .byte 58 + .byte -108 + .byte -109 + .byte 118 + .byte 81 + .byte 8 + .byte 1 + .byte 32 + .short 256 + .byte 2 + .byte 2 + .short 2106 + .short 473 + .byte 2 + .byte 68 + .byte 40 + .byte 32 + .byte 3 + .byte 1 + .byte 4 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte 69 + .byte -34 + .byte -108 + .byte -109 + .byte 118 + .byte 81 + .byte 8 + .byte 1 + .byte 32 + .short 256 + .byte 2 + .byte 2 + .short 1074 + .short 473 + .byte 2 + .byte 68 + .byte 40 + .byte 32 + .byte 3 + .byte 1 + .byte 4 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte 69 + .byte 58 + .byte -92 + .byte -109 + .byte 122 + .byte 80 + .byte 8 + .byte 1 + .byte 32 + .short 256 + .byte 2 + .byte 2 + .short 2138 + .short 1497 + .byte 2 + .byte 0 + .byte 40 + .byte 32 + .byte 3 + .byte 1 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte 69 + .byte -34 + .byte -108 + .byte -126 + .byte 118 + .byte 86 + .byte 8 + .byte 1 + .byte 16 + .short 256 + .byte 2 + .byte 2 + .short 2062 + .short 473 + .byte 1 + .byte 0 + .byte 40 + .byte 32 + .byte 3 + .byte 1 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte 69 + .byte -34 + .byte -108 + .byte -109 + .byte 118 + .byte -41 + .byte 8 + .byte 1 + .byte 32 + .short 256 + .byte 2 + .byte 2 + .short 1058 + .short 1497 + .byte 2 + .byte 66 + .byte 40 + .byte 32 + .byte 3 + .byte 1 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 5 + .byte -20 + .byte -41 + .byte -108 + .byte 126 + .byte 100 + .byte 68 + .byte 0 + .byte 1 + .byte 16 + .short 128 + .byte 2 + .byte 2 + .short 2048 + .short 473 + .byte 2 + .byte 49 + .byte 60 + .byte 36 + .byte 3 + .byte 0 + .byte 3 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte -20 + .byte -34 + .byte -43 + .byte 126 + .byte 104 + .byte 68 + .byte 0 + .byte 2 + .byte 16 + .short 128 + .byte 2 + .byte 2 + .short 2048 + .short 505 + .byte 2 + .byte 49 + .byte 60 + .byte 36 + .byte 3 + .byte 0 + .byte 3 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte -20 + .byte -41 + .byte -108 + .byte 122 + .byte 84 + .byte 67 + .byte 0 + .byte 1 + .byte 16 + .short 128 + .byte 2 + .byte 2 + .short 2076 + .short 409 + .byte 2 + .byte 0 + .byte 40 + .byte 36 + .byte 3 + .byte 1 + .byte 3 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte -20 + .byte -34 + .byte -43 + .byte 122 + .byte 88 + .byte 67 + .byte 0 + .byte 2 + .byte 16 + .short 128 + .byte 2 + .byte 2 + .short 2076 + .short 441 + .byte 2 + .byte 0 + .byte 40 + .byte 36 + .byte 3 + .byte 1 + .byte 3 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte -20 + .byte -43 + .byte -108 + .byte 118 + .byte 84 + .byte 67 + .byte 0 + .byte 1 + .byte 16 + .short 128 + .byte 2 + .byte 2 + .short 1038 + .short 281 + .byte 2 + .byte 0 + .byte 24 + .byte 36 + .byte 3 + .byte 1 + .byte 3 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte -20 + .byte -41 + .byte 20 + .byte 118 + .byte 84 + .byte -62 + .byte 0 + .byte 1 + .byte 16 + .short 128 + .byte 2 + .byte 2 + .short 2076 + .short 1169 + .byte 2 + .byte 0 + .byte 24 + .byte 40 + .byte 3 + .byte 1 + .byte 3 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte -20 + .byte -34 + .byte -108 + .byte -61 + .byte -92 + .byte -54 + .byte 0 + .byte 1 + .byte 32 + .short 792 + .byte 2 + .byte 1 + .short 688 + .short 1217 + .byte 11 + .byte 50 + .byte 40 + .byte 32 + .byte 3 + .byte 1 + .byte 1 + .byte 0 + .byte 1 + .byte 0 + .space 4 + .type NandOptPara, %object + .size NandOptPara, 128 +NandOptPara: + .byte 1 + .byte 0 + .byte 49 + .byte 63 + .byte 0 + .byte 49 + .byte -128 + .byte 21 + .byte 0 + .byte 50 + .byte 17 + .byte -128 + .byte 112 + .byte 120 + .byte 120 + .byte 3 + .byte 1 + .byte 0 + .space 14 + .byte 2 + .byte 0 + .byte 49 + .byte 63 + .byte 0 + .byte 49 + .byte -128 + .byte 21 + .byte 0 + .byte 0 + .byte 17 + .byte -127 + .byte 112 + .byte -15 + .byte -14 + .byte 0 + .byte 0 + .byte 0 + .space 14 + .byte 3 + .byte 0 + .byte 49 + .byte 63 + .byte 0 + .byte 49 + .byte -128 + .byte 21 + .byte 96 + .byte 96 + .byte 17 + .byte -127 + .byte 112 + .byte -15 + .byte -14 + .byte 0 + .byte 0 + .byte 0 + .space 14 + .byte 4 + .byte 0 + .byte 49 + .byte 63 + .byte 0 + .byte 49 + .byte -128 + .byte 21 + .byte 96 + .byte 96 + .byte 17 + .byte -127 + .byte 112 + .byte 112 + .byte 112 + .byte 0 + .byte 0 + .byte 0 + .space 14 + .type refValueDefault, %object + .size refValueDefault, 28 +refValueDefault: + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 6 + .byte 10 + .byte 6 + .byte 0 + .byte -3 + .byte -7 + .byte -8 + .byte 0 + .byte -6 + .byte -13 + .byte -15 + .byte 0 + .byte -11 + .byte -20 + .byte -23 + .byte 0 + .byte 0 + .byte -26 + .byte -30 + .byte 0 + .byte 0 + .byte -32 + .byte -37 + .type gSlcNandParaInfo, %object + .size gSlcNandParaInfo, 32 +gSlcNandParaInfo: + .byte 2 + .byte -104 + .byte -15 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 1 + .byte 1 + .byte 4 + .short 64 + .byte 1 + .byte 1 + .short 1024 + .short 256 + .byte 0 + .byte 0 + .byte 16 + .byte 40 + .byte 1 + .byte 0 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .type ftl_gc_temp_block_bops_scan_page_addr, %object + .size ftl_gc_temp_block_bops_scan_page_addr, 2 +ftl_gc_temp_block_bops_scan_page_addr: + .short -1 + .space 2 + .type power_up_flag, %object + .size power_up_flag, 4 +power_up_flag: + .word 1 + .bss + .align 2 + .set .LANCHOR0,. + 0 + .set .LANCHOR2,. + 4344 + .set .LANCHOR4,. + 8688 + .type gNandChipMap, %object + .size gNandChipMap, 32 +gNandChipMap: + .space 32 + .type p_blk_mode_table, %object + .size p_blk_mode_table, 4 +p_blk_mode_table: + .space 4 + .type g_slc2KBNand, %object + .size g_slc2KBNand, 1 +g_slc2KBNand: + .space 1 + .type gNandIDBResBlkNum, %object + .size gNandIDBResBlkNum, 1 +gNandIDBResBlkNum: + .space 1 + .space 2 + .type gBlockPageAlignSize, %object + .size gBlockPageAlignSize, 4 +gBlockPageAlignSize: + .space 4 + .type gNandRandomizer, %object + .size gNandRandomizer, 1 +gNandRandomizer: + .space 1 + .space 3 + .type gpNandParaInfo, %object + .size gpNandParaInfo, 4 +gpNandParaInfo: + .space 4 + .type gNandOptPara, %object + .size gNandOptPara, 32 +gNandOptPara: + .space 32 + .type g_retryMode, %object + .size g_retryMode, 1 +g_retryMode: + .space 1 + .type g_maxRegNum, %object + .size g_maxRegNum, 1 +g_maxRegNum: + .space 1 + .space 2 + .type gpNandc, %object + .size gpNandc, 4 +gpNandc: + .space 4 + .type NANDC_FMCTL, %object + .size NANDC_FMCTL, 4 +NANDC_FMCTL: + .space 4 + .type NANDC_FMWAIT, %object + .size NANDC_FMWAIT, 4 +NANDC_FMWAIT: + .space 4 + .type NANDC_FLCTL, %object + .size NANDC_FLCTL, 4 +NANDC_FLCTL: + .space 4 + .type NANDC_BCHCTL, %object + .size NANDC_BCHCTL, 4 +NANDC_BCHCTL: + .space 4 + .type NANDC_DLL_CTL_REG0, %object + .size NANDC_DLL_CTL_REG0, 4 +NANDC_DLL_CTL_REG0: + .space 4 + .type NANDC_DLL_CTL_REG1, %object + .size NANDC_DLL_CTL_REG1, 4 +NANDC_DLL_CTL_REG1: + .space 4 + .type NANDC_RANDMZ_CFG, %object + .size NANDC_RANDMZ_CFG, 4 +NANDC_RANDMZ_CFG: + .space 4 + .type NANDC_FMWAIT_SYN, %object + .size NANDC_FMWAIT_SYN, 4 +NANDC_FMWAIT_SYN: + .space 4 + .type gNandPhyInfo, %object + .size gNandPhyInfo, 28 +gNandPhyInfo: + .space 28 + .type gFlashSlcMode, %object + .size gFlashSlcMode, 1 +gFlashSlcMode: + .space 1 + .space 3 + .type slcPageToMlcPageTbl, %object + .size slcPageToMlcPageTbl, 1024 +slcPageToMlcPageTbl: + .space 1024 + .type DieAddrs, %object + .size DieAddrs, 32 +DieAddrs: + .space 32 + .type FlashWaitBusyScheduleEn, %object + .size FlashWaitBusyScheduleEn, 4 +FlashWaitBusyScheduleEn: + .space 4 + .type gReadRetryInfo, %object + .size gReadRetryInfo, 852 +gReadRetryInfo: + .space 852 + .type read_retry_cur_offset, %object + .size read_retry_cur_offset, 4 +read_retry_cur_offset: + .space 4 + .type IDByte, %object + .size IDByte, 32 +IDByte: + .space 32 + .type gDieOp, %object + .size gDieOp, 128 +gDieOp: + .space 128 + .type gFlashCurMode, %object + .size gFlashCurMode, 1 +gFlashCurMode: + .space 1 + .type gFlashInterfaceMode, %object + .size gFlashInterfaceMode, 1 +gFlashInterfaceMode: + .space 1 + .type gNandMaxDie, %object + .size gNandMaxDie, 1 +gNandMaxDie: + .space 1 + .space 1 + .type DieCsIndex, %object + .size DieCsIndex, 8 +DieCsIndex: + .space 8 + .type gMultiPageProgEn, %object + .size gMultiPageProgEn, 1 +gMultiPageProgEn: + .space 1 + .space 3 + .type g_inkDie_check_enable, %object + .size g_inkDie_check_enable, 4 +g_inkDie_check_enable: + .space 4 + .type idb_flash_slc_mode, %object + .size idb_flash_slc_mode, 4 +idb_flash_slc_mode: + .space 4 + .type gFlashToggleModeEn, %object + .size gFlashToggleModeEn, 1 +gFlashToggleModeEn: + .space 1 + .space 3 + .type gBootDdrMode, %object + .size gBootDdrMode, 4 +gBootDdrMode: + .space 4 + .type gNandcVer, %object + .size gNandcVer, 4 +gNandcVer: + .space 4 + .type g_nandc_version_data, %object + .size g_nandc_version_data, 4 +g_nandc_version_data: + .space 4 + .type gMasterTempBuf, %object + .size gMasterTempBuf, 4 +gMasterTempBuf: + .space 4 + .type gMasterInfo, %object + .size gMasterInfo, 32 +gMasterInfo: + .space 32 + .type gNandcDumpWriteEn, %object + .size gNandcDumpWriteEn, 4 +gNandcDumpWriteEn: + .space 4 + .type gNandcEccBits, %object + .size gNandcEccBits, 4 +gNandcEccBits: + .space 4 + .type gNandFlashEccBits, %object + .size gNandFlashEccBits, 1 +gNandFlashEccBits: + .space 1 + .space 3 + .type c_ftl_nand_sys_blks_per_plane, %object + .size c_ftl_nand_sys_blks_per_plane, 4 +c_ftl_nand_sys_blks_per_plane: + .space 4 + .type c_ftl_nand_planes_num, %object + .size c_ftl_nand_planes_num, 2 +c_ftl_nand_planes_num: + .space 2 + .space 2 + .type c_ftl_nand_max_sys_blks, %object + .size c_ftl_nand_max_sys_blks, 4 +c_ftl_nand_max_sys_blks: + .space 4 + .type c_ftl_nand_data_blks_per_plane, %object + .size c_ftl_nand_data_blks_per_plane, 2 +c_ftl_nand_data_blks_per_plane: + .space 2 + .type c_ftl_nand_blk_pre_plane, %object + .size c_ftl_nand_blk_pre_plane, 2 +c_ftl_nand_blk_pre_plane: + .space 2 + .type c_ftl_nand_max_data_blks, %object + .size c_ftl_nand_max_data_blks, 4 +c_ftl_nand_max_data_blks: + .space 4 + .type c_ftl_nand_totle_phy_blks, %object + .size c_ftl_nand_totle_phy_blks, 4 +c_ftl_nand_totle_phy_blks: + .space 4 + .type c_ftl_nand_type, %object + .size c_ftl_nand_type, 2 +c_ftl_nand_type: + .space 2 + .type c_ftl_nand_die_num, %object + .size c_ftl_nand_die_num, 2 +c_ftl_nand_die_num: + .space 2 + .type c_ftl_nand_planes_per_die, %object + .size c_ftl_nand_planes_per_die, 2 +c_ftl_nand_planes_per_die: + .space 2 + .type p_plane_order_table, %object + .size p_plane_order_table, 32 +p_plane_order_table: + .space 32 + .type c_mlc_erase_count_value, %object + .size c_mlc_erase_count_value, 2 +c_mlc_erase_count_value: + .space 2 + .type c_ftl_nand_ext_blk_pre_plane, %object + .size c_ftl_nand_ext_blk_pre_plane, 2 +c_ftl_nand_ext_blk_pre_plane: + .space 2 + .type c_ftl_vendor_part_size, %object + .size c_ftl_vendor_part_size, 2 +c_ftl_vendor_part_size: + .space 2 + .type c_ftl_nand_blks_per_die, %object + .size c_ftl_nand_blks_per_die, 2 +c_ftl_nand_blks_per_die: + .space 2 + .type c_ftl_nand_page_pre_blk, %object + .size c_ftl_nand_page_pre_blk, 2 +c_ftl_nand_page_pre_blk: + .space 2 + .type c_ftl_nand_page_pre_slc_blk, %object + .size c_ftl_nand_page_pre_slc_blk, 2 +c_ftl_nand_page_pre_slc_blk: + .space 2 + .type c_ftl_nand_page_pre_super_blk, %object + .size c_ftl_nand_page_pre_super_blk, 2 +c_ftl_nand_page_pre_super_blk: + .space 2 + .type c_ftl_nand_sec_pre_page, %object + .size c_ftl_nand_sec_pre_page, 2 +c_ftl_nand_sec_pre_page: + .space 2 + .type c_ftl_nand_sec_pre_page_shift, %object + .size c_ftl_nand_sec_pre_page_shift, 2 +c_ftl_nand_sec_pre_page_shift: + .space 2 + .type c_ftl_nand_byte_pre_page, %object + .size c_ftl_nand_byte_pre_page, 2 +c_ftl_nand_byte_pre_page: + .space 2 + .type c_ftl_nand_byte_pre_oob, %object + .size c_ftl_nand_byte_pre_oob, 2 +c_ftl_nand_byte_pre_oob: + .space 2 + .type c_ftl_nand_reserved_blks, %object + .size c_ftl_nand_reserved_blks, 2 +c_ftl_nand_reserved_blks: + .space 2 + .space 2 + .type DeviceCapacity, %object + .size DeviceCapacity, 4 +DeviceCapacity: + .space 4 + .type c_ftl_nand_max_vendor_blks, %object + .size c_ftl_nand_max_vendor_blks, 2 +c_ftl_nand_max_vendor_blks: + .space 2 + .type c_ftl_nand_vendor_region_num, %object + .size c_ftl_nand_vendor_region_num, 2 +c_ftl_nand_vendor_region_num: + .space 2 + .type c_ftl_nand_map_blks_per_plane, %object + .size c_ftl_nand_map_blks_per_plane, 2 +c_ftl_nand_map_blks_per_plane: + .space 2 + .space 2 + .type c_ftl_nand_max_map_blks, %object + .size c_ftl_nand_max_map_blks, 4 +c_ftl_nand_max_map_blks: + .space 4 + .type c_ftl_nand_init_sys_blks_per_plane, %object + .size c_ftl_nand_init_sys_blks_per_plane, 4 +c_ftl_nand_init_sys_blks_per_plane: + .space 4 + .type c_ftl_nand_map_region_num, %object + .size c_ftl_nand_map_region_num, 2 +c_ftl_nand_map_region_num: + .space 2 + .type c_ftl_nand_l2pmap_ram_region_num, %object + .size c_ftl_nand_l2pmap_ram_region_num, 2 +c_ftl_nand_l2pmap_ram_region_num: + .space 2 + .type g_MaxLbaSector, %object + .size g_MaxLbaSector, 4 +g_MaxLbaSector: + .space 4 + .type g_page_map_check_enable, %object + .size g_page_map_check_enable, 2 +g_page_map_check_enable: + .space 2 + .type g_totle_vendor_block, %object + .size g_totle_vendor_block, 2 +g_totle_vendor_block: + .space 2 + .type p_vendor_block_table, %object + .size p_vendor_block_table, 4 +p_vendor_block_table: + .space 4 + .type g_wr_page_num, %object + .size g_wr_page_num, 4 +g_wr_page_num: + .space 4 + .type req_wr_io, %object + .size req_wr_io, 4 +req_wr_io: + .space 4 + .type g_MaxLpn, %object + .size g_MaxLpn, 4 +g_MaxLpn: + .space 4 + .type gBbtInfo, %object + .size gBbtInfo, 60 +gBbtInfo: + .space 60 + .type gSysFreeQueue, %object + .size gSysFreeQueue, 2056 +gSysFreeQueue: + .space 2056 + .type g_flash_read_only_en, %object + .size g_flash_read_only_en, 4 +g_flash_read_only_en: + .space 4 + .type req_erase, %object + .size req_erase, 4 +req_erase: + .space 4 + .type p_erase_count_table, %object + .size p_erase_count_table, 4 +p_erase_count_table: + .space 4 + .type g_totle_sys_slc_erase_count, %object + .size g_totle_sys_slc_erase_count, 4 +g_totle_sys_slc_erase_count: + .space 4 + .type g_sys_save_data, %object + .size g_sys_save_data, 48 +g_sys_save_data: + .space 48 + .type p_data_block_list_table, %object + .size p_data_block_list_table, 4 +p_data_block_list_table: + .space 4 + .type p_data_block_list_head, %object + .size p_data_block_list_head, 4 +p_data_block_list_head: + .space 4 + .type p_valid_page_count_table, %object + .size p_valid_page_count_table, 4 +p_valid_page_count_table: + .space 4 + .type p_data_block_list_tail, %object + .size p_data_block_list_tail, 4 +p_data_block_list_tail: + .space 4 + .type g_num_data_superblocks, %object + .size g_num_data_superblocks, 2 +g_num_data_superblocks: + .space 2 + .space 2 + .type p_free_data_block_list_head, %object + .size p_free_data_block_list_head, 4 +p_free_data_block_list_head: + .space 4 + .type g_num_free_superblocks, %object + .size g_num_free_superblocks, 2 +g_num_free_superblocks: + .space 2 + .space 2 + .type g_active_superblock, %object + .size g_active_superblock, 48 +g_active_superblock: + .space 48 + .type g_buffer_superblock, %object + .size g_buffer_superblock, 48 +g_buffer_superblock: + .space 48 + .type g_gc_temp_superblock, %object + .size g_gc_temp_superblock, 48 +g_gc_temp_superblock: + .space 48 + .type p_l2p_ram_map, %object + .size p_l2p_ram_map, 4 +p_l2p_ram_map: + .space 4 + .type g_l2p_last_update_region_id, %object + .size g_l2p_last_update_region_id, 2 +g_l2p_last_update_region_id: + .space 2 + .type FtlUpdateVaildLpnCount, %object + .size FtlUpdateVaildLpnCount, 2 +FtlUpdateVaildLpnCount: + .space 2 + .type g_VaildLpn, %object + .size g_VaildLpn, 4 +g_VaildLpn: + .space 4 + .type g_totle_read_page_count, %object + .size g_totle_read_page_count, 4 +g_totle_read_page_count: + .space 4 + .type g_totle_discard_page_count, %object + .size g_totle_discard_page_count, 4 +g_totle_discard_page_count: + .space 4 + .type g_totle_write_page_count, %object + .size g_totle_write_page_count, 4 +g_totle_write_page_count: + .space 4 + .type g_totle_cache_write_count, %object + .size g_totle_cache_write_count, 4 +g_totle_cache_write_count: + .space 4 + .type g_totle_l2p_write_count, %object + .size g_totle_l2p_write_count, 4 +g_totle_l2p_write_count: + .space 4 + .type g_totle_gc_page_count, %object + .size g_totle_gc_page_count, 4 +g_totle_gc_page_count: + .space 4 + .type g_totle_write_sector, %object + .size g_totle_write_sector, 4 +g_totle_write_sector: + .space 4 + .type g_totle_read_sector, %object + .size g_totle_read_sector, 4 +g_totle_read_sector: + .space 4 + .type g_GlobalSysVersion, %object + .size g_GlobalSysVersion, 4 +g_GlobalSysVersion: + .space 4 + .type g_GlobalDataVersion, %object + .size g_GlobalDataVersion, 4 +g_GlobalDataVersion: + .space 4 + .type g_totle_mlc_erase_count, %object + .size g_totle_mlc_erase_count, 4 +g_totle_mlc_erase_count: + .space 4 + .type g_totle_slc_erase_count, %object + .size g_totle_slc_erase_count, 4 +g_totle_slc_erase_count: + .space 4 + .type g_totle_avg_erase_count, %object + .size g_totle_avg_erase_count, 4 +g_totle_avg_erase_count: + .space 4 + .type g_max_erase_count, %object + .size g_max_erase_count, 4 +g_max_erase_count: + .space 4 + .type g_min_erase_count, %object + .size g_min_erase_count, 4 +g_min_erase_count: + .space 4 + .type c_ftl_nand_data_op_blks_per_plane, %object + .size c_ftl_nand_data_op_blks_per_plane, 2 +c_ftl_nand_data_op_blks_per_plane: + .space 2 + .space 2 + .type gSysInfo, %object + .size gSysInfo, 16 +gSysInfo: + .space 16 + .type g_gc_superblock, %object + .size g_gc_superblock, 48 +g_gc_superblock: + .space 48 + .type g_sys_ext_data, %object + .size g_sys_ext_data, 512 +g_sys_ext_data: + .space 512 + .type g_all_blk_used_slc_mode, %object + .size g_all_blk_used_slc_mode, 4 +g_all_blk_used_slc_mode: + .space 4 + .type g_gc_free_blk_threshold, %object + .size g_gc_free_blk_threshold, 2 +g_gc_free_blk_threshold: + .space 2 + .type g_gc_merge_free_blk_threshold, %object + .size g_gc_merge_free_blk_threshold, 2 +g_gc_merge_free_blk_threshold: + .space 2 + .type g_gc_skip_write_count, %object + .size g_gc_skip_write_count, 4 +g_gc_skip_write_count: + .space 4 + .type g_gc_blk_index, %object + .size g_gc_blk_index, 2 +g_gc_blk_index: + .space 2 + .space 2 + .type g_in_swl_replace, %object + .size g_in_swl_replace, 4 +g_in_swl_replace: + .space 4 + .type g_gc_num_req, %object + .size g_gc_num_req, 4 +g_gc_num_req: + .space 4 + .type gp_gc_page_buf_info, %object + .size gp_gc_page_buf_info, 4 +gp_gc_page_buf_info: + .space 4 + .type p_gc_data_buf, %object + .size p_gc_data_buf, 4 +p_gc_data_buf: + .space 4 + .type p_gc_spare_buf, %object + .size p_gc_spare_buf, 4 +p_gc_spare_buf: + .space 4 + .type req_gc, %object + .size req_gc, 4 +req_gc: + .space 4 + .type c_gc_page_buf_num, %object + .size c_gc_page_buf_num, 4 +c_gc_page_buf_num: + .space 4 + .type p_gc_blk_tbl, %object + .size p_gc_blk_tbl, 4 +p_gc_blk_tbl: + .space 4 + .type g_gc_blk_num, %object + .size g_gc_blk_num, 2 +g_gc_blk_num: + .space 2 + .space 2 + .type p_gc_page_info, %object + .size p_gc_page_info, 4 +p_gc_page_info: + .space 4 + .type g_gc_page_offset, %object + .size g_gc_page_offset, 2 +g_gc_page_offset: + .space 2 + .type g_gc_next_blk, %object + .size g_gc_next_blk, 2 +g_gc_next_blk: + .space 2 + .type g_gc_next_blk_1, %object + .size g_gc_next_blk_1, 2 +g_gc_next_blk_1: + .space 2 + .type g_gc_next_blk_2, %object + .size g_gc_next_blk_2, 2 +g_gc_next_blk_2: + .space 2 + .type g_gc_next_blk_3, %object + .size g_gc_next_blk_3, 2 +g_gc_next_blk_3: + .space 2 + .type g_gc_bad_block_temp_num, %object + .size g_gc_bad_block_temp_num, 2 +g_gc_bad_block_temp_num: + .space 2 + .type g_gc_bad_block_temp_tbl, %object + .size g_gc_bad_block_temp_tbl, 34 +g_gc_bad_block_temp_tbl: + .space 34 + .type g_gc_bad_block_gc_index, %object + .size g_gc_bad_block_gc_index, 2 +g_gc_bad_block_gc_index: + .space 2 + .type mlcPageToSlcPageTbl, %object + .size mlcPageToSlcPageTbl, 2048 +mlcPageToSlcPageTbl: + .space 2048 + .type gNandMaxChip, %object + .size gNandMaxChip, 1 +gNandMaxChip: + .space 1 + .space 1 + .type gTotleBlock, %object + .size gTotleBlock, 2 +gTotleBlock: + .space 2 + .type g_free_slc_blk_num, %object + .size g_free_slc_blk_num, 2 +g_free_slc_blk_num: + .space 2 + .space 2 + .type g_SlcPartLbaEndSector, %object + .size g_SlcPartLbaEndSector, 4 +g_SlcPartLbaEndSector: + .space 4 + .type g_in_gc_progress, %object + .size g_in_gc_progress, 4 +g_in_gc_progress: + .space 4 + .type g_gc_head_data_block, %object + .size g_gc_head_data_block, 4 +g_gc_head_data_block: + .space 4 + .type g_gc_head_data_block_count, %object + .size g_gc_head_data_block_count, 4 +g_gc_head_data_block_count: + .space 4 + .type g_cur_erase_blk, %object + .size g_cur_erase_blk, 4 +g_cur_erase_blk: + .space 4 + .type g_gc_refresh_block_temp_num, %object + .size g_gc_refresh_block_temp_num, 2 +g_gc_refresh_block_temp_num: + .space 2 + .space 2 + .type c_wr_page_buf_num, %object + .size c_wr_page_buf_num, 4 +c_wr_page_buf_num: + .space 4 + .type req_read, %object + .size req_read, 4 +req_read: + .space 4 + .type req_gc_dst, %object + .size req_gc_dst, 4 +req_gc_dst: + .space 4 + .type req_prgm, %object + .size req_prgm, 4 +req_prgm: + .space 4 + .type p_sys_data_buf, %object + .size p_sys_data_buf, 4 +p_sys_data_buf: + .space 4 + .type p_sys_data_buf_1, %object + .size p_sys_data_buf_1, 4 +p_sys_data_buf_1: + .space 4 + .type p_vendor_data_buf, %object + .size p_vendor_data_buf, 4 +p_vendor_data_buf: + .space 4 + .type p_wr_io_data_buf, %object + .size p_wr_io_data_buf, 4 +p_wr_io_data_buf: + .space 4 + .type p_io_data_buf_0, %object + .size p_io_data_buf_0, 4 +p_io_data_buf_0: + .space 4 + .type p_io_data_buf_1, %object + .size p_io_data_buf_1, 4 +p_io_data_buf_1: + .space 4 + .type p_sys_spare_buf, %object + .size p_sys_spare_buf, 4 +p_sys_spare_buf: + .space 4 + .type p_io_spare_buf, %object + .size p_io_spare_buf, 4 +p_io_spare_buf: + .space 4 + .type p_wr_io_spare_buf, %object + .size p_wr_io_spare_buf, 4 +p_wr_io_spare_buf: + .space 4 + .type g_ect_tbl_info_size, %object + .size g_ect_tbl_info_size, 2 +g_ect_tbl_info_size: + .space 2 + .space 2 + .type p_swl_mul_table, %object + .size p_swl_mul_table, 4 +p_swl_mul_table: + .space 4 + .type gp_ect_tbl_info, %object + .size gp_ect_tbl_info, 4 +gp_ect_tbl_info: + .space 4 + .type p_valid_page_count_check_table, %object + .size p_valid_page_count_check_table, 4 +p_valid_page_count_check_table: + .space 4 + .type p_map_block_table, %object + .size p_map_block_table, 4 +p_map_block_table: + .space 4 + .type p_map_block_valid_page_count, %object + .size p_map_block_valid_page_count, 4 +p_map_block_valid_page_count: + .space 4 + .type p_vendor_block_valid_page_count, %object + .size p_vendor_block_valid_page_count, 4 +p_vendor_block_valid_page_count: + .space 4 + .type p_vendor_block_ver_table, %object + .size p_vendor_block_ver_table, 4 +p_vendor_block_ver_table: + .space 4 + .type p_vendor_region_ppn_table, %object + .size p_vendor_region_ppn_table, 4 +p_vendor_region_ppn_table: + .space 4 + .type p_map_region_ppn_table, %object + .size p_map_region_ppn_table, 4 +p_map_region_ppn_table: + .space 4 + .type p_map_region_ppn_check_table, %object + .size p_map_region_ppn_check_table, 4 +p_map_region_ppn_check_table: + .space 4 + .type p_map_block_ver_table, %object + .size p_map_block_ver_table, 4 +p_map_block_ver_table: + .space 4 + .type p_l2p_map_buf, %object + .size p_l2p_map_buf, 4 +p_l2p_map_buf: + .space 4 + .type c_ftl_nand_bbm_buf_size, %object + .size c_ftl_nand_bbm_buf_size, 2 +c_ftl_nand_bbm_buf_size: + .space 2 + .space 2 + .type gL2pMapInfo, %object + .size gL2pMapInfo, 44 +gL2pMapInfo: + .space 44 + .type g_totle_map_block, %object + .size g_totle_map_block, 2 +g_totle_map_block: + .space 2 + .space 2 + .type g_req_cache, %object + .size g_req_cache, 4 +g_req_cache: + .space 4 + .type g_tmp_data_superblock_id, %object + .size g_tmp_data_superblock_id, 2 +g_tmp_data_superblock_id: + .space 2 + .space 2 + .type g_totle_swl_count, %object + .size g_totle_swl_count, 4 +g_totle_swl_count: + .space 4 + .type ftl_gc_temp_power_lost_recovery_flag, %object + .size ftl_gc_temp_power_lost_recovery_flag, 4 +ftl_gc_temp_power_lost_recovery_flag: + .space 4 + .type g_recovery_page_min_ver, %object + .size g_recovery_page_min_ver, 4 +g_recovery_page_min_ver: + .space 4 + .type gNandIDataBuf, %object + .size gNandIDataBuf, 2048 +gNandIDataBuf: + .space 2048 + .type RK29_NANDC_REG_BASE, %object + .size RK29_NANDC_REG_BASE, 4 +RK29_NANDC_REG_BASE: + .space 4 + .type ftl_dma32_buffer_size, %object + .size ftl_dma32_buffer_size, 4 +ftl_dma32_buffer_size: + .space 4 + .type ftl_dma32_buffer, %object + .size ftl_dma32_buffer, 4 +ftl_dma32_buffer: + .space 4 + .type gFlashPageBuffer0, %object + .size gFlashPageBuffer0, 4 +gFlashPageBuffer0: + .space 4 + .type FlashDdrTunningReadCount, %object + .size FlashDdrTunningReadCount, 4 +FlashDdrTunningReadCount: + .space 4 + .type gpReadRetrial, %object + .size gpReadRetrial, 4 +gpReadRetrial: + .space 4 + .type gpFlashSaveInfo, %object + .size gpFlashSaveInfo, 4 +gpFlashSaveInfo: + .space 4 + .type gNandFlashInfoBlockAddr, %object + .size gNandFlashInfoBlockAddr, 4 +gNandFlashInfoBlockAddr: + .space 4 + .type gNandFlashIdbBlockAddr, %object + .size gNandFlashIdbBlockAddr, 4 +gNandFlashIdbBlockAddr: + .space 4 + .type gNandIDBResBlkNumSaveInFlash, %object + .size gNandIDBResBlkNumSaveInFlash, 1 +gNandIDBResBlkNumSaveInFlash: + .space 1 + .type g_maxRetryCount, %object + .size g_maxRetryCount, 1 +g_maxRetryCount: + .space 1 + .type gNandFlashIDBEccBits, %object + .size gNandFlashIDBEccBits, 1 +gNandFlashIDBEccBits: + .space 1 + .space 1 + .type gFlashPageBuffer1, %object + .size gFlashPageBuffer1, 4 +gFlashPageBuffer1: + .space 4 + .type gFlashSpareBuffer, %object + .size gFlashSpareBuffer, 4 +gFlashSpareBuffer: + .space 4 + .type gFlashProgCheckBuffer, %object + .size gFlashProgCheckBuffer, 4 +gFlashProgCheckBuffer: + .space 4 + .type gFlashProgCheckSpareBuffer, %object + .size gFlashProgCheckSpareBuffer, 4 +gFlashProgCheckSpareBuffer: + .space 4 + .type g_nand_ecc_en, %object + .size g_nand_ecc_en, 1 +g_nand_ecc_en: + .space 1 + .type gMultiPageReadEn, %object + .size gMultiPageReadEn, 1 +gMultiPageReadEn: + .space 1 + .type FbbtBlk, %object + .size FbbtBlk, 16 +FbbtBlk: + .space 16 + .space 2 + .type req_sys, %object + .size req_sys, 36 +req_sys: + .space 36 + .type g_MaxLbn, %object + .size g_MaxLbn, 4 +g_MaxLbn: + .space 4 + .type gVendorBlkInfo, %object + .size gVendorBlkInfo, 44 +gVendorBlkInfo: + .space 44 + .type g_ect_tbl_power_up_flush, %object + .size g_ect_tbl_power_up_flush, 2 +g_ect_tbl_power_up_flush: + .space 2 + .type g_power_lost_ecc_error_blk, %object + .size g_power_lost_ecc_error_blk, 2 +g_power_lost_ecc_error_blk: + .space 2 + .type g_power_lost_recovery_flag, %object + .size g_power_lost_recovery_flag, 2 +g_power_lost_recovery_flag: + .space 2 + .space 2 + .type g_recovery_page_num, %object + .size g_recovery_page_num, 4 +g_recovery_page_num: + .space 4 + .type g_recovery_ppa_tbl, %object + .size g_recovery_ppa_tbl, 128 +g_recovery_ppa_tbl: + .space 128 + .type gc_ink_free_return_value, %object + .size gc_ink_free_return_value, 2 +gc_ink_free_return_value: + .space 2 + .type g_gc_cur_blk_valid_pages, %object + .size g_gc_cur_blk_valid_pages, 2 +g_gc_cur_blk_valid_pages: + .space 2 + .type g_gc_cur_blk_max_valid_pages, %object + .size g_gc_cur_blk_max_valid_pages, 2 +g_gc_cur_blk_max_valid_pages: + .space 2 + .space 2 + .type gp_last_act_superblock, %object + .size gp_last_act_superblock, 4 +gp_last_act_superblock: + .space 4 + .type gc_discard_updated, %object + .size gc_discard_updated, 4 +gc_discard_updated: + .space 4 + .type g_LowFormat, %object + .size g_LowFormat, 4 +g_LowFormat: + .space 4 + .type gLoaderBootInfo, %object + .size gLoaderBootInfo, 4 +gLoaderBootInfo: + .space 4 + .type RK29_NANDC1_REG_BASE, %object + .size RK29_NANDC1_REG_BASE, 4 +RK29_NANDC1_REG_BASE: + .space 4 + .type g_ftl_nand_free_count, %object + .size g_ftl_nand_free_count, 4 +g_ftl_nand_free_count: + .space 4 + .type last_cache_match_count, %object + .size last_cache_match_count, 4 +last_cache_match_count: + .space 4 + .type idb_write_enable, %object + .size idb_write_enable, 1 +idb_write_enable: + .space 1 + .space 3 + .type idb_buf, %object + .size idb_buf, 4 +idb_buf: + .space 4 + .type idb_last_lba, %object + .size idb_last_lba, 4 +idb_last_lba: + .space 4 + .type gpDrmKeyInfo, %object + .size gpDrmKeyInfo, 4 +gpDrmKeyInfo: + .space 4 + .type SecureBootCheckOK, %object + .size SecureBootCheckOK, 4 +SecureBootCheckOK: + .space 4 + .type SecureBootEn, %object + .size SecureBootEn, 4 +SecureBootEn: + .space 4 + .type gpBootConfig, %object + .size gpBootConfig, 4 +gpBootConfig: + .space 4 + .type gSnSectorData, %object + .size gSnSectorData, 512 +gSnSectorData: + .space 512 + .type SecureBootUnlockTryCount, %object + .size SecureBootUnlockTryCount, 4 +SecureBootUnlockTryCount: + .space 4 + .type gpVendor0Info, %object + .size gpVendor0Info, 4 +gpVendor0Info: + .space 4 + .type gpVendor1Info, %object + .size gpVendor1Info, 4 +gpVendor1Info: + .space 4 + .type g_idb_buffer, %object + .size g_idb_buffer, 4 +g_idb_buffer: + .space 4 + .type g_vendor, %object + .size g_vendor, 4 +g_vendor: + .space 4 + .type check_valid_page_count_table, %object + .size check_valid_page_count_table, 8192 +check_valid_page_count_table: + .space 8192 + .type g_gc_refresh_block_temp_tbl, %object + .size g_gc_refresh_block_temp_tbl, 34 +g_gc_refresh_block_temp_tbl: + .space 34 + .space 2 + .type gToggleModeClkDiv, %object + .size gToggleModeClkDiv, 4 +gToggleModeClkDiv: + .space 4 + .type gpNandc1, %object + .size gpNandc1, 4 +gpNandc1: + .space 4 + .type gNandFlashResEndPageAddr, %object + .size gNandFlashResEndPageAddr, 4 +gNandFlashResEndPageAddr: + .space 4 + .type gNandFlashInfoBlockEcc, %object + .size gNandFlashInfoBlockEcc, 1 +gNandFlashInfoBlockEcc: + .space 1 + .type gFlashOnfiModeEn, %object + .size gFlashOnfiModeEn, 1 +gFlashOnfiModeEn: + .space 1 + .type gFlashSdrModeEn, %object + .size gFlashSdrModeEn, 1 +gFlashSdrModeEn: + .space 1 + .section .rodata.str1.1,"aMS",%progbits,1 +.LC1: + .ascii "FlashEraseBlocks pageAddr error %x\012\000" +.LC2: + .ascii "phyBlk = 0x%x die = %d block_in_die = 0x%x 0x%8x\012" + .ascii "\000" +.LC3: + .ascii "FtlFreeSysBlkQueueOut free count = %d\012\000" +.LC4: + .ascii "FtlFreeSysBlkQueueOut = %x, free count = %d, error\012" + .ascii "\000" +.LC5: + .ascii "FtlFreeSysBlkQueueOut = %x, free count = %d\012\000" +.LC6: + .ascii "FLASH INFO:\012\000" +.LC7: + .ascii "FLASH ID: %x\012\000" +.LC8: + .ascii "Device Capacity: %d MB\012\000" +.LC9: + .ascii "FMWAIT: %x %x %x %x\012\000" +.LC10: + .ascii "FTL INFO:\012\000" +.LC11: + .ascii "g_MaxLpn = 0x%x\012\000" +.LC12: + .ascii "g_VaildLpn = 0x%x\012\000" +.LC13: + .ascii "read_page_count = 0x%x\012\000" +.LC14: + .ascii "discard_page_count = 0x%x\012\000" +.LC15: + .ascii "write_page_count = 0x%x\012\000" +.LC16: + .ascii "cache_write_count = 0x%x\012\000" +.LC17: + .ascii "l2p_write_count = 0x%x\012\000" +.LC18: + .ascii "gc_page_count = 0x%x\012\000" +.LC19: + .ascii "totle_write = %d MB\012\000" +.LC20: + .ascii "totle_read = %d MB\012\000" +.LC21: + .ascii "GSV = 0x%x\012\000" +.LC22: + .ascii "GDV = 0x%x\012\000" +.LC23: + .ascii "bad blk num = %d %d\012\000" +.LC24: + .ascii "free_superblocks = 0x%x\012\000" +.LC25: + .ascii "mlc_EC = 0x%x\012\000" +.LC26: + .ascii "slc_EC = 0x%x\012\000" +.LC27: + .ascii "avg_EC = 0x%x\012\000" +.LC28: + .ascii "sys_EC = 0x%x\012\000" +.LC29: + .ascii "max_EC = 0x%x\012\000" +.LC30: + .ascii "min_EC = 0x%x\012\000" +.LC31: + .ascii "PLT = 0x%x\012\000" +.LC32: + .ascii "POT = 0x%x\012\000" +.LC33: + .ascii "MaxSector = 0x%x\012\000" +.LC34: + .ascii "init_sys_blks_pp = 0x%x\012\000" +.LC35: + .ascii "sys_blks_pp = 0x%x\012\000" +.LC36: + .ascii "free sysblock = 0x%x\012\000" +.LC37: + .ascii "data_blks_pp = 0x%x\012\000" +.LC38: + .ascii "data_op_blks_pp = 0x%x\012\000" +.LC39: + .ascii "max_data_blks = 0x%x\012\000" +.LC40: + .ascii "Sys.id = 0x%x\012\000" +.LC41: + .ascii "Bbt.id = 0x%x\012\000" +.LC42: + .ascii "ACT.page = 0x%x\012\000" +.LC43: + .ascii "ACT.plane = 0x%x\012\000" +.LC44: + .ascii "ACT.id = 0x%x\012\000" +.LC45: + .ascii "ACT.mode = 0x%x\012\000" +.LC46: + .ascii "ACT.a_pages = 0x%x\012\000" +.LC47: + .ascii "ACT VPC = 0x%x\012\000" +.LC48: + .ascii "BUF.page = 0x%x\012\000" +.LC49: + .ascii "BUF.plane = 0x%x\012\000" +.LC50: + .ascii "BUF.id = 0x%x\012\000" +.LC51: + .ascii "BUF.mode = 0x%x\012\000" +.LC52: + .ascii "BUF.a_pages = 0x%x\012\000" +.LC53: + .ascii "BUF VPC = 0x%x\012\000" +.LC54: + .ascii "TMP.page = 0x%x\012\000" +.LC55: + .ascii "TMP.plane = 0x%x\012\000" +.LC56: + .ascii "TMP.id = 0x%x\012\000" +.LC57: + .ascii "TMP.mode = 0x%x\012\000" +.LC58: + .ascii "TMP.a_pages = 0x%x\012\000" +.LC59: + .ascii "GC.page = 0x%x\012\000" +.LC60: + .ascii "GC.plane = 0x%x\012\000" +.LC61: + .ascii "GC.id = 0x%x\012\000" +.LC62: + .ascii "GC.mode = 0x%x\012\000" +.LC63: + .ascii "GC.a_pages = 0x%x\012\000" +.LC64: + .ascii "WR_CHK = 0x%x %x %x %x\012\000" +.LC65: + .ascii "Read Err = 0x%x\012\000" +.LC66: + .ascii "Prog Err = 0x%x\012\000" +.LC67: + .ascii "gc_free_blk_th= 0x%x\012\000" +.LC68: + .ascii "gc_merge_free_blk_th= 0x%x\012\000" +.LC69: + .ascii "gc_skip_write_count= 0x%x\012\000" +.LC70: + .ascii "gc_blk_index= 0x%x\012\000" +.LC71: + .ascii "free min EC= 0x%x\012\000" +.LC72: + .ascii "free max EC= 0x%x\012\000" +.LC73: + .ascii "GC__SB VPC = 0x%x\012\000" +.LC74: + .ascii "%d. [0x%x]=0x%x 0x%x 0x%x\012\000" +.LC75: + .ascii "free %d. [0x%x] 0x%x 0x%x\012\000" +.LC76: + .ascii "FTL version: 5.0.63 20210616\000" +.LC77: + .ascii "%s\012\000" +.LC78: + .ascii "swblk %x ,avg = %x max= %x vpc= %x,ec=%x ,max ec=%x" + .ascii "\012\000" +.LC79: + .ascii "FtlGcRefreshBlock 0x%x\012\000" +.LC80: + .ascii "FtlGcMarkBadPhyBlk %d 0x%x\012\000" +.LC81: + .ascii "%s error allocating memory. return -1\012\000" +.LC82: + .ascii "%s %p:0x%x:\000" +.LC83: + .ascii "%x \000" +.LC84: + .ascii "\000" +.LC85: + .ascii "otp error! %d\000" +.LC86: + .ascii "rr\000" +.LC87: + .ascii "%d statReg->V6.mtrans_cnt=%d flReg.V6.page_num=%d\012" + .ascii "\000" +.LC88: + .ascii "nandc:\000" +.LC89: + .ascii "%d flReg.d32=%x %x\012\000" +.LC90: + .ascii "sdr read ok %x ecc=%d\012\000" +.LC91: + .ascii "sync para %d\012\000" +.LC92: + .ascii "TOG mode Read error %x %x\012\000" +.LC93: + .ascii "read retry status %x %x %x\012\000" +.LC94: + .ascii "micron RR %d row=%x,count %d,status=%d\012\000" +.LC95: + .ascii "samsung RR %d row=%x,count %d,status=%d\012\000" +.LC96: + .ascii "ECC:%d\012\000" +.LC97: + .ascii "No.%d FLASH ID:%x %x %x %x %x %x\012\000" +.LC98: + .ascii "FlashLoadPhyInfo fail %x!!\012\000" +.LC99: + .ascii "Read pageadd=%x ecc=%x err=%x\012\000" +.LC100: + .ascii "data:\000" +.LC101: + .ascii "spare:\000" +.LC102: + .ascii "ReadRetry pageadd=%x ecc=%x err=%x\012\000" +.LC103: + .ascii "FLFB:%d %d\012\000" +.LC104: + .ascii "prog error: = %x\012\000" +.LC105: + .ascii "prog read error: = %x\012\000" +.LC106: + .ascii "prog read REFRESH: = %x\012\000" +.LC107: + .ascii "prog read s error: = %x %x %x\012\000" +.LC108: + .ascii "prog read d error: = %x %x %x\012\000" +.LC109: + .ascii "id = %x,%x addr= %x,spare= %x %x %x %x data= %x\012" + .ascii "\000" +.LC110: + .ascii "...%s enter...\012\000" +.LC111: + .ascii "superBlkID = %x vpc=%x\012\000" +.LC112: + .ascii "flashmode = %x pagenum = %x %x\012\000" +.LC113: + .ascii "id = %x,%x addr= %x,spare= %x %x %x %x data=%x %x\012" + .ascii "\000" +.LC114: + .ascii "blk = %x vpc=%x mode = %x\012\000" +.LC115: + .ascii "mlc id = %x,%x addr= %x,spare= %x %x %x %x data=%x " + .ascii "%x\012\000" +.LC116: + .ascii "slc id = %x,%x addr= %x,spare= %x %x %x %x data=%x " + .ascii "%x\012\000" +.LC117: + .ascii "ftl_scan_all_ppa blk %x page %x flag: %x\012\000" +.LC118: + .ascii "ftl_scan_all_ppa blk %x page %x flag: %x .........." + .ascii "..... is bad block\012\000" +.LC119: + .ascii "addr= %x, status= %d,spare= %x %x %x %x data=%x %x\012" + .ascii "\000" +.LC120: + .ascii "%s finished\012\000" +.LC121: + .ascii "FlashMakeFactorBbt %d\012\000" +.LC122: + .ascii "bad block:%d %d\012\000" +.LC123: + .ascii "FMFB:%d %d\012\000" +.LC124: + .ascii "E:bad block:%d\012\000" +.LC125: + .ascii "FMFB:Save %d %d\012\000" +.LC126: + .ascii "FtlBbmTblFlush id=%x,page=%x,previd=%x cnt=%d\012\000" +.LC127: + .ascii "FtlBbmTblFlush error:%x\012\000" +.LC128: + .ascii "FtlBbmTblFlush error = %x error count = %d\012\000" +.LC129: + .ascii "FtlGcFreeBadSuperBlk 0x%x\012\000" +.LC130: + .ascii "decrement_vpc_count %x = %d\012\000" +.LC131: + .ascii "decrement_vpc_count %x = %d in free list\012\000" +.LC132: + .ascii "FtlVpcTblFlush error = %x error count = %d\012\000" +.LC133: + .ascii "page map lost: %x %x\012\000" +.LC134: + .ascii "FtlMapWritePage error = %x\012\000" +.LC135: + .ascii "FtlMapWritePage error = %x error count = %d\012\000" +.LC136: + .ascii "FtlVendorPartRead refresh = %x phyAddr = %x\012\000" +.LC137: + .ascii "no ect\000" +.LC138: + .ascii "slc mode\000" +.LC139: + .ascii "BBT:\000" +.LC140: + .ascii "region_id = %x phyAddr = %x\012\000" +.LC141: + .ascii "map_ppn:\000" +.LC142: + .ascii "load_l2p_region refresh = %x phyAddr = %x\012\000" +.LC143: + .ascii "FtlCheckVpc2 %x = %x %x\012\000" +.LC144: + .ascii "free blk vpc error %x = %x %x\012\000" +.LC145: + .ascii "error_flag %x\012\000" +.LC146: + .ascii "Ftlscanalldata = %x\012\000" +.LC147: + .ascii "scan lpa = %x ppa= %x\012\000" +.LC148: + .ascii "lba = %x,addr= %x,spare= %x %x %x %x data=%x %x\012" + .ascii "\000" +.LC149: + .ascii "RSB refresh addr %x\012\000" +.LC150: + .ascii "spuer block %x vpn is 0\012 \000" +.LC151: + .ascii "g_recovery_ppa %x ver %x\012 \000" +.LC152: + .ascii "FtlCheckVpc %x = %x %x\012\000" +.LC153: + .ascii "FtlGcScanTempBlk Error ID %x %x!!!!!!! \012\000" +.LC154: + .ascii "FtlGcScanTempBlkError ID %x %x!!!!!!!\012\000" +.LC155: + .ascii "GC des block %x done\012\000" +.LC156: + .ascii "too many bad block = %d %d\012\000" +.LC157: + .ascii "%d GC datablk = %x vpc %x %x\012\000" +.LC158: + .ascii "SWL %x, FSB = %x vpc= %x,ec=%x th=%x\012\000" +.LC159: + .ascii "Ftlwrite decrement_vpc_count %x = %d\012\000" +.LC160: + .ascii "rk_ftl_de_init %x\012\000" +.LC161: + .ascii "...%s: no bad block mapping table, format device\012" + .ascii "\000" +.LC162: + .ascii "...%s FtlSysBlkInit error ,format device!\012\000" +.LC163: + .ascii "FtlInit %x\012\000" +.LC164: + .ascii "fix power lost blk = %x vpc=%x\012\000" +.LC165: + .ascii "erase power lost blk = %x vpc=%x\012\000" +.LC166: + .ascii "FtlWrite: lpa error:%x %x\012\000" +.LC167: + .ascii "id = %x,%x addr= %x,spare= %x %x %x %x data = %x\012" + .ascii "\000" +.LC168: + .ascii ":\000" +.LC169: + .ascii "phyBlk = %x,addr= %x,spare= %x %x %x %x data=%x %x\012" + .ascii "\000" +.LC170: + .ascii "Mblk:\000" +.LC171: + .ascii "L2P:\000" +.LC172: + .ascii "L2PC:\000" +.LC173: + .ascii "write_idblock fix data %x %x\012\000" +.LC174: + .ascii "idblk:\000" +.LC175: + .ascii "idb reverse %x %x\012\000" +.LC176: + .ascii "write_idblock totle_sec %x %x %x %x\012\000" +.LC177: + .ascii "IDBlockWriteData %x %x\012\000" +.LC178: + .ascii "IDBlockWriteData %x %x ret= %x\012\000" +.LC179: + .ascii "IdBlockReadData %x %x\012\000" +.LC180: + .ascii "IdBlockReadData %x %x ret= %x\012\000" +.LC181: + .ascii "write and check error:%d idb=%x,offset=%x,r=%x,w=%x" + .ascii "\012\000" +.LC182: + .ascii "write\000" +.LC183: + .ascii "read\000" +.LC184: + .ascii "write_idblock error %d\012\000" +.LC185: + .ascii "wl_lba %p %x %x %x\012\000" +.LC186: + .ascii "RKNAND_GET_DRM_KEY\012\000" +.LC187: + .ascii "rk_copy_from_user error\012\000" +.LC188: + .ascii "RKNAND_STORE_DRM_KEY\012\000" +.LC189: + .ascii "RKNAND_DIASBLE_SECURE_BOOT\012\000" +.LC190: + .ascii "RKNAND_ENASBLE_SECURE_BOOT\012\000" +.LC191: + .ascii "RKNAND_GET_SN_SECTOR\012\000" +.LC192: + .ascii "RKNAND_LOADER_UNLOCK\012\000" +.LC193: + .ascii "RKNAND_LOADER_STATUS\012\000" +.LC194: + .ascii "RKNAND_LOADER_LOCK\012\000" +.LC195: + .ascii "LockKey not match %d\012\000" +.LC196: + .ascii "RKNAND_GET_VENDOR_SECTOR\012\000" +.LC197: + .ascii "RKNAND_STORE_VENDOR_SECTOR\012\000" +.LC198: + .ascii "return ret = %lx\012\000" +.LC199: + .ascii "secureBootEn check error\012\000" +.LC200: + .ascii "\0013vendor storage %x,%x,%x\012\000" diff --git a/drivers/rk_nand/rk_ftl_arm_v8.S b/drivers/rk_nand/rk_ftl_arm_v8.S new file mode 100644 index 00000000000..537155f1fcd --- /dev/null +++ b/drivers/rk_nand/rk_ftl_arm_v8.S @@ -0,0 +1,27968 @@ +/* + * Copyright (c) 2016-2017, Fuzhou Rockchip Electronics Co., Ltd + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * date: 2021-07-16 + */ + .file "rk_ftl_arm_v8.S" + .text + .align 2 + .type flash_read_ecc, %function +flash_read_ecc: + stp x29, x30, [sp, -32]! + ubfiz x0, x0, 4, 8 + adrp x1, .LANCHOR0 + add x1, x1, :lo12:.LANCHOR0 + add x2, x1, x0 + add x29, sp, 0 + str x19, [sp, 16] + ldr x0, [x1, x0] + ldrb w19, [x2, 8] + add x19, x0, x19, lsl 8 + mov w0, 122 + str w0, [x19, 2056] + mov x0, 400 + bl __const_udelay + ldr w1, [x19, 2048] + ldr w0, [x19, 2048] + and w1, w1, 15 + and w0, w0, 15 + cmp w1, w0 + csel w1, w1, w0, cs + ldr w0, [x19, 2048] + ldr w2, [x19, 2048] + and w0, w0, 15 + ldr x19, [sp, 16] + and w2, w2, 15 + cmp w0, w2 + csel w0, w0, w2, cs + cmp w0, w1 + csel w0, w0, w1, cs + ldp x29, x30, [sp], 32 + ret + .size flash_read_ecc, .-flash_read_ecc + .align 2 + .type ftl_set_blk_mode.part.9, %function +ftl_set_blk_mode.part.9: + and w0, w0, 65535 + adrp x2, .LANCHOR0+64 + ubfx x1, x0, 5, 11 + ldr x3, [x2, #:lo12:.LANCHOR0+64] + lsl x1, x1, 2 + mov w2, 1 + lsl w2, w2, w0 + ldr w0, [x3, x1] + orr w0, w0, w2 + str w0, [x3, x1] + ret + .size ftl_set_blk_mode.part.9, .-ftl_set_blk_mode.part.9 + .align 2 + .global FlashMemCmp8 + .type FlashMemCmp8, %function +FlashMemCmp8: + adrp x3, .LANCHOR0+72 + ldrb w3, [x3, #:lo12:.LANCHOR0+72] + cbz w3, .L9 + ldrb w4, [x0, 1] + ldrb w3, [x1, 1] + cmp w4, w3 + beq .L10 +.L9: + mov x3, 0 +.L7: + mov w4, w3 + cmp w3, w2 + bcc .L8 +.L10: + mov w0, 0 + ret +.L8: + ldrb w5, [x0, x3] + add x3, x3, 1 + add x6, x1, x3 + ldrb w6, [x6, -1] + cmp w6, w5 + beq .L7 + add w0, w4, 1 + ret + .size FlashMemCmp8, .-FlashMemCmp8 + .align 2 + .global FlashRsvdBlkChk + .type FlashRsvdBlkChk, %function +FlashRsvdBlkChk: + adrp x2, .LANCHOR0 + add x2, x2, :lo12:.LANCHOR0 + and w0, w0, 255 + ldrb w3, [x2, 73] + ldr w2, [x2, 76] + mul w2, w3, w2 + cmp w2, w1 + bls .L14 + cmp w0, 0 + cset w0, ne + ret +.L14: + mov w0, 1 + ret + .size FlashRsvdBlkChk, .-FlashRsvdBlkChk + .align 2 + .global FlashGetRandomizer + .type FlashGetRandomizer, %function +FlashGetRandomizer: + and x3, x1, 127 + adrp x2, .LANCHOR1 + add x2, x2, :lo12:.LANCHOR1 + ldrh w4, [x2, x3, lsl 1] + adrp x2, .LANCHOR0+80 + ldrb w2, [x2, #:lo12:.LANCHOR0+80] + cbz w2, .L23 + stp x29, x30, [sp, -16]! + and w0, w0, 255 + add x29, sp, 0 + bl FlashRsvdBlkChk + cmp w0, 0 + orr w1, w4, -1073741824 + csel w4, w1, w4, ne + mov w0, w4 + ldp x29, x30, [sp], 16 + ret +.L23: + mov w0, w4 + ret + .size FlashGetRandomizer, .-FlashGetRandomizer + .align 2 + .global FlashSetRandomizer + .type FlashSetRandomizer, %function +FlashSetRandomizer: + and x2, x1, 127 + and w6, w0, 255 + adrp x0, .LANCHOR1 + add x0, x0, :lo12:.LANCHOR1 + ldrh w5, [x0, x2, lsl 1] + adrp x0, .LANCHOR0 + add x2, x0, :lo12:.LANCHOR0 + mov x4, x0 + ldrb w2, [x2, 80] + cbz w2, .L34 + stp x29, x30, [sp, -16]! + mov w0, w6 + add x29, sp, 0 + bl FlashRsvdBlkChk + cmp w0, 0 + sbfiz x6, x6, 4, 32 + add x0, x4, :lo12:.LANCHOR0 + orr w1, w5, -1073741824 + csel w5, w1, w5, ne + ldr x0, [x0, x6] + str w5, [x0, 336] + ldp x29, x30, [sp], 16 + ret +.L34: + add x0, x0, :lo12:.LANCHOR0 + sbfiz x6, x6, 4, 32 + ldr x0, [x0, x6] + str w5, [x0, 336] + ret + .size FlashSetRandomizer, .-FlashSetRandomizer + .align 2 + .global FlashBlockAlignInit + .type FlashBlockAlignInit, %function +FlashBlockAlignInit: + and w0, w0, 65535 + adrp x1, .LANCHOR0 + cmp w0, 512 + add x1, x1, :lo12:.LANCHOR0 + bls .L38 + mov w0, 1024 +.L42: + str w0, [x1, 76] + ret +.L38: + cmp w0, 256 + bls .L40 + mov w0, 512 + b .L42 +.L40: + cmp w0, 128 + bls .L42 + mov w0, 256 + b .L42 + .size FlashBlockAlignInit, .-FlashBlockAlignInit + .align 2 + .global FlashReadCmd + .type FlashReadCmd, %function +FlashReadCmd: + and w0, w0, 255 + adrp x3, .LANCHOR0 + sbfiz x2, x0, 4, 32 + add x3, x3, :lo12:.LANCHOR0 + stp x29, x30, [sp, -16]! + add x4, x3, x2 + add x29, sp, 0 + ldr x2, [x3, x2] + ldr x3, [x3, 88] + ldrb w4, [x4, 8] + ldrb w3, [x3, 7] + cmp w3, 1 + bne .L44 + sxtw x3, w4 + mov w5, 38 + add x3, x3, 8 + add x3, x2, x3, lsl 8 + str w5, [x3, 8] +.L44: + ubfiz x4, x4, 8, 8 + and w3, w1, 255 + add x2, x2, x4 + str wzr, [x2, 2056] + str wzr, [x2, 2052] + str wzr, [x2, 2052] + str w3, [x2, 2052] + lsr w3, w1, 8 + str w3, [x2, 2052] + lsr w3, w1, 16 + str w3, [x2, 2052] + mov w3, 48 + str w3, [x2, 2056] + bl FlashSetRandomizer + ldp x29, x30, [sp], 16 + ret + .size FlashReadCmd, .-FlashReadCmd + .align 2 + .global FlashReadDpDataOutCmd + .type FlashReadDpDataOutCmd, %function +FlashReadDpDataOutCmd: + and w0, w0, 255 + adrp x3, .LANCHOR0 + sbfiz x2, x0, 4, 32 + add x3, x3, :lo12:.LANCHOR0 + stp x29, x30, [sp, -16]! + add x4, x3, x2 + and w5, w1, 255 + add x29, sp, 0 + ldr x6, [x3, x2] + ldrb w2, [x3, 112] + lsr w3, w1, 16 + cmp w2, 1 + ldrb w2, [x4, 8] + lsr w4, w1, 8 + add x2, x6, x2, lsl 8 + bne .L47 + mov w6, 6 + str w6, [x2, 2056] + str wzr, [x2, 2052] + str wzr, [x2, 2052] + str w5, [x2, 2052] + str w4, [x2, 2052] + str w3, [x2, 2052] +.L50: + mov w3, 224 + str w3, [x2, 2056] + bl FlashSetRandomizer + ldp x29, x30, [sp], 16 + ret +.L47: + str wzr, [x2, 2056] + str wzr, [x2, 2052] + str wzr, [x2, 2052] + str w5, [x2, 2052] + str w4, [x2, 2052] + str w3, [x2, 2052] + mov w3, 5 + str w3, [x2, 2056] + str wzr, [x2, 2052] + str wzr, [x2, 2052] + b .L50 + .size FlashReadDpDataOutCmd, .-FlashReadDpDataOutCmd + .align 2 + .global FlashProgFirstCmd + .type FlashProgFirstCmd, %function +FlashProgFirstCmd: + and w0, w0, 255 + adrp x4, .LANCHOR0 + sbfiz x5, x0, 4, 32 + add x4, x4, :lo12:.LANCHOR0 + add x2, x4, x5 + stp x29, x30, [sp, -16]! + lsr w3, w1, 16 + add x29, sp, 0 + ldr x4, [x4, x5] + ldrb w2, [x2, 8] + add x2, x4, x2, lsl 8 + mov w4, 128 + str w4, [x2, 2056] + and w4, w1, 255 + str wzr, [x2, 2052] + str wzr, [x2, 2052] + str w4, [x2, 2052] + lsr w4, w1, 8 + str w4, [x2, 2052] + str w3, [x2, 2052] + bl FlashSetRandomizer + ldp x29, x30, [sp], 16 + ret + .size FlashProgFirstCmd, .-FlashProgFirstCmd + .align 2 + .global FlashEraseCmd + .type FlashEraseCmd, %function +FlashEraseCmd: + ubfiz x0, x0, 4, 8 + adrp x3, .LANCHOR0 + add x3, x3, :lo12:.LANCHOR0 + add x5, x3, x0 + ldr x4, [x3, x0] + ldrb w0, [x5, 8] + cbz w2, .L54 + add x2, x4, x0, lsl 8 + mov w5, 96 + str w5, [x2, 2056] + and w5, w1, 255 + str w5, [x2, 2052] + lsr w5, w1, 8 + str w5, [x2, 2052] + lsr w5, w1, 16 + str w5, [x2, 2052] + ldr w2, [x3, 76] + add w1, w1, w2 +.L54: + add x0, x4, x0, lsl 8 + mov w2, 96 + str w2, [x0, 2056] + and w2, w1, 255 + str w2, [x0, 2052] + lsr w2, w1, 8 + str w2, [x0, 2052] + lsr w1, w1, 16 + str w1, [x0, 2052] + mov w1, 208 + str w1, [x0, 2056] + ret + .size FlashEraseCmd, .-FlashEraseCmd + .align 2 + .global FlashProgDpSecondCmd + .type FlashProgDpSecondCmd, %function +FlashProgDpSecondCmd: + and w0, w0, 255 + adrp x4, .LANCHOR0 + sbfiz x5, x0, 4, 32 + add x4, x4, :lo12:.LANCHOR0 + add x2, x4, x5 + stp x29, x30, [sp, -16]! + lsr w3, w1, 16 + add x29, sp, 0 + ldrb w6, [x4, 107] + ldrb w2, [x2, 8] + ldr x4, [x4, x5] + add x2, x4, x2, lsl 8 + and w4, w1, 255 + str w6, [x2, 2056] + str wzr, [x2, 2052] + str wzr, [x2, 2052] + str w4, [x2, 2052] + lsr w4, w1, 8 + str w4, [x2, 2052] + str w3, [x2, 2052] + bl FlashSetRandomizer + ldp x29, x30, [sp], 16 + ret + .size FlashProgDpSecondCmd, .-FlashProgDpSecondCmd + .align 2 + .global FlashProgSecondCmd + .type FlashProgSecondCmd, %function +FlashProgSecondCmd: + stp x29, x30, [sp, -32]! + ubfiz x0, x0, 4, 8 + adrp x1, .LANCHOR0 + add x1, x1, :lo12:.LANCHOR0 + add x29, sp, 0 + add x2, x1, x0 + stp x19, x20, [sp, 16] + ldr x20, [x1, x0] + mov x0, 36284 + ldrb w19, [x2, 8] + movk x0, 0x6, lsl 16 + bl __const_udelay + add x19, x19, 8 + mov w0, 16 + add x19, x20, x19, lsl 8 + str w0, [x19, 8] + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 32 + ret + .size FlashProgSecondCmd, .-FlashProgSecondCmd + .align 2 + .global FlashProgDpFirstCmd + .type FlashProgDpFirstCmd, %function +FlashProgDpFirstCmd: + ubfiz x0, x0, 4, 8 + adrp x1, .LANCHOR0 + add x1, x1, :lo12:.LANCHOR0 + add x3, x1, x0 + ldr x2, [x1, x0] + ldrb w0, [x3, 8] + ldrb w1, [x1, 106] + add x0, x0, 8 + add x0, x2, x0, lsl 8 + str w1, [x0, 8] + ret + .size FlashProgDpFirstCmd, .-FlashProgDpFirstCmd + .align 2 + .global FlashReadStatus + .type FlashReadStatus, %function +FlashReadStatus: + stp x29, x30, [sp, -32]! + ubfiz x0, x0, 4, 8 + adrp x1, .LANCHOR0 + add x1, x1, :lo12:.LANCHOR0 + add x29, sp, 0 + add x2, x1, x0 + str x19, [sp, 16] + ldr x0, [x1, x0] + ldrb w19, [x2, 8] + add x19, x0, x19, lsl 8 + mov w0, 112 + str w0, [x19, 2056] + mov x0, 400 + bl __const_udelay + ldr w0, [x19, 2048] + ldr x19, [sp, 16] + ldp x29, x30, [sp], 32 + ret + .size FlashReadStatus, .-FlashReadStatus + .align 2 + .global js_hash + .type js_hash, %function +js_hash: + mov x4, x0 + mov w0, 42982 + mov x3, 0 + movk w0, 0x47c6, lsl 16 +.L66: + cmp w1, w3 + bhi .L67 + ret +.L67: + lsr w2, w0, 2 + ldrb w5, [x4, x3] + add w2, w2, w0, lsl 5 + add x3, x3, 1 + add w2, w2, w5 + eor w0, w0, w2 + b .L66 + .size js_hash, .-js_hash + .align 2 + .global FlashLoadIdbInfo + .type FlashLoadIdbInfo, %function +FlashLoadIdbInfo: + mov w0, 0 + ret + .size FlashLoadIdbInfo, .-FlashLoadIdbInfo + .align 2 + .global FlashPrintInfo + .type FlashPrintInfo, %function +FlashPrintInfo: + ret + .size FlashPrintInfo, .-FlashPrintInfo + .align 2 + .global ToshibaSetRRPara + .type ToshibaSetRRPara, %function +ToshibaSetRRPara: + stp x29, x30, [sp, -80]! + and w1, w1, 255 + add w2, w1, 1 + add x29, sp, 0 + stp x21, x22, [sp, 32] + mov x21, x0 + mov w0, 5 + stp x23, x24, [sp, 48] + stp x25, x26, [sp, 64] + adrp x22, .LANCHOR0 + umull x2, w2, w0 + adrp x0, .LANCHOR1 + add x0, x0, :lo12:.LANCHOR1 + stp x19, x20, [sp, 16] + add x25, x0, 256 + add x24, x0, 352 + add x25, x25, x2 + add x24, x24, x2 + add x22, x22, :lo12:.LANCHOR0 + mov x19, x0 + add x23, x0, w1, sxtw + mov x20, 0 + mov w26, 85 +.L71: + ldrb w0, [x22, 129] + cmp w0, w20 + bhi .L75 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x29, x30, [sp], 80 + ret +.L75: + add x0, x19, 352 + str w26, [x21, 8] + ldrsb w0, [x20, x0] + str w0, [x21, 4] + mov x0, 1000 + bl __const_udelay + ldrb w0, [x22, 128] + cmp w0, 34 + bne .L72 + ldrsb w0, [x24, x20] +.L77: + add x20, x20, 1 + str w0, [x21] + b .L71 +.L72: + cmp w0, 35 + bne .L74 + ldrsb w0, [x25, x20] + b .L77 +.L74: + ldrsb w0, [x23, 400] + b .L77 + .size ToshibaSetRRPara, .-ToshibaSetRRPara + .align 2 + .global SamsungSetRRPara + .type SamsungSetRRPara, %function +SamsungSetRRPara: + stp x29, x30, [sp, -64]! + add x29, sp, 0 + stp x21, x22, [sp, 32] + mov x22, x0 + ubfiz x21, x1, 2, 8 + adrp x0, .LANCHOR1 + add x0, x0, :lo12:.LANCHOR1 + add x21, x21, 4 + add x0, x0, 408 + stp x19, x20, [sp, 16] + stp x23, x24, [sp, 48] + add x21, x0, x21 + adrp x23, .LANCHOR0 + mov x19, x0 + add x23, x23, :lo12:.LANCHOR0 + mov x20, 0 + mov w24, 161 +.L79: + ldrb w0, [x23, 129] + cmp w0, w20 + bhi .L80 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x29, x30, [sp], 64 + ret +.L80: + str w24, [x22, 8] + str wzr, [x22] + ldrsb w0, [x20, x19] + str w0, [x22] + ldrsb w0, [x21, x20] + add x20, x20, 1 + str w0, [x22] + mov x0, 1500 + bl __const_udelay + b .L79 + .size SamsungSetRRPara, .-SamsungSetRRPara + .align 2 + .global ftl_flash_suspend + .type ftl_flash_suspend, %function +ftl_flash_suspend: + adrp x0, .LANCHOR0 + add x0, x0, :lo12:.LANCHOR0 + ldr x1, [x0, 136] + ldr w2, [x1] + str w2, [x0, 144] + ldr w2, [x1, 4] + str w2, [x0, 148] + ldr w2, [x1, 8] + str w2, [x0, 152] + ldr w2, [x1, 12] + str w2, [x0, 156] + ldr w2, [x1, 304] + str w2, [x0, 160] + ldr w2, [x1, 308] + str w2, [x0, 164] + ldr w2, [x1, 336] + ldr w1, [x1, 344] + stp w2, w1, [x0, 168] + ret + .size ftl_flash_suspend, .-ftl_flash_suspend + .align 2 + .global LogAddr2PhyAddr + .type LogAddr2PhyAddr, %function +LogAddr2PhyAddr: + adrp x6, .LANCHOR0 + add x7, x6, :lo12:.LANCHOR0 + and w4, w4, 255 + ldrh w9, [x7, 188] + ldrh w5, [x7, 190] + ldrh w8, [x7, 76] + ldrb w7, [x7, 72] + cmp w7, 1 + ldr w7, [x0, 4] + mul w5, w5, w9 + ubfx x11, x7, 10, 16 + and w9, w5, 65535 + ubfiz w5, w8, 1, 15 + and w7, w7, 1023 + csel w8, w5, w8, eq + cmp w1, 1 + udiv w5, w11, w9 + and w10, w5, 65535 + msub w5, w5, w9, w11 + and w5, w5, 65535 + bne .L85 + add x1, x6, :lo12:.LANCHOR0 + ldrb w9, [x1, 204] + cbnz w9, .L85 + add x1, x1, 208 + ldrh w7, [x1, w7, sxtw 1] +.L85: + add x6, x6, :lo12:.LANCHOR0 + uxtw x1, w10 + add x6, x6, 1232 + cmp w4, 1 + ldr w1, [x6, x1, lsl 2] + madd w5, w5, w8, w1 + add w5, w5, w7 + str w5, [x2] + str w10, [x3] + bls .L87 + ldr w1, [x0, 4] + ldr w0, [x0, 60] + add w1, w1, 1024 + cmp w1, w0 + cset w0, eq + ret +.L87: + mov w0, 0 + ret + .size LogAddr2PhyAddr, .-LogAddr2PhyAddr + .align 2 + .global FlashReadStatusEN + .type FlashReadStatusEN, %function +FlashReadStatusEN: + stp x29, x30, [sp, -32]! + ubfiz x0, x0, 4, 8 + adrp x4, .LANCHOR0 + add x3, x4, :lo12:.LANCHOR0 + add x29, sp, 0 + stp x19, x20, [sp, 16] + add x5, x3, x0 + ldr x20, [x3, x0] + ldr x0, [x3, 88] + ldrb w19, [x5, 8] + ldrb w0, [x0, 8] + cmp w0, 2 + bne .L89 + and w2, w2, 255 + add x3, x3, 96 + cbnz w2, .L90 + ldrb w2, [x3, 13] +.L100: + add x0, x19, 8 + add x4, x4, :lo12:.LANCHOR0 + add x0, x20, x0, lsl 8 + str w2, [x0, 8] + ldrb w4, [x4, 111] + cbz w4, .L94 + add x3, x19, 8 + mov w2, 0 + add x3, x20, x3, lsl 8 +.L93: + cmp w2, w4 + bcc .L95 +.L94: + add x19, x19, 8 + mov x0, 400 + lsl x19, x19, 8 + bl __const_udelay + ldr w0, [x20, x19] + ldp x19, x20, [sp, 16] + and w0, w0, 255 + ldp x29, x30, [sp], 32 + ret +.L90: + ldrb w2, [x3, 14] + b .L100 +.L95: + lsl w0, w2, 3 + add w2, w2, 1 + lsr w0, w1, w0 + and w0, w0, 255 + str w0, [x3, 4] + b .L93 +.L89: + add x0, x19, 8 + mov w1, 112 + add x0, x20, x0, lsl 8 + str w1, [x0, 8] + b .L94 + .size FlashReadStatusEN, .-FlashReadStatusEN + .align 2 + .global FlashWaitReadyEN + .type FlashWaitReadyEN, %function +FlashWaitReadyEN: + stp x29, x30, [sp, -48]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + and w19, w0, 255 + str x21, [sp, 32] + mov w20, w1 + and w21, w2, 255 +.L102: + mov w1, w20 + mov w2, w21 + mov w0, w19 + bl FlashReadStatusEN + mov w1, w0 + cmp w0, 255 + beq .L102 + tbnz x1, 6, .L101 + mov x1, 3 + mov x0, 1 + bl usleep_range + b .L102 +.L101: + ldp x19, x20, [sp, 16] + ldr x21, [sp, 32] + ldp x29, x30, [sp], 48 + ret + .size FlashWaitReadyEN, .-FlashWaitReadyEN + .align 2 + .global FlashScheduleEnSet + .type FlashScheduleEnSet, %function +FlashScheduleEnSet: + adrp x1, .LANCHOR0 + add x1, x1, :lo12:.LANCHOR0 + ldr w2, [x1, 1264] + str w0, [x1, 1264] + mov w0, w2 + ret + .size FlashScheduleEnSet, .-FlashScheduleEnSet + .align 2 + .global FlashGetPageSize + .type FlashGetPageSize, %function +FlashGetPageSize: + adrp x0, .LANCHOR0+88 + ldr x0, [x0, #:lo12:.LANCHOR0+88] + ldrb w0, [x0, 9] + ret + .size FlashGetPageSize, .-FlashGetPageSize + .align 2 + .global NandcReadDontCaseBusyEn + .type NandcReadDontCaseBusyEn, %function +NandcReadDontCaseBusyEn: + ret + .size NandcReadDontCaseBusyEn, .-NandcReadDontCaseBusyEn + .align 2 + .global NandcGetChipIf + .type NandcGetChipIf, %function +NandcGetChipIf: + ubfiz x0, x0, 4, 8 + adrp x1, .LANCHOR0 + add x1, x1, :lo12:.LANCHOR0 + add x2, x1, x0 + ldr x0, [x1, x0] + ldrb w2, [x2, 8] + add x2, x2, 8 + add x0, x0, x2, lsl 8 + ret + .size NandcGetChipIf, .-NandcGetChipIf + .align 2 + .global NandcSetDdrPara + .type NandcSetDdrPara, %function +NandcSetDdrPara: + adrp x1, .LANCHOR0+136 + and w0, w0, 255 + lsl w2, w0, 8 + ldr x1, [x1, #:lo12:.LANCHOR0+136] + orr w0, w2, w0, lsl 16 + orr w0, w0, 1 + str w0, [x1, 304] + ret + .size NandcSetDdrPara, .-NandcSetDdrPara + .align 2 + .global NandcSetDdrDiv + .type NandcSetDdrDiv, %function +NandcSetDdrDiv: + adrp x1, .LANCHOR0+136 + and w0, w0, 255 + mov w2, 16640 + orr w0, w0, w2 + ldr x1, [x1, #:lo12:.LANCHOR0+136] + str w0, [x1, 344] + ret + .size NandcSetDdrDiv, .-NandcSetDdrDiv + .align 2 + .global NandcSetDdrMode + .type NandcSetDdrMode, %function +NandcSetDdrMode: + adrp x1, .LANCHOR0+136 + cmp w0, 0 + ldr x2, [x1, #:lo12:.LANCHOR0+136] + ldr w1, [x2] + and w3, w1, -8193 + orr w1, w1, 253952 + csel w1, w1, w3, ne + str w1, [x2] + ret + .size NandcSetDdrMode, .-NandcSetDdrMode + .align 2 + .global NandcSetMode + .type NandcSetMode, %function +NandcSetMode: + adrp x1, .LANCHOR0+136 + and w0, w0, 255 + tst w0, 6 + ldr x2, [x1, #:lo12:.LANCHOR0+136] + ldr w1, [x2] + beq .L118 + orr w1, w1, 24576 + tst x0, 4 + and w1, w1, -32769 + mov w0, 8322 + orr w1, w1, 196608 + str w0, [x2, 344] + mov w0, 4099 + orr w3, w1, 32768 + movk w0, 0x10, lsl 16 + str w0, [x2, 304] + csel w1, w3, w1, ne + mov w0, 38 + str w0, [x2, 308] + mov w0, 39 + str w0, [x2, 308] +.L120: + mov w0, 0 + str w1, [x2] + ret +.L118: + and w1, w1, -8193 + b .L120 + .size NandcSetMode, .-NandcSetMode + .align 2 + .global NandcFlashCs + .type NandcFlashCs, %function +NandcFlashCs: + ubfiz x0, x0, 4, 8 + adrp x1, .LANCHOR0 + add x1, x1, :lo12:.LANCHOR0 + add x3, x1, x0 + ldr x2, [x1, x0] + mov w1, 1 + ldrb w3, [x3, 8] + ldr w0, [x2] + lsl w1, w1, w3 + bfi w0, w1, 0, 8 + str w0, [x2] + ret + .size NandcFlashCs, .-NandcFlashCs + .align 2 + .global NandcFlashDeCs + .type NandcFlashDeCs, %function +NandcFlashDeCs: + ubfiz x0, x0, 4, 8 + adrp x1, .LANCHOR0 + add x1, x1, :lo12:.LANCHOR0 + ldr x1, [x1, x0] + ldr w0, [x1] + and w0, w0, -256 + and w0, w0, -131073 + str w0, [x1] + ret + .size NandcFlashDeCs, .-NandcFlashDeCs + .align 2 + .global HynixSetRRPara + .type HynixSetRRPara, %function +HynixSetRRPara: + stp x29, x30, [sp, -96]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x20, .LANCHOR0 + stp x23, x24, [sp, 48] + and w23, w0, 255 + add x0, x20, :lo12:.LANCHOR0 + stp x21, x22, [sp, 32] + str x27, [sp, 80] + and w27, w1, 255 + stp x25, x26, [sp, 64] + mov x21, x2 + and w22, w3, 255 + ldr x1, [x0, 88] + ldrb w1, [x1, 19] + cmp w1, 6 + bne .L126 + ubfiz x19, x23, 6, 8 + add x0, x0, 1272 + add x19, x19, 20 + add x19, x19, w22, uxtw 2 +.L133: + add x19, x0, x19 +.L127: + sxtw x26, w23 + add x0, x20, :lo12:.LANCHOR0 + lsl x1, x26, 4 + and x27, x27, 255 + add x2, x0, x1 + mov x25, 0 + ldr x24, [x0, x1] + mov w0, w23 + ldrb w5, [x2, 8] + bl NandcFlashCs + ubfiz x5, x5, 8, 8 + add x24, x24, x5 + mov w0, 54 + str w0, [x24, 2056] +.L130: + cmp x25, x27 + bne .L131 + add x20, x20, :lo12:.LANCHOR0 + mov w0, 22 + add x20, x20, x26 + str w0, [x24, 2056] + mov w0, w23 + bl NandcFlashDeCs + strb w22, [x20, 2128] + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldr x27, [sp, 80] + ldp x29, x30, [sp], 96 + ret +.L126: + cmp w1, 7 + bne .L128 + mov w19, 160 + mov x1, 28 + add x0, x0, 1272 + umaddl x1, w19, w23, x1 + mov w19, 10 + umaddl x19, w22, w19, x1 + b .L133 +.L128: + cmp w1, 8 + bne .L129 + add x0, x0, 1300 + add w19, w22, w22, lsl 2 + add x19, x0, w19, sxtw + b .L127 +.L129: + and x19, x22, 255 + add x19, x19, 2 + add x19, x19, w23, uxtw 3 + add x19, x0, x19, lsl 3 + add x19, x19, 1276 + b .L127 +.L131: + ldrb w0, [x21, x25] + str w0, [x24, 2052] + mov x0, 1000 + bl __const_udelay + ldrsb w0, [x19, x25] + add x25, x25, 1 + str w0, [x24, 2048] + b .L130 + .size HynixSetRRPara, .-HynixSetRRPara + .align 2 + .global FlashSetReadRetryDefault + .type FlashSetReadRetryDefault, %function +FlashSetReadRetryDefault: + stp x29, x30, [sp, -48]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x19, .LANCHOR0 + add x19, x19, :lo12:.LANCHOR0 + stp x21, x22, [sp, 32] + ldr x0, [x19, 88] + ldrb w0, [x0, 19] + sub w0, w0, #1 + and w0, w0, 255 + cmp w0, 7 + bhi .L134 + add x21, x19, 2132 + add x22, x19, 1276 + mov x20, 0 +.L137: + lsl x1, x20, 3 + and w0, w20, 255 + ldrb w1, [x1, x21] + cmp w1, 173 + bne .L136 + ldrb w1, [x19, 1273] + mov w3, 0 + mov x2, x22 + bl HynixSetRRPara +.L136: + add x20, x20, 1 + cmp x20, 4 + bne .L137 +.L134: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x29, x30, [sp], 48 + ret + .size FlashSetReadRetryDefault, .-FlashSetReadRetryDefault + .align 2 + .global FlashWaitCmdDone + .type FlashWaitCmdDone, %function +FlashWaitCmdDone: + and x5, x0, 255 + mov x0, 24 + stp x29, x30, [sp, -32]! + adrp x4, .LANCHOR0 + add x4, x4, :lo12:.LANCHOR0 + mul x0, x5, x0 + add x29, sp, 0 + add x1, x4, 2164 + stp x19, x20, [sp, 16] + add x19, x1, x0 + ldr x2, [x19, 8] + cbz x2, .L143 + ldrb w20, [x1, x0] + mov w0, w20 + bl NandcFlashCs + add x4, x4, 1232 + ldr w1, [x19, 4] + ldr w0, [x4, x5, lsl 2] + cmp w0, 0 + mov w0, w20 + cset w2, ne + bl FlashWaitReadyEN + mov w2, w0 + mov w0, w20 + bl NandcFlashDeCs + sbfx x0, x2, 0, 1 + ldr x1, [x19, 8] + str w0, [x1] + str xzr, [x19, 8] + ldr x1, [x19, 16] + cbz x1, .L143 + str w0, [x1] + str xzr, [x19, 16] +.L143: + mov w0, 0 + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 32 + ret + .size FlashWaitCmdDone, .-FlashWaitCmdDone + .align 2 + .global NandcDelayns + .type NandcDelayns, %function +NandcDelayns: + stp x29, x30, [sp, -16]! + uxtw x0, w0 + add x29, sp, 0 + bl __ndelay + mov w0, 0 + ldp x29, x30, [sp], 16 + ret + .size NandcDelayns, .-NandcDelayns + .align 2 + .global NandcWaitFlashReadyNoDelay + .type NandcWaitFlashReadyNoDelay, %function +NandcWaitFlashReadyNoDelay: + stp x29, x30, [sp, -48]! + ubfiz x0, x0, 4, 8 + adrp x1, .LANCHOR0 + add x1, x1, :lo12:.LANCHOR0 + add x29, sp, 0 + stp x19, x20, [sp, 16] + mov w19, 34464 + movk w19, 0x1, lsl 16 + ldr x20, [x1, x0] +.L153: + ldr w0, [x20] + str w0, [x29, 40] + ldr w0, [x29, 40] + tbnz x0, 9, .L154 + mov x0, 50 + bl __const_udelay + subs w19, w19, #1 + bne .L153 + mov w0, -1 +.L151: + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 48 + ret +.L154: + mov w0, 0 + b .L151 + .size NandcWaitFlashReadyNoDelay, .-NandcWaitFlashReadyNoDelay + .align 2 + .global NandcWaitFlashReady + .type NandcWaitFlashReady, %function +NandcWaitFlashReady: + stp x29, x30, [sp, -48]! + ubfiz x0, x0, 4, 8 + adrp x1, .LANCHOR0 + add x1, x1, :lo12:.LANCHOR0 + add x29, sp, 0 + stp x19, x20, [sp, 16] + mov w19, 34464 + movk w19, 0x1, lsl 16 + ldr x20, [x1, x0] + mov x0, 650 + bl __const_udelay +.L159: + ldr w0, [x20] + str w0, [x29, 40] + ldr w0, [x29, 40] + tbnz x0, 9, .L160 + mov x1, 2 + mov x0, 1 + bl usleep_range + subs w19, w19, #1 + bne .L159 + mov w0, -1 +.L157: + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 48 + ret +.L160: + mov w0, 0 + b .L157 + .size NandcWaitFlashReady, .-NandcWaitFlashReady + .align 2 + .global FlashReset + .type FlashReset, %function +FlashReset: + stp x29, x30, [sp, -32]! + add x29, sp, 0 + str x19, [sp, 16] + and w19, w0, 255 + sbfiz x1, x19, 4, 32 + adrp x0, .LANCHOR0 + add x0, x0, :lo12:.LANCHOR0 + add x2, x0, x1 + ldr x5, [x0, x1] + mov w0, w19 + ldrb w4, [x2, 8] + bl NandcFlashCs + add x4, x4, 8 + add x4, x5, x4, lsl 8 + mov w0, 255 + str w0, [x4, 8] + mov w0, w19 + bl NandcWaitFlashReady + mov w0, w19 + bl NandcFlashDeCs + ldr x19, [sp, 16] + ldp x29, x30, [sp], 32 + ret + .size FlashReset, .-FlashReset + .align 2 + .global flash_enter_slc_mode + .type flash_enter_slc_mode, %function +flash_enter_slc_mode: + stp x29, x30, [sp, -64]! + add x29, sp, 0 + stp x21, x22, [sp, 32] + adrp x21, .LANCHOR0 + add x4, x21, :lo12:.LANCHOR0 + stp x19, x20, [sp, 16] + str x23, [sp, 48] + and w22, w0, 255 + ldrb w0, [x4, 204] + cbz w0, .L165 + mov w0, w22 + bl NandcFlashCs + sxtw x0, w22 + lsl x1, x0, 4 + add x0, x4, x0, lsl 3 + add x2, x4, x1 + ldrb w0, [x0, 2132] + ldr x23, [x4, x1] + ldrb w19, [x2, 8] + cmp w0, 44 + bne .L167 + ubfiz x20, x19, 8, 8 + mov w0, 239 + add x20, x23, x20 + str w0, [x20, 2056] + mov w0, 145 + str w0, [x20, 2052] + mov x0, 250 + bl __const_udelay + str wzr, [x20, 2048] + mov w0, 1 + str w0, [x20, 2048] + str wzr, [x20, 2048] + mov x0, 500 + str wzr, [x20, 2048] + bl __const_udelay +.L167: + add x19, x19, 8 + mov w0, w22 + add x19, x23, x19, lsl 8 + bl NandcWaitFlashReadyNoDelay + mov w0, 218 + add x21, x21, :lo12:.LANCHOR0 + str w0, [x19, 8] + mov w0, w22 + bl NandcWaitFlashReady + mov w0, 2 + strb w0, [x21, 2356] +.L165: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldr x23, [sp, 48] + ldp x29, x30, [sp], 64 + ret + .size flash_enter_slc_mode, .-flash_enter_slc_mode + .align 2 + .global flash_exit_slc_mode + .type flash_exit_slc_mode, %function +flash_exit_slc_mode: + stp x29, x30, [sp, -64]! + add x29, sp, 0 + stp x21, x22, [sp, 32] + adrp x21, .LANCHOR0 + add x4, x21, :lo12:.LANCHOR0 + stp x19, x20, [sp, 16] + str x23, [sp, 48] + and w22, w0, 255 + ldrb w0, [x4, 204] + cbz w0, .L172 + mov w0, w22 + bl NandcFlashCs + sxtw x0, w22 + lsl x1, x0, 4 + add x0, x4, x0, lsl 3 + add x2, x4, x1 + ldrb w0, [x0, 2132] + ldr x23, [x4, x1] + ldrb w19, [x2, 8] + cmp w0, 44 + bne .L174 + ubfiz x20, x19, 8, 8 + mov w0, 239 + add x20, x23, x20 + str w0, [x20, 2056] + mov w0, 145 + str w0, [x20, 2052] + mov x0, 250 + bl __const_udelay + mov w0, 2 + str w0, [x20, 2048] + mov w0, 1 + str w0, [x20, 2048] + str wzr, [x20, 2048] + mov x0, 500 + str wzr, [x20, 2048] + bl __const_udelay +.L174: + add x19, x19, 8 + mov w0, w22 + add x19, x23, x19, lsl 8 + bl NandcWaitFlashReadyNoDelay + add x21, x21, :lo12:.LANCHOR0 + mov w0, 223 + str w0, [x19, 8] + mov w0, w22 + bl NandcWaitFlashReady + strb wzr, [x21, 2356] +.L172: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldr x23, [sp, 48] + ldp x29, x30, [sp], 64 + ret + .size flash_exit_slc_mode, .-flash_exit_slc_mode + .align 2 + .global FlashEraseBlock + .type FlashEraseBlock, %function +FlashEraseBlock: + stp x29, x30, [sp, -48]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + and w19, w0, 255 + mov w20, w1 + str x21, [sp, 32] + mov w0, w19 + mov w21, w2 + bl NandcWaitFlashReady + mov w0, w19 + bl NandcFlashCs + mov w2, w21 + mov w1, w20 + mov w0, w19 + bl FlashEraseCmd + mov w0, w19 + bl NandcWaitFlashReady + mov w1, w20 + mov w0, w19 + bl FlashReadStatus + mov w2, w0 + mov w0, w19 + bl NandcFlashDeCs + and w0, w2, 1 + ldp x19, x20, [sp, 16] + ldr x21, [sp, 32] + ldp x29, x30, [sp], 48 + ret + .size FlashEraseBlock, .-FlashEraseBlock + .align 2 + .global FlashSetInterfaceMode + .type FlashSetInterfaceMode, %function +FlashSetInterfaceMode: + adrp x1, .LANCHOR0 + add x1, x1, :lo12:.LANCHOR0 + stp x29, x30, [sp, -16]! + add x6, x1, 8 + add x3, x1, 2132 + mov x5, 0 + add x29, sp, 0 + ldrb w2, [x1, 2357] + mov w12, 69 + mov w8, 239 + mov w9, 128 + and w11, w2, 4 + and w7, w2, 1 + mov w10, 1 + mov w13, 35 + mov w14, 32 + mov w15, 5 + mov w16, 44 +.L191: + ldrb w2, [x5, x3] + ldrb w4, [x6] + cmp w2, 152 + ccmp w2, w12, 4, ne + beq .L182 + cmp w2, 173 + ccmp w2, w16, 4, ne + bne .L183 +.L182: + cmp w0, 1 + ldr x1, [x6, -8] + bne .L184 + cbz w7, .L183 + ubfiz x4, x4, 8, 8 + cmp w2, 173 + add x1, x1, x4 + str w8, [x1, 2056] + bne .L185 + str w0, [x1, 2052] +.L203: + str wzr, [x1, 2048] + b .L189 +.L185: + cmp w2, 44 + bne .L187 + str w0, [x1, 2052] + str w15, [x1, 2048] +.L189: + str wzr, [x1, 2048] + str wzr, [x1, 2048] + str wzr, [x1, 2048] +.L183: + add x5, x5, 8 + add x6, x6, 16 + cmp x5, 32 + bne .L191 + mov w0, 0 + bl NandcWaitFlashReady + mov w0, 0 + ldp x29, x30, [sp], 16 + ret +.L187: + str w9, [x1, 2052] + str w0, [x1, 2048] + b .L189 +.L184: + cbz w11, .L183 + ubfiz x4, x4, 8, 8 + cmp w2, 173 + add x1, x1, x4 + str w8, [x1, 2056] + bne .L188 + str w10, [x1, 2052] + str w14, [x1, 2048] + b .L189 +.L188: + cmp w2, 44 + bne .L190 + str w10, [x1, 2052] + str w13, [x1, 2048] + b .L189 +.L190: + str w9, [x1, 2052] + b .L203 + .size FlashSetInterfaceMode, .-FlashSetInterfaceMode + .align 2 + .global FlashReadSpare + .type FlashReadSpare, %function +FlashReadSpare: + stp x29, x30, [sp, -32]! + and w0, w0, 255 + sbfiz x5, x0, 4, 32 + adrp x4, .LANCHOR0 + add x29, sp, 0 + stp x19, x20, [sp, 16] + mov x20, x2 + adrp x2, .LANCHOR1+481 + add x4, x4, :lo12:.LANCHOR0 + ldrb w3, [x2, #:lo12:.LANCHOR1+481] + add x2, x4, x5 + ldrb w19, [x2, 8] + lsl w3, w3, 9 + ldr x2, [x4, x5] + add x19, x2, x19, lsl 8 + and w2, w1, 255 + str wzr, [x19, 2056] + str w3, [x19, 2052] + lsr w3, w3, 8 + str w3, [x19, 2052] + str w2, [x19, 2052] + lsr w2, w1, 8 + str w2, [x19, 2052] + lsr w1, w1, 16 + str w1, [x19, 2052] + mov w1, 48 + str w1, [x19, 2056] + bl NandcWaitFlashReady + ldr w0, [x19, 2048] + strb w0, [x20] + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 32 + ret + .size FlashReadSpare, .-FlashReadSpare + .align 2 + .global SandiskProgTestBadBlock + .type SandiskProgTestBadBlock, %function +SandiskProgTestBadBlock: + stp x29, x30, [sp, -32]! + and w0, w0, 255 + sbfiz x3, x0, 4, 32 + adrp x2, .LANCHOR0 + add x2, x2, :lo12:.LANCHOR0 + add x29, sp, 0 + add x4, x2, x3 + str x19, [sp, 16] + ldr x2, [x2, x3] + ldrb w19, [x4, 8] + add x19, x2, x19, lsl 8 + mov w2, 162 + str w2, [x19, 2056] + mov w2, 128 + str w2, [x19, 2056] + and w2, w1, 255 + str wzr, [x19, 2052] + str wzr, [x19, 2052] + str w2, [x19, 2052] + lsr w2, w1, 8 + str w2, [x19, 2052] + lsr w1, w1, 16 + str w1, [x19, 2052] + mov w1, 16 + str w1, [x19, 2056] + bl NandcWaitFlashReady + mov w0, 112 + str w0, [x19, 2056] + mov x0, 400 + bl __const_udelay + ldr w0, [x19, 2048] + ldr x19, [sp, 16] + and w0, w0, 1 + ldp x29, x30, [sp], 32 + ret + .size SandiskProgTestBadBlock, .-SandiskProgTestBadBlock + .align 2 + .global SandiskSetRRPara + .type SandiskSetRRPara, %function +SandiskSetRRPara: + stp x29, x30, [sp, -32]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + mov x20, x0 + mov w0, 239 + and w19, w1, 255 + str w0, [x20, 8] + mov w0, 17 + str w0, [x20, 4] + mov x0, 1000 + bl __const_udelay + add w1, w19, 1 + mov w0, 5 + adrp x2, .LANCHOR0 + add x2, x2, :lo12:.LANCHOR0 + umull x1, w1, w0 + adrp x0, .LANCHOR1 + add x0, x0, :lo12:.LANCHOR1 + add x3, x0, 256 + add x0, x0, 352 + add x3, x3, x1 + add x0, x0, x1 + mov x1, 0 +.L209: + ldrb w4, [x2, 129] + cmp w4, w1 + bhi .L212 + mov w0, 0 + bl NandcWaitFlashReady + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 32 + ret +.L212: + ldrb w4, [x2, 128] + cmp w4, 67 + bne .L210 + ldrsb w4, [x0, x1] +.L214: + add x1, x1, 1 + str w4, [x20] + b .L209 +.L210: + ldrsb w4, [x3, x1] + b .L214 + .size SandiskSetRRPara, .-SandiskSetRRPara + .align 2 + .global micron_auto_read_calibration_config + .type micron_auto_read_calibration_config, %function +micron_auto_read_calibration_config: + stp x29, x30, [sp, -32]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + and w19, w0, 255 + mov w20, w1 + mov w0, w19 + bl NandcWaitFlashReady + sbfiz x0, x19, 4, 32 + adrp x2, .LANCHOR0 + add x2, x2, :lo12:.LANCHOR0 + add x1, x2, x0 + ldr x0, [x2, x0] + ldrb w19, [x1, 8] + add x19, x0, x19, lsl 8 + mov w0, 239 + str w0, [x19, 2056] + mov w0, 150 + str w0, [x19, 2052] + mov x0, 1000 + bl __const_udelay + str w20, [x19, 2048] + str wzr, [x19, 2048] + str wzr, [x19, 2048] + str wzr, [x19, 2048] + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 32 + ret + .size micron_auto_read_calibration_config, .-micron_auto_read_calibration_config + .align 2 + .global FlashEraseSLc2KBlocks + .type FlashEraseSLc2KBlocks, %function +FlashEraseSLc2KBlocks: + stp x29, x30, [sp, -80]! + add x29, sp, 0 + stp x23, x24, [sp, 48] + mov w23, 56 + stp x21, x22, [sp, 32] + adrp x21, .LANCHOR0 + umaddl x23, w1, w23, x0 + add x21, x21, :lo12:.LANCHOR0 + stp x19, x20, [sp, 16] + and w22, w1, 255 + mov x20, x0 + add x24, x21, 2164 +.L218: + cmp x20, x23 + bne .L223 + ldp x19, x20, [sp, 16] + mov w0, 0 + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x29, x30, [sp], 80 + ret +.L223: + mov w1, 0 + mov w4, w22 + add x3, x29, 76 + add x2, x29, 72 + mov x0, x20 + bl LogAddr2PhyAddr + ldrb w1, [x21, 2358] + ldr w0, [x29, 76] + cmp w1, w0 + bhi .L219 + mov w0, -1 + str w0, [x20] +.L220: + sub w22, w22, #1 + add x20, x20, 56 + and w22, w22, 255 + b .L218 +.L219: + uxtw x0, w0 + add x1, x21, x0 + ldrb w19, [x1, 2360] + mov x1, 24 + mul x0, x0, x1 + strb w19, [x24, x0] + mov w0, w19 + bl NandcWaitFlashReady + mov w0, w19 + bl NandcFlashCs + ldr w1, [x29, 72] + mov w2, 0 + mov w0, w19 + bl FlashEraseCmd + mov w0, w19 + bl NandcWaitFlashReady + ldr w1, [x29, 72] + mov w0, w19 + bl FlashReadStatus + sbfx x0, x0, 0, 1 + str w0, [x20] + mov w2, 0 + ldr w1, [x29, 72] + ldr w0, [x21, 76] + add w1, w1, w0 + mov w0, w19 + bl FlashEraseCmd + mov w0, w19 + bl NandcWaitFlashReady + ldr w1, [x29, 72] + mov w0, w19 + bl FlashReadStatus + tbz x0, 0, .L221 + mov w0, -1 + str w0, [x20] +.L221: + ldr w0, [x20] + cmn w0, #1 + bne .L222 + ldr w1, [x29, 72] + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk +.L222: + mov w0, w19 + bl NandcFlashDeCs + b .L220 + .size FlashEraseSLc2KBlocks, .-FlashEraseSLc2KBlocks + .align 2 + .global FlashEraseBlocks + .type FlashEraseBlocks, %function +FlashEraseBlocks: + stp x29, x30, [sp, -112]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x19, .LANCHOR0 + stp x21, x22, [sp, 32] + add x21, x19, :lo12:.LANCHOR0 + stp x23, x24, [sp, 48] + mov w24, w2 + stp x27, x28, [sp, 80] + mov w27, w1 + stp x25, x26, [sp, 64] + ldrb w1, [x21, 72] + cbnz w1, .L229 + mov x20, x0 + add x26, x21, 2164 + mov w22, 0 + mov w28, 56 +.L230: + cmp w22, w24 + bcc .L239 + add x19, x19, :lo12:.LANCHOR0 + mov x21, 0 + add x22, x19, 2164 + mov x23, 24 +.L240: + ldrb w0, [x19, 2358] + cmp w0, w21 + bhi .L242 + ldr w0, [x19, 2372] + cbnz w0, .L243 +.L244: + mov w0, 0 + b .L228 +.L229: + mov w1, w2 + bl FlashEraseSLc2KBlocks +.L228: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 112 + ret +.L239: + umull x12, w22, w28 + mov w1, 0 + sub w4, w24, w22 + add x3, x29, 108 + add x23, x20, x12 + add x2, x29, 104 + mov x0, x23 + bl LogAddr2PhyAddr + mov w25, w0 + ldrb w1, [x21, 2358] + ldr w0, [x29, 108] + cmp w1, w0 + bhi .L232 + mov w0, -1 + str w0, [x20, x12] +.L233: + add w22, w22, 1 + b .L230 +.L232: + ldrb w1, [x21, 2368] + mov x2, 24 + cmp w1, 0 + uxtw x1, w0 + csel w25, w25, wzr, ne + madd x1, x1, x2, x26 + ldr x1, [x1, 8] + cbz x1, .L235 + bl FlashWaitCmdDone +.L235: + ldp w2, w1, [x29, 104] + mov x0, 24 + madd x0, x1, x0, x26 + str w2, [x0, 4] + stp x23, xzr, [x0, 8] + cbz w25, .L236 + add w2, w22, 1 + umaddl x2, w2, w28, x20 + str x2, [x0, 16] +.L236: + add x0, x21, x1 + ldrb w23, [x0, 2360] + mov x0, 24 + mul x1, x1, x0 + mov w0, w23 + strb w23, [x26, x1] + bl NandcFlashCs + cmp w27, 1 + bne .L237 + ldrb w0, [x21, 204] + cbz w0, .L237 + mov w0, w23 + bl flash_enter_slc_mode +.L238: + ldr w1, [x29, 108] + add x0, x21, 1232 + add w22, w22, w25 + ldr w0, [x0, x1, lsl 2] + ldr w1, [x29, 104] + cmp w0, 0 + mov w0, w23 + cset w2, ne + bl FlashWaitReadyEN + ldr w1, [x29, 104] + mov w2, w25 + mov w0, w23 + bl FlashEraseCmd + mov w0, w23 + bl NandcFlashDeCs + b .L233 +.L237: + mov w0, w23 + bl flash_exit_slc_mode + b .L238 +.L242: + mov w0, w21 + bl FlashWaitCmdDone + cmp w27, 1 + bne .L241 + ldrb w0, [x19, 204] + cbz w0, .L241 + mul x0, x21, x23 + ldrb w0, [x0, x22] + bl flash_exit_slc_mode +.L241: + add x21, x21, 1 + b .L240 +.L243: + ldrb w0, [x19, 2132] + cmp w0, 69 + bne .L244 + mov w1, 56 + mov x0, x20 + umaddl x24, w24, w1, x20 +.L245: + cmp x24, x0 + beq .L244 + str wzr, [x0], 56 + b .L245 + .size FlashEraseBlocks, .-FlashEraseBlocks + .align 2 + .global FlashReadDpCmd + .type FlashReadDpCmd, %function +FlashReadDpCmd: + stp x29, x30, [sp, -64]! + add x29, sp, 0 + stp x21, x22, [sp, 32] + and w22, w0, 255 + adrp x0, .LANCHOR0 + add x4, x0, :lo12:.LANCHOR0 + stp x23, x24, [sp, 48] + mov w21, w1 + stp x19, x20, [sp, 16] + sbfiz x1, x22, 4, 32 + and w24, w2, 255 + lsr w23, w2, 8 + lsr w20, w2, 16 + ldr x2, [x4, 88] + add x3, x4, x1 + ldr x5, [x4, x1] + ldrb w1, [x4, 112] + and w7, w21, 255 + lsr w6, w21, 8 + cmp w1, 1 + ldrb w19, [x3, 8] + lsr w1, w21, 16 + ldrb w2, [x2, 7] + bne .L261 + cmp w2, 1 + bne .L262 + sxtw x3, w19 + mov w2, 38 + add x3, x3, 8 + add x3, x5, x3, lsl 8 + str w2, [x3, 8] +.L262: + add x0, x0, :lo12:.LANCHOR0 + add x19, x5, x19, lsl 8 + add x0, x0, 96 + ldrb w2, [x0, 8] + str w2, [x19, 2056] + str wzr, [x19, 2052] + str wzr, [x19, 2052] + str w7, [x19, 2052] + str w6, [x19, 2052] + ldrb w0, [x0, 9] + str w1, [x19, 2052] + str w0, [x19, 2056] + mov w0, w22 + bl NandcWaitFlashReady + str wzr, [x19, 2056] + str wzr, [x19, 2052] + str wzr, [x19, 2052] +.L266: + str w24, [x19, 2052] + mov w0, 48 + str w23, [x19, 2052] + mov w1, w21 + str w20, [x19, 2052] + str w0, [x19, 2056] + mov w0, w22 + bl FlashSetRandomizer + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x29, x30, [sp], 64 + ret +.L261: + cmp w2, 1 + bne .L264 + sxtw x3, w19 + mov w2, 38 + add x3, x3, 8 + add x3, x5, x3, lsl 8 + str w2, [x3, 8] +.L264: + add x0, x0, :lo12:.LANCHOR0 + add x19, x5, x19, lsl 8 + add x0, x0, 96 + ldrb w2, [x0, 8] + str w2, [x19, 2056] + str w7, [x19, 2052] + str w6, [x19, 2052] + ldrb w0, [x0, 9] + str w1, [x19, 2052] + str w0, [x19, 2056] + b .L266 + .size FlashReadDpCmd, .-FlashReadDpCmd + .align 2 + .global ftl_flash_de_init + .type ftl_flash_de_init, %function +ftl_flash_de_init: + stp x29, x30, [sp, -32]! + mov w0, 0 + add x29, sp, 0 + stp x19, x20, [sp, 16] + bl NandcWaitFlashReady + bl FlashSetReadRetryDefault + adrp x19, .LANCHOR0 + add x0, x19, :lo12:.LANCHOR0 + ldr w0, [x0, 2376] + cbz w0, .L268 + mov w0, 0 + bl flash_enter_slc_mode +.L269: + add x20, x19, :lo12:.LANCHOR0 + ldrb w0, [x20, 2380] + cbz w0, .L270 + ldrb w0, [x20, 2357] + tbz x0, 0, .L270 + mov w0, 1 + bl FlashSetInterfaceMode + mov w0, 1 + bl NandcSetMode + strb wzr, [x20, 2380] +.L270: + ldr x0, [x19, #:lo12:.LANCHOR0] + str wzr, [x0, 336] + mov w0, 0 + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 32 + ret +.L268: + mov w0, 0 + bl flash_exit_slc_mode + b .L269 + .size ftl_flash_de_init, .-ftl_flash_de_init + .align 2 + .global NandcRandmzSel + .type NandcRandmzSel, %function +NandcRandmzSel: + ubfiz x0, x0, 4, 8 + adrp x2, .LANCHOR0 + add x2, x2, :lo12:.LANCHOR0 + ldr x0, [x2, x0] + str w1, [x0, 336] + ret + .size NandcRandmzSel, .-NandcRandmzSel + .align 2 + .global NandcTimeCfg + .type NandcTimeCfg, %function +NandcTimeCfg: + stp x29, x30, [sp, -32]! + add x29, sp, 0 + str x19, [sp, 16] + mov w19, w0 + mov w0, 0 + bl rknand_get_clk_rate + mov w1, 16960 + movk w1, 0xf, lsl 16 + sdiv w0, w0, w1 + adrp x1, .LANCHOR0 + add x1, x1, :lo12:.LANCHOR0 + cmp w0, 250 + ble .L280 + ldr x0, [x1, 136] + mov w1, 8354 +.L288: + str w1, [x0, 4] + ldr x19, [sp, 16] + ldp x29, x30, [sp], 32 + ret +.L280: + cmp w0, 220 + ble .L282 + ldr x0, [x1, 136] +.L289: + mov w1, 8322 + b .L288 +.L282: + cmp w0, 185 + ble .L283 + ldr x0, [x1, 136] + mov w1, 4226 + b .L288 +.L283: + cmp w0, 160 + ldr x0, [x1, 136] + ble .L284 + mov w1, 4194 + b .L288 +.L284: + cmp w19, 35 + bhi .L285 + mov w1, 4193 + b .L288 +.L285: + cmp w19, 99 + bhi .L289 + mov w1, 4225 + b .L288 + .size NandcTimeCfg, .-NandcTimeCfg + .align 2 + .global FlashTimingCfg + .type FlashTimingCfg, %function +FlashTimingCfg: + stp x29, x30, [sp, -16]! + mov w1, -4193 + add w2, w0, w1 + mov w3, -4225 + add x29, sp, 0 + add w1, w0, w3 + cmp w2, 1 + ccmp w1, 1, 0, hi + bls .L291 + mov w1, 8322 + cmp w0, w1 + bne .L292 +.L291: + adrp x1, .LANCHOR0+136 + ldr x1, [x1, #:lo12:.LANCHOR0+136] + str w0, [x1, 4] +.L292: + adrp x0, .LANCHOR1+493 + ldrb w0, [x0, #:lo12:.LANCHOR1+493] + bl NandcTimeCfg + ldp x29, x30, [sp], 16 + ret + .size FlashTimingCfg, .-FlashTimingCfg + .align 2 + .global NandcInit + .type NandcInit, %function +NandcInit: + stp x29, x30, [sp, -32]! + mov w2, 1 + add x29, sp, 0 + str x19, [sp, 16] + adrp x19, .LANCHOR0 + add x1, x19, :lo12:.LANCHOR0 + str x0, [x19, #:lo12:.LANCHOR0] + str w2, [x1, 24] + mov w2, 2 + str wzr, [x1, 8] + str w2, [x1, 40] + mov w2, 3 + str x0, [x1, 16] + str x0, [x1, 32] + str x0, [x1, 48] + str x0, [x1, 136] + str w2, [x1, 56] + ldr w2, [x0] + ubfx x3, x2, 13, 1 + str w3, [x1, 2384] + ldr w3, [x0, 352] + and w2, w2, 245760 + orr w2, w2, 256 + ubfx x3, x3, 16, 4 + str w3, [x1, 2388] + ldr w3, [x0, 352] + str w3, [x1, 2392] + cmp w3, 2049 + bne .L295 + mov w3, 8 + str w3, [x1, 2388] +.L295: + add x19, x19, :lo12:.LANCHOR0 + str w2, [x0] + ldr x0, [x19, 136] + str wzr, [x0, 336] + mov w0, 40 + bl NandcTimeCfg + ldr x0, [x19, 136] + mov w1, 8322 + str w1, [x0, 344] + mov w1, 6145 + movk w1, 0x18, lsl 16 + str w1, [x0, 304] + mov w0, 36864 + bl ftl_malloc + str wzr, [x19, 2448] + str x0, [x19, 2400] + str x0, [x19, 2408] + add x0, x0, 32768 + str wzr, [x19, 2456] + str x0, [x19, 2416] + ldr x19, [sp, 16] + ldp x29, x30, [sp], 32 + ret + .size NandcInit, .-NandcInit + .align 2 + .global NandcGetTimeCfg + .type NandcGetTimeCfg, %function +NandcGetTimeCfg: + adrp x4, .LANCHOR0 + add x4, x4, :lo12:.LANCHOR0 + ldr x5, [x4, 136] + ldr w5, [x5, 4] + str w5, [x0] + ldr x0, [x4, 136] + ldr w0, [x0] + str w0, [x1] + ldr x0, [x4, 136] + ldr w0, [x0, 304] + str w0, [x2] + ldr x0, [x4, 136] + ldr w1, [x0, 308] + ldr w0, [x0, 344] + and w1, w1, 255 + orr w0, w1, w0, lsl 16 + str w0, [x3] + ret + .size NandcGetTimeCfg, .-NandcGetTimeCfg + .align 2 + .global NandcBchSel + .type NandcBchSel, %function +NandcBchSel: + adrp x1, .LANCHOR0 + add x1, x1, :lo12:.LANCHOR0 + and w0, w0, 255 + mov w3, 1 + cmp w0, 16 + ldr x2, [x1, 136] + str w0, [x1, 2460] + mov w1, 4096 + str w3, [x2, 8] + bne .L299 +.L302: + and w1, w1, -17 +.L300: + orr w1, w1, 1 + str w1, [x2, 12] + ret +.L299: + cmp w0, 24 + bne .L301 + orr w1, w1, 16 + b .L300 +.L301: + orr w1, w1, 262144 + cmp w0, 40 + orr w1, w1, 16 + bne .L300 + b .L302 + .size NandcBchSel, .-NandcBchSel + .align 2 + .global FlashBchSel + .type FlashBchSel, %function +FlashBchSel: + stp x29, x30, [sp, -16]! + adrp x1, .LANCHOR0+2464 + and w0, w0, 255 + add x29, sp, 0 + strb w0, [x1, #:lo12:.LANCHOR0+2464] + bl NandcBchSel + ldp x29, x30, [sp], 16 + ret + .size FlashBchSel, .-FlashBchSel + .align 2 + .global ftl_flash_resume + .type ftl_flash_resume, %function +ftl_flash_resume: + stp x29, x30, [sp, -48]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x20, .LANCHOR0 + add x0, x20, :lo12:.LANCHOR0 + str x21, [sp, 32] + add x19, x0, 2132 + mov x21, 0 + ldr x1, [x0, 136] + ldr w2, [x0, 144] + str w2, [x1] + ldr w2, [x0, 148] + ldr x1, [x0, 136] + str w2, [x1, 4] + ldr w2, [x0, 152] + ldr x1, [x0, 136] + str w2, [x1, 8] + ldr w2, [x0, 156] + str w2, [x1, 12] + ldr w2, [x0, 160] + str w2, [x1, 304] + ldr w2, [x0, 164] + str w2, [x1, 308] + ldr w2, [x0, 168] + str w2, [x1, 336] + ldr w2, [x0, 172] + str w2, [x1, 344] +.L310: + lsl x0, x21, 3 + ldrb w0, [x0, x19] + sub w0, w0, #1 + and w0, w0, 255 + cmp w0, 253 + bhi .L309 + mov w0, w21 + bl FlashReset +.L309: + add x21, x21, 1 + cmp x21, 4 + bne .L310 + add x19, x20, :lo12:.LANCHOR0 + ldrb w0, [x19, 2380] + cbz w0, .L311 + mov w0, 1 + bl NandcSetMode + ldrb w0, [x19, 2357] + bl FlashSetInterfaceMode + ldrb w0, [x19, 2357] + bl NandcSetMode + ldr w0, [x19, 160] + lsr w0, w0, 8 + bl NandcSetDdrPara +.L311: + add x20, x20, :lo12:.LANCHOR0 + ldr x0, [x20, 88] + ldrb w0, [x0, 20] + bl FlashBchSel + ldr x21, [sp, 32] + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 48 + ret + .size ftl_flash_resume, .-ftl_flash_resume + .align 2 + .global ftl_nandc_get_irq_status + .type ftl_nandc_get_irq_status, %function +ftl_nandc_get_irq_status: + ldr w0, [x0, 372] + ret + .size ftl_nandc_get_irq_status, .-ftl_nandc_get_irq_status + .align 2 + .global rk_nandc_flash_ready + .type rk_nandc_flash_ready, %function +rk_nandc_flash_ready: + ldr w1, [x0, 368] + orr w1, w1, 2 + str w1, [x0, 368] + ldr w1, [x0, 364] + and w1, w1, -3 + str w1, [x0, 364] + ret + .size rk_nandc_flash_ready, .-rk_nandc_flash_ready + .align 2 + .global NandcIqrWaitFlashReady + .type NandcIqrWaitFlashReady, %function +NandcIqrWaitFlashReady: + ret + .size NandcIqrWaitFlashReady, .-NandcIqrWaitFlashReady + .align 2 + .global rk_nandc_flash_xfer_completed + .type rk_nandc_flash_xfer_completed, %function +rk_nandc_flash_xfer_completed: + ldr w1, [x0, 368] + orr w1, w1, 1 + str w1, [x0, 368] + ldr w1, [x0, 364] + and w1, w1, -2 + str w1, [x0, 364] + ret + .size rk_nandc_flash_xfer_completed, .-rk_nandc_flash_xfer_completed + .align 2 + .global NandcSendDumpDataStart + .type NandcSendDumpDataStart, %function +NandcSendDumpDataStart: + sub sp, sp, #16 + ldr w2, [x0, 16] + mov w1, 1066 + movk w1, 0x2020, lsl 16 + str w2, [sp, 8] + ldr w2, [sp, 8] + and w2, w2, -5 + str w2, [sp, 8] + ldr w2, [sp, 8] + str w2, [x0, 16] + str w1, [x0, 8] + orr w1, w1, 4 + str w1, [x0, 8] + add sp, sp, 16 + ret + .size NandcSendDumpDataStart, .-NandcSendDumpDataStart + .align 2 + .global NandcSendDumpDataDone + .type NandcSendDumpDataDone, %function +NandcSendDumpDataDone: + sub sp, sp, #16 +.L324: + ldr w1, [x0, 8] + str w1, [sp, 8] + ldr w1, [sp, 8] + tbz x1, 20, .L324 + add sp, sp, 16 + ret + .size NandcSendDumpDataDone, .-NandcSendDumpDataDone + .align 2 + .global NandcXferStart + .type NandcXferStart, %function +NandcXferStart: + stp x29, x30, [sp, -96]! + ubfiz x0, x0, 4, 8 + ubfx x3, x3, 1, 7 + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x19, .LANCHOR0 + stp x23, x24, [sp, 48] + and w24, w1, 255 + add x1, x19, :lo12:.LANCHOR0 + stp x21, x22, [sp, 32] + str x25, [sp, 64] + add x6, x1, x0 + ubfiz w20, w24, 1, 1 + ldr x21, [x1, x0] + orr w20, w20, 8 + ldrb w0, [x6, 8] + mov w6, 16 + ldr w23, [x21, 12] + bfi w23, w6, 8, 8 + and w23, w23, -9 + bfi w23, w0, 5, 3 + mov w0, 1 + bfi w20, w0, 5, 2 + ldr w0, [x1, 2388] + orr w20, w20, 536870912 + orr w20, w20, 1024 + cmp w0, 3 + bfi w20, w3, 4, 1 + bls .L329 + ldr w0, [x21, 16] + cmp x5, 0 + str w0, [x29, 88] + ccmp x4, 0, 0, eq + ldr w0, [x29, 88] + and w0, w0, -5 + str w0, [x29, 88] + beq .L330 + and w2, w2, 255 + cbnz w24, .L331 +.L339: + add w2, w2, 1 + asr w2, w2, 1 + bfi w20, w2, 22, 6 + cbz x4, .L332 + mov x0, x4 +.L333: + add x19, x19, :lo12:.LANCHOR0 + ubfx x25, x20, 22, 5 + mov x22, x4 + mov w2, w24 + ldr x1, [x19, 2416] + str x1, [x19, 2432] + lsl w1, w25, 10 + str x0, [x19, 2424] + bl rknand_dma_map_single + str w0, [x19, 2440] + lsl w1, w25, 7 + ldr x0, [x19, 2432] + mov w2, w24 + bl rknand_dma_map_single + str w0, [x19, 2444] + mov w0, 1 + str w0, [x19, 2448] + ldr w0, [x19, 2440] + mov w1, 16 + str w0, [x21, 20] + tst x22, 3 + ldr w0, [x19, 2444] + str w0, [x21, 24] + str wzr, [x29, 88] + ldr w0, [x29, 88] + bfi w0, w1, 9, 5 + str w0, [x29, 88] + ldr w0, [x29, 88] + orr w0, w0, 448 + str w0, [x29, 88] + bne .L340 + ldr w0, [x29, 88] + mov w1, 2 + bfi w0, w1, 3, 3 + str w0, [x29, 88] +.L340: + ldr w0, [x29, 88] + cmp w24, 0 + cset w1, eq + orr w0, w0, 4 + str w0, [x29, 88] + ldr w0, [x29, 88] + bfi w0, w1, 1, 1 + str w0, [x29, 88] + ldr w0, [x29, 88] + orr w0, w0, 1 + str w0, [x29, 88] +.L330: + ldr w0, [x29, 88] + str w0, [x21, 16] +.L329: + str w23, [x21, 12] + str w20, [x21, 8] + orr w20, w20, 4 + str w20, [x21, 8] + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldr x25, [sp, 64] + ldp x29, x30, [sp], 96 + ret +.L331: + ldr w0, [x1, 2460] + mov w6, 64 + lsr w9, w2, 1 + mov x8, x5 + cmp w0, 25 + mov w0, 128 + csel w6, w6, w0, cc + mov w7, 0 + mov w3, 0 + mov w10, -1 +.L335: + cmp w3, w9 + bcs .L339 + lsr w0, w7, 2 + cbz x5, .L336 + ldr x11, [x1, 2416] + lsl w0, w0, 2 + ldr w12, [x8], 4 + str w12, [x11, x0] +.L337: + add w3, w3, 1 + add w7, w7, w6 + b .L335 +.L336: + ldr x11, [x1, 2416] + lsl w0, w0, 2 + str w10, [x11, x0] + b .L337 +.L332: + add x0, x19, :lo12:.LANCHOR0 + ldr x0, [x0, 2408] + b .L333 + .size NandcXferStart, .-NandcXferStart + .align 2 + .global Ftl_log2 + .type Ftl_log2, %function +Ftl_log2: + mov w2, 1 + mov w1, 0 +.L347: + cmp w2, w0 + bls .L348 + sub w0, w1, #1 + ret +.L348: + add w1, w1, 1 + lsl w2, w2, 1 + and w1, w1, 65535 + b .L347 + .size Ftl_log2, .-Ftl_log2 + .align 2 + .global FtlPrintInfo + .type FtlPrintInfo, %function +FtlPrintInfo: + ret + .size FtlPrintInfo, .-FtlPrintInfo + .align 2 + .global FtlSysBlkNumInit + .type FtlSysBlkNumInit, %function +FtlSysBlkNumInit: + and w0, w0, 65535 + mov w1, 24 + cmp w0, 24 + csel w0, w0, w1, cs + adrp x1, .LANCHOR0 + add x1, x1, :lo12:.LANCHOR0 + and w0, w0, 65535 + ldrh w2, [x1, 2472] + ldrh w3, [x1, 2482] + str w0, [x1, 2468] + mul w2, w2, w0 + sub w0, w3, w0 + strh w0, [x1, 2480] + ldr w0, [x1, 2488] + str w2, [x1, 2476] + sub w2, w0, w2 + mov w0, 0 + str w2, [x1, 2484] + ret + .size FtlSysBlkNumInit, .-FtlSysBlkNumInit + .align 2 + .global FtlConstantsInit + .type FtlConstantsInit, %function +FtlConstantsInit: + mov x7, x0 + stp x29, x30, [sp, -16]! + adrp x5, .LANCHOR0 + add x1, x5, :lo12:.LANCHOR0 + add x29, sp, 0 + ldrh w9, [x0, 8] + add x1, x1, 2504 + ldrh w2, [x0, 10] + mov x3, 0 + ldrh w0, [x0, 12] + ldrh w4, [x7, 14] + strh w9, [x1, -12] + strh w2, [x1, -10] + strh w0, [x1, -8] + strh w4, [x1, -22] +.L352: + strb w3, [x3, x1] + add x3, x3, 1 + cmp x3, 32 + bne .L352 + ldrh w3, [x7, 20] + ldrb w1, [x7, 15] + cmp w3, w1 + bcs .L353 + and w11, w0, 255 + add x8, x5, :lo12:.LANCHOR0 + mul w13, w0, w2 + ubfiz w12, w11, 1, 7 + add x8, x8, 2504 + mov w3, 0 +.L354: + cmp w3, w0 + bcs .L356 + and w1, w3, 255 + mov w6, w3 + mov w10, 0 + b .L357 +.L355: + add w14, w13, w6 + strb w1, [x8, w6, uxtw] + add w15, w11, w1 + add w1, w12, w1 + add w10, w10, 1 + and w1, w1, 255 + add w6, w6, w0 + strb w15, [x8, x14] +.L357: + cmp w10, w2 + bcc .L355 + add w3, w3, 1 + b .L354 +.L356: + add x1, x5, :lo12:.LANCHOR0 + ubfiz w2, w2, 1, 15 + lsr w4, w4, 1 + strh w2, [x1, 2494] + strh w4, [x1, 2482] +.L353: + add x1, x5, :lo12:.LANCHOR0 + mov w2, 5 + cmp w9, 1 + strh w2, [x1, 2536] + strh wzr, [x1, 2538] + bne .L358 + strh w9, [x1, 2536] +.L358: + add x1, x5, :lo12:.LANCHOR0 + mov w2, 4352 + ldrb w11, [x1, 72] + strh w2, [x1, 2540] + cbz w11, .L359 + mov w2, 384 + strh w2, [x1, 2540] +.L359: + add x4, x5, :lo12:.LANCHOR0 + ldrh w10, [x7, 16] + ldrh w8, [x7, 20] + ldrh w9, [x7, 18] + ldrh w6, [x4, 2494] + ldrh w3, [x4, 2482] + strh w10, [x4, 2544] + strh w9, [x4, 2546] + mul w6, w0, w6 + strh w8, [x4, 2550] + mul w0, w0, w3 + and w6, w6, 65535 + strh w0, [x4, 2542] + strh w6, [x4, 2472] + mul w0, w6, w10 + strh w0, [x4, 2548] + mov w0, w8 + bl Ftl_log2 + and w2, w0, 65535 + strh w0, [x4, 2552] + ubfiz w0, w8, 9, 7 + strh w0, [x4, 2554] + ubfx w0, w0, 8, 8 + strh w0, [x4, 2556] + cmp w3, 1024 + ldrh w0, [x7, 26] + strh w0, [x4, 2558] + mul w0, w6, w3 + str w0, [x4, 2488] + bls .L360 + and w0, w3, 255 + strh w0, [x4, 2538] +.L360: + add x1, x5, :lo12:.LANCHOR0 + ldrh w0, [x1, 2538] + sub w0, w3, w0 + mul w0, w0, w6 + mul w0, w0, w8 + mul w8, w9, w8 + mul w0, w0, w10 + asr w0, w0, 11 + str w0, [x1, 2560] + ldrh w0, [x1, 2540] + lsl w0, w0, 3 + sdiv w0, w0, w8 + and w0, w0, 65535 + cmp w0, 4 + bls .L361 +.L377: + strh w0, [x1, 2564] + cbz w11, .L363 + add x0, x5, :lo12:.LANCHOR0 + mov w1, 640 + strh w1, [x0, 2540] +.L363: + add x1, x5, :lo12:.LANCHOR0 + lsl w3, w3, 6 + cmp w6, 1 + ldrh w0, [x1, 2540] + asr w0, w0, w2 + add w2, w2, 9 + add w0, w0, 2 + strh w0, [x1, 2566] + asr w3, w3, w2 + strh w3, [x1, 2568] + and w3, w3, 65535 + mul w0, w6, w3 + add w3, w3, 8 + str w0, [x1, 2572] + ldrh w0, [x1, 2564] + udiv w0, w0, w6 + add w3, w0, w3 + beq .L364 +.L378: + add x4, x5, :lo12:.LANCHOR0 + str w3, [x1, 2468] + ldrh w0, [x4, 2468] + bl FtlSysBlkNumInit + ldr w0, [x4, 2468] + str w0, [x4, 2576] + ldr w0, [x4, 2484] + ldrh w1, [x4, 2544] + ldrh w3, [x4, 2550] + lsl w0, w0, 2 + ldrh w2, [x4, 2564] + ldrb w7, [x4, 204] + str wzr, [x4, 2584] + mul w0, w0, w1 + ldrh w1, [x4, 2552] + add w1, w1, 9 + lsr w0, w0, w1 + mov w1, 2048 + add w0, w0, 2 + sdiv w1, w1, w3 + and w0, w0, 65535 + strh w0, [x4, 2580] + strh w1, [x4, 2582] + add w1, w2, 3 + strh w1, [x4, 2564] + ldr w1, [x4, 2572] + add w6, w1, 3 + str w6, [x4, 2572] + cbz w7, .L366 + add w1, w1, 5 + add w2, w2, 4 + strh w2, [x4, 2564] +.L379: + str w1, [x4, 2572] +.L367: + add x5, x5, :lo12:.LANCHOR0 + ldrh w1, [x5, 2480] + strh wzr, [x5, 2588] + lsl w2, w1, 1 + lsr w1, w1, 3 + add w2, w2, 48 + add w1, w1, 4 + add w0, w2, w0, lsl 2 + add w0, w0, w1 + cmp w0, w3, lsl 9 + bcs .L368 + mov w0, 1 + strh w0, [x5, 2588] +.L368: + mov w0, 0 + ldp x29, x30, [sp], 16 + ret +.L361: + mov w0, 4 + b .L377 +.L364: + add w3, w3, 4 + b .L378 +.L366: + cmp w6, 7 + bhi .L367 + mov w1, 8 + b .L379 + .size FtlConstantsInit, .-FtlConstantsInit + .align 2 + .global IsBlkInVendorPart + .type IsBlkInVendorPart, %function +IsBlkInVendorPart: + adrp x1, .LANCHOR0 + add x1, x1, :lo12:.LANCHOR0 + and w0, w0, 65535 + ldrh w2, [x1, 2590] + cbz w2, .L384 + ldrh w2, [x1, 2564] + ldr x3, [x1, 2592] + mov x1, 0 +.L382: + cmp w2, w1, uxth + bhi .L383 +.L384: + mov w0, 0 + ret +.L383: + add x1, x1, 1 + add x4, x3, x1, lsl 1 + ldrh w4, [x4, -2] + cmp w4, w0 + bne .L382 + mov w0, 1 + ret + .size IsBlkInVendorPart, .-IsBlkInVendorPart + .align 2 + .global FtlCacheMetchLpa + .type FtlCacheMetchLpa, %function +FtlCacheMetchLpa: + adrp x2, .LANCHOR0 + add x2, x2, :lo12:.LANCHOR0 + ldr w4, [x2, 2600] + cbz w4, .L391 + mov x5, 24 + mov w6, 56 + ldr x2, [x2, 2608] + nop // between mem op and mult-accumulate + umaddl x4, w4, w6, x5 + add x3, x2, 24 + add x2, x2, x4 +.L388: + cmp x3, x2 + bne .L390 +.L391: + mov w0, 0 + ret +.L390: + ldr w4, [x3] + cmp w4, w0 + bcc .L389 + cmp w4, w1 + bls .L392 +.L389: + add x3, x3, 56 + b .L388 +.L392: + mov w0, 1 + ret + .size FtlCacheMetchLpa, .-FtlCacheMetchLpa + .align 2 + .global FtlGetCap + .type FtlGetCap, %function +FtlGetCap: + adrp x0, .LANCHOR0+2584 + ldr w0, [x0, #:lo12:.LANCHOR0+2584] + ret + .size FtlGetCap, .-FtlGetCap + .align 2 + .global FtlGetCapacity + .type FtlGetCapacity, %function +FtlGetCapacity: + adrp x0, .LANCHOR0+2584 + ldr w0, [x0, #:lo12:.LANCHOR0+2584] + ret + .size FtlGetCapacity, .-FtlGetCapacity + .align 2 + .global ftl_get_density + .type ftl_get_density, %function +ftl_get_density: + adrp x0, .LANCHOR0+2584 + ldr w0, [x0, #:lo12:.LANCHOR0+2584] + ret + .size ftl_get_density, .-ftl_get_density + .align 2 + .global FtlGetLpn + .type FtlGetLpn, %function +FtlGetLpn: + adrp x0, .LANCHOR0+2616 + ldr w0, [x0, #:lo12:.LANCHOR0+2616] + ret + .size FtlGetLpn, .-FtlGetLpn + .align 2 + .global FtlBbmMapBadBlock + .type FtlBbmMapBadBlock, %function +FtlBbmMapBadBlock: + stp x29, x30, [sp, -32]! + and w1, w0, 65535 + mov w4, 1 + add x29, sp, 0 + str x19, [sp, 16] + adrp x19, .LANCHOR0 + add x19, x19, :lo12:.LANCHOR0 + add x19, x19, 2624 + ldrh w0, [x19, -82] + udiv w3, w1, w0 + and w2, w3, 65535 + msub w3, w3, w0, w1 + add x0, x19, w2, uxth 3 + and w3, w3, 65535 + ldr x0, [x0, 32] + ubfx x5, x3, 5, 11 + lsl x5, x5, 2 + lsl w4, w4, w3 + ldr w6, [x0, x5] + orr w4, w4, w6 + str w4, [x0, x5] + adrp x0, .LC1 + add x0, x0, :lo12:.LC1 + bl printk + ldrh w0, [x19, 6] + add w0, w0, 1 + strh w0, [x19, 6] + mov w0, 0 + ldr x19, [sp, 16] + ldp x29, x30, [sp], 32 + ret + .size FtlBbmMapBadBlock, .-FtlBbmMapBadBlock + .align 2 + .global FtlBbmIsBadBlock + .type FtlBbmIsBadBlock, %function +FtlBbmIsBadBlock: + adrp x2, .LANCHOR0 + add x3, x2, :lo12:.LANCHOR0 + and w0, w0, 65535 + ldrh w1, [x3, 2542] + udiv w2, w0, w1 + msub w0, w2, w1, w0 + add x2, x3, w2, uxth 3 + and w0, w0, 65535 + ldr x1, [x2, 2656] + ubfx x3, x0, 5, 11 + ldr w1, [x1, x3, lsl 2] + lsr w0, w1, w0 + and w0, w0, 1 + ret + .size FtlBbmIsBadBlock, .-FtlBbmIsBadBlock + .align 2 + .global FtlBbtInfoPrint + .type FtlBbtInfoPrint, %function +FtlBbtInfoPrint: + ret + .size FtlBbtInfoPrint, .-FtlBbtInfoPrint + .align 2 + .global FtlBbtCalcTotleCnt + .type FtlBbtCalcTotleCnt, %function +FtlBbtCalcTotleCnt: + adrp x0, .LANCHOR0 + add x0, x0, :lo12:.LANCHOR0 + mov w4, 0 + mov w5, 0 + ldrh w6, [x0, 2542] + ldrh w0, [x0, 2494] + mul w6, w6, w0 + cmp w4, w6 + blt .L411 + mov w0, w5 + ret +.L411: + stp x29, x30, [sp, -16]! + add x29, sp, 0 +.L404: + mov w0, w4 + bl FtlBbmIsBadBlock + cbz w0, .L403 + add w5, w5, 1 + and w5, w5, 65535 +.L403: + add w4, w4, 1 + and w4, w4, 65535 + cmp w4, w6 + blt .L404 + mov w0, w5 + ldp x29, x30, [sp], 16 + ret + .size FtlBbtCalcTotleCnt, .-FtlBbtCalcTotleCnt + .align 2 + .global V2P_block + .type V2P_block, %function +V2P_block: + adrp x4, .LANCHOR0 + add x4, x4, :lo12:.LANCHOR0 + and w0, w0, 65535 + and w1, w1, 65535 + ldrh w2, [x4, 2496] + ldrh w4, [x4, 2542] + udiv w3, w0, w2 + msub w0, w3, w2, w0 + madd w2, w2, w1, w0 + madd w0, w3, w4, w2 + ret + .size V2P_block, .-V2P_block + .align 2 + .global P2V_plane + .type P2V_plane, %function +P2V_plane: + adrp x2, .LANCHOR0 + add x2, x2, :lo12:.LANCHOR0 + and w3, w0, 65535 + ldrh w1, [x2, 2496] + ldrh w2, [x2, 2542] + udiv w0, w3, w1 + udiv w2, w3, w2 + msub w0, w0, w1, w3 + madd w0, w1, w2, w0 + ret + .size P2V_plane, .-P2V_plane + .align 2 + .global P2V_block_in_plane + .type P2V_block_in_plane, %function +P2V_block_in_plane: + adrp x1, .LANCHOR0 + add x1, x1, :lo12:.LANCHOR0 + and w3, w0, 65535 + ldrh w2, [x1, 2542] + ldrh w1, [x1, 2496] + udiv w0, w3, w2 + msub w0, w0, w2, w3 + and w0, w0, 65535 + udiv w0, w0, w1 + ret + .size P2V_block_in_plane, .-P2V_block_in_plane + .align 2 + .global ftl_cmp_data_ver + .type ftl_cmp_data_ver, %function +ftl_cmp_data_ver: + cmp w0, w1 + mov w2, -2147483648 + bls .L416 + sub w1, w0, w1 + cmp w1, w2 + cset w0, ls + ret +.L416: + sub w1, w1, w0 + cmp w1, w2 + cset w0, hi + ret + .size ftl_cmp_data_ver, .-ftl_cmp_data_ver + .align 2 + .global FtlFreeSysBlkQueueEmpty + .type FtlFreeSysBlkQueueEmpty, %function +FtlFreeSysBlkQueueEmpty: + adrp x0, .LANCHOR0+2726 + ldrh w0, [x0, #:lo12:.LANCHOR0+2726] + cmp w0, 0 + cset w0, eq + ret + .size FtlFreeSysBlkQueueEmpty, .-FtlFreeSysBlkQueueEmpty + .align 2 + .global FtlFreeSysBlkQueueFull + .type FtlFreeSysBlkQueueFull, %function +FtlFreeSysBlkQueueFull: + adrp x0, .LANCHOR0+2726 + ldrh w0, [x0, #:lo12:.LANCHOR0+2726] + cmp w0, 1024 + cset w0, eq + ret + .size FtlFreeSysBlkQueueFull, .-FtlFreeSysBlkQueueFull + .align 2 + .global FtlFreeSysBlkQueueIn + .type FtlFreeSysBlkQueueIn, %function +FtlFreeSysBlkQueueIn: + stp x29, x30, [sp, -48]! + add x29, sp, 0 + stp x21, x22, [sp, 32] + and w21, w0, 65535 + stp x19, x20, [sp, 16] + sub w2, w21, #1 + mov w0, 65533 + cmp w0, w2, uxth + bcc .L420 + adrp x0, .LANCHOR0 + add x2, x0, :lo12:.LANCHOR0 + mov x19, x0 + ldrh w2, [x2, 2726] + cmp w2, 1024 + beq .L420 + and w1, w1, 65535 + cbz w1, .L422 + adrp x20, .LANCHOR2 + add x20, x20, :lo12:.LANCHOR2 + ldr w0, [x20, 424] + cbnz w0, .L422 + mov w0, w21 + bl P2V_block_in_plane + and w22, w0, 65535 + ldr x0, [x20, 432] + lsl w1, w21, 10 + mov w2, 1 + str w1, [x0, 4] + mov w1, w2 + ldr x0, [x20, 432] + bl FlashEraseBlocks + ldr x2, [x20, 440] + ubfiz x0, x22, 1, 16 + ldrh w1, [x2, x0] + add w1, w1, 1 + strh w1, [x2, x0] + ldr w0, [x20, 448] + add w0, w0, 1 + str w0, [x20, 448] +.L422: + add x0, x19, :lo12:.LANCHOR0 + add x0, x0, 2720 + ldrh w1, [x0, 6] + add w1, w1, 1 + strh w1, [x0, 6] + ldrh w1, [x0, 4] + add x2, x0, w1, sxtw 1 + add w1, w1, 1 + and w1, w1, 1023 + strh w1, [x0, 4] + strh w21, [x2, 8] +.L420: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x29, x30, [sp], 48 + ret + .size FtlFreeSysBlkQueueIn, .-FtlFreeSysBlkQueueIn + .align 2 + .global FtlFreeSysBLkSort + .type FtlFreeSysBLkSort, %function +FtlFreeSysBLkSort: + adrp x0, .LANCHOR0 + add x1, x0, :lo12:.LANCHOR0 + add x1, x1, 2720 + ldrh w2, [x1, 6] + cbz w2, .L430 + adrp x2, .LANCHOR2+484 + ldrh w3, [x1, 2] + mov w6, 0 + mov w4, 0 + ldrh w5, [x2, #:lo12:.LANCHOR2+484] + ldrh w2, [x1, 4] + and w5, w5, 31 +.L432: + cmp w5, w4 + bgt .L433 + cbz w6, .L430 + add x0, x0, :lo12:.LANCHOR0 + strh w3, [x0, 2722] + strh w2, [x0, 2724] +.L430: + ret +.L433: + add x6, x1, w3, sxtw 1 + add w4, w4, 1 + add w3, w3, 1 + and w4, w4, 65535 + and w3, w3, 1023 + ldrh w7, [x6, 8] + add x6, x1, w2, sxtw 1 + strh w7, [x6, 8] + mov w6, 1 + add w2, w2, w6 + and w2, w2, 1023 + b .L432 + .size FtlFreeSysBLkSort, .-FtlFreeSysBLkSort + .align 2 + .global FtlFreeSysBlkQueueOut + .type FtlFreeSysBlkQueueOut, %function +FtlFreeSysBlkQueueOut: + stp x29, x30, [sp, -64]! + add x29, sp, 0 + stp x21, x22, [sp, 32] + adrp x21, .LANCHOR0 + add x21, x21, :lo12:.LANCHOR0 + stp x19, x20, [sp, 16] + add x20, x21, 2720 + stp x23, x24, [sp, 48] + mov x22, x20 +.L440: + ldrh w1, [x20, 6] + cbz w1, .L441 + ldrh w0, [x20, 2] + adrp x19, .LANCHOR2 + add x4, x19, :lo12:.LANCHOR2 + sub w1, w1, #1 + strh w1, [x20, 6] + add x2, x20, w0, sxtw 1 + add w0, w0, 1 + and w0, w0, 1023 + strh w0, [x20, 2] + ldr w0, [x4, 424] + ldrh w23, [x2, 8] + cbnz w0, .L442 + mov w0, w23 + bl P2V_block_in_plane + and w24, w0, 65535 + ldr x0, [x4, 432] + lsl w1, w23, 10 + str w1, [x0, 4] + ldrb w0, [x21, 204] + cbz w0, .L443 + ldr x0, [x4, 432] + mov w2, 1 + mov w1, 0 + bl FlashEraseBlocks +.L443: + add x19, x19, :lo12:.LANCHOR2 + mov w2, 1 + mov w1, w2 + ldr x0, [x19, 432] + bl FlashEraseBlocks + ldr x2, [x19, 440] + ubfiz x0, x24, 1, 16 + ldrh w1, [x2, x0] + add w1, w1, 1 + strh w1, [x2, x0] + ldr w0, [x19, 448] + add w0, w0, 1 + str w0, [x19, 448] +.L442: + sub w0, w23, #1 + mov w1, 65533 + cmp w1, w0, uxth + bcs .L445 + ldrh w2, [x22, 6] + mov w1, w23 + adrp x0, .LC3 + add x0, x0, :lo12:.LC3 + bl printk + b .L440 +.L441: + adrp x0, .LC2 + mov w1, 0 + add x0, x0, :lo12:.LC2 + bl printk +.L444: + b .L444 +.L445: + mov w0, w23 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x29, x30, [sp], 64 + ret + .size FtlFreeSysBlkQueueOut, .-FtlFreeSysBlkQueueOut + .align 2 + .global test_node_in_list + .type test_node_in_list, %function +test_node_in_list: + ldr x2, [x0] + adrp x0, .LANCHOR2+504 + mov x4, -6148914691236517206 + and w1, w1, 65535 + ldr x3, [x0, #:lo12:.LANCHOR2+504] + movk x4, 0xaaab, lsl 0 + mov w5, 65535 + sub x0, x2, x3 + asr x0, x0, 1 + mul x0, x0, x4 + mov w4, 6 + and w0, w0, 65535 +.L452: + cmp w0, w1 + beq .L453 + ldrh w0, [x2] + cmp w0, w5 + beq .L454 + umaddl x2, w0, w4, x3 + b .L452 +.L453: + mov w0, 1 + ret +.L454: + mov w0, 0 + ret + .size test_node_in_list, .-test_node_in_list + .align 2 + .global insert_data_list + .type insert_data_list, %function +insert_data_list: + adrp x9, .LANCHOR0 + add x9, x9, :lo12:.LANCHOR0 + and w0, w0, 65535 + ldrh w1, [x9, 2480] + cmp w1, w0 + bls .L471 + adrp x2, .LANCHOR2 + add x4, x2, :lo12:.LANCHOR2 + mov w5, 6 + mov w1, -1 + mov x3, x2 + ldr x12, [x4, 504] + umull x11, w0, w5 + add x6, x12, x11 + strh w1, [x6, 2] + strh w1, [x12, x11] + ldr x1, [x4, 512] + cbnz x1, .L458 + str x6, [x4, 512] +.L471: + mov w0, 0 + ret +.L458: + stp x29, x30, [sp, -16]! + ubfiz x8, x0, 1, 16 + mov x15, -6148914691236517206 + mov w10, -1 + add x29, sp, 0 + ldr x14, [x4, 520] + movk x15, 0xaaab, lsl 0 + ldrh w2, [x6, 4] + mov w30, 65535 + ldr x13, [x4, 504] + cmp w2, 0 + ldrh w18, [x9, 2480] + ldrh w7, [x14, x8] + mul w7, w7, w2 + sub x2, x1, x13 + asr x2, x2, 1 + csel w7, w7, w10, ne + mul x2, x2, x15 + ldr x15, [x4, 440] + mov w4, 0 + add x9, x15, x8 + and w2, w2, 65535 + mov w8, w5 +.L466: + add w4, w4, 1 + and w4, w4, 65535 + cmp w4, w18 + bhi .L457 + cmp w0, w2 + beq .L457 + ubfiz x16, x2, 1, 16 + ldrh w17, [x1, 4] + cmp w17, 0 + ldrh w5, [x14, x16] + mul w5, w5, w17 + csel w5, w5, w10, ne + cmp w7, w5 + bne .L462 + ldrh w16, [x15, x16] + ldrh w5, [x9] + cmp w16, w5 + bcc .L464 +.L463: + strh w2, [x12, x11] + ldrh w2, [x1, 2] + strh w2, [x6, 2] + add x2, x3, :lo12:.LANCHOR2 + ldr x3, [x2, 512] + cmp x1, x3 + bne .L467 + strh w0, [x1, 2] + str x6, [x2, 512] + b .L457 +.L462: + bcc .L463 +.L464: + ldrh w5, [x1] + cmp w5, w30 + bne .L465 + strh w2, [x6, 2] + add x2, x3, :lo12:.LANCHOR2 + strh w0, [x1] + str x6, [x2, 528] +.L457: + mov w0, 0 + ldp x29, x30, [sp], 16 + ret +.L465: + umaddl x1, w5, w8, x13 + mov w2, w5 + b .L466 +.L467: + ldrh w3, [x1, 2] + mov w4, 6 + ldr x2, [x2, 504] + umull x3, w3, w4 + strh w0, [x2, x3] + strh w0, [x1, 2] + b .L457 + .size insert_data_list, .-insert_data_list + .align 2 + .global INSERT_DATA_LIST + .type INSERT_DATA_LIST, %function +INSERT_DATA_LIST: + stp x29, x30, [sp, -16]! + add x29, sp, 0 + bl insert_data_list + adrp x0, .LANCHOR2 + add x0, x0, :lo12:.LANCHOR2 + ldrh w1, [x0, 536] + add w1, w1, 1 + strh w1, [x0, 536] + ldp x29, x30, [sp], 16 + ret + .size INSERT_DATA_LIST, .-INSERT_DATA_LIST + .align 2 + .global insert_free_list + .type insert_free_list, %function +insert_free_list: + and w0, w0, 65535 + mov w7, 65535 + cmp w0, w7 + beq .L476 + adrp x2, .LANCHOR2 + add x5, x2, :lo12:.LANCHOR2 + mov w6, 6 + mov w1, -1 + mov x3, x2 + ldr x9, [x5, 504] + umull x8, w0, w6 + add x4, x9, x8 + strh w1, [x4, 2] + strh w1, [x9, x8] + ldr x1, [x5, 544] + cbnz x1, .L477 + str x4, [x5, 544] +.L476: + mov w0, 0 + ret +.L477: + ldr x11, [x5, 440] + ubfiz x2, x0, 1, 16 + ldr x10, [x5, 504] + mov x5, -6148914691236517206 + movk x5, 0xaaab, lsl 0 + ldrh w12, [x11, x2] + sub x2, x1, x10 + asr x2, x2, 1 + mul x2, x2, x5 + and w2, w2, 65535 +.L480: + ubfiz x5, x2, 1, 16 + ldrh w5, [x11, x5] + cmp w5, w12 + bcs .L478 + ldrh w5, [x1] + cmp w5, w7 + bne .L479 + strh w2, [x4, 2] + strh w0, [x1] + b .L476 +.L479: + umaddl x1, w5, w6, x10 + mov w2, w5 + b .L480 +.L478: + ldrh w5, [x1, 2] + strh w5, [x4, 2] + strh w2, [x9, x8] + add x2, x3, :lo12:.LANCHOR2 + ldr x3, [x2, 544] + cmp x1, x3 + bne .L481 + strh w0, [x1, 2] + str x4, [x2, 544] + b .L476 +.L481: + ldrh w3, [x1, 2] + mov w4, 6 + ldr x2, [x2, 504] + umull x3, w3, w4 + strh w0, [x2, x3] + strh w0, [x1, 2] + b .L476 + .size insert_free_list, .-insert_free_list + .align 2 + .global INSERT_FREE_LIST + .type INSERT_FREE_LIST, %function +INSERT_FREE_LIST: + stp x29, x30, [sp, -16]! + add x29, sp, 0 + bl insert_free_list + adrp x0, .LANCHOR2 + add x0, x0, :lo12:.LANCHOR2 + ldrh w1, [x0, 552] + add w1, w1, 1 + strh w1, [x0, 552] + ldp x29, x30, [sp], 16 + ret + .size INSERT_FREE_LIST, .-INSERT_FREE_LIST + .align 2 + .global List_remove_node + .type List_remove_node, %function +List_remove_node: + and w1, w1, 65535 + adrp x6, .LANCHOR2 + add x6, x6, :lo12:.LANCHOR2 + mov w4, 6 + ldr x2, [x0] + mov w7, 65535 + umull x1, w1, w4 + ldr x3, [x6, 504] + add x5, x3, x1 + cmp x5, x2 + ldrh w2, [x3, x1] + bne .L485 + cmp w2, w7 + bne .L486 + str xzr, [x0] +.L487: + mov w0, -1 + strh w0, [x3, x1] + strh w0, [x5, 2] + mov w0, 0 + ret +.L486: + umaddl x2, w2, w4, x3 + str x2, [x0] + mov w0, -1 + strh w0, [x2, 2] + b .L487 +.L485: + cmp w2, w7 + ldrh w0, [x5, 2] + bne .L488 + cmp w0, w2 + beq .L487 + umull x2, w0, w4 + mov w0, -1 + strh w0, [x3, x2] + b .L487 +.L488: + umaddl x2, w2, w4, x3 + strh w0, [x2, 2] + ldrh w2, [x5, 2] + ldr x0, [x6, 504] + ldrh w7, [x3, x1] + umull x2, w2, w4 + strh w7, [x0, x2] + b .L487 + .size List_remove_node, .-List_remove_node + .align 2 + .global List_pop_index_node + .type List_pop_index_node, %function +List_pop_index_node: + ldr x2, [x0] + cbz x2, .L495 + stp x29, x30, [sp, -16]! + adrp x3, .LANCHOR2+504 + and w1, w1, 65535 + mov w4, 65535 + add x29, sp, 0 + ldr x8, [x3, #:lo12:.LANCHOR2+504] + mov w5, 6 +.L491: + cbnz w1, .L492 +.L494: + sub x8, x2, x8 + mov x2, -6148914691236517206 + asr x8, x8, 1 + movk x2, 0xaaab, lsl 0 + mul x8, x8, x2 + and w8, w8, 65535 + mov w1, w8 + bl List_remove_node + mov w0, w8 + ldp x29, x30, [sp], 16 + ret +.L492: + ldrh w3, [x2] + cmp w3, w4 + beq .L494 + sub w1, w1, #1 + umaddl x2, w3, w5, x8 + and w1, w1, 65535 + b .L491 +.L495: + mov w0, 65535 + ret + .size List_pop_index_node, .-List_pop_index_node + .align 2 + .global List_get_gc_head_node + .type List_get_gc_head_node, %function +List_get_gc_head_node: + and w2, w0, 65535 + adrp x0, .LANCHOR2 + add x0, x0, :lo12:.LANCHOR2 + ldr x1, [x0, 512] + cbz x1, .L505 + ldr x3, [x0, 504] + mov w4, 6 + mov w0, 65535 +.L502: + cbz w2, .L503 + ldrh w1, [x1] + cmp w1, w0 + bne .L504 + ret +.L504: + sub w2, w2, #1 + umaddl x1, w1, w4, x3 + and w2, w2, 65535 + b .L502 +.L505: + mov w0, 65535 + ret +.L503: + sub x0, x1, x3 + mov x1, -6148914691236517206 + asr x0, x0, 1 + movk x1, 0xaaab, lsl 0 + mul x0, x0, x1 + and w0, w0, 65535 + ret + .size List_get_gc_head_node, .-List_get_gc_head_node + .align 2 + .global List_update_data_list + .type List_update_data_list, %function +List_update_data_list: + adrp x8, .LANCHOR2 + add x1, x8, :lo12:.LANCHOR2 + and w9, w0, 65535 + ldrh w0, [x1, 560] + cmp w0, w9 + beq .L514 + ldrh w0, [x1, 608] + cmp w0, w9 + beq .L514 + ldrh w0, [x1, 656] + cmp w0, w9 + beq .L514 + mov w4, 6 + ldp x3, x2, [x1, 504] + umull x4, w9, w4 + add x0, x3, x4 + cmp x0, x2 + beq .L514 + ldr x5, [x1, 520] + ubfiz x1, x9, 1, 16 + ldrh w2, [x5, x1] + ldrh w1, [x0, 4] + ldrh w0, [x0, 2] + cmp w1, 0 + mul w2, w2, w1 + mov w1, 65535 + csinv w2, w2, wzr, ne + cmp w0, w1 + bne .L509 + ldrh w1, [x3, x4] + cmp w1, w0 + beq .L514 +.L509: + mov w1, 6 + mov x4, -6148914691236517206 + movk x4, 0xaaab, lsl 0 + umull x0, w0, w1 + asr x1, x0, 1 + add x0, x3, x0 + mul x1, x1, x4 + ldrh w3, [x0, 4] + cmp w3, 0 + ldrh w1, [x5, x1, lsl 1] + mul w0, w1, w3 + csinv w0, w0, wzr, ne + cmp w2, w0 + bcs .L514 + add x8, x8, :lo12:.LANCHOR2 + stp x29, x30, [sp, -16]! + mov w1, w9 + add x0, x8, 512 + add x29, sp, 0 + bl List_remove_node + ldrh w0, [x8, 536] + sub w0, w0, #1 + strh w0, [x8, 536] + mov w0, w9 + bl INSERT_DATA_LIST + mov w0, 0 + ldp x29, x30, [sp], 16 + ret +.L514: + mov w0, 0 + ret + .size List_update_data_list, .-List_update_data_list + .align 2 + .global ftl_map_blk_alloc_new_blk + .type ftl_map_blk_alloc_new_blk, %function +ftl_map_blk_alloc_new_blk: + stp x29, x30, [sp, -48]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + mov w20, 0 + str x21, [sp, 32] + ldrh w2, [x0, 10] + ldr x1, [x0, 16] +.L518: + cmp w20, w2 + beq .L522 + mov x21, x1 + ldrh w3, [x1], 2 + cbnz w3, .L519 + mov x19, x0 + bl FtlFreeSysBlkQueueOut + and w1, w0, 65535 + strh w0, [x21] + sub w2, w1, #1 + mov w0, 65533 + cmp w0, w2, uxth + bcs .L520 + adrp x0, .LANCHOR0+2726 + ldrh w2, [x0, #:lo12:.LANCHOR0+2726] + adrp x0, .LC4 + add x0, x0, :lo12:.LC4 + bl printk +.L521: + b .L521 +.L520: + ldr w0, [x19, 48] + strh wzr, [x19, 2] + add w0, w0, 1 + str w0, [x19, 48] + ldrh w0, [x19, 8] + strh w20, [x19] + add w0, w0, 1 + strh w0, [x19, 8] +.L522: + mov w0, 0 + ldr x21, [sp, 32] + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 48 + ret +.L519: + add w20, w20, 1 + and w20, w20, 65535 + b .L518 + .size ftl_map_blk_alloc_new_blk, .-ftl_map_blk_alloc_new_blk + .align 2 + .global select_l2p_ram_region + .type select_l2p_ram_region, %function +select_l2p_ram_region: + adrp x0, .LANCHOR0+2582 + mov x4, 0 + mov w5, 65535 + ldrh w2, [x0, #:lo12:.LANCHOR0+2582] + adrp x0, .LANCHOR2 + add x1, x0, :lo12:.LANCHOR2 + mov x3, x0 + ldr x1, [x1, 704] +.L526: + and w0, w4, 65535 + cmp w0, w2 + bcc .L528 + add x5, x1, 4 + mov w0, w2 + mov w7, -2147483648 + mov w4, 0 +.L529: + cmp w4, w2 + bne .L531 + cmp w0, w2 + bcc .L527 + add x0, x3, :lo12:.LANCHOR2 + mov w4, -1 + mov w3, 0 + ldrh w5, [x0, 712] + mov w0, w2 +.L532: + cmp w3, w2 + beq .L527 + ldr w7, [x1, 4] + cmp w4, w7 + bls .L533 + ldrh w6, [x1] + cmp w6, w5 + csel w4, w4, w7, eq + csel w0, w0, w3, eq +.L533: + add w3, w3, 1 + add x1, x1, 16 + and w3, w3, 65535 + b .L532 +.L528: + add x4, x4, 1 + add x6, x1, x4, lsl 4 + ldrh w6, [x6, -16] + cmp w6, w5 + bne .L526 +.L527: + ret +.L531: + ldr w6, [x5] + tbnz w6, #31, .L530 + cmp w7, w6 + bls .L530 + mov w7, w6 + mov w0, w4 +.L530: + add w4, w4, 1 + add x5, x5, 16 + and w4, w4, 65535 + b .L529 + .size select_l2p_ram_region, .-select_l2p_ram_region + .align 2 + .global FtlUpdateVaildLpn + .type FtlUpdateVaildLpn, %function +FtlUpdateVaildLpn: + adrp x1, .LANCHOR2 + add x3, x1, :lo12:.LANCHOR2 + ldrh w2, [x3, 714] + cmp w2, 4 + bhi .L536 + cbnz w0, .L536 + add w2, w2, 1 + strh w2, [x3, 714] + ret +.L536: + add x0, x1, :lo12:.LANCHOR2 + adrp x1, .LANCHOR0+2480 + mov w6, 65535 + ldrh w4, [x1, #:lo12:.LANCHOR0+2480] + mov x1, 0 + ldr x5, [x0, 520] + strh wzr, [x0, 714] + str wzr, [x0, 716] +.L537: + cmp w4, w1, uxth + bhi .L539 + ret +.L539: + ldrh w3, [x5, x1, lsl 1] + cmp w3, w6 + beq .L538 + ldr w2, [x0, 716] + add w2, w2, w3 + str w2, [x0, 716] +.L538: + add x1, x1, 1 + b .L537 + .size FtlUpdateVaildLpn, .-FtlUpdateVaildLpn + .align 2 + .global ftl_set_blk_mode + .type ftl_set_blk_mode, %function +ftl_set_blk_mode: + and w0, w0, 65535 + cbz w1, .L542 + stp x29, x30, [sp, -16]! + add x29, sp, 0 + bl ftl_set_blk_mode.part.9 + ldp x29, x30, [sp], 16 + ret +.L542: + adrp x1, .LANCHOR0+64 + ubfx x2, x0, 5, 11 + lsl x2, x2, 2 + ldr x3, [x1, #:lo12:.LANCHOR0+64] + mov w1, 1 + lsl w0, w1, w0 + ldr w1, [x3, x2] + bic w0, w1, w0 + str w0, [x3, x2] + ret + .size ftl_set_blk_mode, .-ftl_set_blk_mode + .align 2 + .global ftl_get_blk_mode + .type ftl_get_blk_mode, %function +ftl_get_blk_mode: + and w1, w0, 65535 + adrp x0, .LANCHOR0+64 + ldr x0, [x0, #:lo12:.LANCHOR0+64] + ubfx x2, x1, 5, 11 + ldr w0, [x0, x2, lsl 2] + lsr w0, w0, w1 + and w0, w0, 1 + ret + .size ftl_get_blk_mode, .-ftl_get_blk_mode + .align 2 + .global ftl_sb_update_avl_pages + .type ftl_sb_update_avl_pages, %function +ftl_sb_update_avl_pages: + and w6, w1, 65535 + adrp x4, .LANCHOR0 + add x1, x4, :lo12:.LANCHOR0 + and w2, w2, 65535 + strh wzr, [x0, 4] + ldrh w3, [x1, 2472] + mov w1, 65535 +.L550: + cmp w3, w2, uxth + bhi .L552 + add x4, x4, :lo12:.LANCHOR0 + ubfiz x3, x3, 1, 16 + add x3, x3, 16 + add x2, x0, 16 + add x3, x0, x3 + mov w5, 65535 + ldrh w1, [x4, 2544] + sub w1, w1, #1 + and w1, w1, 65535 + sub w1, w1, w6 +.L553: + cmp x2, x3 + bne .L555 + ret +.L552: + add x5, x0, w2, sxtw 1 + ldrh w5, [x5, 16] + cmp w5, w1 + beq .L551 + ldrh w5, [x0, 4] + add w5, w5, 1 + strh w5, [x0, 4] +.L551: + add w2, w2, 1 + b .L550 +.L555: + ldrh w4, [x2] + cmp w4, w5 + beq .L554 + ldrh w4, [x0, 4] + add w4, w1, w4 + strh w4, [x0, 4] +.L554: + add x2, x2, 2 + b .L553 + .size ftl_sb_update_avl_pages, .-ftl_sb_update_avl_pages + .align 2 + .global make_superblock + .type make_superblock, %function +make_superblock: + mov x5, x0 + strh wzr, [x0, 4] + strb wzr, [x0, 7] + adrp x6, .LANCHOR0 + add x0, x6, :lo12:.LANCHOR0 + mov x7, 0 + add x8, x5, 16 + add x9, x0, 2504 + mov w11, -1 + ldrh w10, [x0, 2472] + cmp w10, w7, uxth + bhi .L576 + add x1, x6, :lo12:.LANCHOR0 + ldrb w0, [x5, 7] + strb wzr, [x5, 9] + ldrh w2, [x1, 2544] + mul w0, w0, w2 + strh w0, [x5, 4] + ldr w0, [x1, 2372] + cbz w0, .L572 + adrp x0, .LANCHOR2+440 + ldrh w1, [x5] + ldr x0, [x0, #:lo12:.LANCHOR2+440] + ldrh w0, [x0, x1, lsl 1] + cmp w0, 79 + bhi .L572 + mov w0, 1 + strb w0, [x5, 9] +.L572: + add x6, x6, :lo12:.LANCHOR0 + ldrb w0, [x6, 72] + cbz w0, .L575 + mov w0, 1 + strb w0, [x5, 9] +.L575: + mov w0, 0 + ret +.L576: + stp x29, x30, [sp, -16]! + add x29, sp, 0 +.L559: + ldrh w1, [x5] + ldrb w0, [x9, x7] + bl V2P_block + mov w4, w0 + strh w11, [x8] + bl FtlBbmIsBadBlock + cbnz w0, .L558 + strh w4, [x8] + ldrb w0, [x5, 7] + add w0, w0, 1 + strb w0, [x5, 7] +.L558: + add x7, x7, 1 + add x8, x8, 2 + cmp w10, w7, uxth + bhi .L559 + add x1, x6, :lo12:.LANCHOR0 + ldrb w0, [x5, 7] + strb wzr, [x5, 9] + ldrh w2, [x1, 2544] + mul w0, w0, w2 + strh w0, [x5, 4] + ldr w0, [x1, 2372] + cbz w0, .L560 + adrp x0, .LANCHOR2+440 + ldrh w1, [x5] + ldr x0, [x0, #:lo12:.LANCHOR2+440] + ldrh w0, [x0, x1, lsl 1] + cmp w0, 79 + bhi .L560 + mov w0, 1 + strb w0, [x5, 9] +.L560: + add x6, x6, :lo12:.LANCHOR0 + ldrb w0, [x6, 72] + cbz w0, .L561 + mov w0, 1 + strb w0, [x5, 9] +.L561: + mov w0, 0 + ldp x29, x30, [sp], 16 + ret + .size make_superblock, .-make_superblock + .align 2 + .global update_multiplier_value + .type update_multiplier_value, %function +update_multiplier_value: + and w7, w0, 65535 + adrp x0, .LANCHOR0 + add x0, x0, :lo12:.LANCHOR0 + mov x8, 0 + mov w6, 0 + add x5, x0, 2504 + ldrh w9, [x0, 2472] + ldrh w10, [x0, 2544] + cmp w9, w8, uxth + bhi .L589 + cbz w6, .L587 + mov w0, 32768 + sdiv w6, w0, w6 +.L588: + adrp x0, .LANCHOR2+504 + mov w1, 6 + ldr x0, [x0, #:lo12:.LANCHOR2+504] + umaddl x7, w7, w1, x0 + mov w0, 0 + strh w6, [x7, 4] + ret +.L582: + mov w6, 0 + b .L581 +.L587: + mov w6, 0 + b .L588 +.L589: + stp x29, x30, [sp, -16]! + add x29, sp, 0 +.L580: + ldrb w0, [x5, x8] + mov w1, w7 + bl V2P_block + bl FtlBbmIsBadBlock + cbnz w0, .L579 + add w6, w6, w10 + and w6, w6, 65535 +.L579: + add x8, x8, 1 + cmp w9, w8, uxth + bhi .L580 + cbz w6, .L582 + mov w0, 32768 + sdiv w6, w0, w6 +.L581: + adrp x0, .LANCHOR2+504 + mov w1, 6 + ldr x0, [x0, #:lo12:.LANCHOR2+504] + umaddl x7, w7, w1, x0 + mov w0, 0 + strh w6, [x7, 4] + ldp x29, x30, [sp], 16 + ret + .size update_multiplier_value, .-update_multiplier_value + .align 2 + .global GetFreeBlockMinEraseCount + .type GetFreeBlockMinEraseCount, %function +GetFreeBlockMinEraseCount: + adrp x1, .LANCHOR2 + add x1, x1, :lo12:.LANCHOR2 + ldr x0, [x1, 544] + cbz x0, .L592 + ldr x2, [x1, 504] + ldr x1, [x1, 440] + sub x0, x0, x2 + mov x2, -6148914691236517206 + asr x0, x0, 1 + movk x2, 0xaaab, lsl 0 + mul x0, x0, x2 + and x0, x0, 65535 + ldrh w0, [x1, x0, lsl 1] + ret +.L592: + mov w0, 0 + ret + .size GetFreeBlockMinEraseCount, .-GetFreeBlockMinEraseCount + .align 2 + .global GetFreeBlockMaxEraseCount + .type GetFreeBlockMaxEraseCount, %function +GetFreeBlockMaxEraseCount: + adrp x2, .LANCHOR2 + add x4, x2, :lo12:.LANCHOR2 + and w0, w0, 65535 + ldr x1, [x4, 544] + cbz x1, .L600 + ldrh w3, [x4, 552] + mov w5, 7 + ldr x4, [x4, 504] + mov w6, 6 + mov w7, 65535 + sub x1, x1, x4 + mul w3, w3, w5 + asr x1, x1, 1 + asr w3, w3, 3 + cmp w0, w3 + csel w0, w3, w0, gt + mov x3, -6148914691236517206 + movk x3, 0xaaab, lsl 0 + mul x1, x1, x3 + mov w3, 0 + and w1, w1, 65535 +.L596: + cmp w0, w3 + beq .L599 + umull x5, w1, w6 + ldrh w5, [x4, x5] + cmp w5, w7 + bne .L597 +.L599: + add x2, x2, :lo12:.LANCHOR2 + ubfiz x1, x1, 1, 16 + ldr x0, [x2, 440] + ldrh w0, [x0, x1] + ret +.L597: + add w3, w3, 1 + mov w1, w5 + and w3, w3, 65535 + b .L596 +.L600: + mov w0, 0 + ret + .size GetFreeBlockMaxEraseCount, .-GetFreeBlockMaxEraseCount + .align 2 + .global FtlPrintInfo2buf + .type FtlPrintInfo2buf, %function +FtlPrintInfo2buf: + stp x29, x30, [sp, -112]! + adrp x1, .LC5 + add x1, x1, :lo12:.LC5 + add x29, sp, 0 + stp x23, x24, [sp, 48] + adrp x24, .LANCHOR0 + add x24, x24, :lo12:.LANCHOR0 + stp x19, x20, [sp, 16] + stp x21, x22, [sp, 32] + add x20, x0, 12 + stp x25, x26, [sp, 64] + mov x22, x0 + str x27, [sp, 80] + bl strcpy + ldr w2, [x24, 176] + mov x0, x20 + adrp x1, .LC6 + add x1, x1, :lo12:.LC6 + bl sprintf + add x20, x20, w0, sxtw + ldr w2, [x24, 2560] + mov x0, x20 + adrp x1, .LC7 + add x1, x1, :lo12:.LC7 + bl sprintf + add x20, x20, w0, sxtw + adrp x0, .LANCHOR1+504 + ldr w0, [x0, #:lo12:.LANCHOR1+504] + cmp w0, 1 + beq .L602 + sub w0, w20, w22 +.L601: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldr x27, [sp, 80] + ldp x29, x30, [sp], 112 + ret +.L602: + add x3, x29, 108 + add x2, x29, 104 + add x1, x29, 100 + add x0, x29, 96 + bl NandcGetTimeCfg + adrp x25, .LANCHOR2 + ldp w4, w5, [x29, 104] + adrp x1, .LC8 + ldp w2, w3, [x29, 96] + add x1, x1, :lo12:.LC8 + mov x0, x20 + add x23, x25, :lo12:.LANCHOR2 + bl sprintf + add x21, x20, w0, sxtw + mov x0, x21 + adrp x1, .LC9 + add x1, x1, :lo12:.LC9 + bl strcpy + ldr w2, [x24, 2616] + add x21, x21, 10 + mov x0, x21 + adrp x1, .LC10 + add x1, x1, :lo12:.LC10 + bl sprintf + add x21, x21, w0, sxtw + ldr w2, [x23, 716] + mov x0, x21 + adrp x1, .LC11 + add x1, x1, :lo12:.LC11 + bl sprintf + add x21, x21, w0, sxtw + ldr w2, [x23, 720] + mov x0, x21 + adrp x1, .LC12 + add x1, x1, :lo12:.LC12 + bl sprintf + add x21, x21, w0, sxtw + ldr w2, [x23, 724] + mov x0, x21 + adrp x1, .LC13 + add x1, x1, :lo12:.LC13 + bl sprintf + add x21, x21, w0, sxtw + ldr w2, [x23, 728] + mov x0, x21 + adrp x1, .LC14 + add x1, x1, :lo12:.LC14 + bl sprintf + add x21, x21, w0, sxtw + ldr w2, [x23, 732] + mov x0, x21 + adrp x1, .LC15 + add x1, x1, :lo12:.LC15 + bl sprintf + add x21, x21, w0, sxtw + ldr w2, [x23, 736] + mov x0, x21 + adrp x1, .LC16 + add x1, x1, :lo12:.LC16 + bl sprintf + add x21, x21, w0, sxtw + ldr w2, [x23, 740] + mov x0, x21 + adrp x1, .LC17 + add x1, x1, :lo12:.LC17 + bl sprintf + add x21, x21, w0, sxtw + ldr w2, [x23, 744] + mov x0, x21 + adrp x1, .LC18 + add x1, x1, :lo12:.LC18 + lsr w2, w2, 11 + bl sprintf + ldr w2, [x23, 748] + add x21, x21, w0, sxtw + mov x0, x21 + adrp x1, .LC19 + add x1, x1, :lo12:.LC19 + lsr w2, w2, 11 + bl sprintf + ldr w2, [x23, 752] + add x21, x21, w0, sxtw + mov x0, x21 + adrp x1, .LC20 + add x1, x1, :lo12:.LC20 + bl sprintf + add x21, x21, w0, sxtw + ldr w2, [x23, 756] + adrp x1, .LC21 + add x1, x1, :lo12:.LC21 + mov x0, x21 + bl sprintf + add x21, x21, w0, sxtw + bl FtlBbtCalcTotleCnt + and w3, w0, 65535 + ldrh w2, [x24, 2630] + mov x0, x21 + adrp x1, .LC22 + add x1, x1, :lo12:.LC22 + bl sprintf + add x21, x21, w0, sxtw + ldrh w2, [x23, 552] + mov x0, x21 + adrp x1, .LC23 + add x1, x1, :lo12:.LC23 + bl sprintf + add x21, x21, w0, sxtw + ldr w2, [x23, 760] + mov x0, x21 + adrp x1, .LC24 + add x1, x1, :lo12:.LC24 + bl sprintf + add x21, x21, w0, sxtw + ldr w2, [x23, 764] + mov x0, x21 + adrp x1, .LC25 + add x1, x1, :lo12:.LC25 + bl sprintf + add x21, x21, w0, sxtw + ldr w2, [x23, 768] + mov x0, x21 + adrp x1, .LC26 + add x1, x1, :lo12:.LC26 + bl sprintf + add x21, x21, w0, sxtw + ldr w2, [x23, 448] + mov x0, x21 + adrp x1, .LC27 + add x1, x1, :lo12:.LC27 + bl sprintf + add x21, x21, w0, sxtw + ldr w2, [x23, 772] + mov x0, x21 + adrp x1, .LC28 + add x1, x1, :lo12:.LC28 + bl sprintf + add x21, x21, w0, sxtw + ldr w2, [x23, 776] + mov x0, x21 + adrp x1, .LC29 + add x1, x1, :lo12:.LC29 + bl sprintf + add x21, x21, w0, sxtw + ldrh w2, [x23, 486] + mov x0, x21 + adrp x1, .LC30 + add x1, x1, :lo12:.LC30 + bl sprintf + add x21, x21, w0, sxtw + ldrh w2, [x23, 484] + mov x0, x21 + adrp x1, .LC31 + add x1, x1, :lo12:.LC31 + bl sprintf + add x21, x21, w0, sxtw + ldr w2, [x24, 2584] + mov x0, x21 + adrp x1, .LC32 + add x1, x1, :lo12:.LC32 + bl sprintf + add x21, x21, w0, sxtw + ldr w2, [x24, 2576] + mov x0, x21 + adrp x1, .LC33 + add x1, x1, :lo12:.LC33 + bl sprintf + add x21, x21, w0, sxtw + ldr w2, [x24, 2468] + mov x0, x21 + adrp x1, .LC34 + add x1, x1, :lo12:.LC34 + bl sprintf + add x21, x21, w0, sxtw + ldrh w2, [x24, 2726] + mov x0, x21 + adrp x1, .LC35 + add x1, x1, :lo12:.LC35 + bl sprintf + add x21, x21, w0, sxtw + ldrh w2, [x24, 2480] + mov x0, x21 + adrp x1, .LC36 + add x1, x1, :lo12:.LC36 + bl sprintf + add x21, x21, w0, sxtw + ldrh w2, [x23, 780] + mov x0, x21 + adrp x1, .LC37 + add x1, x1, :lo12:.LC37 + bl sprintf + add x21, x21, w0, sxtw + ldr w2, [x24, 2484] + mov x0, x21 + adrp x1, .LC38 + add x1, x1, :lo12:.LC38 + bl sprintf + add x21, x21, w0, sxtw + ldrh w2, [x23, 784] + mov x0, x21 + adrp x1, .LC39 + add x1, x1, :lo12:.LC39 + bl sprintf + add x21, x21, w0, sxtw + ldrh w2, [x24, 2624] + mov x0, x21 + adrp x1, .LC40 + add x1, x1, :lo12:.LC40 + bl sprintf + add x21, x21, w0, sxtw + ldrh w2, [x23, 562] + mov x0, x21 + adrp x1, .LC41 + add x1, x1, :lo12:.LC41 + bl sprintf + add x21, x21, w0, sxtw + ldrb w2, [x23, 566] + mov x0, x21 + adrp x1, .LC42 + add x1, x1, :lo12:.LC42 + bl sprintf + add x21, x21, w0, sxtw + ldrh w2, [x23, 560] + mov x0, x21 + adrp x1, .LC43 + add x1, x1, :lo12:.LC43 + bl sprintf + add x21, x21, w0, sxtw + ldrb w2, [x23, 568] + mov x0, x21 + adrp x1, .LC44 + add x1, x1, :lo12:.LC44 + bl sprintf + add x21, x21, w0, sxtw + ldrh w2, [x23, 564] + mov x0, x21 + adrp x1, .LC45 + add x1, x1, :lo12:.LC45 + bl sprintf + add x21, x21, w0, sxtw + ldrh w1, [x23, 560] + ldr x0, [x23, 520] + ldrh w2, [x0, x1, lsl 1] + mov x0, x21 + adrp x1, .LC46 + add x1, x1, :lo12:.LC46 + bl sprintf + add x21, x21, w0, sxtw + ldrh w2, [x23, 610] + mov x0, x21 + adrp x1, .LC47 + add x1, x1, :lo12:.LC47 + bl sprintf + add x21, x21, w0, sxtw + ldrb w2, [x23, 614] + mov x0, x21 + adrp x1, .LC48 + add x1, x1, :lo12:.LC48 + bl sprintf + add x21, x21, w0, sxtw + ldrh w2, [x23, 608] + mov x0, x21 + adrp x1, .LC49 + add x1, x1, :lo12:.LC49 + bl sprintf + add x21, x21, w0, sxtw + ldrb w2, [x23, 616] + mov x0, x21 + adrp x1, .LC50 + add x1, x1, :lo12:.LC50 + bl sprintf + add x21, x21, w0, sxtw + ldrh w2, [x23, 612] + mov x0, x21 + adrp x1, .LC51 + add x1, x1, :lo12:.LC51 + bl sprintf + add x21, x21, w0, sxtw + ldrh w1, [x23, 608] + ldr x0, [x23, 520] + ldrh w2, [x0, x1, lsl 1] + mov x0, x21 + adrp x1, .LC52 + add x1, x1, :lo12:.LC52 + bl sprintf + add x21, x21, w0, sxtw + ldrh w2, [x23, 658] + mov x0, x21 + adrp x1, .LC53 + add x1, x1, :lo12:.LC53 + bl sprintf + add x21, x21, w0, sxtw + ldrb w2, [x23, 662] + mov x0, x21 + adrp x1, .LC54 + add x1, x1, :lo12:.LC54 + bl sprintf + add x21, x21, w0, sxtw + ldrh w2, [x23, 656] + mov x0, x21 + adrp x1, .LC55 + add x1, x1, :lo12:.LC55 + bl sprintf + add x21, x21, w0, sxtw + ldrb w2, [x23, 664] + mov x0, x21 + adrp x1, .LC56 + add x1, x1, :lo12:.LC56 + bl sprintf + add x21, x21, w0, sxtw + ldrh w2, [x23, 660] + mov x0, x21 + adrp x1, .LC57 + add x1, x1, :lo12:.LC57 + bl sprintf + add x21, x21, w0, sxtw + ldrh w2, [x23, 802] + mov x0, x21 + adrp x1, .LC58 + add x1, x1, :lo12:.LC58 + bl sprintf + add x21, x21, w0, sxtw + ldrb w2, [x23, 806] + mov x0, x21 + adrp x1, .LC59 + add x1, x1, :lo12:.LC59 + bl sprintf + add x21, x21, w0, sxtw + ldrh w2, [x23, 800] + mov x0, x21 + adrp x1, .LC60 + add x1, x1, :lo12:.LC60 + bl sprintf + add x21, x21, w0, sxtw + ldrb w2, [x23, 808] + mov x0, x21 + adrp x1, .LC61 + add x1, x1, :lo12:.LC61 + bl sprintf + add x21, x21, w0, sxtw + ldrh w2, [x23, 804] + mov x0, x21 + adrp x1, .LC62 + add x1, x1, :lo12:.LC62 + bl sprintf + add x21, x21, w0, sxtw + ldr w5, [x23, 924] + adrp x1, .LC63 + ldr w3, [x23, 928] + add x1, x1, :lo12:.LC63 + ldr w4, [x23, 932] + ldr w0, [x24, 2372] + ldr w2, [x23, 1360] + orr w2, w0, w2, lsl 8 + mov x0, x21 + bl sprintf + add x19, x21, w0, sxtw + ldr w2, [x23, 920] + mov x0, x19 + adrp x1, .LC64 + add x1, x1, :lo12:.LC64 + bl sprintf + add x19, x19, w0, sxtw + ldr w2, [x23, 944] + mov x0, x19 + adrp x1, .LC65 + add x1, x1, :lo12:.LC65 + bl sprintf + add x19, x19, w0, sxtw + ldrh w2, [x23, 1364] + mov x0, x19 + adrp x1, .LC66 + add x1, x1, :lo12:.LC66 + bl sprintf + add x19, x19, w0, sxtw + ldrh w2, [x23, 1366] + mov x0, x19 + adrp x1, .LC67 + add x1, x1, :lo12:.LC67 + bl sprintf + add x19, x19, w0, sxtw + ldr w2, [x23, 1368] + mov x0, x19 + adrp x1, .LC68 + add x1, x1, :lo12:.LC68 + bl sprintf + add x19, x19, w0, sxtw + ldrh w2, [x23, 1372] + adrp x1, .LC69 + add x1, x1, :lo12:.LC69 + mov x0, x19 + bl sprintf + add x19, x19, w0, sxtw + bl GetFreeBlockMinEraseCount + and w2, w0, 65535 + adrp x1, .LC70 + mov x0, x19 + add x1, x1, :lo12:.LC70 + bl sprintf + add x19, x19, w0, sxtw + ldrh w0, [x23, 552] + bl GetFreeBlockMaxEraseCount + and w2, w0, 65535 + adrp x1, .LC71 + mov x0, x19 + add x1, x1, :lo12:.LC71 + bl sprintf + add x19, x19, w0, sxtw + ldrh w0, [x23, 800] + mov w1, 65535 + cmp w0, w1 + beq .L604 + ldr x1, [x23, 520] + ubfiz x0, x0, 1, 16 + ldrh w2, [x1, x0] + mov x0, x19 + adrp x1, .LC72 + add x1, x1, :lo12:.LC72 + bl sprintf + add x19, x19, w0, sxtw +.L604: + mov w0, 0 + adrp x23, .LC73 + bl List_get_gc_head_node + add x21, x25, :lo12:.LANCHOR2 + and w3, w0, 65535 + add x23, x23, :lo12:.LC73 + mov w20, 0 + mov w27, 65535 + mov w26, 6 +.L606: + cmp w3, w27 + beq .L605 + umull x24, w3, w26 + ldr x0, [x21, 504] + ldr x4, [x21, 440] + ubfiz x1, x3, 1, 16 + ldr x2, [x21, 520] + add x0, x0, x24 + ldrh w6, [x4, x1] + ldrh w5, [x0, 4] + mov x0, x19 + ldrh w4, [x2, x1] + mov w2, w20 + mov x1, x23 + add w20, w20, 1 + bl sprintf + add x19, x19, w0, sxtw + ldr x0, [x21, 504] + cmp w20, 16 + ldrh w3, [x0, x24] + bne .L606 +.L605: + add x25, x25, :lo12:.LANCHOR2 + adrp x21, .LC74 + add x21, x21, :lo12:.LC74 + mov w20, 0 + mov w24, 65535 + mov w26, 6 + ldr x0, [x25, 504] + ldr x3, [x25, 544] + sub x3, x3, x0 + mov x0, -6148914691236517206 + asr x3, x3, 1 + movk x0, 0xaaab, lsl 0 + mul x3, x3, x0 + and w3, w3, 65535 +.L608: + cmp w3, w24 + beq .L607 + umull x23, w3, w26 + ldr x0, [x25, 504] + ldr x2, [x25, 440] + ubfiz x1, x3, 1, 16 + add x0, x0, x23 + ldrh w5, [x2, x1] + mov w2, w20 + ldrh w4, [x0, 4] + mov x1, x21 + mov x0, x19 + add w20, w20, 1 + bl sprintf + add x19, x19, w0, sxtw + cmp w20, 4 + beq .L607 + ldr x0, [x25, 504] + ldrh w3, [x0, x23] + b .L608 +.L607: + sub w0, w19, w22 + b .L601 + .size FtlPrintInfo2buf, .-FtlPrintInfo2buf + .align 2 + .global ftl_proc_ftl_read + .type ftl_proc_ftl_read, %function +ftl_proc_ftl_read: + stp x29, x30, [sp, -32]! + adrp x2, .LC75 + adrp x1, .LC76 + add x2, x2, :lo12:.LC75 + add x29, sp, 0 + add x1, x1, :lo12:.LC76 + stp x19, x20, [sp, 16] + mov x20, x0 + bl sprintf + add x19, x20, w0, sxtw + mov x0, x19 + bl FtlPrintInfo2buf + add x0, x19, w0, sxtw + sub w0, w0, w20 + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 32 + ret + .size ftl_proc_ftl_read, .-ftl_proc_ftl_read + .align 2 + .global GetSwlReplaceBlock + .type GetSwlReplaceBlock, %function +GetSwlReplaceBlock: + stp x29, x30, [sp, -32]! + adrp x8, .LANCHOR2 + add x0, x8, :lo12:.LANCHOR2 + add x29, sp, 0 + stp x19, x20, [sp, 16] + ldr w2, [x0, 768] + ldr w1, [x0, 776] + cmp w2, w1 + bcs .L617 + adrp x1, .LANCHOR0 + add x2, x1, :lo12:.LANCHOR0 + ldr x5, [x0, 440] + str wzr, [x0, 760] + ldrh w3, [x2, 2480] + mov x2, 0 +.L618: + cmp w3, w2 + bhi .L619 + add x2, x8, :lo12:.LANCHOR2 + add x1, x1, :lo12:.LANCHOR0 + ldr w0, [x2, 760] + ldrh w1, [x1, 2536] + udiv w3, w0, w3 + str w3, [x2, 768] + ldr w3, [x2, 764] + sub w0, w0, w3 + udiv w0, w0, w1 + str w0, [x2, 760] +.L620: + add x1, x8, :lo12:.LANCHOR2 + ldr w9, [x1, 776] + ldr w10, [x1, 768] + add w0, w9, 256 + cmp w0, w10 + bls .L625 + ldr w1, [x1, 772] + add w0, w9, 768 + cmp w0, w1 + bls .L625 + adrp x0, .LANCHOR0+2372 + ldr w0, [x0, #:lo12:.LANCHOR0+2372] + cbnz w0, .L626 +.L628: + mov w20, 65535 +.L627: + mov w0, w20 + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 32 + ret +.L619: + ldrh w4, [x5, x2, lsl 1] + add x2, x2, 1 + ldr w6, [x0, 760] + add w4, w4, w6 + str w4, [x0, 760] + b .L618 +.L617: + ldr w1, [x0, 772] + cmp w2, w1 + bls .L620 + add w1, w1, 1 + adrp x2, .LANCHOR0 + add x2, x2, :lo12:.LANCHOR0 + str w1, [x0, 772] + mov w1, 0 +.L622: + ldrh w3, [x2, 2480] + cmp w1, w3 + bcs .L620 + ldr x5, [x0, 440] + ubfiz x4, x1, 1, 32 + add w1, w1, 1 + ldrh w3, [x5, x4] + add w3, w3, 1 + strh w3, [x5, x4] + b .L622 +.L626: + cmp w9, 40 + bhi .L628 +.L625: + add x0, x8, :lo12:.LANCHOR2 + ldrh w0, [x0, 552] + add w0, w0, w0, lsl 1 + lsr w0, w0, 2 + bl GetFreeBlockMaxEraseCount + and w6, w0, 65535 + add w0, w9, 64 + cmp w6, w0 + bcs .L629 + cmp w9, 40 + bhi .L628 +.L629: + add x1, x8, :lo12:.LANCHOR2 + ldr x0, [x1, 512] + cbz x0, .L628 + adrp x2, .LANCHOR0+2480 + mov w4, 65535 + mov x13, -6148914691236517206 + mov w11, w4 + ldrh w12, [x2, #:lo12:.LANCHOR0+2480] + mov w2, w4 + ldr x5, [x1, 440] + movk x13, 0xaaab, lsl 0 + ldr x7, [x1, 504] + mov w14, 6 + mov w1, 0 +.L630: + ldrh w3, [x0] + cmp w3, w11 + bne .L633 + mov w20, w2 +.L632: + mov w0, 65535 + cmp w20, w0 + beq .L628 + ubfiz x7, x20, 1, 32 + ldrh w3, [x5, x7] + cmp w9, w3 + bcs .L634 + bl GetFreeBlockMinEraseCount + cmp w9, w0, uxth + bcs .L634 + add x0, x8, :lo12:.LANCHOR2 + str w4, [x0, 776] +.L634: + cmp w10, w3 + bls .L628 + add w0, w3, 128 + cmp w6, w0 + ble .L628 + add w0, w3, 256 + cmp w10, w0 + bhi .L635 + add x0, x8, :lo12:.LANCHOR2 + add w3, w3, 768 + ldr w0, [x0, 772] + cmp w3, w0 + bcs .L628 +.L635: + add x19, x8, :lo12:.LANCHOR2 + ldrh w5, [x5, x7] + mov w2, w10 + mov w1, w20 + ldr x0, [x19, 520] + ldr w3, [x19, 772] + ldrh w4, [x0, x7] + adrp x0, .LC77 + add x0, x0, :lo12:.LC77 + bl printk + mov w0, 1 + str w0, [x19, 1376] + b .L627 +.L633: + add w1, w1, 1 + and w1, w1, 65535 + cmp w1, w12 + bhi .L628 + ldrh w15, [x0, 4] + cbz w15, .L631 + sub x0, x0, x7 + asr x0, x0, 1 + mul x0, x0, x13 + and w20, w0, 65535 + and x0, x0, 65535 + ldrh w0, [x5, x0, lsl 1] + cmp w9, w0 + bcs .L632 + cmp w4, w0 + bls .L631 + mov w4, w0 + mov w2, w20 +.L631: + umaddl x0, w3, w14, x7 + b .L630 + .size GetSwlReplaceBlock, .-GetSwlReplaceBlock + .align 2 + .global free_data_superblock + .type free_data_superblock, %function +free_data_superblock: + and w0, w0, 65535 + mov w1, 65535 + cmp w0, w1 + beq .L646 + stp x29, x30, [sp, -16]! + adrp x2, .LANCHOR2+520 + ubfiz x1, x0, 1, 16 + add x29, sp, 0 + ldr x2, [x2, #:lo12:.LANCHOR2+520] + strh wzr, [x2, x1] + bl INSERT_FREE_LIST + mov w0, 0 + ldp x29, x30, [sp], 16 + ret +.L646: + mov w0, 0 + ret + .size free_data_superblock, .-free_data_superblock + .align 2 + .global FtlGcBufInit + .type FtlGcBufInit, %function +FtlGcBufInit: + adrp x0, .LANCHOR2 + add x1, x0, :lo12:.LANCHOR2 + adrp x3, .LANCHOR0 + mov x7, x0 + add x9, x3, :lo12:.LANCHOR0 + mov w8, 0 + mov w10, 24 + mov w11, 1 + mov w4, 4 + mov w12, 56 + str wzr, [x1, 1380] +.L650: + ldrh w0, [x9, 2472] + cmp w8, w0 + bcc .L651 + add x3, x3, :lo12:.LANCHOR0 + add x1, x7, :lo12:.LANCHOR2 + mov w6, 4 + mov w7, 24 +.L652: + ldr w2, [x1, 1416] + cmp w0, w2 + bcc .L653 + ret +.L651: + umull x2, w8, w10 + ldr x5, [x1, 1384] + ldr x6, [x1, 1392] + add x0, x5, x2 + str w11, [x0, 16] + ldrh w0, [x9, 2554] + mul w0, w0, w8 + sdiv w0, w0, w4 + add x0, x6, w0, sxtw 2 + str x0, [x5, x2] + ldrh w0, [x9, 2556] + ldr x6, [x1, 1384] + ldr x13, [x1, 1400] + add x5, x6, x2 + mul w0, w0, w8 + sdiv w0, w0, w4 + add x0, x13, w0, sxtw 2 + str x0, [x5, 8] + ldr x0, [x1, 1408] + ldr x2, [x6, x2] + nop // between mem op and mult-accumulate + umaddl x0, w8, w12, x0 + add w8, w8, 1 + and w8, w8, 65535 + str x2, [x0, 8] + ldr x2, [x5, 8] + str x2, [x0, 16] + b .L650 +.L653: + umull x5, w0, w7 + ldr x4, [x1, 1384] + ldr x8, [x1, 1392] + add x2, x4, x5 + str wzr, [x2, 16] + ldrh w2, [x3, 2554] + mul w2, w2, w0 + sdiv w2, w2, w6 + add x2, x8, w2, sxtw 2 + str x2, [x4, x5] + ldrh w2, [x3, 2556] + ldr x4, [x1, 1384] + add x4, x4, x5 + ldr x5, [x1, 1400] + mul w2, w2, w0 + add w0, w0, 1 + and w0, w0, 65535 + sdiv w2, w2, w6 + add x2, x5, w2, sxtw 2 + str x2, [x4, 8] + b .L652 + .size FtlGcBufInit, .-FtlGcBufInit + .align 2 + .global FtlGcBufFree + .type FtlGcBufFree, %function +FtlGcBufFree: + adrp x2, .LANCHOR2 + add x2, x2, :lo12:.LANCHOR2 + mov w3, 0 + mov w7, 56 + mov w9, 24 + ldr w8, [x2, 1416] + ldr x4, [x2, 1384] +.L655: + cmp w3, w1 + bcs .L654 + umaddl x6, w3, w7, x0 + mov w2, 0 + b .L660 +.L656: + add w2, w2, 1 + and w2, w2, 65535 +.L660: + cmp w2, w8 + bcs .L657 + umull x5, w2, w9 + add x10, x4, x5 + ldr x11, [x4, x5] + ldr x5, [x6, 8] + cmp x11, x5 + bne .L656 + str wzr, [x10, 16] +.L657: + add w3, w3, 1 + and w3, w3, 65535 + b .L655 +.L654: + ret + .size FtlGcBufFree, .-FtlGcBufFree + .align 2 + .global FtlGcBufAlloc + .type FtlGcBufAlloc, %function +FtlGcBufAlloc: + adrp x2, .LANCHOR2 + add x2, x2, :lo12:.LANCHOR2 + mov w3, 0 + mov w7, 24 + mov w8, 1 + mov w9, 56 + ldr w5, [x2, 1416] + ldr x6, [x2, 1384] +.L662: + cmp w3, w1 + bcs .L661 + mov w2, 0 + b .L667 +.L663: + add w2, w2, 1 + and w2, w2, 65535 +.L667: + cmp w2, w5 + bcs .L664 + umaddl x4, w2, w7, x6 + ldr w10, [x4, 16] + cbnz w10, .L663 + umaddl x2, w3, w9, x0 + ldr x10, [x4] + str w8, [x4, 16] + str x10, [x2, 8] + ldr x4, [x4, 8] + str x4, [x2, 16] +.L664: + add w3, w3, 1 + and w3, w3, 65535 + b .L662 +.L661: + ret + .size FtlGcBufAlloc, .-FtlGcBufAlloc + .align 2 + .global IsBlkInGcList + .type IsBlkInGcList, %function +IsBlkInGcList: + adrp x1, .LANCHOR2 + add x1, x1, :lo12:.LANCHOR2 + and w0, w0, 65535 + ldrh w2, [x1, 1420] + ldr x3, [x1, 1424] + mov x1, 0 +.L669: + cmp w2, w1, uxth + bhi .L671 + mov w0, 0 + ret +.L671: + add x1, x1, 1 + add x4, x3, x1, lsl 1 + ldrh w4, [x4, -2] + cmp w4, w0 + bne .L669 + mov w0, 1 + ret + .size IsBlkInGcList, .-IsBlkInGcList + .align 2 + .global FtlGcUpdatePage + .type FtlGcUpdatePage, %function +FtlGcUpdatePage: + mov w5, w0 + mov w8, w1 + mov w7, w2 + stp x29, x30, [sp, -16]! + lsr w0, w0, 10 + add x29, sp, 0 + bl P2V_block_in_plane + and w9, w0, 65535 + adrp x3, .LANCHOR2 + add x4, x3, :lo12:.LANCHOR2 + ldrh w1, [x4, 1420] + ldr x6, [x4, 1424] + mov x4, 0 +.L674: + and w2, w4, 65535 + cmp w2, w1 + bcc .L676 + bne .L675 + and x4, x4, 65535 + strh w0, [x6, x4, lsl 1] + add x4, x3, :lo12:.LANCHOR2 + ldrh w0, [x4, 1420] + add w0, w0, 1 + strh w0, [x4, 1420] + b .L675 +.L676: + add x4, x4, 1 + add x2, x6, x4, lsl 1 + ldrh w2, [x2, -2] + cmp w2, w9 + bne .L674 +.L675: + add x0, x3, :lo12:.LANCHOR2 + mov w1, 12 + ldrh w3, [x0, 1432] + ldr x4, [x0, 1440] + umull x3, w3, w1 + add x4, x4, x3 + str w8, [x4, 4] + ldr x1, [x0, 1440] + add x4, x1, x3 + str w7, [x4, 8] + str w5, [x1, x3] + ldrh w1, [x0, 1432] + add w1, w1, 1 + strh w1, [x0, 1432] + ldp x29, x30, [sp], 16 + ret + .size FtlGcUpdatePage, .-FtlGcUpdatePage + .align 2 + .global FtlGcRefreshOpenBlock + .type FtlGcRefreshOpenBlock, %function +FtlGcRefreshOpenBlock: + stp x29, x30, [sp, -32]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x19, .LANCHOR2 + add x19, x19, :lo12:.LANCHOR2 + and w20, w0, 65535 + ldrh w0, [x19, 1448] + cmp w0, w20 + beq .L680 + ldrh w0, [x19, 1450] + cmp w0, w20 + beq .L680 + ldrh w0, [x19, 1452] + cmp w0, w20 + beq .L680 + ldrh w0, [x19, 1454] + cmp w0, w20 + beq .L680 + mov w1, w20 + adrp x0, .LC78 + add x0, x0, :lo12:.LC78 + bl printk + ldrh w1, [x19, 1448] + mov w0, 65535 + cmp w1, w0 + bne .L682 + strh w20, [x19, 1448] +.L680: + mov w0, 0 + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 32 + ret +.L682: + ldrh w1, [x19, 1450] + cmp w1, w0 + bne .L683 + strh w20, [x19, 1450] + b .L680 +.L683: + ldrh w1, [x19, 1452] + cmp w1, w0 + bne .L684 + strh w20, [x19, 1452] + b .L680 +.L684: + ldrh w1, [x19, 1454] + cmp w1, w0 + bne .L680 + strh w20, [x19, 1454] + b .L680 + .size FtlGcRefreshOpenBlock, .-FtlGcRefreshOpenBlock + .align 2 + .global FtlGcRefreshBlock + .type FtlGcRefreshBlock, %function +FtlGcRefreshBlock: + stp x29, x30, [sp, -48]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x19, .LANCHOR2 + add x19, x19, :lo12:.LANCHOR2 + and w20, w0, 65535 + str x21, [sp, 32] + ldrh w0, [x19, 1448] + cmp w0, w20 + beq .L693 + ldrh w0, [x19, 1450] + cmp w0, w20 + beq .L693 + ldrh w0, [x19, 1452] + cmp w0, w20 + beq .L693 + ldrh w0, [x19, 1454] + mov w21, 0 + cmp w0, w20 + beq .L686 + mov w1, w20 + adrp x0, .LC78 + add x0, x0, :lo12:.LC78 + bl printk + ldrh w1, [x19, 1448] + mov w0, 65535 + cmp w1, w0 + bne .L688 + strh w20, [x19, 1448] +.L686: + mov w0, w21 + ldr x21, [sp, 32] + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 48 + ret +.L688: + ldrh w1, [x19, 1450] + cmp w1, w0 + bne .L689 + strh w20, [x19, 1450] + b .L686 +.L689: + ldrh w1, [x19, 1452] + cmp w1, w0 + bne .L690 + strh w20, [x19, 1452] + b .L686 +.L690: + ldrh w1, [x19, 1454] + cmp w1, w0 + bne .L695 + strh w20, [x19, 1454] + b .L686 +.L693: + mov w21, 0 + b .L686 +.L695: + mov w21, -1 + b .L686 + .size FtlGcRefreshBlock, .-FtlGcRefreshBlock + .align 2 + .global FtlGcMarkBadPhyBlk + .type FtlGcMarkBadPhyBlk, %function +FtlGcMarkBadPhyBlk: + stp x29, x30, [sp, -64]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x19, .LANCHOR2 + stp x21, x22, [sp, 32] + add x22, x19, :lo12:.LANCHOR2 + and w20, w0, 65535 + str x23, [sp, 48] + mov w0, w20 + bl P2V_block_in_plane + ldrh w1, [x22, 1456] + mov w2, w20 + and w21, w0, 65535 + adrp x0, .LC79 + add x0, x0, :lo12:.LC79 + bl printk + mov w0, w21 + bl FtlGcRefreshBlock + adrp x0, .LANCHOR0+2372 + ldr w0, [x0, #:lo12:.LANCHOR0+2372] + cbz w0, .L698 + ldr x2, [x22, 440] + ubfiz x0, x21, 1, 16 + ldrh w1, [x2, x0] + cmp w1, 39 + bls .L698 + sub w1, w1, #40 + strh w1, [x2, x0] +.L698: + add x2, x19, :lo12:.LANCHOR2 + mov x1, 0 + add x2, x2, 1464 + ldrh w0, [x2, -8] +.L699: + cmp w0, w1, uxth + bhi .L701 + cmp w0, 15 + bhi .L700 + add x19, x19, :lo12:.LANCHOR2 + add w1, w0, 1 + add x19, x19, 1464 + strh w1, [x19, -8] + strh w20, [x19, w0, sxtw 1] + b .L700 +.L701: + add x1, x1, 1 + add x3, x2, x1, lsl 1 + ldrh w3, [x3, -2] + cmp w3, w20 + bne .L699 +.L700: + mov w0, 0 + ldr x23, [sp, 48] + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x29, x30, [sp], 64 + ret + .size FtlGcMarkBadPhyBlk, .-FtlGcMarkBadPhyBlk + .align 2 + .global FtlGcReFreshBadBlk + .type FtlGcReFreshBadBlk, %function +FtlGcReFreshBadBlk: + stp x29, x30, [sp, -32]! + add x29, sp, 0 + str x19, [sp, 16] + adrp x19, .LANCHOR2 + add x0, x19, :lo12:.LANCHOR2 + ldrh w1, [x0, 1456] + cbz w1, .L707 + ldrh w3, [x0, 1448] + mov w2, 65535 + cmp w3, w2 + bne .L707 + ldrh w2, [x0, 1498] + cmp w2, w1 + bcc .L708 + strh wzr, [x0, 1498] +.L708: + add x19, x19, :lo12:.LANCHOR2 + add x0, x19, 1464 + ldrh w1, [x19, 1498] + ldrh w0, [x0, x1, lsl 1] + bl P2V_block_in_plane + bl FtlGcRefreshBlock + ldrh w0, [x19, 1498] + add w0, w0, 1 + strh w0, [x19, 1498] +.L707: + mov w0, 0 + ldr x19, [sp, 16] + ldp x29, x30, [sp], 32 + ret + .size FtlGcReFreshBadBlk, .-FtlGcReFreshBadBlk + .align 2 + .global ftl_memset + .type ftl_memset, %function +ftl_memset: + stp x29, x30, [sp, -16]! + uxtw x2, w2 + add x29, sp, 0 + bl memset + ldp x29, x30, [sp], 16 + ret + .size ftl_memset, .-ftl_memset + .align 2 + .global BuildFlashLsbPageTable + .type BuildFlashLsbPageTable, %function +BuildFlashLsbPageTable: + stp x29, x30, [sp, -32]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + mov w20, w1 + cbnz w0, .L716 + adrp x1, .LANCHOR0 + add x1, x1, :lo12:.LANCHOR0 + add x1, x1, 208 + mov x0, 0 +.L717: + strh w0, [x1, x0, lsl 1] + add x0, x0, 1 + cmp x0, 512 + bne .L717 +.L723: + adrp x19, .LANCHOR2 + add x19, x19, :lo12:.LANCHOR2 + add x19, x19, 1500 + mov w1, 255 + mov w2, 2048 + mov x0, x19 + bl ftl_memset + and w20, w20, 65535 + adrp x0, .LANCHOR0 + add x0, x0, :lo12:.LANCHOR0 + add x0, x0, 208 + mov x1, 0 +.L718: + cmp w20, w1, uxth + bhi .L751 + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 32 + ret +.L716: + cmp w0, 1 + bne .L719 + adrp x2, .LANCHOR0 + add x2, x2, :lo12:.LANCHOR0 + add x2, x2, 208 + mov x1, 0 +.L722: + and w0, w1, 65535 + cmp x1, 3 + bls .L720 + ubfiz w3, w0, 1, 15 + and w0, w0, 1 + add w0, w0, 2 + sub w0, w3, w0 + and w0, w0, 65535 +.L720: + strh w0, [x2, x1, lsl 1] + add x1, x1, 1 + cmp x1, 512 + bne .L722 + b .L723 +.L719: + cmp w0, 2 + bne .L724 + adrp x2, .LANCHOR0 + add x2, x2, :lo12:.LANCHOR0 + add x2, x2, 208 + mov w1, 65535 + mov x0, 0 +.L726: + cmp x0, 2 + and w3, w0, 65535 + csel w3, w3, w1, cc + strh w3, [x2, x0, lsl 1] + add w1, w1, 2 + add x0, x0, 1 + and w1, w1, 65535 + cmp x0, 512 + bne .L726 + b .L723 +.L724: + cmp w0, 3 + bne .L727 + adrp x2, .LANCHOR0 + add x2, x2, :lo12:.LANCHOR0 + add x2, x2, 208 + mov x1, 0 +.L730: + and w0, w1, 65535 + cmp x1, 5 + bls .L728 + ubfiz w3, w0, 1, 15 + and w0, w0, 1 + add w0, w0, 4 + sub w0, w3, w0 + and w0, w0, 65535 +.L728: + strh w0, [x2, x1, lsl 1] + add x1, x1, 1 + cmp x1, 512 + bne .L730 + b .L723 +.L727: + cmp w0, 4 + bne .L731 + adrp x1, .LANCHOR0 + add x1, x1, :lo12:.LANCHOR0 + mov w3, 1 + add x1, x1, 224 + strh w0, [x1, -8] + mov w0, 5 + strh w3, [x1, -14] + mov w3, 2 + strh w0, [x1, -6] + mov w0, 7 + strh w3, [x1, -12] + mov w3, 3 + strh w0, [x1, -4] + mov w0, 8 + strh wzr, [x1, -16] + strh w0, [x1, -2] + mov w0, 8 + strh w3, [x1, -10] +.L733: + and w3, w0, 1 + ubfiz w2, w0, 1, 15 + add w3, w3, 6 + add w0, w0, 1 + sub w2, w2, w3 + strh w2, [x1], 2 + and w0, w0, 65535 + cmp w0, 512 + bne .L733 + b .L723 +.L731: + cmp w0, 5 + bne .L734 + adrp x1, .LANCHOR0 + add x1, x1, :lo12:.LANCHOR0 + add x2, x1, 208 + mov x0, 0 +.L735: + strh w0, [x2, x0, lsl 1] + add x0, x0, 1 + cmp x0, 16 + bne .L735 + add x1, x1, 240 +.L736: + strh w0, [x1], 2 + add w0, w0, 2 + and w0, w0, 65535 + cmp w0, 1008 + bne .L736 + b .L723 +.L734: + cmp w0, 6 + bne .L737 + adrp x3, .LANCHOR0 + add x3, x3, :lo12:.LANCHOR0 + add x3, x3, 208 + mov w1, 0 + mov x2, 0 + mov w4, 12 + mov w5, 10 +.L740: + and w0, w2, 65535 + cmp x2, 5 + bls .L738 + tst x0, 1 + csel w0, w4, w5, ne + sub w0, w1, w0 + and w0, w0, 65535 +.L738: + strh w0, [x3, x2, lsl 1] + add w1, w1, 3 + and w1, w1, 65535 + add x2, x2, 1 + cmp w1, 1536 + bne .L740 + b .L723 +.L737: + cmp w0, 9 + bne .L741 + adrp x0, .LANCHOR0 + add x0, x0, :lo12:.LANCHOR0 + mov w2, 1 + add x0, x0, 214 + mov w1, 3 + strh w2, [x0, -4] + mov w2, 2 + strh wzr, [x0, -6] + strh w2, [x0, -2] +.L742: + strh w1, [x0], 2 + add w1, w1, 2 + and w1, w1, 65535 + cmp w1, 1021 + bne .L742 + b .L723 +.L741: + cmp w0, 10 + bne .L743 + adrp x1, .LANCHOR0 + add x1, x1, :lo12:.LANCHOR0 + add x2, x1, 208 + mov x0, 0 +.L744: + strh w0, [x2, x0, lsl 1] + add x0, x0, 1 + cmp x0, 63 + bne .L744 + add x1, x1, 334 +.L745: + strh w0, [x1], 2 + add w0, w0, 2 + and w0, w0, 65535 + cmp w0, 961 + bne .L745 + b .L723 +.L743: + cmp w0, 11 + bne .L746 + adrp x1, .LANCHOR0 + add x1, x1, :lo12:.LANCHOR0 + add x2, x1, 208 + mov x0, 0 +.L747: + strh w0, [x2, x0, lsl 1] + add x0, x0, 1 + cmp x0, 8 + bne .L747 + add x1, x1, 224 +.L749: + and w3, w0, 1 + ubfiz w2, w0, 1, 15 + add w3, w3, 6 + add w0, w0, 1 + sub w2, w2, w3 + strh w2, [x1], 2 + and w0, w0, 65535 + cmp w0, 512 + bne .L749 + b .L723 +.L746: + cmp w0, 12 + bne .L723 + adrp x0, .LANCHOR0 + add x0, x0, :lo12:.LANCHOR0 + mov w2, 1 + add x0, x0, 216 + mov w1, 4 + strh w2, [x0, -6] + mov w2, 2 + strh wzr, [x0, -8] + strh w2, [x0, -4] + mov w2, 3 + strh w2, [x0, -2] +.L750: + sub w2, w1, #1 + add w2, w2, w1, lsr 1 + add w1, w1, 1 + strh w2, [x0], 2 + and w1, w1, 65535 + cmp w1, 512 + bne .L750 + b .L723 +.L751: + ldrh w2, [x0, x1, lsl 1] + add x1, x1, 1 + strh w2, [x19, w2, sxtw 1] + b .L718 + .size BuildFlashLsbPageTable, .-BuildFlashLsbPageTable + .align 2 + .global FlashDieInfoInit + .type FlashDieInfoInit, %function +FlashDieInfoInit: + stp x29, x30, [sp, -48]! + add x29, sp, 0 + stp x21, x22, [sp, 32] + adrp x21, .LANCHOR2 + add x0, x21, :lo12:.LANCHOR2 + stp x19, x20, [sp, 16] + adrp x22, .LANCHOR0 + add x19, x22, :lo12:.LANCHOR0 + add x20, x19, 1232 + strb wzr, [x0, 3548] + adrp x0, .LANCHOR1+482 + strb wzr, [x19, 2358] + ldrh w0, [x0, #:lo12:.LANCHOR1+482] + bl FlashBlockAlignInit + mov w2, 8 + mov w1, 0 + add x0, x19, 2360 + bl ftl_memset + mov w2, 32 + mov w1, 0 + mov x0, x20 + bl ftl_memset + mov w2, 192 + mov w1, 0 + add x0, x19, 2164 + bl ftl_memset + ldr x7, [x19, 88] + add x11, x19, 2132 + mov x8, 0 + add x12, x7, 1 +.L775: + ldrb w2, [x7] + add x1, x11, x8, lsl 3 + mov x0, x12 + bl FlashMemCmp8 + cbnz w0, .L774 + ldrb w0, [x19, 2358] + add w1, w0, 1 + strb w1, [x19, 2358] + str wzr, [x20, x0, lsl 2] + add x0, x19, x0 + strb w8, [x0, 2360] +.L774: + add x8, x8, 1 + cmp x8, 4 + bne .L775 + add x8, x22, :lo12:.LANCHOR0 + add x0, x21, :lo12:.LANCHOR2 + ldrb w1, [x8, 2358] + strb w1, [x0, 3548] + ldrb w0, [x7, 8] + cmp w0, 2 + beq .L776 +.L780: + add x9, x22, :lo12:.LANCHOR0 + ldrh w1, [x7, 14] + add x10, x21, :lo12:.LANCHOR2 + ldp x19, x20, [sp, 16] + ldrb w0, [x9, 2358] + ldp x21, x22, [sp, 32] + ldp x29, x30, [sp], 48 + mul w0, w0, w1 + ldrb w1, [x7, 13] + mul w0, w0, w1 + strh w0, [x10, 3550] + ret +.L776: + ldr w14, [x8, 76] + add x15, x8, 2132 + add x13, x8, 1232 + mov x11, 0 +.L779: + ldrb w2, [x7] + add x1, x15, x11, lsl 3 + mov x0, x12 + bl FlashMemCmp8 + cbnz w0, .L777 + ldrb w1, [x7, 13] + ldrh w0, [x7, 14] + ldrb w2, [x8, 2358] + and w0, w0, 65280 + mul w1, w1, w14 + mul w0, w0, w1 + sxtw x1, w2 + str w0, [x13, x1, lsl 2] + ldrb w3, [x7, 23] + cbz w3, .L778 + lsl w0, w0, 1 + str w0, [x13, x1, lsl 2] +.L778: + add x1, x8, x1 + add w2, w2, 1 + strb w2, [x8, 2358] + strb w11, [x1, 2360] +.L777: + add x11, x11, 1 + cmp x11, 4 + bne .L779 + b .L780 + .size FlashDieInfoInit, .-FlashDieInfoInit + .align 2 + .global ftl_read_flash_info + .type ftl_read_flash_info, %function +ftl_read_flash_info: + stp x29, x30, [sp, -32]! + mov w2, 11 + mov w1, 0 + add x29, sp, 0 + str x19, [sp, 16] + mov x19, x0 + bl ftl_memset + adrp x0, .LANCHOR0 + add x0, x0, :lo12:.LANCHOR0 + mov w4, 1 + ldr x1, [x0, 88] + ldrb w2, [x1, 9] + ldr w1, [x0, 76] + mul w1, w1, w2 + mov x2, 0 + strh w1, [x19, 4] + ldrb w1, [x0, 2464] + strb w1, [x19, 7] + ldr w1, [x0, 2584] + str w1, [x19] + ldr x1, [x0, 88] + ldrb w3, [x0, 2358] + ldrb w1, [x1, 9] + strb w1, [x19, 6] + mov w1, 32 + strb w1, [x19, 8] + ldr x1, [x0, 88] + add x0, x0, 2360 + ldrb w1, [x1, 7] + strb w1, [x19, 9] + strb wzr, [x19, 10] +.L789: + cmp w3, w2, uxtb + bhi .L790 + ldr x19, [sp, 16] + ldp x29, x30, [sp], 32 + ret +.L790: + ldrb w1, [x2, x0] + add x2, x2, 1 + ldrb w5, [x19, 10] + lsl w1, w4, w1 + orr w1, w1, w5 + strb w1, [x19, 10] + b .L789 + .size ftl_read_flash_info, .-ftl_read_flash_info + .align 2 + .global FtlMemInit + .type FtlMemInit, %function +FtlMemInit: + stp x29, x30, [sp, -80]! + mov w1, 65535 + mov w2, 1024 + add x29, sp, 0 + stp x21, x22, [sp, 32] + adrp x21, .LANCHOR2 + add x0, x21, :lo12:.LANCHOR2 + stp x19, x20, [sp, 16] + add x3, x0, 512 + stp x23, x24, [sp, 48] + str x25, [sp, 64] + add x4, x0, 512 + strh wzr, [x0, 3552] + add x5, x0, 3328 + str wzr, [x0, 448] + adrp x22, .LANCHOR0 + stp wzr, wzr, [x3, 208] + stp wzr, wzr, [x3, 216] + str wzr, [x0, 736] + str wzr, [x0, 740] + stp wzr, wzr, [x4, 240] + stp wzr, wzr, [x4, 248] + str wzr, [x0, 772] + str wzr, [x0, 776] + str wzr, [x0, 1360] + str wzr, [x0, 1368] + str wzr, [x0, 1376] + stp w1, wzr, [x5, 236] + mov w1, -1 + stp wzr, wzr, [x5, 228] + str wzr, [x0, 3572] + strh w1, [x0, 1448] + strh w1, [x0, 1450] + strh w1, [x0, 1452] + strh w1, [x0, 1454] + mov w1, 32 + strh w1, [x0, 1364] + mov w1, 128 + strh w1, [x0, 1366] + add x1, x22, :lo12:.LANCHOR0 + strh wzr, [x0, 1372] + strh wzr, [x0, 1456] + ldrh w3, [x1, 2550] + ldrh w1, [x1, 2472] + strh wzr, [x0, 3576] + strh wzr, [x0, 1498] + sdiv w2, w2, w3 + lsl w1, w1, 2 + str w2, [x0, 3580] + cmp w2, w1 + bls .L793 + str w1, [x0, 3580] +.L793: + add x20, x22, :lo12:.LANCHOR0 + add x19, x21, :lo12:.LANCHOR2 + mov w24, 56 + ldrh w0, [x20, 2548] + str wzr, [x20, 2600] + lsl w0, w0, 1 + bl ftl_malloc + ldrh w1, [x20, 2548] + str x0, [x19, 1424] + mov w0, 12 + mul w0, w1, w0 + bl ftl_malloc + ldrh w23, [x20, 2472] + str x0, [x19, 1440] + mul w23, w23, w24 + lsl w25, w23, 3 + mov w0, w25 + bl ftl_malloc + str x0, [x19, 3584] + mov w0, w23 + bl ftl_malloc + str x0, [x19, 3592] + mov w0, w25 + bl ftl_malloc + str x0, [x19, 3600] + mov w0, w23 + bl ftl_malloc + str x0, [x19, 432] + mov w0, w23 + bl ftl_malloc + str x0, [x19, 1408] + ldr w0, [x19, 3580] + mul w0, w0, w24 + bl ftl_malloc + str x0, [x20, 2608] + ldrh w0, [x20, 2472] + ldrh w23, [x20, 2554] + lsl w0, w0, 1 + add w0, w0, 1 + str w0, [x19, 1416] + mov w0, w23 + bl ftl_malloc + str x0, [x19, 3608] + mov w0, w23 + bl ftl_malloc + str x0, [x19, 3616] + mov w0, w23 + bl ftl_malloc + str x0, [x19, 3624] + ldr w0, [x19, 1416] + mul w0, w23, w0 + bl ftl_malloc + str x0, [x19, 1392] + ldr w0, [x19, 3580] + mul w0, w23, w0 + bl ftl_malloc + str x0, [x19, 3632] + mov w0, w23 + bl ftl_malloc + str x0, [x19, 3640] + mov w0, w23 + bl ftl_malloc + str x0, [x19, 3648] + ldr w1, [x19, 1416] + mov w0, 24 + mul w0, w1, w0 + bl ftl_malloc + ldrh w23, [x20, 2556] + str x0, [x19, 1384] + ldrh w0, [x20, 2472] + mul w23, w23, w0 + mov w0, w23 + bl ftl_malloc + str x0, [x19, 3656] + lsl w0, w23, 3 + bl ftl_malloc + str x0, [x19, 3664] + ldrh w1, [x20, 2556] + ldr w0, [x19, 1416] + mul w0, w1, w0 + bl ftl_malloc + str x0, [x19, 1400] + ldrh w1, [x20, 2556] + ldr w0, [x19, 3580] + mul w0, w1, w0 + bl ftl_malloc + str x0, [x19, 3672] + ldrh w0, [x20, 2482] + ubfiz w0, w0, 1, 15 + strh w0, [x19, 3680] + and w0, w0, 65534 + bl ftl_malloc + str x0, [x19, 3688] + ldrh w0, [x19, 3680] + add x0, x0, 547 + lsr x0, x0, 9 + strh w0, [x19, 3680] + lsl w0, w0, 9 + bl ftl_malloc + ldrh w23, [x20, 2482] + str x0, [x19, 3696] + add x0, x0, 32 + str x0, [x19, 440] + lsl w23, w23, 1 + mov w0, w23 + bl ftl_malloc + str x0, [x19, 3704] + mov w0, w23 + bl ftl_malloc + ldr w23, [x20, 2572] + str x0, [x19, 520] + lsl w23, w23, 1 + mov w0, w23 + bl ftl_malloc + str x0, [x19, 3712] + mov w0, w23 + bl ftl_malloc + str x0, [x19, 3720] + ldrh w0, [x20, 2482] + lsr w0, w0, 3 + add w0, w0, 4 + bl ftl_malloc + str x0, [x20, 64] + ldrh w0, [x20, 2564] + lsl w0, w0, 1 + bl ftl_malloc + str x0, [x20, 2592] + ldrh w0, [x20, 2564] + lsl w0, w0, 1 + bl ftl_malloc + str x0, [x19, 3728] + ldrh w0, [x20, 2564] + lsl w0, w0, 2 + bl ftl_malloc + str x0, [x19, 3736] + ldrh w0, [x20, 2566] + lsl w0, w0, 2 + bl ftl_malloc + ldrh w2, [x20, 2566] + mov w1, 0 + str x0, [x19, 3744] + lsl w2, w2, 2 + bl ftl_memset + ldrh w23, [x20, 2580] + lsl w23, w23, 2 + mov w0, w23 + bl ftl_malloc + str x0, [x19, 3752] + mov w0, w23 + bl ftl_malloc + str x0, [x19, 3760] + ldr w0, [x20, 2572] + lsl w0, w0, 2 + bl ftl_malloc + str x0, [x19, 3768] + ldrh w0, [x20, 2582] + lsl w0, w0, 4 + bl ftl_malloc + ldrh w1, [x20, 2582] + str x0, [x19, 704] + ldrh w0, [x20, 2554] + mul w0, w1, w0 + bl ftl_malloc + str x0, [x19, 3776] + ldrh w1, [x20, 2482] + mov w0, 6 + mul w0, w1, w0 + bl ftl_malloc + str x0, [x19, 504] + ldrh w0, [x20, 2542] + ldrh w1, [x20, 2494] + add w0, w0, 31 + asr w0, w0, 5 + strh w0, [x19, 3784] + mul w0, w1, w0 + lsl w0, w0, 2 + bl ftl_malloc + ldrh w3, [x19, 3784] + add x4, x20, 2664 + ldrh w5, [x20, 2494] + mov w1, w3 + str x0, [x20, 2656] + mov x0, 1 +.L794: + cmp w0, w5 + bcc .L795 + mov w1, 8 + add x3, x22, :lo12:.LANCHOR0 + sub w1, w1, w0 + add x3, x3, 2624 + add x1, x1, 1 + mov x2, 0 +.L796: + add x2, x2, 1 + cmp x2, x1 + bne .L797 + add x0, x21, :lo12:.LANCHOR2 + ldr x1, [x0, 3712] + cbnz x1, .L798 +.L800: + adrp x1, .LANCHOR3 + adrp x0, .LC80 + add x1, x1, :lo12:.LANCHOR3 + add x0, x0, :lo12:.LC80 + bl printk + mov w0, -1 +.L792: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldr x25, [sp, 64] + ldp x29, x30, [sp], 80 + ret +.L795: + ldr x2, [x20, 2656] + add w0, w0, 1 + add x2, x2, w1, uxtw 2 + add w1, w1, w3 + str x2, [x4], 8 + b .L794 +.L797: + add x4, x0, x2 + add x4, x3, x4, lsl 3 + str xzr, [x4, 24] + b .L796 +.L798: + ldr x1, [x0, 3720] + cbz x1, .L800 + ldr x1, [x0, 3752] + cbz x1, .L800 + ldr x1, [x0, 3768] + cbz x1, .L800 + ldr x1, [x0, 704] + cbz x1, .L800 + ldr x1, [x0, 3776] + cbz x1, .L800 + ldr x1, [x0, 504] + cbz x1, .L800 + add x22, x22, :lo12:.LANCHOR0 + ldr x1, [x22, 2656] + cbz x1, .L800 + ldr x0, [x0, 520] + cbz x0, .L800 + add x0, x21, :lo12:.LANCHOR2 + ldr x1, [x0, 1424] + cbz x1, .L800 + ldr x1, [x0, 1440] + cbz x1, .L800 + ldr x1, [x0, 3584] + cbz x1, .L800 + ldr x1, [x0, 3600] + cbz x1, .L800 + ldr x1, [x0, 432] + cbz x1, .L800 + ldr x1, [x0, 1408] + cbz x1, .L800 + ldr x1, [x0, 3592] + cbz x1, .L800 + ldr x1, [x0, 3608] + cbz x1, .L800 + ldr x1, [x0, 3616] + cbz x1, .L800 + ldr x0, [x0, 3624] + cbz x0, .L800 + add x0, x21, :lo12:.LANCHOR2 + ldr x1, [x0, 1392] + cbz x1, .L800 + ldr x1, [x0, 3640] + cbz x1, .L800 + ldr x1, [x0, 3648] + cbz x1, .L800 + ldr x1, [x0, 1384] + cbz x1, .L800 + ldr x1, [x0, 3656] + cbz x1, .L800 + ldr x1, [x0, 3664] + cbz x1, .L800 + ldr x1, [x0, 1400] + cbz x1, .L800 + ldr x1, [x0, 440] + cbz x1, .L800 + ldr x0, [x0, 3688] + cbz x0, .L800 + adrp x0, .LANCHOR0+2592 + ldr x0, [x0, #:lo12:.LANCHOR0+2592] + cbz x0, .L800 + adrp x0, .LANCHOR2 + add x0, x0, :lo12:.LANCHOR2 + ldr x1, [x0, 3728] + cbz x1, .L800 + ldr x1, [x0, 3736] + cbz x1, .L800 + ldr x0, [x0, 3744] + cbz x0, .L800 + mov w0, 0 + b .L792 + .size FtlMemInit, .-FtlMemInit + .align 2 + .global FtlBbt2Bitmap + .type FtlBbt2Bitmap, %function +FtlBbt2Bitmap: + stp x29, x30, [sp, -32]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + mov x20, x0 + adrp x0, .LANCHOR2+3784 + mov x19, x1 + mov w1, 0 + ldrh w2, [x0, #:lo12:.LANCHOR2+3784] + mov x0, x19 + lsl w2, w2, 2 + bl ftl_memset + adrp x3, .LANCHOR0 + add x3, x3, :lo12:.LANCHOR0 + mov x1, 0 + mov w6, 65535 + mov w5, 1 +.L897: + ldrh w0, [x20, x1] + cmp w0, w6 + beq .L895 + ubfx x2, x0, 5, 11 + lsl w0, w5, w0 + lsl x2, x2, 2 + add x1, x1, 2 + cmp x1, 1024 + ldr w4, [x19, x2] + orr w0, w4, w0 + str w0, [x19, x2] + ldrh w0, [x3, 2630] + add w0, w0, 1 + strh w0, [x3, 2630] + bne .L897 +.L895: + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 32 + ret + .size FtlBbt2Bitmap, .-FtlBbt2Bitmap + .align 2 + .global FtlBbtMemInit + .type FtlBbtMemInit, %function +FtlBbtMemInit: + stp x29, x30, [sp, -16]! + adrp x0, .LANCHOR0 + add x0, x0, :lo12:.LANCHOR0 + mov w1, -1 + add x29, sp, 0 + mov w2, 16 + add x0, x0, 2636 + strh w1, [x0, -12] + mov w1, 255 + strh wzr, [x0, -6] + bl ftl_memset + ldp x29, x30, [sp], 16 + ret + .size FtlBbtMemInit, .-FtlBbtMemInit + .align 2 + .global FtlFreeSysBlkQueueInit + .type FtlFreeSysBlkQueueInit, %function +FtlFreeSysBlkQueueInit: + stp x29, x30, [sp, -16]! + adrp x3, .LANCHOR0 + add x3, x3, :lo12:.LANCHOR0 + mov w2, 2048 + add x29, sp, 0 + mov w1, 0 + strh w0, [x3, 2720] + add x0, x3, 2728 + strh wzr, [x3, 2722] + strh wzr, [x3, 2724] + strh wzr, [x3, 2726] + bl ftl_memset + mov w0, 0 + ldp x29, x30, [sp], 16 + ret + .size FtlFreeSysBlkQueueInit, .-FtlFreeSysBlkQueueInit + .align 2 + .global ftl_free_no_use_map_blk + .type ftl_free_no_use_map_blk, %function +ftl_free_no_use_map_blk: + stp x29, x30, [sp, -80]! + mov w1, 0 + add x29, sp, 0 + stp x19, x20, [sp, 16] + mov x19, x0 + stp x21, x22, [sp, 32] + stp x23, x24, [sp, 48] + str x25, [sp, 64] + ldrh w2, [x0, 10] + ldp x21, x20, [x0, 32] + ldr x22, [x0, 16] + lsl w2, w2, 1 + mov x0, x21 + bl ftl_memset + mov w0, 0 +.L906: + ldrh w1, [x19, 6] + cmp w1, w0 + bhi .L910 + adrp x0, .LANCHOR0+2546 + mov w23, 0 + mov w20, 0 + ldrh w1, [x0, #:lo12:.LANCHOR0+2546] + ldrh w0, [x19] + strh w1, [x21, x0, lsl 1] + ldrh w24, [x21] +.L911: + ldrh w0, [x19, 10] + cmp w0, w20 + bhi .L915 + mov w0, w23 + ldr x25, [sp, 64] + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x29, x30, [sp], 80 + ret +.L910: + ubfiz x1, x0, 2, 16 + ldr w2, [x20, x1] + mov w1, 0 + ubfx x2, x2, 10, 16 +.L907: + ldrh w3, [x19, 10] + cmp w3, w1 + bhi .L909 + add w0, w0, 1 + and w0, w0, 65535 + b .L906 +.L909: + ubfiz x3, x1, 1, 16 + ldrh w4, [x22, x3] + cmp w4, w2 + bne .L908 + cbz w2, .L908 + ldrh w4, [x21, x3] + add w4, w4, 1 + strh w4, [x21, x3] +.L908: + add w1, w1, 1 + and w1, w1, 65535 + b .L907 +.L915: + ubfiz x0, x20, 1, 16 + ldrh w1, [x21, x0] + cmp w24, w1 + bls .L912 + add x25, x22, x0 + ldrh w0, [x22, x0] + cbnz w0, .L913 +.L914: + add w20, w20, 1 + and w20, w20, 65535 + b .L911 +.L912: + cbnz w1, .L914 + add x25, x22, x0 + ldrh w0, [x22, x0] + cbz w0, .L914 +.L916: + mov w1, 1 + bl FtlFreeSysBlkQueueIn + strh wzr, [x25] + ldrh w0, [x19, 8] + sub w0, w0, #1 + strh w0, [x19, 8] + b .L914 +.L917: + mov w24, 0 + b .L916 +.L913: + mov w23, w20 + cbz w1, .L917 + mov w24, w1 + b .L914 + .size ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk + .align 2 + .global FtlL2PDataInit + .type FtlL2PDataInit, %function +FtlL2PDataInit: + stp x29, x30, [sp, -48]! + mov w1, 0 + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x19, .LANCHOR2 + str x21, [sp, 32] + add x21, x19, :lo12:.LANCHOR2 + adrp x20, .LANCHOR0 + add x20, x20, :lo12:.LANCHOR0 + ldr x0, [x21, 3720] + ldr w2, [x20, 2572] + lsl w2, w2, 1 + bl ftl_memset + ldrh w0, [x20, 2582] + mov w1, 255 + ldrh w2, [x20, 2554] + mul w2, w2, w0 + ldr x0, [x21, 3776] + bl ftl_memset + mov x0, x21 + mov w1, 0 + mov w5, -1 +.L927: + ldrh w2, [x20, 2582] + cmp w2, w1 + bhi .L928 + add x0, x19, :lo12:.LANCHOR2 + mov w2, -1 + add x1, x0, 3792 + strh w2, [x0, 3794] + strh w2, [x0, 3792] + ldr w2, [x20, 2572] + strh w2, [x0, 3802] + mov w2, -3902 + strh w2, [x0, 3796] + ldrh w2, [x0, 3856] + strh w2, [x0, 3800] + ldrh w2, [x20, 2580] + strh w2, [x0, 3798] + ldr x2, [x0, 3712] + str x2, [x0, 3808] + ldr x2, [x0, 3768] + str x2, [x0, 3816] + ldr x2, [x0, 3720] + str x2, [x0, 3824] + ldr x0, [x0, 3752] + str x0, [x1, 40] + ldp x19, x20, [sp, 16] + ldr x21, [sp, 32] + ldp x29, x30, [sp], 48 + ret +.L928: + ldr x3, [x0, 704] + ubfiz x2, x1, 4, 16 + add x3, x3, x2 + str wzr, [x3, 4] + ldr x3, [x0, 704] + strh w5, [x3, x2] + ldr x3, [x0, 704] + ldr x4, [x0, 3776] + add x3, x3, x2 + ldrh w2, [x20, 2554] + mul w2, w2, w1 + add w1, w1, 1 + and w1, w1, 65535 + sxtw x2, w2 + and x2, x2, -4 + add x2, x4, x2 + str x2, [x3, 8] + b .L927 + .size FtlL2PDataInit, .-FtlL2PDataInit + .align 2 + .global FtlVariablesInit + .type FtlVariablesInit, %function +FtlVariablesInit: + stp x29, x30, [sp, -32]! + mov w0, -1 + mov w1, 0 + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x19, .LANCHOR2 + add x19, x19, :lo12:.LANCHOR2 + adrp x20, .LANCHOR0 + add x20, x20, :lo12:.LANCHOR0 + strh w0, [x19, 3872] + mov w0, -1 + str w0, [x19, 3884] + ldr x0, [x20, 2592] + ldrh w2, [x20, 2564] + strh wzr, [x20, 2590] + str xzr, [x19, 3864] + lsl w2, w2, 1 + str wzr, [x19, 3876] + str wzr, [x19, 3880] + str wzr, [x20, 2372] + bl ftl_memset + ldr x0, [x19, 440] + mov w1, 0 + ldrh w2, [x20, 2482] + lsl w2, w2, 1 + bl ftl_memset + ldr x0, [x19, 3688] + mov w1, 0 + ldrh w2, [x20, 2482] + lsl w2, w2, 1 + bl ftl_memset + mov w2, 48 + mov w1, 0 + add x0, x19, 456 + bl ftl_memset + mov w2, 512 + mov w1, 0 + add x0, x19, 848 + bl ftl_memset + bl FtlGcBufInit + bl FtlL2PDataInit + mov w0, 0 + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 32 + ret + .size FtlVariablesInit, .-FtlVariablesInit + .align 2 + .global SupperBlkListInit + .type SupperBlkListInit, %function +SupperBlkListInit: + stp x29, x30, [sp, -64]! + mov w0, 6 + mov w1, 0 + add x29, sp, 0 + stp x21, x22, [sp, 32] + adrp x21, .LANCHOR0 + add x21, x21, :lo12:.LANCHOR0 + stp x19, x20, [sp, 16] + adrp x20, .LANCHOR2 + add x19, x20, :lo12:.LANCHOR2 + stp x23, x24, [sp, 48] + add x24, x21, 2504 + ldrh w2, [x21, 2482] + mov w22, 0 + mov w23, 0 + mul w2, w2, w0 + ldr x0, [x19, 504] + bl ftl_memset + strh wzr, [x19, 536] + strh wzr, [x19, 552] + strh wzr, [x19, 3552] + str xzr, [x19, 512] + str xzr, [x19, 528] + str xzr, [x19, 544] + mov w19, 0 +.L933: + ldrh w0, [x21, 2480] + cmp w19, w0 + bge .L940 + ldrh w8, [x21, 2472] + mov w5, 0 + ldrh w7, [x21, 2544] + mov w6, 0 + b .L941 +.L935: + ldrb w0, [x24, w6, sxtw] + mov w1, w19 + bl V2P_block + bl FtlBbmIsBadBlock + cbnz w0, .L934 + add w5, w7, w5 + sxth w5, w5 +.L934: + add w6, w6, 1 + sxth w6, w6 +.L941: + cmp w6, w8 + blt .L935 + cbz w5, .L936 + mov w0, 32768 + sdiv w5, w0, w5 + sxth w5, w5 +.L937: + add x0, x20, :lo12:.LANCHOR2 + mov w1, 6 + ldr x2, [x0, 504] + smaddl x1, w19, w1, x2 + strh w5, [x1, 4] + ldrh w1, [x0, 560] + cmp w19, w1 + beq .L938 + ldrh w1, [x0, 608] + cmp w19, w1 + beq .L938 + ldrh w1, [x0, 656] + cmp w19, w1 + beq .L938 + ldr x0, [x0, 520] + ldrh w0, [x0, w19, sxtw 1] + cbnz w0, .L939 + add w22, w22, 1 + mov w0, w19 + and w22, w22, 65535 + bl INSERT_FREE_LIST +.L938: + add w19, w19, 1 + sxth w19, w19 + b .L933 +.L936: + add x0, x20, :lo12:.LANCHOR2 + mov w1, -1 + ldr x0, [x0, 520] + strh w1, [x0, w19, sxtw 1] + b .L937 +.L939: + add w23, w23, 1 + mov w0, w19 + and w23, w23, 65535 + bl INSERT_DATA_LIST + b .L938 +.L940: + add x20, x20, :lo12:.LANCHOR2 + mov w0, 0 + strh w23, [x20, 536] + strh w22, [x20, 552] + ldp x23, x24, [sp, 48] + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x29, x30, [sp], 64 + ret + .size SupperBlkListInit, .-SupperBlkListInit + .align 2 + .global FtlGcPageVarInit + .type FtlGcPageVarInit, %function +FtlGcPageVarInit: + stp x29, x30, [sp, -32]! + mov w1, 255 + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x19, .LANCHOR2 + add x19, x19, :lo12:.LANCHOR2 + adrp x20, .LANCHOR0 + add x20, x20, :lo12:.LANCHOR0 + ldr x0, [x19, 1424] + ldrh w2, [x20, 2548] + strh wzr, [x19, 1420] + strh wzr, [x19, 1432] + lsl w2, w2, 1 + bl ftl_memset + ldrh w2, [x20, 2548] + mov w0, 12 + mov w1, 255 + mul w2, w2, w0 + ldr x0, [x19, 1440] + bl ftl_memset + bl FtlGcBufInit + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 32 + ret + .size FtlGcPageVarInit, .-FtlGcPageVarInit + .align 2 + .global ftl_memcpy + .type ftl_memcpy, %function +ftl_memcpy: + stp x29, x30, [sp, -16]! + uxtw x2, w2 + add x29, sp, 0 + bl memcpy + ldp x29, x30, [sp], 16 + ret + .size ftl_memcpy, .-ftl_memcpy + .align 2 + .global FlashReadIdbData + .type FlashReadIdbData, %function +FlashReadIdbData: + stp x29, x30, [sp, -16]! + adrp x1, .LANCHOR2 + add x1, x1, :lo12:.LANCHOR2 + mov w2, 2048 + add x29, sp, 0 + add x1, x1, 3888 + bl ftl_memcpy + mov w0, 0 + ldp x29, x30, [sp], 16 + ret + .size FlashReadIdbData, .-FlashReadIdbData + .align 2 + .global FlashLoadPhyInfoInRam + .type FlashLoadPhyInfoInRam, %function +FlashLoadPhyInfoInRam: + stp x29, x30, [sp, -48]! + adrp x0, .LANCHOR0 + add x10, x0, :lo12:.LANCHOR0 + mov x7, x0 + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x19, .LANCHOR1 + add x8, x19, :lo12:.LANCHOR1 + add x10, x10, 2132 + add x8, x8, 513 + mov x9, 0 + str x21, [sp, 32] +.L952: + ldrb w2, [x8, -1] + mov w11, w9 + lsl x21, x9, 5 + mov x1, x10 + mov x0, x8 + bl FlashMemCmp8 + mov w20, w0 + cbnz w0, .L950 + add x2, x19, :lo12:.LANCHOR1 + ubfiz x11, x11, 5, 32 + add x0, x2, 512 + add x1, x2, 3264 + add x21, x0, x21 + add x0, x0, x11 + ldrb w3, [x0, 22] + mov x0, 0 +.L951: + lsl x4, x0, 5 + mov w2, w0 + ldrb w4, [x4, x1] + cmp w4, w3 + beq .L954 + add x0, x0, 1 + cmp x0, 4 + bne .L951 + mov w2, w0 +.L954: + add x19, x19, :lo12:.LANCHOR1 + add x0, x7, :lo12:.LANCHOR0 + add x3, x19, 3264 + ubfiz x1, x2, 5, 32 + add x19, x19, 472 + add x1, x3, x1 + mov w2, 32 + add x0, x0, 96 + bl ftl_memcpy + mov w2, 32 + mov x1, x21 + mov x0, x19 + bl ftl_memcpy + ldrh w0, [x19, 10] + bl FlashBlockAlignInit + b .L949 +.L950: + add x9, x9, 1 + add x8, x8, 32 + cmp x9, 86 + bne .L952 + mov w20, -1 +.L949: + mov w0, w20 + ldr x21, [sp, 32] + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 48 + ret + .size FlashLoadPhyInfoInRam, .-FlashLoadPhyInfoInRam + .align 2 + .global NandcCopy1KB + .type NandcCopy1KB, %function +NandcCopy1KB: + stp x29, x30, [sp, -48]! + and w1, w1, 255 + cmp w1, 1 + add x29, sp, 0 + stp x19, x20, [sp, 16] + and w19, w2, 255 + str x21, [sp, 32] + add x2, x0, 4096 + add x21, x0, 512 + ubfiz x0, x19, 9, 8 + mov x20, x4 + add x0, x2, x0 + bne .L959 + cbz x3, .L960 + mov w2, 1024 + mov x1, x3 + bl ftl_memcpy +.L960: + cbz x20, .L958 + lsr w19, w19, 1 + mov w1, 48 + ldr w0, [x20] + mul w19, w19, w1 + and x19, x19, 8176 + str w0, [x21, x19] +.L958: + ldp x19, x20, [sp, 16] + ldr x21, [sp, 32] + ldp x29, x30, [sp], 48 + ret +.L959: + cbz x3, .L963 + mov x1, x0 + mov w2, 1024 + mov x0, x3 + bl ftl_memcpy +.L963: + cbz x20, .L958 + lsr w19, w19, 1 + mov w0, 48 + mul w19, w19, w0 + and x19, x19, 8176 + ldr w0, [x21, x19] + strb w0, [x20] + lsr w1, w0, 8 + strb w1, [x20, 1] + lsr w1, w0, 16 + lsr w0, w0, 24 + strb w1, [x20, 2] + strb w0, [x20, 3] + b .L958 + .size NandcCopy1KB, .-NandcCopy1KB + .align 2 + .global ftl_memcpy32 + .type ftl_memcpy32, %function +ftl_memcpy32: + mov x3, 0 +.L976: + cmp w2, w3 + bhi .L977 + ret +.L977: + ldr w4, [x1, x3, lsl 2] + str w4, [x0, x3, lsl 2] + add x3, x3, 1 + b .L976 + .size ftl_memcpy32, .-ftl_memcpy32 + .align 2 + .global ftl_memcmp + .type ftl_memcmp, %function +ftl_memcmp: + stp x29, x30, [sp, -16]! + uxtw x2, w2 + add x29, sp, 0 + bl memcmp + ldp x29, x30, [sp], 16 + ret + .size ftl_memcmp, .-ftl_memcmp + .align 2 + .global timer_get_time + .type timer_get_time, %function +timer_get_time: + stp x29, x30, [sp, -16]! + adrp x0, jiffies + add x29, sp, 0 + ldr x0, [x0, #:lo12:jiffies] + bl jiffies_to_msecs + ldp x29, x30, [sp], 16 + ret + .size timer_get_time, .-timer_get_time + .align 2 + .global FlashSramLoadStore + .type FlashSramLoadStore, %function +FlashSramLoadStore: + stp x29, x30, [sp, -16]! + adrp x4, .LANCHOR4+1584 + uxtw x5, w1 + add x29, sp, 0 + ldr x4, [x4, #:lo12:.LANCHOR4+1584] + add x4, x4, 4096 + cbnz w2, .L983 + mov w2, w3 + add x1, x4, x5 +.L986: + bl ftl_memcpy + ldp x29, x30, [sp], 16 + ret +.L983: + mov x1, x0 + mov w2, w3 + add x0, x4, x5 + b .L986 + .size FlashSramLoadStore, .-FlashSramLoadStore + .align 2 + .global FlashCs123Init + .type FlashCs123Init, %function +FlashCs123Init: + ret + .size FlashCs123Init, .-FlashCs123Init + .align 2 + .global ftl_dma32_malloc + .type ftl_dma32_malloc, %function +ftl_dma32_malloc: + stp x29, x30, [sp, -48]! + cmp w0, 8192 + add x29, sp, 0 + stp x19, x20, [sp, 16] + str x21, [sp, 32] + ble .L989 + bl ftl_malloc +.L988: + ldp x19, x20, [sp, 16] + ldr x21, [sp, 32] + ldp x29, x30, [sp], 48 + ret +.L989: + adrp x1, .LANCHOR4 + add x21, x1, :lo12:.LANCHOR4 + add w19, w0, 63 + mov x20, x1 + and w19, w19, -64 + ldr w0, [x21, 1592] + cmp w19, w0 + ble .L991 + mov w0, 16384 + bl ftl_malloc + str x0, [x21, 1600] + mov w0, 16384 + str w0, [x21, 1592] +.L991: + add x1, x20, :lo12:.LANCHOR4 + ldr w0, [x1, 1592] + sub w0, w0, w19 + str w0, [x1, 1592] + ldr x0, [x1, 1600] + add x19, x0, w19, sxtw + str x19, [x1, 1600] + b .L988 + .size ftl_dma32_malloc, .-ftl_dma32_malloc + .align 2 + .global rk_nand_suspend + .type rk_nand_suspend, %function +rk_nand_suspend: + stp x29, x30, [sp, -16]! + add x29, sp, 0 + bl ftl_flash_suspend + ldp x29, x30, [sp], 16 + ret + .size rk_nand_suspend, .-rk_nand_suspend + .align 2 + .global rk_nand_resume + .type rk_nand_resume, %function +rk_nand_resume: + stp x29, x30, [sp, -16]! + add x29, sp, 0 + bl ftl_flash_resume + ldp x29, x30, [sp], 16 + ret + .size rk_nand_resume, .-rk_nand_resume + .align 2 + .global rk_ftl_get_capacity + .type rk_ftl_get_capacity, %function +rk_ftl_get_capacity: + adrp x0, .LANCHOR0+2584 + ldr w0, [x0, #:lo12:.LANCHOR0+2584] + ret + .size rk_ftl_get_capacity, .-rk_ftl_get_capacity + .align 2 + .global rk_nandc_get_irq_status + .type rk_nandc_get_irq_status, %function +rk_nandc_get_irq_status: + ldr w0, [x0, 372] + ret + .size rk_nandc_get_irq_status, .-rk_nandc_get_irq_status + .align 2 + .global rknand_proc_ftlread + .type rknand_proc_ftlread, %function +rknand_proc_ftlread: + stp x29, x30, [sp, -16]! + add x29, sp, 0 + bl ftl_proc_ftl_read + ldp x29, x30, [sp], 16 + ret + .size rknand_proc_ftlread, .-rknand_proc_ftlread + .align 2 + .global ReadFlashInfo + .type ReadFlashInfo, %function +ReadFlashInfo: + stp x29, x30, [sp, -16]! + add x29, sp, 0 + bl ftl_read_flash_info + ldp x29, x30, [sp], 16 + ret + .size ReadFlashInfo, .-ReadFlashInfo + .align 2 + .global rknand_print_hex + .type rknand_print_hex, %function +rknand_print_hex: + stp x29, x30, [sp, -96]! + add x29, sp, 0 + stp x21, x22, [sp, 32] + adrp x21, .LC82 + stp x23, x24, [sp, 48] + mov x22, x1 + stp x25, x26, [sp, 64] + adrp x23, .LC81 + mov x26, x0 + mov w24, w2 + uxtw x25, w3 + add x23, x23, :lo12:.LC81 + add x21, x21, :lo12:.LC82 + stp x19, x20, [sp, 16] + str x27, [sp, 80] + mov x19, 0 + mov w20, 0 + adrp x27, .LC83 +.L1004: + cmp x25, x19 + bne .L1010 + adrp x1, .LC83 + adrp x0, .LC76 + add x1, x1, :lo12:.LC83 + add x0, x0, :lo12:.LC76 + bl printk + ldr x27, [sp, 80] + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x29, x30, [sp], 96 + ret +.L1010: + cbnz w20, .L1005 + mov w3, w19 + mov x2, x22 + mov x1, x26 + mov x0, x23 + bl printk +.L1005: + cmp w24, 4 + bne .L1006 + ldr w1, [x22, x19, lsl 2] +.L1012: + mov x0, x21 + add w20, w20, 1 + bl printk + cmp w20, 15 + bls .L1009 + mov w20, 0 + add x1, x27, :lo12:.LC83 + adrp x0, .LC76 + add x0, x0, :lo12:.LC76 + bl printk +.L1009: + add x19, x19, 1 + b .L1004 +.L1006: + cmp w24, 2 + bne .L1008 + ldrsh w1, [x22, x19, lsl 1] + b .L1012 +.L1008: + ldrb w1, [x22, x19] + b .L1012 + .size rknand_print_hex, .-rknand_print_hex + .align 2 + .global HynixGetReadRetryDefault + .type HynixGetReadRetryDefault, %function +HynixGetReadRetryDefault: + stp x29, x30, [sp, -128]! + mov w3, -83 + mov w2, -82 + add x29, sp, 0 + stp x21, x22, [sp, 32] + adrp x21, .LANCHOR0 + add x1, x21, :lo12:.LANCHOR0 + stp x19, x20, [sp, 16] + mov w20, w0 + add x0, x1, 1272 + stp x23, x24, [sp, 48] + cmp w20, 2 + stp x25, x26, [sp, 64] + stp x27, x28, [sp, 80] + strb w20, [x1, 1272] + mov w1, -84 + strb w3, [x0, 5] + strb w1, [x0, 4] + mov w1, -81 + strb w2, [x0, 6] + strb w1, [x0, 7] + bne .L1014 + mov w1, -89 + strb w1, [x0, 4] + adrp x0, .LANCHOR1+3409 + mov w1, -9 + strb w1, [x0, #:lo12:.LANCHOR1+3409] +.L1079: + mov w27, 7 + b .L1123 +.L1014: + cmp w20, 3 + bne .L1016 + mov w1, -80 + strb w1, [x0, 4] + mov w1, -79 + strb w1, [x0, 5] + mov w1, -78 + strb w1, [x0, 6] + mov w1, -77 + strb w1, [x0, 7] + mov w1, -76 + strb w1, [x0, 8] + mov w1, -75 + strb w1, [x0, 9] + mov w1, -74 + strb w1, [x0, 10] + mov w1, -73 +.L1122: + mov w27, 8 + mov w28, w27 + strb w1, [x0, 11] +.L1015: + sub w0, w20, #1 + cmp w0, 1 + bhi .L1021 + add x25, x21, :lo12:.LANCHOR0 + adrp x24, .LANCHOR1 + add x24, x24, :lo12:.LANCHOR1 + add x26, x25, 1272 + add x24, x24, 3392 + mov w23, 0 +.L1022: + ldrb w0, [x25, 2358] + cmp w0, w23 + bhi .L1028 +.L1029: + add x21, x21, :lo12:.LANCHOR0 + ldp x19, x20, [sp, 16] + strb w28, [x21, 1273] + strb w27, [x21, 1274] + ldp x23, x24, [sp, 48] + ldp x21, x22, [sp, 32] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 128 + ret +.L1016: + cmp w20, 4 + bne .L1017 + mov w4, -52 + strb w4, [x0, 4] + mov w4, -65 + strb w4, [x0, 5] + mov w4, -86 + strb w4, [x0, 6] + mov w4, -85 + strb w3, [x0, 9] + strb w4, [x0, 7] + mov w4, -51 + strb w2, [x0, 10] + strb w4, [x0, 8] + b .L1122 +.L1017: + cmp w20, 5 + bne .L1018 + mov w1, 56 + strb w1, [x0, 4] + mov w1, 57 + strb w1, [x0, 5] + mov w1, 58 + mov w27, 8 + strb w1, [x0, 6] + mov w1, 59 + strb w1, [x0, 7] +.L1123: + mov w28, 4 + b .L1015 +.L1018: + cmp w20, 6 + bne .L1019 + mov w1, 14 + strb w1, [x0, 4] + mov w1, 15 + strb w1, [x0, 5] + mov w1, 16 + mov w27, 12 + strb w1, [x0, 6] + mov w1, 17 + strb w1, [x0, 7] + b .L1123 +.L1019: + cmp w20, 7 + bne .L1020 + mov w1, -80 + strb w1, [x0, 4] + mov w1, -79 + strb w1, [x0, 5] + mov w1, -78 + strb w1, [x0, 6] + mov w1, -77 + strb w1, [x0, 7] + mov w1, -76 + strb w1, [x0, 8] + mov w1, -75 + strb w1, [x0, 9] + mov w1, -74 + strb w1, [x0, 10] + mov w1, -73 + strb w1, [x0, 11] + mov w1, -44 + mov w27, 12 + strb w1, [x0, 12] + mov w28, 10 + mov w1, -43 + strb w1, [x0, 13] + b .L1015 +.L1020: + cmp w20, 8 + bne .L1079 + mov w1, 6 + strb w1, [x0, 4] + mov w1, 7 + strb w1, [x0, 5] + mov w1, 9 + strb w20, [x0, 6] + strb w1, [x0, 7] + mov w27, 50 + mov w1, 10 + mov w28, 5 + strb w1, [x0, 8] + b .L1015 +.L1028: + add x0, x25, w23, sxtw + mov x20, 0 + ldrb w0, [x0, 2360] + ubfiz x19, x0, 6, 8 + sbfiz x0, x0, 4, 32 + add x1, x25, x0 + add x19, x19, 20 + add x19, x26, x19 + ldr x0, [x25, x0] + ldrb w22, [x1, 8] + mov w1, 55 + add x22, x0, x22, lsl 8 +.L1023: + add x0, x26, x20 + str w1, [x22, 2056] + str w1, [x29, 124] + ldrb w0, [x0, 4] + str w0, [x22, 2052] + mov x0, 400 + bl __const_udelay + ldr w0, [x22, 2048] + strb w0, [x19, x20] + add x20, x20, 1 + cmp w28, w20, uxtb + ldr w1, [x29, 124] + bhi .L1023 + mov x0, 0 +.L1026: + add x1, x0, 4 + add x4, x0, 28 + add w5, w0, 8 + add x1, x24, x1 + add x4, x24, x4 +.L1025: + ldrb w6, [x19, x0] + ldrb w7, [x1], 4 + add w6, w6, w7 + strb w6, [x19, w5, sxtw] + cmp x4, x1 + add w5, w5, 8 + bne .L1025 + add x0, x0, 1 + cmp x0, 4 + bne .L1026 + add w23, w23, 1 + strb wzr, [x19, 16] + strb wzr, [x19, 24] + and w23, w23, 255 + strb wzr, [x19, 32] + strb wzr, [x19, 40] + strb wzr, [x19, 48] + strb wzr, [x19, 41] + strb wzr, [x19, 49] + b .L1022 +.L1021: + sub w0, w20, #3 + cmp w0, 5 + bhi .L1029 + mul w26, w28, w27 + sub w25, w28, #1 + and x25, x25, 255 + add x22, x21, :lo12:.LANCHOR0 + mov w23, 0 + lsl w0, w26, 4 + asr w24, w26, 1 + str w0, [x29, 120] + sub w26, w20, #5 + lsl w0, w24, 1 + str w0, [x29, 124] + add x0, x25, 1 + str x0, [x29, 112] +.L1030: + ldrb w0, [x22, 2358] + cmp w0, w23 + bls .L1029 + add x0, x22, w23, sxtw + ldrb w25, [x0, 2360] + sbfiz x0, x25, 4, 32 + add x1, x22, x0 + ldr x0, [x22, x0] + ldrb w19, [x1, 8] + add x19, x0, x19, lsl 8 + mov w0, 255 + str w0, [x19, 2056] + mov w0, w25 + bl NandcWaitFlashReady + cmp w20, 7 + bne .L1031 + mov x1, 28 + mov w0, 160 + add x4, x22, 1272 + umaddl x0, w0, w25, x1 + add x4, x4, x0 +.L1032: + mov w0, 54 + str w0, [x19, 2056] + cmp w20, 4 + bne .L1034 + mov w0, 255 + str w0, [x19, 2052] + mov w0, 64 + str w0, [x19, 2048] + mov w0, 204 +.L1124: + str w0, [x19, 2052] + mov w0, 77 + b .L1125 +.L1031: + cmp w20, 8 + beq .L1033 + ubfiz x4, x25, 6, 8 + add x4, x22, x4 + add x4, x4, 1292 + b .L1032 +.L1034: + cmp w26, 1 + bhi .L1036 + ldrb w0, [x22, 1276] + str w0, [x19, 2052] + mov w0, 82 +.L1125: + str w0, [x19, 2048] +.L1035: + mov w0, 22 + str w0, [x19, 2056] + mov w0, 23 + str w0, [x19, 2056] + mov w0, 4 + str w0, [x19, 2056] + mov w0, 25 + str w0, [x19, 2056] + str wzr, [x19, 2056] + cmp w20, 6 + str wzr, [x19, 2052] + str wzr, [x19, 2052] + bne .L1037 + mov w0, 31 + str w0, [x19, 2052] +.L1038: + mov w0, 2 + str w0, [x19, 2052] + str wzr, [x19, 2052] +.L1078: + mov w0, 48 + str w0, [x19, 2056] + str x4, [x29, 104] + mov w0, w25 + bl NandcWaitFlashReady + cmp w26, 1 + ldr x4, [x29, 104] + ccmp w20, 8, 4, hi + beq .L1080 + cmp w20, 7 + mov w0, 2 + mov w6, 32 + csel w6, w6, w0, eq +.L1039: + adrp x1, .LANCHOR4 + add x0, x1, :lo12:.LANCHOR4 + mov x7, 0 + ldr x0, [x0, 1608] +.L1040: + ldr w8, [x19, 2048] + strb w8, [x0, x7] + add x7, x7, 1 + cmp w6, w7, uxtb + bhi .L1040 + cmp w20, 8 + bne .L1041 + mov w6, 0 +.L1043: + ldrb w7, [x0] + cmp w7, 50 + beq .L1042 + ldrb w7, [x0, 1] + cmp w7, 5 + beq .L1042 + add w6, w6, 1 + add x0, x0, 4 + and w6, w6, 255 + cmp w6, 8 + bne .L1043 +.L1044: + adrp x0, .LC84 + mov w1, 0 + add x0, x0, :lo12:.LC84 + bl printk +.L1046: + b .L1046 +.L1036: + cmp w20, 7 + bne .L1035 + mov w0, 174 + str w0, [x19, 2052] + str wzr, [x19, 2048] + mov w0, 176 + b .L1124 +.L1037: + str wzr, [x19, 2052] + b .L1038 +.L1080: + mov w6, 16 + b .L1039 +.L1042: + cmp w6, 6 + bhi .L1044 +.L1045: + add x0, x1, :lo12:.LANCHOR4 + ldr x8, [x0, 1608] + mov x0, 0 +.L1055: + ldr w2, [x29, 120] + cmp w2, w0 + bgt .L1056 + add x0, x1, :lo12:.LANCHOR4 + mov w9, w24 + mov w7, 8 + ldr x10, [x0, 1608] +.L1058: + mov w0, 0 +.L1057: + add w6, w0, w9 + add w0, w0, 1 + sbfiz x6, x6, 1, 32 + cmp w24, w0 + ldrh w11, [x10, x6] + mvn w11, w11 + strh w11, [x10, x6] + bgt .L1057 + ldr w0, [x29, 124] + subs w7, w7, #1 + add w9, w9, w0 + bne .L1058 + mov x7, 0 + mov w14, 1 +.L1064: + mov w6, 0 + mov w9, 0 +.L1063: + mov w12, w7 + lsl w13, w14, w9 + mov w0, 16 + mov w11, 0 +.L1061: + ldrh w15, [x10, w12, sxtw 1] + add w12, w12, w24 + bics wzr, w13, w15 + cinc w11, w11, eq + subs w0, w0, #1 + bne .L1061 + cmp w11, 8 + bls .L1062 + orr w6, w6, w13 + and w6, w6, 65535 +.L1062: + add w9, w9, 1 + cmp w9, 16 + bne .L1063 + strh w6, [x10, x7, lsl 1] + add x7, x7, 1 + cmp w24, w7 + bgt .L1064 + add x1, x1, :lo12:.LANCHOR4 + mov x6, 0 + mov w7, 0 + ldr x1, [x1, 1608] +.L1067: + ldr w9, [x1, x6] + add x6, x6, 4 + cmp w9, 0 + cinc w7, w7, eq + cmp x6, 32 + bne .L1067 + cmp w7, 7 + ble .L1068 + mov w3, 1024 + mov w2, 1 + adrp x0, .LC85 + add x0, x0, :lo12:.LC85 + bl rknand_print_hex + adrp x0, .LC84 + mov w1, 0 + add x0, x0, :lo12:.LC84 + bl printk +.L1069: + b .L1069 +.L1041: + cmp w20, 7 + bne .L1047 + mov w6, 0 +.L1049: + ldrb w7, [x0] + cmp w7, 12 + beq .L1048 + ldrb w7, [x0, 1] + cmp w7, 10 + beq .L1048 + add w6, w6, 1 + add x0, x0, 4 + and w6, w6, 255 + cmp w6, 8 + bne .L1049 +.L1050: + adrp x0, .LC84 + mov w1, 0 + add x0, x0, :lo12:.LC84 + bl printk +.L1051: + b .L1051 +.L1048: + cmp w6, 6 + bls .L1045 + b .L1050 +.L1047: + cmp w20, 6 + bne .L1045 + mov x6, 0 +.L1052: + ldrb w7, [x0, x6] + cmp w7, 12 + beq .L1045 + add x7, x0, x6 + ldrb w7, [x7, 8] + cmp w7, 4 + beq .L1045 + add x6, x6, 1 + cmp x6, 8 + bne .L1052 + adrp x0, .LC84 + mov w1, 0 + add x0, x0, :lo12:.LC84 + bl printk +.L1054: + b .L1054 +.L1056: + ldr w6, [x19, 2048] + strb w6, [x8, x0] + add x0, x0, 1 + b .L1055 +.L1068: + cmp w20, 6 + beq .L1082 + cmp w20, 7 + beq .L1083 + cmp w20, 8 + mov w1, 8 + mov w6, 5 + csel w6, w6, w1, eq +.L1070: + mov w7, 0 +.L1071: + mov x1, 0 +.L1072: + add w9, w0, w1 + ldrb w10, [x8, x1] + add x1, x1, 1 + cmp w28, w1, uxtb + strb w10, [x4, w9, sxtw] + bhi .L1072 + ldr x1, [x29, 112] + add w7, w7, 1 + add w0, w0, w6 + cmp w27, w7 + add x8, x8, x1 + bgt .L1071 + mov w0, 255 + str w0, [x19, 2056] + mov w0, w25 + bl NandcWaitFlashReady + cmp w26, 1 + bhi .L1074 + mov w0, 54 + str w0, [x19, 2056] + adrp x0, .LANCHOR0+1276 + mov w1, -1 + ldrb w0, [x0, #:lo12:.LANCHOR0+1276] + str w0, [x19, 2052] + str wzr, [x19, 2048] + mov w0, 22 + str w0, [x19, 2056] + mov w0, w23 + bl FlashReadCmd +.L1075: + add w23, w23, 1 + mov w0, w25 + and w23, w23, 255 + bl NandcWaitFlashReady + b .L1030 +.L1082: + mov w6, 4 + b .L1070 +.L1083: + mov w6, 10 + b .L1070 +.L1074: + cmp w20, 8 + bne .L1076 + mov w0, 190 +.L1126: + str w0, [x19, 2056] + b .L1075 +.L1076: + mov w0, 56 + b .L1126 +.L1033: + mov w0, 120 + str w0, [x19, 2056] + str wzr, [x19, 2052] + mov w0, 23 + str wzr, [x19, 2052] + mov w1, 25 + str wzr, [x19, 2052] + add x4, x22, 1300 + str w0, [x19, 2056] + mov w0, 4 + str w0, [x19, 2056] + str w1, [x19, 2056] + mov w1, 218 + str w1, [x19, 2056] + mov w1, 21 + str wzr, [x19, 2056] + str wzr, [x19, 2052] + str wzr, [x19, 2052] + str w1, [x19, 2052] + str w0, [x19, 2052] + str wzr, [x19, 2052] + b .L1078 + .size HynixGetReadRetryDefault, .-HynixGetReadRetryDefault + .align 2 + .global FlashGetReadRetryDefault + .type FlashGetReadRetryDefault, %function +FlashGetReadRetryDefault: + cbz w0, .L1140 + stp x29, x30, [sp, -16]! + sub w2, w0, #1 + mov w1, w0 + cmp w2, 7 + add x29, sp, 0 + bhi .L1129 + bl HynixGetReadRetryDefault +.L1127: + ldp x29, x30, [sp], 16 + ret +.L1129: + cmp w0, 49 + bne .L1130 + adrp x0, .LANCHOR0 + add x0, x0, :lo12:.LANCHOR0 + mov w2, 64 + strb w1, [x0, 1272] + mov w1, 4 + strb w1, [x0, 1273] + mov w1, 15 + strb w1, [x0, 1274] + adrp x1, .LANCHOR1 + add x1, x1, :lo12:.LANCHOR1 + add x1, x1, 408 +.L1143: + add x0, x0, 1276 + bl ftl_memcpy + b .L1127 +.L1130: + sub w0, w0, #65 + cmp w1, 33 + ccmp w0, 1, 0, ne + bhi .L1131 + adrp x0, .LANCHOR0 + add x0, x0, :lo12:.LANCHOR0 + strb w1, [x0, 1272] + mov w1, 4 +.L1144: + strb w1, [x0, 1273] + mov w1, 7 + strb w1, [x0, 1274] + adrp x1, .LANCHOR1 + add x1, x1, :lo12:.LANCHOR1 + mov w2, 45 + add x1, x1, 352 + b .L1143 +.L1131: + cmp w1, 34 + mov w0, 67 + ccmp w1, w0, 4, ne + bne .L1132 + adrp x0, .LANCHOR0 + add x0, x0, :lo12:.LANCHOR0 + strb w1, [x0, 1272] + mov w1, 5 + b .L1144 +.L1132: + cmp w1, 35 + mov w0, 68 + ccmp w1, w0, 4, ne + bne .L1127 + adrp x0, .LANCHOR0 + add x0, x0, :lo12:.LANCHOR0 + mov w2, 95 + strb w1, [x0, 1272] + mov w1, 5 + strb w1, [x0, 1273] + mov w1, 17 + strb w1, [x0, 1274] + adrp x1, .LANCHOR1 + add x1, x1, :lo12:.LANCHOR1 + add x1, x1, 256 + b .L1143 +.L1140: + ret + .size FlashGetReadRetryDefault, .-FlashGetReadRetryDefault + .align 2 + .global NandcXferComp + .type NandcXferComp, %function +NandcXferComp: + stp x29, x30, [sp, -80]! + ubfiz x0, x0, 4, 8 + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x20, .LANCHOR0 + add x1, x20, :lo12:.LANCHOR0 + stp x21, x22, [sp, 32] + stp x23, x24, [sp, 48] + ldr x19, [x1, x0] + ldr w0, [x1, 2388] + cmp w0, 3 + bls .L1176 + ldr w0, [x19, 16] + tbz x0, 2, .L1176 + ldr w0, [x19, 16] + tbz x0, 1, .L1147 + adrp x22, .LC86 + adrp x23, .LC87 + ldr w0, [x19, 8] + mov x24, x1 + add x22, x22, :lo12:.LC86 + add x23, x23, :lo12:.LC87 + mov w21, 0 + str w0, [x29, 64] +.L1148: + ldr w1, [x19, 28] + ldr w0, [x29, 64] + ubfx x1, x1, 16, 5 + ubfx x0, x0, 22, 6 + cmp w1, w0 + bge .L1156 + ldr w0, [x24, 2388] + cmp w0, 5 + bhi .L1149 +.L1152: + add w21, w21, 1 + tst x21, 16777215 + bne .L1151 + ldr w2, [x19, 28] + mov w1, w21 + ldr w3, [x29, 64] + mov x0, x22 + ubfx x2, x2, 16, 5 + ubfx x3, x3, 22, 6 + bl printk + mov w3, 512 + mov w2, 4 + mov x1, x19 + mov x0, x23 + bl rknand_print_hex +.L1151: + mov x1, 5 + mov x0, 1 + bl usleep_range + b .L1148 +.L1149: + ldr w0, [x19] + str w0, [x29, 72] + ldr w0, [x29, 72] + tbz x0, 13, .L1152 + ldr w0, [x29, 72] + tbz x0, 17, .L1152 +.L1156: + add x19, x20, :lo12:.LANCHOR0 + add x19, x19, 2408 + ldr w0, [x19, 40] + cbz w0, .L1157 + ldr w0, [x19, 32] + mov w2, 0 + ldr w1, [x29, 64] + ubfx x1, x1, 22, 5 + lsl w1, w1, 10 + bl rknand_dma_unmap_single + ldr w1, [x29, 64] + mov w2, 0 + ldr w0, [x19, 36] + ubfx x1, x1, 22, 5 + lsl w1, w1, 7 + bl rknand_dma_unmap_single +.L1157: + add x20, x20, :lo12:.LANCHOR0 + str wzr, [x20, 2448] +.L1145: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x29, x30, [sp], 80 + ret +.L1147: + adrp x22, .LC88 + adrp x23, .LC87 + ldr w0, [x19, 8] + add x22, x22, :lo12:.LC88 + add x23, x23, :lo12:.LC87 + mov w21, 0 + str w0, [x29, 64] +.L1158: + ldr w0, [x29, 64] + tbz x0, 20, .L1160 + add x0, x20, :lo12:.LANCHOR0 + ldr w0, [x0, 2456] + cbz w0, .L1161 + mov x0, x19 + bl NandcSendDumpDataStart +.L1161: + add x21, x20, :lo12:.LANCHOR0 + add x21, x21, 2408 + ldr w0, [x21, 40] + cbz w0, .L1162 + ldr w0, [x21, 32] + mov w2, 1 + ldr w1, [x29, 64] + ubfx x1, x1, 22, 5 + lsl w1, w1, 10 + bl rknand_dma_unmap_single + ldr w1, [x29, 64] + mov w2, 1 + ldr w0, [x21, 36] + ubfx x1, x1, 22, 5 + lsl w1, w1, 7 + bl rknand_dma_unmap_single +.L1162: + add x0, x20, :lo12:.LANCHOR0 + ldr w0, [x0, 2456] + cbz w0, .L1157 + mov x0, x19 + bl NandcSendDumpDataDone + b .L1157 +.L1160: + ldr w0, [x19, 8] + add w21, w21, 1 + str w0, [x29, 64] + tst x21, 16777215 + bne .L1159 + ldr w2, [x29, 64] + mov w1, w21 + ldr w3, [x19, 28] + mov x0, x22 + ubfx x3, x3, 16, 5 + bl printk + mov w3, 512 + mov w2, 4 + mov x1, x19 + mov x0, x23 + bl rknand_print_hex +.L1159: + mov x1, 5 + mov x0, 1 + bl usleep_range + b .L1158 +.L1176: + ldr w0, [x19, 8] + str w0, [x29, 64] + ldr w0, [x29, 64] + tbz x0, 20, .L1176 + b .L1145 + .size NandcXferComp, .-NandcXferComp + .align 2 + .global NandcXferData + .type NandcXferData, %function +NandcXferData: + stp x29, x30, [sp, -192]! + tst x3, 63 + add x29, sp, 0 + stp x25, x26, [sp, 64] + and w25, w0, 255 + stp x21, x22, [sp, 32] + sbfiz x0, x25, 4, 32 + stp x19, x20, [sp, 16] + and w21, w1, 255 + adrp x19, .LANCHOR0 + add x1, x19, :lo12:.LANCHOR0 + stp x23, x24, [sp, 48] + mov x26, x3 + stp x27, x28, [sp, 80] + and w24, w2, 255 + mov x22, x4 + ldr x20, [x1, x0] + bne .L1186 + cbnz x4, .L1187 + add x22, x29, 128 + mov w2, 64 + mov w1, 255 + add x0, x29, 128 + bl ftl_memset +.L1187: + mov x5, x22 + mov x4, x26 + mov w2, w24 + mov w3, 0 + mov w1, w21 + mov w0, w25 + bl NandcXferStart + mov w1, w21 + mov w0, w25 + bl NandcXferComp + cbnz w21, .L1211 + add x1, x19, :lo12:.LANCHOR0 + ubfx x2, x24, 1, 7 + add x2, x22, x2, lsl 2 + mov w3, 64 + ldr w0, [x1, 2460] + cmp w0, 25 + mov w0, 128 + csel w3, w3, w0, cc + mov w0, 0 +.L1190: + add w4, w3, w0 + cmp x22, x2 + bne .L1191 + add x0, x19, :lo12:.LANCHOR0 + lsr w24, w24, 2 + mov w2, 0 + mov w23, 0 + ldr w3, [x0, 2388] + ldr w4, [x0, 2460] +.L1192: + cmp w2, w24 + bcs .L1188 + cbnz w4, .L1198 +.L1188: + str wzr, [x20, 16] +.L1199: + add x19, x19, :lo12:.LANCHOR0 + ldr w0, [x19, 2388] + cmp w0, 5 + bls .L1185 + cbnz w21, .L1185 + ldr w0, [x20] + mov w1, 8192 + movk w1, 0x2, lsl 16 + and w1, w0, w1 + cmp w1, 139264 + bne .L1185 + orr w0, w0, 131072 + mov w23, -1 + str w0, [x20] +.L1185: + mov w0, w23 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 192 + ret +.L1191: + ldr x5, [x1, 2416] + and x0, x0, 4294967292 + add x22, x22, 4 + ldr w0, [x5, x0] + strb w0, [x22, -4] + lsr w5, w0, 8 + strb w5, [x22, -3] + lsr w5, w0, 16 + strb w5, [x22, -2] + lsr w0, w0, 24 + strb w0, [x22, -1] + mov w0, w4 + b .L1190 +.L1198: + uxtw x0, w2 + add x0, x0, 8 + ldr w0, [x20, x0, lsl 2] + str w0, [x29, 120] + ldr w0, [x29, 120] + tbnz x0, 2, .L1214 + ldr w0, [x29, 120] + tbnz x0, 15, .L1214 + cmp w3, 5 + bls .L1194 + ldr w1, [x29, 120] + ubfx x6, x1, 3, 5 + ldr w1, [x29, 120] + ldr w0, [x29, 120] + ubfx x1, x1, 27, 1 + ubfx x5, x0, 16, 5 + ldr w0, [x29, 120] + orr w1, w6, w1, lsl 5 + ubfx x0, x0, 29, 1 + orr w0, w5, w0, lsl 5 + cmp w1, w0 + ldr w0, [x29, 120] + bls .L1195 + ubfx x1, x0, 3, 5 + ldr w0, [x29, 120] + ubfx x0, x0, 27, 1 +.L1220: + orr w0, w1, w0, lsl 5 +.L1196: + cmp w23, w0 + csel w23, w23, w0, cs +.L1193: + add w2, w2, 1 + b .L1192 +.L1195: + ubfx x1, x0, 16, 5 + ldr w0, [x29, 120] + ubfx x0, x0, 29, 1 + b .L1220 +.L1194: + cmp w3, 3 + bls .L1215 + ldr w1, [x29, 120] + ubfx x6, x1, 3, 5 + ldr w1, [x29, 120] + ldr w0, [x29, 120] + ubfx x1, x1, 28, 1 + ubfx x5, x0, 16, 5 + ldr w0, [x29, 120] + orr w1, w6, w1, lsl 5 + ubfx x0, x0, 30, 1 + orr w0, w5, w0, lsl 5 + cmp w1, w0 + ldr w0, [x29, 120] + bls .L1197 + ubfx x1, x0, 3, 5 + ldr w0, [x29, 120] + ubfx x0, x0, 28, 1 + b .L1220 +.L1197: + ubfx x1, x0, 16, 5 + ldr w0, [x29, 120] + ubfx x0, x0, 30, 1 + b .L1220 +.L1215: + mov w0, 0 + b .L1196 +.L1214: + mov w23, -1 + b .L1193 +.L1211: + mov w23, 0 + b .L1188 +.L1186: + cmp w21, 1 + bne .L1200 + cmp x4, 0 + mov w27, 2 + csel w27, w27, wzr, ne + mov w28, 0 + lsl w27, w27, 1 + mov w23, 0 +.L1201: + cmp w23, w24 + bcc .L1203 + mov w23, 0 + b .L1199 +.L1203: + and w6, w23, 3 + cbz x26, .L1216 + lsl w3, w23, 9 + add x3, x26, x3 +.L1202: + add x4, x22, w28, uxtw + mov w2, w6 + mov x0, x20 + str w6, [x29, 108] + mov w1, 1 + bl NandcCopy1KB + ldr w6, [x29, 108] + mov x5, 0 + mov x4, 0 + mov w2, 2 + mov w3, w6 + mov w0, w25 + mov w1, 1 + add w23, w23, 2 + bl NandcXferStart + add w28, w28, w27 + mov w1, 1 + mov w0, w25 + bl NandcXferComp + b .L1201 +.L1216: + mov x3, 0 + b .L1202 +.L1200: + mov w0, w25 + mov x5, 0 + mov x4, 0 + mov w3, 0 + mov w2, 2 + mov w1, 0 + bl NandcXferStart + mov w27, 2 + cmp x22, 0 + mov w28, 0 + csel w27, w27, wzr, ne + mov w23, 0 + lsl w0, w27, 1 + mov w27, 0 + str w0, [x29, 108] +.L1204: + cmp w24, w27 + bls .L1199 + mov w0, w25 + mov w1, w21 + bl NandcXferComp + ldr w0, [x20, 32] + add w7, w27, 2 + str w0, [x29, 120] + cmp w24, w7 + bls .L1205 + and w3, w7, 3 + str w7, [x29, 104] + mov x5, 0 + mov x4, 0 + mov w2, 2 + mov w1, 0 + mov w0, w25 + bl NandcXferStart + ldr w7, [x29, 104] +.L1205: + ldr w0, [x29, 120] + tbnz x0, 2, .L1217 + ldr w0, [x29, 120] + ubfx x1, x0, 3, 5 + ldr w0, [x29, 120] + ubfx x0, x0, 27, 1 + orr w0, w1, w0, lsl 5 + cmp w23, w0 + csel w23, w23, w0, cs +.L1206: + and w2, w27, 3 + cbz x26, .L1218 + lsl w3, w27, 9 + add x3, x26, x3 +.L1207: + add x4, x22, w28, uxtw + mov x0, x20 + str w7, [x29, 104] + mov w1, 0 + bl NandcCopy1KB + ldp w7, w0, [x29, 104] + add w28, w28, w0 + mov w27, w7 + b .L1204 +.L1217: + mov w23, -1 + b .L1206 +.L1218: + mov x3, 0 + b .L1207 + .size NandcXferData, .-NandcXferData + .align 2 + .global FlashReadRawPage + .type FlashReadRawPage, %function +FlashReadRawPage: + stp x29, x30, [sp, -64]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + ands w19, w0, 255 + stp x21, x22, [sp, 32] + mov w21, w1 + str x23, [sp, 48] + adrp x1, .LANCHOR1+481 + mov x22, x2 + mov x23, x3 + ldrb w20, [x1, #:lo12:.LANCHOR1+481] + bne .L1222 + adrp x0, .LANCHOR0 + add x0, x0, :lo12:.LANCHOR0 + ldrb w5, [x0, 73] + ldr w0, [x0, 76] + mul w0, w5, w0 + cmp w0, w21 + mov w0, 4 + csel w20, w20, w0, ls +.L1222: + mov w0, w19 + bl NandcWaitFlashReady + mov w0, w19 + bl NandcFlashCs + mov w1, w21 + mov w0, w19 + bl FlashReadCmd + mov w0, w19 + bl NandcWaitFlashReady + mov w2, w20 + mov x4, x23 + mov x3, x22 + mov w1, 0 + mov w0, w19 + bl NandcXferData + mov w2, w0 + mov w0, w19 + bl NandcFlashDeCs + mov w0, w2 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldr x23, [sp, 48] + ldp x29, x30, [sp], 64 + ret + .size FlashReadRawPage, .-FlashReadRawPage + .align 2 + .global FlashDdrTunningRead + .type FlashDdrTunningRead, %function +FlashDdrTunningRead: + stp x29, x30, [sp, -112]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x19, .LANCHOR0 + add x19, x19, :lo12:.LANCHOR0 + stp x23, x24, [sp, 48] + stp x25, x26, [sp, 64] + and w23, w0, 255 + stp x21, x22, [sp, 32] + mov w25, w1 + stp x27, x28, [sp, 80] + mov w22, 6 + mov x24, x2 + mov x28, x3 + ldr x0, [x19, 136] + mov w26, w4 + ldr w0, [x0, 304] + str w0, [x29, 108] + ldr w0, [x19, 2388] + cmp w0, 8 + mov w0, 12 + csel w22, w22, w0, cc + cbz w4, .L1238 + mov w0, 1 + bl FlashSetInterfaceMode + mov w0, 1 + bl NandcSetMode + mov w0, w23 + bl FlashReset + mov x3, x28 + mov x2, x24 + mov w1, w25 + mov w0, w23 + bl FlashReadRawPage + mov w20, w0 + ldrb w0, [x19, 2357] + bl FlashSetInterfaceMode + ldrb w0, [x19, 2357] + bl NandcSetMode + cmn w20, #1 + bne .L1227 +.L1236: + mov w20, -1 +.L1224: + mov w0, w20 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 112 + ret +.L1227: + mov w2, w20 + mov w1, w25 + adrp x0, .LC89 + add x0, x0, :lo12:.LC89 + bl printk + cmp w20, 9 + bhi .L1229 + sbfiz x0, x23, 4, 32 + ldr x0, [x19, x0] + ldr w1, [x0, 3840] + ldr w1, [x0] + orr w1, w1, 131072 + str w1, [x0] +.L1229: + adrp x0, .LANCHOR4 + add x0, x0, :lo12:.LANCHOR4 + ldr w1, [x0, 1616] + add w1, w1, 1 + str w1, [x0, 1616] + cmp w1, 2047 + bls .L1224 + mov x28, 0 + mov x24, 0 + str wzr, [x0, 1616] +.L1226: + mov w5, 0 + mov w21, 0 + mov w6, 0 + mov w19, 0 + mov w27, -1 +.L1234: + stp w5, w6, [x29, 100] + mov w0, w22 + bl NandcSetDdrPara + mov w1, w25 + mov x3, x28 + mov x2, x24 + mov w0, w23 + bl FlashReadRawPage + add w1, w20, 1 + cmp w0, w1 + ldp w5, w6, [x29, 100] + bhi .L1230 + cmp w0, 2 + bhi .L1240 + add w19, w19, 1 + cmp w19, 9 + bls .L1240 + mov w1, w21 + mov w20, w0 + sub w21, w22, w19 + mov w27, 0 +.L1232: + cmp w19, w6 + csel w21, w21, w1, hi +.L1233: + cbz w21, .L1235 + mov w1, w21 + adrp x0, .LC90 + add x0, x0, :lo12:.LC90 + bl printk + mov w0, w21 + bl NandcSetDdrPara +.L1235: + cbz w27, .L1224 + adrp x0, .LC91 + mov w2, w25 + mov w1, w23 + add x0, x0, :lo12:.LC91 + bl printk + cbz w26, .L1236 + ldr w1, [x29, 108] + lsr w0, w1, 8 + bl NandcSetDdrPara + b .L1224 +.L1238: + mov w20, 1024 + b .L1226 +.L1230: + cmp w19, w6 + bls .L1241 + sub w21, w5, w19 + cmp w19, 7 + bhi .L1233 + mov w6, w19 +.L1241: + mov w19, 0 + b .L1231 +.L1240: + mov w5, w22 + mov w20, w0 + mov w27, 0 + mov x28, 0 + mov x24, 0 +.L1231: + add w22, w22, 2 + cmp w22, 69 + bls .L1234 + mov w1, w21 + mov w21, w5 + b .L1232 + .size FlashDdrTunningRead, .-FlashDdrTunningRead + .align 2 + .global FlashReadPage + .type FlashReadPage, %function +FlashReadPage: + stp x29, x30, [sp, -80]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + and w20, w0, 255 + stp x23, x24, [sp, 48] + mov w0, w20 + stp x21, x22, [sp, 32] + mov x23, x2 + stp x25, x26, [sp, 64] + mov w22, w1 + mov x24, x3 + bl FlashReadRawPage + mov w19, w0 + cmn w0, #1 + bne .L1251 + adrp x21, .LANCHOR0 + add x25, x21, :lo12:.LANCHOR0 + ldrb w26, [x25, 80] + cbnz w26, .L1252 +.L1254: + add x21, x21, :lo12:.LANCHOR0 + ldrb w0, [x21, 2380] + cbz w0, .L1251 + ldr x0, [x21, 136] + mov w4, 1 + mov x3, x24 + mov x2, x23 + mov w1, w22 + ldr w25, [x0, 304] + mov w0, w20 + bl FlashDdrTunningRead + mov w19, w0 + cmn w0, #1 + beq .L1255 + ldrb w0, [x21, 2464] + cmp w19, w0, lsr 1 + bls .L1251 +.L1255: + lsr w0, w25, 8 + bl NandcSetDdrPara + b .L1251 +.L1252: + strb wzr, [x25, 80] + mov x3, x24 + mov x2, x23 + mov w1, w22 + mov w0, w20 + bl FlashReadRawPage + strb w26, [x25, 80] + cmn w0, #1 + beq .L1254 + mov w19, w0 +.L1251: + adrp x21, .LANCHOR4 + add x21, x21, :lo12:.LANCHOR4 + ldr x4, [x21, 1624] + cbz x4, .L1250 + cmn w19, #1 + bne .L1250 + mov x3, x24 + mov x2, x23 + mov w1, w22 + mov w0, w20 + blr x4 + mov w19, w0 + mov w1, w0 + mov w3, w22 + mov w2, w20 + adrp x0, .LC92 + add x0, x0, :lo12:.LC92 + bl printk + cmn w19, #1 + bne .L1250 + adrp x0, .LANCHOR0+204 + ldrb w0, [x0, #:lo12:.LANCHOR0+204] + cbz w0, .L1250 + mov w0, w20 + bl flash_enter_slc_mode + ldr x4, [x21, 1624] + mov x3, x24 + mov x2, x23 + mov w1, w22 + mov w0, w20 + blr x4 + mov w19, w0 + mov w0, w20 + bl flash_exit_slc_mode +.L1250: + mov w0, w19 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x29, x30, [sp], 80 + ret + .size FlashReadPage, .-FlashReadPage + .align 2 + .global FlashDdrParaScan + .type FlashDdrParaScan, %function +FlashDdrParaScan: + stp x29, x30, [sp, -48]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x19, .LANCHOR0 + stp x21, x22, [sp, 32] + add x22, x19, :lo12:.LANCHOR0 + and w20, w0, 255 + mov w21, w1 + ldrb w0, [x22, 2357] + bl FlashSetInterfaceMode + ldrb w0, [x22, 2357] + bl NandcSetMode + mov w4, 0 + mov x3, 0 + mov x2, 0 + mov w1, w21 + mov w0, w20 + bl FlashDdrTunningRead + mov x3, 0 + mov w22, w0 + mov x2, 0 + mov w1, w21 + mov w0, w20 + bl FlashReadRawPage + cmn w0, #1 + beq .L1271 + cmn w22, #1 + bne .L1272 +.L1271: + add x20, x19, :lo12:.LANCHOR0 + ldrb w0, [x20, 2357] + tbz x0, 0, .L1272 + mov w0, 1 + bl FlashSetInterfaceMode + mov w0, 1 + bl NandcSetMode + strb wzr, [x20, 2380] +.L1273: + mov w0, 0 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x29, x30, [sp], 48 + ret +.L1272: + add x19, x19, :lo12:.LANCHOR0 + mov w0, 1 + strb w0, [x19, 2380] + b .L1273 + .size FlashDdrParaScan, .-FlashDdrParaScan + .align 2 + .global FlashLoadPhyInfo + .type FlashLoadPhyInfo, %function +FlashLoadPhyInfo: + stp x29, x30, [sp, -128]! + mov w0, 60 + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x20, .LANCHOR0 + stp x21, x22, [sp, 32] + adrp x21, .LANCHOR4 + strb w0, [x29, 120] + mov w0, 40 + strb w0, [x29, 121] + mov w0, 24 + strb w0, [x29, 122] + mov w0, 16 + strb w0, [x29, 123] + add x0, x20, :lo12:.LANCHOR0 + stp x23, x24, [sp, 48] + adrp x22, .LANCHOR1 + stp x27, x28, [sp, 80] + add x22, x22, :lo12:.LANCHOR1 + stp x25, x26, [sp, 64] + mov w27, 20036 + mov w19, 0 + mov w24, 4 + ldr w0, [x0, 76] + mov w23, -1 + str w0, [x29, 108] + add x0, x21, :lo12:.LANCHOR4 + movk w27, 0x4e41, lsl 16 + add x22, x22, 472 + ldr x1, [x0, 1608] + str x1, [x0, 1632] + str wzr, [x0, 1640] + mov w0, 0 + bl flash_enter_slc_mode +.L1282: + add w28, w19, 1 + add x25, x21, :lo12:.LANCHOR4 + mov x26, 0 +.L1284: + add x0, x29, 120 + ldrb w0, [x0, x26] + bl FlashBchSel + ldr x2, [x25, 1608] + mov x3, 0 + mov w1, w19 + mov w0, 0 + bl FlashReadRawPage + cmn w0, #1 + bne .L1283 + ldr x2, [x25, 1608] + mov x3, 0 + mov w1, w28 + mov w0, 0 + bl FlashReadRawPage + cmn w0, #1 + bne .L1283 + add x26, x26, 1 + cmp x26, 4 + bne .L1284 +.L1285: + ldr w0, [x29, 108] + subs w24, w24, #1 + add w19, w19, w0 + bne .L1282 + b .L1290 +.L1286: + mov w1, 2036 + add x0, x6, 12 + bl js_hash + ldr w1, [x6, 8] + cmp w1, w0 + bne .L1292 + add x1, x6, 160 + mov w2, 32 + mov x0, x22 + bl ftl_memcpy + ldr x1, [x25, 1632] + add x23, x20, :lo12:.LANCHOR0 + mov w2, 32 + add x0, x23, 96 + add x1, x1, 192 + bl ftl_memcpy + ldr x1, [x25, 1632] + mov w2, 852 + add x0, x23, 1272 + add x1, x1, 224 + bl ftl_memcpy + ldrh w0, [x22, 10] + bl FlashBlockAlignInit + str w19, [x25, 1640] + ldr x1, [x25, 1632] + ldr w0, [x1, 1076] + strb w0, [x23, 2380] + ldr w0, [x23, 76] + udiv w0, w19, w0 + add w0, w0, 1 + cmp w0, 1 + bls .L1288 +.L1295: + str w0, [x25, 1644] + add x0, x21, :lo12:.LANCHOR4 + ldrh w1, [x1, 14] + mov w23, 0 + strb w1, [x0, 1648] + b .L1285 +.L1288: + mov w0, 2 + b .L1295 +.L1292: + mov w23, -1 + b .L1285 +.L1283: + add x25, x21, :lo12:.LANCHOR4 + ldr x6, [x25, 1632] + ldr w0, [x6] + cmp w0, w27 + bne .L1285 + cbnz w23, .L1286 + add x20, x20, :lo12:.LANCHOR0 + ldr w0, [x20, 76] + udiv w19, w19, w0 + add w19, w19, 1 + str w19, [x25, 1644] +.L1290: + mov w0, 0 + bl flash_exit_slc_mode + mov w0, w23 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 128 + ret + .size FlashLoadPhyInfo, .-FlashLoadPhyInfo + .align 2 + .global ToshibaReadRetrial + .type ToshibaReadRetrial, %function +ToshibaReadRetrial: + stp x29, x30, [sp, -128]! + add x29, sp, 0 + stp x21, x22, [sp, 32] + and w22, w0, 255 + stp x19, x20, [sp, 16] + mov w0, w22 + stp x27, x28, [sp, 80] + mov x27, x3 + stp x23, x24, [sp, 48] + adrp x19, .LANCHOR0 + str x2, [x29, 112] + str w1, [x29, 120] + stp x25, x26, [sp, 64] + bl NandcWaitFlashReady + add x1, x19, :lo12:.LANCHOR0 + sbfiz x0, x22, 4, 32 + add x2, x1, x0 + ldr x23, [x1, x0] + ldrb w0, [x1, 128] + ldrb w28, [x2, 8] + sub w0, w0, #67 + str w28, [x29, 124] + add x20, x28, 8 + and w0, w0, 255 + add x20, x23, x20, lsl 8 + cmp w0, 1 + bls .L1313 + ldrb w0, [x1, 2380] + cbz w0, .L1314 + mov w24, 1 + mov w0, 0 + bl NandcSetDdrMode +.L1298: + add x0, x23, x28, lsl 8 + mov w1, 92 + str w1, [x0, 2056] + mov w1, 197 + str w1, [x0, 2056] +.L1297: + ldrsw x0, [x29, 124] + mov w21, 1 + mov w25, -1 + add x0, x0, 8 + add x0, x23, x0, lsl 8 + str x0, [x29, 104] +.L1299: + adrp x0, .LANCHOR4 + add x0, x0, :lo12:.LANCHOR4 + ldrb w0, [x0, 1649] + add w0, w0, 1 + cmp w21, w0 + bcc .L1308 + mov w26, w25 +.L1307: + add x0, x19, :lo12:.LANCHOR0 + mov w1, 0 + ldrb w0, [x0, 128] + sub w0, w0, #67 + and w0, w0, 255 + cmp w0, 1 + mov x0, x20 + bhi .L1309 + bl SandiskSetRRPara +.L1310: + ldrsw x0, [x29, 124] + add x19, x19, :lo12:.LANCHOR0 + add x0, x0, 8 + add x23, x23, x0, lsl 8 + mov w0, 255 + str w0, [x23, 8] + ldrb w0, [x19, 2464] + add w0, w0, w0, lsl 1 + cmp w26, w0, lsr 2 + bcc .L1311 + cmn w26, #1 + mov w0, 256 + csel w26, w26, w0, eq +.L1311: + mov w0, w22 + bl NandcWaitFlashReady + cbz w24, .L1296 + mov w0, 4 + bl NandcSetDdrMode +.L1296: + mov w0, w26 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 128 + ret +.L1314: + mov w24, 0 + b .L1298 +.L1313: + mov w24, 0 + b .L1297 +.L1308: + add x0, x19, :lo12:.LANCHOR0 + mov w1, w21 + ldrb w0, [x0, 128] + sub w0, w0, #67 + and w0, w0, 255 + cmp w0, 1 + mov x0, x20 + bhi .L1300 + bl SandiskSetRRPara +.L1301: + add x0, x19, :lo12:.LANCHOR0 + ldrb w0, [x0, 128] + cmp w0, 34 + bne .L1302 + adrp x0, .LANCHOR4 + add x0, x0, :lo12:.LANCHOR4 + ldrb w0, [x0, 1649] + sub w0, w0, #3 + cmp w21, w0 + bne .L1302 + ldr x1, [x29, 104] + mov w0, 179 + str w0, [x1, 8] +.L1302: + add x0, x23, x28, lsl 8 + mov w1, 38 + str w1, [x0, 2056] + mov w1, 93 + str w1, [x0, 2056] + cbz w24, .L1303 + mov w0, 4 + bl NandcSetDdrMode + ldr w1, [x29, 120] + mov x3, x27 + ldr x2, [x29, 112] + mov w0, w22 + bl FlashReadRawPage + mov w26, w0 + mov w0, 0 + bl NandcSetDdrMode +.L1304: + cmn w26, #1 + beq .L1305 + add x0, x19, :lo12:.LANCHOR0 + cmn w25, #1 + csel w25, w25, w26, ne + ldrb w0, [x0, 2464] + add w0, w0, w0, lsl 1 + cmp w26, w0, lsr 2 + bcc .L1307 + mov x27, 0 + str xzr, [x29, 112] +.L1305: + add w21, w21, 1 + b .L1299 +.L1300: + bl ToshibaSetRRPara + b .L1301 +.L1303: + ldr w1, [x29, 120] + mov x3, x27 + ldr x2, [x29, 112] + mov w0, w22 + bl FlashReadRawPage + mov w26, w0 + b .L1304 +.L1309: + bl ToshibaSetRRPara + b .L1310 + .size ToshibaReadRetrial, .-ToshibaReadRetrial + .align 2 + .global SamsungReadRetrial + .type SamsungReadRetrial, %function +SamsungReadRetrial: + stp x29, x30, [sp, -96]! + add x29, sp, 0 + stp x21, x22, [sp, 32] + and w22, w0, 255 + stp x19, x20, [sp, 16] + mov w0, w22 + stp x23, x24, [sp, 48] + mov x23, x2 + stp x25, x26, [sp, 64] + mov x24, x3 + stp x27, x28, [sp, 80] + mov w25, w1 + bl NandcWaitFlashReady + adrp x20, .LANCHOR0 + sbfiz x1, x22, 4, 32 + add x0, x20, :lo12:.LANCHOR0 + add x2, x0, x1 + adrp x28, .LANCHOR4 + mov x26, x0 + add x28, x28, :lo12:.LANCHOR4 + ldr x1, [x0, x1] + mov w27, 1 + ldrb w21, [x2, 8] + mov w19, -1 + add x21, x21, 8 + add x21, x1, x21, lsl 8 +.L1325: + ldrb w0, [x28, 1649] + add w0, w0, 1 + cmp w27, w0 + bcc .L1329 +.L1328: + add x20, x20, :lo12:.LANCHOR0 + mov x0, x21 + mov w1, 0 + bl SamsungSetRRPara + ldrb w0, [x20, 2464] + add w0, w0, w0, lsl 1 + cmp w19, w0, lsr 2 + bcc .L1324 + cmn w19, #1 + mov w0, 256 + csel w19, w19, w0, eq +.L1324: + mov w0, w19 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 96 + ret +.L1329: + mov w1, w27 + mov x0, x21 + bl SamsungSetRRPara + mov x3, x24 + mov x2, x23 + mov w1, w25 + mov w0, w22 + bl FlashReadRawPage + cmn w0, #1 + beq .L1326 + ldrb w1, [x26, 2464] + cmn w19, #1 + csel w19, w19, w0, ne + add w1, w1, w1, lsl 1 + cmp w0, w1, lsr 2 + bcc .L1331 + mov x24, 0 + mov x23, 0 +.L1326: + add w27, w27, 1 + b .L1325 +.L1331: + mov w19, w0 + b .L1328 + .size SamsungReadRetrial, .-SamsungReadRetrial + .align 2 + .global MicronReadRetrial + .type MicronReadRetrial, %function +MicronReadRetrial: + stp x29, x30, [sp, -160]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + and w20, w0, 255 + adrp x0, .LANCHOR0 + stp x23, x24, [sp, 48] + str w1, [x29, 156] + add x1, x0, :lo12:.LANCHOR0 + stp x21, x22, [sp, 32] + mov x23, x2 + stp x25, x26, [sp, 64] + mov x24, x3 + stp x27, x28, [sp, 80] + ldrb w19, [x1, 2464] + ldrb w1, [x1, 204] + cbnz w1, .L1339 + add w19, w19, w19, lsl 1 + asr w19, w19, 2 +.L1340: + add x0, x0, :lo12:.LANCHOR0 + mov w22, 0 + str x0, [x29, 144] + mov w27, 239 + add x0, x0, w20, sxtw 4 + mov w28, 137 + str x0, [x29, 136] +.L1350: + mov w0, w20 + bl NandcWaitFlashReady + ldr x0, [x29, 136] + adrp x7, .LANCHOR4 + add x7, x7, :lo12:.LANCHOR4 + mov w21, 0 + mov w25, -1 + ldrb w4, [x0, 8] + ldr x8, [x0] + add x26, x8, x4, lsl 8 +.L1341: + ldrb w0, [x7, 1649] + cmp w21, w0 + bcc .L1345 +.L1344: + add x4, x8, x4, lsl 8 + mov x0, 1000 + str x4, [x29, 128] + str w27, [x4, 2056] + str w28, [x4, 2052] + bl __const_udelay + ldr x4, [x29, 128] + cmp w25, w19 + str wzr, [x4, 2048] + str wzr, [x4, 2048] + str wzr, [x4, 2048] + str wzr, [x4, 2048] + bcc .L1346 + cmn w25, #1 + mov w0, 256 + csel w25, w25, w0, eq +.L1346: + cmp w25, 256 + ccmn w25, #1, 4, ne + bne .L1347 + ldr w2, [x29, 156] + adrp x0, .LC93 + mov w4, w25 + mov w3, w21 + mov w1, w21 + add x0, x0, :lo12:.LC93 + bl printk + cbnz w22, .L1348 + ldr x0, [x29, 144] + ldrb w0, [x0, 204] + cbz w0, .L1338 + cmn w25, #1 + bne .L1338 + mov w1, 3 + mov w0, w20 + mov w22, 1 + bl micron_auto_read_calibration_config + b .L1350 +.L1339: + mov w1, 3 + sdiv w19, w19, w1 + b .L1340 +.L1345: + str w27, [x26, 2056] + mov x0, 1000 + str w28, [x26, 2052] + stp x4, x7, [x29, 104] + str x8, [x29, 120] + bl __const_udelay + add w9, w21, 1 + str w9, [x26, 2048] + str wzr, [x26, 2048] + mov x3, x24 + ldr w1, [x29, 156] + mov x2, x23 + str wzr, [x26, 2048] + mov w0, w20 + str wzr, [x26, 2048] + str w9, [x29, 128] + bl FlashReadRawPage + cmn w0, #1 + ldr w9, [x29, 128] + ldp x4, x7, [x29, 104] + ldr x8, [x29, 120] + beq .L1342 + cmn w25, #1 + csel w25, w25, w0, ne + cmp w0, w19 + bcc .L1352 + mov x24, 0 + mov x23, 0 +.L1342: + mov w21, w9 + b .L1341 +.L1352: + mov w25, w0 + mov x24, 0 + mov x23, 0 + b .L1344 +.L1348: + mov w0, w20 + mov w1, 0 + bl micron_auto_read_calibration_config + cmn w25, #1 + mov w0, 256 + csel w25, w25, w0, eq +.L1338: + mov w0, w25 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 160 + ret +.L1347: + cbz w22, .L1338 + mov w1, 0 + mov w0, w20 + mov w25, 256 + bl micron_auto_read_calibration_config + b .L1338 + .size MicronReadRetrial, .-MicronReadRetrial + .align 2 + .global HynixReadRetrial + .type HynixReadRetrial, %function +HynixReadRetrial: + stp x29, x30, [sp, -112]! + add x29, sp, 0 + stp x21, x22, [sp, 32] + adrp x21, .LANCHOR0 + stp x27, x28, [sp, 80] + and x27, x0, 255 + add x0, x21, :lo12:.LANCHOR0 + stp x25, x26, [sp, 64] + stp x23, x24, [sp, 48] + mov x24, x2 + stp x19, x20, [sp, 16] + add x2, x0, 1272 + mov w26, w1 + add x1, x2, x27 + ldrb w23, [x0, 1274] + mov x22, x27 + ldr x0, [x0, 88] + mov x25, x3 + ldrb w19, [x1, 12] + ldrb w0, [x0, 19] + sub w0, w0, #7 + and w0, w0, 255 + cmp w0, 1 + bhi .L1364 + ldrb w19, [x1, 20] +.L1364: + mov w0, w22 + bl NandcWaitFlashReady + add x4, x21, :lo12:.LANCHOR0 + mov w28, 0 + add x5, x4, 1276 + mov w20, -1 +.L1365: + cmp w28, w23 + bcc .L1370 +.L1369: + add x0, x21, :lo12:.LANCHOR0 + ldr x1, [x0, 88] + add x0, x0, 1272 + add x0, x0, x27 + ldrb w1, [x1, 19] + sub w1, w1, #7 + and w1, w1, 255 + cmp w1, 1 + bhi .L1371 + strb w19, [x0, 20] +.L1372: + add x21, x21, :lo12:.LANCHOR0 + ldrb w0, [x21, 2464] + add w0, w0, w0, lsl 1 + cmp w20, w0, lsr 2 + bcc .L1363 + cmn w20, #1 + mov w0, 256 + csel w20, w20, w0, eq +.L1363: + mov w0, w20 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 112 + ret +.L1370: + add w19, w19, 1 + ldrb w1, [x4, 1273] + and w19, w19, 255 + mov x2, x5 + cmp w23, w19 + stp x5, x4, [x29, 96] + csel w19, w19, wzr, hi + mov w0, w22 + mov w3, w19 + bl HynixSetRRPara + mov x3, x25 + mov x2, x24 + mov w1, w26 + mov w0, w22 + bl FlashReadRawPage + cmn w0, #1 + ldp x5, x4, [x29, 96] + beq .L1367 + ldrb w1, [x4, 2464] + cmn w20, #1 + csel w20, w20, w0, ne + add w1, w1, w1, lsl 1 + cmp w0, w1, lsr 2 + bcc .L1374 + mov x25, 0 + mov x24, 0 +.L1367: + add w28, w28, 1 + b .L1365 +.L1374: + mov w20, w0 + b .L1369 +.L1371: + strb w19, [x0, 12] + b .L1372 + .size HynixReadRetrial, .-HynixReadRetrial + .align 2 + .type samsung_read_retrial, %function +samsung_read_retrial: + stp x29, x30, [sp, -112]! + add x29, sp, 0 + stp x23, x24, [sp, 48] + and w23, w0, 255 + stp x21, x22, [sp, 32] + mov x24, x2 + stp x25, x26, [sp, 64] + mov w0, w23 + stp x19, x20, [sp, 16] + mov w26, w1 + mov x25, x3 + stp x27, x28, [sp, 80] + bl NandcWaitFlashReady + adrp x22, .LANCHOR0 + add x0, x22, :lo12:.LANCHOR0 + sbfiz x1, x23, 4, 32 + add x3, x0, x1 + adrp x21, .LANCHOR3 + ldrb w2, [x0, 2356] + ldr x1, [x0, x1] + ldrb w19, [x3, 8] + cbnz w2, .L1382 + add x21, x21, :lo12:.LANCHOR3 + add x19, x1, x19, lsl 8 + add x21, x21, 16 + mov x27, x0 + mov x4, 0 + mov w20, -1 + mov w6, 239 + mov w5, 141 +.L1386: + str w6, [x19, 2056] + add x0, x21, x4 + str w5, [x19, 2052] + add w28, w4, 1 + stp w6, w5, [x29, 96] + mov x3, x25 + ldrsb w0, [x0, 1] + mov x2, x24 + str w0, [x19, 2048] + mov w1, w26 + str wzr, [x19, 2048] + mov w0, w23 + str wzr, [x19, 2048] + str wzr, [x19, 2048] + str x4, [x29, 104] + bl FlashReadRawPage + cmn w0, #1 + ldp w6, w5, [x29, 96] + ldr x4, [x29, 104] + beq .L1383 + ldrb w1, [x27, 2464] + cmn w20, #1 + csel w20, w20, w0, ne + add w1, w1, w1, lsl 1 + cmp w0, w1, lsr 2 + bcc .L1394 + mov x25, 0 + mov x24, 0 +.L1383: + add x4, x4, 1 + cmp x4, 25 + bne .L1386 + mov w28, 26 +.L1385: + mov w0, 239 + str w0, [x19, 2056] + mov w0, 141 +.L1410: + str w0, [x19, 2052] + add x22, x22, :lo12:.LANCHOR0 + str wzr, [x19, 2048] + str wzr, [x19, 2048] + str wzr, [x19, 2048] + str wzr, [x19, 2048] + ldrb w0, [x22, 2464] + add w0, w0, w0, lsl 1 + cmp w20, w0, lsr 2 + bcc .L1392 + cmn w20, #1 + mov w0, 256 + csel w20, w20, w0, eq +.L1392: + cmp w20, 256 + ccmn w20, #1, 4, ne + bne .L1393 + adrp x0, .LC94 + mov w4, w20 + mov w3, w28 + mov w2, w26 + mov w1, w28 + add x0, x0, :lo12:.LC94 + bl printk +.L1393: + mov w0, w23 + bl NandcWaitFlashReady + mov w0, w20 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 112 + ret +.L1394: + mov w20, w0 + b .L1385 +.L1382: + add x21, x21, :lo12:.LANCHOR3 + add x19, x1, x19, lsl 8 + add x21, x21, 52 + mov x27, x0 + mov w20, -1 + mov w28, 1 + mov w5, 239 + mov w4, 137 +.L1391: + str w5, [x19, 2056] + mov x3, x25 + str w4, [x19, 2052] + mov x2, x24 + stp w5, w4, [x29, 100] + mov w1, w26 + ldrb w0, [x21] + str w0, [x19, 2048] + ldrb w0, [x21, 1] + str w0, [x19, 2048] + ldrb w0, [x21, 2] + str w0, [x19, 2048] + ldrb w0, [x21, 3] + str w0, [x19, 2048] + mov w0, w23 + bl FlashReadRawPage + cmn w0, #1 + ldp w5, w4, [x29, 100] + beq .L1388 + ldrb w1, [x27, 2464] + cmn w20, #1 + csel w20, w20, w0, ne + add w1, w1, w1, lsl 1 + cmp w0, w1, lsr 2 + bcc .L1395 + mov x25, 0 + mov x24, 0 +.L1388: + add w28, w28, 1 + add x21, x21, 4 + cmp w28, 26 + bne .L1391 +.L1390: + mov w0, 239 + str w0, [x19, 2056] + mov w0, 137 + b .L1410 +.L1395: + mov w20, w0 + b .L1390 + .size samsung_read_retrial, .-samsung_read_retrial + .align 2 + .global FlashProgPage + .type FlashProgPage, %function +FlashProgPage: + stp x29, x30, [sp, -64]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + mov w20, w1 + stp x21, x22, [sp, 32] + adrp x1, .LANCHOR1+481 + str x23, [sp, 48] + mov x22, x2 + ldrb w21, [x1, #:lo12:.LANCHOR1+481] + ands w19, w0, 255 + mov x23, x3 + bne .L1412 + adrp x0, .LANCHOR0 + add x0, x0, :lo12:.LANCHOR0 + ldrb w1, [x0, 73] + ldr w2, [x0, 76] + mul w1, w1, w2 + cmp w1, w20 + bls .L1412 + ldrb w0, [x0, 72] + cmp w0, 0 + mov w0, 4 + csel w21, w21, w0, eq +.L1412: + mov w0, w19 + bl NandcWaitFlashReady + mov w0, w19 + bl NandcFlashCs + mov w1, w20 + mov w0, w19 + bl FlashProgFirstCmd + mov x4, x23 + mov x3, x22 + mov w2, w21 + mov w1, 1 + mov w0, w19 + bl NandcXferData + mov w1, w20 + mov w0, w19 + bl FlashProgSecondCmd + mov w0, w19 + bl NandcWaitFlashReady + mov w1, w20 + mov w0, w19 + bl FlashReadStatus + mov w2, w0 + mov w0, w19 + bl NandcFlashDeCs + and w0, w2, 1 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldr x23, [sp, 48] + ldp x29, x30, [sp], 64 + ret + .size FlashProgPage, .-FlashProgPage + .align 2 + .global FlashSavePhyInfo + .type FlashSavePhyInfo, %function +FlashSavePhyInfo: + stp x29, x30, [sp, -64]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x20, .LANCHOR4 + add x20, x20, :lo12:.LANCHOR4 + stp x21, x22, [sp, 32] + stp x23, x24, [sp, 48] + mov w23, 20036 + movk w23, 0x4e41, lsl 16 + adrp x19, .LANCHOR0 + ldr x0, [x20, 1608] + add x19, x19, :lo12:.LANCHOR0 + str x0, [x20, 1632] + mov w22, 0 + ldrb w0, [x20, 1650] + mov w21, 0 + bl FlashBchSel + ldr x0, [x20, 1608] + mov w2, 2048 + mov w1, 0 + bl ftl_memset + ldr x0, [x20, 1632] + mov w2, 32 + str w23, [x0] + ldr x0, [x20, 1632] + ldrb w1, [x19, 2358] + add x0, x0, 16 + strh w1, [x0, -4] + ldrb w1, [x19, 73] + strh w1, [x0, -2] + ldrb w1, [x19, 2380] + str w1, [x0, 1060] + add x1, x19, 2132 + bl ftl_memcpy + ldr x0, [x20, 1632] + mov w2, 8 + add x1, x19, 2360 + add x0, x0, 80 + bl ftl_memcpy + ldr x0, [x20, 1632] + mov w2, 32 + add x1, x19, 1232 + add x0, x0, 96 + bl ftl_memcpy + ldr x0, [x20, 1632] + adrp x1, .LANCHOR1 + add x1, x1, :lo12:.LANCHOR1 + mov w2, 32 + add x1, x1, 472 + add x0, x0, 160 + bl ftl_memcpy + ldr x0, [x20, 1632] + mov w2, 32 + add x1, x19, 96 + add x0, x0, 192 + bl ftl_memcpy + ldr x0, [x20, 1632] + mov w2, 852 + add x1, x19, 1272 + add x0, x0, 224 + bl ftl_memcpy + ldr x6, [x20, 1632] + mov w1, 2036 + add x0, x6, 12 + bl js_hash + str w0, [x6, 8] + mov w0, 1592 + str w0, [x6, 4] + ldr x0, [x20, 1656] + str x0, [x20, 1632] + mov w0, 0 + bl flash_enter_slc_mode +.L1421: + ldr w1, [x19, 76] + mov w2, 0 + mov w0, 0 + mul w1, w21, w1 + bl FlashEraseBlock + ldrb w0, [x19, 204] + cbz w0, .L1416 + mov w24, 0 +.L1417: + ldr w1, [x19, 76] + mov x3, 0 + ldr x2, [x20, 1608] + mov w0, 0 + madd w1, w21, w1, w24 + add w24, w24, 1 + bl FlashProgPage + cmp w24, 10 + bne .L1417 +.L1418: + ldr w1, [x19, 76] + mov x3, 0 + ldr x2, [x20, 1656] + mov w0, 0 + mul w1, w21, w1 + bl FlashReadRawPage + cmn w0, #1 + add w7, w21, 1 + beq .L1419 + ldr x6, [x20, 1632] + ldr w0, [x6] + cmp w0, w23 + bne .L1419 + mov w1, 2036 + add x0, x6, 12 + bl js_hash + ldr w1, [x6, 8] + cmp w1, w0 + bne .L1419 + ldr w0, [x19, 76] + cmp w22, 1 + str w7, [x20, 1644] + mul w21, w0, w21 + str w21, [x20, 1640] + beq .L1422 + mov w22, 1 +.L1419: + mov w21, w7 + cmp w7, 4 + bne .L1421 +.L1420: + mov w0, 0 + bl flash_exit_slc_mode + cmp w22, 0 + csetm w0, eq + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x29, x30, [sp], 64 + ret +.L1416: + ldr w1, [x19, 76] + mov x3, 0 + ldr x2, [x20, 1608] + mov w0, 0 + mul w1, w21, w1 + bl FlashProgPage + ldr w1, [x19, 76] + mov x3, 0 + ldr x2, [x20, 1608] + mov w0, 0 + mul w1, w21, w1 + add w1, w1, 1 + bl FlashProgPage + b .L1418 +.L1422: + mov w22, 2 + b .L1420 + .size FlashSavePhyInfo, .-FlashSavePhyInfo + .align 2 + .global FlashReadIdbDataRaw + .type FlashReadIdbDataRaw, %function +FlashReadIdbDataRaw: + stp x29, x30, [sp, -128]! + add x29, sp, 0 + stp x25, x26, [sp, 64] + mov x25, x0 + mov w0, 60 + stp x19, x20, [sp, 16] + strb w0, [x29, 120] + mov w0, 40 + strb w0, [x29, 121] + mov w0, 24 + strb w0, [x29, 122] + mov w0, 16 + adrp x20, .LANCHOR0 + strb w0, [x29, 123] + add x0, x20, :lo12:.LANCHOR0 + stp x21, x22, [sp, 32] + stp x23, x24, [sp, 48] + stp x27, x28, [sp, 80] + ldrb w26, [x0, 2464] + ldr w0, [x0, 2376] + cbz w0, .L1430 + mov w0, 0 + bl flash_enter_slc_mode +.L1430: + adrp x19, .LANCHOR4 + mov w28, 35899 + add x24, x20, :lo12:.LANCHOR0 + add x27, x29, 120 + add x19, x19, :lo12:.LANCHOR4 + mov w23, -1 + mov w21, 2 + movk w28, 0xfcdc, lsl 16 + mov w2, 2048 + mov w1, 0 + mov x0, x25 + bl ftl_memset +.L1431: + ldrb w0, [x24, 73] + cmp w21, w0 + bcc .L1436 +.L1435: + add x20, x20, :lo12:.LANCHOR0 + mov w0, w26 + bl FlashBchSel + ldr w0, [x20, 2376] + cbz w0, .L1429 + mov w0, 0 + bl flash_exit_slc_mode +.L1429: + mov w0, w23 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 128 + ret +.L1436: + mov x22, 0 +.L1433: + ldrb w4, [x22, x27] + str w4, [x29, 108] + mov w0, w4 + bl FlashBchSel + ldr w1, [x24, 76] + mov x3, 0 + ldr x2, [x19, 1608] + mov w0, 0 + mul w1, w21, w1 + bl FlashReadRawPage + cmn w0, #1 + ldr w4, [x29, 108] + bne .L1432 + add x22, x22, 1 + cmp x22, 4 + bne .L1433 +.L1434: + add w21, w21, 1 + b .L1431 +.L1439: + mov w23, 0 + b .L1435 +.L1432: + ldr x0, [x19, 1608] + ldr w0, [x0] + cmp w0, w28 + bne .L1434 + mov w1, w4 + adrp x0, .LC95 + add x0, x0, :lo12:.LC95 + bl printk + ldr x1, [x19, 1608] + mov w2, 2048 + mov x0, x25 + bl ftl_memcpy + ldr x0, [x19, 1608] + ldr w0, [x0, 512] + strb w0, [x24, 73] + ldr w0, [x19, 1644] + cmp w21, w0 + bcs .L1439 + mov w23, 0 + str w21, [x19, 1644] + bl FlashSavePhyInfo + b .L1434 + .size FlashReadIdbDataRaw, .-FlashReadIdbDataRaw + .align 2 + .global FlashInit + .type FlashInit, %function +FlashInit: + stp x29, x30, [sp, -112]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x19, .LANCHOR0 + stp x23, x24, [sp, 48] + adrp x23, .LANCHOR4 + add x20, x23, :lo12:.LANCHOR4 + stp x21, x22, [sp, 32] + stp x27, x28, [sp, 80] + mov x21, x0 + stp x25, x26, [sp, 64] + mov w0, 32768 + bl ftl_malloc + str x0, [x20, 1608] + mov w0, 32768 + bl ftl_malloc + str x0, [x20, 1656] + mov w0, 4096 + bl ftl_dma32_malloc + add x22, x19, :lo12:.LANCHOR0 + str x0, [x20, 1664] + mov w0, 32768 + bl ftl_malloc + str x0, [x20, 1672] + mov w0, 4096 + bl ftl_dma32_malloc + str x0, [x20, 1680] + mov w0, 50 + strb w0, [x20, 1648] + adrp x25, .LC96 + strb w0, [x22, 73] + mov w0, 128 + strb wzr, [x20, 1688] + add x25, x25, :lo12:.LC96 + str wzr, [x20, 1616] + mov w24, 0 + str wzr, [x20, 1644] + mov w28, 144 + str w0, [x22, 76] + mov w0, 60 + strb w0, [x20, 1650] + add x20, x22, 2132 + mov x27, x20 + strb wzr, [x22, 2380] + strb wzr, [x22, 72] + mov x0, x21 + bl NandcInit +.L1454: + ldrb w1, [x22, 8] + and w26, w24, 255 + str w1, [x29, 108] + mov w0, w26 + ldr x21, [x22] + bl FlashReset + mov w0, w26 + bl NandcFlashCs + ldr w1, [x29, 108] + mov x0, 1000 + ubfiz x1, x1, 8, 8 + add x21, x21, x1 + str w28, [x21, 2056] + str wzr, [x21, 2052] + bl __const_udelay + ldr w0, [x21, 2048] + and w0, w0, 255 + strb w0, [x20] + cmp w0, 44 + ldr w1, [x21, 2048] + strb w1, [x20, 1] + ldr w1, [x21, 2048] + strb w1, [x20, 2] + ldr w1, [x21, 2048] + strb w1, [x20, 3] + ldr w1, [x21, 2048] + strb w1, [x20, 4] + ldr w1, [x21, 2048] + strb w1, [x20, 5] + bne .L1449 + mov w0, 239 + str w0, [x21, 2056] + mov w0, 1 + str w0, [x21, 2052] + mov x0, 1000 + bl __const_udelay + mov w0, 4 + str w0, [x21, 2048] + str wzr, [x21, 2048] + str wzr, [x21, 2048] + str wzr, [x21, 2048] +.L1449: + mov w0, w26 + bl NandcFlashDeCs + ldrb w2, [x20] + sub w0, w2, #1 + and w0, w0, 255 + cmp w0, 253 + bhi .L1450 + ldrb w7, [x20, 5] + add w1, w24, 1 + ldrb w6, [x20, 4] + mov x0, x25 + ldrb w5, [x20, 3] + ldrb w4, [x20, 2] + ldrb w3, [x20, 1] + bl printk +.L1450: + cbnz w24, .L1451 + ldrb w0, [x27] + sub w0, w0, #1 + and w0, w0, 255 + cmp w0, 253 + bhi .L1502 + ldrb w0, [x27, 1] + cmp w0, 255 + beq .L1502 +.L1451: + ldrb w0, [x20] + cmp w0, 181 + bne .L1453 + mov w0, 44 + strb w0, [x20] +.L1453: + add w24, w24, 1 + add x22, x22, 16 + add x20, x20, 8 + cmp w24, 4 + bne .L1454 + add x0, x19, :lo12:.LANCHOR0 + ldrb w1, [x0, 2132] + cmp w1, 173 + beq .L1455 + ldr w0, [x0, 2384] + bl NandcSetDdrMode +.L1455: + add x20, x19, :lo12:.LANCHOR0 + mov w2, 852 + mov w1, 0 + add x0, x20, 1272 + bl ftl_memset + adrp x0, .LANCHOR1 + add x1, x0, :lo12:.LANCHOR1 + add x1, x1, 472 + ldr w4, [x20, 2392] + strb wzr, [x20, 80] + mov w2, 12336 + str x1, [x20, 88] + movk w2, 0x5638, lsl 16 + cmp w4, w2 + bne .L1456 + ldrb w1, [x1, 19] + cmp w1, 50 + beq .L1456 + mov w1, 1 + str w1, [x20, 2376] +.L1456: + add x1, x19, :lo12:.LANCHOR0 + ldrb w2, [x1, 2133] + add w1, w2, 95 + and w3, w1, 255 + mov x1, 1 + cmp w3, 57 + bhi .L1457 + movk x1, 0x205, lsl 48 + lsr x1, x1, x3 + mvn x1, x1 +.L1457: + and w1, w1, 1 + cmp w2, 241 + eor w1, w1, 1 + cset w3, eq + orr w1, w3, w1 + cbnz w1, .L1458 + cmp w2, 220 + bne .L1459 + add x1, x19, :lo12:.LANCHOR0 + ldrb w1, [x1, 2135] + cmp w1, 149 + bne .L1459 +.L1458: + add x1, x19, :lo12:.LANCHOR0 + add x3, x23, :lo12:.LANCHOR4 + mov w6, 16 + mov w5, 1 + add x7, x1, 2132 + strb w6, [x1, 73] + strb w5, [x1, 72] + strb w6, [x3, 1650] + ldrb w6, [x1, 2132] + add x1, x0, :lo12:.LANCHOR1 + cmp w6, 152 + strb w6, [x1, 3425] + strb w2, [x1, 3426] + bne .L1461 + ldrsb w1, [x7, 4] + tbnz w1, #31, .L1462 + mov w1, 24 + strb w1, [x3, 1650] +.L1461: + cmp w4, 2049 + mov w1, 12336 + movk w1, 0x5638, lsl 16 + ccmp w4, w1, 4, ne + bne .L1464 + add x1, x23, :lo12:.LANCHOR4 + mov w3, 16 + strb w3, [x1, 1650] +.L1464: + cmp w2, 218 + bne .L1465 + add x1, x0, :lo12:.LANCHOR1 + mov w2, 2048 + strh w2, [x1, 3438] + mov w2, -38 +.L1548: + strb w2, [x1, 3426] +.L1466: + add x20, x0, :lo12:.LANCHOR1 + add x0, x19, :lo12:.LANCHOR0 + mov w2, 32 + add x1, x20, 3296 + add x0, x0, 96 + bl ftl_memcpy + mov w2, 32 + add x1, x20, 3424 + add x0, x20, 472 + bl ftl_memcpy +.L1459: + add x20, x19, :lo12:.LANCHOR0 + ldrb w0, [x20, 72] + cbnz w0, .L1469 + bl FlashLoadPhyInfoInRam + cbnz w0, .L1471 + ldr x0, [x20, 88] + ldrb w1, [x0, 17] + and w0, w1, 7 + strb w0, [x20, 2357] + tbnz x1, 0, .L1471 + mov w1, 1 + strb w1, [x20, 2380] + bl FlashSetInterfaceMode + ldrb w0, [x20, 2357] + bl NandcSetMode +.L1471: + add x20, x19, :lo12:.LANCHOR0 + ldr x0, [x20, 88] + ldrb w0, [x0, 26] + strb w0, [x20, 204] + bl FlashLoadPhyInfo + cbz w0, .L1469 + ldr w0, [x20, 2384] + cbz w0, .L1474 + mov w0, 1 + bl FlashSetInterfaceMode + mov w0, 1 +.L1543: + bl NandcSetMode + bl FlashLoadPhyInfo + cbz w0, .L1469 + add x20, x19, :lo12:.LANCHOR0 + mov w0, 1 + bl FlashSetInterfaceMode + mov w0, 1 + bl NandcSetMode + ldr x0, [x20, 88] + ldrh w1, [x0, 14] + adrp x0, .LC97 + add x0, x0, :lo12:.LC97 + bl printk + bl FlashLoadPhyInfoInRam + cmn w0, #1 + beq .L1448 + bl FlashDieInfoInit + ldr x0, [x20, 88] + ldrb w0, [x0, 19] + bl FlashGetReadRetryDefault + ldr x0, [x20, 88] + adrp x1, .LANCHOR2+3550 + ldrh w1, [x1, #:lo12:.LANCHOR2+3550] + ldrb w2, [x0, 9] + add w1, w1, 4095 + cmp w2, w1, lsr 12 + blt .L1476 + ldrh w1, [x0, 14] + add w1, w1, 255 + cmp w2, w1, lsr 8 + bge .L1477 +.L1476: + ldrh w1, [x0, 14] + and w1, w1, -256 + strh w1, [x0, 14] +.L1477: + add x0, x19, :lo12:.LANCHOR0 + ldrb w0, [x0, 2357] + tst w0, 6 + beq .L1478 + bl FlashSavePhyInfo + mov w0, 0 + bl flash_enter_slc_mode + add x0, x23, :lo12:.LANCHOR4 + ldr w1, [x0, 1640] + mov w0, 0 + bl FlashDdrParaScan + mov w0, 0 + bl flash_exit_slc_mode +.L1478: + bl FlashSavePhyInfo +.L1469: + add x21, x19, :lo12:.LANCHOR0 + add x20, x23, :lo12:.LANCHOR4 + ldr x2, [x21, 88] + str xzr, [x20, 1624] + ldrb w0, [x2, 26] + strb w0, [x21, 204] + ldrh w0, [x2, 16] + ubfx x1, x0, 7, 1 + strb w1, [x21, 80] + ubfx x1, x0, 3, 1 + strb w1, [x20, 1689] + ubfx x1, x0, 4, 1 + ubfx x0, x0, 8, 3 + strb w1, [x21, 2368] + strb w0, [x21, 2357] + ldrh w1, [x2, 10] + ldrb w0, [x2, 12] + sdiv w1, w1, w0 + ldrb w0, [x2, 18] + bl BuildFlashLsbPageTable + bl FlashDieInfoInit + ldr x0, [x21, 88] + ldrh w1, [x0, 16] + tbz x1, 6, .L1480 + ldrb w0, [x0, 19] + ldrb w1, [x21, 1274] + ldrb w2, [x21, 1273] + strb w1, [x20, 1649] + sub w1, w0, #1 + strb w0, [x21, 128] + and w1, w1, 255 + strb w2, [x21, 129] + cmp w1, 7 + bhi .L1481 + adrp x1, HynixReadRetrial + add x1, x1, :lo12:HynixReadRetrial + str x1, [x20, 1624] + sub w1, w0, #5 + and w1, w1, 255 + cmp w1, 1 + ccmp w0, 8, 4, hi + bne .L1482 + mov w1, 1 + str w1, [x21, 2456] +.L1482: + add x1, x19, :lo12:.LANCHOR0 + cmp w0, 7 + beq .L1544 + cmp w0, 8 + bne .L1505 +.L1544: + add x1, x1, 1300 +.L1483: + mov x2, 0 + mov w3, 0 +.L1485: + ldrsb w4, [x1, x2] + add x2, x2, 1 + cmp w4, 0 + cinc w3, w3, eq + cmp x2, 32 + bne .L1485 + cmp w3, 27 + bls .L1480 + bl FlashGetReadRetryDefault + bl FlashSavePhyInfo +.L1480: + add x0, x19, :lo12:.LANCHOR0 + mov w2, 12336 + movk w2, 0x5638, lsl 16 + ldr w1, [x0, 2392] + cmp w1, w2 + bne .L1495 + ldrb w2, [x0, 204] + cbz w2, .L1495 + ldr x0, [x0, 88] + strb wzr, [x0, 18] +.L1495: + add x0, x19, :lo12:.LANCHOR0 + ldrb w2, [x0, 2132] + cmp w2, 44 + bne .L1496 + ldrb w2, [x0, 2380] + cbz w2, .L1496 + mov w2, 12336 + movk w2, 0x5638, lsl 16 + cmp w1, w2 + bne .L1497 + ldrb w0, [x0, 204] + cbnz w0, .L1496 +.L1497: + add x0, x19, :lo12:.LANCHOR0 + strb wzr, [x0, 2380] + mov w0, 1 + bl FlashSetInterfaceMode + mov w0, 1 + bl NandcSetMode +.L1496: + add x1, x19, :lo12:.LANCHOR0 + ldrb w0, [x1, 2357] + tst w0, 6 + beq .L1498 + ldrb w1, [x1, 2380] + cbnz w1, .L1499 + tbnz x0, 0, .L1498 +.L1499: + add x23, x23, :lo12:.LANCHOR4 + mov w0, 0 + bl flash_enter_slc_mode + mov w0, 0 + ldr w1, [x23, 1640] + bl FlashDdrParaScan + mov w0, 0 + bl flash_exit_slc_mode +.L1498: + add x19, x19, :lo12:.LANCHOR0 + mov w20, 16 + ldr x0, [x19, 88] + ldrb w0, [x0, 20] + bl FlashBchSel + adrp x0, .LANCHOR2 + add x0, x0, :lo12:.LANCHOR2 + add x0, x0, 3888 + bl FlashReadIdbDataRaw + mov w0, 18928 + strb w20, [x19, 73] + movk w0, 0x2, lsl 16 + bl FlashTimingCfg + ldr x1, [x19, 88] + ldrb w3, [x19, 2133] + ldrb w4, [x19, 2132] + ldrb w2, [x1, 12] + strh w2, [x19, 184] + ldrb w2, [x1, 7] + str w2, [x19, 180] + ldrb w2, [x19, 2135] + orr w2, w4, w2, lsl 24 + lsl w4, w3, w20 + orr w3, w4, w3, lsl 8 + ldrh w4, [x1, 14] + orr w2, w2, w3 + str w2, [x19, 176] + ldrb w2, [x19, 2358] + strh w2, [x19, 186] + ldrb w2, [x1, 13] + strh w2, [x19, 188] + strh w4, [x19, 190] + ldrh w2, [x1, 10] + strh w2, [x19, 192] + ldrb w3, [x1, 12] + ldrh w2, [x1, 10] + sdiv w2, w2, w3 + strh w2, [x19, 194] + ldrb w3, [x1, 9] + strh w3, [x19, 196] + ldrh w5, [x1, 10] + ldrb w2, [x1, 9] + mul w2, w2, w5 + mov w5, 512 + strh w5, [x19, 200] + ldrb w5, [x19, 73] + and w2, w2, 65535 + strh w5, [x19, 202] + strh w2, [x19, 198] + ldrb w5, [x19, 72] + cmp w5, 1 + bne .L1500 + ubfiz w2, w2, 1, 15 + lsr w4, w4, 1 + ubfiz w3, w3, 1, 15 + strh w2, [x19, 198] + strb w20, [x19, 73] + mov w2, 8 + strh w4, [x19, 190] + strh w3, [x19, 196] + strh w2, [x19, 202] +.L1500: + ldrb w0, [x1, 20] + bl FlashBchSel + bl ftl_flash_suspend + mov w0, 0 +.L1448: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 112 + ret +.L1465: + cmp w2, 220 + bne .L1467 + add x1, x0, :lo12:.LANCHOR1 + mov w2, 4096 + strh w2, [x1, 3438] + mov w2, -36 + b .L1548 +.L1467: + cmp w2, 211 + bne .L1466 + add x1, x0, :lo12:.LANCHOR1 + mov w2, 4096 + strh w2, [x1, 3438] + mov w2, 2 + strb w2, [x1, 3437] + b .L1466 +.L1474: + ldrb w0, [x20, 2357] + bl FlashSetInterfaceMode + ldrb w0, [x20, 2357] + b .L1543 +.L1505: + add x1, x1, 1292 + b .L1483 +.L1481: + sub w1, w0, #17 + and w1, w1, 255 + cmp w1, 2 + bhi .L1487 + adrp x1, MicronReadRetrial + add x1, x1, :lo12:MicronReadRetrial + str x1, [x20, 1624] + cmp w0, 19 + beq .L1488 +.L1549: + mov w0, 7 + b .L1546 +.L1488: + mov w0, 15 +.L1546: + strb w0, [x20, 1649] + b .L1480 +.L1487: + sub w1, w0, #65 + cmp w0, 33 + and w1, w1, 255 + ccmp w1, 1, 0, ne + bhi .L1489 + adrp x0, ToshibaReadRetrial + add x0, x0, :lo12:ToshibaReadRetrial + str x0, [x20, 1624] + mov w0, 4 + strb w0, [x21, 129] + b .L1549 +.L1489: + sub w2, w0, #34 + sub w1, w0, #67 + and w2, w2, 255 + and w1, w1, 255 + cmp w2, 1 + ccmp w1, 1, 0, hi + bhi .L1490 + adrp x2, ToshibaReadRetrial + add x2, x2, :lo12:ToshibaReadRetrial + str x2, [x20, 1624] + cmp w0, 35 + mov w2, 68 + ccmp w0, w2, 4, ne + beq .L1491 + mov w0, 7 +.L1545: + strb w0, [x20, 1649] + cmp w1, 1 + add x0, x19, :lo12:.LANCHOR0 + bhi .L1493 + mov w1, 4 +.L1547: + strb w1, [x0, 129] + b .L1480 +.L1491: + mov w0, 17 + b .L1545 +.L1493: + mov w1, 5 + b .L1547 +.L1490: + cmp w0, 49 + bne .L1494 + adrp x0, SamsungReadRetrial + add x0, x0, :lo12:SamsungReadRetrial + str x0, [x20, 1624] + b .L1480 +.L1494: + cmp w0, 50 + bne .L1480 + adrp x0, samsung_read_retrial + str wzr, [x21, 2376] + add x0, x0, :lo12:samsung_read_retrial + str x0, [x20, 1624] + b .L1480 +.L1502: + mov w0, -2 + b .L1448 +.L1462: + strb w5, [x3, 1688] + b .L1461 + .size FlashInit, .-FlashInit + .align 2 + .global FlashPageProgMsbFFData + .type FlashPageProgMsbFFData, %function +FlashPageProgMsbFFData: + stp x29, x30, [sp, -64]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x20, .LANCHOR0 + stp x23, x24, [sp, 48] + and w23, w0, 255 + add x0, x20, :lo12:.LANCHOR0 + stp x21, x22, [sp, 32] + and w19, w2, 65535 + ldrb w2, [x0, 204] + cbz w2, .L1551 + ldr w0, [x0, 2376] + cbnz w0, .L1550 +.L1551: + add x0, x20, :lo12:.LANCHOR0 + ldr x0, [x0, 88] + ldrb w0, [x0, 19] + sub w0, w0, #5 + and w3, w0, 255 + cmp w3, 63 + bhi .L1550 + mov x2, 16391 + movk x2, 0x4000, lsl 16 + movk x2, 0x2000, lsl 32 + movk x2, 0x8000, lsl 48 + lsr x0, x2, x3 + tbz x0, 0, .L1550 + adrp x21, .LANCHOR2 + add x21, x21, :lo12:.LANCHOR2 + adrp x22, .LANCHOR4 + mov w24, w1 + add x21, x21, 1500 + add x22, x22, :lo12:.LANCHOR4 +.L1553: + add x0, x20, :lo12:.LANCHOR0 + ldr x0, [x0, 88] + ldrh w0, [x0, 10] + cmp w0, w19 + bhi .L1554 +.L1550: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x29, x30, [sp], 64 + ret +.L1554: + ldrh w1, [x21, w19, sxtw 1] + mov w0, 65535 + cmp w1, w0 + bne .L1550 + ldr x0, [x22, 1656] + mov w2, 32768 + mov w1, 255 + bl ftl_memset + ldr x3, [x22, 1656] + add w1, w19, w24 + add w19, w19, 1 + mov w0, w23 + and w19, w19, 65535 + mov x2, x3 + bl FlashProgPage + b .L1553 + .size FlashPageProgMsbFFData, .-FlashPageProgMsbFFData + .align 2 + .global FlashReadSlc2KPages + .type FlashReadSlc2KPages, %function +FlashReadSlc2KPages: + stp x29, x30, [sp, -128]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + mov x19, x0 + mov w0, 56 + stp x21, x22, [sp, 32] + str w2, [x29, 104] + adrp x2, .LANCHOR1+481 + stp x23, x24, [sp, 48] + nop // between mem op and mult-accumulate + umaddl x0, w1, w0, x19 + stp x25, x26, [sp, 64] + and w22, w1, 255 + adrp x25, .LANCHOR0 + ldrb w2, [x2, #:lo12:.LANCHOR1+481] + add x23, x25, :lo12:.LANCHOR0 + stp x27, x28, [sp, 80] + str x0, [x29, 96] + str w2, [x29, 108] +.L1560: + ldr x0, [x29, 96] + cmp x19, x0 + bne .L1580 + ldp x19, x20, [sp, 16] + mov w0, 0 + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 128 + ret +.L1580: + ldr w1, [x29, 104] + add x2, x29, 124 + mov w4, w22 + add x3, x29, 120 + mov x0, x19 + bl LogAddr2PhyAddr + add x1, x25, :lo12:.LANCHOR0 + ldr w0, [x29, 120] + ldrb w2, [x1, 2358] + cmp w2, w0 + bhi .L1561 + mov w0, -1 + str w0, [x19] +.L1562: + sub w22, w22, #1 + add x19, x19, 56 + and w22, w22, 255 + b .L1560 +.L1561: + add x0, x1, w0, uxtw + adrp x21, .LANCHOR4 + add x27, x21, :lo12:.LANCHOR4 + mov w24, 0 + mov w28, 256 + ldrb w20, [x0, 2360] + mov w0, w20 + bl NandcWaitFlashReady + mov w0, w20 + bl NandcFlashCs +.L1563: + ldr w1, [x29, 124] + mov w0, w20 + bl FlashReadCmd + mov w0, w20 + bl NandcWaitFlashReady + ldrb w2, [x29, 108] + mov w1, 0 + ldp x3, x4, [x19, 8] + mov w0, w20 + bl NandcXferData + mov w26, w0 + ldrb w0, [x27, 1688] + cbz w0, .L1564 + mov w0, w20 + bl flash_read_ecc + cmp w0, 5 + csel w26, w26, w28, ls +.L1564: + cmp w24, 9 + ccmn w26, #1, 0, ls + bne .L1565 + add w24, w24, 1 + b .L1563 +.L1565: + cmp w24, 0 + mov w27, 256 + add x21, x21, :lo12:.LANCHOR4 + csel w26, w26, w27, eq + mov w24, 0 +.L1567: + ldr w0, [x23, 76] + ldr w1, [x29, 124] + add w1, w1, w0 + mov w0, w20 + bl FlashReadCmd + mov w0, w20 + bl NandcWaitFlashReady + ldr x0, [x19, 8] + mov w1, 0 + ldrb w2, [x29, 108] + cmp x0, 0 + add x3, x0, 2048 + ldr x0, [x19, 16] + csel x3, x3, xzr, ne + cmp x0, 0 + add x4, x0, 8 + csel x4, x4, xzr, ne + mov w0, w20 + bl NandcXferData + mov w28, w0 + ldrb w0, [x21, 1688] + cbz w0, .L1570 + mov w0, w20 + bl flash_read_ecc + cmp w0, 5 + csel w28, w28, w27, ls +.L1570: + cmp w24, 9 + ccmn w28, #1, 0, ls + bne .L1571 + add w24, w24, 1 + b .L1567 +.L1571: + cmp w24, 0 + mov w2, 256 + mov w0, w20 + csel w28, w28, w2, eq + bl NandcFlashDeCs + ldrb w0, [x23, 2464] + cmp w26, w28 + csel w5, w26, w28, cs + add w0, w0, w0, lsl 1 + cmp w5, w0, lsr 2 + bls .L1573 + cmn w5, #1 + csel w5, w5, w2, eq +.L1573: + cmp w5, 256 + ldr x0, [x19, 16] + ccmn w5, #1, 4, ne + csel w5, w5, wzr, eq + str w5, [x19] + cbz x0, .L1576 + ldr w1, [x0, 12] + cmn w1, #1 + bne .L1576 + ldr w1, [x0, 8] + cmn w1, #1 + bne .L1576 + ldr w0, [x0] + cmn w0, #1 + beq .L1576 + str w1, [x19] +.L1576: + ldr w3, [x19] + cmn w3, #1 + bne .L1562 + ldr w1, [x19, 4] + adrp x0, .LC98 + ldrb w2, [x23, 2464] + add x0, x0, :lo12:.LC98 + bl printk + ldr x1, [x19, 8] + cbz x1, .L1578 + adrp x0, .LC99 + mov w3, 8 + mov w2, 4 + add x0, x0, :lo12:.LC99 + bl rknand_print_hex +.L1578: + ldr x1, [x19, 16] + cbz x1, .L1562 + mov w3, 4 + adrp x0, .LC100 + mov w2, w3 + add x0, x0, :lo12:.LC100 + bl rknand_print_hex + b .L1562 + .size FlashReadSlc2KPages, .-FlashReadSlc2KPages + .align 2 + .global FlashReadPages + .type FlashReadPages, %function +FlashReadPages: + stp x29, x30, [sp, -144]! + add x29, sp, 0 + stp x21, x22, [sp, 32] + adrp x22, .LANCHOR0 + add x3, x22, :lo12:.LANCHOR0 + stp x19, x20, [sp, 16] + stp x23, x24, [sp, 48] + stp x25, x26, [sp, 64] + stp x27, x28, [sp, 80] + stp w2, w1, [x29, 104] + ldrb w4, [x3, 72] + cbnz w4, .L1609 + mov x25, x0 + adrp x0, .LANCHOR1+481 + mov w24, 0 + mov w23, 0 + ldrb w0, [x0, #:lo12:.LANCHOR1+481] + str w0, [x29, 120] + ldrb w0, [x3, 80] + str w0, [x29, 100] + adrp x0, .LANCHOR4 + add x27, x0, :lo12:.LANCHOR4 +.L1610: + ldr w0, [x29, 108] + cmp w23, w0 + bcc .L1644 + mov w0, 0 + b .L1608 +.L1609: + bl FlashReadSlc2KPages +.L1608: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 144 + ret +.L1644: + mov w26, 56 + ldr w1, [x29, 104] + add x2, x29, 140 + add x3, x29, 136 + umull x0, w23, w26 + add x26, x22, :lo12:.LANCHOR0 + str x0, [x29, 112] + add x21, x25, x0 + ldr w0, [x29, 108] + sub w4, w0, w23 + mov x0, x21 + ldr w28, [x21, 4] + bl LogAddr2PhyAddr + ldrb w2, [x26, 2358] + mov w20, w0 + ldr w0, [x29, 136] + cmp w2, w0 + bhi .L1612 + ldr x1, [x29, 112] + mov w0, -1 + str w0, [x25, x1] +.L1613: + add w23, w23, 1 + b .L1610 +.L1612: + add x0, x26, w0, uxtw + ldrb w19, [x0, 2360] + adrp x0, .LANCHOR4 + add x0, x0, :lo12:.LANCHOR4 + ldrb w0, [x0, 1689] + cmp w0, 0 + mov w0, w19 + csel w20, w20, wzr, ne + bl NandcWaitFlashReady + ldr x0, [x26, 88] + ldrb w0, [x0, 19] + sub w2, w0, #1 + and w2, w2, 255 + cmp w2, 7 + bhi .L1615 + add x1, x26, 1272 + sxtw x2, w19 + add x1, x1, x2 + sub w0, w0, #7 + and w0, w0, 255 + cmp w0, 1 + ldrb w3, [x1, 12] + bhi .L1616 + ldrb w3, [x1, 20] +.L1616: + add x0, x22, :lo12:.LANCHOR0 + add x2, x0, x2 + ldrb w1, [x2, 2128] + cmp w1, w3 + beq .L1615 + ldrb w1, [x0, 1273] + add x2, x0, 1276 + mov w0, w19 + bl HynixSetRRPara +.L1615: + mov w0, w19 + bl NandcFlashCs + ldr w0, [x29, 104] + cmp w0, 1 + cset w0, eq + orr w0, w0, w28, lsr 31 + str w0, [x29, 124] + cbz w0, .L1617 + add x0, x22, :lo12:.LANCHOR0 + ldrb w0, [x0, 204] + cbz w0, .L1617 + mov w0, w19 + bl flash_enter_slc_mode +.L1618: + add x28, x22, :lo12:.LANCHOR0 +.L1624: + ldr w1, [x29, 140] + cmn w1, #1 + bne .L1619 + cmp w19, 255 + beq .L1646 +.L1619: + cbz w20, .L1621 + ldr w2, [x28, 76] + mov w0, w19 + add w2, w1, w2 + bl FlashReadDpCmd +.L1622: + mov w0, w19 + bl NandcWaitFlashReady + cbz w20, .L1620 + ldr w1, [x29, 140] + mov w0, w19 + bl FlashReadDpDataOutCmd +.L1620: + ldrb w2, [x29, 120] + mov w1, 0 + ldp x3, x4, [x21, 8] + mov w0, w19 + bl NandcXferData + mov w26, w0 + ldrb w0, [x28, 80] + cbz w0, .L1623 + cmn w26, #1 + bne .L1623 + strb wzr, [x28, 80] + mov w20, 0 + b .L1624 +.L1617: + mov w0, w19 + bl flash_exit_slc_mode + b .L1618 +.L1621: + mov w0, w19 + bl FlashReadCmd + b .L1622 +.L1646: + mov w20, 0 + b .L1620 +.L1623: + cbz w20, .L1625 + add x0, x22, :lo12:.LANCHOR0 + ldr w1, [x29, 140] + ldr w0, [x0, 76] + add w1, w1, w0 + mov w0, w19 + bl FlashReadDpDataOutCmd + add w0, w23, 1 + mov w1, 56 + ldrb w2, [x29, 120] + nop // between mem op and mult-accumulate + umaddl x0, w0, w1, x25 + mov w1, 0 + ldp x3, x4, [x0, 8] + mov w0, w19 + bl NandcXferData + cmn w0, #1 + mov w24, w0 + csel w20, w20, wzr, ne +.L1625: + add x28, x22, :lo12:.LANCHOR0 + mov w0, w19 + bl NandcFlashDeCs + ldrb w0, [x29, 100] + cmn w26, #1 + strb w0, [x28, 80] + bne .L1626 + ldrb w0, [x28, 2380] + cbnz w0, .L1627 +.L1631: + ldr x4, [x27, 1624] + cbnz x4, .L1628 + ldr w1, [x29, 140] + mov w0, w19 + ldp x2, x3, [x21, 8] + bl FlashReadRawPage + b .L1683 +.L1627: + ldr x0, [x28, 136] + mov w4, 1 + ldr w1, [x29, 140] + ldp x2, x3, [x21, 8] + ldr w20, [x0, 304] + mov w0, w19 + bl FlashDdrTunningRead + mov w26, w0 + cmn w0, #1 + beq .L1630 + ldrb w0, [x28, 2464] + cmp w26, w0, lsr 1 + bls .L1647 +.L1630: + lsr w0, w20, 8 + bl NandcSetDdrPara + cmn w26, #1 + beq .L1631 +.L1647: + mov w20, 0 +.L1626: + add x0, x22, :lo12:.LANCHOR0 + ldrb w0, [x0, 2464] + add w0, w0, w0, lsl 1 + cmp w26, w0, lsr 2 + bls .L1632 + ldr x0, [x27, 1624] + cmp x0, 0 + mov w0, 256 + csel w26, w26, w0, ne +.L1632: + ldr x0, [x29, 112] + cmp w26, 256 + ccmn w26, #1, 4, ne + csel w3, w26, wzr, eq + cmn w3, #1 + str w3, [x25, x0] + bne .L1639 + add x0, x22, :lo12:.LANCHOR0 + ldr w1, [x21, 4] + ldrb w2, [x0, 2464] + adrp x0, .LC98 + add x0, x0, :lo12:.LC98 + bl printk + ldr x1, [x21, 16] + cbz x1, .L1639 + mov w3, 4 + adrp x0, .LC100 + mov w2, w3 + add x0, x0, :lo12:.LC100 + bl rknand_print_hex +.L1639: + cbz w20, .L1641 + add x0, x22, :lo12:.LANCHOR0 + ldrb w0, [x0, 2464] + add w0, w0, w0, lsl 1 + cmp w24, w0, lsr 2 + bls .L1642 + ldr x0, [x27, 1624] + cmp x0, 0 + mov w0, 256 + csel w24, w24, w0, ne +.L1642: + add w0, w23, 1 + mov w1, 56 + cmp w24, 256 + ccmn w24, #1, 4, ne + umull x0, w0, w1 + csel w1, w24, wzr, eq + str w1, [x25, x0] +.L1641: + ldr w0, [x29, 124] + add w23, w23, w20 + cbz w0, .L1613 + add x0, x22, :lo12:.LANCHOR0 + ldrb w0, [x0, 204] + cbz w0, .L1613 + mov w0, w19 + bl flash_exit_slc_mode + b .L1613 +.L1628: + ldr w1, [x29, 140] + mov w0, w19 + ldp x2, x3, [x21, 8] + mov w20, 0 + blr x4 + mov w26, w0 + cmn w0, #1 + bne .L1632 + add x1, x22, :lo12:.LANCHOR0 + ldr x0, [x1, 88] + ldrb w0, [x0, 19] + sub w0, w0, #1 + and w0, w0, 255 + cmp w0, 7 + bhi .L1633 + add x2, x1, 1276 + ldrb w1, [x1, 1273] + mov w3, 0 + mov w0, w19 + bl HynixSetRRPara +.L1633: + ldp x2, x3, [x21, 8] + add x20, x22, :lo12:.LANCHOR0 + ldr w1, [x29, 140] + mov w0, w19 + bl FlashReadRawPage + mov w26, w0 + ldrb w2, [x20, 2464] + mov w3, w0 + ldr w1, [x21, 4] + adrp x0, .LC101 + add x0, x0, :lo12:.LC101 + bl printk + cmn w26, #1 + bne .L1650 + ldrb w0, [x20, 204] + cbz w0, .L1650 + ldr w0, [x29, 124] + cbz w0, .L1634 + mov w0, w19 + bl flash_enter_slc_mode +.L1635: + ldr w1, [x29, 140] + mov w0, w19 + ldp x2, x3, [x21, 8] + ldr x4, [x27, 1624] + blr x4 +.L1683: + mov w26, w0 +.L1650: + mov w20, 0 + b .L1632 +.L1634: + mov w0, w19 + bl flash_exit_slc_mode + b .L1635 + .size FlashReadPages, .-FlashReadPages + .align 2 + .global FlashLoadFactorBbt + .type FlashLoadFactorBbt, %function +FlashLoadFactorBbt: + stp x29, x30, [sp, -176]! + mov w2, 16 + mov w1, 0 + add x29, sp, 0 + stp x21, x22, [sp, 32] + adrp x22, .LANCHOR0 + add x0, x22, :lo12:.LANCHOR0 + stp x25, x26, [sp, 64] + stp x19, x20, [sp, 16] + add x0, x0, 176 + stp x23, x24, [sp, 48] + adrp x23, .LANCHOR4 + stp x27, x28, [sp, 80] + add x19, x23, :lo12:.LANCHOR4 + mov w26, -1 + mov w27, 0 + ldrh w21, [x0, 14] + ldrh w0, [x0, 12] + mul w21, w21, w0 + add x0, x19, 1696 + bl ftl_memset + and w21, w21, 65535 + ldr x0, [x19, 1664] + add w25, w21, w26 + stp xzr, x0, [x29, 128] + and w25, w25, 65535 + sub w0, w21, #12 + mov w19, 0 + str w0, [x29, 108] +.L1685: + add x0, x22, :lo12:.LANCHOR0 + ldrb w0, [x0, 2358] + cmp w0, w19 + bhi .L1691 + mov w0, w26 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 176 + ret +.L1691: + mul w28, w21, w19 + mov w20, w25 + add x24, x23, :lo12:.LANCHOR4 + mov w3, 61664 +.L1686: + ldr w0, [x29, 108] + cmp w20, w0 + ble .L1688 + add w0, w20, w28 + mov w2, 1 + lsl w0, w0, 10 + str w3, [x29, 104] + str w0, [x29, 124] + mov w1, w2 + add x0, x29, 120 + bl FlashReadPages + ldr w0, [x29, 120] + ldr w3, [x29, 104] + cmn w0, #1 + beq .L1687 + ldr x0, [x24, 1664] + ldrh w0, [x0] + cmp w0, w3 + bne .L1687 + add x24, x24, 1696 + add w27, w27, 1 + and w27, w27, 65535 + mov w2, w20 + mov w1, w19 + adrp x0, .LC102 + add x0, x0, :lo12:.LC102 + bl printk + strh w20, [x24, w19, sxtw 1] +.L1688: + add x0, x22, :lo12:.LANCHOR0 + add w19, w19, 1 + and w19, w19, 255 + ldrb w0, [x0, 2358] + cmp w0, w27 + csel w26, w26, wzr, ne + b .L1685 +.L1687: + sub w20, w20, #1 + and w20, w20, 65535 + b .L1686 + .size FlashLoadFactorBbt, .-FlashLoadFactorBbt + .align 2 + .global FlashProgSlc2KPages + .type FlashProgSlc2KPages, %function +FlashProgSlc2KPages: + stp x29, x30, [sp, -176]! + add x29, sp, 0 + stp x23, x24, [sp, 48] + mov w24, 56 + stp x25, x26, [sp, 64] + mov w25, w2 + adrp x2, .LANCHOR1+481 + stp x21, x22, [sp, 32] + nop // between mem op and mult-accumulate + umaddl x24, w1, w24, x0 + and w22, w1, 255 + ldrb w26, [x2, #:lo12:.LANCHOR1+481] + mov w23, w22 + stp x27, x28, [sp, 80] + mov x21, x0 + stp x19, x20, [sp, 16] + adrp x27, .LANCHOR0 + mov x19, x0 + add x28, x27, :lo12:.LANCHOR0 +.L1697: + cmp x21, x24 + bne .L1703 + adrp x23, .LANCHOR4 + add x24, x23, :lo12:.LANCHOR4 +.L1704: + cmp x19, x21 + bne .L1711 + ldp x19, x20, [sp, 16] + mov w0, 0 + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 176 + ret +.L1703: + mov w1, w25 + mov w4, w23 + add x3, x29, 116 + add x2, x29, 112 + mov x0, x21 + bl LogAddr2PhyAddr + add x5, x27, :lo12:.LANCHOR0 + ldr w0, [x29, 116] + ldrb w1, [x5, 2358] + cmp w1, w0 + bhi .L1698 + mov w0, -1 + str w0, [x21] +.L1699: + sub w23, w23, #1 + add x21, x21, 56 + and w23, w23, 255 + b .L1697 +.L1698: + add x0, x5, w0, uxtw + str x5, [x29, 104] + ldrb w20, [x0, 2360] + mov w0, w20 + bl NandcWaitFlashReady + mov w0, w20 + bl NandcFlashCs + ldr w1, [x29, 112] + mov w0, w20 + bl FlashProgFirstCmd + ldp x3, x4, [x21, 8] + mov w2, w26 + mov w1, 1 + mov w0, w20 + bl NandcXferData + ldr w1, [x29, 112] + mov w0, w20 + bl FlashProgSecondCmd + mov w0, w20 + bl NandcWaitFlashReady + ldr w1, [x29, 112] + mov w0, w20 + bl FlashReadStatus + sbfx x0, x0, 0, 1 + ldr x5, [x29, 104] + str w0, [x21] + ldr w1, [x29, 112] + ldr w0, [x5, 76] + add w1, w1, w0 + mov w0, w20 + bl FlashProgFirstCmd + ldr x0, [x21, 8] + mov w2, w26 + mov w1, 1 + cmp x0, 0 + add x3, x0, 2048 + ldr x0, [x21, 16] + csel x3, x3, xzr, ne + cmp x0, 0 + add x4, x0, 8 + csel x4, x4, xzr, ne + mov w0, w20 + bl NandcXferData + ldr w0, [x28, 76] + ldr w1, [x29, 112] + add w1, w1, w0 + mov w0, w20 + bl FlashProgSecondCmd + mov w0, w20 + bl NandcWaitFlashReady + ldr w1, [x29, 112] + mov w0, w20 + bl FlashReadStatus + tbz x0, 0, .L1702 + mov w0, -1 + str w0, [x21] +.L1702: + mov w0, w20 + bl NandcFlashDeCs + b .L1699 +.L1711: + ldr w0, [x19] + cmn w0, #1 + bne .L1705 + ldr w1, [x19, 4] + adrp x0, .LC103 + add x0, x0, :lo12:.LC103 + bl printk +.L1706: + sub w22, w22, #1 + add x19, x19, 56 + and w22, w22, 255 + b .L1704 +.L1705: + add x20, x23, :lo12:.LANCHOR4 + mov w4, w22 + add x3, x29, 116 + add x2, x29, 112 + mov w1, w25 + mov x0, x19 + bl LogAddr2PhyAddr + ldr x0, [x20, 1672] + mov x2, 56 + mov x1, x19 + str wzr, [x0] + ldr x0, [x20, 1680] + str wzr, [x0] + add x0, x29, 120 + bl memcpy + ldr x0, [x20, 1672] + mov w2, w25 + str x0, [x29, 128] + mov w1, 1 + ldr x0, [x20, 1680] + str x0, [x29, 136] + add x0, x29, 120 + bl FlashReadPages + ldr w20, [x29, 120] + cmn w20, #1 + bne .L1707 + ldr w1, [x19, 4] + adrp x0, .LC104 + add x0, x0, :lo12:.LC104 + bl printk + str w20, [x19] +.L1707: + ldr w20, [x29, 120] + cmp w20, 256 + bne .L1708 + ldr w1, [x19, 4] + adrp x0, .LC105 + add x0, x0, :lo12:.LC105 + bl printk + str w20, [x19] +.L1708: + ldr x0, [x19, 16] + cbz x0, .L1709 + ldr w2, [x0] + ldr x0, [x24, 1680] + ldr w3, [x0] + cmp w2, w3 + beq .L1709 + ldr w1, [x19, 4] + adrp x0, .LC106 + add x0, x0, :lo12:.LC106 + bl printk + mov w0, -1 + str w0, [x19] +.L1709: + ldr x0, [x19, 8] + cbz x0, .L1706 + ldr w2, [x0] + ldr x0, [x24, 1672] + ldr w3, [x0] + cmp w2, w3 + beq .L1706 + ldr w1, [x19, 4] + adrp x0, .LC107 + add x0, x0, :lo12:.LC107 + bl printk + mov w0, -1 + str w0, [x19] + b .L1706 + .size FlashProgSlc2KPages, .-FlashProgSlc2KPages + .align 2 + .global FtlLoadFactoryBbt + .type FtlLoadFactoryBbt, %function +FtlLoadFactoryBbt: + stp x29, x30, [sp, -96]! + adrp x0, .LANCHOR2 + add x0, x0, :lo12:.LANCHOR2 + add x29, sp, 0 + stp x23, x24, [sp, 48] + mov w23, 0 + stp x19, x20, [sp, 16] + adrp x20, .LANCHOR4 + stp x21, x22, [sp, 32] + add x20, x20, :lo12:.LANCHOR4 + stp x25, x26, [sp, 64] + add x20, x20, 1712 + str x27, [sp, 80] + mov x26, x20 + mov w27, 61664 + ldr x1, [x0, 3608] + ldr x25, [x0, 3656] + adrp x0, .LANCHOR0 + add x21, x0, :lo12:.LANCHOR0 + mov x24, x0 + add x21, x21, 2636 + stp x1, x25, [x20, 8] +.L1725: + add x0, x24, :lo12:.LANCHOR0 + ldrh w1, [x0, 2494] + cmp w23, w1 + bcc .L1730 + mov w0, 0 + ldr x27, [sp, 80] + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x29, x30, [sp], 96 + ret +.L1730: + ldrh w19, [x0, 2542] + mov x22, x0 + mov w1, -1 + strh w1, [x21] + sub w19, w19, #1 + and w19, w19, 65535 +.L1726: + ldrh w0, [x22, 2542] + sub w1, w0, #16 + cmp w19, w1 + ble .L1728 + madd w0, w0, w23, w19 + mov w2, 1 + mov w1, w2 + lsl w0, w0, 10 + str w0, [x26, 4] + mov x0, x20 + bl FlashReadPages + ldr w0, [x26] + cmn w0, #1 + beq .L1727 + ldrh w0, [x25] + cmp w0, w27 + bne .L1727 + strh w19, [x21] +.L1728: + add w23, w23, 1 + add x21, x21, 2 + b .L1725 +.L1727: + sub w19, w19, #1 + and w19, w19, 65535 + b .L1726 + .size FtlLoadFactoryBbt, .-FtlLoadFactoryBbt + .align 2 + .global FtlGetLastWrittenPage + .type FtlGetLastWrittenPage, %function +FtlGetLastWrittenPage: + stp x29, x30, [sp, -192]! + cmp w1, 1 + add x29, sp, 0 + stp x23, x24, [sp, 48] + mov w23, w1 + stp x19, x20, [sp, 16] + adrp x1, .LANCHOR0 + stp x21, x22, [sp, 32] + add x1, x1, :lo12:.LANCHOR0 + bne .L1736 + ldrh w19, [x1, 2546] +.L1737: + sub w19, w19, #1 + lsl w21, w0, 10 + sxth w19, w19 + add x1, x29, 128 + orr w0, w19, w21 + stp xzr, x1, [x29, 80] + str w0, [x29, 76] + mov w2, w23 + mov w1, 1 + add x0, x29, 72 + bl FlashReadPages + ldr w0, [x29, 128] + cmn w0, #1 + bne .L1738 + mov w22, 0 + mov w24, 2 +.L1739: + cmp w22, w19 + ble .L1742 +.L1738: + mov w0, w19 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x29, x30, [sp], 192 + ret +.L1736: + ldrh w19, [x1, 2544] + b .L1737 +.L1742: + add w20, w22, w19 + mov w2, w23 + mov w1, 1 + sdiv w20, w20, w24 + sxth w0, w20 + orr w0, w0, w21 + str w0, [x29, 76] + add x0, x29, 72 + bl FlashReadPages + ldr w0, [x29, 128] + cmn w0, #1 + bne .L1740 + ldr w0, [x29, 132] + cmn w0, #1 + bne .L1740 + ldr w0, [x29, 72] + cmn w0, #1 + beq .L1740 + sub w19, w20, #1 + sxth w19, w19 + b .L1739 +.L1740: + add w20, w20, 1 + sxth w22, w20 + b .L1739 + .size FtlGetLastWrittenPage, .-FtlGetLastWrittenPage + .align 2 + .global FtlLoadBbt + .type FtlLoadBbt, %function +FtlLoadBbt: + stp x29, x30, [sp, -80]! + add x29, sp, 0 + stp x23, x24, [sp, 48] + adrp x24, .LANCHOR2 + add x0, x24, :lo12:.LANCHOR2 + stp x19, x20, [sp, 16] + stp x25, x26, [sp, 64] + adrp x23, .LANCHOR4 + stp x21, x22, [sp, 32] + add x20, x23, :lo12:.LANCHOR4 + add x20, x20, 1712 + adrp x19, .LANCHOR0 + ldr x1, [x0, 3608] + add x25, x19, :lo12:.LANCHOR0 + ldr x22, [x0, 3656] + mov w26, 61649 + stp x1, x22, [x20, 8] + bl FtlBbtMemInit + ldrh w21, [x25, 2542] + sub w21, w21, #1 + and w21, w21, 65535 +.L1748: + ldrh w0, [x25, 2542] + sub w0, w0, #48 + cmp w21, w0 + ble .L1751 + lsl w0, w21, 10 + mov w2, 1 + str w0, [x20, 4] + mov w1, w2 + mov x0, x20 + bl FlashReadPages + ldr w0, [x20] + cmn w0, #1 + bne .L1749 + ldr w0, [x20, 4] + mov w2, 1 + mov w1, w2 + add w0, w0, 1 + str w0, [x20, 4] + mov x0, x20 + bl FlashReadPages +.L1749: + ldr w0, [x20] + cmn w0, #1 + beq .L1750 + ldrh w0, [x22] + cmp w0, w26 + bne .L1750 + add x1, x19, :lo12:.LANCHOR0 + add x0, x1, 2624 + strh w21, [x1, 2624] + ldr w1, [x22, 4] + str w1, [x0, 8] + ldrh w1, [x22, 8] + strh w1, [x0, 4] +.L1751: + add x21, x19, :lo12:.LANCHOR0 + mov w0, 65535 + ldrh w1, [x21, 2624] + cmp w1, w0 + beq .L1765 + ldrh w1, [x21, 2628] + cmp w1, w0 + beq .L1755 + add x25, x23, :lo12:.LANCHOR4 + lsl w1, w1, 10 + add x0, x25, 1712 + mov w2, 1 + str w1, [x0, 4] + mov w1, w2 + bl FlashReadPages + ldr w0, [x25, 1712] + cmn w0, #1 + beq .L1755 + ldrh w1, [x22] + mov w0, 61649 + cmp w1, w0 + bne .L1755 + ldr w1, [x21, 2632] + ldr w0, [x22, 4] + cmp w0, w1 + bls .L1755 + str w0, [x21, 2632] + ldrh w1, [x21, 2628] + ldrh w0, [x22, 8] + strh w1, [x21, 2624] + strh w0, [x21, 2628] +.L1755: + add x25, x19, :lo12:.LANCHOR0 + add x21, x23, :lo12:.LANCHOR4 + add x21, x21, 1712 + add x26, x24, :lo12:.LANCHOR2 + mov w1, 1 + ldrh w0, [x25, 2624] + bl FtlGetLastWrittenPage + sxth w20, w0 + add w0, w0, 1 + strh w0, [x25, 2626] +.L1757: + tbnz w20, #31, .L1762 + ldrh w0, [x25, 2624] + mov w2, 1 + mov w1, w2 + orr w0, w20, w0, lsl 10 + str w0, [x21, 4] + ldr x0, [x26, 3608] + str x0, [x21, 8] + mov x0, x21 + bl FlashReadPages + ldr w0, [x21] + cmn w0, #1 + beq .L1758 + ldrh w1, [x22] + mov w0, 61649 + cmp w1, w0 + bne .L1758 +.L1762: + add x1, x19, :lo12:.LANCHOR0 + ldrh w0, [x22, 10] + mov w2, 65535 + strh w0, [x1, 2630] + ldrh w0, [x22, 12] + cmp w0, w2 + bne .L1759 +.L1760: + add x19, x19, :lo12:.LANCHOR0 + add x24, x24, :lo12:.LANCHOR2 + add x21, x19, 2656 + add x23, x23, :lo12:.LANCHOR4 + mov w20, 0 +.L1763: + ldrh w0, [x19, 2494] + cmp w20, w0 + bcc .L1764 + mov w0, 0 +.L1747: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x29, x30, [sp], 80 + ret +.L1750: + sub w21, w21, #1 + and w21, w21, 65535 + b .L1748 +.L1758: + sub w20, w20, #1 + sxth w20, w20 + b .L1757 +.L1759: + ldr w2, [x1, 2468] + cmp w0, w2 + beq .L1760 + ldrh w1, [x1, 2482] + lsr w1, w1, 2 + cmp w2, w1 + bcs .L1760 + cmp w0, w1 + bcs .L1760 + bl FtlSysBlkNumInit + b .L1760 +.L1764: + ldrh w2, [x24, 3784] + ldr x0, [x23, 1720] + mul w1, w2, w20 + lsl w2, w2, 2 + add w20, w20, 1 + add x1, x0, x1, lsl 2 + ldr x0, [x21], 8 + bl ftl_memcpy + b .L1763 +.L1765: + mov w0, -1 + b .L1747 + .size FtlLoadBbt, .-FtlLoadBbt + .align 2 + .global FtlScanSysBlk + .type FtlScanSysBlk, %function +FtlScanSysBlk: + stp x29, x30, [sp, -128]! + mov w1, 0 + add x29, sp, 0 + stp x19, x20, [sp, 16] + stp x21, x22, [sp, 32] + adrp x22, .LANCHOR2 + add x19, x22, :lo12:.LANCHOR2 + stp x23, x24, [sp, 48] + adrp x23, .LANCHOR0 + add x20, x23, :lo12:.LANCHOR0 + stp x25, x26, [sp, 64] + mov w25, 56 + ldr x0, [x19, 3768] + ldr w2, [x20, 2572] + stp x27, x28, [sp, 80] + strh wzr, [x19, 3856] + lsl w2, w2, 2 + strh wzr, [x20, 2590] + bl ftl_memset + ldr x0, [x19, 3712] + mov w1, 0 + ldr w2, [x20, 2572] + lsl w2, w2, 1 + bl ftl_memset + ldr x0, [x19, 3736] + mov w1, 0 + ldrh w2, [x20, 2564] + lsl w2, w2, 2 + bl ftl_memset + ldr x0, [x20, 2592] + mov w1, 0 + ldrh w2, [x20, 2564] + lsl w2, w2, 1 + bl ftl_memset + mov w2, 16 + mov w1, 255 + add x0, x19, 784 + bl ftl_memset + ldrh w24, [x20, 2480] + add x0, x20, 2504 + str x0, [x29, 112] +.L1777: + ldrh w0, [x20, 2482] + cmp w0, w24 + bls .L1816 + ldrh w9, [x20, 2472] + mov x6, 0 + ldrh w8, [x20, 2556] + mov w21, 0 + add x5, x22, :lo12:.LANCHOR2 + mov w7, 4 + b .L1817 +.L1779: + ldr x0, [x29, 112] + mov w1, w24 + ldrb w0, [x0, x6] + bl V2P_block + and w4, w0, 65535 + bl FtlBbmIsBadBlock + cbnz w0, .L1778 + umull x2, w21, w25 + ldr x0, [x5, 3584] + lsl w4, w4, 10 + add x0, x0, x2 + str w4, [x0, 4] + ldr x1, [x5, 3584] + ldr x0, [x5, 1392] + add x1, x1, x2 + ldr x2, [x5, 1400] + str x0, [x1, 8] + mul w0, w21, w8 + add w21, w21, 1 + and w21, w21, 65535 + sdiv w0, w0, w7 + add x0, x2, w0, sxtw 2 + str x0, [x1, 16] +.L1778: + add x6, x6, 1 +.L1817: + cmp w9, w6, uxth + bhi .L1779 + cbnz w21, .L1780 +.L1815: + add w24, w24, 1 + and w24, w24, 65535 + b .L1777 +.L1780: + add x19, x22, :lo12:.LANCHOR2 + mov w2, 1 + mov w1, w21 + add x27, x19, 784 + mov x26, 0 + ldr x0, [x19, 3584] + bl FlashReadPages + umull x0, w21, w25 + str x0, [x29, 120] +.L1814: + ldr x0, [x19, 3584] + add x1, x0, x26 + ldr w0, [x0, x26] + ldr w28, [x1, 4] + cmn w0, #1 + ldr x21, [x1, 16] + ubfx x28, x28, 10, 16 + bne .L1783 + mov w6, 16 + mov w7, 65535 +.L1785: + ldr x0, [x19, 3584] + mov w2, 1 + stp w7, w6, [x29, 104] + add x0, x0, x26 + ldr w1, [x0, 4] + add w1, w1, 1 + str w1, [x0, 4] + mov w1, w2 + ldr x0, [x19, 3584] + add x0, x0, x26 + bl FlashReadPages + ldp w7, w6, [x29, 104] + ldrh w0, [x21] + cmp w0, w7 + ldr x0, [x19, 3584] + bne .L1782 + mov w1, -1 + str w1, [x0, x26] + ldr x0, [x19, 3584] + ldr w0, [x0, x26] + cmp w0, w1 + beq .L1851 +.L1783: + ldr w0, [x19, 752] + ldr w10, [x21, 4] + cmn w0, #1 + beq .L1786 + cmp w0, w10 + bhi .L1787 +.L1786: + cmn w10, #1 + beq .L1787 + add w0, w10, 1 + str w0, [x19, 752] +.L1787: + ldrh w0, [x21] + mov w1, 61604 + cmp w0, w1 + beq .L1789 + bhi .L1790 + mov w1, 61574 + cmp w0, w1 + beq .L1791 +.L1788: + ldr x0, [x29, 120] + add x26, x26, 56 + cmp x26, x0 + bne .L1814 + b .L1815 +.L1782: + ldr w0, [x0, x26] + cmn w0, #1 + bne .L1783 + sub w6, w6, #1 + ands w6, w6, 65535 + bne .L1785 +.L1851: + mov w1, 0 + mov w0, w28 + bl FtlFreeSysBlkQueueIn + b .L1788 +.L1790: + mov w1, 61634 + cmp w0, w1 + beq .L1792 + mov w1, 65535 + cmp w0, w1 + beq .L1851 + b .L1788 +.L1792: + ldr w6, [x20, 2572] + ldrh w1, [x19, 3856] + and w2, w6, 65535 + ldr x7, [x19, 3768] + sub w0, w2, #1 + sub w2, w2, w1 + sub w2, w2, #1 + sxth x0, w0 + sxth w2, w2 +.L1794: + cmp w0, w2 + bgt .L1800 + tbz w0, #31, .L1832 + b .L1788 +.L1800: + sxtw x8, w0 + lsl x9, x8, 2 + ldr w11, [x7, x9] + cmp w10, w11 + bls .L1795 + ldr w2, [x7] + cbnz w2, .L1796 + cmp w6, w1 + beq .L1796 + add w1, w1, 1 + strh w1, [x19, 3856] +.L1796: + mov w1, 0 +.L1797: + cmp w1, w0 + bne .L1798 + ldr x1, [x19, 3768] + ldr w2, [x21, 4] + str w2, [x1, x9] + ldr x1, [x19, 3712] + strh w28, [x1, x8, lsl 1] + tbnz w0, #31, .L1788 + ldrh w1, [x19, 3856] + ldr w2, [x20, 2572] + sub w2, w2, w1 + sub w2, w2, #1 + cmp w0, w2, sxth + bgt .L1788 +.L1832: + add w1, w1, 1 + strh w1, [x19, 3856] + ldr x1, [x19, 3768] + ldr w2, [x21, 4] + str w2, [x1, x0, lsl 2] + ldr x1, [x19, 3712] +.L1850: + strh w28, [x1, x0, lsl 1] + b .L1788 +.L1798: + ldr x7, [x19, 3768] + sxtw x2, w1 + lsl x6, x2, 2 + lsl x2, x2, 1 + add x10, x7, x6 + add w1, w1, 1 + sxth w1, w1 + ldr w10, [x10, 4] + str w10, [x7, x6] + ldr x6, [x19, 3712] + add x7, x6, x2 + ldrh w7, [x7, 2] + strh w7, [x6, x2] + b .L1797 +.L1795: + sub w0, w0, #1 + sxth x0, w0 + b .L1794 +.L1791: + ldrh w6, [x20, 2564] + ldrh w1, [x20, 2590] + sub w2, w6, #1 + ldr x7, [x19, 3736] + sxth x0, w2 + sub w2, w2, w1 +.L1803: + cmp w0, w2 + ble .L1808 + sxtw x8, w0 + lsl x9, x8, 2 + ldr w11, [x7, x9] + cmp w10, w11 + bls .L1804 + ldr w2, [x7] + cbnz w2, .L1805 + cmp w6, w1 + beq .L1805 + add w1, w1, 1 + strh w1, [x20, 2590] +.L1805: + mov w1, 0 +.L1806: + cmp w1, w0 + bne .L1807 + ldr x1, [x19, 3736] + ldr w2, [x21, 4] + str w2, [x1, x9] + ldr x1, [x20, 2592] + strh w28, [x1, x8, lsl 1] +.L1808: + tbnz w0, #31, .L1788 + ldrh w1, [x20, 2564] + ldrh w2, [x20, 2590] + sub w1, w1, #1 + sub w1, w1, w2 + cmp w0, w1, sxth + bgt .L1788 + ldr x1, [x19, 3736] + add w2, w2, 1 + strh w2, [x20, 2590] + ldr w2, [x21, 4] + str w2, [x1, x0, lsl 2] + ldr x1, [x20, 2592] + b .L1850 +.L1807: + ldr x7, [x19, 3736] + sxtw x2, w1 + lsl x6, x2, 2 + lsl x2, x2, 1 + add x10, x7, x6 + add w1, w1, 1 + sxth w1, w1 + ldr w10, [x10, 4] + str w10, [x7, x6] + ldr x6, [x20, 2592] + add x7, x6, x2 + ldrh w7, [x7, 2] + strh w7, [x6, x2] + b .L1806 +.L1804: + sub w0, w0, #1 + sxth x0, w0 + b .L1803 +.L1789: + ldrh w0, [x27] + mov w1, 65535 + cmp w0, w1 + bne .L1810 + strh w28, [x27] + str w10, [x27, 8] + b .L1788 +.L1810: + ldrh w0, [x27, 4] + cmp w0, w1 + beq .L1811 + mov w1, 1 + bl FtlFreeSysBlkQueueIn +.L1811: + ldr w0, [x21, 4] + ldr w1, [x27, 8] + cmp w1, w0 + bcs .L1812 + ldrh w0, [x27] + strh w0, [x27, 4] + strh w28, [x27] + ldr w0, [x21, 4] + str w0, [x27, 8] + b .L1788 +.L1812: + strh w28, [x27, 4] + b .L1788 +.L1816: + add x0, x22, :lo12:.LANCHOR2 + ldr x1, [x0, 3712] + ldrh w2, [x1] + cbz w2, .L1818 +.L1821: + add x0, x23, :lo12:.LANCHOR0 + ldr x1, [x0, 2592] + ldrh w2, [x1] + cbz w2, .L1819 +.L1837: + ldp x19, x20, [sp, 16] + mov w0, 0 + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 128 + ret +.L1818: + ldrh w0, [x0, 3856] + cbz w0, .L1821 + ldr w2, [x20, 2572] + mov w0, 0 +.L1822: + cmp w0, w2 + bcs .L1821 + ldrh w3, [x1, w0, sxtw 1] + cbz w3, .L1823 + mov w1, w0 + add x7, x23, :lo12:.LANCHOR0 + add x3, x22, :lo12:.LANCHOR2 +.L1824: + ldr w2, [x7, 2572] + cmp w1, w2 + bcs .L1821 + ldr x5, [x3, 3712] + sxtw x6, w1 + lsl x4, x6, 1 + sub w2, w1, w0 + sxtw x2, w2 + add w1, w1, 1 + sxth w1, w1 + ldrh w8, [x5, x4] + strh w8, [x5, x2, lsl 1] + ldr x5, [x3, 3768] + ldr w6, [x5, x6, lsl 2] + str w6, [x5, x2, lsl 2] + ldr x2, [x3, 3712] + strh wzr, [x2, x4] + b .L1824 +.L1823: + add w0, w0, 1 + sxth w0, w0 + b .L1822 +.L1819: + ldrh w2, [x0, 2590] + cbz w2, .L1837 + ldrh w2, [x0, 2564] + mov w0, 0 +.L1827: + mov w5, w0 + cmp w0, w2 + bge .L1837 + ldrh w3, [x1, w0, sxtw 1] + cbz w3, .L1828 + add x23, x23, :lo12:.LANCHOR0 + add x22, x22, :lo12:.LANCHOR2 +.L1829: + ldrh w1, [x23, 2564] + cmp w0, w1 + bge .L1837 + ldr x3, [x23, 2592] + sxtw x4, w0 + lsl x2, x4, 1 + sub w1, w0, w5 + sxtw x1, w1 + add w0, w0, 1 + sxth w0, w0 + ldrh w6, [x3, x2] + strh w6, [x3, x1, lsl 1] + ldr x3, [x22, 3736] + ldr w4, [x3, x4, lsl 2] + str w4, [x3, x1, lsl 2] + ldr x1, [x23, 2592] + strh wzr, [x1, x2] + b .L1829 +.L1828: + add w0, w0, 1 + sxth w0, w0 + b .L1827 + .size FtlScanSysBlk, .-FtlScanSysBlk + .align 2 + .global FtlLoadSysInfo + .type FtlLoadSysInfo, %function +FtlLoadSysInfo: + sub sp, sp, #112 + mov w1, 0 + stp x29, x30, [sp, 16] + add x29, sp, 16 + stp x19, x20, [sp, 32] + adrp x20, .LANCHOR0 + stp x23, x24, [sp, 64] + adrp x23, .LANCHOR4 + stp x21, x22, [sp, 48] + add x19, x23, :lo12:.LANCHOR4 + adrp x21, .LANCHOR2 + add x24, x21, :lo12:.LANCHOR2 + add x19, x19, 1712 + stp x25, x26, [sp, 80] + stp x27, x28, [sp, 96] + ldr x0, [x24, 3608] + str x0, [x19, 8] + ldr x0, [x24, 3656] + str x0, [x19, 16] + add x0, x20, :lo12:.LANCHOR0 + ldrh w2, [x0, 2480] + ldr x0, [x24, 520] + lsl w2, w2, 1 + bl ftl_memset + ldrh w0, [x24, 784] + mov w1, 65535 + cmp w0, w1 + bne .L1853 +.L1864: + mov w0, -1 +.L1852: + ldp x19, x20, [sp, 32] + ldp x21, x22, [sp, 48] + ldp x23, x24, [sp, 64] + ldp x25, x26, [sp, 80] + ldp x27, x28, [sp, 96] + ldp x29, x30, [sp, 16] + add sp, sp, 112 + ret +.L1853: + add x25, x24, 784 + mov w1, 1 + bl FtlGetLastWrittenPage + ldrsh w28, [x24, 784] + mov w26, 19539 + sxth w22, w0 + movk w26, 0x4654, lsl 16 + add w0, w0, 1 + strh w0, [x25, 2] +.L1855: + tbnz w22, #31, .L1863 + orr w0, w22, w28, lsl 10 + add x27, x20, :lo12:.LANCHOR0 + str w0, [x19, 4] + mov w2, 1 + ldr x0, [x24, 3608] + mov w1, w2 + str x0, [x19, 8] + mov x0, x19 + bl FlashReadPages + ldrb w0, [x27, 72] + cbz w0, .L1856 + ldr x8, [x19, 16] + ldr w7, [x8, 12] + cbz w7, .L1856 + ldr x6, [x19, 8] + ldrh w1, [x27, 2554] + mov x0, x6 + bl js_hash + cmp w7, w0 + beq .L1856 + cbnz w22, .L1857 + ldrh w0, [x25, 4] + cmp w28, w0 + beq .L1857 + ldr w0, [x6] + ldrh w1, [x25] + str w0, [sp] + adrp x0, .LC108 + add x0, x0, :lo12:.LC108 + ldp w4, w5, [x8] + ldr w6, [x8, 8] + ldp w2, w3, [x19] + bl printk + ldrsh w28, [x25, 4] + ldrh w22, [x27, 2546] +.L1859: + sub w22, w22, #1 + sxth w22, w22 + b .L1855 +.L1857: + mov w0, -1 + str w0, [x19] +.L1856: + ldr w0, [x19] + cmn w0, #1 + beq .L1859 + ldr x0, [x24, 3608] + ldr w0, [x0] + cmp w0, w26 + bne .L1859 + ldr x0, [x24, 3656] + ldrh w1, [x0] + mov w0, 61604 + cmp w1, w0 + bne .L1859 +.L1863: + add x19, x23, :lo12:.LANCHOR4 + add x24, x21, :lo12:.LANCHOR2 + add x19, x19, 1712 + add x22, x20, :lo12:.LANCHOR0 + mov w2, 48 + add x0, x24, 456 + ldr x1, [x19, 8] + bl ftl_memcpy + ldr x0, [x24, 520] + ldrh w2, [x22, 2480] + ldr x1, [x19, 8] + lsl w2, w2, 1 + add x1, x1, 48 + bl ftl_memcpy + ldrh w1, [x22, 2480] + ldr x0, [x19, 8] + lsr w2, w1, 3 + ubfiz x1, x1, 1, 16 + add x1, x1, 51 + add w2, w2, 4 + and x1, x1, -4 + add x1, x0, x1 + ldr x0, [x22, 64] + bl ftl_memcpy + ldrh w0, [x22, 2588] + cbz w0, .L1861 + ldrh w1, [x22, 2480] + ldrh w2, [x22, 2580] + lsr w0, w1, 3 + add w1, w0, w1, lsl 1 + ldr x0, [x19, 8] + add w1, w1, 52 + lsl w2, w2, 2 + and x1, x1, 65532 + add x1, x0, x1 + ldr x0, [x24, 3760] + bl ftl_memcpy +.L1861: + add x0, x21, :lo12:.LANCHOR2 + mov w1, 19539 + movk w1, 0x4654, lsl 16 + ldr w2, [x0, 456] + cmp w2, w1 + bne .L1864 + add x1, x20, :lo12:.LANCHOR0 + ldrh w4, [x0, 464] + ldrb w5, [x0, 466] + strh w4, [x0, 790] + ldrh w2, [x1, 2494] + cmp w5, w2 + bne .L1864 + ldrh w2, [x1, 2544] + add x23, x23, :lo12:.LANCHOR4 + ldrh w5, [x1, 2550] + add x3, x0, 512 + strh wzr, [x0, 802] + str w4, [x23, 1768] + mul w2, w2, w4 + strb wzr, [x0, 806] + str w2, [x1, 2616] + strb wzr, [x0, 808] + mul w2, w5, w2 + ldrh w5, [x1, 2630] + str w2, [x1, 2584] + ldr w2, [x1, 2484] + ldrh w1, [x1, 2472] + sub w2, w2, w5 + sub w2, w2, w4 + ldrh w4, [x0, 470] + strh w4, [x0, 560] + udiv w1, w2, w1 + ldrh w2, [x0, 472] + lsr w5, w2, 6 + and w2, w2, 63 + strb w2, [x0, 566] + ldrb w2, [x0, 467] + strb w2, [x0, 568] + mov w2, -1 + strh w2, [x0, 800] + ldrh w2, [x0, 474] + strh w2, [x0, 608] + ldrh w2, [x0, 476] + strh w5, [x0, 562] + strh w1, [x0, 780] + lsr w5, w2, 6 + and w2, w2, 63 + strb w2, [x0, 614] + ldrb w2, [x0, 468] + strb w2, [x0, 616] + ldrh w2, [x0, 478] + strh w2, [x0, 656] + ldrh w2, [x0, 480] + strh w5, [x0, 610] + lsr w5, w2, 6 + and w2, w2, 63 + strh w5, [x0, 658] + strb w2, [x0, 662] + ldrb w2, [x0, 469] + strb w2, [x0, 664] + str wzr, [x0, 720] + ldr w1, [x0, 488] + ldr w2, [x0, 752] + stp wzr, wzr, [x3, 216] + stp wzr, wzr, [x3, 224] + str w1, [x0, 760] + str wzr, [x0, 764] + ldr w1, [x0, 496] + str wzr, [x0, 772] + cmp w1, w2 + bls .L1865 + str w1, [x0, 752] +.L1865: + add x0, x21, :lo12:.LANCHOR2 + ldr w1, [x0, 492] + ldr w2, [x0, 756] + cmp w1, w2 + bls .L1866 + str w1, [x0, 756] +.L1866: + mov w0, 65535 + cmp w4, w0 + beq .L1867 + add x0, x21, :lo12:.LANCHOR2 + add x0, x0, 560 + bl make_superblock +.L1867: + add x1, x21, :lo12:.LANCHOR2 + add x0, x1, 608 + ldrh w2, [x1, 608] + mov w1, 65535 + cmp w2, w1 + beq .L1868 + bl make_superblock +.L1868: + add x1, x21, :lo12:.LANCHOR2 + add x0, x1, 656 + ldrh w2, [x1, 656] + mov w1, 65535 + cmp w2, w1 + beq .L1869 + bl make_superblock +.L1869: + add x21, x21, :lo12:.LANCHOR2 + mov w1, 65535 + add x0, x21, 800 + ldrh w2, [x21, 800] + cmp w2, w1 + beq .L1870 + bl make_superblock +.L1870: + mov w0, 0 + b .L1852 + .size FtlLoadSysInfo, .-FtlLoadSysInfo + .align 2 + .global FtlDumpBlockInfo + .type FtlDumpBlockInfo, %function +FtlDumpBlockInfo: + sub sp, sp, #160 + lsr w0, w0, 10 + stp x29, x30, [sp, 16] + add x29, sp, 16 + stp x19, x20, [sp, 32] + adrp x19, .LANCHOR2 + stp x23, x24, [sp, 64] + adrp x23, .LANCHOR0 + add x20, x23, :lo12:.LANCHOR0 + stp x21, x22, [sp, 48] + stp x25, x26, [sp, 80] + and w24, w1, 255 + stp x27, x28, [sp, 96] + bl P2V_block_in_plane + adrp x1, .LANCHOR3 + add x1, x1, :lo12:.LANCHOR3 + and w22, w0, 65535 + add x1, x1, 152 + ldrh w26, [x20, 2544] + adrp x0, .LC109 + add x0, x0, :lo12:.LC109 + bl printk + add x1, x19, :lo12:.LANCHOR2 + ubfiz x0, x22, 1, 16 + add x25, x29, 144 + ldr x1, [x1, 520] + ldrh w2, [x1, x0] + mov w1, w22 + adrp x0, .LC110 + add x0, x0, :lo12:.LC110 + bl printk + strh w22, [x25, -48]! + mov x0, x25 + bl make_superblock + ldrb w0, [x20, 204] + cbz w0, .L1891 + cbnz w24, .L1891 + mov w0, w22 + bl ftl_get_blk_mode + mov w22, w0 + cmp w0, 1 + bne .L1882 + ldrh w26, [x20, 2546] +.L1882: + add x0, x23, :lo12:.LANCHOR0 + add x19, x19, :lo12:.LANCHOR2 + mov w21, 0 + mov w27, 56 + mov w2, w26 + mov w1, w22 + ldrh w3, [x0, 2544] + adrp x0, .LC111 + add x0, x0, :lo12:.LC111 + bl printk +.L1883: + add x0, x23, :lo12:.LANCHOR0 + add x5, x25, 16 + mov w20, 0 + mov w10, 65535 + mov w6, 4 + ldrh w7, [x0, 2472] + ldrh w8, [x0, 2554] + ldrh w9, [x0, 2556] + mov w0, 0 +.L1884: + cmp w0, w7 + bne .L1886 + ldr x0, [x19, 3584] + mov w1, w20 + adrp x28, .LC112 + mov w2, w22 + umull x20, w20, w27 + mov x24, 0 + add x28, x28, :lo12:.LC112 + bl FlashReadPages +.L1887: + cmp x24, x20 + bne .L1888 + add w21, w21, 1 + and w21, w21, 65535 + cmp w26, w21 + bne .L1883 +.L1889: + ldp x19, x20, [sp, 32] + mov w0, 0 + ldp x21, x22, [sp, 48] + ldp x23, x24, [sp, 64] + ldp x25, x26, [sp, 80] + ldp x27, x28, [sp, 96] + ldp x29, x30, [sp, 16] + add sp, sp, 160 + ret +.L1891: + mov w22, 0 + b .L1882 +.L1886: + ldrh w1, [x5] + cmp w1, w10 + beq .L1885 + umull x4, w20, w27 + ldr x3, [x19, 3584] + orr w1, w21, w1, lsl 10 + add x3, x3, x4 + str w1, [x3, 4] + mul w1, w20, w8 + ldr x2, [x19, 3584] + ldr x3, [x19, 1392] + sdiv w1, w1, w6 + add x2, x2, x4 + add x1, x3, w1, sxtw 2 + str x1, [x2, 8] + mul w1, w20, w9 + ldr x3, [x19, 1400] + add w20, w20, 1 + and w20, w20, 65535 + sdiv w1, w1, w6 + add x1, x3, w1, sxtw 2 + str x1, [x2, 16] +.L1885: + add w0, w0, 1 + add x5, x5, 2 + and w0, w0, 65535 + b .L1884 +.L1888: + ldr x8, [x19, 3584] + ldrh w1, [x29, 96] + add x2, x8, x24 + ldp x3, x0, [x2, 8] + ldr w4, [x3, 4] + str w4, [sp, 8] + ldr w3, [x3] + str w3, [sp] + ldp w4, w5, [x0] + ldp w6, w7, [x0, 8] + mov x0, x28 + ldr w3, [x2, 4] + ldr w2, [x8, x24] + add x24, x24, 56 + bl printk + b .L1887 + .size FtlDumpBlockInfo, .-FtlDumpBlockInfo + .align 2 + .global FtlScanAllBlock + .type FtlScanAllBlock, %function +FtlScanAllBlock: + sub sp, sp, #144 + adrp x1, .LANCHOR3 + add x1, x1, :lo12:.LANCHOR3 + adrp x0, .LC109 + add x1, x1, 176 + add x0, x0, :lo12:.LC109 + stp x29, x30, [sp, 16] + add x29, sp, 16 + stp x21, x22, [sp, 48] + adrp x22, .LANCHOR0 + stp x23, x24, [sp, 64] + add x22, x22, :lo12:.LANCHOR0 + adrp x24, .LANCHOR2 + add x21, x24, :lo12:.LANCHOR2 + stp x19, x20, [sp, 32] + mov w20, 0 + stp x25, x26, [sp, 80] + bl printk +.L1895: + ldrh w0, [x22, 2482] + cmp w0, w20 + bhi .L1903 + ldp x19, x20, [sp, 32] + mov w0, 0 + ldp x21, x22, [sp, 48] + ldp x23, x24, [sp, 64] + ldp x25, x26, [sp, 80] + ldp x29, x30, [sp, 16] + add sp, sp, 144 + ret +.L1903: + add x19, x29, 128 + mov w0, w20 + strh w20, [x19, -48]! + bl ftl_get_blk_mode + add x2, x24, :lo12:.LANCHOR2 + ubfiz x1, x20, 1, 16 + mov w3, w0 + adrp x0, .LC113 + add x0, x0, :lo12:.LC113 + ldr x2, [x2, 520] + ldrh w2, [x2, x1] + mov w1, w20 + bl printk + mov x0, x19 + bl make_superblock + ldrh w7, [x22, 2472] + add x0, x19, 16 + ldrh w8, [x22, 2554] + mov w19, 0 + ldrh w9, [x22, 2556] + mov w1, 0 + mov w10, 65535 + mov w11, 56 + mov w5, 4 +.L1896: + cmp w1, w7 + bne .L1898 + ldr x0, [x21, 3584] + mov w25, 56 + adrp x26, .LC114 + mov w2, 0 + mov w1, w19 + umull x25, w19, w25 + mov x23, 0 + add x26, x26, :lo12:.LC114 + bl FlashReadPages +.L1899: + cmp x23, x25 + bne .L1900 + ldr x0, [x21, 3584] + mov w1, w19 + adrp x25, .LC115 + mov w2, 1 + mov x19, 0 + add x25, x25, :lo12:.LC115 + bl FlashReadPages +.L1901: + cmp x23, x19 + bne .L1902 + add w20, w20, 1 + and w20, w20, 65535 + b .L1895 +.L1898: + ldrh w2, [x0] + cmp w2, w10 + beq .L1897 + umull x6, w19, w11 + ldr x4, [x21, 3584] + lsl w2, w2, 10 + add x4, x4, x6 + str w2, [x4, 4] + mul w2, w19, w8 + ldr x3, [x21, 3584] + ldr x4, [x21, 1392] + sdiv w2, w2, w5 + add x3, x3, x6 + add x2, x4, w2, sxtw 2 + str x2, [x3, 8] + mul w2, w19, w9 + ldr x4, [x21, 1400] + add w19, w19, 1 + and w19, w19, 65535 + sdiv w2, w2, w5 + add x2, x4, w2, sxtw 2 + str x2, [x3, 16] +.L1897: + add w1, w1, 1 + add x0, x0, 2 + and w1, w1, 65535 + b .L1896 +.L1900: + ldr x8, [x21, 3584] + ldrh w1, [x29, 80] + add x2, x8, x23 + ldp x3, x0, [x2, 8] + ldr w4, [x3, 4] + str w4, [sp, 8] + ldr w3, [x3] + str w3, [sp] + ldp w4, w5, [x0] + ldp w6, w7, [x0, 8] + mov x0, x26 + ldr w3, [x2, 4] + ldr w2, [x8, x23] + add x23, x23, 56 + bl printk + b .L1899 +.L1902: + ldr x8, [x21, 3584] + ldrh w1, [x29, 80] + add x2, x8, x19 + ldp x3, x0, [x2, 8] + ldr w4, [x3, 4] + str w4, [sp, 8] + ldr w3, [x3] + str w3, [sp] + ldp w4, w5, [x0] + ldp w6, w7, [x0, 8] + mov x0, x25 + ldr w3, [x2, 4] + ldr w2, [x8, x19] + add x19, x19, 56 + bl printk + b .L1901 + .size FtlScanAllBlock, .-FtlScanAllBlock + .align 2 + .global ftl_scan_all_ppa + .type ftl_scan_all_ppa, %function +ftl_scan_all_ppa: + sub sp, sp, #96 + stp x29, x30, [sp, 16] + add x29, sp, 16 + stp x19, x20, [sp, 32] + adrp x20, .LANCHOR0 + add x20, x20, :lo12:.LANCHOR0 + stp x25, x26, [sp, 80] + adrp x19, .LANCHOR4 + add x19, x19, :lo12:.LANCHOR4 + add x19, x19, 1712 + stp x21, x22, [sp, 48] + ldrh w26, [x20, 2542] + stp x23, x24, [sp, 64] + sub w26, w26, #16 + lsl w25, w26, 10 +.L1906: + ldrh w0, [x20, 2542] + cmp w26, w0 + blt .L1914 + adrp x1, .LANCHOR3 + add x1, x1, :lo12:.LANCHOR3 + add x1, x1, 192 + adrp x0, .LC119 + add x0, x0, :lo12:.LC119 + bl printk + ldp x19, x20, [sp, 32] + ldp x21, x22, [sp, 48] + ldp x23, x24, [sp, 64] + ldp x25, x26, [sp, 80] + ldp x29, x30, [sp, 16] + add sp, sp, 96 + ret +.L1914: + and w21, w26, 65535 + mov w0, w21 + bl ftl_get_blk_mode + ldrb w1, [x20, 204] + cbz w1, .L1907 + ldrh w1, [x20, 2480] + cmp w26, w1 + bge .L1908 + ldrh w1, [x20, 2558] + cmp w26, w1 + blt .L1908 +.L1907: + cmp w0, 1 + bne .L1909 +.L1908: + ldrh w23, [x20, 2546] + mov w24, -2147483648 +.L1910: + mov w3, w24 + mov w2, w23 + mov w1, w26 + adrp x0, .LC116 + add x0, x0, :lo12:.LC116 + bl printk + mov w0, w21 + bl FtlBbmIsBadBlock + cbz w0, .L1911 + adrp x0, .LC117 + mov w3, w24 + mov w2, w23 + mov w1, w26 + add x0, x0, :lo12:.LC117 + bl printk +.L1911: + adrp x22, .LANCHOR2 + add x22, x22, :lo12:.LANCHOR2 + mov w21, 0 +.L1912: + cmp w21, w23 + bne .L1913 + add w26, w26, 1 + add w25, w25, 1024 + b .L1906 +.L1909: + ldrh w23, [x20, 2544] + mov w24, 0 + b .L1910 +.L1913: + add w0, w24, w25 + mov w2, 0 + add w0, w0, w21 + stp wzr, w0, [x19] + ldr x0, [x22, 3608] + mov w1, 1 + str x0, [x19, 8] + add w21, w21, 1 + ldr x0, [x22, 3656] + str x0, [x19, 16] + mov x0, x19 + bl FlashReadPages + ldp x1, x0, [x19, 8] + ldr w2, [x1, 4] + str w2, [sp] + ldp w3, w4, [x0] + ldp w5, w6, [x0, 8] + adrp x0, .LC118 + ldr w7, [x1] + add x0, x0, :lo12:.LC118 + ldp w2, w1, [x19] + bl printk + b .L1912 + .size ftl_scan_all_ppa, .-ftl_scan_all_ppa + .align 2 + .global FlashProgPages + .type FlashProgPages, %function +FlashProgPages: + stp x29, x30, [sp, -176]! + adrp x4, .LANCHOR0 + add x29, sp, 0 + stp x21, x22, [sp, 32] + add x21, x4, :lo12:.LANCHOR0 + stp x19, x20, [sp, 16] + stp x23, x24, [sp, 48] + stp x25, x26, [sp, 64] + stp x27, x28, [sp, 80] + str x4, [x29, 96] + ldr x5, [x21, 88] + ldrb w6, [x21, 72] + str w3, [x29, 108] + ldrb w5, [x5, 19] + cbnz w6, .L1923 + mov x19, x0 + adrp x0, .LANCHOR1+481 + mov w25, w1 + mov w23, w2 + add x27, x21, 2164 + ldrb w28, [x0, #:lo12:.LANCHOR1+481] + mov w22, 0 + sub w0, w5, #1 + str w0, [x29, 104] +.L1924: + cmp w22, w25 + bcc .L1937 + ldr x0, [x29, 96] + mov x20, 0 + mov x24, 24 + add x21, x0, :lo12:.LANCHOR0 + add x22, x21, 2164 +.L1938: + ldrb w0, [x21, 2358] + cmp w0, w20 + bhi .L1940 + ldr w0, [x29, 108] + cbnz w0, .L1941 +.L1949: + mov w0, 0 + b .L1922 +.L1923: + bl FlashProgSlc2KPages +.L1922: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 176 + ret +.L1937: + mov w12, 56 + mov w1, w23 + sub w4, w25, w22 + add x3, x29, 116 + umull x12, w22, w12 + add x2, x29, 112 + add x26, x19, x12 + mov x0, x26 + bl LogAddr2PhyAddr + mov w24, w0 + ldrb w1, [x21, 2358] + ldr w0, [x29, 116] + cmp w1, w0 + bhi .L1926 + mov w0, -1 + str w0, [x19, x12] +.L1927: + add w22, w22, 1 + b .L1924 +.L1926: + ldrb w1, [x21, 2368] + mov x2, 24 + cmp w1, 0 + uxtw x1, w0 + csel w24, w24, wzr, ne + madd x1, x1, x2, x27 + ldr x1, [x1, 8] + cbz x1, .L1929 + bl FlashWaitCmdDone +.L1929: + ldp w2, w1, [x29, 112] + mov x0, 24 + madd x0, x1, x0, x27 + str w2, [x0, 4] + stp x26, xzr, [x0, 8] + cbz w24, .L1930 + add w2, w22, 1 + mov w3, 56 + umaddl x2, w2, w3, x19 + str x2, [x0, 16] +.L1930: + add x0, x21, x1 + ldrb w20, [x0, 2360] + mov x0, 24 + mul x1, x1, x0 + ldrb w0, [x21, 2358] + cmp w0, 1 + mov w0, w20 + strb w20, [x27, x1] + bne .L1931 + bl NandcWaitFlashReady +.L1932: + ldr w0, [x29, 104] + cmp w0, 7 + bhi .L1933 + add x0, x21, w20, sxtw + ldrb w0, [x0, 2128] + cbz w0, .L1933 + ldrb w1, [x21, 1273] + mov w3, 0 + add x2, x21, 1276 + mov w0, w20 + bl HynixSetRRPara +.L1933: + mov w0, w20 + bl NandcFlashCs + cmp w23, 1 + bne .L1934 + ldrb w0, [x21, 204] + cbz w0, .L1934 + mov w0, w20 + bl flash_enter_slc_mode +.L1935: + ldr w1, [x29, 112] + mov w0, w20 + bl FlashProgFirstCmd + ldp x3, x4, [x26, 8] + mov w2, w28 + mov w1, 1 + mov w0, w20 + bl NandcXferData + cbz w24, .L1936 + ldr w1, [x29, 112] + mov w0, w20 + bl FlashProgDpFirstCmd + ldr w1, [x29, 116] + add x0, x21, 1232 + ldr w0, [x0, x1, lsl 2] + ldr w1, [x29, 112] + cmp w0, 0 + mov w0, w20 + cset w2, ne + bl FlashWaitReadyEN + ldr w0, [x21, 76] + ldr w1, [x29, 112] + add w1, w1, w0 + mov w0, w20 + bl FlashProgDpSecondCmd + add w0, w22, 1 + mov w1, 56 + mov w2, w28 + umaddl x0, w0, w1, x19 + mov w1, 1 + ldp x3, x4, [x0, 8] + mov w0, w20 + bl NandcXferData +.L1936: + ldr w1, [x29, 112] + mov w0, w20 + add w22, w22, w24 + bl FlashProgSecondCmd + mov w0, w20 + bl NandcFlashDeCs + b .L1927 +.L1931: + bl NandcFlashCs + ldr w1, [x29, 116] + add x0, x21, 1232 + ldr w0, [x0, x1, lsl 2] + ldr w1, [x29, 112] + cmp w0, 0 + mov w0, w20 + cset w2, ne + bl FlashWaitReadyEN + mov w0, w20 + bl NandcFlashDeCs + b .L1932 +.L1934: + mov w0, w20 + bl flash_exit_slc_mode + b .L1935 +.L1940: + mov w0, w20 + bl FlashWaitCmdDone + cmp w23, 1 + bne .L1939 + ldrb w0, [x21, 204] + cbz w0, .L1939 + mul x0, x20, x24 + ldrb w0, [x0, x22] + bl flash_exit_slc_mode +.L1939: + add x20, x20, 1 + b .L1938 +.L1941: + mov w0, 56 + and w20, w25, 255 + adrp x22, .LANCHOR4 + add x24, x22, :lo12:.LANCHOR4 + umaddl x25, w25, w0, x19 +.L1942: + cmp x25, x19 + beq .L1949 + ldr w0, [x19] + cmn w0, #1 + bne .L1943 + ldr w1, [x19, 4] + adrp x0, .LC103 + add x0, x0, :lo12:.LC103 + bl printk +.L1944: + sub w20, w20, #1 + add x19, x19, 56 + and w20, w20, 255 + b .L1942 +.L1943: + add x21, x22, :lo12:.LANCHOR4 + mov w4, w20 + add x3, x29, 116 + add x2, x29, 112 + mov w1, w23 + mov x0, x19 + bl LogAddr2PhyAddr + ldr x0, [x21, 1672] + mov x2, 56 + mov x1, x19 + str wzr, [x0] + ldr x0, [x21, 1680] + str wzr, [x0] + add x0, x29, 120 + bl memcpy + ldr x0, [x21, 1672] + mov w2, w23 + str x0, [x29, 128] + mov w1, 1 + ldr x0, [x21, 1680] + str x0, [x29, 136] + add x0, x29, 120 + bl FlashReadPages + ldr w21, [x29, 120] + cmn w21, #1 + bne .L1945 + ldr w1, [x19, 4] + adrp x0, .LC104 + add x0, x0, :lo12:.LC104 + bl printk + str w21, [x19] +.L1945: + ldr x0, [x19, 16] + cbz x0, .L1946 + ldr w2, [x0] + ldr x0, [x24, 1680] + ldr w3, [x0] + cmp w2, w3 + beq .L1946 + ldr w1, [x19, 4] + adrp x0, .LC106 + add x0, x0, :lo12:.LC106 + bl printk + mov w0, -1 + str w0, [x19] +.L1946: + ldr x0, [x19, 8] + cbz x0, .L1944 + ldr w2, [x0] + ldr x0, [x24, 1672] + ldr w3, [x0] + cmp w2, w3 + beq .L1944 + ldr w1, [x19, 4] + adrp x0, .LC107 + add x0, x0, :lo12:.LC107 + bl printk + mov w0, -1 + str w0, [x19] + b .L1944 + .size FlashProgPages, .-FlashProgPages + .align 2 + .type FlashTestBlk.part.18, %function +FlashTestBlk.part.18: + stp x29, x30, [sp, -160]! + mov w2, 32 + mov w1, 165 + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x19, .LANCHOR4 + add x19, x19, :lo12:.LANCHOR4 + and w20, w0, 65535 + lsl w20, w20, 10 + ldr x0, [x19, 1656] + str x0, [x29, 48] + add x0, x29, 96 + str x0, [x29, 56] + bl ftl_memset + ldr x0, [x19, 1656] + mov w2, 8 + mov w1, 90 + bl ftl_memset + str w20, [x29, 44] + mov w2, 1 + add x0, x29, 40 + mov w1, w2 + bl FlashEraseBlocks + mov w3, 1 + add x0, x29, 40 + mov w2, w3 + mov w1, w3 + bl FlashProgPages + ldr w0, [x29, 40] + mov w2, 1 + mov w1, 0 + cmp w0, 0 + add x0, x29, 40 + csetm w19, ne + bl FlashEraseBlocks + mov w0, w19 + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 160 + ret + .size FlashTestBlk.part.18, .-FlashTestBlk.part.18 + .align 2 + .global FlashTestBlk + .type FlashTestBlk, %function +FlashTestBlk: + adrp x1, .LANCHOR4+1644 + and w0, w0, 65535 + ldr w1, [x1, #:lo12:.LANCHOR4+1644] + cmp w0, w1 + bcc .L1979 + stp x29, x30, [sp, -16]! + add x29, sp, 0 + bl FlashTestBlk.part.18 + ldp x29, x30, [sp], 16 + ret +.L1979: + mov w0, 0 + ret + .size FlashTestBlk, .-FlashTestBlk + .align 2 + .global FlashMakeFactorBbt + .type FlashMakeFactorBbt, %function +FlashMakeFactorBbt: + stp x29, x30, [sp, -240]! + adrp x1, .LANCHOR0 + add x29, sp, 0 + stp x21, x22, [sp, 32] + adrp x21, .LANCHOR4 + add x0, x21, :lo12:.LANCHOR4 + stp x19, x20, [sp, 16] + stp x23, x24, [sp, 48] + mov w19, 0 + stp x25, x26, [sp, 64] + stp x27, x28, [sp, 80] + ldr x0, [x0, 1664] + stp x0, x1, [x29, 152] + add x0, x1, :lo12:.LANCHOR0 + ldrh w2, [x0, 188] + ldrh w22, [x0, 190] + mul w22, w22, w2 + ldr x2, [x0, 88] + and w22, w22, 65535 + ldrb w2, [x2, 24] + str w2, [x29, 128] + ldrh w2, [x0, 76] + ldrb w0, [x0, 72] + uxtw x1, w2 + cmp w0, 1 + ubfiz w2, w2, 1, 15 + csel w0, w2, w1, eq + mov w1, 1 + str w0, [x29, 168] + adrp x0, .LC120 + add x0, x0, :lo12:.LC120 + bl printk + add x0, x21, :lo12:.LANCHOR4 + mov w2, 4096 + mov w1, 0 + ldr x0, [x0, 1664] + bl ftl_memset + lsr w0, w22, 4 + str w0, [x29, 148] + sub w0, w22, #1 + and w0, w0, 65535 + str w0, [x29, 144] + adrp x0, .LC123 + add x0, x0, :lo12:.LC123 + str x0, [x29, 104] +.L1986: + ldr x0, [x29, 160] + add x20, x0, :lo12:.LANCHOR0 + ldrb w0, [x20, 2358] + cmp w0, w19 + bhi .L2013 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 240 + ret +.L2013: + add x0, x21, :lo12:.LANCHOR4 + sxtw x24, w19 + add x1, x0, 1696 + ldrh w1, [x1, x24, lsl 1] + str w1, [x29, 172] + cbnz w1, .L1987 + ldr x0, [x0, 1608] + add x28, x20, 1232 + ldrh w2, [x20, 196] + mov w23, 0 + mov w25, 0 + mov w26, 0 + lsl w2, w2, 9 + bl ftl_memset + add x0, x20, x24 + ldrb w27, [x0, 2360] + ldr w0, [x29, 128] + and w0, w0, 1 + str w0, [x29, 100] +.L1988: + and w0, w26, 65535 + str w0, [x29, 112] + cmp w0, w22 + bcc .L1999 +.L1998: + mov w2, w23 + mov w1, w19 + adrp x0, .LC122 + add x0, x0, :lo12:.LC122 + bl printk + ldr x0, [x29, 160] + ldr w2, [x29, 148] + add x1, x0, :lo12:.LANCHOR0 + ldrb w0, [x1, 2358] + mul w0, w0, w2 + cmp w23, w0 + blt .L2000 + add x0, x21, :lo12:.LANCHOR4 + ldrh w2, [x1, 196] + mov w1, 0 + ldr x0, [x0, 1608] + lsl w2, w2, 9 + bl ftl_memset +.L2000: + cbnz w19, .L2002 + add x20, x21, :lo12:.LANCHOR4 + ldr x0, [x29, 160] + mov w23, 1 + add x25, x0, :lo12:.LANCHOR0 + ldrh w26, [x20, 1644] +.L2003: + ldrb w0, [x25, 73] + cmp w0, w26 + bhi .L2005 + ldr w26, [x29, 144] + sub w25, w22, #50 + add x20, x21, :lo12:.LANCHOR4 + mov w23, 1 +.L2006: + cmp w26, w25 + bgt .L2008 + ldr x0, [x29, 160] + add x3, x21, :lo12:.LANCHOR4 + add x1, x0, :lo12:.LANCHOR0 + ldr w2, [x3, 1644] + ldrb w0, [x1, 73] + sub w0, w0, w2 + ldr w2, [x29, 172] + cmp w2, w0 + bcc .L2002 + ldr x0, [x3, 1608] + ldrh w2, [x1, 196] + mov w1, 0 + lsl w2, w2, 9 + bl ftl_memset +.L2002: + add x27, x21, :lo12:.LANCHOR4 + mul w25, w19, w22 + ldr w26, [x29, 144] + adrp x23, .LC124 + add x20, x27, 1696 + add x23, x23, :lo12:.LC124 +.L2010: + mov w1, w19 + mov w2, w26 + mov x0, x23 + bl printk + ldr x1, [x27, 1608] +.L2011: + ubfx x0, x26, 5, 11 + ldr w0, [x1, x0, lsl 2] + lsr w0, w0, w26 + tbnz x0, 0, .L2012 + ldr x1, [x29, 152] + mov w0, -3872 + strh w26, [x20, x24, lsl 1] + mov w2, 1 + strh w0, [x1] + strh w26, [x1, 2] + strh wzr, [x1, 8] + mov w1, w2 + ldr x0, [x27, 1608] + str x0, [x29, 192] + ldr x0, [x27, 1664] + str x0, [x29, 200] + add w0, w26, w25 + lsl w0, w0, 10 + str w0, [x29, 188] + add x0, x29, 184 + bl FlashEraseBlocks + mov w3, 1 + add x0, x29, 184 + mov w2, w3 + mov w1, w3 + bl FlashProgPages + ldr w0, [x29, 184] + cbz w0, .L1987 + sub w26, w26, #1 + and w26, w26, 65535 + b .L2010 +.L1999: + mov w0, -1 + strb w0, [x29, 182] + strb w0, [x29, 183] + ldr w0, [x29, 100] + cbz w0, .L1990 + ldr w3, [x28, x24, lsl 2] + mov w0, w27 + add x2, x29, 182 + add w3, w25, w3 + str w3, [x29, 96] + mov w1, w3 + bl FlashReadSpare + ldrb w0, [x20, 72] + ldr w3, [x29, 96] + cmp w0, 1 + bne .L1990 + ldr w1, [x20, 76] + mov w0, w27 + add x2, x29, 183 + add w1, w3, w1 + bl FlashReadSpare + ldrb w0, [x29, 182] + ldrb w1, [x29, 183] + and w0, w0, w1 + strb w0, [x29, 182] +.L1990: + ldr x0, [x29, 128] + tbz x0, 1, .L1992 + ldr x0, [x20, 88] + add x2, x29, 183 + ldrh w1, [x0, 10] + ldr w0, [x28, x24, lsl 2] + sub w1, w1, #1 + add w0, w25, w0 + add w1, w1, w0 + mov w0, w27 + bl FlashReadSpare +.L1992: + ldr x1, [x20, 88] + ldrb w0, [x1, 7] + cmp w0, 1 + ccmp w0, 8, 4, ne + ldrb w0, [x29, 182] + beq .L1993 + ldrb w1, [x1, 18] + cmp w1, 12 + bne .L1994 +.L1993: + cbz w0, .L2015 + ldrb w0, [x29, 183] + cmp w0, 0 + cset w0, eq +.L1995: + ldr x1, [x29, 128] + tbz x1, 2, .L1996 + ldr w1, [x28, x24, lsl 2] + mov w0, w27 + add w1, w25, w1 + bl SandiskProgTestBadBlock +.L1996: + cbz w0, .L1997 + mov w2, w26 + mov w1, w19 + adrp x0, .LC121 + add x0, x0, :lo12:.LC121 + bl printk + add w23, w23, 1 + add x1, x21, :lo12:.LANCHOR4 + ldr x0, [x29, 112] + ldrb w2, [x29, 112] + and w23, w23, 65535 + ldr x3, [x1, 1608] + ubfx x0, x0, 5, 11 + lsl x0, x0, 2 + mov w1, 1 + lsl w2, w1, w2 + ldr w1, [x3, x0] + orr w1, w1, w2 + str w1, [x3, x0] + ldr w1, [x29, 148] + ldrb w0, [x20, 2358] + mul w0, w0, w1 + cmp w23, w0 + bgt .L1998 +.L1997: + ldr w0, [x29, 168] + add w26, w26, 1 + add w25, w25, w0 + b .L1988 +.L1994: + cmp w0, 255 + bne .L2015 + ldrb w0, [x29, 183] + cmp w0, 255 + cset w0, ne + b .L1995 +.L2015: + mov w0, 1 + b .L1995 +.L2005: + mov w0, w26 + bl FlashTestBlk + cbz w0, .L2004 + ldr x0, [x29, 104] + mov w1, w26 + bl printk + ldr x3, [x20, 1608] + ubfx x0, x26, 5, 11 + lsl x0, x0, 2 + lsl w1, w23, w26 + ldr w2, [x3, x0] + orr w1, w2, w1 + str w1, [x3, x0] + ldr w0, [x29, 172] + add w0, w0, 1 + and w0, w0, 65535 + str w0, [x29, 172] +.L2004: + add w26, w26, 1 + and w26, w26, 65535 + b .L2003 +.L2008: + mov w0, w26 + bl FlashTestBlk + cbz w0, .L2007 + ldr x0, [x29, 104] + mov w1, w26 + bl printk + ldr x3, [x20, 1608] + ubfx x0, x26, 5, 11 + lsl x0, x0, 2 + lsl w1, w23, w26 + ldr w2, [x3, x0] + orr w1, w2, w1 + str w1, [x3, x0] +.L2007: + sub w26, w26, #1 + and w26, w26, 65535 + b .L2006 +.L2012: + sub w26, w26, #1 + and w26, w26, 65535 + b .L2011 +.L1987: + add w19, w19, 1 + and w19, w19, 255 + b .L1986 + .size FlashMakeFactorBbt, .-FlashMakeFactorBbt + .align 2 + .global FtlLowFormatEraseBlock + .type FtlLowFormatEraseBlock, %function +FtlLowFormatEraseBlock: + stp x29, x30, [sp, -144]! + add x29, sp, 0 + stp x21, x22, [sp, 32] + adrp x22, .LANCHOR2 + add x5, x22, :lo12:.LANCHOR2 + stp x25, x26, [sp, 64] + stp x19, x20, [sp, 16] + and w26, w0, 65535 + stp x23, x24, [sp, 48] + stp x27, x28, [sp, 80] + ldr w0, [x5, 424] + cbnz w0, .L2058 + adrp x20, .LANCHOR0 + add x24, x20, :lo12:.LANCHOR0 + and w25, w1, 255 + add x9, x24, 2504 + mov w6, 0 + mov w21, 0 + ldrb w8, [x24, 204] + mov w19, 0 + ldrb w0, [x24, 2368] + mov w7, 56 + mov w10, 4 + str w26, [x5, 3572] + str w0, [x29, 132] +.L2037: + ldrh w0, [x24, 2472] + cmp w0, w6 + bhi .L2041 + cbz w21, .L2035 + add x27, x22, :lo12:.LANCHOR2 + cmp w8, 0 + cset w23, ne + strb wzr, [x24, 2368] + mov w2, w21 + mov w1, w23 + ldr x0, [x27, 432] + bl FlashEraseBlocks + ldrb w0, [x29, 132] + strb w0, [x24, 2368] + mov x24, 0 + mov w0, 56 + umull x21, w21, w0 +.L2044: + ldr x0, [x27, 432] + add x1, x0, x24 + ldr w0, [x0, x24] + cmn w0, #1 + bne .L2043 + ldr w0, [x1, 4] + add w19, w19, 1 + and w19, w19, 65535 + lsr w0, w0, 10 + bl FtlBbmMapBadBlock +.L2043: + add x24, x24, 56 + cmp x21, x24 + bne .L2044 + cbnz w25, .L2045 + and w23, w23, 65535 + mov w0, 1 + mov w28, 6 + str w0, [x29, 136] +.L2046: + add x20, x20, :lo12:.LANCHOR0 + add x27, x22, :lo12:.LANCHOR2 + add x0, x20, 2504 + mov w24, 0 + str x0, [x29, 120] +.L2054: + mov w5, 0 + mov w21, 0 + mov w6, 56 + mov w7, 4 +.L2047: + ldrh w0, [x20, 2472] + cmp w0, w5 + bhi .L2050 + cbz w21, .L2035 + ldr x0, [x27, 432] + mov w2, w23 + mov w1, w21 + strb wzr, [x20, 2368] + mov w3, 1 + bl FlashProgPages + mov w1, 56 + ldrb w0, [x29, 132] + strb w0, [x20, 2368] + mov x2, 0 + umull x1, w21, w1 +.L2053: + ldr x0, [x27, 432] + add x3, x0, x2 + ldr w0, [x0, x2] + cbz w0, .L2052 + ldr w0, [x3, 4] + add w19, w19, 1 + stp x2, x1, [x29, 104] + and w19, w19, 65535 + lsr w0, w0, 10 + bl FtlBbmMapBadBlock + ldp x2, x1, [x29, 104] +.L2052: + add x2, x2, 56 + cmp x1, x2 + bne .L2053 + add w24, w24, w28 + ldr w0, [x29, 136] + and w24, w24, 65535 + cmp w0, w24 + bhi .L2054 + add x24, x22, :lo12:.LANCHOR2 + mov x20, 0 +.L2056: + cbz w25, .L2055 + ldr x0, [x24, 432] + add x1, x0, x20 + ldr w0, [x0, x20] + cbnz w0, .L2055 + ldr w0, [x1, 4] + mov w1, 1 + str x2, [x29, 136] + lsr w0, w0, 10 + bl FtlFreeSysBlkQueueIn + ldr x2, [x29, 136] +.L2055: + add x20, x20, 56 + cmp x20, x2 + bne .L2056 + cmp w26, 63 + ccmp w25, 0, 0, hi + beq .L2035 + add x22, x22, :lo12:.LANCHOR2 + mov w2, w21 + mov w1, w23 + ldr x0, [x22, 432] + bl FlashEraseBlocks +.L2035: + mov w0, w19 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 144 + ret +.L2041: + umull x0, w6, w7 + ldr x1, [x5, 432] + str wzr, [x1, x0] + mov w1, w26 + ldrb w0, [x9, w6, sxtw] + bl V2P_block + and w11, w0, 65535 + mov w12, w11 + cbz w25, .L2038 + bl IsBlkInVendorPart + cbnz w0, .L2039 +.L2038: + mov w0, w12 + bl FtlBbmIsBadBlock + cbnz w0, .L2040 + umull x2, w21, w7 + ldr x0, [x5, 432] + lsl w11, w11, 10 + add x0, x0, x2 + str w11, [x0, 4] + ldrh w0, [x24, 2556] + ldr x1, [x5, 432] + add x1, x1, x2 + ldr x2, [x5, 3664] + mul w0, w0, w21 + add w21, w21, 1 + and w21, w21, 65535 + sdiv w0, w0, w10 + add x0, x2, w0, sxtw 2 + stp xzr, x0, [x1, 8] +.L2039: + add w6, w6, 1 + and w6, w6, 65535 + b .L2037 +.L2040: + add w19, w19, 1 + and w19, w19, 65535 + b .L2039 +.L2045: + add x0, x20, :lo12:.LANCHOR0 + ldrh w1, [x0, 2546] + ldrb w0, [x0, 204] + str w1, [x29, 136] + cbnz w0, .L2059 + uxtw x0, w1 + mov w23, 1 + lsr w28, w0, 2 + b .L2046 +.L2059: + mov w23, 1 + mov w28, w23 + b .L2046 +.L2050: + umull x0, w5, w6 + ldr x1, [x27, 432] + str wzr, [x1, x0] + mov w1, w26 + ldr x0, [x29, 120] + ldrb w0, [x0, w5, sxtw] + bl V2P_block + and w8, w0, 65535 + mov w9, w8 + cbz w25, .L2048 + bl IsBlkInVendorPart + cbnz w0, .L2049 +.L2048: + mov w0, w9 + bl FtlBbmIsBadBlock + cbnz w0, .L2049 + umull x2, w21, w6 + ldr x0, [x27, 432] + add w8, w24, w8, lsl 10 + add x0, x0, x2 + str w8, [x0, 4] + ldr x1, [x27, 432] + ldr x0, [x27, 3640] + add x1, x1, x2 + ldr x2, [x27, 3648] + str x0, [x1, 8] + ldrh w0, [x20, 2556] + mul w0, w0, w21 + add w21, w21, 1 + and w21, w21, 65535 + sdiv w0, w0, w7 + add x0, x2, w0, sxtw 2 + str x0, [x1, 16] +.L2049: + add w5, w5, 1 + and w5, w5, 65535 + b .L2047 +.L2058: + mov w19, 0 + b .L2035 + .size FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock + .align 2 + .global FtlBbmTblFlush + .type FtlBbmTblFlush, %function +FtlBbmTblFlush: + stp x29, x30, [sp, -96]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + stp x21, x22, [sp, 32] + adrp x22, .LANCHOR2 + add x19, x22, :lo12:.LANCHOR2 + stp x23, x24, [sp, 48] + stp x25, x26, [sp, 64] + stp x27, x28, [sp, 80] + ldr w0, [x19, 424] + cbnz w0, .L2082 + adrp x20, .LANCHOR4 + adrp x23, .LANCHOR0 + add x25, x20, :lo12:.LANCHOR4 + add x21, x23, :lo12:.LANCHOR0 + ldr x2, [x19, 3656] + mov w1, 0 + ldr x0, [x19, 3608] + add x26, x21, 2656 + str x2, [x25, 1728] + mov w24, 0 + ldrh w2, [x21, 2554] + str x0, [x25, 1720] + bl ftl_memset +.L2083: + ldrh w0, [x21, 2494] + cmp w24, w0 + blt .L2084 + add x20, x20, :lo12:.LANCHOR4 + add x19, x21, 2624 + mov w2, 16 + mov w1, 255 + adrp x26, .LC125 + add x23, x23, :lo12:.LANCHOR0 + ldr x28, [x20, 1728] + add x26, x26, :lo12:.LC125 + mov w24, 0 + mov x0, x28 + bl ftl_memset + mov w0, -3887 + strh w0, [x28] + ldr w0, [x19, 8] + str w0, [x28, 4] + ldrh w0, [x21, 2624] + strh w0, [x28, 2] + ldrh w0, [x19, 4] + strh w0, [x28, 8] + ldrh w0, [x19, 6] + strh w0, [x28, 10] + ldr w0, [x21, 2468] + mov w21, 0 + strh w0, [x28, 12] +.L2085: + add x25, x22, :lo12:.LANCHOR2 + ldrh w1, [x19] + ldrh w2, [x19, 2] + ldrh w3, [x19, 4] + ldr x0, [x25, 3608] + str x0, [x20, 1720] + ldr x0, [x25, 3656] + str x0, [x20, 1728] + orr w0, w2, w1, lsl 10 + str wzr, [x20, 1712] + ldrh w4, [x28, 10] + str w0, [x20, 1716] + mov x0, x26 + bl printk + ldrh w0, [x23, 2546] + ldrh w1, [x19, 2] + sub w0, w0, #1 + cmp w1, w0 + blt .L2086 + ldr w0, [x19, 8] + mov w2, 1 + ldrh w1, [x19] + add w0, w0, 1 + str w0, [x19, 8] + str w0, [x28, 4] + strh w1, [x28, 8] + ldrh w0, [x19, 4] + strh w1, [x19, 4] + ldr x1, [x25, 432] + strh w0, [x19] + lsl w0, w0, 10 + str w0, [x20, 1716] + strh wzr, [x19, 2] + str w0, [x1, 4] + mov w1, w2 + ldr x0, [x25, 432] + bl FlashEraseBlocks +.L2086: + add x25, x20, 1712 + mov w3, 1 + mov x0, x25 + mov w2, w3 + mov w1, w3 + bl FlashProgPages + ldrh w0, [x19, 2] + add w0, w0, 1 + strh w0, [x19, 2] + ldr w0, [x20, 1712] + cmn w0, #1 + bne .L2087 + ldr w1, [x20, 1716] + add w21, w21, 1 + adrp x0, .LC126 + and w21, w21, 65535 + add x0, x0, :lo12:.LC126 + bl printk + cmp w21, 3 + bls .L2085 + ldr w1, [x20, 1716] + add x22, x22, :lo12:.LANCHOR2 + mov w2, w21 + adrp x0, .LC127 + add x0, x0, :lo12:.LC127 + bl printk + mov w0, 1 + str w0, [x22, 424] +.L2082: + mov w0, 0 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 96 + ret +.L2084: + ldrh w2, [x19, 3784] + ldr x1, [x26], 8 + ldr x0, [x25, 1720] + mul w3, w2, w24 + lsl w2, w2, 2 + add w24, w24, 1 + add x0, x0, w3, sxtw 2 + bl ftl_memcpy + b .L2083 +.L2090: + mov w24, 1 + b .L2085 +.L2087: + add w24, w24, 1 + cmp w24, 1 + ble .L2090 + cmp w0, 256 + bne .L2082 + b .L2085 + .size FtlBbmTblFlush, .-FtlBbmTblFlush + .align 2 + .global allocate_data_superblock + .type allocate_data_superblock, %function +allocate_data_superblock: + stp x29, x30, [sp, -128]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + stp x21, x22, [sp, 32] + adrp x22, .LANCHOR2 + add x19, x22, :lo12:.LANCHOR2 + stp x23, x24, [sp, 48] + stp x25, x26, [sp, 64] + stp x27, x28, [sp, 80] + ldr w1, [x19, 424] + cbnz w1, .L2096 + adrp x23, .LANCHOR0 + mov x20, x0 + add x24, x19, 656 + add x21, x23, :lo12:.LANCHOR0 +.L2097: + cmp x20, x24 + bne .L2098 + ldrh w2, [x19, 552] + ldr w3, [x19, 1376] + lsr w0, w2, 1 + add w4, w0, 1 + mul w1, w2, w3 + add w1, w4, w1, lsr 2 + ldr w4, [x21, 2372] + and w1, w1, 65535 + cbz w4, .L2099 + ldr w4, [x19, 776] + cmp w4, 39 + bhi .L2099 + cmp w4, 2 + bls .L2126 + tbz x2, 0, .L2122 + cbz w3, .L2126 +.L2122: + mov w1, w0 + b .L2099 +.L2098: + ldrb w0, [x20, 8] + cmp w0, 1 + bne .L2126 + ldrh w0, [x21, 2492] + cmp w0, 1 + beq .L2126 + ldrb w0, [x21, 204] + cbnz w0, .L2126 + ldr w2, [x21, 2372] + ldrh w0, [x19, 552] + lsr w1, w0, 3 + cbz w2, .L2099 + ldr w2, [x19, 776] + cmp w2, 1 + bhi .L2099 + mov w1, 7 + mul w1, w0, w1 + lsr w1, w1, 3 +.L2099: + cbz w1, .L2100 + sub w1, w1, #1 + and w1, w1, 65535 +.L2100: + ldrb w2, [x20, 8] + add x0, x19, 544 + bl List_pop_index_node + and w27, w0, 65535 + ldrh w0, [x19, 552] + sub w0, w0, #1 + strh w0, [x19, 552] + ldrh w0, [x21, 2480] + cmp w0, w27 + bls .L2097 + ldr x0, [x19, 520] + ubfiz x26, x27, 1, 16 + ldrh w25, [x0, x26] + cbnz w25, .L2097 + strh w27, [x20] + mov x0, x20 + bl make_superblock + ldrb w0, [x20, 7] + cbz w0, .L2143 + add x28, x20, 16 + ldrh w5, [x21, 2472] + mov x3, x28 + mov x0, 0 + mov x4, 56 + mov w6, 65535 +.L2103: + cmp w5, w0, uxth + bhi .L2105 + ldr w0, [x21, 2372] + cbz w0, .L2106 + add x0, x19, 560 + cmp x20, x0 + bne .L2106 + ldr x0, [x19, 440] + ldrh w0, [x0, x26] + cmp w0, 40 + bls .L2106 + strb wzr, [x20, 8] +.L2106: + ldrb w0, [x20, 8] + ldr x1, [x19, 440] + cbnz w0, .L2107 + ldrh w0, [x1, x26] + cbz w0, .L2108 + ldrh w2, [x21, 2536] + add w0, w0, w2 +.L2144: + strh w0, [x1, x26] + mov w1, 0 + ldr w0, [x19, 760] + add w0, w0, 1 + str w0, [x19, 760] + mov w0, w27 + bl ftl_set_blk_mode +.L2110: + ldr x0, [x19, 440] + ldr w1, [x19, 772] + ldrh w0, [x0, x26] + cmp w0, w1 + bls .L2111 + str w0, [x19, 772] +.L2111: + ldr w2, [x19, 760] + ldr w1, [x19, 764] + ldrh w0, [x21, 2536] + madd w0, w0, w2, w1 + ldrh w1, [x21, 2480] + mov w2, 56 + umull x2, w25, w2 + udiv w0, w0, w1 + ldr x1, [x19, 3696] + str w0, [x19, 768] + ldr w0, [x1, 16] + add w0, w0, 1 + str w0, [x1, 16] + mov x0, 0 +.L2112: + cmp x2, x0 + bne .L2113 + ldrb w0, [x21, 204] + cbz w0, .L2114 + ldrb w0, [x20, 8] + mov w2, w25 + cmp w0, 1 + bne .L2115 + mov w1, 0 +.L2145: + ldr x0, [x19, 432] + bl FlashEraseBlocks +.L2114: + ldrb w1, [x20, 8] + mov w2, w25 + ldr x0, [x19, 432] + bl FlashEraseBlocks + mov x1, 0 + mov w2, 0 + mov x4, 56 +.L2116: + cmp w25, w1, uxth + bhi .L2118 + cmp w2, 0 + ble .L2119 + mov w0, w27 + bl update_multiplier_value + bl FtlBbmTblFlush +.L2119: + ldrb w0, [x20, 7] + cbnz w0, .L2120 +.L2143: + ldr x0, [x19, 520] + mov w1, -1 + strh w1, [x0, x26] + b .L2097 +.L2126: + mov w1, 0 + b .L2100 +.L2105: + ldr x1, [x19, 432] + madd x2, x0, x4, x1 + stp xzr, xzr, [x2, 8] + ldrh w2, [x3] + cmp w2, w6 + beq .L2104 + umull x7, w25, w4 + add w25, w25, 1 + and w25, w25, 65535 + lsl w2, w2, 10 + add x1, x1, x7 + str w2, [x1, 4] +.L2104: + add x0, x0, 1 + add x3, x3, 2 + b .L2103 +.L2108: + mov w0, 2 + b .L2144 +.L2107: + ldrh w0, [x1, x26] + add w0, w0, 1 + strh w0, [x1, x26] + ldr w0, [x19, 764] + add w0, w0, 1 + str w0, [x19, 764] + mov w0, w27 + bl ftl_set_blk_mode.part.9 + b .L2110 +.L2113: + ldr x1, [x19, 432] + add x1, x1, x0 + add x0, x0, 56 + ldr w3, [x1, 4] + and w3, w3, -1024 + str w3, [x1, 4] + b .L2112 +.L2115: + mov w1, 1 + b .L2145 +.L2118: + mul x0, x1, x4 + ldr x3, [x19, 432] + add x5, x3, x0 + ldr w3, [x3, x0] + cmn w3, #1 + bne .L2117 + add w2, w2, 1 + ldr w0, [x5, 4] + stp x4, x1, [x29, 104] + stp w3, w2, [x29, 120] + lsr w0, w0, 10 + bl FtlBbmMapBadBlock + ldp w3, w2, [x29, 120] + strh w3, [x28] + ldp x4, x1, [x29, 104] + ldrb w0, [x20, 7] + sub w0, w0, #1 + strb w0, [x20, 7] +.L2117: + add x1, x1, 1 + add x28, x28, 2 + b .L2116 +.L2120: + add x23, x23, :lo12:.LANCHOR0 + add x22, x22, :lo12:.LANCHOR2 + strh wzr, [x20, 2] + strb wzr, [x20, 6] + ldrh w1, [x23, 2544] + strh w27, [x20] + mul w0, w0, w1 + ldr w1, [x22, 752] + str w1, [x20, 12] + and w0, w0, 65535 + add w1, w1, 1 + strh w0, [x20, 4] + str w1, [x22, 752] + ldr x1, [x22, 520] + ldrh w2, [x20] + strh w0, [x1, x2, lsl 1] +.L2096: + ldp x19, x20, [sp, 16] + mov w0, 0 + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 128 + ret + .size allocate_data_superblock, .-allocate_data_superblock + .align 2 + .global FtlGcFreeBadSuperBlk + .type FtlGcFreeBadSuperBlk, %function +FtlGcFreeBadSuperBlk: + stp x29, x30, [sp, -96]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x20, .LANCHOR2 + add x20, x20, :lo12:.LANCHOR2 + stp x23, x24, [sp, 48] + and w23, w0, 65535 + stp x21, x22, [sp, 32] + stp x25, x26, [sp, 64] + ldrh w0, [x20, 1456] + str x27, [sp, 80] + cbz w0, .L2147 + adrp x22, .LANCHOR0 + add x24, x20, 1464 + add x22, x22, :lo12:.LANCHOR0 + mov w21, 0 +.L2148: + ldrh w0, [x22, 2472] + cmp w0, w21 + bhi .L2154 + bl FtlGcReFreshBadBlk +.L2147: + mov w0, 0 + ldr x27, [sp, 80] + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x29, x30, [sp], 96 + ret +.L2154: + add x0, x22, 2504 + mov w1, w23 + adrp x26, .LC128 + add x26, x26, :lo12:.LC128 + mov w19, 0 + ldrb w0, [x0, w21, sxtw] + bl V2P_block + and w25, w0, 65535 +.L2149: + ldrh w0, [x20, 1456] + cmp w0, w19 + bhi .L2153 + add w21, w21, 1 + and w21, w21, 65535 + b .L2148 +.L2153: + ldrh w0, [x24, w19, sxtw 1] + add w27, w19, 1 + cmp w0, w25 + bne .L2150 + mov w1, w25 + mov x0, x26 + bl printk + mov w0, w25 + bl FtlBbmMapBadBlock + bl FtlBbmTblFlush + ldrh w0, [x20, 1456] + mov w1, w27 +.L2151: + cmp w19, w0 + bcc .L2152 + sub w0, w0, #1 + strh w0, [x20, 1456] +.L2150: + and w19, w27, 65535 + b .L2149 +.L2152: + sub w2, w1, #1 + ldrh w3, [x24, w1, sxtw 1] + add w19, w19, 1 + add w1, w1, 1 + and w19, w19, 65535 + strh w3, [x24, w2, sxtw 1] + b .L2151 + .size FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk + .align 2 + .global update_vpc_list + .type update_vpc_list, %function +update_vpc_list: + and w13, w0, 65535 + adrp x8, .LANCHOR2 + add x0, x8, :lo12:.LANCHOR2 + stp x29, x30, [sp, -16]! + ubfiz x1, x13, 1, 16 + add x29, sp, 0 + ldr x2, [x0, 520] + ldrh w1, [x2, x1] + cbnz w1, .L2160 + ldrh w1, [x0, 800] + cmp w1, w13 + bne .L2161 + mov w1, -1 + strh w1, [x0, 800] +.L2162: + add x8, x8, :lo12:.LANCHOR2 + mov w1, w13 + add x0, x8, 512 + bl List_remove_node + ldrh w0, [x8, 536] + sub w0, w0, #1 + strh w0, [x8, 536] + mov w0, w13 + bl free_data_superblock + mov w0, w13 + bl FtlGcFreeBadSuperBlk + mov w0, 1 +.L2159: + ldp x29, x30, [sp], 16 + ret +.L2161: + ldrh w1, [x0, 560] + cmp w1, w13 + beq .L2166 + ldrh w1, [x0, 608] + cmp w1, w13 + beq .L2166 + ldrh w0, [x0, 656] + cmp w0, w13 + bne .L2162 +.L2166: + mov w0, 0 + b .L2159 +.L2160: + mov w0, w13 + bl List_update_data_list + b .L2166 + .size update_vpc_list, .-update_vpc_list + .align 2 + .global decrement_vpc_count + .type decrement_vpc_count, %function +decrement_vpc_count: + stp x29, x30, [sp, -48]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + and w19, w0, 65535 + stp x21, x22, [sp, 32] + mov w0, 65535 + adrp x20, .LANCHOR2 + cmp w19, w0 + beq .L2169 + add x21, x20, :lo12:.LANCHOR2 + ubfiz x22, x19, 1, 16 + ldr x1, [x21, 520] + ldrh w0, [x1, x22] + cbnz w0, .L2170 + mov w1, w19 + mov w2, 0 + adrp x0, .LC129 + add x0, x0, :lo12:.LC129 + bl printk + ldr x0, [x21, 520] + add x6, x21, 544 + mov w1, 32 + strh w1, [x0, x22] + mov w1, w19 + mov x0, x6 + bl test_node_in_list + cbz w0, .L2171 + mov w1, w19 + mov x0, x6 + bl List_remove_node + ldrh w0, [x21, 552] + sub w0, w0, #1 + strh w0, [x21, 552] + mov w0, w19 + bl INSERT_DATA_LIST + ldr x0, [x21, 520] + mov w1, w19 + ldrh w2, [x0, x22] + adrp x0, .LC130 + add x0, x0, :lo12:.LC130 + bl printk +.L2171: + mov w0, w19 + bl FtlGcRefreshBlock +.L2174: + mov w0, 0 + b .L2168 +.L2170: + sub w0, w0, #1 + strh w0, [x1, x22] +.L2169: + add x20, x20, :lo12:.LANCHOR2 + mov w1, 65535 + ldrh w0, [x20, 3872] + cmp w0, w1 + bne .L2173 + strh w19, [x20, 3872] + b .L2174 +.L2173: + cmp w19, w0 + beq .L2174 + bl update_vpc_list + cmp w0, 0 + cset w0, ne + strh w19, [x20, 3872] +.L2168: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x29, x30, [sp], 48 + ret + .size decrement_vpc_count, .-decrement_vpc_count + .align 2 + .global FtlSlcSuperblockCheck + .type FtlSlcSuperblockCheck, %function +FtlSlcSuperblockCheck: + ldrh w1, [x0, 4] + cbz w1, .L2191 + ldrh w2, [x0] + mov w1, 65535 + cmp w2, w1 + beq .L2191 + stp x29, x30, [sp, -48]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + mov x19, x0 + stp x21, x22, [sp, 32] + adrp x21, .LANCHOR2 + add x21, x21, :lo12:.LANCHOR2 + adrp x20, .LANCHOR0 + ldrb w0, [x0, 6] + add x22, x20, :lo12:.LANCHOR0 + add x21, x21, 1500 + add x0, x0, 8 + ldrh w1, [x19, x0, lsl 1] +.L2183: + mov w0, 65535 + cmp w1, w0 + beq .L2185 + ldrb w1, [x19, 8] + cmp w1, 1 + bne .L2186 + ldrb w2, [x22, 204] + cbnz w2, .L2186 + ldrh w2, [x19, 2] + ldrh w2, [x21, x2, lsl 1] + cmp w2, w0 + bne .L2186 + ldrh w0, [x19, 4] + sub w0, w0, #1 + strh w0, [x19, 4] + ldrh w0, [x19] + bl decrement_vpc_count + ldrh w0, [x19, 4] + cbnz w0, .L2185 + ldrh w0, [x19, 2] + add w0, w0, 1 +.L2194: + strh w0, [x19, 2] + strb wzr, [x19, 6] +.L2179: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x29, x30, [sp], 48 + ret +.L2185: + ldrb w0, [x19, 6] + ldrh w1, [x22, 2472] + add w0, w0, 1 + and w0, w0, 255 + strb w0, [x19, 6] + cmp w1, w0 + bne .L2184 + ldrh w0, [x19, 2] + strb wzr, [x19, 6] + add w0, w0, 1 + strh w0, [x19, 2] +.L2184: + ldrb w0, [x19, 6] + add x0, x0, 8 + ldrh w1, [x19, x0, lsl 1] + b .L2183 +.L2186: + add x0, x20, :lo12:.LANCHOR0 + ldrb w2, [x0, 204] + cbz w2, .L2179 + cmp w1, 1 + bne .L2179 + ldrh w2, [x19, 2] + ldrh w1, [x0, 2546] + cmp w2, w1 + bcc .L2179 + ldrh w1, [x19] + adrp x2, .LANCHOR2+520 + ldrh w4, [x19, 4] + ldr x3, [x2, #:lo12:.LANCHOR2+520] + lsl x1, x1, 1 + ldrh w2, [x3, x1] + sub w2, w2, w4 + strh w2, [x3, x1] + strh wzr, [x19, 4] + ldrh w0, [x0, 2544] + b .L2194 +.L2191: + ret + .size FtlSlcSuperblockCheck, .-FtlSlcSuperblockCheck + .align 2 + .global get_new_active_ppa + .type get_new_active_ppa, %function +get_new_active_ppa: + stp x29, x30, [sp, -64]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + mov x19, x0 + stp x21, x22, [sp, 32] + adrp x21, .LANCHOR2 + str x23, [sp, 48] + add x21, x21, :lo12:.LANCHOR2 + strb wzr, [x0, 10] + adrp x20, .LANCHOR0 + ldrb w0, [x0, 6] + add x21, x21, 1500 + add x23, x20, :lo12:.LANCHOR0 + add x0, x0, 8 + ldrh w0, [x19, x0, lsl 1] +.L2196: + mov w2, 65535 + cmp w0, w2 + beq .L2197 + ldrb w1, [x19, 8] + ldrh w22, [x19, 2] + cmp w1, 1 + ldrh w1, [x19, 4] + bne .L2199 + ldrb w3, [x23, 204] + cbnz w3, .L2199 + ldrh w3, [x21, w22, sxtw 1] + cmp w3, w2 + bne .L2199 + ldrh w0, [x19] + sub w1, w1, #1 + strh w1, [x19, 4] + bl decrement_vpc_count +.L2197: + ldrb w0, [x19, 6] + ldrh w1, [x23, 2472] + add w0, w0, 1 + and w0, w0, 255 + strb w0, [x19, 6] + cmp w1, w0 + bne .L2198 + ldrh w0, [x19, 2] + strb wzr, [x19, 6] + add w0, w0, 1 + strh w0, [x19, 2] +.L2198: + ldrb w0, [x19, 6] + add x0, x0, 8 + ldrh w0, [x19, x0, lsl 1] + b .L2196 +.L2199: + adrp x21, .LANCHOR2 + add x21, x21, :lo12:.LANCHOR2 + orr w22, w22, w0, lsl 10 + add x20, x20, :lo12:.LANCHOR0 + add x21, x21, 1500 + sub w1, w1, #1 + strh w1, [x19, 4] +.L2200: + ldrb w0, [x19, 6] + mov w1, 65535 + ldrh w3, [x20, 2472] +.L2202: + add w0, w0, 1 + and w0, w0, 255 + cmp w0, w3 + bne .L2201 + ldrh w0, [x19, 2] + add w0, w0, 1 + strh w0, [x19, 2] + mov w0, 0 +.L2201: + add x2, x19, w0, sxtw 1 + ldrh w2, [x2, 16] + cmp w2, w1 + beq .L2202 + strb w0, [x19, 6] + ldrb w0, [x19, 8] + cmp w0, 1 + bne .L2195 + ldrb w2, [x20, 204] + ldrh w0, [x19, 2] + cbnz w2, .L2204 + ldrh w0, [x21, w0, sxtw 1] + cmp w0, w1 + bne .L2195 + ldrh w0, [x19, 4] + cbz w0, .L2195 + sub w0, w0, #1 + strh w0, [x19, 4] + ldrh w0, [x19] + bl decrement_vpc_count + b .L2200 +.L2204: + ldrh w1, [x20, 2546] + cmp w0, w1 + bcc .L2195 + ldrh w0, [x19] + adrp x1, .LANCHOR2+520 + ldrh w3, [x19, 4] + ldr x2, [x1, #:lo12:.LANCHOR2+520] + lsl x0, x0, 1 + ldrh w1, [x2, x0] + sub w1, w1, w3 + strh w1, [x2, x0] + strh wzr, [x19, 4] + ldrh w0, [x20, 2544] + strh w0, [x19, 2] + strb wzr, [x19, 6] +.L2195: + mov w0, w22 + ldr x23, [sp, 48] + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x29, x30, [sp], 64 + ret + .size get_new_active_ppa, .-get_new_active_ppa + .align 2 + .global FtlVpcTblFlush + .type FtlVpcTblFlush, %function +FtlVpcTblFlush: + stp x29, x30, [sp, -96]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + stp x23, x24, [sp, 48] + adrp x23, .LANCHOR2 + add x19, x23, :lo12:.LANCHOR2 + stp x21, x22, [sp, 32] + stp x25, x26, [sp, 64] + stp x27, x28, [sp, 80] + ldr w0, [x19, 424] + cbnz w0, .L2213 + ldr x21, [x19, 3656] + adrp x24, .LANCHOR4 + add x22, x24, :lo12:.LANCHOR4 + ldr x0, [x19, 3608] + ldrh w1, [x19, 784] + add x20, x19, 456 + adrp x26, .LANCHOR0 + add x25, x26, :lo12:.LANCHOR0 + str x0, [x22, 1720] + add x22, x22, 1712 + str x21, [x22, 16] + strh w1, [x21, 2] + mov w1, -3932 + strh w1, [x21] + str wzr, [x21, 12] + ldr w1, [x19, 792] + stp w1, wzr, [x21, 4] + mov w1, 19539 + movk w1, 0x4654, lsl 16 + str w1, [x19, 456] + mov w1, 99 + ldrb w2, [x19, 566] + movk w1, 0x5000, lsl 16 + str w1, [x20, 4] + ldrh w1, [x19, 560] + strh w1, [x20, 14] + ldrh w1, [x19, 562] + ldrh w0, [x19, 790] + strh w0, [x20, 8] + orr w1, w2, w1, lsl 6 + strh w1, [x20, 16] + ldrh w1, [x19, 608] + strh w1, [x20, 18] + ldrb w2, [x19, 614] + ldrh w1, [x19, 610] + ldrh w0, [x25, 2494] + strb w0, [x20, 10] + ldrb w0, [x19, 568] + orr w1, w2, w1, lsl 6 + strb w0, [x20, 11] + ldrb w0, [x19, 616] + strb w0, [x20, 12] + strh w1, [x20, 20] + ldrh w1, [x19, 656] + strh w1, [x20, 22] + ldrb w0, [x19, 664] + strb w0, [x20, 13] + ldr w0, [x19, 760] + str w0, [x20, 32] + ldr w0, [x19, 752] + ldrb w2, [x19, 662] + str w0, [x20, 40] + ldrh w1, [x19, 658] + ldr w0, [x19, 756] + str w0, [x20, 36] + ldrh w0, [x19, 1448] + orr w1, w2, w1, lsl 6 + strh w0, [x20, 44] + ldrh w0, [x19, 1450] + strh w0, [x20, 46] + ldrh w2, [x25, 2554] + ldr x0, [x22, 8] + strh w1, [x20, 24] + mov w1, 255 + bl ftl_memset + ldr x0, [x22, 8] + mov x1, x20 + mov w2, 48 + mov x20, x26 + bl ftl_memcpy + ldr x1, [x19, 520] + ldrh w2, [x25, 2480] + ldr x0, [x22, 8] + lsl w2, w2, 1 + add x0, x0, 48 + bl ftl_memcpy + ldrh w0, [x25, 2480] + ldr x3, [x22, 8] + ldr x1, [x25, 64] + lsr w2, w0, 3 + ubfiz x0, x0, 1, 16 + add x0, x0, 51 + add w2, w2, 4 + and x0, x0, -4 + add x0, x3, x0 + bl ftl_memcpy + ldrh w0, [x25, 2588] + cbz w0, .L2214 + ldrh w0, [x25, 2480] + ldr x3, [x22, 8] + ldrh w2, [x25, 2580] + lsr w1, w0, 3 + add w0, w1, w0, lsl 1 + ldr x1, [x19, 3752] + add w0, w0, 52 + lsl w2, w2, 2 + and x0, x0, 65532 + add x0, x3, x0 + bl ftl_memcpy +.L2214: + add x27, x23, :lo12:.LANCHOR2 + add x26, x24, :lo12:.LANCHOR4 + add x19, x27, 784 + add x20, x20, :lo12:.LANCHOR0 + mov w22, 0 + mov w25, 65535 + mov w0, 0 + bl FtlUpdateVaildLpn +.L2215: + ldrh w2, [x19, 2] + ldrh w1, [x19] + ldr x0, [x27, 3608] + str x0, [x26, 1720] + ldr x0, [x27, 3656] + str x0, [x26, 1728] + orr w0, w2, w1, lsl 10 + str w0, [x26, 1716] + ldrh w0, [x20, 2546] + sub w0, w0, #1 + cmp w2, w0 + blt .L2216 + ldrh w25, [x19, 4] + strh wzr, [x19, 2] + strh w1, [x19, 4] + bl FtlFreeSysBlkQueueOut + ldr w1, [x27, 752] + str w1, [x19, 8] + add w2, w1, 1 + str w2, [x27, 752] + ubfiz w2, w0, 10, 16 + str w2, [x26, 1716] + strh w0, [x19] + strh w0, [x21, 2] + str w1, [x21, 4] +.L2216: + ldrb w0, [x20, 72] + cbz w0, .L2217 + ldrh w1, [x20, 2554] + ldr x0, [x27, 3608] + bl js_hash + str w0, [x21, 12] +.L2217: + mov w3, 1 + add x0, x26, 1712 + mov w1, w3 + mov w2, w3 + bl FlashProgPages + ldrh w0, [x19, 2] + ldr w1, [x26, 1712] + add w0, w0, 1 + and w0, w0, 65535 + strh w0, [x19, 2] + cmn w1, #1 + bne .L2218 + cmp w0, 1 + bne .L2219 + ldrh w0, [x20, 2546] + sub w0, w0, #1 + strh w0, [x19, 2] +.L2219: + add w22, w22, 1 + and w22, w22, 65535 + cmp w22, 3 + bls .L2215 + add x24, x24, :lo12:.LANCHOR4 + add x23, x23, :lo12:.LANCHOR2 + mov w2, w22 + adrp x0, .LC131 + add x0, x0, :lo12:.LC131 + ldr w1, [x24, 1716] + bl printk + mov w0, 1 + str w0, [x23, 424] +.L2213: + mov w0, 0 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 96 + ret +.L2218: + cmp w0, 1 + beq .L2215 + cmp w1, 256 + beq .L2215 + mov w0, 65535 + cmp w25, w0 + beq .L2213 + mov w1, 1 + mov w0, w25 + bl FtlFreeSysBlkQueueIn + b .L2213 + .size FtlVpcTblFlush, .-FtlVpcTblFlush + .align 2 + .global FtlSuperblockPowerLostFix + .type FtlSuperblockPowerLostFix, %function +FtlSuperblockPowerLostFix: + stp x29, x30, [sp, -144]! + add x29, sp, 0 + stp x21, x22, [sp, 32] + adrp x21, .LANCHOR2 + add x1, x21, :lo12:.LANCHOR2 + stp x19, x20, [sp, 16] + stp x23, x24, [sp, 48] + str x25, [sp, 64] + ldr w25, [x1, 424] + cbnz w25, .L2235 + adrp x22, .LANCHOR0 + add x1, x22, :lo12:.LANCHOR0 + ldrb w1, [x1, 204] + cbz w1, .L2246 + ldrb w1, [x0, 8] + cmp w1, 1 + bne .L2246 + ldrh w24, [x0, 4] + mov w25, w1 +.L2237: + mov x19, x0 + mov w0, -1 + str w0, [x29, 112] + add x0, x21, :lo12:.LANCHOR2 + mov w2, 61589 + mov x20, x0 + ldr x23, [x0, 3656] + ldr x1, [x0, 3608] + stp x1, x23, [x29, 96] + mov w1, -3 + str w1, [x23, 8] + mov w1, -2 + str w1, [x23, 12] + ldrh w1, [x19] + strh w1, [x23, 2] + strh wzr, [x23] + ldr x1, [x0, 3608] + str w2, [x1] + mov w2, 22136 + movk w2, 0x1234, lsl 16 + ldr x1, [x0, 3608] + str w2, [x1, 4] +.L2238: + sub w24, w24, #1 + cmn w24, #1 + beq .L2241 + ldrh w0, [x19, 4] + cbnz w0, .L2239 +.L2241: + add x21, x21, :lo12:.LANCHOR2 + ldrh w0, [x19] + ldrh w3, [x19, 4] + add x22, x22, :lo12:.LANCHOR0 + ldr x2, [x21, 520] + lsl x0, x0, 1 + ldrh w1, [x2, x0] + sub w1, w1, w3 + strh w1, [x2, x0] + strb wzr, [x19, 6] + ldrh w0, [x22, 2544] + strh w0, [x19, 2] + strh wzr, [x19, 4] +.L2235: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldr x25, [sp, 64] + ldp x29, x30, [sp], 144 + ret +.L2246: + mov w24, 12 + b .L2237 +.L2239: + mov x0, x19 + bl get_new_active_ppa + str w0, [x29, 92] + cmn w0, #1 + beq .L2241 + ldr w0, [x20, 756] + mov w3, 0 + str w0, [x23, 4] + mov w2, w25 + add w0, w0, 1 + mov w1, 1 + cmn w0, #1 + csel w0, w0, wzr, ne + str w0, [x20, 756] + add x0, x29, 88 + bl FlashProgPages + ldrh w0, [x19] + bl decrement_vpc_count + b .L2238 + .size FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix + .align 2 + .global ftl_map_blk_gc + .type ftl_map_blk_gc, %function +ftl_map_blk_gc: + stp x29, x30, [sp, -112]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + mov x19, x0 + stp x21, x22, [sp, 32] + adrp x22, .LANCHOR0 + stp x23, x24, [sp, 48] + stp x25, x26, [sp, 64] + stp x27, x28, [sp, 80] + ldr x20, [x0, 16] + ldr x26, [x0, 40] + bl ftl_free_no_use_map_blk + ldrh w1, [x19, 10] + ldrh w2, [x19, 8] + sub w1, w1, #4 + cmp w2, w1 + blt .L2252 + ubfiz x0, x0, 1, 16 + ldrh w25, [x20, x0] + cbz w25, .L2252 + ldr w1, [x19, 52] + cbnz w1, .L2252 + mov w1, 1 + str w1, [x19, 52] + strh wzr, [x20, x0] + ldrh w0, [x19, 8] + ldrh w1, [x19, 2] + sub w0, w0, #1 + strh w0, [x19, 8] + add x0, x22, :lo12:.LANCHOR0 + ldrh w0, [x0, 2546] + cmp w1, w0 + bcc .L2253 + mov x0, x19 + bl ftl_map_blk_alloc_new_blk +.L2253: + adrp x23, .LANCHOR4 + add x21, x23, :lo12:.LANCHOR4 + adrp x24, .LANCHOR2 + add x21, x21, 1712 + add x28, x24, :lo12:.LANCHOR2 + mov w20, 0 +.L2254: + ldrh w0, [x19, 6] + cmp w0, w20 + bhi .L2259 + mov w1, 1 + mov w0, w25 + bl FtlFreeSysBlkQueueIn + str wzr, [x19, 52] +.L2252: + add x22, x22, :lo12:.LANCHOR0 + ldrh w1, [x19, 2] + ldrh w0, [x22, 2546] + cmp w1, w0 + bcc .L2257 + mov x0, x19 + bl ftl_map_blk_alloc_new_blk + b .L2257 +.L2259: + ubfiz x0, x20, 2, 16 + add x3, x26, x0 + ldr w1, [x26, x0] + cmp w25, w1, lsr 10 + bne .L2255 + ldr x1, [x28, 3616] + mov w2, 1 + ldr x27, [x28, 3656] + stp x1, x27, [x21, 8] + mov w1, w2 + str x3, [x29, 104] + ldr w0, [x26, x0] + str w0, [x21, 4] + mov x0, x21 + bl FlashReadPages + ldr w0, [x21] + ldr x3, [x29, 104] + cmn w0, #1 + bne .L2256 +.L2258: + add x23, x23, :lo12:.LANCHOR4 + str wzr, [x3] + add x24, x24, :lo12:.LANCHOR2 + adrp x0, .LC132 + ldrh w2, [x27, 8] + add x0, x0, :lo12:.LC132 + ldr w1, [x23, 1716] + bl printk + mov w0, 1 + str w0, [x24, 424] +.L2257: + ldp x19, x20, [sp, 16] + mov w0, 0 + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 112 + ret +.L2256: + ldrh w0, [x27, 8] + cmp w0, w20 + bne .L2258 + ldrh w1, [x27] + ldrh w0, [x19, 4] + cmp w1, w0 + bne .L2258 + ldr x2, [x21, 8] + mov w1, w20 + mov x0, x19 + bl FtlMapWritePage +.L2255: + add w20, w20, 1 + and w20, w20, 65535 + b .L2254 + .size ftl_map_blk_gc, .-ftl_map_blk_gc + .align 2 + .global Ftl_write_map_blk_to_last_page + .type Ftl_write_map_blk_to_last_page, %function +Ftl_write_map_blk_to_last_page: + stp x29, x30, [sp, -80]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x20, .LANCHOR2 + add x20, x20, :lo12:.LANCHOR2 + stp x21, x22, [sp, 32] + stp x23, x24, [sp, 48] + str x25, [sp, 64] + ldr w1, [x20, 424] + cbnz w1, .L2265 + mov x19, x0 + ldrh w0, [x0] + mov w1, 65535 + cmp w0, w1 + ldr x21, [x19, 16] + bne .L2266 + ldrh w0, [x19, 8] + add w0, w0, 1 + strh w0, [x19, 8] + bl FtlFreeSysBlkQueueOut + strh w0, [x21] + strh wzr, [x19, 2] + ldr w0, [x19, 48] + strh wzr, [x19] + add w0, w0, 1 + str w0, [x19, 48] +.L2265: + mov w0, 0 + ldr x25, [sp, 64] + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x29, x30, [sp], 80 + ret +.L2266: + ubfiz x0, x0, 1, 16 + ldrh w1, [x19, 2] + ldr x23, [x20, 3656] + adrp x22, .LANCHOR0 + ldr x25, [x19, 40] + ldrh w24, [x21, x0] + adrp x21, .LANCHOR4 + add x0, x21, :lo12:.LANCHOR4 + orr w1, w1, w24, lsl 10 + str w1, [x0, 1716] + ldr x1, [x20, 3608] + str x1, [x0, 1720] + str x23, [x0, 1728] + mov w1, 255 + ldr w0, [x19, 48] + str w0, [x23, 4] + mov w0, -1291 + strh w0, [x23, 8] + ldrh w0, [x19, 4] + strh w0, [x23] + add x0, x22, :lo12:.LANCHOR0 + strh w24, [x23, 2] + ldrh w2, [x0, 2546] + ldr x0, [x20, 3608] + lsl w2, w2, 3 + bl ftl_memset + mov w1, 0 + mov w0, 0 +.L2267: + ldrh w2, [x19, 6] + cmp w2, w0 + bhi .L2269 + add x22, x22, :lo12:.LANCHOR0 + ldrb w0, [x22, 72] + cbz w0, .L2270 + add x0, x21, :lo12:.LANCHOR4 + ldrh w1, [x22, 2554] + ldr x0, [x0, 1720] + bl js_hash + str w0, [x23, 12] +.L2270: + add x21, x21, :lo12:.LANCHOR4 + mov w2, 1 + mov w3, 0 + mov w1, w2 + add x0, x21, 1712 + bl FlashProgPages + ldrh w0, [x19, 2] + add w0, w0, 1 + strh w0, [x19, 2] + mov x0, x19 + bl ftl_map_blk_gc + b .L2265 +.L2269: + ubfiz x2, x0, 2, 16 + ldr w3, [x25, x2] + cmp w24, w3, lsr 10 + bne .L2268 + add w1, w1, 1 + ldr x4, [x20, 3608] + and w1, w1, 65535 + ubfiz x3, x1, 3, 16 + str w0, [x4, x3] + ldr w4, [x25, x2] + ldr x2, [x20, 3608] + add x2, x2, x3 + str w4, [x2, 4] +.L2268: + add w0, w0, 1 + and w0, w0, 65535 + b .L2267 + .size Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page + .align 2 + .global FtlMapWritePage + .type FtlMapWritePage, %function +FtlMapWritePage: + stp x29, x30, [sp, -112]! + add x29, sp, 0 + stp x23, x24, [sp, 48] + adrp x23, .LANCHOR2 + stp x25, x26, [sp, 64] + adrp x25, .LANCHOR4 + add x24, x25, :lo12:.LANCHOR4 + stp x21, x22, [sp, 32] + stp x27, x28, [sp, 80] + mov x22, x25 + stp x19, x20, [sp, 16] + mov w27, w1 + mov x19, x0 + mov x28, x2 + add x24, x24, 1712 + mov w21, 0 +.L2276: + add x1, x23, :lo12:.LANCHOR2 + adrp x20, .LANCHOR0 + ldr w0, [x1, 736] + add w0, w0, 1 + str w0, [x1, 736] + add x0, x20, :lo12:.LANCHOR0 + ldrh w1, [x19, 2] + ldrh w0, [x0, 2546] + sub w0, w0, #1 + cmp w1, w0 + bge .L2277 + ldrh w1, [x19] + mov w0, 65535 + cmp w1, w0 + bne .L2278 +.L2277: + mov x0, x19 + bl Ftl_write_map_blk_to_last_page +.L2278: + add x1, x23, :lo12:.LANCHOR2 + ldr w0, [x1, 424] + cbnz w0, .L2291 + ldrh w2, [x19] + add x3, x25, :lo12:.LANCHOR4 + ldr x0, [x19, 16] + add x3, x3, 1712 + ldrh w26, [x0, x2, lsl 1] + mov w2, 16 + ldrh w0, [x19, 2] + str x28, [x3, 8] + orr w0, w0, w26, lsl 10 + str w0, [x3, 4] + ldr x0, [x1, 3656] + mov w1, 0 + str x0, [x3, 16] + str x3, [x29, 104] + bl ftl_memset + ldr x3, [x29, 104] + ldr w0, [x19, 48] + ldr x6, [x3, 16] + strh w27, [x6, 8] + str w0, [x6, 4] + ldrh w0, [x19, 4] + strh w0, [x6] + add x0, x20, :lo12:.LANCHOR0 + strh w26, [x6, 2] + ldrb w1, [x0, 72] + cbz w1, .L2280 + ldrh w1, [x0, 2554] + ldr x0, [x3, 8] + bl js_hash + str w0, [x6, 12] +.L2280: + mov w3, 1 + mov x0, x24 + mov w1, w3 + mov w2, w3 + bl FlashProgPages + ldrh w0, [x19, 2] + add w0, w0, 1 + and w0, w0, 65535 + strh w0, [x19, 2] + ldr w1, [x24] + cmn w1, #1 + bne .L2281 + ldr w1, [x24, 4] + adrp x0, .LC133 + add x0, x0, :lo12:.LC133 + add w21, w21, 1 + and w21, w21, 65535 + bl printk + ldrh w0, [x19, 2] + cmp w0, 2 + bhi .L2282 + add x20, x20, :lo12:.LANCHOR0 + ldrh w0, [x20, 2546] + sub w0, w0, #1 + strh w0, [x19, 2] +.L2282: + cmp w21, 3 + bls .L2276 + add x22, x22, :lo12:.LANCHOR4 + add x23, x23, :lo12:.LANCHOR2 + mov w2, w21 + adrp x0, .LC134 + add x0, x0, :lo12:.LC134 + ldr w1, [x22, 1716] + bl printk + mov w0, 1 + str w0, [x23, 424] +.L2291: + ldp x19, x20, [sp, 16] + mov w0, 0 + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 112 + ret +.L2281: + cbz w1, .L2284 + strh w26, [x19, 60] + cmp w0, 1 + bne .L2285 +.L2286: + str wzr, [x19, 56] + b .L2276 +.L2285: + cmp w1, 256 +.L2299: + beq .L2286 + ldr w0, [x19, 56] + cbnz w0, .L2286 + add x22, x22, :lo12:.LANCHOR4 + ldr x0, [x19, 40] + ldr w1, [x22, 1716] + str w1, [x0, w27, uxtw 2] + b .L2291 +.L2284: + cmp w0, 1 + b .L2299 + .size FtlMapWritePage, .-FtlMapWritePage + .align 2 + .global flush_l2p_region + .type flush_l2p_region, %function +flush_l2p_region: + stp x29, x30, [sp, -32]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x19, .LANCHOR2 + add x19, x19, :lo12:.LANCHOR2 + ubfiz x20, x0, 4, 16 + ldr x0, [x19, 704] + add x1, x0, x20 + ldr x2, [x1, 8] + ldrh w1, [x0, x20] + add x0, x19, 3792 + bl FtlMapWritePage + ldr x0, [x19, 704] + add x0, x0, x20 + ldr w1, [x0, 4] + and w1, w1, 2147483647 + str w1, [x0, 4] + mov w0, 0 + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 32 + ret + .size flush_l2p_region, .-flush_l2p_region + .align 2 + .global FtlMapTblRecovery + .type FtlMapTblRecovery, %function +FtlMapTblRecovery: + stp x29, x30, [sp, -144]! + mov w1, 0 + add x29, sp, 0 + stp x19, x20, [sp, 16] + mov w19, 0 + stp x25, x26, [sp, 64] + stp x21, x22, [sp, 32] + mov x22, x0 + stp x23, x24, [sp, 48] + stp x27, x28, [sp, 80] + ldrh w24, [x0, 6] + ldr x21, [x0, 40] + ldr x23, [x0, 16] + ldr x0, [x0, 24] + lsl w2, w24, 2 + str x0, [x29, 128] + ldrh w0, [x22, 8] + str w0, [x29, 140] + mov x0, x21 + bl ftl_memset + stp wzr, wzr, [x22, 48] + adrp x0, .LANCHOR2 + add x2, x0, :lo12:.LANCHOR2 + adrp x1, .LANCHOR4 + add x4, x1, :lo12:.LANCHOR4 + stp x0, x1, [x29, 104] + add x4, x4, 1712 + ldr w0, [x29, 140] + ldr x5, [x2, 3608] + ldr x20, [x2, 3656] + sub w0, w0, #1 + str x5, [x4, 8] + mov w2, -1 + str x20, [x4, 16] + mov x25, x4 + str w0, [x29, 136] + adrp x0, .LANCHOR0 + add x26, x0, :lo12:.LANCHOR0 + strh w2, [x22] + strh w2, [x22, 2] + mov w2, 1 + str w2, [x22, 56] +.L2303: + ldr w0, [x29, 140] + cmp w19, w0 + bge .L2322 + ldr w0, [x29, 136] + sxtw x27, w19 + cmp w19, w0 + bne .L2304 + lsl x0, x27, 1 + mov w1, 1 + add x25, x23, x0 + mov w26, 0 + ldrh w0, [x23, x0] + bl FtlGetLastWrittenPage + sxth w23, w0 + add w0, w0, 1 + strh w0, [x22, 2] + ldr x0, [x29, 128] + add w23, w23, 1 + strh w19, [x22] + ldr w0, [x0, x27, lsl 2] + str w0, [x22, 48] + ldr x0, [x29, 112] + add x19, x0, :lo12:.LANCHOR4 + adrp x0, .LANCHOR0 + add x19, x19, 1712 + add x27, x0, :lo12:.LANCHOR0 +.L2305: + cmp w26, w23 + blt .L2308 +.L2322: + mov x0, x22 + bl ftl_free_no_use_map_blk + adrp x0, .LANCHOR0 + add x21, x0, :lo12:.LANCHOR0 + ldrh w1, [x22, 2] + ldrh w0, [x21, 2546] + cmp w1, w0 + bne .L2310 + mov x0, x22 + bl ftl_map_blk_alloc_new_blk +.L2310: + mov x0, x22 + bl ftl_map_blk_gc + mov x0, x22 + bl ftl_map_blk_gc + mov w0, 0 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 144 + ret +.L2308: + ldrh w0, [x25] + mov w2, 1 + mov w1, w2 + orr w0, w26, w0, lsl 10 + str w0, [x19, 4] + mov x0, x19 + bl FlashReadPages + ldrb w0, [x27, 72] + cbz w0, .L2306 + ldr x0, [x19, 16] + ldr w6, [x0, 12] + cbz w6, .L2306 + ldrh w1, [x27, 2554] + ldr x0, [x19, 8] + bl js_hash + cmp w6, w0 + beq .L2306 + mov w0, -1 + str w0, [x19] +.L2306: + ldr w0, [x19] + cmn w0, #1 + beq .L2307 + ldrh w0, [x20, 8] + cmp w24, w0 + bls .L2307 + ldrh w2, [x20] + ldrh w1, [x22, 4] + cmp w2, w1 + bne .L2307 + ubfiz x0, x0, 2, 16 + ldr w1, [x19, 4] + str w1, [x21, x0] +.L2307: + add w26, w26, 1 + sxth w26, w26 + b .L2305 +.L2304: + ldr x0, [x29, 104] + mov w2, 1 + add x28, x0, :lo12:.LANCHOR2 + ldr x0, [x28, 3608] + str x0, [x25, 8] + lsl x0, x27, 1 + add x1, x23, x0 + str x1, [x29, 120] + ldrh w1, [x26, 2546] + ldrh w0, [x23, x0] + sub w1, w1, #1 + orr w0, w1, w0, lsl 10 + mov w1, w2 + str w0, [x25, 4] + mov x0, x25 + bl FlashReadPages + ldr w0, [x25] + cmn w0, #1 + beq .L2324 + ldrh w1, [x20] + ldrh w0, [x22, 4] + cmp w1, w0 + bne .L2324 + ldrh w1, [x20, 8] + mov w0, 64245 + cmp w1, w0 + beq .L2312 +.L2324: + mov w27, 0 + mov w28, -1 +.L2313: + ldrh w0, [x26, 2546] + cmp w27, w0 + bge .L2320 + ldr x0, [x29, 120] + mov w2, 1 + mov w1, w2 + ldrh w0, [x0] + orr w0, w27, w0, lsl 10 + str w0, [x25, 4] + mov x0, x25 + bl FlashReadPages + ldrb w0, [x26, 72] + cbz w0, .L2317 + ldr x0, [x25, 16] + ldr w7, [x0, 12] + cbz w7, .L2317 + ldrh w1, [x26, 2554] + ldr x0, [x25, 8] + bl js_hash + cmp w7, w0 + beq .L2317 + str w28, [x25] +.L2317: + ldr w0, [x25] + cmn w0, #1 + beq .L2318 + ldrh w0, [x20, 8] + cmp w24, w0 + bls .L2318 + ldrh w2, [x20] + ldrh w1, [x22, 4] + cmp w2, w1 + bne .L2318 + ubfiz x0, x0, 2, 16 + ldr w1, [x25, 4] + str w1, [x21, x0] +.L2318: + add w5, w27, 1 + sxth w27, w5 + b .L2313 +.L2312: + mov w0, 0 +.L2314: + ldrh w1, [x26, 2546] + sub w1, w1, #1 + cmp w0, w1 + blt .L2316 +.L2320: + add w19, w19, 1 + sxth w19, w19 + b .L2303 +.L2316: + ldr x2, [x28, 3608] + sbfiz x5, x0, 3, 32 + ldrh w1, [x2, x5] + cmp w24, w1 + bls .L2315 + add x2, x2, x5 + ubfiz x1, x1, 2, 16 + ldr w2, [x2, 4] + str w2, [x21, x1] +.L2315: + add w0, w0, 1 + sxth w0, w0 + b .L2314 + .size FtlMapTblRecovery, .-FtlMapTblRecovery + .align 2 + .global FtlLoadVonderInfo + .type FtlLoadVonderInfo, %function +FtlLoadVonderInfo: + adrp x1, .LANCHOR0 + add x1, x1, :lo12:.LANCHOR0 + stp x29, x30, [sp, -16]! + adrp x0, .LANCHOR4 + add x0, x0, :lo12:.LANCHOR4 + add x0, x0, 1776 + add x29, sp, 0 + ldrh w2, [x1, 2564] + strh w2, [x0, 10] + mov w2, -3962 + strh w2, [x0, 4] + ldrh w2, [x1, 2590] + strh w2, [x0, 8] + ldrh w2, [x1, 2566] + ldr x1, [x1, 2592] + str x1, [x0, 16] + adrp x1, .LANCHOR2 + add x1, x1, :lo12:.LANCHOR2 + strh w2, [x0, 6] + ldr x2, [x1, 3736] + str x2, [x0, 24] + ldr x2, [x1, 3728] + ldr x1, [x1, 3744] + stp x2, x1, [x0, 32] + bl FtlMapTblRecovery + mov w0, 0 + ldp x29, x30, [sp], 16 + ret + .size FtlLoadVonderInfo, .-FtlLoadVonderInfo + .align 2 + .global FtlLoadMapInfo + .type FtlLoadMapInfo, %function +FtlLoadMapInfo: + stp x29, x30, [sp, -16]! + add x29, sp, 0 + bl FtlL2PDataInit + adrp x0, .LANCHOR2 + add x0, x0, :lo12:.LANCHOR2 + add x0, x0, 3792 + bl FtlMapTblRecovery + mov w0, 0 + ldp x29, x30, [sp], 16 + ret + .size FtlLoadMapInfo, .-FtlLoadMapInfo + .align 2 + .global FtlVendorPartWrite + .type FtlVendorPartWrite, %function +FtlVendorPartWrite: + stp x29, x30, [sp, -176]! + add x29, sp, 0 + stp x27, x28, [sp, 80] + mov w28, w0 + stp x23, x24, [sp, 48] + mov x27, x2 + adrp x23, .LANCHOR0 + add w2, w0, w1 + add x0, x23, :lo12:.LANCHOR0 + stp x21, x22, [sp, 32] + stp x19, x20, [sp, 16] + mov w21, w1 + stp x25, x26, [sp, 64] + ldrh w1, [x0, 2540] + cmp w2, w1 + bhi .L2356 + ldrh w22, [x0, 2552] + adrp x25, .LANCHOR2 + add x25, x25, :lo12:.LANCHOR2 + mov w24, 0 + mov x26, x25 + lsr w22, w28, w22 +.L2350: + cbnz w21, .L2355 +.L2348: + mov w0, w24 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 176 + ret +.L2355: + ldr x0, [x25, 3744] + ldr w2, [x0, w22, uxtw 2] + add x0, x23, :lo12:.LANCHOR0 + ldrh w1, [x0, 2550] + and w0, w21, 65535 + udiv w20, w28, w1 + msub w20, w20, w1, w28 + sub w19, w1, w20 + and w19, w19, 65535 + cmp w21, w19 + csel w19, w0, w19, cc + cbz w2, .L2352 + cmp w19, w1 + beq .L2352 + ldr x0, [x26, 3624] + str w2, [x29, 124] + mov w2, 1 + stp x0, xzr, [x29, 128] + mov w1, w2 + add x0, x29, 120 + bl FlashReadPages +.L2353: + lsl w3, w19, 9 + ldr x0, [x26, 3624] + lsl w20, w20, 9 + mov w2, w3 + asr w20, w20, 2 + mov x1, x27 + str w3, [x29, 108] + add x0, x0, w20, sxtw 2 + bl ftl_memcpy + sub w21, w21, w19 + ldr x2, [x26, 3624] + adrp x0, .LANCHOR4 + add x0, x0, :lo12:.LANCHOR4 + mov w1, w22 + add x0, x0, 1776 + add w28, w28, w19 + add w22, w22, 1 + bl FtlMapWritePage + cmn w0, #1 + ldr w3, [x29, 108] + csinv w24, w24, wzr, ne + add x27, x27, w3, sxtw + b .L2350 +.L2352: + add x0, x23, :lo12:.LANCHOR0 + mov w1, 0 + ldrh w2, [x0, 2554] + ldr x0, [x26, 3624] + bl ftl_memset + b .L2353 +.L2356: + mov w24, -1 + b .L2348 + .size FtlVendorPartWrite, .-FtlVendorPartWrite + .align 2 + .global Ftl_save_ext_data + .type Ftl_save_ext_data, %function +Ftl_save_ext_data: + adrp x0, .LANCHOR2 + add x0, x0, :lo12:.LANCHOR2 + mov w1, 19539 + movk w1, 0x4654, lsl 16 + ldr w3, [x0, 848] + cmp w3, w1 + bne .L2364 + stp x29, x30, [sp, -16]! + add x2, x0, 848 + mov w1, 99 + add x29, sp, 0 + movk w1, 0x5000, lsl 16 + str w1, [x2, 4] + ldr w1, [x0, 744] + str w1, [x2, 88] + ldr w1, [x0, 748] + str w1, [x2, 92] + ldr w1, [x0, 740] + str w1, [x2, 8] + ldr w1, [x0, 728] + str w1, [x2, 12] + ldr w1, [x0, 720] + str w1, [x2, 16] + ldr w1, [x0, 736] + str w1, [x2, 20] + ldr w1, [x0, 764] + str w1, [x2, 28] + ldr w1, [x0, 448] + str w1, [x2, 32] + ldr w1, [x0, 724] + str w1, [x2, 36] + ldr w1, [x0, 732] + str w1, [x2, 40] + ldr w1, [x0, 772] + str w1, [x2, 44] + ldr w1, [x0, 776] + str w1, [x2, 48] + ldr w1, [x0, 1360] + ldr w0, [x0, 3556] + stp w1, w0, [x2, 60] + mov w1, 1 + mov w0, 0 + bl FtlVendorPartWrite + ldp x29, x30, [sp], 16 + ret +.L2364: + ret + .size Ftl_save_ext_data, .-Ftl_save_ext_data + .align 2 + .global FtlEctTblFlush + .type FtlEctTblFlush, %function +FtlEctTblFlush: + adrp x1, .LANCHOR0+2372 + ldr w2, [x1, #:lo12:.LANCHOR0+2372] + adrp x1, .LANCHOR2 + cbz w2, .L2372 + add x2, x1, :lo12:.LANCHOR2 + mov w3, 4 + ldr w2, [x2, 776] + cmp w2, 39 + mov w2, 32 + csel w2, w2, w3, hi +.L2368: + adrp x3, .LANCHOR4 + add x3, x3, :lo12:.LANCHOR4 + ldrh w4, [x3, 1840] + cmp w4, 31 + bhi .L2369 + add w4, w4, 1 + mov w2, 1 + strh w4, [x3, 1840] +.L2369: + cbnz w0, .L2370 + add x0, x1, :lo12:.LANCHOR2 + ldr x0, [x0, 3696] + ldr w3, [x0, 20] + ldr w0, [x0, 16] + add w2, w2, w3 + cmp w0, w2 + bcc .L2375 +.L2370: + add x0, x1, :lo12:.LANCHOR2 + stp x29, x30, [sp, -16]! + add x29, sp, 0 + ldr x1, [x0, 3696] + ldr w2, [x1, 16] + str w2, [x1, 20] + mov w2, 17221 + movk w2, 0x4254, lsl 16 + str w2, [x1] + ldr x2, [x0, 3696] + ldrh w1, [x0, 3680] + lsl w3, w1, 9 + str wzr, [x2, 4] + str w3, [x2, 12] + ldr w3, [x2, 8] + add w3, w3, 1 + str w3, [x2, 8] + ldr x2, [x0, 3696] + mov w0, 64 + bl FtlVendorPartWrite + bl Ftl_save_ext_data + mov w0, 0 + ldp x29, x30, [sp], 16 + ret +.L2372: + mov w2, 32 + b .L2368 +.L2375: + mov w0, 0 + ret + .size FtlEctTblFlush, .-FtlEctTblFlush + .align 2 + .global FtlVendorPartRead + .type FtlVendorPartRead, %function +FtlVendorPartRead: + stp x29, x30, [sp, -176]! + add w3, w0, w1 + add x29, sp, 0 + stp x21, x22, [sp, 32] + mov w22, w1 + stp x23, x24, [sp, 48] + adrp x1, .LANCHOR0 + mov w23, w0 + add x0, x1, :lo12:.LANCHOR0 + stp x25, x26, [sp, 64] + mov x25, x2 + stp x19, x20, [sp, 16] + stp x27, x28, [sp, 80] + str x1, [x29, 104] + ldrh w2, [x0, 2540] + cmp w3, w2 + bhi .L2386 + ldrh w21, [x0, 2552] + adrp x26, .LANCHOR2 + add x26, x26, :lo12:.LANCHOR2 + mov w24, 0 + mov x27, x26 + lsr w21, w23, w21 +.L2379: + cbnz w22, .L2385 +.L2377: + mov w0, w24 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 176 + ret +.L2385: + ldr x0, [x26, 3744] + ldr w4, [x0, w21, uxtw 2] + ldr x0, [x29, 104] + add x0, x0, :lo12:.LANCHOR0 + ldrh w19, [x0, 2550] + and w0, w22, 65535 + udiv w20, w23, w19 + msub w20, w20, w19, w23 + sub w19, w19, w20 + and w19, w19, 65535 + cmp w22, w19 + csel w19, w0, w19, cc + lsl w28, w19, 9 + cbz w4, .L2381 + ldr x0, [x27, 3624] + mov w2, 1 + str w4, [x29, 96] + mov w1, w2 + str w4, [x29, 124] + stp x0, xzr, [x29, 128] + add x0, x29, 120 + bl FlashReadPages + adrp x3, .LANCHOR4 + add x3, x3, :lo12:.LANCHOR4 + ldr w0, [x29, 120] + ldr w4, [x29, 96] + cmn w0, #1 + ldr w0, [x3, 1712] + csinv w24, w24, wzr, ne + cmp w0, 256 + bne .L2383 + mov w2, w4 + mov w1, w21 + str x3, [x29, 96] + adrp x0, .LC135 + add x0, x0, :lo12:.LC135 + bl printk + ldr x3, [x29, 96] + mov w1, w21 + ldr x2, [x27, 3624] + add x0, x3, 1776 + bl FtlMapWritePage +.L2383: + ldr x1, [x27, 3624] + lsl w20, w20, 9 + asr w20, w20, 2 + mov w2, w28 + mov x0, x25 + add x1, x1, w20, sxtw 2 + bl ftl_memcpy +.L2384: + add w21, w21, 1 + sub w22, w22, w19 + add w23, w23, w19 + add x25, x25, w28, sxtw + b .L2379 +.L2381: + mov w2, w28 + mov w1, 0 + mov x0, x25 + bl ftl_memset + b .L2384 +.L2386: + mov w24, -1 + b .L2377 + .size FtlVendorPartRead, .-FtlVendorPartRead + .align 2 + .global FtlLoadEctTbl + .type FtlLoadEctTbl, %function +FtlLoadEctTbl: + stp x29, x30, [sp, -32]! + mov w0, 64 + add x29, sp, 0 + str x19, [sp, 16] + adrp x19, .LANCHOR2 + add x19, x19, :lo12:.LANCHOR2 + ldrh w1, [x19, 3680] + ldr x2, [x19, 3696] + bl FtlVendorPartRead + ldr x0, [x19, 3696] + ldr w1, [x0] + mov w0, 17221 + movk w0, 0x4254, lsl 16 + cmp w1, w0 + beq .L2389 + adrp x1, .LC136 + adrp x0, .LC76 + add x1, x1, :lo12:.LC136 + add x0, x0, :lo12:.LC76 + bl printk + ldr x0, [x19, 3696] + mov w1, 0 + ldrh w2, [x19, 3680] + lsl w2, w2, 9 + bl ftl_memset +.L2389: + mov w0, 0 + ldr x19, [sp, 16] + ldp x29, x30, [sp], 32 + ret + .size FtlLoadEctTbl, .-FtlLoadEctTbl + .align 2 + .global Ftl_load_ext_data + .type Ftl_load_ext_data, %function +Ftl_load_ext_data: + stp x29, x30, [sp, -48]! + mov w1, 1 + mov w0, 0 + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x19, .LANCHOR2 + add x20, x19, :lo12:.LANCHOR2 + stp x21, x22, [sp, 32] + add x22, x20, 848 + mov w21, 19539 + mov x2, x22 + bl FtlVendorPartRead + ldr w0, [x20, 848] + movk w21, 0x4654, lsl 16 + cmp w0, w21 + beq .L2392 + mov w2, 512 + mov w1, 0 + mov x0, x22 + bl ftl_memset + str w21, [x20, 848] +.L2392: + add x0, x19, :lo12:.LANCHOR2 + mov w2, 19539 + movk w2, 0x4654, lsl 16 + ldr w3, [x0, 848] + cmp w3, w2 + bne .L2393 + ldr w2, [x0, 936] + str w2, [x0, 744] + ldr w2, [x0, 940] + str w2, [x0, 748] + ldr w2, [x0, 856] + str w2, [x0, 740] + ldr w2, [x0, 860] + str w2, [x0, 728] + ldr w2, [x0, 864] + str w2, [x0, 720] + ldr w2, [x0, 868] + str w2, [x0, 736] + ldr w2, [x0, 876] + str w2, [x0, 764] + ldr w2, [x0, 880] + str w2, [x0, 448] + ldr w2, [x0, 884] + str w2, [x0, 724] + ldr w2, [x0, 888] + str w2, [x0, 732] + ldr w2, [x0, 892] + ldr w1, [x0, 908] + str w2, [x0, 772] + ldr w2, [x0, 896] + str w1, [x0, 1360] + str w2, [x0, 776] +.L2393: + add x0, x19, :lo12:.LANCHOR2 + mov w1, 34661 + movk w1, 0x1234, lsl 16 + adrp x20, .LANCHOR0 + add x0, x0, 848 + ldr w2, [x0, 68] + str wzr, [x0, 2708] + cmp w2, w1 + bne .L2394 + add x1, x20, :lo12:.LANCHOR0 + ldrb w2, [x1, 204] + cbz w2, .L2395 + str wzr, [x0, 68] + bl Ftl_save_ext_data +.L2394: + add x19, x19, :lo12:.LANCHOR2 + add x20, x20, :lo12:.LANCHOR0 + ldp x21, x22, [sp, 32] + ldr w1, [x19, 764] + ldrh w0, [x20, 2536] + ldr w2, [x19, 760] + madd w0, w0, w2, w1 + ldrh w1, [x20, 2480] + udiv w0, w0, w1 + str w0, [x19, 768] + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 48 + ret +.L2395: + mov w0, 1 + str w0, [x1, 2372] + adrp x1, .LC137 + adrp x0, .LC76 + add x1, x1, :lo12:.LC137 + add x0, x0, :lo12:.LC76 + bl printk + b .L2394 + .size Ftl_load_ext_data, .-Ftl_load_ext_data + .align 2 + .global FtlMapBlkWriteDumpData + .type FtlMapBlkWriteDumpData, %function +FtlMapBlkWriteDumpData: + ldr w1, [x0, 56] + cbz w1, .L2404 + stp x29, x30, [sp, -48]! + adrp x2, .LANCHOR2 + add x2, x2, :lo12:.LANCHOR2 + add x29, sp, 0 + stp x19, x20, [sp, 16] + str x21, [sp, 32] + str wzr, [x0, 56] + ldr w1, [x2, 424] + ldrh w19, [x0, 6] + ldr x4, [x0, 40] + cbnz w1, .L2397 + adrp x1, .LANCHOR4 + add x3, x1, :lo12:.LANCHOR4 + sub w19, w19, #1 + mov x21, x0 + and w19, w19, 65535 + ldr x0, [x2, 3616] + ldr x2, [x2, 3656] + mov x20, x1 + str x2, [x3, 1728] + ubfiz x2, x19, 2, 16 + str x0, [x3, 1720] + add x3, x3, 1712 + ldr w2, [x4, x2] + str w2, [x3, 4] + cbz w2, .L2401 + mov w2, 1 + mov x0, x3 + mov w1, w2 + bl FlashReadPages +.L2402: + add x1, x20, :lo12:.LANCHOR4 + mov x0, x21 + ldr x2, [x1, 1720] + mov w1, w19 + bl FtlMapWritePage +.L2397: + ldp x19, x20, [sp, 16] + ldr x21, [sp, 32] + ldp x29, x30, [sp], 48 + ret +.L2401: + adrp x1, .LANCHOR0+2554 + ldrh w2, [x1, #:lo12:.LANCHOR0+2554] + mov w1, 255 + bl ftl_memset + b .L2402 +.L2404: + ret + .size FtlMapBlkWriteDumpData, .-FtlMapBlkWriteDumpData + .align 2 + .type FlashReadFacBbtData.part.17, %function +FlashReadFacBbtData.part.17: + stp x29, x30, [sp, -32]! + adrp x3, .LANCHOR4 + add x29, sp, 0 + str x19, [sp, 16] + mov x19, x0 + cbnz w1, .L2408 + add x5, x3, :lo12:.LANCHOR4 + mov w0, 0 + mov w7, 1 +.L2409: + ldr w1, [x5, 1644] + cmp w0, w1 + bcc .L2410 +.L2408: + add x3, x3, :lo12:.LANCHOR4 + mov x0, x19 + ldr x1, [x3, 1608] + bl ftl_memcpy + mov w3, 4 + mov x1, x19 + mov w2, w3 + adrp x0, .LC138 + add x0, x0, :lo12:.LC138 + bl rknand_print_hex + mov w0, 0 + ldr x19, [sp, 16] + ldp x29, x30, [sp], 32 + ret +.L2410: + ubfx x1, x0, 5, 11 + ldr x6, [x5, 1608] + lsl x1, x1, 2 + lsl w8, w7, w0 + add w0, w0, 1 + and w0, w0, 65535 + ldr w4, [x6, x1] + orr w4, w4, w8 + str w4, [x6, x1] + b .L2409 + .size FlashReadFacBbtData.part.17, .-FlashReadFacBbtData.part.17 + .align 2 + .global FlashReadFacBbtData + .type FlashReadFacBbtData, %function +FlashReadFacBbtData: + stp x29, x30, [sp, -144]! + add x29, sp, 0 + stp x23, x24, [sp, 48] + mov w23, w1 + adrp x1, .LANCHOR0 + add x1, x1, :lo12:.LANCHOR0 + stp x19, x20, [sp, 16] + add x1, x1, 176 + stp x21, x22, [sp, 32] + mov x22, x0 + stp x25, x26, [sp, 64] + mov w25, w2 + mov w26, 61664 + ldrh w0, [x1, 14] + ldrh w1, [x1, 12] + mul w0, w0, w1 + adrp x1, .LANCHOR4 + add x1, x1, :lo12:.LANCHOR4 + and w0, w0, 65535 + mov x21, x1 + sub w20, w0, #1 + sub w19, w0, #16 + ldr x2, [x1, 1608] + and w20, w20, 65535 + mul w24, w0, w23 + str x2, [x29, 96] + ldr x2, [x1, 1664] + str x2, [x29, 104] +.L2414: + cmp w20, w19 + bgt .L2417 + mov w0, -1 + b .L2413 +.L2417: + add w0, w20, w24 + mov w2, 1 + lsl w0, w0, 10 + mov w1, w2 + str w0, [x29, 92] + add x0, x29, 88 + bl FlashReadPages + ldr w0, [x29, 88] + cmn w0, #1 + beq .L2415 + ldr x0, [x21, 1664] + ldrh w0, [x0] + cmp w0, w26 + bne .L2415 + cbz x22, .L2418 + mov w2, w25 + mov w1, w23 + mov x0, x22 + bl FlashReadFacBbtData.part.17 +.L2413: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x29, x30, [sp], 144 + ret +.L2415: + sub w20, w20, #1 + and w20, w20, 65535 + b .L2414 +.L2418: + mov w0, 0 + b .L2413 + .size FlashReadFacBbtData, .-FlashReadFacBbtData + .align 2 + .global FlashGetBadBlockList + .type FlashGetBadBlockList, %function +FlashGetBadBlockList: + stp x29, x30, [sp, -48]! + add x29, sp, 0 + str x21, [sp, 32] + mov x21, x0 + adrp x0, .LANCHOR0+88 + stp x19, x20, [sp, 16] + adrp x20, .LANCHOR4 + add x20, x20, :lo12:.LANCHOR4 + ldr x0, [x0, #:lo12:.LANCHOR0+88] + ldrb w2, [x0, 13] + ldrh w19, [x0, 14] + ldr x0, [x20, 1656] + mul w19, w19, w2 + and w19, w19, 65535 + add w2, w19, 7 + lsr w2, w2, 3 + bl FlashReadFacBbtData + cmn w0, #1 + bne .L2424 +.L2428: + mov w0, 0 +.L2425: + ubfiz x0, x0, 1, 16 + mov w1, -1 + strh w1, [x21, x0] + mov w0, 0 + ldp x19, x20, [sp, 16] + ldr x21, [sp, 32] + ldp x29, x30, [sp], 48 + ret +.L2424: + lsr w4, w19, 4 + sub w19, w19, #1 + mov w1, 0 + mov w0, 0 + mov w5, 1 +.L2426: + cmp w1, w19 + bge .L2425 + ldr x6, [x20, 1656] + ubfx x3, x1, 5, 11 + lsl w2, w5, w1 + ldr w3, [x6, x3, lsl 2] + tst w2, w3 + beq .L2427 + add w2, w0, 1 + ubfiz x0, x0, 1, 16 + strh w1, [x21, x0] + and w0, w2, 65535 +.L2427: + cmp w0, w4 + bcs .L2428 + add w1, w1, 1 + and w1, w1, 65535 + b .L2426 + .size FlashGetBadBlockList, .-FlashGetBadBlockList + .align 2 + .global FtlMakeBbt + .type FtlMakeBbt, %function +FtlMakeBbt: + stp x29, x30, [sp, -112]! + adrp x0, .LANCHOR2 + add x1, x0, :lo12:.LANCHOR2 + add x29, sp, 0 + stp x19, x20, [sp, 16] + stp x21, x22, [sp, 32] + stp x23, x24, [sp, 48] + stp x25, x26, [sp, 64] + stp x27, x28, [sp, 80] + str x0, [x29, 104] + ldr w23, [x1, 424] + cbnz w23, .L2435 + bl FtlBbtMemInit + adrp x20, .LANCHOR0 + bl FtlLoadFactoryBbt + add x22, x20, :lo12:.LANCHOR0 + adrp x0, .LANCHOR4 + add x24, x0, :lo12:.LANCHOR4 + add x26, x22, 2656 + add x24, x24, 1712 + add x22, x22, 2636 +.L2436: + add x19, x20, :lo12:.LANCHOR0 + ldrh w0, [x19, 2494] + cmp w23, w0 + bcc .L2442 + mov w21, 0 +.L2443: + ldrh w0, [x19, 2558] + cmp w0, w21 + bhi .L2444 + add x19, x19, 2624 + ldrh w21, [x19, 12] + mov w22, 65535 + sub w21, w21, #1 + and w21, w21, 65535 +.L2445: + ldrh w0, [x19, 12] + sub w0, w0, #48 + cmp w21, w0 + ble .L2449 + mov w0, w21 + bl FtlBbmIsBadBlock + cmp w0, 1 + beq .L2446 + mov w0, w21 + bl FlashTestBlk + cbz w0, .L2447 + mov w0, w21 + bl FtlBbmMapBadBlock +.L2446: + sub w21, w21, #1 + and w21, w21, 65535 + b .L2445 +.L2442: + ldr x0, [x29, 104] + adrp x1, .LANCHOR4 + add x21, x1, :lo12:.LANCHOR4 + ldrh w1, [x22] + add x25, x0, :lo12:.LANCHOR2 + add x21, x21, 1712 + mov w2, 65535 + cmp w1, w2 + ldr x0, [x25, 3608] + ldr x27, [x25, 3656] + stp x0, x27, [x21, 8] + beq .L2437 + ldrh w4, [x19, 2542] + mov w2, 1 + madd w28, w4, w23, w1 + mov w1, w2 + lsl w0, w28, 10 + str w0, [x21, 4] + mov x0, x21 + bl FlashReadPages + ldr x1, [x21, 8] + ldr x0, [x26] + ldrh w2, [x19, 2542] + add w2, w2, 7 + lsr w2, w2, 3 + bl ftl_memcpy +.L2438: + mov w0, w28 + add w23, w23, 1 + bl FtlBbmMapBadBlock + add x26, x26, 8 + add x22, x22, 2 + b .L2436 +.L2437: + mov w1, w23 + bl FlashGetBadBlockList + ldr x0, [x21, 8] + ldr x1, [x26] + bl FtlBbt2Bitmap + ldrh w21, [x19, 2542] +.L2440: + sub w21, w21, #1 + and w21, w21, 65535 +.L2439: + ldrh w0, [x19, 2542] + madd w0, w23, w0, w21 + bl FtlBbmIsBadBlock + cmp w0, 1 + beq .L2440 + ldr x0, [x25, 3656] + mov w2, 16 + strh w21, [x22] + mov w1, 0 + bl ftl_memset + str wzr, [x27, 4] + mov w0, -3872 + strh w0, [x27] + ldrh w0, [x22] + strh w0, [x27, 2] + ldrh w4, [x19, 2542] + ldrh w0, [x22] + ldr x1, [x26] + ldrh w2, [x25, 3784] + madd w28, w4, w23, w0 + lsl w2, w2, 2 + lsl w0, w28, 10 + str w0, [x24, 4] + ldr x0, [x24, 8] + bl ftl_memcpy + mov w2, 1 + mov x0, x24 + mov w1, w2 + bl FlashEraseBlocks + mov w3, 1 + mov x0, x24 + mov w2, w3 + mov w1, w3 + bl FlashProgPages + ldr w0, [x24] + cmn w0, #1 + bne .L2438 + mov w0, w28 + bl FtlBbmMapBadBlock + b .L2439 +.L2444: + mov w0, w21 + add w21, w21, 1 + bl FtlBbmMapBadBlock + and w21, w21, 65535 + b .L2443 +.L2447: + ldrh w0, [x19] + cmp w0, w22 + bne .L2448 + strh w21, [x19] + b .L2446 +.L2448: + strh w21, [x19, 4] +.L2449: + ldr x0, [x29, 104] + add x20, x20, :lo12:.LANCHOR0 + add x0, x0, :lo12:.LANCHOR2 + ldrh w1, [x20, 2624] + str wzr, [x20, 2632] + ldr x2, [x0, 432] + lsl w1, w1, 10 + strh wzr, [x20, 2626] + str w1, [x2, 4] + mov w2, 2 + ldr x0, [x0, 432] + ldrh w1, [x20, 2628] + lsl w1, w1, 10 + str w1, [x0, 60] + mov w1, 1 + bl FlashEraseBlocks + ldrh w0, [x20, 2624] + bl FtlBbmMapBadBlock + ldrh w0, [x20, 2628] + bl FtlBbmMapBadBlock + bl FtlBbmTblFlush + strh wzr, [x20, 2626] + ldr w0, [x20, 2632] + ldrh w1, [x20, 2628] + add w0, w0, 1 + str w0, [x20, 2632] + ldrh w0, [x20, 2624] + strh w0, [x20, 2628] + strh w1, [x20, 2624] + bl FtlBbmTblFlush +.L2435: + ldp x19, x20, [sp, 16] + mov w0, 0 + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 112 + ret + .size FtlMakeBbt, .-FtlMakeBbt + .align 2 + .global log2phys + .type log2phys, %function +log2phys: + stp x29, x30, [sp, -128]! + add x29, sp, 0 + stp x21, x22, [sp, 32] + adrp x22, .LANCHOR0 + add x3, x22, :lo12:.LANCHOR0 + stp x19, x20, [sp, 16] + stp x23, x24, [sp, 48] + stp x25, x26, [sp, 64] + stp x27, x28, [sp, 80] + ldr w4, [x3, 2616] + cmp w0, w4 + bcs .L2456 + ldrh w27, [x3, 2552] + mov w25, w0 + adrp x20, .LANCHOR2 + str x1, [x29, 120] + add w27, w27, 7 + ldrh w1, [x3, 2582] + str w2, [x29, 116] + lsr w24, w0, w27 + add x0, x20, :lo12:.LANCHOR2 + and w23, w24, 65535 + ldr x8, [x0, 704] + mov x0, 0 +.L2457: + and x19, x0, 65535 + cmp w19, w1 + bcc .L2462 + bl select_l2p_ram_region + and x19, x0, 65535 + ubfiz x21, x19, 4, 16 + mov w2, 65535 + add x1, x8, x21 + ldrh w3, [x8, x21] + cmp w3, w2 + beq .L2463 + ldr w1, [x1, 4] + tbz w1, #31, .L2463 + bl flush_l2p_region +.L2463: + add x28, x20, :lo12:.LANCHOR2 + ubfiz x0, x23, 2, 16 + ldr x1, [x28, 3752] + ldr w3, [x1, x0] + cbnz w3, .L2464 + ldr x0, [x28, 704] + add x22, x22, :lo12:.LANCHOR0 + mov w1, 255 + add x0, x0, x21 + ldrh w2, [x22, 2554] + ldr x0, [x0, 8] + bl ftl_memset + ldr x0, [x28, 704] + strh w23, [x0, x21] + ldr x0, [x28, 704] + add x21, x0, x21 + str wzr, [x21, 4] + b .L2459 +.L2456: + mov w0, -1 + cbnz w2, .L2455 + str w0, [x1] +.L2455: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 128 + ret +.L2462: + add x0, x0, 1 + add x2, x8, x0, lsl 4 + ldrh w2, [x2, -16] + cmp w2, w23 + bne .L2457 +.L2459: + mov x0, 1 + lsl x27, x0, x27 + ldr w0, [x29, 116] + sub w27, w27, #1 + and w25, w27, w25 + and x25, x25, 65535 + cbnz w0, .L2460 + add x0, x20, :lo12:.LANCHOR2 + ldr x1, [x29, 120] + ldr x0, [x0, 704] + add x0, x0, x19, lsl 4 + ldr x0, [x0, 8] + ldr w0, [x0, x25, lsl 2] + str w0, [x1] +.L2461: + add x20, x20, :lo12:.LANCHOR2 + ldr x0, [x20, 704] + add x19, x0, x19, lsl 4 + ldr w0, [x19, 4] + cmn w0, #1 + beq .L2468 + add w0, w0, 1 + str w0, [x19, 4] +.L2468: + mov w0, 0 + b .L2455 +.L2460: + add x2, x20, :lo12:.LANCHOR2 + ldr x1, [x29, 120] + lsl x0, x19, 4 + ldr x3, [x2, 704] + ldr w4, [x1] + mov x1, x0 + add x0, x3, x0 + ldr x0, [x0, 8] + str w4, [x0, x25, lsl 2] + strh w23, [x2, 712] + ldr x0, [x2, 704] + add x0, x0, x1 + ldr w1, [x0, 4] + orr w1, w1, -2147483648 + str w1, [x0, 4] + b .L2461 +.L2464: + ldr x0, [x28, 704] + adrp x6, .LANCHOR4 + add x6, x6, :lo12:.LANCHOR4 + mov w2, 1 + add x0, x0, x21 + add x26, x6, 1712 + str x6, [x29, 104] + mov w1, w2 + str w3, [x6, 1716] + ldr x0, [x0, 8] + str x0, [x6, 1720] + ldr x0, [x28, 3656] + str x0, [x6, 1728] + mov x0, x26 + str w3, [x29, 112] + bl FlashReadPages + ldr x0, [x26, 16] + ldr w3, [x29, 112] + ldr x6, [x29, 104] + ldrh w0, [x0, 8] + cmp w0, w23 + beq .L2465 + mov w2, w3 + and w1, w24, 65535 + adrp x0, .LC139 + add x0, x0, :lo12:.LC139 + bl printk + add x22, x22, :lo12:.LANCHOR0 + ldr x1, [x26, 16] + mov w3, 4 + adrp x0, .LC100 + mov w2, w3 + add x0, x0, :lo12:.LC100 + bl rknand_print_hex + ldrh w3, [x22, 2580] + mov w2, 4 + ldr x1, [x28, 3752] + adrp x0, .LC140 + add x0, x0, :lo12:.LC140 + bl rknand_print_hex + mov w0, 1 + str w0, [x28, 424] +.L2466: + add x1, x20, :lo12:.LANCHOR2 + ldr x0, [x1, 704] + add x0, x0, x21 + str wzr, [x0, 4] + ldr x0, [x1, 704] + strh w23, [x0, x21] + b .L2459 +.L2465: + ldr w0, [x6, 1712] + cmp w0, 256 + bne .L2466 + and w24, w24, 65535 + mov w2, w3 + mov w1, w24 + adrp x0, .LC141 + add x0, x0, :lo12:.LC141 + bl printk + ldr x0, [x28, 704] + mov w1, w24 + add x0, x0, x21 + ldr x2, [x0, 8] + add x0, x28, 3792 + bl FtlMapWritePage + b .L2466 + .size log2phys, .-log2phys + .align 2 + .global FtlWriteDumpData + .type FtlWriteDumpData, %function +FtlWriteDumpData: + stp x29, x30, [sp, -144]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x19, .LANCHOR2 + stp x23, x24, [sp, 48] + add x23, x19, :lo12:.LANCHOR2 + stp x21, x22, [sp, 32] + str x25, [sp, 64] + ldr w0, [x23, 424] + cbnz w0, .L2471 + ldrh w2, [x23, 564] + cbz w2, .L2473 + ldrb w1, [x23, 568] + cbnz w1, .L2473 + adrp x21, .LANCHOR0 + add x21, x21, :lo12:.LANCHOR0 + ldrb w1, [x23, 567] + ldrh w3, [x21, 2544] + mul w1, w1, w3 + cmp w2, w1 + beq .L2473 + ldrb w0, [x23, 570] + cbnz w0, .L2471 + ldr w22, [x21, 2616] + add x1, x29, 84 + ldrh w24, [x21, 2472] + mov w2, 0 + sub w22, w22, #1 + mov w0, w22 + bl log2phys + ldr x20, [x23, 3656] + ldr w0, [x29, 84] + ldr x1, [x23, 3608] + str w0, [x29, 92] + cmn w0, #1 + stp x1, x20, [x29, 96] + str w22, [x29, 112] + str wzr, [x20, 4] + beq .L2475 + mov w2, 0 + mov w1, 1 + add x0, x29, 88 + bl FlashReadPages +.L2476: + add x25, x19, :lo12:.LANCHOR2 + lsl w24, w24, 2 + add x21, x25, 560 + mov w0, -3947 + mov w23, 0 + strh w0, [x20] +.L2477: + cmp w24, w23 + bne .L2481 +.L2478: + add x19, x19, :lo12:.LANCHOR2 + mov w0, 1 + strb w0, [x19, 570] +.L2471: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldr x25, [sp, 64] + ldp x29, x30, [sp], 144 + ret +.L2475: + ldrh w2, [x21, 2554] + mov w1, 255 + ldr x0, [x23, 3608] + bl ftl_memset + b .L2476 +.L2481: + ldrh w0, [x21, 4] + cbz w0, .L2478 + ldr w0, [x29, 92] + add w23, w23, 1 + stp w22, w0, [x20, 8] + ldrh w0, [x21] + strh w0, [x20, 2] + mov x0, x21 + bl get_new_active_ppa + str w0, [x29, 92] + ldr w0, [x25, 756] + mov w3, 0 + str w0, [x20, 4] + mov w2, 0 + add w0, w0, 1 + mov w1, 1 + cmn w0, #1 + csel w0, w0, wzr, ne + str w0, [x25, 756] + add x0, x29, 88 + bl FlashProgPages + ldrh w0, [x21] + bl decrement_vpc_count + b .L2477 +.L2473: + add x19, x19, :lo12:.LANCHOR2 + strb wzr, [x19, 570] + b .L2471 + .size FtlWriteDumpData, .-FtlWriteDumpData + .align 2 + .global l2p_flush + .type l2p_flush, %function +l2p_flush: + stp x29, x30, [sp, -48]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x20, .LANCHOR0 + str x21, [sp, 32] + add x20, x20, :lo12:.LANCHOR0 + adrp x21, .LANCHOR2 + add x21, x21, :lo12:.LANCHOR2 + mov w19, 0 + bl FtlWriteDumpData +.L2490: + ldrh w0, [x20, 2582] + cmp w0, w19 + bhi .L2492 + mov w0, 0 + ldr x21, [sp, 32] + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 48 + ret +.L2492: + ldr x1, [x21, 704] + ubfiz x0, x19, 4, 16 + add x0, x1, x0 + ldr w0, [x0, 4] + tbz w0, #31, .L2491 + mov w0, w19 + bl flush_l2p_region +.L2491: + add w19, w19, 1 + and w19, w19, 65535 + b .L2490 + .size l2p_flush, .-l2p_flush + .align 2 + .global allocate_new_data_superblock + .type allocate_new_data_superblock, %function +allocate_new_data_superblock: + stp x29, x30, [sp, -48]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x19, .LANCHOR2 + add x2, x19, :lo12:.LANCHOR2 + str x21, [sp, 32] + ldr w1, [x2, 424] + cbnz w1, .L2495 + ldrh w20, [x0] + mov x21, x0 + mov w0, 65535 + cmp w20, w0 + beq .L2496 + ldr x0, [x2, 520] + ubfiz x1, x20, 1, 16 + ldrh w0, [x0, x1] + cbz w0, .L2497 + mov w0, w20 + bl INSERT_DATA_LIST +.L2496: + add x2, x19, :lo12:.LANCHOR2 + strb wzr, [x21, 8] + add x0, x2, 608 + cmp x21, x0 + beq .L2498 + adrp x1, .LANCHOR0 + add x4, x1, :lo12:.LANCHOR0 + ldrh w3, [x4, 2492] + cmp w3, 1 + beq .L2498 + ldrb w0, [x4, 204] + cbz w0, .L2499 +.L2498: + mov w0, 1 + strb w0, [x21, 8] +.L2500: + add x2, x19, :lo12:.LANCHOR2 + mov w1, 65535 + ldrh w0, [x2, 3872] + cmp w0, w1 + beq .L2505 + cmp w20, w0 + bne .L2506 + ldr x2, [x2, 520] + ubfiz x1, x0, 1, 16 + ldrh w1, [x2, x1] + cbz w1, .L2507 +.L2506: + bl update_vpc_list +.L2507: + add x19, x19, :lo12:.LANCHOR2 + mov w0, -1 + strh w0, [x19, 3872] +.L2505: + mov x0, x21 + bl allocate_data_superblock + bl l2p_flush + mov w0, 0 + bl FtlEctTblFlush + bl FtlVpcTblFlush +.L2495: + mov w0, 0 + ldr x21, [sp, 32] + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 48 + ret +.L2497: + mov w0, w20 + bl INSERT_FREE_LIST + b .L2496 +.L2499: + add x0, x2, 560 + cmp x21, x0 + bne .L2500 + cmp w3, 3 + beq .L2502 + ldr w0, [x2, 1360] + cmp w0, 1 + bne .L2503 +.L2502: + add x2, x19, :lo12:.LANCHOR2 + mov w0, 1 + strb w0, [x2, 568] +.L2503: + add x1, x1, :lo12:.LANCHOR0 + ldr w0, [x1, 2372] + cbz w0, .L2500 + add x1, x19, :lo12:.LANCHOR2 + ldr w0, [x1, 776] + cmp w0, 39 + bhi .L2500 + mov w0, 1 + strb w0, [x1, 568] + b .L2500 + .size allocate_new_data_superblock, .-allocate_new_data_superblock + .align 2 + .global FtlCheckVpc + .type FtlCheckVpc, %function +FtlCheckVpc: + stp x29, x30, [sp, -112]! + adrp x1, .LANCHOR3 + add x1, x1, :lo12:.LANCHOR3 + adrp x0, .LC109 + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x19, .LANCHOR0 + stp x23, x24, [sp, 48] + add x23, x19, :lo12:.LANCHOR0 + stp x21, x22, [sp, 32] + mov w22, 0 + add x1, x1, 216 + stp x25, x26, [sp, 64] + stp x27, x28, [sp, 80] + add x0, x0, :lo12:.LC109 + adrp x21, check_valid_page_count_table + bl printk + add x20, x21, :lo12:check_valid_page_count_table + mov x2, 8192 + mov w1, 0 + mov x0, x20 + bl memset +.L2522: + ldr w0, [x23, 2616] + cmp w22, w0 + bcc .L2524 + add x22, x19, :lo12:.LANCHOR0 + adrp x23, .LC142 + adrp x19, .LANCHOR2 + add x26, x21, :lo12:check_valid_page_count_table + add x25, x19, :lo12:.LANCHOR2 + add x23, x23, :lo12:.LC142 + mov w24, 0 + mov w20, 0 +.L2525: + ldrh w0, [x22, 2480] + cmp w0, w20 + bhi .L2527 + add x0, x19, :lo12:.LANCHOR2 + ldr x19, [x0, 544] + cbz x19, .L2528 + ldr x1, [x0, 504] + adrp x23, .LC143 + ldrh w25, [x0, 552] + mov x20, x0 + sub x19, x19, x1 + mov x1, -6148914691236517206 + asr x19, x19, 1 + movk x1, 0xaaab, lsl 0 + add x21, x21, :lo12:check_valid_page_count_table + add x23, x23, :lo12:.LC143 + mov w22, 0 + mov w26, 6 + mul x19, x19, x1 + and w19, w19, 65535 +.L2529: + cmp w22, w25 + bne .L2531 +.L2528: + mov w1, w24 + adrp x0, .LC144 + add x0, x0, :lo12:.LC144 + bl printk + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 112 + ret +.L2524: + mov w2, 0 + add x1, x29, 108 + mov w0, w22 + bl log2phys + ldr w0, [x29, 108] + cmn w0, #1 + beq .L2523 + lsr w0, w0, 10 + bl P2V_block_in_plane + and x0, x0, 65535 + ldrh w1, [x20, x0, lsl 1] + add w1, w1, 1 + strh w1, [x20, x0, lsl 1] +.L2523: + add w22, w22, 1 + b .L2522 +.L2527: + ldr x0, [x25, 520] + ubfiz x28, x20, 1, 16 + sxtw x27, w20 + ldrh w2, [x0, x28] + ldrh w3, [x26, x27, lsl 1] + cmp w2, w3 + beq .L2526 + mov w1, w20 + mov x0, x23 + bl printk + ldr x0, [x25, 520] + mov w1, 65535 + ldrh w0, [x0, x28] + cmp w0, w1 + beq .L2526 + ldrh w1, [x26, x27, lsl 1] + cmp w1, w0 + csinc w24, w24, wzr, ls +.L2526: + add w20, w20, 1 + and w20, w20, 65535 + b .L2525 +.L2531: + ldr x1, [x20, 520] + ubfiz x0, x19, 1, 16 + ldrh w2, [x1, x0] + cbz w2, .L2530 + ldrh w3, [x21, w19, sxtw 1] + mov w24, 1 + mov w1, w19 + mov x0, x23 + bl printk +.L2530: + ldr x0, [x20, 504] + umull x19, w19, w26 + ldrh w19, [x0, x19] + mov w0, 65535 + cmp w19, w0 + beq .L2528 + add w22, w22, 1 + and w22, w22, 65535 + b .L2529 + .size FtlCheckVpc, .-FtlCheckVpc + .align 2 + .global Ftlscanalldata + .type Ftlscanalldata, %function +Ftlscanalldata: + sub sp, sp, #96 + adrp x0, .LC145 + mov w1, 0 + add x0, x0, :lo12:.LC145 + stp x29, x30, [sp, 16] + add x29, sp, 16 + stp x19, x20, [sp, 32] + mov w19, 0 + stp x21, x22, [sp, 48] + adrp x22, .LANCHOR4 + add x20, x22, :lo12:.LANCHOR4 + adrp x21, .LANCHOR0 + add x20, x20, 1712 + add x21, x21, :lo12:.LANCHOR0 + str x23, [sp, 64] + bl printk +.L2543: + ldr w0, [x21, 2616] + cmp w19, w0 + bcc .L2549 + ldp x19, x20, [sp, 32] + ldp x21, x22, [sp, 48] + ldp x29, x30, [sp, 16] + ldr x23, [sp, 64] + add sp, sp, 96 + ret +.L2549: + mov w2, 0 + add x1, x29, 76 + mov w0, w19 + bl log2phys + tst x19, 2047 + bne .L2544 + ldr w2, [x29, 76] + adrp x0, .LC146 + mov w1, w19 + add x0, x0, :lo12:.LC146 + bl printk +.L2544: + ldr w0, [x29, 76] + cmn w0, #1 + beq .L2546 + stp wzr, w0, [x20] + adrp x0, .LANCHOR2 + add x0, x0, :lo12:.LANCHOR2 + mov w2, 0 + str w19, [x20, 24] + ldr x1, [x0, 3608] + ldr x23, [x0, 3656] + mov x0, x20 + stp x1, x23, [x20, 8] + mov w1, 1 + bl FlashReadPages + ldr w0, [x20] + cmp w0, 256 + ccmn w0, #1, 4, ne + beq .L2547 + ldr w0, [x23, 8] + cmp w19, w0 + beq .L2546 +.L2547: + add x0, x22, :lo12:.LANCHOR4 + ldr x2, [x0, 1720] + ldr x1, [x0, 1728] + ldr w3, [x2, 4] + str w3, [sp] + ldp w3, w4, [x1] + ldp w5, w6, [x1, 8] + mov w1, w19 + ldr w7, [x2] + ldr w2, [x0, 1716] + adrp x0, .LC147 + add x0, x0, :lo12:.LC147 + bl printk +.L2546: + add w19, w19, 1 + b .L2543 + .size Ftlscanalldata, .-Ftlscanalldata + .align 2 + .global FtlReUsePrevPpa + .type FtlReUsePrevPpa, %function +FtlReUsePrevPpa: + stp x29, x30, [sp, -64]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + mov w19, w0 + str x21, [sp, 32] + lsr w0, w1, 10 + str w1, [x29, 60] + bl P2V_block_in_plane + adrp x20, .LANCHOR2 + add x2, x20, :lo12:.LANCHOR2 + and w0, w0, 65535 + ubfiz x21, x0, 1, 16 + ldr x3, [x2, 520] + ldrh w1, [x3, x21] + cbnz w1, .L2552 + ldr x8, [x2, 544] + cbz x8, .L2553 + ldrh w3, [x2, 552] + mov x4, -6148914691236517206 + ldr x2, [x2, 504] + movk x4, 0xaaab, lsl 0 + mov w5, 65535 + sub x8, x8, x2 + asr x8, x8, 1 + mul x8, x8, x4 + mov w4, 6 + and w8, w8, 65535 +.L2554: + cmp w1, w3 + beq .L2553 + cmp w8, w0 + bne .L2555 + add x20, x20, :lo12:.LANCHOR2 + mov w1, w8 + add x0, x20, 544 + bl List_remove_node + ldrh w0, [x20, 552] + sub w0, w0, #1 + strh w0, [x20, 552] + mov w0, w8 + bl INSERT_DATA_LIST + ldr x1, [x20, 520] + ldrh w0, [x1, x21] + add w0, w0, 1 + strh w0, [x1, x21] +.L2553: + add x1, x29, 60 + mov w2, 1 + mov w0, w19 + bl log2phys + ldp x19, x20, [sp, 16] + ldr x21, [sp, 32] + ldp x29, x30, [sp], 64 + ret +.L2555: + umull x8, w8, w4 + ldrh w8, [x2, x8] + cmp w8, w5 + beq .L2553 + add w1, w1, 1 + and w1, w1, 65535 + b .L2554 +.L2552: + add w1, w1, 1 + strh w1, [x3, x21] + b .L2553 + .size FtlReUsePrevPpa, .-FtlReUsePrevPpa + .align 2 + .global FtlRecoverySuperblock + .type FtlRecoverySuperblock, %function +FtlRecoverySuperblock: + stp x29, x30, [sp, -192]! + mov w2, 65535 + add x29, sp, 0 + stp x19, x20, [sp, 16] + mov x20, x0 + stp x21, x22, [sp, 32] + stp x23, x24, [sp, 48] + stp x25, x26, [sp, 64] + stp x27, x28, [sp, 80] + ldrh w0, [x0] + cmp w0, w2 + beq .L2707 + adrp x23, .LANCHOR0 + add x0, x23, :lo12:.LANCHOR0 + ldrh w28, [x20, 2] + ldrh w0, [x0, 2544] + cmp w0, w28 + bne .L2564 + strh wzr, [x20, 4] +.L2714: + strb wzr, [x20, 6] +.L2707: + ldp x19, x20, [sp, 16] + mov w0, 0 + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 192 + ret +.L2564: + ldrh w0, [x20, 16] + mov w1, 0 +.L2565: + cmp w0, w2 + beq .L2566 + ldrb w1, [x20, 6] + str w1, [x29, 152] + ldrb w1, [x20, 8] + cmp w1, 1 + bne .L2567 + bl FtlGetLastWrittenPage + mov w21, w0 + cmn w0, #1 + beq .L2568 + add x0, x23, :lo12:.LANCHOR0 + ldrb w1, [x0, 204] + cbnz w1, .L2640 + add x0, x0, 208 + ldrh w24, [x0, w21, sxtw 1] +.L2569: + add x0, x23, :lo12:.LANCHOR0 + add x1, x20, 16 + mov x4, x1 + str x1, [x29, 168] + adrp x1, .LANCHOR2 + add x1, x1, :lo12:.LANCHOR2 + ldrh w8, [x0, 2556] + mov w26, 0 + ldrh w0, [x0, 2472] + mov w9, 65535 + mov w10, 56 + mov w11, 4 + add x0, x0, 8 + add x0, x20, x0, lsl 1 +.L2570: + cmp x4, x0 + bne .L2572 + ldrb w0, [x20, 8] + cmp w0, 1 + bne .L2641 + add x0, x23, :lo12:.LANCHOR0 + ldrb w0, [x0, 204] + cmp w0, 0 + cset w0, ne + str w0, [x29, 164] +.L2573: + adrp x19, .LANCHOR2 + add x25, x19, :lo12:.LANCHOR2 + ldr w2, [x29, 164] + mov w1, w26 + mov x27, 0 + ldr x0, [x25, 3584] + bl FlashReadPages + ldr w22, [x25, 756] + adrp x0, .LC148 + add x0, x0, :lo12:.LC148 + sub w22, w22, #1 + str x0, [x29, 144] + mov w5, 65535 + adrp x0, .LANCHOR4 + add x0, x0, :lo12:.LANCHOR4 + str x0, [x29, 136] +.L2574: + and w0, w27, 65535 + cmp w26, w0 + bhi .L2579 + bne .L2577 + add x0, x19, :lo12:.LANCHOR2 + add w21, w21, 1 + and w21, w21, 65535 + ldr x0, [x0, 3584] + ldr w0, [x0, 4] +.L2709: + lsr w0, w0, 10 + bl P2V_plane + ldrb w1, [x20, 8] + and w27, w0, 65535 + cmp w1, 1 + bne .L2581 + add x0, x23, :lo12:.LANCHOR0 + ldrb w2, [x0, 204] + cbnz w2, .L2581 + add x0, x0, 208 + ldrh w21, [x0, w21, sxtw 1] +.L2581: + add x0, x23, :lo12:.LANCHOR0 + ldrh w0, [x0, 2544] + cmp w0, w21 + bne .L2582 + strh w21, [x20, 2] + strb wzr, [x20, 6] + strh wzr, [x20, 4] +.L2582: + ldrh w0, [x29, 152] + cmp w21, w28 + str w0, [x29, 144] + ccmp w27, w0, 0, eq + bne .L2583 +.L2715: + mov w2, w27 + mov w1, w21 + mov x0, x20 + bl ftl_sb_update_avl_pages + b .L2707 +.L2566: + add w1, w1, 1 + and w1, w1, 65535 + add x0, x20, w1, sxtw 1 + ldrh w0, [x0, 16] + b .L2565 +.L2567: + mov w1, 0 + bl FtlGetLastWrittenPage + mov w21, w0 + cmn w0, #1 + beq .L2568 +.L2640: + mov w24, w21 + b .L2569 +.L2568: + strh wzr, [x20, 2] + b .L2714 +.L2572: + ldrh w2, [x4] + cmp w2, w9 + beq .L2571 + umull x7, w26, w10 + ldr x6, [x1, 3584] + orr w2, w24, w2, lsl 10 + add w3, w26, 1 + add x6, x6, x7 + str w2, [x6, 4] + mul w2, w26, w8 + and w26, w3, 65535 + ldr x5, [x1, 3584] + ldr x6, [x1, 1400] + sdiv w2, w2, w11 + add x5, x5, x7 + add x2, x6, w2, sxtw 2 + stp xzr, x2, [x5, 8] +.L2571: + add x4, x4, 2 + b .L2570 +.L2641: + str wzr, [x29, 164] + b .L2573 +.L2579: + mov x0, 56 + ldr x4, [x25, 3584] + mul x0, x27, x0 + add x1, x4, x0 + ldr w0, [x4, x0] + cbnz w0, .L2575 + ldr x6, [x1, 16] + ldr w4, [x6, 4] + cmn w4, #1 + beq .L2576 + ldr w1, [x25, 756] + mov w0, w4 + bl ftl_cmp_data_ver + cbz w0, .L2576 + add w4, w4, 1 + str w4, [x25, 756] +.L2576: + ldr w0, [x6] + cmn w0, #1 + bne .L2578 +.L2577: + add x0, x19, :lo12:.LANCHOR2 + and x27, x27, 65535 + mov x1, 56 + and w21, w21, 65535 + ldr x0, [x0, 3584] + madd x27, x27, x1, x0 + ldr w0, [x27, 4] + b .L2709 +.L2575: + ldr w1, [x1, 4] + ldr x0, [x29, 144] + bl printk + ldr x1, [x29, 136] + and w5, w24, 65535 + ldrh w0, [x20] + strh w0, [x1, 1842] +.L2578: + add x27, x27, 1 + b .L2574 +.L2583: + mov w0, 65535 + cmp w5, w0 + bne .L2584 + cbnz w1, .L2585 +.L2584: + add x0, x19, :lo12:.LANCHOR2 + and w6, w24, 65535 + ldr w1, [x0, 3884] + cmn w1, #1 + bne .L2586 + str w22, [x0, 3884] +.L2586: + add x0, x19, :lo12:.LANCHOR2 + ldr w7, [x0, 3884] + add w0, w28, 7 + cmp w0, w24, uxth + bge .L2642 + sub w24, w6, #7 + and w24, w24, 65535 +.L2587: + add x4, x19, :lo12:.LANCHOR2 + mov w3, -1 + add x8, x4, 1500 + mov w26, w3 + mov w5, 65535 +.L2588: + cmp w24, w6 + bhi .L2601 + add x0, x23, :lo12:.LANCHOR0 + mov w25, 0 + mov w10, 56 + ldr x1, [x29, 168] + ldrh w0, [x0, 2472] + add x0, x0, 8 + add x0, x20, x0, lsl 1 + b .L2602 +.L2642: + mov w24, w28 + b .L2587 +.L2590: + ldrh w2, [x1] + cmp w2, w5 + beq .L2589 + ldr x9, [x4, 3584] + orr w2, w24, w2, lsl 10 + umaddl x9, w25, w10, x9 + add w25, w25, 1 + and w25, w25, 65535 + str w2, [x9, 4] +.L2589: + add x1, x1, 2 +.L2602: + cmp x0, x1 + bne .L2590 + ldr w2, [x29, 164] + mov w1, w25 + ldr x0, [x4, 3584] + str x8, [x29, 104] + str w5, [x29, 112] + str w7, [x29, 120] + str w6, [x29, 128] + str w3, [x29, 136] + str x4, [x29, 152] + bl FlashReadPages + ldr x4, [x29, 152] + add x0, x23, :lo12:.LANCHOR0 + mov w1, 56 + ldr w5, [x29, 112] + ldr w7, [x29, 120] + sxtw x9, w24 + ldrb w2, [x0, 204] + ldr x0, [x4, 3584] + ldr w6, [x29, 128] + ldr w3, [x29, 136] + ldr x8, [x29, 104] + nop // between mem op and mult-accumulate + umaddl x25, w25, w1, x0 +.L2591: + cmp x25, x0 + bne .L2600 + add w24, w24, 1 + and w24, w24, 65535 + b .L2588 +.L2600: + ldr w1, [x0] + cbnz w1, .L2592 + ldr x1, [x0, 16] + ldrh w10, [x1] + cmp w10, w5 + beq .L2593 + ldr w1, [x1, 4] + cmn w1, #1 + beq .L2593 + ldr w26, [x4, 3884] + cmn w3, #1 + str w1, [x4, 3884] + bne .L2593 + ldrh w1, [x8, x9, lsl 1] + cmp w1, w5 + bne .L2594 + cbz w2, .L2593 +.L2594: + cmp w22, w26 + csel w3, w3, w26, eq +.L2593: + add x0, x0, 56 + b .L2591 +.L2592: + adrp x0, .LANCHOR4+1842 + ldrh w1, [x20] + strh w1, [x0, #:lo12:.LANCHOR4+1842] + ldrb w0, [x20, 8] + cbnz w0, .L2585 + add x0, x19, :lo12:.LANCHOR2 + add x1, x0, 1500 + ldrh w2, [x1, w24, sxtw 1] + mov w1, 65535 + cmp w2, w1 + bne .L2596 + cmn w3, #1 + beq .L2597 + str w3, [x0, 3884] +.L2585: + adrp x0, .LANCHOR4 + add x1, x0, :lo12:.LANCHOR4 + mov w24, w28 + add x19, x19, :lo12:.LANCHOR2 + mov w2, 1 + str x0, [x29, 120] + strh w2, [x1, 1844] +.L2603: + add x0, x23, :lo12:.LANCHOR0 + ldr x1, [x29, 168] + mov w25, 0 + mov w7, 65535 + ldrb w6, [x0, 204] + ldrh w0, [x0, 2472] + add x0, x0, 8 + add x0, x20, x0, lsl 1 +.L2604: + cmp x0, x1 + bne .L2607 + ldr w2, [x29, 164] + mov w1, w25 + ldr x0, [x19, 3584] + bl FlashReadPages + mov w0, 56 + umull x0, w25, w0 + mov x25, 0 + str x0, [x29, 128] + ldr x0, [x29, 120] + add x0, x0, :lo12:.LANCHOR4 + str x0, [x29, 152] + adrp x0, .LC150 + add x0, x0, :lo12:.LC150 + str x0, [x29, 112] + ldr x0, [x29, 152] + add x0, x0, 1856 + str x0, [x29, 104] +.L2608: + ldr x0, [x29, 128] + cmp x0, x25 + bne .L2633 + ldrb w0, [x20, 8] + add w24, w24, 1 + and w24, w24, 65535 + cmp w0, 1 + bne .L2634 + add x0, x23, :lo12:.LANCHOR0 + ldrb w1, [x0, 204] + cbz w1, .L2634 + ldrh w0, [x0, 2546] + cmp w0, w24 + bne .L2634 + cmp w21, w24 + beq .L2610 +.L2634: + add x0, x23, :lo12:.LANCHOR0 + ldrh w1, [x0, 2544] + cmp w1, w24 + bne .L2603 + ldrh w1, [x0, 2472] + mov w2, 65535 + strh w24, [x20, 2] + mov w0, 0 + strh wzr, [x20, 4] +.L2635: + cmp w0, w1 + beq .L2707 + ldr x4, [x29, 168] + ldrh w3, [x4], 2 + str x4, [x29, 168] + cmp w3, w2 + beq .L2636 + strb w0, [x20, 6] + b .L2707 +.L2597: + cmp w22, w7 + beq .L2598 + str w7, [x0, 3884] + b .L2585 +.L2598: + ldr w1, [x0, 3884] +.L2716: + sub w1, w1, #1 +.L2710: + str w1, [x0, 3884] + b .L2585 +.L2596: + cmp w26, w22 + beq .L2599 + cmn w26, #1 + beq .L2585 + str w26, [x0, 3884] + b .L2585 +.L2599: + ldr w1, [x0, 3884] + cmp w22, w1 + bne .L2716 + b .L2585 +.L2601: + add x0, x19, :lo12:.LANCHOR2 + mov w1, -1 + b .L2710 +.L2607: + ldrh w3, [x1] + cmp w3, w7 + beq .L2605 + mov w2, 56 + ldr x4, [x19, 3584] + orr w3, w24, w3, lsl 10 + umull x5, w25, w2 + add x4, x4, x5 + str w3, [x4, 4] + ldrb w2, [x20, 8] + cmp w2, 1 + bne .L2606 + cbz w6, .L2606 + ldr x2, [x19, 3584] + add x2, x2, x5 + ldr w3, [x2, 4] + orr w3, w3, -2147483648 + str w3, [x2, 4] +.L2606: + add w25, w25, 1 + and w25, w25, 65535 +.L2605: + add x1, x1, 2 + b .L2604 +.L2633: + ldr x4, [x19, 3584] + add x4, x4, x25 + ldr w5, [x4, 4] + str w5, [x29, 188] + lsr w0, w5, 10 + bl P2V_plane + and w0, w0, 65535 + cmp w24, w28 + bcc .L2609 + ldr w1, [x29, 144] + ccmp w1, w0, 0, eq + bhi .L2609 + cmp w24, w21 + ccmp w27, w0, 0, eq + beq .L2610 + ldr w0, [x4] + cmn w0, #1 + beq .L2611 + ldr x3, [x4, 16] + mov w0, 61589 + ldrh w1, [x3] + cmp w1, w0 + beq .L2612 + ldrh w0, [x20] +.L2712: + bl decrement_vpc_count + b .L2609 +.L2612: + ldr w22, [x3, 4] + cmn w22, #1 + beq .L2613 + ldr w1, [x19, 756] + mov w0, w22 + bl ftl_cmp_data_ver + cbz w0, .L2613 + add w0, w22, 1 + str w0, [x19, 756] +.L2613: + ldp w26, w0, [x3, 8] + add x1, x29, 184 + str w0, [x29, 180] + mov w2, 0 + mov w0, w26 + bl log2phys + ldr w1, [x19, 3884] + ldr w3, [x29, 180] + cmn w1, #1 + beq .L2614 + mov w0, w22 + bl ftl_cmp_data_ver + cbz w0, .L2614 + cmn w3, #1 + beq .L2615 + ldr x0, [x19, 3584] + mov w2, 0 + mov w1, 1 + add x0, x0, x25 + ldr x4, [x0, 16] + str w3, [x0, 4] + str x4, [x29, 136] + ldr x0, [x19, 3584] + add x0, x0, x25 + bl FlashReadPages + ldr x0, [x19, 3584] + ldr x4, [x29, 136] + add x3, x0, x25 + ldr w0, [x0, x25] + cmn w0, #1 + bne .L2616 +.L2617: + mov w0, -1 + str w0, [x29, 180] +.L2624: + ldr w4, [x29, 180] + cmn w4, #1 + beq .L2609 +.L2639: + lsr w0, w4, 10 + bl P2V_block_in_plane + ldr x3, [x19, 520] + and w1, w0, 65535 + ubfiz x2, x1, 1, 16 + ldrh w2, [x3, x2] + cbnz w2, .L2712 + adrp x0, .LC149 + add x0, x0, :lo12:.LC149 + bl printk + b .L2609 +.L2615: + ldp w1, w0, [x29, 184] + cmp w1, w0 + bne .L2609 + mov w2, 1 + add x1, x29, 180 + mov w0, w26 + bl log2phys +.L2609: + add x25, x25, 56 + b .L2608 +.L2616: + ldr w0, [x4, 8] + cmp w26, w0 + bne .L2617 + ldr w0, [x4, 4] + str w0, [x29, 136] + str x4, [x29, 96] + uxtw x1, w0 + ldr w0, [x19, 3884] + bl ftl_cmp_data_ver + cbz w0, .L2617 + ldp w0, w1, [x29, 184] + ldr x4, [x29, 96] + cmp w0, w1 + ldr w1, [x29, 180] + bne .L2619 +.L2711: + mov w0, w26 + bl FtlReUsePrevPpa + b .L2617 +.L2619: + cmp w0, w1 + beq .L2617 + cmn w0, #1 + beq .L2620 + ldr x4, [x3, 16] + mov w2, 0 + str w0, [x3, 4] + mov w1, 1 + str x4, [x29, 96] + ldr x0, [x19, 3584] + add x0, x0, x25 + bl FlashReadPages + ldr x4, [x29, 96] +.L2621: + ldr x0, [x19, 3584] + ldr w0, [x0, x25] + cmn w0, #1 + beq .L2622 + ldr w3, [x4, 4] + ldr w0, [x19, 3884] + mov w1, w3 + bl ftl_cmp_data_ver + cbz w0, .L2622 + ldr w0, [x29, 136] + mov w1, w3 + bl ftl_cmp_data_ver + cbz w0, .L2617 +.L2622: + ldr w1, [x29, 180] + b .L2711 +.L2620: + str w0, [x3] + b .L2621 +.L2614: + ldp w1, w0, [x29, 184] + cmp w1, w0 + beq .L2624 + cmn w3, #1 + beq .L2626 + add x0, x23, :lo12:.LANCHOR0 + ubfx x3, x3, 10, 21 + ldr w0, [x0, 2488] + cmp w3, w0 + bcs .L2609 +.L2626: + mov w2, 1 + add x1, x29, 188 + mov w0, w26 + bl log2phys + ldr w4, [x29, 184] + cmn w4, #1 + beq .L2624 + ldr w0, [x29, 180] + cmp w4, w0 + beq .L2639 + lsr w0, w4, 10 + bl P2V_block_in_plane + ldrh w1, [x19, 560] + and w0, w0, 65535 + cmp w1, w0 + beq .L2629 + ldrh w1, [x19, 608] + cmp w1, w0 + beq .L2629 + ldrh w1, [x19, 656] + cmp w1, w0 + bne .L2624 +.L2629: + ldr x0, [x19, 3584] + mov w2, 0 + mov w1, 1 + str w4, [x0, 4] + ldr x3, [x0, 16] + ldr x0, [x19, 3584] + str x3, [x29, 136] + bl FlashReadPages + ldr x0, [x19, 3584] + ldr w0, [x0] + cmn w0, #1 + beq .L2624 + ldr x3, [x29, 136] + mov w0, w22 + ldr w1, [x3, 4] + bl ftl_cmp_data_ver + cbnz w0, .L2624 + mov w2, 1 + add x1, x29, 184 + mov w0, w26 + bl log2phys + b .L2624 +.L2611: + ldr x1, [x29, 152] + mov w2, w22 + ldrh w0, [x20] + strh w0, [x1, 1842] + mov w1, w5 + ldr x0, [x29, 112] + bl printk + ldr x0, [x29, 152] + ldr w0, [x0, 1848] + cmp w0, 31 + bhi .L2631 + ldr x2, [x29, 104] + ldr w1, [x29, 188] + str w1, [x2, w0, uxtw 2] + add w0, w0, 1 + ldr x1, [x29, 152] + str w0, [x1, 1848] +.L2631: + ldrh w0, [x20] + bl decrement_vpc_count + ldr w0, [x19, 3884] + cmn w0, #1 + bne .L2632 +.L2713: + str w22, [x19, 3884] + b .L2609 +.L2632: + cmp w22, w0 + bcs .L2609 + b .L2713 +.L2636: + add w0, w0, 1 + and w0, w0, 65535 + b .L2635 +.L2610: + strb w27, [x20, 6] + strh w21, [x20, 2] + b .L2715 + .size FtlRecoverySuperblock, .-FtlRecoverySuperblock + .align 2 + .global FtlVpcCheckAndModify + .type FtlVpcCheckAndModify, %function +FtlVpcCheckAndModify: + stp x29, x30, [sp, -80]! + adrp x1, .LANCHOR3 + add x1, x1, :lo12:.LANCHOR3 + adrp x0, .LC109 + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x20, .LANCHOR2 + stp x23, x24, [sp, 48] + add x23, x20, :lo12:.LANCHOR2 + stp x21, x22, [sp, 32] + adrp x21, .LANCHOR0 + add x22, x21, :lo12:.LANCHOR0 + add x1, x1, 232 + add x0, x0, :lo12:.LC109 + bl printk + ldr x0, [x23, 3704] + mov w1, 0 + ldrh w2, [x22, 2482] + mov w19, 0 + lsl w2, w2, 1 + bl ftl_memset +.L2718: + ldr w0, [x22, 2616] + cmp w19, w0 + bcc .L2720 + adrp x22, .LC151 + add x23, x21, :lo12:.LANCHOR0 + add x20, x20, :lo12:.LANCHOR2 + add x22, x22, :lo12:.LC151 + mov w19, 0 + mov w24, 65535 +.L2721: + ldrh w0, [x23, 2480] + cmp w0, w19 + bhi .L2724 + bl l2p_flush + bl FtlVpcTblFlush + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x29, x30, [sp], 80 + ret +.L2720: + mov w2, 0 + add x1, x29, 76 + mov w0, w19 + bl log2phys + ldr w0, [x29, 76] + cmn w0, #1 + beq .L2719 + lsr w0, w0, 10 + bl P2V_block_in_plane + ldr x2, [x23, 3704] + ubfiz x0, x0, 1, 16 + ldrh w1, [x2, x0] + add w1, w1, 1 + strh w1, [x2, x0] +.L2719: + add w19, w19, 1 + b .L2718 +.L2724: + ldr x0, [x20, 520] + ubfiz x21, x19, 1, 16 + ldrh w2, [x0, x21] + ldr x0, [x20, 3704] + ldrh w3, [x0, x21] + cmp w2, w3 + beq .L2722 + cmp w2, w24 + beq .L2722 + ldrh w0, [x20, 560] + cmp w0, w19 + beq .L2722 + ldrh w0, [x20, 656] + cmp w0, w19 + beq .L2722 + ldrh w0, [x20, 608] + cmp w0, w19 + beq .L2722 + mov w1, w19 + mov x0, x22 + bl printk + ldr x0, [x20, 520] + ldrh w1, [x0, x21] + cbnz w1, .L2723 + ldr x1, [x20, 3704] + ldrh w1, [x1, x21] + strh w1, [x0, x21] +.L2722: + add w19, w19, 1 + and w19, w19, 65535 + b .L2721 +.L2723: + ldr x1, [x20, 3704] + ldrh w1, [x1, x21] + strh w1, [x0, x21] + mov w0, w19 + bl update_vpc_list + b .L2722 + .size FtlVpcCheckAndModify, .-FtlVpcCheckAndModify + .align 2 + .global FtlGcScanTempBlk + .type FtlGcScanTempBlk, %function +FtlGcScanTempBlk: + stp x29, x30, [sp, -208]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + mov x19, x0 + adrp x0, .LANCHOR1 + stp x21, x22, [sp, 32] + str w1, [x29, 132] + add x1, x0, :lo12:.LANCHOR1 + stp x23, x24, [sp, 48] + stp x25, x26, [sp, 64] + stp x27, x28, [sp, 80] + str x0, [x29, 120] + ldrh w28, [x1, 3456] + mov w1, 65535 + cmp w28, w1 + beq .L2760 + cbnz w28, .L2730 +.L2731: + bl FtlGcPageVarInit + b .L2732 +.L2760: + mov w28, 0 +.L2730: + adrp x0, .LANCHOR0+2544 + ldr w1, [x29, 132] + ldrh w0, [x0, #:lo12:.LANCHOR0+2544] + cmp w0, w1 + beq .L2731 +.L2732: + adrp x25, .LANCHOR2 + mov x21, x25 + add x26, x25, :lo12:.LANCHOR2 + mov w0, -1 + mov w24, 0 + str w0, [x29, 136] +.L2733: + ldrh w0, [x19] + mov w23, 65535 + strb wzr, [x19, 8] + cmp w0, w23 + beq .L2761 +.L2757: + adrp x20, .LANCHOR0 + add x0, x20, :lo12:.LANCHOR0 + add x2, x19, 16 + add x4, x25, :lo12:.LANCHOR2 + mov w22, 0 + mov w10, 56 + ldrh w8, [x0, 2554] + mov w7, 4 + ldrh w9, [x0, 2556] + ldrh w0, [x0, 2472] + add x0, x0, 8 + add x0, x19, x0, lsl 1 +.L2735: + cmp x2, x0 + bne .L2737 + add x0, x25, :lo12:.LANCHOR2 + mov w1, w22 + mov w2, 0 + add x27, x20, :lo12:.LANCHOR0 + ldr x0, [x0, 3584] + bl FlashReadPages + mov w0, 56 + umull x0, w22, w0 + mov x22, 0 + str x0, [x29, 112] +.L2738: + ldr x0, [x29, 112] + cmp x0, x22 + bne .L2755 + ldr w0, [x29, 132] + add w3, w28, 1 + add w24, w24, 1 + and w28, w3, 65535 + cmp w0, w24 + bls .L2756 +.L2758: + add x20, x20, :lo12:.LANCHOR0 + ldrh w0, [x20, 2544] + cmp w0, w28 + bhi .L2757 +.L2761: + mov w2, 0 + b .L2734 +.L2737: + ldrh w1, [x2] + cmp w1, w23 + beq .L2736 + umull x11, w22, w10 + ldr x6, [x4, 3584] + orr w1, w28, w1, lsl 10 + add x6, x6, x11 + str w1, [x6, 4] + mul w1, w22, w8 + ldr x5, [x4, 3584] + ldr x6, [x4, 1392] + sdiv w1, w1, w7 + add x5, x5, x11 + add x1, x6, w1, sxtw 2 + str x1, [x5, 8] + mul w1, w22, w9 + ldr x6, [x4, 1400] + add w22, w22, 1 + and w22, w22, 65535 + sdiv w1, w1, w7 + add x1, x6, w1, sxtw 2 + str x1, [x5, 16] +.L2736: + add x2, x2, 2 + b .L2735 +.L2755: + ldr x5, [x26, 3584] + add x4, x5, x22 + ldr w0, [x4, 4] + str w0, [x29, 140] + uxtw x1, w0 + lsr w0, w1, 10 + bl P2V_plane + and w2, w0, 65535 + ldr w0, [x5, x22] + ldr x4, [x4, 16] + cbnz w0, .L2739 + ldrh w0, [x4] + cmp w0, w23 + bne .L2740 +.L2743: + add x20, x20, :lo12:.LANCHOR0 + ldrb w0, [x20, 204] + cbz w0, .L2777 + add x21, x21, :lo12:.LANCHOR2 + mov w0, 1 + str w0, [x21, 3880] +.L2734: + ldr x0, [x29, 120] + mov w1, -1 + strh w28, [x19, 2] + add x0, x0, :lo12:.LANCHOR1 + strb w2, [x19, 6] + strh w1, [x0, 3456] + mov w1, w28 + mov x0, x19 + bl ftl_sb_update_avl_pages + b .L2729 +.L2740: + ldr w0, [x4, 8] + ldr w1, [x27, 2616] + cmp w0, w1 + bhi .L2743 + ldrb w1, [x27, 72] + cbnz w1, .L2746 +.L2747: + ldp w2, w0, [x4, 8] + add x22, x22, 56 + ldr w1, [x29, 140] + bl FtlGcUpdatePage + b .L2738 +.L2746: + add x1, x29, 148 + str x4, [x29, 104] + mov w2, 0 + bl log2phys + ldr x4, [x29, 104] + ldr w1, [x29, 148] + ldr w0, [x4, 12] + cmp w0, w1 + bne .L2747 + cmn w0, #1 + beq .L2747 + str w0, [x29, 156] + mov w2, 0 + ldr x0, [x26, 3648] + mov w1, 1 + str x0, [x29, 160] + ldr x0, [x26, 3664] + str x0, [x29, 168] + add x0, x29, 152 + bl FlashReadPages + ldrh w1, [x27, 2550] + mov x0, 0 + ldr x2, [x26, 3584] + ldr x4, [x29, 104] + ldr x5, [x29, 160] + ubfiz x1, x1, 9, 16 + add x2, x2, x22 +.L2748: + cmp x0, x1 + beq .L2747 + ldr x6, [x2, 8] + ldr w7, [x6, x0] + add x0, x0, 4 + add x6, x5, x0 + ldr w6, [x6, -4] + cmp w7, w6 + beq .L2748 + ldrh w1, [x19] + adrp x0, .LC152 + ldr w2, [x29, 156] + add x0, x0, :lo12:.LC152 + bl printk +.L2777: + add x13, x21, :lo12:.LANCHOR2 + ldrh w1, [x19] + ldr x0, [x13, 520] + strh wzr, [x0, x1, lsl 1] + ldrh w0, [x19] + bl INSERT_FREE_LIST + mov w0, -1 + strh w0, [x19] + strh w0, [x13, 800] +.L2776: + bl FtlGcPageVarInit + mov w28, 0 + b .L2733 +.L2739: + ldrh w1, [x19] + add x20, x20, :lo12:.LANCHOR0 + ldr w2, [x29, 140] + adrp x0, .LC153 + add x0, x0, :lo12:.LC153 + bl printk + ldr w1, [x20, 2372] + ldrh w0, [x19] + cbnz w1, .L2751 + ldrb w1, [x20, 204] + cbz w1, .L2752 +.L2751: + add x2, x21, :lo12:.LANCHOR2 + ubfiz x1, x0, 1, 16 + ldr x2, [x2, 440] + ldrh w1, [x2, x1] + cmp w1, 159 + bls .L2753 +.L2752: + add x1, x21, :lo12:.LANCHOR2 + ldr x1, [x1, 3584] + ldr w1, [x1, x22] + cmn w1, #1 + bne .L2754 +.L2753: + add x1, x21, :lo12:.LANCHOR2 + ldr x1, [x1, 3584] + add x22, x1, x22 + ldr w1, [x22, 4] + str w1, [x29, 136] +.L2754: + add x1, x21, :lo12:.LANCHOR2 + ubfiz x0, x0, 1, 16 + ldr x1, [x1, 520] + strh wzr, [x1, x0] + ldrh w0, [x19] + bl INSERT_FREE_LIST + mov w0, -1 + strh w0, [x19] + b .L2776 +.L2756: + ldr x0, [x29, 120] + add x1, x0, :lo12:.LANCHOR1 + ldrh w0, [x1, 3456] + cmp w0, w23 + beq .L2758 + add w0, w0, w24 + strh w0, [x1, 3456] + add x0, x20, :lo12:.LANCHOR0 + ldrh w0, [x0, 2544] + cmp w0, w28 + bls .L2758 +.L2729: + ldr w0, [x29, 136] + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 208 + ret + .size FtlGcScanTempBlk, .-FtlGcScanTempBlk + .align 2 + .global FtlReadRefresh + .type FtlReadRefresh, %function +FtlReadRefresh: + adrp x1, .LANCHOR2 + add x0, x1, :lo12:.LANCHOR2 + add x2, x0, 848 + ldr w3, [x2, 80] + cbz w3, .L2779 + adrp x1, .LANCHOR0 + add x1, x1, :lo12:.LANCHOR0 + ldr w4, [x2, 84] + ldr w3, [x1, 2616] + cmp w4, w3 + bcs .L2780 + stp x29, x30, [sp, -112]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + mov x19, x0 + mov x20, x1 + stp x21, x22, [sp, 32] + mov w21, 2048 +.L2785: + add x22, x19, 848 + ldr w1, [x20, 2616] + ldr w0, [x22, 84] + cmp w0, w1 + bcc .L2781 +.L2784: + ldp x19, x20, [sp, 16] + mov w0, -1 + ldp x21, x22, [sp, 32] + ldp x29, x30, [sp], 112 + ret +.L2781: + add x1, x29, 52 + mov w2, 0 + bl log2phys + ldr w0, [x22, 84] + ldr w1, [x29, 52] + add w0, w0, 1 + str w0, [x22, 84] + cmn w1, #1 + beq .L2783 + str w0, [x29, 80] + add x0, x29, 112 + str w1, [x29, 60] + mov w2, 0 + stp xzr, xzr, [x29, 64] + mov w1, 1 + str wzr, [x0, -56]! + bl FlashReadPages + ldr w0, [x29, 56] + cmp w0, 256 + bne .L2784 + ldr w0, [x29, 52] + lsr w0, w0, 10 + bl P2V_block_in_plane + bl FtlGcRefreshBlock + b .L2784 +.L2783: + subs w21, w21, #1 + bne .L2785 + b .L2784 +.L2780: + ldr w0, [x0, 720] + stp w0, wzr, [x2, 76] + str wzr, [x2, 84] +.L2792: + mov w0, 0 + ret +.L2779: + ldr w4, [x0, 772] + mov w3, 10000 + ldr w5, [x0, 720] + mov w6, 31 + cmp w4, w3 + ldr w7, [x2, 76] + mov w3, 63 + csel w6, w6, w3, hi + add w3, w5, 1048576 + cmp w7, w3 + bhi .L2789 + adrp x3, .LANCHOR0+2616 + mov w8, 1000 + lsr w4, w4, 10 + ldr w3, [x3, #:lo12:.LANCHOR0+2616] + add w4, w4, 1 + mul w3, w3, w8 + udiv w3, w3, w4 + add w3, w3, w7 + cmp w5, w3 + bhi .L2789 + ldrh w0, [x0, 484] + tst w6, w0 + bne .L2792 + ldr w2, [x2, 100] + cmp w0, w2 + beq .L2792 +.L2789: + add x0, x1, :lo12:.LANCHOR2 + add x1, x0, 848 + ldrh w0, [x0, 484] + str w0, [x1, 100] + str w5, [x1, 76] + mov w0, 1 + str wzr, [x1, 84] + str w0, [x1, 80] + b .L2792 + .size FtlReadRefresh, .-FtlReadRefresh + .align 2 + .global FtlGcFreeTempBlock + .type FtlGcFreeTempBlock, %function +FtlGcFreeTempBlock: + stp x29, x30, [sp, -112]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x19, .LANCHOR2 + add x2, x19, :lo12:.LANCHOR2 + stp x21, x22, [sp, 32] + stp x23, x24, [sp, 48] + adrp x21, .LANCHOR0 + stp x25, x26, [sp, 64] + add x1, x21, :lo12:.LANCHOR0 + str x27, [sp, 80] + ldr w3, [x2, 424] + ldrh w1, [x1, 2544] + cbz w3, .L2799 +.L2836: + mov w0, 0 +.L2798: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldr x27, [sp, 80] + ldp x29, x30, [sp], 112 + ret +.L2799: + ldrh w20, [x2, 656] + mov w3, 65535 + cmp w20, w3 + bne .L2801 +.L2810: + add x20, x19, :lo12:.LANCHOR2 + mov w0, 65535 + add x22, x20, 656 + ldrh w1, [x20, 656] + str wzr, [x20, 3880] + cmp w1, w0 + beq .L2836 + add x23, x21, :lo12:.LANCHOR0 + bl FtlCacheWriteBack + ldrb w0, [x22, 7] + mov w26, 12 + ldr x1, [x20, 520] + mov w22, 0 + ldrh w3, [x23, 2544] + ldrh w2, [x20, 656] + mul w0, w0, w3 + strh w0, [x1, x2, lsl 1] + ldr w1, [x20, 740] + ldrh w0, [x20, 1432] + add w0, w0, w1 + str w0, [x20, 740] +.L2811: + ldrh w0, [x20, 1432] + cmp w0, w22 + bhi .L2815 + mov w0, -1 + bl decrement_vpc_count + add x0, x21, :lo12:.LANCHOR0 + ldrb w0, [x0, 204] + cbz w0, .L2816 + ldrh w1, [x20, 656] + adrp x0, .LC154 + add x0, x0, :lo12:.LC154 + bl printk +.L2816: + add x1, x19, :lo12:.LANCHOR2 + ldrh w0, [x1, 656] + ldr x1, [x1, 520] + ubfiz x2, x0, 1, 16 + ldrh w1, [x1, x2] + cbz w1, .L2817 + bl INSERT_DATA_LIST +.L2818: + add x20, x19, :lo12:.LANCHOR2 + mov w22, -1 + strh wzr, [x20, 1432] + strh w22, [x20, 656] + strh wzr, [x20, 1420] + bl l2p_flush + bl FtlVpcTblFlush + strh w22, [x20, 800] + add x0, x21, :lo12:.LANCHOR0 + ldr w0, [x0, 2372] + cbz w0, .L2819 + ldr w0, [x20, 776] + cmp w0, 39 + bhi .L2819 + ldrh w0, [x20, 780] + ldrh w1, [x20, 552] + cmp w1, w0 + bcs .L2836 + ubfiz w0, w0, 1, 15 + strh w0, [x20, 1364] + b .L2836 +.L2801: + cbz w0, .L2804 + adrp x0, .LANCHOR1 + add x0, x0, :lo12:.LANCHOR1 + ldrh w4, [x0, 3456] + cmp w4, w3 + beq .L2805 +.L2806: + mov w1, 2 +.L2804: + add x22, x19, :lo12:.LANCHOR2 + add x0, x22, 656 + bl FtlGcScanTempBlk + str w0, [x29, 108] + cmn w0, #1 + beq .L2807 + ldr x1, [x22, 440] + ubfiz x20, x20, 1, 16 + ldrh w0, [x1, x20] + cmp w0, 4 + bls .L2808 + sub w0, w0, #5 + strh w0, [x1, x20] + mov w0, 1 + bl FtlEctTblFlush +.L2808: + add x0, x19, :lo12:.LANCHOR2 + ldr w1, [x0, 3880] + cbnz w1, .L2809 + ldr w1, [x0, 944] + add w1, w1, 1 + str w1, [x0, 944] + ldr w0, [x29, 108] + lsr w0, w0, 10 + bl FtlBbmMapBadBlock + bl FtlBbmTblFlush +.L2809: + add x19, x19, :lo12:.LANCHOR2 + str wzr, [x19, 3880] +.L2821: + mov w0, 1 + b .L2798 +.L2805: + strh wzr, [x0, 3456] + ldrh w0, [x2, 552] + cmp w0, 17 + bhi .L2806 + b .L2804 +.L2807: + adrp x0, .LANCHOR1+3456 + ldrh w1, [x0, #:lo12:.LANCHOR1+3456] + mov w0, 65535 + cmp w1, w0 + bne .L2821 + b .L2810 +.L2815: + umull x25, w22, w26 + ldr x27, [x20, 1440] + ldr w1, [x23, 2616] + add x24, x27, x25 + ldr w0, [x24, 8] + cmp w0, w1 + bcc .L2812 +.L2833: + ldrh w0, [x20, 656] + b .L2834 +.L2812: + add x1, x29, 108 + mov w2, 0 + bl log2phys + ldr w0, [x27, x25] + ldr w1, [x29, 108] + cmp w0, w1 + bne .L2814 + lsr w0, w0, 10 + bl P2V_block_in_plane + mov w25, w0 + ldr w0, [x24, 8] + mov w2, 1 + add x1, x24, 4 + bl log2phys + mov w0, w25 +.L2834: + bl decrement_vpc_count + b .L2813 +.L2814: + ldr w0, [x24, 4] + cmp w1, w0 + bne .L2833 +.L2813: + add w22, w22, 1 + and w22, w22, 65535 + b .L2811 +.L2817: + bl INSERT_FREE_LIST + b .L2818 +.L2819: + add x19, x19, :lo12:.LANCHOR2 + ldrh w0, [x19, 780] + ldrh w1, [x19, 552] + add w2, w0, w0, lsl 1 + cmp w1, w2, lsr 2 + ble .L2836 + add x21, x21, :lo12:.LANCHOR0 + ldrb w1, [x21, 204] + cbz w1, .L2820 + sub w0, w0, #2 +.L2835: + strh w0, [x19, 1364] + b .L2836 +.L2820: + mov w0, 20 + b .L2835 + .size FtlGcFreeTempBlock, .-FtlGcFreeTempBlock + .align 2 + .global FtlGcPageRecovery + .type FtlGcPageRecovery, %function +FtlGcPageRecovery: + stp x29, x30, [sp, -48]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x20, .LANCHOR0 + add x20, x20, :lo12:.LANCHOR0 + adrp x19, .LANCHOR2 + add x19, x19, :lo12:.LANCHOR2 + str x21, [sp, 32] + add x21, x19, 656 + ldrh w1, [x20, 2544] + mov x0, x21 + bl FtlGcScanTempBlk + ldrh w1, [x19, 658] + ldrh w0, [x20, 2544] + cmp w1, w0 + bcc .L2837 + add x0, x19, 3792 + bl FtlMapBlkWriteDumpData + mov w0, 0 + bl FtlGcFreeTempBlock + str wzr, [x19, 3880] +.L2837: + ldp x19, x20, [sp, 16] + ldr x21, [sp, 32] + ldp x29, x30, [sp], 48 + ret + .size FtlGcPageRecovery, .-FtlGcPageRecovery + .align 2 + .global FtlPowerLostRecovery + .type FtlPowerLostRecovery, %function +FtlPowerLostRecovery: + stp x29, x30, [sp, -32]! + adrp x0, .LANCHOR4+1848 + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x19, .LANCHOR2 + add x19, x19, :lo12:.LANCHOR2 + str wzr, [x0, #:lo12:.LANCHOR4+1848] + add x20, x19, 560 + add x19, x19, 608 + mov x0, x20 + bl FtlRecoverySuperblock + mov x0, x20 + bl FtlSlcSuperblockCheck + mov x0, x19 + bl FtlRecoverySuperblock + mov x0, x19 + bl FtlSlcSuperblockCheck + bl FtlGcPageRecovery + mov w0, -1 + bl decrement_vpc_count + mov w0, 0 + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 32 + ret + .size FtlPowerLostRecovery, .-FtlPowerLostRecovery + .align 2 + .global FtlSysBlkInit + .type FtlSysBlkInit, %function +FtlSysBlkInit: + stp x29, x30, [sp, -64]! + mov w1, -1 + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x20, .LANCHOR0 + stp x23, x24, [sp, 48] + add x24, x20, :lo12:.LANCHOR0 + stp x21, x22, [sp, 32] + adrp x21, .LANCHOR4 + add x0, x21, :lo12:.LANCHOR4 + adrp x19, .LANCHOR2 + add x23, x19, :lo12:.LANCHOR2 + strh w1, [x0, 1842] + strh wzr, [x0, 1844] + ldrh w0, [x24, 2476] + bl FtlFreeSysBlkQueueInit + bl FtlScanSysBlk + ldrh w1, [x23, 784] + mov w0, 65535 + cmp w1, w0 + bne .L2843 +.L2845: + mov w22, -1 +.L2842: + mov w0, w22 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x29, x30, [sp], 64 + ret +.L2843: + bl FtlLoadSysInfo + mov w22, w0 + cbnz w0, .L2845 + bl FtlLoadMapInfo + bl FtlLoadVonderInfo + bl Ftl_load_ext_data + bl FtlLoadEctTbl + bl FtlFreeSysBLkSort + bl SupperBlkListInit + bl FtlPowerLostRecovery + mov w0, 1 + bl FtlUpdateVaildLpn + ldr x1, [x23, 704] + mov w0, 0 + ldrh w3, [x24, 2582] + add x1, x1, 4 +.L2846: + cmp w0, w3 + bge .L2851 + ldr w2, [x1], 16 + tbz w2, #31, .L2847 +.L2851: + add x1, x19, :lo12:.LANCHOR2 + cmp w0, w3 + ldrh w2, [x1, 484] + add w2, w2, 1 + strh w2, [x1, 484] + bge .L2858 +.L2848: + add x0, x19, :lo12:.LANCHOR2 + ldrh w2, [x0, 560] + ldr x4, [x0, 520] + ldrh w5, [x0, 564] + lsl x2, x2, 1 + ldrh w3, [x4, x2] + sub w3, w3, w5 + strh w3, [x4, x2] + add x4, x20, :lo12:.LANCHOR0 + strb wzr, [x0, 566] + ldr x5, [x0, 520] + strh wzr, [x0, 564] + ldrh w2, [x4, 2544] + strh w2, [x0, 562] + ldrh w2, [x0, 608] + ldrh w6, [x0, 612] + lsl x2, x2, 1 + ldrh w3, [x5, x2] + sub w3, w3, w6 + strh w3, [x5, x2] + strb wzr, [x0, 614] + ldrh w1, [x0, 486] + ldrh w2, [x4, 2544] + add w1, w1, 1 + strh w2, [x0, 610] + strh w1, [x0, 486] + strh wzr, [x0, 612] + bl l2p_flush + bl FtlVpcTblFlush + bl FtlVpcTblFlush + b .L2852 +.L2847: + add w0, w0, 1 + b .L2846 +.L2858: + add x21, x21, :lo12:.LANCHOR4 + ldrh w0, [x21, 1844] + cbnz w0, .L2848 +.L2852: + add x21, x19, :lo12:.LANCHOR2 + mov w1, 65535 + add x24, x21, 560 + ldrh w0, [x21, 560] + cmp w0, w1 + beq .L2853 + ldrh w1, [x21, 564] + cbnz w1, .L2853 + ldrh w1, [x21, 612] + add x23, x21, 608 + cbnz w1, .L2853 + bl FtlGcRefreshOpenBlock + ldrh w0, [x21, 608] + bl FtlGcRefreshOpenBlock + bl FtlVpcTblFlush + mov x0, x24 + bl allocate_new_data_superblock + mov x0, x23 + bl allocate_new_data_superblock +.L2853: + add x20, x20, :lo12:.LANCHOR0 + ldrb w0, [x20, 72] + cbnz w0, .L2854 + add x19, x19, :lo12:.LANCHOR2 + ldrh w0, [x19, 484] + tst x0, 31 + bne .L2842 +.L2854: + bl FtlVpcCheckAndModify + b .L2842 + .size FtlSysBlkInit, .-FtlSysBlkInit + .align 2 + .global FtlLowFormat + .type FtlLowFormat, %function +FtlLowFormat: + stp x29, x30, [sp, -64]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x19, .LANCHOR2 + stp x21, x22, [sp, 32] + add x21, x19, :lo12:.LANCHOR2 + stp x23, x24, [sp, 48] + ldr w0, [x21, 424] + cbnz w0, .L2862 + adrp x20, .LANCHOR0 + add x22, x20, :lo12:.LANCHOR0 + ldr x0, [x21, 3760] + mov w1, 0 + ldrh w2, [x22, 2580] + lsl w2, w2, 2 + bl ftl_memset + ldr x0, [x21, 3752] + mov w1, 0 + ldrh w2, [x22, 2580] + lsl w2, w2, 2 + bl ftl_memset + ldrh w0, [x22, 2476] + str wzr, [x21, 752] + str wzr, [x21, 756] + bl FtlFreeSysBlkQueueInit + bl FtlLoadBbt + cbz w0, .L2863 + bl FtlMakeBbt +.L2863: + mov w5, 23752 + add x2, x20, :lo12:.LANCHOR0 + add x3, x19, :lo12:.LANCHOR2 + mov w0, 0 + movk w5, 0xa0f, lsl 16 +.L2864: + ldrh w1, [x2, 2550] + cmp w0, w1, lsl 7 + blt .L2865 + ldrh w22, [x2, 2480] + add x23, x20, :lo12:.LANCHOR0 + mov w21, 0 +.L2866: + ldrh w0, [x23, 2482] + cmp w0, w22 + bhi .L2867 + ldrh w0, [x23, 2472] + sub w1, w21, #3 + cmp w1, w0, lsl 1 + blt .L2868 + udiv w0, w21, w0 + ldr w21, [x23, 2576] + add w0, w0, w21 + bl FtlSysBlkNumInit + ldrh w0, [x23, 2476] + mov w21, 0 + bl FtlFreeSysBlkQueueInit + ldrh w22, [x23, 2480] + add x23, x20, :lo12:.LANCHOR0 +.L2869: + ldrh w0, [x23, 2482] + cmp w0, w22 + bhi .L2870 +.L2868: + add x23, x20, :lo12:.LANCHOR0 + mov w22, 0 + mov w24, 0 +.L2871: + ldrh w0, [x23, 2480] + cmp w0, w24 + bhi .L2872 + add x1, x19, :lo12:.LANCHOR2 + ldrh w0, [x23, 2482] + ldr w2, [x23, 2484] + str w0, [x1, 3572] + ldrh w0, [x23, 2472] + udiv w4, w2, w0 + ubfx x3, x4, 5, 16 + str w4, [x23, 2616] + add w5, w3, 36 + strh w5, [x1, 780] + mov w5, 24 + mul w5, w0, w5 + cmp w22, w5 + ble .L2873 + sub w2, w2, w22 + udiv w2, w2, w0 + str w2, [x23, 2616] + lsr w2, w2, 5 + add w2, w2, 24 + strh w2, [x1, 780] +.L2873: + add x1, x20, :lo12:.LANCHOR0 + ldr w1, [x1, 2372] + cmp w1, 1 + bne .L2874 + udiv w2, w22, w0 + add x1, x19, :lo12:.LANCHOR2 + ldrh w5, [x1, 780] + add w2, w2, w5 + add w2, w5, w2, asr 2 + strh w2, [x1, 780] +.L2874: + add x1, x20, :lo12:.LANCHOR0 + ldrb w1, [x1, 204] + cbz w1, .L2875 + udiv w2, w22, w0 + add x1, x19, :lo12:.LANCHOR2 + ldrh w5, [x1, 780] + add w2, w2, w5 + add w2, w5, w2, asr 2 + strh w2, [x1, 780] +.L2875: + add x6, x20, :lo12:.LANCHOR0 + ldrh w1, [x6, 2538] + cbz w1, .L2877 + add x2, x19, :lo12:.LANCHOR2 + ldrh w5, [x2, 780] + add w5, w5, w1, lsr 1 + strh w5, [x2, 780] + mul w5, w1, w0 + cmp w22, w5 + bge .L2877 + add w1, w1, 32 + str w4, [x6, 2616] + add w1, w3, w1 + strh w1, [x2, 780] +.L2877: + add x24, x20, :lo12:.LANCHOR0 + add x1, x19, :lo12:.LANCHOR2 + adrp x23, .LANCHOR4 + ldrh w2, [x1, 780] + ldr w1, [x24, 2616] + sub w1, w1, w2 + mul w0, w1, w0 + add x1, x23, :lo12:.LANCHOR4 + str w0, [x1, 1768] + ldrh w1, [x24, 2544] + mul w0, w1, w0 + ldrh w1, [x24, 2550] + str w0, [x24, 2616] + mul w0, w1, w0 + str w0, [x24, 2584] + bl FtlBbmTblFlush + ldrh w0, [x24, 2558] + add w1, w21, w22 + ldr w2, [x24, 2488] + add w0, w0, w2, lsr 3 + cmp w1, w0 + bls .L2879 + adrp x0, .LC155 + lsr w2, w2, 5 + add x0, x0, :lo12:.LC155 + bl printk +.L2879: + add x22, x20, :lo12:.LANCHOR0 + add x20, x19, :lo12:.LANCHOR2 + add x21, x20, 560 + mov w1, 0 + mov w24, -1 + ldr x0, [x20, 520] + ldrh w2, [x22, 2482] + lsl w2, w2, 1 + bl ftl_memset + mov w0, 1 + strb w0, [x21, 8] + ldr x0, [x22, 64] + mov w1, 255 + ldrh w2, [x22, 2480] + strh w24, [x20, 800] + strh wzr, [x20, 802] + strb wzr, [x20, 806] + lsr w2, w2, 3 + strb wzr, [x20, 808] + strh wzr, [x21, 2] + strb wzr, [x21, 6] + strh wzr, [x20, 560] + str wzr, [x20, 716] + bl ftl_memset +.L2880: + mov x0, x21 + bl make_superblock + ldrb w1, [x21, 7] + ldrh w0, [x21] + cbnz w1, .L2881 + ldr x1, [x20, 520] + ubfiz x0, x0, 1, 16 + strh w24, [x1, x0] + ldrh w0, [x21] + add w0, w0, 1 + strh w0, [x21] + b .L2880 +.L2865: + ldr x6, [x3, 3640] + ubfiz x4, x0, 2, 16 + mvn w1, w0 + orr w1, w0, w1, lsl 16 + add w0, w0, 1 + and w0, w0, 65535 + str w1, [x6, x4] + ldr x1, [x3, 3648] + str w5, [x1, x4] + b .L2864 +.L2867: + mov w0, w22 + mov w1, 1 + add w22, w22, 1 + bl FtlLowFormatEraseBlock + add w21, w21, w0 + and w22, w22, 65535 + and w21, w21, 65535 + b .L2866 +.L2870: + mov w0, w22 + mov w1, 1 + add w22, w22, 1 + bl FtlLowFormatEraseBlock + add w21, w21, w0 + and w22, w22, 65535 + and w21, w21, 65535 + b .L2869 +.L2872: + mov w0, w24 + mov w1, 0 + add w24, w24, 1 + bl FtlLowFormatEraseBlock + add w22, w22, w0 + and w24, w24, 65535 + and w22, w22, 65535 + b .L2871 +.L2881: + ldr w1, [x20, 752] + ubfiz x0, x0, 1, 16 + str w1, [x21, 12] + add x19, x19, :lo12:.LANCHOR2 + add w1, w1, 1 + str w1, [x20, 752] + ldr x1, [x20, 520] + mov w13, -1 + ldrh w2, [x21, 4] + strh w2, [x1, x0] + add x0, x20, 608 + mov x12, x0 + strh wzr, [x20, 610] + ldrh w1, [x21] + strb wzr, [x20, 614] + add w1, w1, 1 + strh w1, [x20, 608] + mov w1, 1 + strb w1, [x20, 616] +.L2882: + mov x0, x12 + bl make_superblock + ldrb w1, [x12, 7] + ldrh w0, [x12] + cbnz w1, .L2883 + ldr x1, [x19, 520] + ubfiz x0, x0, 1, 16 + strh w13, [x1, x0] + ldrh w0, [x12] + add w0, w0, 1 + strh w0, [x12] + b .L2882 +.L2883: + ldr w1, [x19, 752] + ubfiz x0, x0, 1, 16 + str w1, [x12, 12] + add x23, x23, :lo12:.LANCHOR4 + add w1, w1, 1 + str w1, [x19, 752] + ldr x1, [x19, 520] + mov w20, -1 + ldrh w2, [x12, 4] + strh w2, [x1, x0] + strh w20, [x19, 656] + bl FtlFreeSysBlkQueueOut + strh w0, [x19, 784] + ldr w0, [x23, 1768] + strh w0, [x19, 790] + ldr w0, [x19, 752] + str w0, [x19, 792] + add w0, w0, 1 + strh wzr, [x19, 786] + strh w20, [x19, 788] + str w0, [x19, 752] + bl FtlVpcTblFlush + bl FtlSysBlkInit + cbnz w0, .L2862 + adrp x0, .LANCHOR1+504 + mov w1, 1 + str w1, [x0, #:lo12:.LANCHOR1+504] +.L2862: + mov w0, 0 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x29, x30, [sp], 64 + ret + .size FtlLowFormat, .-FtlLowFormat + .align 2 + .global FtlReInitForSDUpdata + .type FtlReInitForSDUpdata, %function +FtlReInitForSDUpdata: + stp x29, x30, [sp, -64]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x19, .LANCHOR0 + add x0, x19, :lo12:.LANCHOR0 + str x21, [sp, 32] + ldrb w0, [x0, 204] + cbz w0, .L2893 +.L2895: + mov w21, 0 +.L2892: + mov w0, w21 + ldr x21, [sp, 32] + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 64 + ret +.L2893: + adrp x20, .LANCHOR4 + add x0, x20, :lo12:.LANCHOR4 + ldr x0, [x0, 1584] + bl FlashInit + mov w21, w0 + cbnz w0, .L2895 + bl FlashLoadFactorBbt + cbz w0, .L2896 + bl FlashMakeFactorBbt +.L2896: + add x20, x20, :lo12:.LANCHOR4 + ldr x0, [x20, 1656] + bl FlashReadIdbDataRaw + cbz w0, .L2897 + mov w2, 16 + mov w1, 0 + add x0, x29, 48 + bl FlashReadFacBbtData + ldr w2, [x29, 48] + mov w0, 0 + mov w1, 0 + mov w4, 1 +.L2899: + lsl w3, w4, w1 + add w1, w1, 1 + tst w3, w2 + cinc w0, w0, ne + cmp w1, 16 + bne .L2899 + cmp w0, 6 + bhi .L2900 + add x0, x19, :lo12:.LANCHOR0 +.L2923: + strb w1, [x0, 73] + add x0, x19, :lo12:.LANCHOR0 + ldrb w1, [x0, 73] + strh w1, [x0, 202] +.L2897: + adrp x1, .LC75 + add x1, x1, :lo12:.LC75 + add x19, x19, :lo12:.LANCHOR0 + adrp x0, .LC76 + add x0, x0, :lo12:.LC76 + bl printk + add x0, x19, 176 + bl FtlConstantsInit + bl FtlVariablesInit + ldrh w0, [x19, 2476] + mov w19, 1 + bl FtlFreeSysBlkQueueInit +.L2905: + bl FtlLoadBbt + cbz w0, .L2906 +.L2925: + bl FtlLowFormat + cmp w19, 3 + bls .L2907 + mov w21, -1 + b .L2892 +.L2900: + mov w1, 0 + mov w4, 1 +.L2903: + lsl w3, w4, w1 + add w1, w1, 1 + tst w3, w2 + cinc w0, w0, ne + cmp w1, 24 + bne .L2903 + cmp w0, 17 + add x0, x19, :lo12:.LANCHOR0 + bls .L2923 + mov w1, 36 + b .L2923 +.L2907: + add w19, w19, 1 + b .L2905 +.L2906: + bl FtlSysBlkInit + cbnz w0, .L2925 + adrp x0, .LANCHOR1+504 + mov w1, 1 + str w1, [x0, #:lo12:.LANCHOR1+504] + b .L2892 + .size FtlReInitForSDUpdata, .-FtlReInitForSDUpdata + .align 2 + .global Ftl_gc_temp_data_write_back + .type Ftl_gc_temp_data_write_back, %function +Ftl_gc_temp_data_write_back: + adrp x12, .LANCHOR2 + add x0, x12, :lo12:.LANCHOR2 + ldr w1, [x0, 424] + cbz w1, .L2927 +.L2941: + mov w0, 0 + ret +.L2930: + mov w0, 0 +.L2926: + ldr x19, [sp, 16] + ldp x29, x30, [sp], 32 + ret +.L2927: + adrp x1, .LANCHOR0+204 + ldrb w1, [x1, #:lo12:.LANCHOR0+204] + cbz w1, .L2929 + ldr w1, [x0, 1380] + tbz x1, 0, .L2929 + ldrh w0, [x0, 660] + cbnz w0, .L2941 +.L2929: + stp x29, x30, [sp, -32]! + mov w3, 0 + mov w2, 0 + add x29, sp, 0 + str x19, [sp, 16] + add x19, x12, :lo12:.LANCHOR2 + ldr w1, [x19, 1380] + ldr x0, [x19, 3592] + bl FlashProgPages + mov w10, 0 + mov w11, 56 +.L2931: + ldr w1, [x19, 1380] + cmp w10, w1 + bcc .L2933 + ldr x0, [x19, 3592] + bl FtlGcBufFree + str wzr, [x19, 1380] + ldrh w0, [x19, 660] + cbnz w0, .L2930 + mov w0, 1 + bl FtlGcFreeTempBlock + b .L2943 +.L2933: + umull x1, w10, w11 + ldr x2, [x19, 3592] + add x3, x2, x1 + ldr w2, [x2, x1] + ldr x0, [x3, 16] + cmn w2, #1 + bne .L2932 + ldrh w3, [x19, 656] + ldr x0, [x19, 520] + strh wzr, [x0, x3, lsl 1] + strh w2, [x19, 656] + ldr w0, [x19, 944] + add w0, w0, 1 + str w0, [x19, 944] + ldr x0, [x19, 3592] + add x0, x0, x1 + ldr w0, [x0, 4] + lsr w0, w0, 10 + bl FtlBbmMapBadBlock + bl FtlBbmTblFlush + bl FtlGcPageVarInit +.L2943: + mov w0, 1 + b .L2926 +.L2932: + ldp w2, w0, [x0, 8] + ldr w1, [x3, 4] + bl FtlGcUpdatePage + add w10, w10, 1 + and w10, w10, 65535 + b .L2931 + .size Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back + .align 2 + .global Ftl_get_new_temp_ppa + .type Ftl_get_new_temp_ppa, %function +Ftl_get_new_temp_ppa: + stp x29, x30, [sp, -32]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x19, .LANCHOR2 + add x0, x19, :lo12:.LANCHOR2 + add x1, x0, 656 + ldrh w2, [x0, 656] + mov w0, 65535 + cmp w2, w0 + beq .L2945 + ldrh w0, [x1, 4] + cbnz w0, .L2946 +.L2945: + bl FtlCacheWriteBack + add x20, x19, :lo12:.LANCHOR2 + mov w0, 0 + bl FtlGcFreeTempBlock + add x0, x20, 656 + strb wzr, [x0, 8] + bl allocate_data_superblock + strh wzr, [x20, 1420] + strh wzr, [x20, 1432] + bl l2p_flush + mov w0, 0 + bl FtlEctTblFlush + bl FtlVpcTblFlush +.L2946: + add x0, x19, :lo12:.LANCHOR2 + add x0, x0, 656 + bl get_new_active_ppa + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 32 + ret + .size Ftl_get_new_temp_ppa, .-Ftl_get_new_temp_ppa + .align 2 + .global ftl_do_gc + .type ftl_do_gc, %function +ftl_do_gc: + stp x29, x30, [sp, -160]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x19, .LANCHOR2 + add x2, x19, :lo12:.LANCHOR2 + stp x21, x22, [sp, 32] + stp x23, x24, [sp, 48] + stp x25, x26, [sp, 64] + stp x27, x28, [sp, 80] + ldr w3, [x2, 424] + cbnz w3, .L3047 + adrp x3, .LANCHOR1 + add x3, x3, :lo12:.LANCHOR1 + ldr w20, [x3, 504] + cmp w20, 1 + bne .L3047 + ldr w4, [x2, 3560] + cbnz w4, .L3047 + ldrh w4, [x2, 536] + cmp w4, 47 + bls .L3047 + mov w22, w1 + ldrh w1, [x3, 3456] + mov w23, w0 + mov w0, 65535 + cmp w1, w0 + bne .L2950 +.L2953: + add x0, x19, :lo12:.LANCHOR2 + mov w2, 65535 + ldrh w4, [x0, 1450] + cmp w4, w2 + bne .L2951 +.L2952: + add x1, x19, :lo12:.LANCHOR2 + cmp w23, 1 + ldr w0, [x1, 1368] + add w0, w0, 1 + add w0, w0, w23, lsl 7 + str w0, [x1, 1368] + bne .L2954 + adrp x2, .LANCHOR0 + add x1, x2, :lo12:.LANCHOR0 + mov x25, x2 + ldr w3, [x1, 2372] + cbnz w3, .L2955 + ldrb w1, [x1, 204] + cbz w1, .L2954 +.L2955: + add x24, x19, :lo12:.LANCHOR2 + ldr w1, [x24, 776] + cmp w1, 39 + bhi .L2954 + adrp x21, .LANCHOR4 + add x1, x21, :lo12:.LANCHOR4 + mov w20, 65535 + ldrh w1, [x1, 1984] + add w0, w1, w0 + str w0, [x24, 1368] + bl FtlGcReFreshBadBlk + ldrh w0, [x24, 800] + cmp w0, w20 + bne .L2956 + ldrh w1, [x24, 1448] + cmp w1, w0 + bne .L3043 + ldr w0, [x24, 1368] + cmp w0, 1024 + bhi .L2958 + ldrh w0, [x24, 552] + cmp w0, 63 + bhi .L3043 +.L2958: + add x0, x19, :lo12:.LANCHOR2 + add x1, x21, :lo12:.LANCHOR4 + ldrh w2, [x0, 1366] + ldrh w3, [x0, 552] + strh wzr, [x1, 1984] + add w2, w2, 64 + cmp w3, w2 + bgt .L3043 + str wzr, [x0, 1368] + ldr w0, [x0, 776] + cbnz w0, .L2959 + mov w0, 6 +.L3096: + strh w0, [x1, 1984] +.L2960: + mov w0, 32 + bl List_get_gc_head_node + and w5, w0, 65535 + mov w8, 65535 + cmp w5, w8 + beq .L2964 + add x24, x19, :lo12:.LANCHOR2 + ldrh w0, [x24, 1372] + cbz w0, .L2962 + add x2, x25, :lo12:.LANCHOR0 + ldr x7, [x24, 520] + ubfiz x5, x5, 1, 16 + ldrh w1, [x2, 2546] + ldrh w2, [x2, 2472] + ldrh w3, [x7, x5] + mul w1, w1, w2 + add w1, w1, 1 + cmp w3, w1 + bgt .L2964 + add w6, w0, 1 + str wzr, [x24, 1376] + and w6, w6, 65535 + strh w6, [x24, 1372] + bl List_get_gc_head_node + and w20, w0, 65535 + cmp w20, w8 + beq .L2964 + ubfiz x25, x20, 1, 16 + ldrh w4, [x7, x5] + mov w2, w20 + mov w1, w6 + adrp x0, .LC156 + add x0, x0, :lo12:.LC156 + ldrh w3, [x7, x25] + bl printk + ldrh w0, [x24, 1372] + cmp w0, 40 + bls .L2963 + ldr x0, [x24, 520] + ldrh w0, [x0, x25] + cmp w0, 32 + bls .L2963 + strh wzr, [x24, 1372] +.L2963: + add x21, x21, :lo12:.LANCHOR4 + mov w0, 6 + strh w0, [x21, 1984] +.L2956: + cmp w23, 0 + mov w1, 65535 + add x0, x19, :lo12:.LANCHOR2 + ccmp w20, w1, 0, eq + bne .L2978 + ldrh w2, [x0, 552] + cmp w2, 24 + bhi .L3055 + adrp x0, .LANCHOR0 + add x0, x0, :lo12:.LANCHOR0 + cmp w2, 16 + ldrh w21, [x0, 2544] + bls .L2980 + lsr w21, w21, 5 +.L2979: + add x1, x19, :lo12:.LANCHOR2 + ldrh w0, [x1, 1364] + cmp w0, w2 + bcs .L2983 + ldrh w0, [x1, 656] + mov w2, 65535 + cmp w0, w2 + bne .L2984 + ldrh w2, [x1, 1448] + cmp w2, w0 + bne .L2984 + adrp x0, .LANCHOR4+1984 + ldrh w0, [x0, #:lo12:.LANCHOR4+1984] + cbnz w0, .L2985 + adrp x2, .LANCHOR0+2616 + ldr w3, [x1, 716] + ldr w2, [x2, #:lo12:.LANCHOR0+2616] + add w2, w2, w2, lsl 1 + cmp w3, w2, lsr 2 + bcs .L2986 +.L2985: + add x2, x19, :lo12:.LANCHOR2 + ldrh w1, [x2, 780] + add w1, w1, w1, lsl 1 + asr w1, w1, 2 + strh w1, [x2, 1364] +.L2987: + add x19, x19, :lo12:.LANCHOR2 + str wzr, [x19, 1376] +.L2948: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 160 + ret +.L2950: + ldrh w1, [x2, 656] + cmp w1, w0 + beq .L2953 + mov w0, w20 + bl FtlGcFreeTempBlock + cbz w0, .L2953 + mov w0, w20 + b .L2948 +.L2951: + ldrh w1, [x0, 1448] + cmp w1, w2 + bne .L2952 + ldrh w3, [x0, 1452] + cmp w3, w1 + beq .L2952 + ldrh w2, [x0, 1454] + cmp w2, w1 + beq .L2952 + mov w1, -1 + strh w4, [x0, 1448] + strh w3, [x0, 1450] + strh w2, [x0, 1452] + strh w1, [x0, 1454] + b .L2952 +.L2959: + cmp w0, 5 + bhi .L2960 + mov w0, 18 + b .L3096 +.L2962: + mov w0, 1 + strh w0, [x24, 1372] +.L2964: + bl GetSwlReplaceBlock + and w20, w0, 65535 + mov w0, 65535 + cmp w20, w0 + bne .L2956 + add x21, x21, :lo12:.LANCHOR4 + strh wzr, [x21, 1984] +.L2954: + add x0, x19, :lo12:.LANCHOR2 + mov w20, 65535 + ldrh w0, [x0, 800] + cmp w0, w20 + bne .L2956 +.L3043: + add x24, x19, :lo12:.LANCHOR2 + mov w0, 65535 + ldrh w20, [x24, 656] + cmp w20, w0 + bne .L3050 + ldrh w25, [x24, 1448] + cmp w25, w20 + bne .L2956 + ldrh w0, [x24, 552] + mov w1, 1024 + cmp w0, 24 + mov w0, 5120 + csel w0, w0, w1, cc + ldr w1, [x24, 1368] + cmp w1, w0 + bls .L2956 + adrp x0, .LANCHOR4+1984 + str wzr, [x24, 1368] + strh wzr, [x0, #:lo12:.LANCHOR4+1984] + bl GetSwlReplaceBlock + and w20, w0, 65535 + cmp w20, w25 + bne .L3053 + ldrh w1, [x24, 552] + ldrh w0, [x24, 1366] + cmp w1, w0 + bcs .L2967 + mov w0, 64 + bl List_get_gc_head_node + and x0, x0, 65535 + cmp w0, w20 + beq .L2969 + ldr w1, [x24, 3556] + adrp x5, .LANCHOR0 + cbnz w1, .L2970 + add x1, x5, :lo12:.LANCHOR0 + ldrh w2, [x1, 2492] + cmp w2, 3 + beq .L2970 + ldr w2, [x24, 1360] + cbnz w2, .L2970 + ldr w2, [x1, 2372] + cbnz w2, .L2970 + ldrb w1, [x1, 204] + cbz w1, .L2971 +.L2970: + add x1, x19, :lo12:.LANCHOR2 + add x2, x5, :lo12:.LANCHOR0 + ldr x1, [x1, 520] + ldrh w3, [x1, x0, lsl 1] + ldrh w0, [x2, 2546] + ldrh w1, [x2, 2472] + ldrh w2, [x2, 2492] + cmp w2, 3 + mul w1, w1, w0 + lsr w0, w0, 1 + csel w0, w0, wzr, eq + add w0, w0, w1 + cmp w3, w0 + bgt .L2973 + mov w0, 0 + bl List_get_gc_head_node + add x5, x5, :lo12:.LANCHOR0 + add x1, x19, :lo12:.LANCHOR2 + and w21, w0, 65535 + ldr w0, [x5, 2616] + ldr w2, [x1, 716] + add w0, w0, w0, lsl 1 + cmp w2, w0, lsr 2 + bls .L2974 + mov w0, 128 +.L3097: + strh w0, [x1, 1366] +.L2975: + mov w0, 65535 + cmp w21, w0 + beq .L2969 +.L2966: + add x0, x19, :lo12:.LANCHOR2 + ubfiz x1, x21, 1, 32 + mov w20, w21 + ldr x3, [x0, 440] + ldr x2, [x0, 520] + ldrh w5, [x0, 1364] + ldrh w4, [x3, x1] + ldrh w3, [x2, x1] + mov w1, w21 + ldrh w2, [x0, 552] + adrp x0, .LC157 + add x0, x0, :lo12:.LC157 + bl printk + b .L2969 +.L2974: + mov w0, 160 + b .L3097 +.L2973: + add x0, x19, :lo12:.LANCHOR2 + mov w1, 128 +.L3098: + strh w1, [x0, 1366] +.L2969: + bl FtlGcReFreshBadBlk + b .L2956 +.L2971: + ldr x1, [x24, 520] + ldrh w0, [x1, x0, lsl 1] + cmp w0, 7 + bhi .L2976 + mov w0, 0 + bl List_get_gc_head_node + and w21, w0, 65535 + add x0, x19, :lo12:.LANCHOR2 + mov w1, 128 + strh w1, [x0, 1366] + b .L2975 +.L2976: + add x0, x19, :lo12:.LANCHOR2 + mov w1, 64 + b .L3098 +.L2967: + mov w0, 80 + strh w0, [x24, 1366] + b .L2969 +.L3053: + mov w21, w20 + b .L2966 +.L3050: + mov w20, w0 + b .L2956 +.L2980: + cmp w2, 12 + bls .L2981 + lsr w21, w21, 4 + b .L2979 +.L2981: + cmp w2, 8 + bls .L2979 + lsr w21, w21, 2 + b .L2979 +.L3055: + mov w21, 1 + b .L2979 +.L2986: + mov w2, 18 + strh w2, [x1, 1364] + b .L2987 +.L2984: + add x1, x19, :lo12:.LANCHOR2 + ldrh w0, [x1, 780] + add w0, w0, w0, lsl 1 + asr w0, w0, 2 + strh w0, [x1, 1364] +.L2983: + adrp x0, .LANCHOR0+2372 + ldr w0, [x0, #:lo12:.LANCHOR0+2372] + cbz w0, .L3057 + cmp w22, 2 + bhi .L3057 + add w21, w21, 1 + and w21, w21, 65535 +.L3057: + mov w20, 65535 + b .L2989 +.L2978: + ldrh w2, [x0, 656] + cmp w2, w1 + bne .L2990 + ldrh w1, [x0, 1448] + cmp w1, w2 + bne .L2990 + cmp w20, w1 + bne .L2990 + ldrh w1, [x0, 800] + cmp w1, w20 + bne .L2990 + ldrh w2, [x0, 552] + adrp x21, .LANCHOR4 + ldrh w1, [x0, 1364] + str wzr, [x0, 1376] + cmp w2, w1 + bls .L2992 + add x1, x21, :lo12:.LANCHOR4 + ldrh w1, [x1, 1984] + cbnz w1, .L2993 + adrp x1, .LANCHOR0+2616 + ldr w2, [x0, 716] + ldr w1, [x1, #:lo12:.LANCHOR0+2616] + add w1, w1, w1, lsl 1 + cmp w2, w1, lsr 2 + bcs .L2994 +.L2993: + add x1, x19, :lo12:.LANCHOR2 + ldrh w0, [x1, 780] + add w0, w0, w0, lsl 1 + asr w0, w0, 2 + strh w0, [x1, 1364] +.L2995: + bl FtlReadRefresh + mov w0, 0 + bl List_get_gc_head_node + add x1, x19, :lo12:.LANCHOR2 + ubfiz x0, x0, 1, 16 + ldr x1, [x1, 520] + ldrh w0, [x1, x0] + cmp w0, 4 + bls .L2992 +.L3099: + add x21, x21, :lo12:.LANCHOR4 + b .L3100 +.L2994: + mov w1, 18 + strh w1, [x0, 1364] + b .L2995 +.L2992: + add x21, x21, :lo12:.LANCHOR4 + ldrh w0, [x21, 1984] + cbnz w0, .L2990 + add x6, x19, :lo12:.LANCHOR2 + ldrh w5, [x6, 780] + add w0, w5, w5, lsl 1 + asr w0, w0, 2 + strh w0, [x6, 1364] + mov w0, 0 + bl List_get_gc_head_node + ldr x1, [x6, 520] + ubfiz x0, x0, 1, 16 + ldrh w2, [x1, x0] + adrp x1, .LANCHOR0 + add x1, x1, :lo12:.LANCHOR0 + ldrh w0, [x1, 2546] + ldrh w1, [x1, 2472] + mul w0, w0, w1 + mov w1, 2 + sdiv w0, w0, w1 + cmp w2, w0 + ble .L2997 + ldrh w0, [x6, 552] + sub w5, w5, #1 + cmp w0, w5 + blt .L2997 + bl FtlReadRefresh +.L3100: + ldrh w0, [x21, 1984] + b .L2948 +.L2997: + cbnz w2, .L2990 + add x19, x19, :lo12:.LANCHOR2 + mov w0, -1 + bl decrement_vpc_count + ldrh w0, [x19, 552] + add w0, w0, 1 + b .L2948 +.L2990: + adrp x0, .LANCHOR0+2372 + ldr w0, [x0, #:lo12:.LANCHOR0+2372] + cmp w0, 0 + cset w21, ne + add w21, w21, 1 +.L2989: + add x0, x19, :lo12:.LANCHOR2 + mov w2, 65535 + ldrh w1, [x0, 800] + cmp w1, w2 + bne .L2999 + cmp w20, w1 + beq .L3000 + strh w20, [x0, 800] +.L3001: + add x5, x19, :lo12:.LANCHOR2 + mov w1, 65535 + ldrh w0, [x5, 800] + strb wzr, [x5, 808] + cmp w0, w1 + beq .L2999 + bl IsBlkInGcList + cbz w0, .L3004 + mov w0, -1 + strh w0, [x5, 800] +.L3004: + adrp x0, .LANCHOR0+204 + ldrb w0, [x0, #:lo12:.LANCHOR0+204] + cbz w0, .L3005 + add x0, x19, :lo12:.LANCHOR2 + add x3, x0, 800 + ldrh w0, [x0, 800] + bl ftl_get_blk_mode + strb w0, [x3, 8] +.L3005: + add x12, x19, :lo12:.LANCHOR2 + mov w0, 65535 + add x13, x12, 800 + ldrh w1, [x12, 800] + cmp w1, w0 + beq .L2999 + mov x0, x13 + bl make_superblock + adrp x0, .LANCHOR4 + add x0, x0, :lo12:.LANCHOR4 + ldrh w2, [x12, 800] + ldr x1, [x12, 520] + strh wzr, [x12, 802] + strb wzr, [x12, 806] + strh wzr, [x0, 1986] + ldrh w1, [x1, x2, lsl 1] + strh w1, [x0, 1988] +.L2999: + add x0, x19, :lo12:.LANCHOR2 + ldrh w1, [x0, 800] + ldrh w2, [x0, 560] + cmp w2, w1 + beq .L3006 + ldrh w2, [x0, 608] + cmp w2, w1 + beq .L3006 + ldrh w0, [x0, 656] + cmp w0, w1 + bne .L3040 +.L3006: + add x0, x19, :lo12:.LANCHOR2 + mov w1, -1 + strh w1, [x0, 800] +.L3040: + add x22, x19, :lo12:.LANCHOR2 + mov w0, 65535 + ldrh w24, [x22, 800] + cmp w24, w0 + bne .L3008 + adrp x25, .LANCHOR0 + add x26, x25, :lo12:.LANCHOR0 + mov w27, 2 + str wzr, [x22, 1376] +.L3009: + ldrh w5, [x22, 1372] + mov w0, w5 + bl List_get_gc_head_node + and w6, w0, 65535 + strh w6, [x22, 800] + cmp w6, w24 + bne .L3010 + strh wzr, [x22, 1372] + mov w0, 8 + b .L2948 +.L3000: + ldrh w1, [x0, 1448] + cmp w1, w20 + beq .L3001 + ldr x2, [x0, 520] + ubfiz x1, x1, 1, 16 + ldrh w1, [x2, x1] + cbnz w1, .L3002 + mov w1, -1 + strh w1, [x0, 1448] +.L3002: + add x0, x19, :lo12:.LANCHOR2 + ldrh w1, [x0, 1448] + strh w1, [x0, 800] + mov w1, -1 + strh w1, [x0, 1448] + b .L3001 +.L3010: + mov w0, w6 + bl IsBlkInGcList + add w5, w5, 1 + cbz w0, .L3011 + strh w5, [x22, 1372] + b .L3009 +.L3011: + ldrh w4, [x26, 2472] + ubfiz x1, x6, 1, 16 + ldrh w0, [x26, 2544] + and w5, w5, 65535 + ldr x2, [x22, 520] + strh w5, [x22, 1372] + mul w0, w0, w4 + ldrh w3, [x2, x1] + sdiv w4, w0, w27 + cmp w3, w4 + bgt .L3013 + cmp w5, 48 + bls .L3014 + cmp w3, 8 + bls .L3014 + ldrh w3, [x22, 1420] + cmp w3, 35 + bhi .L3014 +.L3013: + strh wzr, [x22, 1372] +.L3014: + ldrh w1, [x2, x1] + cmp w0, w1 + bgt .L3015 + cmp w20, w24 + bne .L3015 + ldrh w0, [x22, 1372] + cmp w0, 3 + bhi .L3015 + mov w0, -1 + strh w0, [x22, 800] + adrp x0, .LANCHOR4+1984 + strh wzr, [x22, 1372] + ldrh w0, [x0, #:lo12:.LANCHOR4+1984] + b .L2948 +.L3015: + cbnz w1, .L3016 + mov w0, -1 + bl decrement_vpc_count + ldrh w0, [x22, 1372] + add w0, w0, 1 + strh w0, [x22, 1372] + b .L3009 +.L3016: + add x25, x25, :lo12:.LANCHOR0 + add x3, x19, :lo12:.LANCHOR2 + add x3, x3, 800 + ldrb w0, [x25, 204] + strb wzr, [x3, 8] + cbz w0, .L3017 + mov w0, w6 + bl ftl_get_blk_mode + strb w0, [x3, 8] +.L3017: + add x13, x19, :lo12:.LANCHOR2 + add x12, x13, 800 + mov x0, x12 + bl make_superblock + ldrh w2, [x13, 800] + adrp x0, .LANCHOR4 + add x0, x0, :lo12:.LANCHOR4 + ldr x1, [x13, 520] + strh wzr, [x0, 1986] + ldrh w1, [x1, x2, lsl 1] + strh w1, [x0, 1988] + strh wzr, [x13, 802] + strb wzr, [x13, 806] +.L3008: + cmp w23, 1 + bne .L3018 + bl FtlReadRefresh +.L3018: + add x1, x19, :lo12:.LANCHOR2 + mov w0, 1 + adrp x22, .LANCHOR0 + str w0, [x1, 3560] + add x0, x22, :lo12:.LANCHOR0 + ldrb w2, [x0, 204] + ldrh w24, [x0, 2544] + cbz w2, .L3019 + ldrb w1, [x1, 808] + cmp w1, 1 + bne .L3019 + ldrh w24, [x0, 2546] +.L3019: + add x0, x19, :lo12:.LANCHOR2 + ldrh w0, [x0, 802] + add w1, w0, w21 + cmp w1, w24 + ble .L3020 + sub w21, w24, w0 + and w21, w21, 65535 +.L3020: + adrp x0, .LANCHOR4 + mov w25, 0 + add x0, x0, :lo12:.LANCHOR4 + str x0, [x29, 136] +.L3021: + cmp w21, w25, uxth + bls .L3028 + add x0, x22, :lo12:.LANCHOR0 + mov w6, 0 + mov w2, 0 + mov w8, 65535 + mov w7, 56 + ldrh w9, [x0, 2472] + add x0, x19, :lo12:.LANCHOR2 + add x3, x0, 816 + ldrh w4, [x0, 802] + add w4, w4, w25 + b .L3029 +.L3023: + ldrh w1, [x3] + cmp w1, w8 + beq .L3022 + ldr x5, [x0, 1408] + orr w1, w4, w1, lsl 10 + umaddl x5, w6, w7, x5 + add w6, w6, 1 + and w6, w6, 65535 + str w1, [x5, 4] +.L3022: + add w2, w2, 1 + add x3, x3, 2 + and w2, w2, 65535 +.L3029: + cmp w2, w9 + bne .L3023 + add x26, x19, :lo12:.LANCHOR2 + mov w1, w6 + str w6, [x29, 128] + add x27, x26, 656 + mov x28, 0 + ldrb w2, [x26, 808] + ldr x0, [x26, 1408] + bl FlashReadPages + ldr w6, [x29, 128] + mov w0, 56 + umull x0, w6, w0 + str x0, [x29, 128] +.L3024: + ldr x0, [x29, 128] + cmp x0, x28 + bne .L3027 + add w25, w25, 1 + b .L3021 +.L3027: + ldr x0, [x26, 1408] + add x1, x0, x28 + ldr w0, [x0, x28] + cmn w0, #1 + beq .L3025 + ldr x5, [x1, 16] + mov w0, 61589 + ldrh w1, [x5] + cmp w1, w0 + bne .L3025 + ldr w0, [x5, 8] + mov w2, 0 + add x1, x29, 152 + str x5, [x29, 120] + bl log2phys + ldr x0, [x26, 1408] + ldr w1, [x29, 152] + add x0, x0, x28 + ldr x5, [x29, 120] + and w1, w1, 2147483647 + ldr w2, [x0, 4] + cmp w1, w2 + bne .L3025 + ldr x1, [x29, 136] + ldr x2, [x29, 136] + ldr x6, [x26, 3592] + ldr w0, [x0, 24] + ldrh w1, [x1, 1986] + str x5, [x29, 104] + add w1, w1, 1 + strh w1, [x2, 1986] + ldr w1, [x26, 1380] + mov w2, 56 + str w2, [x29, 116] + nop // between mem op and mult-accumulate + umaddl x1, w1, w2, x6 + str x1, [x29, 120] + str w0, [x1, 24] + bl Ftl_get_new_temp_ppa + ldr x1, [x29, 120] + ldr w2, [x29, 116] + ldr x5, [x29, 104] + str w0, [x1, 4] + ldr w0, [x26, 1380] + ldr x1, [x26, 3592] + umaddl x0, w0, w2, x1 + ldr x1, [x26, 1408] + add x1, x1, x28 + ldr x2, [x1, 8] + str x2, [x0, 8] + ldr x1, [x1, 16] + str x1, [x0, 16] + ldr w0, [x29, 152] + mov w1, 1 + str w0, [x5, 12] + ldrh w0, [x27] + strh w0, [x5, 2] + ldr w0, [x26, 756] + str w0, [x5, 4] + ldr w0, [x26, 1380] + add w0, w0, 1 + str w0, [x26, 1380] + ldr x0, [x26, 1408] + add x0, x0, x28 + bl FtlGcBufAlloc + add x0, x22, :lo12:.LANCHOR0 + ldrb w0, [x0, 204] + cbnz w0, .L3026 + ldrb w1, [x27, 7] + ldr w0, [x26, 1380] + cmp w1, w0 + beq .L3026 + ldrh w0, [x27, 4] + cbnz w0, .L3025 +.L3026: + bl Ftl_gc_temp_data_write_back + cbz w0, .L3025 + add x19, x19, :lo12:.LANCHOR2 + mov w0, -1 + strh w0, [x19, 800] + adrp x0, .LANCHOR4 + add x26, x0, :lo12:.LANCHOR4 + strh wzr, [x19, 802] + str wzr, [x19, 3560] + ldrh w0, [x26, 1984] + b .L2948 +.L3025: + add x28, x28, 56 + b .L3024 +.L3028: + add x25, x19, :lo12:.LANCHOR2 + ldrh w0, [x25, 802] + add w21, w21, w0 + and w21, w21, 65535 + strh w21, [x25, 802] + cmp w24, w21 + bhi .L3030 + ldr w0, [x25, 1380] + adrp x21, .LANCHOR4 + cbz w0, .L3031 + bl Ftl_gc_temp_data_write_back + cbz w0, .L3031 + str wzr, [x25, 3560] + b .L3099 +.L3031: + add x21, x21, :lo12:.LANCHOR4 + ldrh w0, [x21, 1986] + cbnz w0, .L3032 + add x0, x19, :lo12:.LANCHOR2 + ldrh w2, [x0, 800] + ldr x1, [x0, 520] + ldrh w1, [x1, x2, lsl 1] + cbz w1, .L3032 + add x25, x22, :lo12:.LANCHOR0 + mov x24, x0 + mov w21, 0 +.L3033: + ldr w0, [x25, 2616] + cmp w21, w0 + bcs .L3038 + mov w2, 0 + add x1, x29, 156 + mov w0, w21 + bl log2phys + ldr w0, [x29, 156] + cmn w0, #1 + beq .L3034 + lsr w0, w0, 10 + bl P2V_block_in_plane + ldrh w1, [x24, 800] + cmp w1, w0, uxth + bne .L3034 +.L3038: + add x0, x22, :lo12:.LANCHOR0 + ldr w0, [x0, 2616] + cmp w21, w0 + bcc .L3032 + add x0, x19, :lo12:.LANCHOR2 + ldrh w2, [x0, 800] + ldr x1, [x0, 520] + strh wzr, [x1, x2, lsl 1] + ldrh w0, [x0, 800] + bl update_vpc_list + bl FtlCacheWriteBack + bl l2p_flush + bl FtlVpcTblFlush +.L3032: + add x0, x19, :lo12:.LANCHOR2 + mov w1, -1 + strh w1, [x0, 800] +.L3030: + add x1, x19, :lo12:.LANCHOR2 + ldrh w0, [x1, 552] + cmp w0, 2 + bhi .L3039 + add x22, x22, :lo12:.LANCHOR0 + ldrh w21, [x22, 2544] + b .L3040 +.L3034: + add w21, w21, 1 + b .L3033 +.L3039: + str wzr, [x1, 3560] + adrp x1, .LANCHOR4+1984 + ldrh w1, [x1, #:lo12:.LANCHOR4+1984] + cmp w1, 0 + csinc w0, w1, w0, ne + b .L2948 +.L3047: + mov w0, 0 + b .L2948 + .size ftl_do_gc, .-ftl_do_gc + .align 2 + .global FtlCacheWriteBack + .type FtlCacheWriteBack, %function +FtlCacheWriteBack: + stp x29, x30, [sp, -112]! + add x29, sp, 0 + stp x23, x24, [sp, 48] + adrp x23, .LANCHOR2 + add x0, x23, :lo12:.LANCHOR2 + stp x19, x20, [sp, 16] + stp x21, x22, [sp, 32] + stp x25, x26, [sp, 64] + stp x27, x28, [sp, 80] + ldr w24, [x0, 424] + cbnz w24, .L3103 + adrp x22, .LANCHOR0 + add x0, x22, :lo12:.LANCHOR0 + ldr w1, [x0, 2600] + cbz w1, .L3103 + ldrb w0, [x0, 204] + adrp x2, .LANCHOR4+1992 + ldr x19, [x2, #:lo12:.LANCHOR4+1992] + cbz w0, .L3128 + ldrb w0, [x19, 8] + cmp w0, 1 + cset w25, eq +.L3105: + add x20, x22, :lo12:.LANCHOR0 + ldrb w3, [x19, 9] + adrp x26, .LC158 + mov w2, w25 + mov w21, 0 + mov w27, 56 + ldr x0, [x20, 2608] + add x26, x26, :lo12:.LC158 + bl FlashProgPages +.L3106: + ldr w0, [x20, 2600] + cmp w21, w0 + bcc .L3113 +.L3125: + add x22, x22, :lo12:.LANCHOR0 + str wzr, [x22, 2600] +.L3103: + ldp x19, x20, [sp, 16] + mov w0, 0 + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 112 + ret +.L3128: + mov w25, 0 + b .L3105 +.L3113: + umull x28, w21, w27 + ldr x0, [x20, 2608] + add x3, x0, x28 + ldr w0, [x0, x28] + cmn w0, #1 + bne .L3107 + add x21, x22, :lo12:.LANCHOR0 + add x26, x23, :lo12:.LANCHOR2 +.L3108: + ldr w0, [x21, 2600] + cmp w24, w0 + bcc .L3123 + add x23, x23, :lo12:.LANCHOR2 + mov w19, 16386 +.L3126: + ldrh w0, [x23, 1456] + cbz w0, .L3125 + mov w1, 1 + mov w0, w1 + bl ftl_do_gc + subs w19, w19, #1 + bne .L3126 + b .L3125 +.L3107: + ldr w0, [x3, 4] + cbnz w25, .L3109 +.L3142: + str w0, [x29, 108] + mov w2, 1 + ldr w0, [x3, 24] + add x1, x29, 108 + bl log2phys + ldr x0, [x20, 2608] + add x0, x0, x28 + ldr x0, [x0, 16] + ldr w0, [x0, 12] + cmn w0, #1 + beq .L3111 + lsr w0, w0, 10 + bl P2V_block_in_plane + and w1, w0, 65535 + add x0, x23, :lo12:.LANCHOR2 + ubfiz x2, x1, 1, 16 + mov w28, w1 + ldr x0, [x0, 520] + ldrh w0, [x0, x2] + cbnz w0, .L3112 + mov w2, 0 + mov x0, x26 + bl printk +.L3112: + mov w0, w28 + bl decrement_vpc_count +.L3111: + add w21, w21, 1 + b .L3106 +.L3109: + orr w0, w0, -2147483648 + b .L3142 +.L3123: + mov w20, 56 + ldr x0, [x21, 2608] + mov w1, -1 + mov w27, 1 + umull x20, w24, w20 + str w1, [x0, x20] +.L3114: + ldr x0, [x21, 2608] + add x3, x0, x20 + ldr w0, [x0, x20] + cmn w0, #1 + ldr w0, [x3, 4] + beq .L3118 + cbnz w25, .L3119 +.L3143: + str w0, [x29, 108] + mov w2, 1 + ldr w0, [x3, 24] + add x1, x29, 108 + bl log2phys + ldr x0, [x21, 2608] + add x20, x0, x20 + ldr x0, [x20, 16] + ldr w0, [x0, 12] + cmn w0, #1 + beq .L3121 + lsr w0, w0, 10 + bl P2V_block_in_plane + ldr x2, [x26, 520] + and w1, w0, 65535 + ubfiz x0, x1, 1, 16 + mov w20, w1 + ldrh w0, [x2, x0] + cbnz w0, .L3122 + adrp x0, .LC158 + mov w2, 0 + add x0, x0, :lo12:.LC158 + bl printk +.L3122: + mov w0, w20 + bl decrement_vpc_count +.L3121: + add w24, w24, 1 + b .L3108 +.L3118: + lsr w0, w0, 10 + bl P2V_block_in_plane + ldrh w1, [x19] + cmp w1, w0, uxth + bne .L3115 + ldr x2, [x26, 520] + ubfiz x1, x1, 1, 16 + ldrh w3, [x19, 4] + ldrh w0, [x2, x1] + sub w0, w0, w3 + strh w0, [x2, x1] + strb wzr, [x19, 6] + ldrh w0, [x21, 2544] + strh w0, [x19, 2] + strh wzr, [x19, 4] +.L3115: + ldrh w0, [x19, 4] + cbnz w0, .L3116 + mov x0, x19 + bl allocate_new_data_superblock +.L3116: + ldr w0, [x26, 944] + add w0, w0, 1 + str w0, [x26, 944] + ldr x0, [x21, 2608] + add x0, x0, x20 + ldr w0, [x0, 4] + lsr w0, w0, 10 + bl FtlGcMarkBadPhyBlk + mov x0, x19 + bl get_new_active_ppa + ldr x1, [x21, 2608] + mov w2, w25 + str w0, [x29, 108] + add x1, x1, x20 + str w0, [x1, 4] + mov w1, 1 + ldrb w3, [x19, 9] + ldr x0, [x21, 2608] + add x0, x0, x20 + bl FlashProgPages + ldr x0, [x21, 2608] + ldr w0, [x0, x20] + cmn w0, #1 + bne .L3117 + str w27, [x26, 424] +.L3117: + ldr w0, [x26, 424] + cbz w0, .L3114 + b .L3103 +.L3119: + orr w0, w0, -2147483648 + b .L3143 + .size FtlCacheWriteBack, .-FtlCacheWriteBack + .align 2 + .global FtlSysFlush + .type FtlSysFlush, %function +FtlSysFlush: + adrp x0, .LANCHOR2+424 + ldr w0, [x0, #:lo12:.LANCHOR2+424] + cbnz w0, .L3147 + stp x29, x30, [sp, -32]! + adrp x0, .LANCHOR1+504 + add x29, sp, 0 + str x19, [sp, 16] + ldr w19, [x0, #:lo12:.LANCHOR1+504] + cmp w19, 1 + bne .L3145 + bl FtlCacheWriteBack + bl l2p_flush + mov w0, w19 + bl FtlEctTblFlush + bl FtlVpcTblFlush +.L3145: + mov w0, 0 + ldr x19, [sp, 16] + ldp x29, x30, [sp], 32 + ret +.L3147: + mov w0, 0 + ret + .size FtlSysFlush, .-FtlSysFlush + .align 2 + .global FtlDeInit + .type FtlDeInit, %function +FtlDeInit: + adrp x0, .LANCHOR1+504 + ldr w0, [x0, #:lo12:.LANCHOR1+504] + cmp w0, 1 + bne .L3153 + stp x29, x30, [sp, -16]! + add x29, sp, 0 + bl FtlSysFlush + mov w0, 0 + ldp x29, x30, [sp], 16 + ret +.L3153: + mov w0, 0 + ret + .size FtlDeInit, .-FtlDeInit + .align 2 + .global ftl_deinit + .type ftl_deinit, %function +ftl_deinit: + stp x29, x30, [sp, -16]! + add x29, sp, 0 + bl ftl_flash_de_init + bl FtlDeInit + bl ftl_flash_de_init + ldp x29, x30, [sp], 16 + ret + .size ftl_deinit, .-ftl_deinit + .align 2 + .global rk_ftl_de_init + .type rk_ftl_de_init, %function +rk_ftl_de_init: + stp x29, x30, [sp, -16]! + mov w1, 0 + adrp x0, .LC159 + add x0, x0, :lo12:.LC159 + add x29, sp, 0 + bl printk + bl ftl_deinit + ldp x29, x30, [sp], 16 + ret + .size rk_ftl_de_init, .-rk_ftl_de_init + .align 2 + .global ftl_cache_flush + .type ftl_cache_flush, %function +ftl_cache_flush: + stp x29, x30, [sp, -16]! + add x29, sp, 0 + bl FtlCacheWriteBack + ldp x29, x30, [sp], 16 + ret + .size ftl_cache_flush, .-ftl_cache_flush + .align 2 + .global rk_ftl_cache_write_back + .type rk_ftl_cache_write_back, %function +rk_ftl_cache_write_back: + stp x29, x30, [sp, -16]! + add x29, sp, 0 + bl FtlCacheWriteBack + ldp x29, x30, [sp], 16 + ret + .size rk_ftl_cache_write_back, .-rk_ftl_cache_write_back + .align 2 + .global ftl_discard + .type ftl_discard, %function +ftl_discard: + stp x29, x30, [sp, -80]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + mov w20, w0 + stp x21, x22, [sp, 32] + adrp x0, .LANCHOR0 + add x21, x0, :lo12:.LANCHOR0 + str x23, [sp, 48] + mov w19, w1 + ldr w1, [x21, 2584] + cmp w1, w20 + bls .L3173 + cmp w1, w19 + bcc .L3173 + mov x23, x0 + add w0, w20, w19 + cmp w1, w0 + bcc .L3173 + cmp w19, 31 + bls .L3175 + adrp x22, .LANCHOR2 + add x0, x22, :lo12:.LANCHOR2 + ldr w0, [x0, 424] + cbnz w0, .L3175 + bl FtlCacheWriteBack + ldrh w0, [x21, 2550] + udiv w21, w20, w0 + msub w20, w0, w21, w20 + ands w20, w20, 65535 + beq .L3166 + sub w20, w0, w20 + add w21, w21, 1 + cmp w20, w19 + csel w20, w20, w19, ls + sub w19, w19, w20, uxth +.L3166: + add x20, x23, :lo12:.LANCHOR0 + adrp x23, .LANCHOR4 + add x23, x23, :lo12:.LANCHOR4 + mov w0, -1 + str w0, [x29, 76] +.L3167: + ldrh w0, [x20, 2550] + cmp w19, w0 + bcs .L3169 + adrp x0, .LANCHOR4 + add x0, x0, :lo12:.LANCHOR4 + ldr w1, [x0, 2000] + cmp w1, 32 + bls .L3175 + str wzr, [x0, 2000] + bl l2p_flush + bl FtlVpcTblFlush +.L3175: + mov w0, 0 + b .L3164 +.L3169: + mov w2, 0 + add x1, x29, 72 + mov w0, w21 + bl log2phys + ldr w0, [x29, 72] + cmn w0, #1 + beq .L3168 + add x1, x22, :lo12:.LANCHOR2 + ldr w0, [x23, 2000] + mov w2, 1 + add w0, w0, 1 + str w0, [x23, 2000] + ldr w0, [x1, 724] + add w0, w0, 1 + str w0, [x1, 724] + add x1, x29, 76 + mov w0, w21 + bl log2phys + ldr w0, [x29, 72] + lsr w0, w0, 10 + bl P2V_block_in_plane + bl decrement_vpc_count +.L3168: + ldrh w0, [x20, 2550] + add w21, w21, 1 + sub w19, w19, w0 + b .L3167 +.L3173: + mov w0, -1 +.L3164: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldr x23, [sp, 48] + ldp x29, x30, [sp], 80 + ret + .size ftl_discard, .-ftl_discard + .align 2 + .global FtlDiscard + .type FtlDiscard, %function +FtlDiscard: + stp x29, x30, [sp, -16]! + add x29, sp, 0 + bl ftl_discard + ldp x29, x30, [sp], 16 + ret + .size FtlDiscard, .-FtlDiscard + .align 2 + .global ftl_read + .type ftl_read, %function +ftl_read: + sub sp, sp, #208 + adrp x4, .LANCHOR1+504 + stp x29, x30, [sp, 16] + add x29, sp, 16 + stp x19, x20, [sp, 32] + stp x21, x22, [sp, 48] + ldr w20, [x4, #:lo12:.LANCHOR1+504] + stp x23, x24, [sp, 64] + stp x25, x26, [sp, 80] + cmp w20, 1 + stp x27, x28, [sp, 96] + bne .L3210 + mov x23, x3 + mov w24, w2 + mov w19, w1 + cmp w0, 16 + bne .L3187 + mov x2, x3 + mov w1, w24 + add w0, w19, 256 + bl FtlVendorPartRead + mov w25, w0 +.L3185: + mov w0, w25 + ldp x19, x20, [sp, 32] + ldp x21, x22, [sp, 48] + ldp x23, x24, [sp, 64] + ldp x25, x26, [sp, 80] + ldp x27, x28, [sp, 96] + ldp x29, x30, [sp, 16] + add sp, sp, 208 + ret +.L3187: + adrp x21, .LANCHOR0 + add x1, x21, :lo12:.LANCHOR0 + ldr w0, [x1, 2584] + cmp w19, w0 + bcs .L3210 + cmp w2, w0 + bhi .L3210 + add w2, w19, w2 + str w2, [x29, 148] + cmp w0, w2 + bcc .L3210 + ldrh w0, [x1, 2550] + sub w26, w2, #1 + adrp x7, .LANCHOR2 + udiv w27, w19, w0 + udiv w26, w26, w0 + sub w20, w20, w27 + add w0, w20, w26 + str w0, [x29, 172] + add x0, x7, :lo12:.LANCHOR2 + ldr w2, [x29, 172] + ldr w1, [x0, 748] + add w1, w1, w24 + str w1, [x0, 748] + ldr w1, [x0, 720] + add w1, w1, w2 + str w1, [x0, 720] + mov w1, w26 + mov w0, w27 + bl FtlCacheMetchLpa + str x7, [x29, 160] + cbz w0, .L3188 + bl FtlCacheWriteBack +.L3188: + mov w22, w27 + adrp x0, .LC147 + mov w28, 0 + add x0, x0, :lo12:.LC147 + mov w25, 0 + str x0, [x29, 104] + str wzr, [x29, 156] + str wzr, [x29, 168] +.L3189: + ldr w0, [x29, 172] + cbnz w0, .L3206 + ldr x0, [x29, 160] + add x0, x0, :lo12:.LANCHOR2 + ldrh w0, [x0, 1456] + cbz w0, .L3185 + mov w1, 1 + mov w0, 0 + bl ftl_do_gc + b .L3185 +.L3206: + mov w2, 0 + add x1, x29, 188 + mov w0, w22 + bl log2phys + ldr w4, [x29, 188] + cmn w4, #1 + bne .L3190 + add x5, x21, :lo12:.LANCHOR0 + mov w20, 0 +.L3191: + ldrh w0, [x5, 2550] + cmp w20, w0 + bcc .L3193 +.L3194: + ldr w0, [x29, 172] + add w22, w22, 1 + subs w0, w0, #1 + str w0, [x29, 172] + beq .L3198 + add x0, x21, :lo12:.LANCHOR0 + ldrh w0, [x0, 2472] + cmp w28, w0, lsl 3 + bne .L3189 +.L3198: + cbz w28, .L3189 + ldr x0, [x29, 160] + mov w1, w28 + mov w2, 0 + add x8, x0, :lo12:.LANCHOR2 + mov x20, x8 + ldr x0, [x8, 3584] + bl FlashReadPages + ldr w0, [x29, 156] + lsl w0, w0, 9 + str w0, [x29, 132] + ldr w0, [x29, 152] + lsl w0, w0, 9 + str x0, [x29, 136] + ldr w0, [x29, 168] + lsl w0, w0, 9 + str w0, [x29, 144] + mov w0, 56 + umull x0, w28, w0 + mov x28, 0 + str x0, [x29, 120] + add x0, x21, :lo12:.LANCHOR0 + str x0, [x29, 112] +.L3205: + ldr x0, [x20, 3584] + add x0, x0, x28 + ldr w1, [x0, 24] + cmp w27, w1 + bne .L3200 + ldr x1, [x0, 8] + ldr x0, [x20, 3640] + cmp x1, x0 + bne .L3201 + ldr x0, [x29, 136] + ldr w2, [x29, 144] + add x1, x1, x0 + mov x0, x23 +.L3226: + bl ftl_memcpy +.L3201: + ldr x1, [x20, 3584] + add x0, x1, x28 + ldr w2, [x1, x28] + cmn w2, #1 + bne .L3202 + ldr w1, [x20, 920] + mov w25, w2 + add w1, w1, 1 + str w1, [x20, 920] +.L3202: + ldr x1, [x0, 16] + ldr w2, [x0, 24] + ldr w1, [x1, 8] + cmp w2, w1 + beq .L3203 + ldr w1, [x20, 920] + add w1, w1, 1 + str w1, [x20, 920] + ldp x2, x1, [x0, 8] + ldr w3, [x2, 4] + str w3, [sp] + ldp w3, w4, [x1] + ldp w5, w6, [x1, 8] + ldr w7, [x2] + ldr w1, [x0, 24] + ldr w2, [x0, 4] + ldr x0, [x29, 104] + bl printk +.L3203: + ldr x0, [x20, 3584] + add x1, x0, x28 + ldr w0, [x0, x28] + cmp w0, 256 + bne .L3204 + ldr w0, [x1, 4] + lsr w0, w0, 10 + bl P2V_block_in_plane + bl FtlGcRefreshBlock +.L3204: + ldr x0, [x29, 120] + add x28, x28, 56 + cmp x0, x28 + bne .L3205 + mov w28, 0 + b .L3189 +.L3193: + madd w0, w22, w0, w20 + cmp w19, w0 + bhi .L3192 + ldr w1, [x29, 148] + cmp w1, w0 + bls .L3192 + sub w0, w0, w19 + str x5, [x29, 136] + lsl w0, w0, 9 + mov w2, 512 + mov w1, 0 + add x0, x23, x0 + bl ftl_memset + ldr x5, [x29, 136] +.L3192: + add w20, w20, 1 + b .L3191 +.L3190: + mov w0, 56 + cmp w22, w27 + umull x1, w28, w0 + ldr x0, [x29, 160] + add x0, x0, :lo12:.LANCHOR2 + ldr x2, [x0, 3584] + add x2, x2, x1 + str w4, [x2, 4] + ldr x2, [x0, 3584] + add x2, x2, x1 + bne .L3195 + ldr x0, [x0, 3640] + str x0, [x2, 8] + add x0, x21, :lo12:.LANCHOR0 + ldrh w0, [x0, 2550] + udiv w4, w19, w0 + msub w3, w4, w0, w19 + str w3, [x29, 152] + sub w4, w0, w3 + cmp w24, w4 + csel w3, w24, w4, ls + str w3, [x29, 168] + cmp w3, w0 + bne .L3196 + str x23, [x2, 8] +.L3196: + ldr x0, [x29, 160] + add x2, x0, :lo12:.LANCHOR2 + ldr x0, [x2, 3584] + ldr x2, [x2, 3664] + add x1, x0, x1 + add x0, x21, :lo12:.LANCHOR0 + ldrh w0, [x0, 2556] + str w22, [x1, 24] + mul w0, w0, w28 + add w28, w28, 1 + and x0, x0, 4294967292 + add x0, x2, x0 + str x0, [x1, 16] + b .L3194 +.L3195: + cmp w22, w26 + bne .L3197 + ldr x0, [x0, 3648] + str x0, [x2, 8] + add x0, x21, :lo12:.LANCHOR0 + ldr w3, [x29, 148] + ldrh w4, [x0, 2550] + mul w0, w22, w4 + sub w3, w3, w0 + str w3, [x29, 156] + cmp w4, w3 + bne .L3196 +.L3225: + sub w0, w0, w19 + lsl w0, w0, 9 + add x0, x23, x0 + str x0, [x2, 8] + b .L3196 +.L3197: + add x0, x21, :lo12:.LANCHOR0 + ldrh w0, [x0, 2550] + mul w0, w0, w22 + b .L3225 +.L3200: + cmp w26, w1 + bne .L3201 + ldr x1, [x0, 8] + ldr x0, [x20, 3648] + cmp x1, x0 + bne .L3201 + ldr x0, [x29, 112] + ldr w2, [x29, 132] + ldrh w0, [x0, 2550] + mul w0, w0, w26 + sub w0, w0, w19 + lsl w0, w0, 9 + add x0, x23, x0 + b .L3226 +.L3210: + mov w25, -1 + b .L3185 + .size ftl_read, .-ftl_read + .align 2 + .global ftl_vendor_read + .type ftl_vendor_read, %function +ftl_vendor_read: + stp x29, x30, [sp, -16]! + mov x3, x2 + mov w2, w1 + mov w1, w0 + add x29, sp, 0 + mov w0, 16 + bl ftl_read + ldp x29, x30, [sp], 16 + ret + .size ftl_vendor_read, .-ftl_vendor_read + .align 2 + .global FlashBootVendorRead + .type FlashBootVendorRead, %function +FlashBootVendorRead: + stp x29, x30, [sp, -48]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + mov w19, w0 + str x21, [sp, 32] + mov w20, w1 + mov x21, x2 + bl rknand_device_lock + adrp x0, .LANCHOR1+504 + ldr w0, [x0, #:lo12:.LANCHOR1+504] + cmp w0, 1 + bne .L3231 + mov w0, w19 + mov x2, x21 + mov w1, w20 + bl ftl_vendor_read + mov w19, w0 +.L3230: + bl rknand_device_unlock + ldr x21, [sp, 32] + mov w0, w19 + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 48 + ret +.L3231: + mov w19, -1 + b .L3230 + .size FlashBootVendorRead, .-FlashBootVendorRead + .align 2 + .global ftl_sys_read + .type ftl_sys_read, %function +ftl_sys_read: + stp x29, x30, [sp, -16]! + mov x3, x2 + mov w2, w1 + add w1, w0, 256 + add x29, sp, 0 + mov w0, 16 + bl ftl_read + ldp x29, x30, [sp], 16 + ret + .size ftl_sys_read, .-ftl_sys_read + .align 2 + .global StorageSysDataLoad + .type StorageSysDataLoad, %function +StorageSysDataLoad: + stp x29, x30, [sp, -32]! + mov w2, 512 + add x29, sp, 0 + stp x19, x20, [sp, 16] + mov x19, x1 + mov w1, 0 + mov w20, w0 + mov x0, x19 + bl ftl_memset + bl rknand_device_lock + mov x2, x19 + mov w1, 1 + mov w0, w20 + bl ftl_sys_read + mov w19, w0 + bl rknand_device_unlock + mov w0, w19 + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 32 + ret + .size StorageSysDataLoad, .-StorageSysDataLoad + .align 2 + .global FtlRead + .type FtlRead, %function +FtlRead: + stp x29, x30, [sp, -16]! + and w0, w0, 255 + add x29, sp, 0 + bl ftl_read + ldp x29, x30, [sp], 16 + ret + .size FtlRead, .-FtlRead + .align 2 + .global FtlInit + .type FtlInit, %function +FtlInit: + stp x29, x30, [sp, -48]! + mov w0, -1 + adrp x1, .LC75 + add x1, x1, :lo12:.LC75 + add x29, sp, 0 + stp x21, x22, [sp, 32] + adrp x21, .LANCHOR1 + add x21, x21, :lo12:.LANCHOR1 + stp x19, x20, [sp, 16] + adrp x19, .LANCHOR2 + add x19, x19, :lo12:.LANCHOR2 + adrp x20, .LANCHOR0 + add x20, x20, :lo12:.LANCHOR0 + str w0, [x21, 504] + adrp x0, .LANCHOR4+2004 + str wzr, [x19, 424] + str wzr, [x0, #:lo12:.LANCHOR4+2004] + adrp x0, .LC76 + add x0, x0, :lo12:.LC76 + bl printk + add x0, x20, 176 + bl FtlConstantsInit + bl FtlMemInit + bl FtlVariablesInit + ldrh w0, [x20, 2476] + bl FtlFreeSysBlkQueueInit + bl FtlLoadBbt + cbz w0, .L3240 + adrp x1, .LANCHOR3 + add x1, x1, :lo12:.LANCHOR3 + adrp x0, .LC160 + add x1, x1, 256 + add x0, x0, :lo12:.LC160 +.L3255: + bl printk +.L3241: + mov w0, 0 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x29, x30, [sp], 48 + ret +.L3240: + bl FtlSysBlkInit + cbz w0, .L3242 + adrp x1, .LANCHOR3 + add x1, x1, :lo12:.LANCHOR3 + adrp x0, .LC161 + add x1, x1, 256 + add x0, x0, :lo12:.LC161 + b .L3255 +.L3242: + mov w1, 1 + str w1, [x21, 504] + bl ftl_do_gc + ldrh w0, [x19, 552] + cmp w0, 15 + bhi .L3243 + add w21, w0, 2 + mov w20, 0 + mov w22, 65535 +.L3246: + ldrh w0, [x19, 800] + cmp w0, w22 + bne .L3244 + ldrh w0, [x19, 1448] + cmp w0, w22 + bne .L3244 + and w0, w20, 63 + bl List_get_gc_head_node + bl FtlGcRefreshBlock +.L3244: + mov w1, 1 + mov w0, w1 + bl ftl_do_gc + mov w1, 1 + mov w0, 0 + bl ftl_do_gc + ldrh w0, [x19, 552] + cmp w0, w21 + bhi .L3241 + add w20, w20, 1 + cmp w20, 4096 + bne .L3246 + b .L3241 +.L3243: + ldrb w0, [x20, 204] + cbz w0, .L3241 + mov w19, 128 +.L3248: + mov w1, 1 + mov w0, w1 + bl ftl_do_gc + subs w19, w19, #1 + bne .L3248 + b .L3241 + .size FtlInit, .-FtlInit + .align 2 + .global rk_ftl_init + .type rk_ftl_init, %function +rk_ftl_init: + stp x29, x30, [sp, -32]! + mov w0, 2048 + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x19, .LANCHOR4 + add x19, x19, :lo12:.LANCHOR4 + bl ftl_dma32_malloc + add x1, x19, 2016 + str x0, [x19, 2008] + add x0, x19, 1584 + str xzr, [x19, 1584] + str wzr, [x19, 1592] + str xzr, [x19, 2016] + bl rknand_get_reg_addr + ldr x0, [x19, 1584] + cbz x0, .L3261 + bl rk_nandc_irq_init + ldr x0, [x19, 2008] + mov w3, 2048 + mov w2, 0 + mov w1, 0 + bl FlashSramLoadStore + bl rknand_flash_cs_init + ldr x0, [x19, 1584] + bl FlashInit + mov w20, w0 + cbnz w0, .L3258 + bl FtlInit +.L3258: + adrp x0, .LC162 + mov w1, w20 + add x0, x0, :lo12:.LC162 + bl printk +.L3256: + mov w0, w20 + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 32 + ret +.L3261: + mov w20, -1 + b .L3256 + .size rk_ftl_init, .-rk_ftl_init + .align 2 + .global ftl_fix_nand_power_lost_error + .type ftl_fix_nand_power_lost_error, %function +ftl_fix_nand_power_lost_error: + stp x29, x30, [sp, -144]! + add x29, sp, 0 + stp x25, x26, [sp, 64] + adrp x25, .LANCHOR0 + add x0, x25, :lo12:.LANCHOR0 + stp x19, x20, [sp, 16] + stp x21, x22, [sp, 32] + stp x23, x24, [sp, 48] + str x27, [sp, 80] + ldrb w0, [x0, 204] + cbz w0, .L3263 + adrp x21, .LANCHOR4 + add x0, x21, :lo12:.LANCHOR4 + adrp x20, .LANCHOR2 + add x19, x20, :lo12:.LANCHOR2 + adrp x24, .LC163 + add x27, x19, 560 + ldrh w22, [x0, 1842] + add x26, x19, 608 + ldr x0, [x19, 520] + mov w1, w22 + ubfiz x23, x22, 1, 16 + ldrh w2, [x0, x23] + add x0, x24, :lo12:.LC163 + bl printk + ldrh w0, [x19, 560] + bl FtlGcRefreshOpenBlock + ldrh w0, [x19, 608] + bl FtlGcRefreshOpenBlock + mov x0, x27 + bl allocate_new_data_superblock + mov x0, x26 + mov x26, x24 + mov w27, 4097 + bl allocate_new_data_superblock +.L3265: + subs w27, w27, #1 + beq .L3269 + mov w1, 1 + mov w0, w1 + bl ftl_do_gc + ldr x0, [x19, 520] + ldrh w0, [x0, x23] + cbnz w0, .L3265 +.L3269: + add x24, x20, :lo12:.LANCHOR2 + mov w1, w22 + ldr x0, [x24, 520] + ldrh w2, [x0, x23] + add x0, x26, :lo12:.LC163 + bl printk + ldr x0, [x24, 520] + ldrh w19, [x0, x23] + cbnz w19, .L3267 + add x12, x29, 144 + add x25, x25, :lo12:.LANCHOR0 + strh w22, [x12, -48]! + mov x0, x12 + bl make_superblock + ldrh w5, [x25, 2472] + add x12, x12, 16 + mov w0, 0 + mov w6, 65535 + mov w7, 56 +.L3270: + cmp w0, w5 + bne .L3272 + add x20, x20, :lo12:.LANCHOR2 + mov w1, w22 + ldr x0, [x20, 520] + ldrh w2, [x0, x23] + adrp x0, .LC164 + add x0, x0, :lo12:.LC164 + bl printk + ldr x0, [x20, 432] + mov w2, w19 + mov w1, 0 + bl FlashEraseBlocks + ldr x0, [x20, 432] + mov w2, w19 + mov w1, 1 + bl FlashEraseBlocks +.L3267: + add x21, x21, :lo12:.LANCHOR4 + mov w0, -1 + strh w0, [x21, 1842] +.L3263: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldr x27, [sp, 80] + ldp x29, x30, [sp], 144 + ret +.L3272: + ldrh w2, [x12] + cmp w2, w6 + beq .L3271 + umull x4, w19, w7 + ldr x3, [x24, 432] + lsl w2, w2, 10 + add w19, w19, 1 + add x3, x3, x4 + and w19, w19, 65535 + str w2, [x3, 4] + ldr x1, [x24, 432] + add x1, x1, x4 + stp xzr, xzr, [x1, 8] +.L3271: + add w0, w0, 1 + add x12, x12, 2 + and w0, w0, 65535 + b .L3270 + .size ftl_fix_nand_power_lost_error, .-ftl_fix_nand_power_lost_error + .align 2 + .global rk_ftl_garbage_collect + .type rk_ftl_garbage_collect, %function +rk_ftl_garbage_collect: + stp x29, x30, [sp, -16]! + add x29, sp, 0 + bl ftl_do_gc + ldp x29, x30, [sp], 16 + ret + .size rk_ftl_garbage_collect, .-rk_ftl_garbage_collect + .align 2 + .global ftl_write + .type ftl_write, %function +ftl_write: + stp x29, x30, [sp, -272]! + add x29, sp, 0 + stp x21, x22, [sp, 32] + mov w22, w1 + adrp x1, .LANCHOR2 + add x4, x1, :lo12:.LANCHOR2 + stp x23, x24, [sp, 48] + mov w24, w2 + stp x19, x20, [sp, 16] + stp x25, x26, [sp, 64] + stp x27, x28, [sp, 80] + str x1, [x29, 168] + ldr w2, [x4, 424] + cbnz w2, .L3322 + adrp x1, .LANCHOR1 + add x2, x1, :lo12:.LANCHOR1 + str x1, [x29, 160] + ldr w2, [x2, 504] + cmp w2, 1 + bne .L3322 + mov x23, x3 + cmp w0, 16 + bne .L3282 + mov x2, x3 + mov w1, w24 + add w0, w22, 256 + bl FtlVendorPartWrite +.L3280: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 272 + ret +.L3282: + adrp x20, .LANCHOR0 + add x0, x20, :lo12:.LANCHOR0 + ldr w1, [x0, 2584] + cmp w22, w1 + bcs .L3325 + cmp w24, w1 + bhi .L3325 + add w2, w22, w24 + cmp w1, w2 + bcc .L3325 + adrp x3, .LANCHOR4 + add x25, x3, :lo12:.LANCHOR4 + mov w1, 2048 + sub w2, w2, #1 + str x3, [x29, 152] + str w1, [x25, 2024] + ldrh w1, [x0, 2550] + cmp w24, w1, lsl 1 + udiv w2, w2, w1 + udiv w27, w22, w1 + str w2, [x29, 196] + sub w28, w2, w27 + ldr w2, [x4, 728] + add w26, w28, 1 + add w2, w2, w26 + str w2, [x4, 728] + ldr w2, [x4, 744] + add w2, w2, w24 + str w2, [x4, 744] + cset w2, cs + str w2, [x29, 204] + ldr w2, [x0, 2600] + cbz w2, .L3284 + ldr x0, [x0, 2608] + sub w2, w2, #1 + mov w3, 56 + umaddl x2, w2, w3, x0 + ldr w0, [x2, 24] + cmp w27, w0 + bne .L3285 + ldr w0, [x4, 732] + ldr x3, [x2, 8] + add w0, w0, 1 + str w0, [x4, 732] + ldr w0, [x25, 2028] + add w0, w0, 1 + str w0, [x25, 2028] + msub w0, w27, w1, w22 + sub w1, w1, w0 + cmp w24, w1 + lsl w0, w0, 9 + csel w19, w24, w1, ls + add x0, x3, x0 + lsl w21, w19, 9 + mov x1, x23 + mov w2, w21 + bl ftl_memcpy + cbnz w28, .L3286 + ldr w0, [x25, 2028] + cmp w0, 2 + bgt .L3286 +.L3322: + mov w0, 0 + b .L3280 +.L3286: + sub w24, w24, w19 + add w22, w22, w19 + add x23, x23, x21 + add w27, w27, 1 + mov w26, w28 +.L3285: + ldr x0, [x29, 152] + add x0, x0, :lo12:.LANCHOR4 + str wzr, [x0, 2028] +.L3284: + ldr w1, [x29, 196] + mov w0, w27 + bl FtlCacheMetchLpa + cbz w0, .L3287 + bl FtlCacheWriteBack +.L3287: + ldr x1, [x29, 168] + mov w19, w27 + ldr x0, [x29, 152] + add x25, x1, :lo12:.LANCHOR2 + add x0, x0, :lo12:.LANCHOR4 + add x1, x25, 560 + mov x21, x1 + str x1, [x29, 128] + str x1, [x29, 176] + str x1, [x0, 1992] +.L3288: + cbnz w26, .L3316 + ldr w0, [x29, 196] + sub w1, w0, w27 + mov w0, 0 + bl ftl_do_gc + ldr x0, [x29, 168] + add x0, x0, :lo12:.LANCHOR2 + ldrh w0, [x0, 552] + cmp w0, 5 + bls .L3317 + cmp w0, 31 + bhi .L3322 + add x20, x20, :lo12:.LANCHOR0 + ldrb w0, [x20, 72] + cbnz w0, .L3322 +.L3317: + ldr x0, [x29, 168] + mov w20, 65535 + mov w21, 128 + add x19, x0, :lo12:.LANCHOR2 +.L3320: + ldrh w0, [x19, 800] + cmp w0, w20 + bne .L3319 + ldrh w0, [x19, 1448] + cmp w0, w20 + bne .L3319 + ldrh w0, [x19, 1450] + cmp w0, w20 + bne .L3319 + and w0, w26, 7 + bl List_get_gc_head_node + bl FtlGcRefreshBlock +.L3319: + mov w1, 1 + strh w21, [x19, 1366] + mov w0, w1 + strh w21, [x19, 1364] + bl ftl_do_gc + mov w1, 1 + mov w0, 0 + bl ftl_do_gc + ldr w0, [x19, 424] + cbnz w0, .L3322 + ldrh w0, [x19, 552] + cmp w0, 2 + bhi .L3322 + add w26, w26, 1 + cmp w26, 256 + bne .L3320 + b .L3322 +.L3316: + ldrh w0, [x21, 4] + cbnz w0, .L3289 + ldr x0, [x29, 128] + cmp x21, x0 + bne .L3290 + add x0, x25, 608 + ldrh w1, [x0, 4] + cbnz w1, .L3291 + bl allocate_new_data_superblock + ldr x0, [x29, 160] + add x0, x0, :lo12:.LANCHOR1 + str wzr, [x0, 3460] +.L3291: + ldr x0, [x29, 176] + add x21, x25, 608 + bl allocate_new_data_superblock + ldr x0, [x29, 160] + add x0, x0, :lo12:.LANCHOR1 + ldr w0, [x0, 3460] + cmp w0, 0 + ldr x0, [x29, 176] + csel x21, x21, x0, ne +.L3292: + ldrh w0, [x21, 4] + cbnz w0, .L3293 + mov x0, x21 + bl allocate_new_data_superblock +.L3293: + ldr x0, [x29, 152] + add x0, x0, :lo12:.LANCHOR4 + str x21, [x0, 1992] +.L3289: + add x1, x20, :lo12:.LANCHOR0 + ldr w0, [x25, 3580] + str wzr, [x29, 200] + ldr w1, [x1, 2600] + sub w0, w0, w1 + ldrh w1, [x21, 4] + cmp w0, w26 + csel w0, w0, w26, ls + cmp w1, w0 + csel w0, w1, w0, ls + str w0, [x29, 124] + ldr w0, [x29, 204] + and w0, w0, 1 + str w0, [x29, 120] + adrp x0, .LC165 + add x0, x0, :lo12:.LC165 + str x0, [x29, 112] +.L3294: + ldr w1, [x29, 124] + ldr w0, [x29, 200] + cmp w0, w1 + bne .L3312 +.L3295: + ldr w0, [x29, 200] + sub w26, w26, w0 + add x0, x20, :lo12:.LANCHOR0 + ldr w1, [x0, 2600] + ldr w0, [x25, 3580] + cmp w1, w0 + bcs .L3313 + ldr w0, [x29, 204] + cbnz w0, .L3313 + ldrh w0, [x21, 4] + cbz w0, .L3313 +.L3315: + str wzr, [x29, 204] + b .L3288 +.L3290: + ldr x0, [x29, 160] + add x0, x0, :lo12:.LANCHOR1 + str wzr, [x0, 3460] + ldr x0, [x29, 128] + ldrh w0, [x0, 4] + cbnz w0, .L3329 + mov x0, x21 + bl allocate_new_data_superblock + b .L3292 +.L3329: + ldr x21, [x29, 176] + b .L3293 +.L3312: + ldrh w0, [x21, 4] + cbz w0, .L3295 + ldr w0, [x29, 196] + cmp w0, w19 + ldr w0, [x29, 120] + cset w4, eq + tst w4, w0 + beq .L3296 + ldr w0, [x29, 200] + cbz w0, .L3296 + add x0, x20, :lo12:.LANCHOR0 + ldrh w1, [x0, 2550] + add w0, w22, w24 + msub w0, w19, w1, w0 + cmp w1, w0 + bne .L3295 +.L3296: + add x1, x29, 212 + mov w2, 0 + str w4, [x29, 108] + mov w0, w19 + bl log2phys + mov x0, x21 + bl get_new_active_ppa + add x3, x20, :lo12:.LANCHOR0 + mov w5, 56 + str x3, [x29, 184] + str w5, [x29, 192] + ldr w6, [x3, 2600] + ldr x1, [x3, 2608] + umull x2, w6, w5 + add x1, x1, x2 + str w0, [x1, 4] + ldr x0, [x3, 2608] + add x0, x0, x2 + ldrh w2, [x3, 2556] + str w19, [x0, 24] + mul w1, w6, w2 + and x1, x1, 4294967292 + str x1, [x29, 144] + ldr x1, [x25, 3672] + ldr x4, [x29, 144] + str x1, [x29, 136] + add x28, x1, x4 + ldrh w1, [x3, 2554] + str x28, [x0, 16] + mul w1, w1, w6 + ldr x6, [x25, 3632] + and x1, x1, 4294967292 + add x1, x6, x1 + str x1, [x0, 8] + mov w1, 0 + mov x0, x28 + bl ftl_memset + cmp w27, w19 + ldr w4, [x29, 108] + cset w0, eq + ldr w5, [x29, 192] + orr w4, w4, w0 + ldr x3, [x29, 184] + cbz w4, .L3297 + bne .L3298 + ldrh w2, [x3, 2550] + udiv w0, w22, w2 + msub w0, w0, w2, w22 + str w0, [x29, 192] + sub w2, w2, w0 + cmp w2, w24 + csel w0, w2, w24, ls + str w0, [x29, 184] +.L3299: + add x0, x20, :lo12:.LANCHOR0 + ldr w2, [x29, 184] + ldrh w1, [x0, 2550] + cmp w1, w2 + bne .L3300 + cmp w27, w19 + beq .L3330 + mul w1, w19, w2 + sub w1, w1, w22 + lsl w1, w1, 9 + add x1, x23, x1 +.L3301: + ldr w0, [x29, 204] + add x2, x20, :lo12:.LANCHOR0 + cbz w0, .L3302 + ldr w0, [x2, 2600] + mov w3, 56 + ldr x2, [x2, 2608] + umaddl x0, w0, w3, x2 +.L3348: + str x1, [x0, 8] +.L3303: + ldp x1, x2, [x29, 136] + mov w0, -3947 + strh w0, [x1, x2] + add x1, x20, :lo12:.LANCHOR0 + ldr w0, [x25, 756] + stp w0, w19, [x28, 4] + add w19, w19, 1 + add w0, w0, 1 + cmn w0, #1 + csel w0, w0, wzr, ne + str w0, [x25, 756] + ldr w0, [x29, 212] + str w0, [x28, 12] + ldrh w0, [x21] + strh w0, [x28, 2] + ldr w0, [x1, 2600] + add w0, w0, 1 + str w0, [x1, 2600] + ldr w0, [x29, 200] + add w0, w0, 1 + str w0, [x29, 200] + b .L3294 +.L3298: + ldrh w0, [x3, 2550] + add w2, w22, w24 + str wzr, [x29, 192] + msub w2, w19, w0, w2 + and w0, w2, 65535 + str w0, [x29, 184] + b .L3299 +.L3330: + mov x1, x23 + b .L3301 +.L3302: + ldr w0, [x2, 2600] + mov w4, 56 + ldr x3, [x2, 2608] + ldrh w2, [x2, 2554] + nop // between mem op and mult-accumulate + umaddl x0, w0, w4, x3 +.L3349: + ldr x0, [x0, 8] + b .L3351 +.L3300: + ldr w1, [x29, 212] + mov w2, 56 + cmn w1, #1 + beq .L3304 + str w1, [x29, 220] + ldr w1, [x0, 2600] + ldr x0, [x0, 2608] + str w19, [x29, 240] + nop // between mem op and mult-accumulate + umaddl x0, w1, w2, x0 + mov w2, 0 + ldp x1, x0, [x0, 8] + stp x1, x0, [x29, 224] + mov w1, 1 + add x0, x29, 216 + bl FlashReadPages + ldr w0, [x29, 216] + cmn w0, #1 + bne .L3305 + ldr w0, [x25, 920] + add w0, w0, 1 + str w0, [x25, 920] +.L3307: + ldr w0, [x29, 184] + cmp w27, w19 + lsl w2, w0, 9 + bne .L3308 + add x0, x20, :lo12:.LANCHOR0 + mov w3, 56 + ldr w1, [x0, 2600] + ldr x0, [x0, 2608] + umaddl x1, w1, w3, x0 + ldr w0, [x29, 192] + lsl w0, w0, 9 + ldr x3, [x1, 8] + mov x1, x23 + add x0, x3, x0 +.L3351: + bl ftl_memcpy + b .L3303 +.L3305: + ldr w0, [x28, 8] + cmp w19, w0 + beq .L3307 + ldr w0, [x25, 920] + mov w2, w19 + add w0, w0, 1 + str w0, [x25, 920] + ldr x0, [x29, 112] + ldr w1, [x28, 8] + bl printk + b .L3307 +.L3304: + ldr x1, [x0, 2608] + ldr w3, [x0, 2600] + umaddl x3, w3, w2, x1 + ldrh w2, [x0, 2554] + mov w1, 0 + ldr x0, [x3, 8] + bl ftl_memset + b .L3307 +.L3308: + add x3, x20, :lo12:.LANCHOR0 + mov w4, 56 + ldrh w1, [x3, 2550] + ldr w0, [x3, 2600] + ldr x3, [x3, 2608] + mul w1, w1, w19 + umaddl x0, w0, w4, x3 + sub w1, w1, w22 + lsl w1, w1, 9 +.L3350: + add x1, x23, x1 + b .L3349 +.L3297: + ldr w0, [x29, 204] + ldrh w1, [x3, 2550] + cbz w0, .L3309 + mul w1, w1, w19 + ldr w0, [x3, 2600] + ldr x2, [x3, 2608] + sub w1, w1, w22 + lsl w1, w1, 9 + add x1, x23, x1 + umaddl x0, w0, w5, x2 + b .L3348 +.L3309: + ldr x2, [x3, 2608] + mul w1, w1, w19 + ldr w0, [x3, 2600] + sub w1, w1, w22 + lsl w1, w1, 9 + umaddl x0, w0, w5, x2 + ldrh w2, [x3, 2554] + b .L3350 +.L3313: + bl FtlCacheWriteBack + add x0, x20, :lo12:.LANCHOR0 + cmp w26, 1 + str wzr, [x0, 2600] + bhi .L3288 + b .L3315 +.L3325: + mov w0, -1 + b .L3280 + .size ftl_write, .-ftl_write + .align 2 + .global ftl_vendor_write + .type ftl_vendor_write, %function +ftl_vendor_write: + stp x29, x30, [sp, -16]! + mov x3, x2 + mov w2, w1 + mov w1, w0 + add x29, sp, 0 + mov w0, 16 + bl ftl_write + ldp x29, x30, [sp], 16 + ret + .size ftl_vendor_write, .-ftl_vendor_write + .align 2 + .global FlashBootVendorWrite + .type FlashBootVendorWrite, %function +FlashBootVendorWrite: + stp x29, x30, [sp, -48]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + mov w19, w0 + str x21, [sp, 32] + mov w20, w1 + mov x21, x2 + bl rknand_device_lock + adrp x0, .LANCHOR1+504 + ldr w0, [x0, #:lo12:.LANCHOR1+504] + cmp w0, 1 + bne .L3356 + mov w0, w19 + mov x2, x21 + mov w1, w20 + bl ftl_vendor_write + mov w19, w0 +.L3355: + bl rknand_device_unlock + ldr x21, [sp, 32] + mov w0, w19 + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 48 + ret +.L3356: + mov w19, -1 + b .L3355 + .size FlashBootVendorWrite, .-FlashBootVendorWrite + .align 2 + .global ftl_sys_write + .type ftl_sys_write, %function +ftl_sys_write: + stp x29, x30, [sp, -16]! + mov x3, x2 + mov w2, w1 + add w1, w0, 256 + add x29, sp, 0 + mov w0, 16 + bl ftl_write + ldp x29, x30, [sp], 16 + ret + .size ftl_sys_write, .-ftl_sys_write + .align 2 + .global StorageSysDataStore + .type StorageSysDataStore, %function +StorageSysDataStore: + stp x29, x30, [sp, -32]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + mov x20, x1 + mov w19, w0 + bl rknand_device_lock + mov x2, x20 + mov w1, 1 + mov w0, w19 + bl ftl_sys_write + mov w19, w0 + bl rknand_device_unlock + mov w0, w19 + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 32 + ret + .size StorageSysDataStore, .-StorageSysDataStore + .align 2 + .global FtlDumpSysBlock + .type FtlDumpSysBlock, %function +FtlDumpSysBlock: + sub sp, sp, #96 + stp x29, x30, [sp, 16] + add x29, sp, 16 + stp x19, x20, [sp, 32] + adrp x19, .LANCHOR4 + stp x21, x22, [sp, 48] + add x19, x19, :lo12:.LANCHOR4 + stp x23, x24, [sp, 64] + adrp x21, .LANCHOR2 + and w24, w0, 65535 + add x0, x21, :lo12:.LANCHOR2 + str x25, [sp, 80] + add x19, x19, 1712 + adrp x22, .LANCHOR0 + adrp x23, .LC166 + ldr x1, [x0, 3608] + add x22, x22, :lo12:.LANCHOR0 + ldr x0, [x0, 3656] + add x23, x23, :lo12:.LC166 + lsl w25, w24, 10 + mov w20, 0 + stp x1, x0, [x19, 8] +.L3363: + ldrh w0, [x22, 2546] + cmp w20, w0 + blt .L3365 + ldp x19, x20, [sp, 32] + ldp x21, x22, [sp, 48] + ldp x23, x24, [sp, 64] + ldp x29, x30, [sp, 16] + ldr x25, [sp, 80] + add sp, sp, 96 + ret +.L3365: + orr w0, w20, w25 + mov w2, 1 + str w0, [x19, 4] + mov w1, w2 + mov x0, x19 + bl FlashReadPages + ldp x1, x0, [x19, 8] + ldr w1, [x1] + str w1, [sp] + mov w1, w24 + ldp w4, w5, [x0] + ldp w6, w7, [x0, 8] + mov x0, x23 + ldp w2, w3, [x19] + bl printk + ldr x0, [x19, 16] + ldr w0, [x0] + cmn w0, #1 + beq .L3364 + add x0, x21, :lo12:.LANCHOR2 + mov w3, 768 + mov w2, 4 + ldr x1, [x0, 3608] + adrp x0, .LC167 + add x0, x0, :lo12:.LC167 + bl rknand_print_hex +.L3364: + add w20, w20, 1 + sxth w20, w20 + b .L3363 + .size FtlDumpSysBlock, .-FtlDumpSysBlock + .align 2 + .global dump_map_info + .type dump_map_info, %function +dump_map_info: + sub sp, sp, #112 + stp x29, x30, [sp, 16] + add x29, sp, 16 + stp x19, x20, [sp, 32] + adrp x19, .LANCHOR0 + add x20, x19, :lo12:.LANCHOR0 + stp x23, x24, [sp, 64] + stp x21, x22, [sp, 48] + adrp x23, .LANCHOR2 + stp x25, x26, [sp, 80] + mov x21, x19 + stp x27, x28, [sp, 96] + add x24, x20, 2504 + add x26, x23, :lo12:.LANCHOR2 + ldrh w22, [x20, 2480] +.L3371: + ldrh w0, [x20, 2482] + cmp w0, w22 + bhi .L3377 + adrp x19, .LANCHOR4 + add x19, x19, :lo12:.LANCHOR4 + add x19, x19, 1712 + mov w22, 0 + adrp x26, .LANCHOR2 +.L3378: + add x20, x26, :lo12:.LANCHOR2 + ldrh w0, [x20, 3856] + cmp w22, w0 + bge .L3381 + adrp x23, .LC112 + sbfiz x24, x22, 1, 32 + mov w20, 0 + add x23, x23, :lo12:.LC112 + b .L3382 +.L3373: + ldrb w0, [x24, x5] + mov w1, w22 + bl V2P_block + and w4, w0, 65535 + bl FtlBbmIsBadBlock + cbnz w0, .L3372 + umull x2, w19, w7 + ldr x0, [x26, 3584] + lsl w4, w4, 10 + add x0, x0, x2 + str w4, [x0, 4] + ldr x1, [x26, 3584] + ldr x0, [x26, 1392] + add x1, x1, x2 + ldr x2, [x26, 1400] + str x0, [x1, 8] + mul w0, w19, w8 + add w19, w19, 1 + and w19, w19, 65535 + sdiv w0, w0, w6 + add x0, x2, w0, sxtw 2 + str x0, [x1, 16] +.L3372: + add x5, x5, 1 +.L3379: + cmp w9, w5, uxth + bhi .L3373 + cbnz w19, .L3374 +.L3376: + add w22, w22, 1 + and w22, w22, 65535 + b .L3371 +.L3374: + ldr x0, [x26, 3584] + mov w1, w19 + mov w2, 1 + adrp x27, .LC168 + add x28, x23, :lo12:.LANCHOR2 + add x27, x27, :lo12:.LC168 + mov x25, 0 + bl FlashReadPages + mov w0, 56 + umull x19, w19, w0 +.L3375: + ldr x0, [x28, 3584] + add x0, x0, x25 + add x25, x25, 56 + ldr x1, [x0, 16] + ldr w2, [x0, 4] + ldr x0, [x0, 8] + ldr w3, [x0, 4] + str w3, [sp] + ldr w7, [x0] + mov x0, x27 + ldp w3, w4, [x1] + ldp w5, w6, [x1, 8] + ubfx x1, x2, 10, 16 + bl printk + cmp x25, x19 + beq .L3376 + b .L3375 +.L3377: + ldrh w9, [x20, 2472] + mov x5, 0 + ldrh w8, [x20, 2556] + mov w19, 0 + mov w7, 56 + mov w6, 4 + b .L3379 +.L3380: + add x25, x26, :lo12:.LANCHOR2 + mov w2, 1 + mov w1, w2 + ldr x0, [x25, 3712] + ldrh w0, [x0, x24] + orr w0, w20, w0, lsl 10 + str w0, [x19, 4] + mov x0, x19 + bl FlashReadPages + ldp x2, x0, [x19, 8] + add w20, w20, 1 + ldr x1, [x25, 3712] + sxth w20, w20 + ldr w3, [x2, 4] + ldrh w1, [x1, x24] + str w3, [sp, 8] + ldr w2, [x2] + str w2, [sp] + ldp w4, w5, [x0] + ldp w6, w7, [x0, 8] + mov x0, x23 + ldp w2, w3, [x19] + bl printk +.L3382: + add x0, x21, :lo12:.LANCHOR0 + ldrh w0, [x0, 2546] + cmp w20, w0 + blt .L3380 + add w22, w22, 1 + sxth w22, w22 + b .L3378 +.L3381: + add x21, x21, :lo12:.LANCHOR0 + ldr x1, [x20, 3712] + mov w2, 2 + adrp x0, .LC169 + add x0, x0, :lo12:.LC169 + ldr w3, [x21, 2572] + bl rknand_print_hex + ldrh w3, [x21, 2580] + mov w2, 4 + ldr x1, [x20, 3752] + adrp x0, .LC170 + add x0, x0, :lo12:.LC170 + bl rknand_print_hex + ldrh w3, [x21, 2580] + mov w2, 4 + ldr x1, [x20, 3760] + adrp x0, .LC171 + add x0, x0, :lo12:.LC171 + bl rknand_print_hex + ldp x19, x20, [sp, 32] + ldp x21, x22, [sp, 48] + ldp x23, x24, [sp, 64] + ldp x25, x26, [sp, 80] + ldp x27, x28, [sp, 96] + ldp x29, x30, [sp, 16] + add sp, sp, 112 + ret + .size dump_map_info, .-dump_map_info + .align 2 + .global flash_boot_enter_slc_mode + .type flash_boot_enter_slc_mode, %function +flash_boot_enter_slc_mode: + adrp x1, .LANCHOR0+2392 + ldr w2, [x1, #:lo12:.LANCHOR0+2392] + mov w1, 12336 + movk w1, 0x5638, lsl 16 + cmp w2, w1 + bne .L3388 + stp x29, x30, [sp, -16]! + and w0, w0, 255 + add x29, sp, 0 + bl flash_enter_slc_mode + ldp x29, x30, [sp], 16 + ret +.L3388: + ret + .size flash_boot_enter_slc_mode, .-flash_boot_enter_slc_mode + .align 2 + .global flash_boot_exit_slc_mode + .type flash_boot_exit_slc_mode, %function +flash_boot_exit_slc_mode: + adrp x1, .LANCHOR0+2392 + ldr w2, [x1, #:lo12:.LANCHOR0+2392] + mov w1, 12336 + movk w1, 0x5638, lsl 16 + cmp w2, w1 + bne .L3394 + stp x29, x30, [sp, -16]! + and w0, w0, 255 + add x29, sp, 0 + bl flash_exit_slc_mode + ldp x29, x30, [sp], 16 + ret +.L3394: + ret + .size flash_boot_exit_slc_mode, .-flash_boot_exit_slc_mode + .align 2 + .global write_idblock + .type write_idblock, %function +write_idblock: + stp x29, x30, [sp, -240]! + add x29, sp, 0 + stp x23, x24, [sp, 48] + adrp x24, .LANCHOR0 + stp x19, x20, [sp, 16] + mov w19, w0 + add x0, x24, :lo12:.LANCHOR0 + stp x21, x22, [sp, 32] + stp x25, x26, [sp, 64] + mov x22, x1 + stp x27, x28, [sp, 80] + mov x23, x2 + ldr x1, [x0, 88] + ldr w20, [x0, 76] + mov w0, 59392 + movk w0, 0x3, lsl 16 + ldrb w21, [x1, 9] + bl ftl_malloc + cbz x0, .L3421 + add w19, w19, 511 + mov x26, x0 + lsr w19, w19, 9 + cmp w19, 8 + bls .L3422 + mov w0, -1 + cmp w19, 500 + bhi .L3397 +.L3399: + ldr w2, [x22] + mov w1, 35899 + movk w1, 0xfcdc, lsl 16 + mov w0, -1 + cmp w2, w1 + bne .L3397 + mul w21, w21, w20 + add x3, x22, 253952 + add x3, x3, 1532 + mov w2, 63871 + and w21, w21, 65535 + mov w4, 4097 + add w0, w21, w0 + add w0, w0, w19 + udiv w0, w0, w21 + str w0, [x29, 168] + mov w0, 0 +.L3403: + ldr w1, [x3] + cbnz w1, .L3400 + ldr w1, [x22, w0, uxtw 2] + add w0, w0, 1 + str w1, [x3, 512] + cmp w0, w4 + sub w2, w2, #1 + csel w0, w0, wzr, cc + sub x3, x3, #4 + cmp w2, 4096 + bne .L3403 +.L3402: + add x20, x24, :lo12:.LANCHOR0 + mov w3, 5 + mov w2, 4 + mov x1, x23 + adrp x0, .LC173 + add x0, x0, :lo12:.LC173 + bl rknand_print_hex + adrp x25, .LANCHOR4 + ldrb w2, [x20, 73] + adrp x0, .LC174 + ldr w1, [x22, 512] + add x0, x0, :lo12:.LC174 + bl printk + add x0, x25, :lo12:.LANCHOR4 + ldrh w3, [x20, 202] + mov w1, w19 + mov w2, w19 + ldr w4, [x0, 1644] + adrp x0, .LC175 + add x0, x0, :lo12:.LC175 + bl printk + str x25, [x29, 160] + ldrb w0, [x20, 73] + ldr w1, [x22, 512] + cmp w1, w0 + bls .L3404 + str w0, [x22, 512] +.L3404: + lsl w0, w19, 7 + add x28, x24, :lo12:.LANCHOR0 + str w0, [x29, 140] + mov x20, 0 + add x0, x28, 208 + str wzr, [x29, 172] + str x0, [x29, 152] +.L3420: + ldr w1, [x23, x20, lsl 2] + ldrb w0, [x28, 73] + str w20, [x29, 136] + cmp w1, w0 + bcs .L3405 + ldr x0, [x29, 160] + add x0, x0, :lo12:.LANCHOR4 + ldr w0, [x0, 1644] + cmp w1, w0 + bcc .L3405 + ldr w0, [x29, 168] + cmp w20, 0 + ccmp w0, 1, 0, ne + bls .L3406 + sub w0, w20, #1 + ldr w0, [x23, x0, lsl 2] + add w0, w0, 1 + cmp w1, w0 + beq .L3405 +.L3406: + mov x2, 512 + mov w1, 0 + mov x0, x26 + bl memset + ldr w24, [x23, x20, lsl 2] + mov w2, w19 + ldr x0, [x28, 88] + ldr w25, [x28, 76] + mul w24, w21, w24 + ldrb w27, [x0, 9] + adrp x0, .LC176 + mov w1, w24 + add x0, x0, :lo12:.LC176 + bl printk + mov w0, 0 + bl flash_boot_enter_slc_mode + mul w25, w25, w27 + udiv w1, w24, w27 + mov w2, 0 + and w25, w25, 65535 + mov w0, 0 + bl FlashEraseBlock + cmp w25, w19 + bcs .L3425 + add w1, w24, w25 + mov w2, 0 + mov w0, 0 + bl FlashEraseBlock + mov w1, 2 +.L3407: + mov w0, 0 + str w1, [x29, 144] + bl flash_boot_exit_slc_mode + ldr x0, [x28, 88] + mov w5, 0 + ldr w1, [x29, 144] + mov w10, 1073741823 + udiv w8, w24, w25 + ldrh w4, [x0, 10] + ldrb w0, [x0, 12] + msub w8, w8, w25, w24 + mov x25, x22 + lsl w4, w4, 2 + mul w4, w4, w1 + sdiv w4, w4, w0 + sub w0, w24, w8 + str w0, [x29, 144] +.L3408: + cmp w4, w5 + bhi .L3412 + mov w1, w24 + mov w3, 0 + mov w2, w19 + adrp x0, .LC177 + add x0, x0, :lo12:.LC177 + bl printk + ldr x0, [x28, 88] + mov w2, w19 + ldr w25, [x28, 76] + ldr w24, [x23, x20, lsl 2] + ldrb w5, [x0, 9] + adrp x0, .LC178 + str w5, [x29, 144] + add x0, x0, :lo12:.LC178 + mul w24, w21, w24 + mul w25, w25, w5 + mov w1, w24 + bl printk + and w25, w25, 65535 + ldr w5, [x29, 144] + ldr x1, [x29, 160] + mov x7, x26 + mov w4, 0 + mov w9, 4 + udiv w27, w24, w25 + add x10, x1, :lo12:.LANCHOR4 + msub w27, w27, w25, w24 + sub w8, w24, w27 + mul w0, w27, w5 + ubfx x0, x0, 2, 2 +.L3413: + cmp w4, w19 + bcc .L3415 + mov w1, w24 + mov w3, 0 + mov w2, w19 + adrp x0, .LC179 + add x0, x0, :lo12:.LC179 + bl printk + mov x1, x26 + mov x0, x22 + mov x24, 0 +.L3416: + ldr w2, [x29, 140] + cmp w24, w2 + bcc .L3418 + ldr w0, [x29, 172] + add w0, w0, 1 + str w0, [x29, 172] + b .L3405 +.L3422: + mov w19, 8 + b .L3399 +.L3400: + adrp x0, .LC172 + add x0, x0, :lo12:.LC172 + bl printk + b .L3402 +.L3425: + mov w1, 1 + b .L3407 +.L3412: + add w1, w8, w5 + lsr w1, w1, 2 + cbz w1, .L3409 + ldr x0, [x29, 152] + add w2, w1, 1 + ldrb w3, [x28, 204] + ldrh w0, [x0, w2, sxtw 1] + cbz w3, .L3410 + ldr w3, [x28, 2392] + mov w6, 12336 + movk w6, 0x5638, lsl 16 + cmp w3, w6 + csel w0, w0, w2, ne +.L3410: + add w0, w0, w10 + lsl w0, w0, 2 + str w0, [x29, 176] +.L3409: + mov w0, 61424 + str w0, [x29, 180] + ldr x0, [x29, 152] + ldrh w7, [x0, w1, sxtw 1] + ldrb w0, [x28, 204] + cbz w0, .L3411 + ldr w0, [x28, 2392] + mov w2, 12336 + movk w2, 0x5638, lsl 16 + cmp w0, w2 + csel w7, w7, w1, ne +.L3411: + ldr w0, [x29, 144] + ldrb w11, [x28, 2464] + stp w10, w5, [x29, 104] + stp w8, w4, [x29, 112] + madd w1, w27, w7, w0 + ldr x0, [x29, 160] + stp w7, w1, [x29, 120] + add x0, x0, :lo12:.LANCHOR4 + str w11, [x29, 128] + ldrb w0, [x0, 1650] + bl FlashBchSel + mov w0, 0 + bl flash_boot_enter_slc_mode + ldr x0, [x28, 88] + mov x2, x25 + ldr w1, [x29, 124] + add x3, x29, 176 + add x25, x25, 2048 + ldrb w0, [x0, 9] + udiv w1, w1, w0 + mov w0, 0 + bl FlashProgPage + mov w0, 0 + bl flash_boot_exit_slc_mode + ldr w11, [x29, 128] + mov w0, w11 + bl FlashBchSel + ldr w0, [x29, 144] + ldr w7, [x29, 120] + add w2, w7, 1 + udiv w1, w0, w27 + mov w0, 0 + bl FlashPageProgMsbFFData + ldp w10, w5, [x29, 104] + ldp w8, w4, [x29, 112] + add w5, w5, 4 + and w5, w5, 65535 + b .L3408 +.L3415: + add w2, w27, w4 + ldr x1, [x29, 152] + ldrb w3, [x28, 204] + lsr w2, w2, 2 + sub w25, w9, w0 + and w25, w25, 65535 + ldrh w1, [x1, w2, sxtw 1] + cbz w3, .L3414 + ldr w3, [x28, 2392] + mov w6, 12336 + movk w6, 0x5638, lsl 16 + cmp w3, w6 + csel w1, w1, w2, ne +.L3414: + add w0, w0, w8 + ldrb w11, [x28, 2464] + stp w9, w4, [x29, 100] + stp w8, w5, [x29, 108] + madd w1, w5, w1, w0 + ldr x0, [x28, 88] + str x10, [x29, 128] + str w11, [x29, 124] + str x7, [x29, 144] + ldrb w12, [x0, 9] + ldrb w0, [x10, 1650] + stp w1, w12, [x29, 116] + bl FlashBchSel + mov w0, 0 + bl flash_boot_enter_slc_mode + ldp w1, w12, [x29, 116] + mov x3, 0 + ldr x7, [x29, 144] + mov w0, 0 + udiv w1, w1, w12 + mov x2, x7 + bl FlashReadPage + mov w0, 0 + bl flash_boot_exit_slc_mode + ldr w11, [x29, 124] + mov w0, w11 + bl FlashBchSel + ldp w9, w4, [x29, 100] + ubfiz x0, x25, 9, 16 + ldr x7, [x29, 144] + add w4, w25, w4 + ldr x10, [x29, 128] + add x7, x7, x0 + and w4, w4, 65535 + ldp w8, w5, [x29, 108] + mov w0, 0 + b .L3413 +.L3418: + mov x25, x1 + mov x27, x0 + add x2, x24, 1 + add x1, x1, 4 + add x0, x0, 4 + ldr w4, [x25] + ldr w3, [x27] + cmp w4, w3 + beq .L3426 + mov x2, 512 + mov w1, 0 + mov x0, x26 + bl memset + ldr w4, [x25] + mov w3, w24 + ldr w5, [x27] + and x24, x24, -256 + ldr w2, [x23, x20, lsl 2] + lsl x24, x24, 2 + ldr w1, [x29, 136] + adrp x0, .LC180 + add x0, x0, :lo12:.LC180 + bl printk + mov w3, 256 + mov w2, 4 + add x1, x22, x24 + adrp x0, .LC181 + add x0, x0, :lo12:.LC181 + bl rknand_print_hex + add x1, x26, x24 + mov w3, 256 + mov w2, 4 + adrp x0, .LC182 + add x0, x0, :lo12:.LC182 + bl rknand_print_hex + mov w0, 0 + bl flash_boot_enter_slc_mode + ldr w1, [x23, x20, lsl 2] + mov w2, 0 + mov w0, 0 + mul w1, w21, w1 + bl FlashEraseBlock + ldr w0, [x29, 168] + cmp w0, 1 + bls .L3417 + ldr w1, [x23, x20, lsl 2] + mov w2, 0 + mov w0, 0 + madd w1, w1, w21, w21 + bl FlashEraseBlock +.L3417: + mov w0, 0 + bl flash_boot_exit_slc_mode + ldr w1, [x23, x20, lsl 2] + adrp x0, .LC183 + add x0, x0, :lo12:.LC183 + bl printk +.L3405: + add x20, x20, 1 + cmp x20, 5 + bne .L3420 + mov x0, x26 + bl ftl_free + ldr w0, [x29, 172] + cmp w0, 0 + csetm w0, eq +.L3397: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 240 + ret +.L3426: + mov x24, x2 + b .L3416 +.L3421: + mov w0, -1 + b .L3397 + .size write_idblock, .-write_idblock + .align 2 + .global write_loader_lba + .type write_loader_lba, %function +write_loader_lba: + stp x29, x30, [sp, -112]! + cmp w0, 64 + add x29, sp, 0 + stp x19, x20, [sp, 16] + mov w19, w0 + stp x21, x22, [sp, 32] + adrp x20, .LANCHOR4 + stp x23, x24, [sp, 48] + mov w21, w1 + mov x24, x2 + bne .L3447 + ldr w1, [x2] + mov w0, 35899 + movk w0, 0xfcdc, lsl 16 + cmp w1, w0 + bne .L3447 + add x22, x20, :lo12:.LANCHOR4 + mov w0, 1 + strb w0, [x22, 2032] + mov w0, 59392 + movk w0, 0x3, lsl 16 + bl ftl_malloc + mov w2, 59392 + mov w1, 0 + movk w2, 0x3, lsl 16 + str x0, [x22, 2040] + bl ftl_memset + str w19, [x22, 2048] +.L3447: + add x23, x20, :lo12:.LANCHOR4 + ldr w2, [x24] + mov w4, w21 + mov w3, w19 + adrp x0, .LC184 + add x0, x0, :lo12:.LC184 + ldr x1, [x23, 2040] + bl printk + ldrb w0, [x23, 2032] + cbz w0, .L3446 + sub w0, w19, #64 + ldr x22, [x23, 2040] + cmp w0, 499 + bhi .L3449 + mov w2, 564 + sub w2, w2, w19 + cmp w21, w2 + ubfiz x0, x0, 9, 25 + csel w2, w21, w2, ls + mov x1, x24 + lsl w2, w2, 9 + add x0, x22, x0 + bl ftl_memcpy +.L3450: + add x0, x20, :lo12:.LANCHOR4 + ldr w1, [x0, 2048] + cmp w19, w1 + beq .L3459 + strb wzr, [x0, 2032] + cbz x22, .L3460 + mov x0, x22 + bl ftl_free +.L3460: + add x0, x20, :lo12:.LANCHOR4 + str xzr, [x0, 2040] + b .L3459 +.L3449: + cmp w19, 563 + bls .L3450 + ldr w0, [x23, 2048] + mov w1, 500 + sub w0, w0, #64 + cmp w0, 500 + csel w0, w0, w1, ls + adrp x1, .LANCHOR0+88 + ldr x1, [x1, #:lo12:.LANCHOR0+88] + ldrb w1, [x1, 9] + cmp w1, 4 + beq .L3451 + mov w1, 2 + str w1, [x29, 72] + mov w1, 3 + str w1, [x29, 76] + mov w1, 4 + str w1, [x29, 80] + mov w1, 5 + str w1, [x29, 84] + mov w1, 6 + str w1, [x29, 88] +.L3452: + add x2, x22, 253952 + mov w1, 63872 + add x2, x2, 1536 +.L3458: + ldr w3, [x2] + cbz w3, .L3456 + add w0, w1, 128 + lsl w0, w0, 2 +.L3457: + mov x1, x22 + add x22, x20, :lo12:.LANCHOR4 + add x2, x29, 72 + bl write_idblock + ldr x0, [x22, 2040] + strb wzr, [x22, 2032] + bl ftl_free + str xzr, [x22, 2040] +.L3459: + add x20, x20, :lo12:.LANCHOR4 + add w19, w19, w21 + str w19, [x20, 2048] +.L3446: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x29, x30, [sp], 112 + ret +.L3451: + add x2, x29, 72 + mov x1, 0 +.L3455: + cmp w0, 256 + bls .L3453 + lsl w3, w1, 1 + str w3, [x2, x1, lsl 2] +.L3454: + add x1, x1, 1 + cmp x1, 5 + bne .L3455 + b .L3452 +.L3453: + str w1, [x2, x1, lsl 2] + b .L3454 +.L3456: + sub w1, w1, #1 + sub x2, x2, #4 + cmp w1, 4096 + bne .L3458 + lsl w0, w0, 9 + b .L3457 + .size write_loader_lba, .-write_loader_lba + .align 2 + .global FtlWrite + .type FtlWrite, %function +FtlWrite: + stp x29, x30, [sp, -48]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + and w20, w0, 255 + stp x21, x22, [sp, 32] + sub w0, w1, #64 + mov w19, w1 + mov w21, w2 + mov x22, x3 + cmp w0, 1983 + bhi .L3471 + cbnz w20, .L3471 + mov x2, x3 + mov w1, w21 + mov w0, w19 + bl write_loader_lba +.L3471: + mov x3, x22 + mov w2, w21 + mov w1, w19 + mov w0, w20 + bl ftl_write + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x29, x30, [sp], 48 + ret + .size FtlWrite, .-FtlWrite + .align 2 + .global rknand_sys_storage_ioctl + .type rknand_sys_storage_ioctl, %function +rknand_sys_storage_ioctl: + sub sp, sp, #560 + mov w0, 27688 + movk w0, 0x4004, lsl 16 + cmp w1, w0 + stp x29, x30, [sp] + add x29, sp, 0 + stp x19, x20, [sp, 16] + mov w19, w1 + mov x20, x2 + beq .L3475 + bhi .L3476 + mov w0, 25602 + movk w0, 0x4004, lsl 16 + cmp w1, w0 + beq .L3477 + bhi .L3478 + mov w0, 25364 + movk w0, 0x4004, lsl 16 + cmp w1, w0 + beq .L3479 + add w0, w0, 237 + cmp w1, w0 + beq .L3480 +.L3510: + mov x19, -22 + b .L3473 +.L3478: + mov w0, 25726 + movk w0, 0x4004, lsl 16 + cmp w1, w0 + beq .L3481 + add w0, w0, 1 + cmp w1, w0 + beq .L3482 + mov w0, 25603 + movk w0, 0x4004, lsl 16 + cmp w1, w0 + bne .L3510 + adrp x0, .LC190 + add x0, x0, :lo12:.LC190 + bl printk + mov x2, 520 + mov x1, x20 + add x0, x29, 40 + bl rk_copy_from_user + cbnz x0, .L3493 + ldr w1, [x29, 40] + mov w0, 20051 + movk w0, 0x4144, lsl 16 + cmp w1, w0 + bne .L3490 + ldr w2, [x29, 44] + cmp w2, 512 + bhi .L3490 + adrp x1, .LANCHOR4 + add x1, x1, :lo12:.LANCHOR4 + uxtw x2, w2 + add x1, x1, 2080 + add x0, x29, 48 +.L3531: + bl memcpy + b .L3525 +.L3476: + mov w0, 30224 + movk w0, 0x4004, lsl 16 + cmp w1, w0 + beq .L3484 + bhi .L3485 + mov w0, 27698 + movk w0, 0x4004, lsl 16 + cmp w1, w0 + beq .L3475 + add w0, w0, 10 + cmp w1, w0 + bne .L3510 +.L3475: + mov w0, 27698 + movk w0, 0x4004, lsl 16 + cmp w19, w0 + bne .L3500 + adrp x0, .LC191 + add x0, x0, :lo12:.LC191 +.L3527: + bl printk + mov x2, 520 + mov x1, x20 + add x0, x29, 40 + bl rk_copy_from_user + cbnz x0, .L3493 + ldr w1, [x29, 40] + mov w0, 17227 + movk w0, 0x4c4f, lsl 16 + cmp w1, w0 + bne .L3530 + mov w0, 27708 + movk w0, 0x4004, lsl 16 + cmp w19, w0 + adrp x0, .LANCHOR4 + bne .L3503 + add x0, x0, :lo12:.LANCHOR4 + mov x2, 16 + add x1, x29, 40 + ldr x0, [x0, 2056] + ldr w0, [x0, 20] + strb w0, [x29, 48] + str w0, [x29, 44] + mov x0, x20 + bl rk_copy_to_user + cbnz x0, .L3530 +.L3494: + mov x19, 0 +.L3473: + mov x0, x19 + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp] + add sp, sp, 560 + ret +.L3485: + mov w0, 30226 + movk w0, 0x4004, lsl 16 + cmp w1, w0 + beq .L3484 + bcc .L3486 + add w0, w0, 1 + cmp w1, w0 + bne .L3510 +.L3486: + adrp x0, .LC196 + add x0, x0, :lo12:.LC196 + bl printk + mov x2, 520 + mov x1, x20 + add x0, x29, 40 + bl rk_copy_from_user + cbnz x0, .L3493 + ldr w1, [x29, 40] + mov w0, 17750 + movk w0, 0x444e, lsl 16 + cmp w1, w0 + bne .L3490 + ldr w2, [x29, 44] + cmp w2, 504 + bhi .L3490 + mov w0, 30225 + add w2, w2, 8 + movk w0, 0x4004, lsl 16 + add x1, x29, 40 + cmp w19, w0 + adrp x19, .LANCHOR4 + add x19, x19, :lo12:.LANCHOR4 + bne .L3509 + ldr x0, [x19, 2600] + bl memcpy + mov w0, 2 + ldr x1, [x19, 2600] + b .L3529 +.L3480: + adrp x0, .LC185 + add x0, x0, :lo12:.LC185 + bl printk + mov x2, 520 + mov x1, x20 + add x0, x29, 40 + bl rk_copy_from_user + cbz x0, .L3487 +.L3493: + adrp x0, .LC186 + add x0, x0, :lo12:.LC186 + bl printk +.L3530: + mov x19, -14 + b .L3473 +.L3487: + ldr w1, [x29, 40] + mov w0, 21060 + movk w0, 0x4b4d, lsl 16 + cmp w1, w0 + beq .L3488 +.L3490: + mov x19, -1 +.L3489: + mov x1, x19 + adrp x0, .LC197 + add x0, x0, :lo12:.LC197 + bl printk + b .L3473 +.L3488: + ldr w0, [x29, 44] + cmp w0, 512 + bhi .L3490 + adrp x19, .LANCHOR4 + add x19, x19, :lo12:.LANCHOR4 + mov x2, 512 + add x0, x29, 40 + ldr x1, [x19, 2056] + bl memcpy + ldr w1, [x19, 2064] + mov w0, 5161 + movk w0, 0xc059, lsl 16 + cmp w1, w0 + beq .L3491 + mov x2, 128 + mov w1, 0 + add x0, x29, 104 + stp wzr, wzr, [x29, 48] + bl memset +.L3491: + add x0, x29, 40 + mov x2, 256 + mov w1, 0 + add x0, x0, x2 + str wzr, [x29, 56] + bl memset +.L3525: + mov x2, 520 + add x1, x29, 40 + mov x0, x20 + bl rk_copy_to_user + cbnz x0, .L3530 +.L3528: + mov x19, 0 + b .L3489 +.L3477: + adrp x0, .LC187 + add x0, x0, :lo12:.LC187 + bl printk + mov x2, 520 + mov x1, x20 + add x0, x29, 40 + bl rk_copy_from_user + cbnz x0, .L3493 + ldr w1, [x29, 40] + mov w0, 21060 + movk w0, 0x4b4d, lsl 16 + cmp w1, w0 + bne .L3490 + ldr w0, [x29, 44] + cmp w0, 512 + bhi .L3490 + adrp x0, .LANCHOR4 + add x0, x0, :lo12:.LANCHOR4 + mov w1, 5161 + movk w1, 0xc059, lsl 16 + ldr w2, [x0, 2064] + cmp w2, w1 + bne .L3511 + ldr w1, [x29, 52] + mov x19, -3 + sub w2, w1, #1 + cmp w2, 127 + bhi .L3473 + ldr x19, [x0, 2056] + add x0, x19, 64 + str w1, [x19, 12] + add x1, x29, 104 + ldr w2, [x29, 52] + bl memcpy + mov x1, x19 + mov w0, 1 +.L3529: + bl StorageSysDataStore + uxtw x19, w0 + b .L3489 +.L3482: + adrp x0, .LC188 + add x0, x0, :lo12:.LC188 + bl printk + mov x2, 520 + mov x1, x20 + add x0, x29, 40 + bl rk_copy_from_user + cbnz x0, .L3493 + ldr w1, [x29, 40] + mov w0, 17476 + movk w0, 0x4253, lsl 16 + cmp w1, w0 + bne .L3490 + ldr w0, [x29, 44] + cmp w0, 512 + bhi .L3490 + adrp x19, .LANCHOR4 + add x0, x19, :lo12:.LANCHOR4 + ldr w0, [x0, 2068] + cbz w0, .L3494 + add x0, x19, :lo12:.LANCHOR4 + mov w2, 22867 + movk w2, 0x4453, lsl 16 + ldr x1, [x0, 2072] + ldr w3, [x1] + cmp w3, w2 + beq .L3495 + str w2, [x1] + mov w2, 504 + ldr x1, [x0, 2072] + str w2, [x1, 4] + ldr x0, [x0, 2072] + stp wzr, wzr, [x0, 8] +.L3495: + add x20, x19, :lo12:.LANCHOR4 + mov w0, 0 + ldr x1, [x20, 2072] + str wzr, [x1, 16] + bl StorageSysDataStore + ldr x0, [x20, 2056] + mov w1, 21060 + movk w1, 0x4b4d, lsl 16 + ldr w2, [x0] + cmp w2, w1 + beq .L3496 + str w1, [x0] + mov w1, 504 + ldr x0, [x20, 2056] + str w1, [x0, 4] + ldr x0, [x20, 2056] + str wzr, [x0, 8] +.L3496: + add x19, x19, :lo12:.LANCHOR4 + mov x2, 128 + mov w1, 0 + ldr x20, [x19, 2056] + add x0, x20, 64 + str wzr, [x20, 12] + bl memset + mov x1, x20 + mov w0, 1 + bl StorageSysDataStore + str wzr, [x19, 2064] + str wzr, [x19, 2068] + b .L3528 +.L3481: + adrp x0, .LC189 + add x0, x0, :lo12:.LC189 + bl printk + mov x2, 520 + mov x1, x20 + add x0, x29, 40 + bl rk_copy_from_user + cbnz x0, .L3493 + ldr w1, [x29, 40] + mov w0, 20037 + movk w0, 0x4253, lsl 16 + cmp w1, w0 + bne .L3490 + ldr w0, [x29, 44] + cmp w0, 512 + bhi .L3490 + adrp x19, .LANCHOR4 + add x0, x19, :lo12:.LANCHOR4 + ldr w1, [x0, 2068] + cmp w1, 1 + beq .L3494 + ldr x1, [x0, 2072] + mov w0, 22867 + movk w0, 0x4453, lsl 16 + ldr w2, [x1] + cmp w2, w0 + beq .L3497 + str w0, [x1] + add x0, x19, :lo12:.LANCHOR4 + mov w2, 504 + ldr x1, [x0, 2072] + str w2, [x1, 4] + ldr x0, [x0, 2072] + stp wzr, wzr, [x0, 8] +.L3497: + add x20, x19, :lo12:.LANCHOR4 + mov w0, 1 + ldr x1, [x20, 2072] + str w0, [x1, 16] + mov w0, 0 + bl StorageSysDataStore + ldr x0, [x20, 2056] + mov w1, 21060 + movk w1, 0x4b4d, lsl 16 + ldr w2, [x0] + cmp w2, w1 + beq .L3498 + str w1, [x0] + mov w1, 504 + ldr x0, [x20, 2056] + str w1, [x0, 4] + ldr x0, [x20, 2056] + str wzr, [x0, 8] +.L3498: + add x19, x19, :lo12:.LANCHOR4 + mov x2, 128 + mov w1, 0 + ldr x20, [x19, 2056] + add x0, x20, 64 + str wzr, [x20, 12] + bl memset + mov x1, x20 + mov w0, 1 + bl StorageSysDataStore + mov w0, 1 + str w0, [x19, 2068] + b .L3528 +.L3500: + mov w0, 27708 + movk w0, 0x4004, lsl 16 + cmp w19, w0 + bne .L3502 + adrp x0, .LC192 + add x0, x0, :lo12:.LC192 + b .L3527 +.L3502: + adrp x0, .LC193 + add x0, x0, :lo12:.LC193 + b .L3527 +.L3503: + add x20, x0, :lo12:.LANCHOR4 + ldr w1, [x20, 2592] + cmp w1, 10 + bhi .L3530 + ldr x1, [x20, 2056] + ldr w2, [x29, 44] + ldr w3, [x1, 24] + cmp w3, w2 + beq .L3504 + cbz w3, .L3504 + mov w1, w2 + adrp x0, .LC194 + add x0, x0, :lo12:.LC194 + bl printk + ldr w0, [x20, 2592] + add w0, w0, 1 + str w0, [x20, 2592] + b .L3530 +.L3504: + add x0, x0, :lo12:.LANCHOR4 + str wzr, [x0, 2592] + mov w0, 27698 + movk w0, 0x4004, lsl 16 + cmp w19, w0 + bne .L3505 + stp wzr, wzr, [x1, 20] +.L3506: + mov w0, 1 + bl StorageSysDataStore + cmn w0, #1 + bne .L3528 + mov x19, -2 + b .L3489 +.L3505: + mov w0, 1 + stp w0, w2, [x1, 20] + b .L3506 +.L3484: + adrp x0, .LC195 + add x0, x0, :lo12:.LC195 + bl printk + mov x2, 520 + mov x1, x20 + add x0, x29, 40 + bl rk_copy_from_user + cbnz x0, .L3493 + ldr w1, [x29, 40] + mov w0, 17750 + movk w0, 0x444e, lsl 16 + cmp w1, w0 + bne .L3490 + ldr w2, [x29, 44] + cmp w2, 504 + bhi .L3490 + mov w0, 30224 + adrp x1, .LANCHOR4 + movk w0, 0x4004, lsl 16 + uxtw x2, w2 + cmp w19, w0 + add x1, x1, :lo12:.LANCHOR4 + add x0, x29, 48 + bne .L3507 + ldr x1, [x1, 2600] +.L3532: + add x1, x1, 8 + b .L3531 +.L3507: + ldr x1, [x1, 2608] + b .L3532 +.L3509: + ldr x0, [x19, 2608] + bl memcpy + mov w0, 3 + ldr x1, [x19, 2608] + b .L3529 +.L3479: + bl rknand_dev_flush + b .L3528 +.L3511: + mov x19, -2 + b .L3473 + .size rknand_sys_storage_ioctl, .-rknand_sys_storage_ioctl + .align 2 + .global rk_ftl_storage_sys_init + .type rk_ftl_storage_sys_init, %function +rk_ftl_storage_sys_init: + stp x29, x30, [sp, -32]! + mov w0, -1 + mov w2, 512 + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x20, .LANCHOR4 + add x19, x20, :lo12:.LANCHOR4 + ldr x1, [x19, 2008] + str w0, [x19, 2048] + add x0, x1, 512 + str x0, [x19, 2056] + add x0, x1, 1024 + str x1, [x19, 2072] + str x0, [x19, 2600] + add x1, x1, 1536 + strb wzr, [x19, 2032] + add x0, x19, 2080 + str xzr, [x19, 2040] + str xzr, [x19, 2616] + str x1, [x19, 2608] + bl ftl_memcpy + ldr x6, [x19, 2072] + str wzr, [x19, 2064] + str wzr, [x19, 2592] + ldr w7, [x6, 508] + ldr w0, [x6, 16] + str w0, [x19, 2068] + cbz w7, .L3534 + mov w1, 508 + mov x0, x6 + bl js_hash + cmp w7, w0 + beq .L3534 + str wzr, [x6, 16] + adrp x0, .LC198 + str wzr, [x19, 2068] + add x0, x0, :lo12:.LC198 + bl printk +.L3534: + add x0, x20, :lo12:.LANCHOR4 + ldr w1, [x0, 2068] + cbz w1, .L3535 + mov w1, 5161 + movk w1, 0xc059, lsl 16 + str w1, [x0, 2064] +.L3535: + add x20, x20, :lo12:.LANCHOR4 + mov w0, 2 + ldr x1, [x20, 2600] + bl StorageSysDataLoad + ldr x1, [x20, 2608] + mov w0, 3 + bl StorageSysDataLoad + bl rknand_sys_storage_init + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 32 + ret + .size rk_ftl_storage_sys_init, .-rk_ftl_storage_sys_init + .align 2 + .global StorageSysDataDeInit + .type StorageSysDataDeInit, %function +StorageSysDataDeInit: + mov w0, 0 + ret + .size StorageSysDataDeInit, .-StorageSysDataDeInit + .align 2 + .global rk_ftl_vendor_storage_init + .type rk_ftl_vendor_storage_init, %function +rk_ftl_vendor_storage_init: + stp x29, x30, [sp, -80]! + mov w0, 65536 + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x19, .LANCHOR4 + add x20, x19, :lo12:.LANCHOR4 + stp x21, x22, [sp, 32] + stp x23, x24, [sp, 48] + stp x25, x26, [sp, 64] + bl ftl_malloc + str x0, [x20, 2624] + cbz x0, .L3550 + adrp x24, .LC199 + mov w26, 22084 + mov x22, x19 + add x24, x24, :lo12:.LC199 + mov w25, 0 + mov w23, 0 + mov w21, 0 + movk w26, 0x524b, lsl 16 +.L3548: + ldr x2, [x20, 2624] + mov w1, 128 + lsl w0, w21, 7 + bl FlashBootVendorRead + cbnz w0, .L3546 + ldr x0, [x20, 2624] + add x1, x0, 61440 + ldr w3, [x0, 4] + ldr w2, [x1, 4092] + ldr w1, [x0] + mov x0, x24 + bl printk + ldr x19, [x20, 2624] + ldr w0, [x19] + cmp w0, w26 + bne .L3547 + add x0, x19, 61440 + ldr w1, [x19, 4] + ldr w0, [x0, 4092] + cmp w0, w1 + bne .L3547 + cmp w0, w23 + bls .L3547 + mov w25, w21 + mov w23, w0 +.L3547: + add w21, w21, 1 + cmp w21, 2 + bne .L3548 + cbz w23, .L3549 + mov x2, x19 + mov w1, 128 + lsl w0, w25, 7 + bl FlashBootVendorRead + cbnz w0, .L3546 +.L3544: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x29, x30, [sp], 80 + ret +.L3549: + mov w1, 0 + mov x2, 65536 + mov x0, x19 + bl memset + mov w1, 22084 + mov w0, 1 + movk w1, 0x524b, lsl 16 + stp w1, w0, [x19] + add x1, x19, 61440 + str w0, [x1, 4092] + mov w0, -1032 + strh w0, [x19, 14] + mov w0, 0 + b .L3544 +.L3546: + add x22, x22, :lo12:.LANCHOR4 + ldr x0, [x22, 2624] + bl kfree + str xzr, [x22, 2624] + mov w0, -1 + b .L3544 +.L3550: + mov w0, -12 + b .L3544 + .size rk_ftl_vendor_storage_init, .-rk_ftl_vendor_storage_init + .align 2 + .global rk_ftl_vendor_read + .type rk_ftl_vendor_read, %function +rk_ftl_vendor_read: + adrp x3, .LANCHOR4+2624 + ldr x4, [x3, #:lo12:.LANCHOR4+2624] + cbz x4, .L3558 + ldrh w6, [x4, 10] + add x5, x4, 16 + mov w3, 0 +.L3555: + cmp w3, w6 + bcc .L3557 +.L3558: + mov w0, -1 + ret +.L3557: + ldrh w7, [x5], 8 + cmp w7, w0 + bne .L3556 + stp x29, x30, [sp, -32]! + add x3, x4, w3, uxtw 3 + mov x0, x1 + add x29, sp, 0 + str x19, [sp, 16] + ldrh w19, [x3, 20] + ldrh w1, [x3, 18] + cmp w19, w2 + csel w19, w19, w2, ls + add x1, x1, 1024 + uxtw x2, w19 + add x1, x4, x1 + bl memcpy + mov w0, w19 + ldr x19, [sp, 16] + ldp x29, x30, [sp], 32 + ret +.L3556: + add w3, w3, 1 + b .L3555 + .size rk_ftl_vendor_read, .-rk_ftl_vendor_read + .align 2 + .global rk_ftl_vendor_write + .type rk_ftl_vendor_write, %function +rk_ftl_vendor_write: + stp x29, x30, [sp, -112]! + adrp x3, .LANCHOR4+2624 + add x29, sp, 0 + stp x19, x20, [sp, 16] + ldr x19, [x3, #:lo12:.LANCHOR4+2624] + stp x21, x22, [sp, 32] + stp x23, x24, [sp, 48] + stp x25, x26, [sp, 64] + stp x27, x28, [sp, 80] + cbz x19, .L3578 + add w4, w2, 63 + ldrh w3, [x19, 10] + ldrh w24, [x19, 8] + mov x28, x1 + mov w26, w2 + and w22, w4, -64 + add x1, x19, 16 + mov w20, 0 +.L3565: + cmp w20, w3 + bcc .L3573 + ldrh w1, [x19, 14] + cmp w22, w1 + bhi .L3578 + add x3, x19, w3, uxth 3 + strh w0, [x3, 16] + and w0, w22, 65535 + ldrh w2, [x19, 12] + strh w2, [x3, 18] + strh w26, [x3, 20] + add w2, w2, w0 + sub w0, w1, w0 + strh w2, [x19, 12] + strh w0, [x19, 14] + uxtw x2, w26 + mov x1, x28 + ldrh w0, [x3, 18] + add x0, x0, 1024 + add x0, x19, x0 + bl memcpy + ldrh w0, [x19, 10] + add w0, w0, 1 + strh w0, [x19, 10] + b .L3580 +.L3573: + ldrh w6, [x1], 8 + cmp w6, w0 + bne .L3566 + uxtw x23, w20 + add x5, x19, 1024 + add x21, x19, x23, lsl 3 + ldrh w25, [x21, 20] + add w25, w25, 63 + and w25, w25, -64 + cmp w26, w25 + bls .L3567 + ldrh w0, [x19, 14] + cmp w22, w0 + bhi .L3578 + add x23, x23, 2 + ldrh w21, [x21, 18] + add x23, x19, x23, lsl 3 + sub w3, w3, #1 +.L3568: + cmp w20, w3 + bcc .L3569 + add x20, x19, w20, uxtw 3 + and w21, w21, 65535 + add x0, x5, w21, uxth + uxtw x2, w26 + mov x1, x28 + strh w21, [x20, 18] + strh w6, [x20, 16] + strh w26, [x20, 20] + bl memcpy + ldrh w0, [x19, 14] + and w4, w22, 65535 + add w21, w21, w4 + strh w21, [x19, 12] + sub w0, w0, w4 + add w25, w0, w25 + strh w25, [x19, 14] +.L3580: + ldr w0, [x19, 4] + add x1, x19, 61440 + mov x2, x19 + add w0, w0, 1 + str w0, [x19, 4] + str w0, [x1, 4092] + mov w1, 128 + ldrh w0, [x19, 8] + add w0, w0, 1 + and w0, w0, 65535 + cmp w0, 1 + csel w0, w0, wzr, ls + strh w0, [x19, 8] + lsl w0, w24, 7 + bl FlashBootVendorWrite + mov w0, 0 +.L3563: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 112 + ret +.L3569: + add w20, w20, 1 + stp w3, w6, [x29, 96] + add x0, x19, w20, uxtw 3 + str x5, [x29, 104] + add x23, x23, 8 + ldrh w1, [x0, 16] + strh w1, [x23, -8] + ldrh w1, [x0, 20] + strh w1, [x23, -4] + strh w21, [x23, -6] + ldrh w27, [x0, 20] + ldrh w1, [x0, 18] + add x0, x5, w21, uxtw + add w27, w27, 63 + and w27, w27, -64 + add x1, x5, x1 + and x2, x27, 131008 + bl memcpy + add w21, w21, w27 + ldr x5, [x29, 104] + ldp w3, w6, [x29, 96] + b .L3568 +.L3567: + ldrh w0, [x21, 18] + uxtw x2, w26 + mov x1, x28 + add x0, x5, x0 + bl memcpy + strh w26, [x21, 20] + b .L3580 +.L3566: + add w20, w20, 1 + b .L3565 +.L3578: + mov w0, -1 + b .L3563 + .size rk_ftl_vendor_write, .-rk_ftl_vendor_write + .align 2 + .global rk_ftl_vendor_storage_ioctl + .type rk_ftl_vendor_storage_ioctl, %function +rk_ftl_vendor_storage_ioctl: + stp x29, x30, [sp, -48]! + mov w0, 4096 + add x29, sp, 0 + stp x19, x20, [sp, 16] + mov x20, x2 + str x21, [sp, 32] + mov w21, w1 + bl ftl_malloc + cbz x0, .L3589 + mov w1, 30209 + mov x19, x0 + movk w1, 0x4004, lsl 16 + cmp w21, w1 + beq .L3584 + add w1, w1, 1 + cmp w21, w1 + beq .L3585 +.L3595: + mov x20, -14 + b .L3583 +.L3584: + mov x2, 8 + mov x1, x20 + bl rk_copy_from_user + cbnz x0, .L3595 + ldr w1, [x19] + mov w0, 17745 + movk w0, 0x5652, lsl 16 + cmp w1, w0 + beq .L3587 +.L3588: + mov x20, -1 +.L3583: + mov x0, x19 + bl kfree +.L3581: + mov x0, x20 + ldr x21, [sp, 32] + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 48 + ret +.L3587: + ldrh w2, [x19, 6] + add x1, x19, 8 + ldrh w0, [x19, 4] + bl rk_ftl_vendor_read + cmn w0, #1 + beq .L3588 + strh w0, [x19, 6] + and x0, x0, 65535 + add x2, x0, 8 + mov x1, x19 + mov x0, x20 + bl rk_copy_to_user + cbnz x0, .L3595 + mov x20, 0 + b .L3583 +.L3585: + mov x2, 8 + mov x1, x20 + bl rk_copy_from_user + cbnz x0, .L3595 + ldr w1, [x19] + mov w0, 17745 + movk w0, 0x5652, lsl 16 + cmp w1, w0 + bne .L3588 + ldrh w2, [x19, 6] + cmp w2, 4087 + bhi .L3588 + add w2, w2, 8 + mov x1, x20 + sxtw x2, w2 + mov x0, x19 + bl rk_copy_from_user + cbnz x0, .L3595 + ldrh w2, [x19, 6] + add x1, x19, 8 + ldrh w0, [x19, 4] + bl rk_ftl_vendor_write + sxtw x20, w0 + b .L3583 +.L3589: + mov x20, -1 + b .L3581 + .size rk_ftl_vendor_storage_ioctl, .-rk_ftl_vendor_storage_ioctl + .global SecureBootUnlockTryCount + .global SecureBootCheckOK + .global SecureBootEn + .global gpVendor1Info + .global gpVendor0Info + .global g_idb_buffer + .global gSnSectorData + .global gpDrmKeyInfo + .global gpBootConfig + .global ftl_dma32_buffer_size + .global ftl_dma32_buffer + .global gLoaderBootInfo + .global RK29_NANDC1_REG_BASE + .global RK29_NANDC_REG_BASE + .global gc_ink_free_return_value + .global check_valid_page_count_table + .global FtlUpdateVaildLpnCount + .global g_ect_tbl_power_up_flush + .global last_cache_match_count + .global power_up_flag + .global g_LowFormat + .global gFtlInitStatus + .global DeviceCapacity + .global ToshibaRefValue + .global Toshiba15RefValue + .global ToshibaA19RefValue + .global SamsungRefValue + .global refValueDefault + .global FbbtBlk + .global random_seed + .global gSlcNandParaInfo + .global gNandParaInfo + .global g_page_map_check_enable + .global g_power_lost_ecc_error_blk + .global g_power_lost_recovery_flag + .global c_mlc_erase_count_value + .global g_recovery_ppa_tbl + .global g_recovery_page_min_ver + .global g_recovery_page_num + .global g_cur_erase_blk + .global g_gc_skip_write_count + .global g_gc_head_data_block_count + .global g_gc_head_data_block + .global g_ftl_nand_free_count + .global g_in_swl_replace + .global g_in_gc_progress + .global g_all_blk_used_slc_mode + .global g_max_erase_count + .global g_totle_sys_slc_erase_count + .global g_totle_slc_erase_count + .global g_min_erase_count + .global g_totle_avg_erase_count + .global g_totle_mlc_erase_count + .global g_totle_l2p_write_count + .global g_totle_cache_write_count + .global g_tmp_data_superblock_id + .global g_totle_read_page_count + .global g_totle_discard_page_count + .global g_totle_read_sector + .global g_totle_write_sector + .global g_totle_write_page_count + .global g_totle_gc_page_count + .global g_gc_blk_index + .global g_gc_merge_free_blk_threshold + .global g_gc_free_blk_threshold + .global g_gc_refresh_block_temp_tbl + .global g_free_slc_blk_num + .global g_gc_refresh_block_temp_num + .global g_gc_bad_block_temp_tbl + .global g_gc_bad_block_gc_index + .global g_gc_bad_block_temp_num + .global g_gc_next_blk_3 + .global g_gc_next_blk_2 + .global g_gc_next_blk_1 + .global g_gc_next_blk + .global g_gc_cur_blk_max_valid_pages + .global g_gc_cur_blk_valid_pages + .global g_gc_page_offset + .global g_gc_blk_num + .global p_gc_blk_tbl + .global p_gc_page_info + .global g_sys_ext_data + .global g_sys_save_data + .global gp_last_act_superblock + .global g_gc_superblock + .global g_gc_temp_superblock + .global g_buffer_superblock + .global g_active_superblock + .global g_num_data_superblocks + .global g_num_free_superblocks + .global p_data_block_list_tail + .global p_data_block_list_head + .global p_free_data_block_list_head + .global p_data_block_list_table + .global g_l2p_last_update_region_id + .global p_l2p_map_buf + .global p_l2p_ram_map + .global g_totle_vendor_block + .global p_vendor_region_ppn_table + .global p_vendor_block_ver_table + .global p_vendor_block_valid_page_count + .global p_vendor_block_table + .global g_totle_map_block + .global p_map_region_ppn_check_table + .global p_map_region_ppn_table + .global p_map_block_ver_table + .global p_map_block_valid_page_count + .global p_map_block_table + .global p_blk_mode_table + .global p_valid_page_count_check_table + .global p_valid_page_count_table + .global g_totle_swl_count + .global p_swl_mul_table + .global p_erase_count_table + .global g_ect_tbl_info_size + .global gp_ect_tbl_info + .global g_gc_num_req + .global c_gc_page_buf_num + .global gp_gc_page_buf_info + .global p_gc_data_buf + .global p_gc_spare_buf + .global p_io_spare_buf + .global p_io_data_buf_1 + .global p_io_data_buf_0 + .global p_sys_spare_buf + .global p_vendor_data_buf + .global p_sys_data_buf_1 + .global p_sys_data_buf + .global g_wr_page_num + .global req_wr_io + .global c_wr_page_buf_num + .global p_wr_io_data_buf + .global p_wr_io_spare_buf + .global p_plane_order_table + .global g_req_cache + .global req_gc_dst + .global req_gc + .global req_erase + .global req_prgm + .global req_read + .global req_sys + .global gVendorBlkInfo + .global gL2pMapInfo + .global gSysFreeQueue + .global gSysInfo + .global gBbtInfo + .global g_flash_read_only_en + .global g_inkDie_check_enable + .global g_SlcPartLbaEndSector + .global g_MaxLbn + .global g_VaildLpn + .global g_MaxLpn + .global g_MaxLbaSector + .global g_GlobalDataVersion + .global g_GlobalSysVersion + .global ftl_gc_temp_power_lost_recovery_flag + .global c_ftl_nand_max_data_blks + .global c_ftl_nand_data_op_blks_per_plane + .global c_ftl_nand_data_blks_per_plane + .global c_ftl_nand_max_sys_blks + .global c_ftl_nand_init_sys_blks_per_plane + .global c_ftl_nand_sys_blks_per_plane + .global c_ftl_vendor_part_size + .global c_ftl_nand_max_vendor_blks + .global c_ftl_nand_max_map_blks + .global c_ftl_nand_map_blks_per_plane + .global c_ftl_nand_vendor_region_num + .global c_ftl_nand_l2pmap_ram_region_num + .global c_ftl_nand_map_region_num + .global c_ftl_nand_totle_phy_blks + .global c_ftl_nand_reserved_blks + .global c_ftl_nand_byte_pre_oob + .global c_ftl_nand_byte_pre_page + .global c_ftl_nand_sec_pre_page_shift + .global c_ftl_nand_sec_pre_page + .global c_ftl_nand_page_pre_super_blk + .global c_ftl_nand_page_pre_slc_blk + .global c_ftl_nand_page_pre_blk + .global c_ftl_nand_bbm_buf_size + .global c_ftl_nand_ext_blk_pre_plane + .global c_ftl_nand_blk_pre_plane + .global c_ftl_nand_planes_num + .global c_ftl_nand_blks_per_die + .global c_ftl_nand_planes_per_die + .global c_ftl_nand_die_num + .global c_ftl_nand_type + .global gMasterTempBuf + .global gMasterInfo + .global gNandcDumpWriteEn + .global gToggleModeClkDiv + .global gBootDdrMode + .global gNandcEccBits + .global gpNandc1 + .global gpNandc + .global g_nandc_version_data + .global gNandcVer + .global gNandChipMap + .global gNandIDataBuf + .global idb_flash_slc_mode + .global FlashDdrTunningReadCount + .global FlashWaitBusyScheduleEn + .global gNandPhyInfo + .global gFlashProgCheckSpareBuffer + .global gFlashProgCheckBuffer + .global gFlashSpareBuffer + .global gFlashPageBuffer1 + .global gFlashPageBuffer0 + .global gpFlashSaveInfo + .global gReadRetryInfo + .global gpNandParaInfo + .global gNandOptPara + .global g_nand_ecc_en + .global g_slc2KBNand + .global g_maxRetryCount + .global g_maxRegNum + .global g_retryMode + .global gNandIDBResBlkNumSaveInFlash + .global gNandIDBResBlkNum + .global gNandFlashResEndPageAddr + .global gNandFlashInfoBlockAddr + .global gNandFlashIdbBlockAddr + .global gNandFlashInfoBlockEcc + .global gNandFlashIDBEccBits + .global gNandFlashEccBits + .global gNandRandomizer + .global gBlockPageAlignSize + .global gTotleBlock + .global gNandMaxChip + .global gNandMaxDie + .global gFlashInterfaceMode + .global gFlashCurMode + .global gFlashSlcMode + .global gFlashOnfiModeEn + .global gFlashToggleModeEn + .global gFlashSdrModeEn + .global gMultiPageProgEn + .global gMultiPageReadEn + .global gpReadRetrial + .global mlcPageToSlcPageTbl + .global slcPageToMlcPageTbl + .global DieAddrs + .global gDieOp + .global DieCsIndex + .global IDByte + .global read_retry_cur_offset + .section .rodata + .align 3 + .set .LANCHOR3,. + 0 + .type __func__.27063, %object + .size __func__.27063, 11 +__func__.27063: + .string "FtlMemInit" + .zero 5 + .type samsung_14nm_slc_rr, %object + .size samsung_14nm_slc_rr, 26 +samsung_14nm_slc_rr: + .byte 0 + .byte 10 + .byte -10 + .byte 20 + .byte -20 + .byte 30 + .byte -30 + .byte 40 + .byte -40 + .byte 50 + .byte -50 + .byte 60 + .byte -60 + .byte -70 + .byte -80 + .byte -90 + .byte -100 + .byte -110 + .byte -120 + .byte -9 + .byte 70 + .byte 80 + .byte 90 + .byte -125 + .byte -115 + .byte 100 + .zero 6 + .type samsung_14nm_mlc_rr, %object + .size samsung_14nm_mlc_rr, 104 +samsung_14nm_mlc_rr: + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte -4 + .byte 3 + .byte -4 + .byte -6 + .byte 6 + .byte 0 + .byte 6 + .byte -10 + .byte -10 + .byte 4 + .byte -10 + .byte 16 + .byte 12 + .byte -4 + .byte 12 + .byte 8 + .byte -16 + .byte 10 + .byte -16 + .byte 24 + .byte 18 + .byte -14 + .byte 18 + .byte -4 + .byte -22 + .byte -16 + .byte -22 + .byte -8 + .byte 24 + .byte -9 + .byte 24 + .byte 8 + .byte -28 + .byte -4 + .byte -28 + .byte 16 + .byte 30 + .byte 10 + .byte 30 + .byte 10 + .byte -34 + .byte 6 + .byte -34 + .byte 0 + .byte 36 + .byte -8 + .byte 36 + .byte -8 + .byte -40 + .byte -2 + .byte -40 + .byte -20 + .byte -46 + .byte -4 + .byte -46 + .byte -30 + .byte 3 + .byte 0 + .byte 3 + .byte -3 + .byte -2 + .byte -4 + .byte -2 + .byte -6 + .byte -4 + .byte -4 + .byte -4 + .byte -10 + .byte -6 + .byte -8 + .byte -6 + .byte -14 + .byte -9 + .byte -8 + .byte -9 + .byte -18 + .byte -52 + .byte 22 + .byte -52 + .byte 10 + .byte 42 + .byte 4 + .byte 42 + .byte 4 + .byte 48 + .byte -9 + .byte 48 + .byte 4 + .byte -58 + .byte 12 + .byte -58 + .byte 0 + .byte -64 + .byte -24 + .byte -64 + .byte -6 + .byte 9 + .byte 18 + .byte 9 + .byte 8 + .type __func__.27842, %object + .size __func__.27842, 17 +__func__.27842: + .string "FtlDumpBlockInfo" + .zero 7 + .type __func__.27861, %object + .size __func__.27861, 16 +__func__.27861: + .string "FtlScanAllBlock" + .type __func__.28129, %object + .size __func__.28129, 17 +__func__.28129: + .string "ftl_scan_all_ppa" + .zero 7 + .type __func__.27810, %object + .size __func__.27810, 12 +__func__.27810: + .string "FtlCheckVpc" + .zero 4 + .type __func__.28109, %object + .size __func__.28109, 21 +__func__.28109: + .string "FtlVpcCheckAndModify" + .zero 3 + .type __func__.27136, %object + .size __func__.27136, 8 +__func__.27136: + .string "FtlInit" + .data + .align 3 + .set .LANCHOR1,. + 0 + .type random_seed, %object + .size random_seed, 256 +random_seed: + .hword 22378 + .hword 1512 + .hword 25245 + .hword 17827 + .hword 25756 + .hword 19440 + .hword 9026 + .hword 10030 + .hword 29528 + .hword 20467 + .hword 29676 + .hword 24432 + .hword 31328 + .hword 6872 + .hword 13426 + .hword 13842 + .hword 8783 + .hword 1108 + .hword 782 + .hword 28837 + .hword 30729 + .hword 9505 + .hword 18676 + .hword 23085 + .hword 18730 + .hword 1085 + .hword 32609 + .hword 14697 + .hword 20858 + .hword 15170 + .hword 30365 + .hword 1607 + .hword 32298 + .hword 4995 + .hword 18905 + .hword 1976 + .hword 9592 + .hword 20204 + .hword 17443 + .hword 13615 + .hword 23330 + .hword 29369 + .hword 13947 + .hword 9398 + .hword 32398 + .hword 8984 + .hword 27600 + .hword 21785 + .hword 6019 + .hword 6311 + .hword 31598 + .hword 30210 + .hword 19327 + .hword 13896 + .hword 11347 + .hword 27545 + .hword 3107 + .hword 26575 + .hword 32270 + .hword 19852 + .hword 20601 + .hword 8349 + .hword 9290 + .hword 29819 + .hword 13579 + .hword 3661 + .hword 28676 + .hword 27331 + .hword 32574 + .hword 8693 + .hword 31253 + .hword 9081 + .hword 5399 + .hword 6842 + .hword 20087 + .hword 5537 + .hword 1274 + .hword 11617 + .hword 9530 + .hword 4866 + .hword 8035 + .hword 23219 + .hword 1178 + .hword 23272 + .hword 7383 + .hword 18944 + .hword 12488 + .hword 12871 + .hword 29340 + .hword 20532 + .hword 11022 + .hword 22514 + .hword 228 + .hword 22363 + .hword 24978 + .hword 14584 + .hword 12138 + .hword 3092 + .hword 17916 + .hword 16863 + .hword 14554 + .hword 31457 + .hword 29474 + .hword 25311 + .hword 24121 + .hword 3684 + .hword 28037 + .hword 22865 + .hword 22839 + .hword 25217 + .hword 13217 + .hword 27186 + .hword 14938 + .hword 11180 + .hword 29754 + .hword 24180 + .hword 15150 + .hword 32455 + .hword 20434 + .hword 23848 + .hword 29983 + .hword 16120 + .hword 14769 + .hword 20041 + .hword 29803 + .hword 28406 + .hword 17598 + .hword 28087 + .type Toshiba15RefValue, %object + .size Toshiba15RefValue, 95 +Toshiba15RefValue: + .byte 4 + .byte 5 + .byte 6 + .byte 7 + .byte 13 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 2 + .byte 4 + .byte 2 + .byte 0 + .byte 0 + .byte 8 + .byte 8 + .byte 0 + .byte 0 + .byte 0 + .byte 124 + .byte 0 + .byte 124 + .byte 124 + .byte 0 + .byte 122 + .byte 0 + .byte 122 + .byte 122 + .byte 0 + .byte 11 + .byte 126 + .byte 118 + .byte 116 + .byte 0 + .byte 120 + .byte 2 + .byte 120 + .byte 122 + .byte 0 + .byte 126 + .byte 4 + .byte 126 + .byte 122 + .byte 0 + .byte 16 + .byte 118 + .byte 114 + .byte 112 + .byte 0 + .byte 118 + .byte 4 + .byte 118 + .byte 120 + .byte 0 + .byte 4 + .byte 4 + .byte 4 + .byte 118 + .byte 0 + .byte 2 + .byte 0 + .byte 126 + .byte 124 + .byte 0 + .byte 6 + .byte 10 + .byte 6 + .byte 2 + .byte 0 + .byte 116 + .byte 124 + .byte 116 + .byte 118 + .byte 0 + .byte 4 + .byte 4 + .byte 124 + .byte 126 + .byte 0 + .byte 0 + .byte 124 + .byte 120 + .byte 120 + .byte 0 + .byte 124 + .byte 118 + .byte 116 + .byte 114 + .byte 0 + .zero 1 + .type ToshibaA19RefValue, %object + .size ToshibaA19RefValue, 45 +ToshibaA19RefValue: + .byte 4 + .byte 5 + .byte 6 + .byte 7 + .byte 13 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 4 + .byte 4 + .byte 124 + .byte 126 + .byte 0 + .byte 0 + .byte 124 + .byte 120 + .byte 120 + .byte 0 + .byte 124 + .byte 118 + .byte 116 + .byte 114 + .byte 0 + .byte 8 + .byte 8 + .byte 0 + .byte 0 + .byte 0 + .byte 11 + .byte 126 + .byte 118 + .byte 116 + .byte 0 + .byte 16 + .byte 118 + .byte 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.byte 5 + .byte -20 + .byte -41 + .byte -108 + .byte 126 + .byte 100 + .byte 68 + .byte 0 + .byte 1 + .byte 16 + .hword 128 + .byte 2 + .byte 2 + .hword 2048 + .hword 473 + .byte 2 + .byte 49 + .byte 60 + .byte 36 + .byte 3 + .byte 0 + .byte 3 + .byte 0 + .byte 0 + .byte 0 + .zero 4 + .byte 6 + .byte -20 + .byte -34 + .byte -43 + .byte 126 + .byte 104 + .byte 68 + .byte 0 + .byte 2 + .byte 16 + .hword 128 + .byte 2 + .byte 2 + .hword 2048 + .hword 505 + .byte 2 + .byte 49 + .byte 60 + .byte 36 + .byte 3 + .byte 0 + .byte 3 + .byte 0 + .byte 0 + .byte 0 + .zero 4 + .byte 6 + .byte -20 + .byte -41 + .byte -108 + .byte 122 + .byte 84 + .byte 67 + .byte 0 + .byte 1 + .byte 16 + .hword 128 + .byte 2 + .byte 2 + .hword 2076 + .hword 409 + .byte 2 + .byte 0 + .byte 40 + .byte 36 + .byte 3 + .byte 1 + .byte 3 + .byte 0 + .byte 0 + .byte 0 + .zero 4 + .byte 6 + .byte -20 + .byte -34 + .byte -43 + .byte 122 + .byte 88 + .byte 67 + .byte 0 + .byte 2 + .byte 16 + .hword 128 + .byte 2 + .byte 2 + .hword 2076 + .hword 441 + .byte 2 + .byte 0 + .byte 40 + .byte 36 + .byte 3 + .byte 1 + .byte 3 + .byte 0 + .byte 0 + .byte 0 + .zero 4 + .byte 6 + .byte -20 + .byte -43 + .byte -108 + .byte 118 + .byte 84 + .byte 67 + .byte 0 + .byte 1 + .byte 16 + .hword 128 + .byte 2 + .byte 2 + .hword 1038 + .hword 281 + .byte 2 + .byte 0 + .byte 24 + .byte 36 + .byte 3 + .byte 1 + .byte 3 + .byte 0 + .byte 0 + .byte 0 + .zero 4 + .byte 6 + .byte -20 + .byte -41 + .byte 20 + .byte 118 + .byte 84 + .byte -62 + .byte 0 + .byte 1 + .byte 16 + .hword 128 + .byte 2 + .byte 2 + .hword 2076 + .hword 1169 + .byte 2 + .byte 0 + .byte 24 + .byte 40 + .byte 3 + .byte 1 + .byte 3 + .byte 0 + .byte 0 + .byte 0 + .zero 4 + .byte 6 + .byte -20 + .byte -34 + .byte -108 + .byte -61 + .byte -92 + .byte -54 + .byte 0 + .byte 1 + .byte 32 + .hword 792 + .byte 2 + .byte 1 + .hword 688 + .hword 1217 + .byte 11 + .byte 50 + .byte 40 + .byte 32 + .byte 3 + .byte 1 + .byte 1 + .byte 0 + .byte 1 + .byte 0 + .zero 4 + .type NandOptPara, %object + .size NandOptPara, 128 +NandOptPara: + .byte 1 + .byte 0 + .byte 49 + .byte 63 + .byte 0 + .byte 49 + .byte -128 + .byte 21 + .byte 0 + .byte 50 + .byte 17 + .byte -128 + .byte 112 + .byte 120 + .byte 120 + .byte 3 + .byte 1 + .byte 0 + .zero 14 + .byte 2 + .byte 0 + .byte 49 + .byte 63 + .byte 0 + .byte 49 + .byte -128 + .byte 21 + .byte 0 + .byte 0 + .byte 17 + .byte -127 + .byte 112 + .byte -15 + .byte -14 + .byte 0 + .byte 0 + .byte 0 + .zero 14 + .byte 3 + .byte 0 + .byte 49 + .byte 63 + .byte 0 + .byte 49 + .byte -128 + .byte 21 + .byte 96 + .byte 96 + .byte 17 + .byte -127 + .byte 112 + .byte -15 + .byte -14 + .byte 0 + .byte 0 + .byte 0 + .zero 14 + .byte 4 + .byte 0 + .byte 49 + .byte 63 + .byte 0 + .byte 49 + .byte -128 + .byte 21 + .byte 96 + .byte 96 + .byte 17 + .byte -127 + .byte 112 + .byte 112 + .byte 112 + .byte 0 + .byte 0 + .byte 0 + .zero 14 + .type refValueDefault, %object + .size refValueDefault, 28 +refValueDefault: + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 6 + .byte 10 + .byte 6 + .byte 0 + .byte -3 + .byte -7 + .byte -8 + .byte 0 + .byte -6 + .byte -13 + .byte -15 + .byte 0 + .byte -11 + .byte -20 + .byte -23 + .byte 0 + .byte 0 + .byte -26 + .byte -30 + .byte 0 + .byte 0 + .byte -32 + .byte -37 + .zero 4 + .type gSlcNandParaInfo, %object + .size gSlcNandParaInfo, 32 +gSlcNandParaInfo: + .byte 2 + .byte -104 + .byte -15 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 1 + .byte 1 + .byte 4 + .hword 64 + .byte 1 + .byte 1 + .hword 1024 + .hword 256 + .byte 0 + .byte 0 + .byte 16 + .byte 40 + .byte 1 + .byte 0 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .zero 4 + .type ftl_gc_temp_block_bops_scan_page_addr, %object + .size ftl_gc_temp_block_bops_scan_page_addr, 2 +ftl_gc_temp_block_bops_scan_page_addr: + .hword -1 + .zero 2 + .type power_up_flag, %object + .size power_up_flag, 4 +power_up_flag: + .word 1 + .bss + .align 3 + .set .LANCHOR0,. + 0 + .set .LANCHOR2,. + 4352 + .set .LANCHOR4,. + 8704 + .type gNandChipMap, %object + .size gNandChipMap, 64 +gNandChipMap: + .zero 64 + .type p_blk_mode_table, %object + .size p_blk_mode_table, 8 +p_blk_mode_table: + .zero 8 + .type g_slc2KBNand, %object + .size g_slc2KBNand, 1 +g_slc2KBNand: + .zero 1 + .type gNandIDBResBlkNum, %object + .size gNandIDBResBlkNum, 1 +gNandIDBResBlkNum: + .zero 1 + .zero 2 + .type gBlockPageAlignSize, %object + .size gBlockPageAlignSize, 4 +gBlockPageAlignSize: + .zero 4 + .type gNandRandomizer, %object + .size gNandRandomizer, 1 +gNandRandomizer: + .zero 1 + .zero 7 + .type gpNandParaInfo, %object + .size gpNandParaInfo, 8 +gpNandParaInfo: + .zero 8 + .type gNandOptPara, %object + .size gNandOptPara, 32 +gNandOptPara: + .zero 32 + .type g_retryMode, %object + .size g_retryMode, 1 +g_retryMode: + .zero 1 + .type g_maxRegNum, %object + .size g_maxRegNum, 1 +g_maxRegNum: + .zero 1 + .zero 6 + .type gpNandc, %object + .size gpNandc, 8 +gpNandc: + .zero 8 + .type NANDC_FMCTL, %object + .size NANDC_FMCTL, 4 +NANDC_FMCTL: + .zero 4 + .type NANDC_FMWAIT, %object + .size NANDC_FMWAIT, 4 +NANDC_FMWAIT: + .zero 4 + .type NANDC_FLCTL, %object + .size NANDC_FLCTL, 4 +NANDC_FLCTL: + .zero 4 + .type NANDC_BCHCTL, %object + .size NANDC_BCHCTL, 4 +NANDC_BCHCTL: + .zero 4 + .type NANDC_DLL_CTL_REG0, %object + .size NANDC_DLL_CTL_REG0, 4 +NANDC_DLL_CTL_REG0: + .zero 4 + .type NANDC_DLL_CTL_REG1, %object + .size NANDC_DLL_CTL_REG1, 4 +NANDC_DLL_CTL_REG1: + .zero 4 + .type NANDC_RANDMZ_CFG, %object + .size NANDC_RANDMZ_CFG, 4 +NANDC_RANDMZ_CFG: + .zero 4 + .type NANDC_FMWAIT_SYN, %object + .size NANDC_FMWAIT_SYN, 4 +NANDC_FMWAIT_SYN: + .zero 4 + .type gNandPhyInfo, %object + .size gNandPhyInfo, 28 +gNandPhyInfo: + .zero 28 + .type gFlashSlcMode, %object + .size gFlashSlcMode, 1 +gFlashSlcMode: + .zero 1 + .zero 3 + .type slcPageToMlcPageTbl, %object + .size slcPageToMlcPageTbl, 1024 +slcPageToMlcPageTbl: + .zero 1024 + .type DieAddrs, %object + .size DieAddrs, 32 +DieAddrs: + .zero 32 + .type FlashWaitBusyScheduleEn, %object + .size FlashWaitBusyScheduleEn, 4 +FlashWaitBusyScheduleEn: + .zero 4 + .zero 4 + .type gReadRetryInfo, %object + .size gReadRetryInfo, 852 +gReadRetryInfo: + .zero 852 + .zero 4 + .type read_retry_cur_offset, %object + .size read_retry_cur_offset, 4 +read_retry_cur_offset: + .zero 4 + .type IDByte, %object + .size IDByte, 32 +IDByte: + .zero 32 + .type gDieOp, %object + .size gDieOp, 192 +gDieOp: + .zero 192 + .type gFlashCurMode, %object + .size gFlashCurMode, 1 +gFlashCurMode: + .zero 1 + .type gFlashInterfaceMode, %object + .size gFlashInterfaceMode, 1 +gFlashInterfaceMode: + .zero 1 + .type gNandMaxDie, %object + .size gNandMaxDie, 1 +gNandMaxDie: + .zero 1 + .zero 1 + .type DieCsIndex, %object + .size DieCsIndex, 8 +DieCsIndex: + .zero 8 + .type gMultiPageProgEn, %object + .size gMultiPageProgEn, 1 +gMultiPageProgEn: + .zero 1 + .zero 3 + .type g_inkDie_check_enable, %object + .size g_inkDie_check_enable, 4 +g_inkDie_check_enable: + .zero 4 + .type idb_flash_slc_mode, %object + .size idb_flash_slc_mode, 4 +idb_flash_slc_mode: + .zero 4 + .type gFlashToggleModeEn, %object + .size gFlashToggleModeEn, 1 +gFlashToggleModeEn: + .zero 1 + .zero 3 + .type gBootDdrMode, %object + .size gBootDdrMode, 4 +gBootDdrMode: + .zero 4 + .type gNandcVer, %object + .size gNandcVer, 4 +gNandcVer: + .zero 4 + .type g_nandc_version_data, %object + .size g_nandc_version_data, 4 +g_nandc_version_data: + .zero 4 + .zero 4 + .type gMasterTempBuf, %object + .size gMasterTempBuf, 8 +gMasterTempBuf: + .zero 8 + .type gMasterInfo, %object + .size gMasterInfo, 48 +gMasterInfo: + .zero 48 + .type gNandcDumpWriteEn, %object + .size gNandcDumpWriteEn, 4 +gNandcDumpWriteEn: + .zero 4 + .type gNandcEccBits, %object + .size gNandcEccBits, 4 +gNandcEccBits: + .zero 4 + .type gNandFlashEccBits, %object + .size gNandFlashEccBits, 1 +gNandFlashEccBits: + .zero 1 + .zero 3 + .type c_ftl_nand_sys_blks_per_plane, %object + .size c_ftl_nand_sys_blks_per_plane, 4 +c_ftl_nand_sys_blks_per_plane: + .zero 4 + .type c_ftl_nand_planes_num, %object + .size c_ftl_nand_planes_num, 2 +c_ftl_nand_planes_num: + .zero 2 + .zero 2 + .type c_ftl_nand_max_sys_blks, %object + .size c_ftl_nand_max_sys_blks, 4 +c_ftl_nand_max_sys_blks: + .zero 4 + .type c_ftl_nand_data_blks_per_plane, %object + .size c_ftl_nand_data_blks_per_plane, 2 +c_ftl_nand_data_blks_per_plane: + .zero 2 + .type c_ftl_nand_blk_pre_plane, %object + .size c_ftl_nand_blk_pre_plane, 2 +c_ftl_nand_blk_pre_plane: + .zero 2 + .type c_ftl_nand_max_data_blks, %object + .size c_ftl_nand_max_data_blks, 4 +c_ftl_nand_max_data_blks: + .zero 4 + .type c_ftl_nand_totle_phy_blks, %object + .size c_ftl_nand_totle_phy_blks, 4 +c_ftl_nand_totle_phy_blks: + .zero 4 + .type c_ftl_nand_type, %object + .size c_ftl_nand_type, 2 +c_ftl_nand_type: + .zero 2 + .type c_ftl_nand_die_num, %object + .size c_ftl_nand_die_num, 2 +c_ftl_nand_die_num: + .zero 2 + .type c_ftl_nand_planes_per_die, %object + .size c_ftl_nand_planes_per_die, 2 +c_ftl_nand_planes_per_die: + .zero 2 + .zero 6 + .type p_plane_order_table, %object + .size p_plane_order_table, 32 +p_plane_order_table: + .zero 32 + .type c_mlc_erase_count_value, %object + .size c_mlc_erase_count_value, 2 +c_mlc_erase_count_value: + .zero 2 + .type c_ftl_nand_ext_blk_pre_plane, %object + .size c_ftl_nand_ext_blk_pre_plane, 2 +c_ftl_nand_ext_blk_pre_plane: + .zero 2 + .type c_ftl_vendor_part_size, %object + .size c_ftl_vendor_part_size, 2 +c_ftl_vendor_part_size: + .zero 2 + .type c_ftl_nand_blks_per_die, %object + .size c_ftl_nand_blks_per_die, 2 +c_ftl_nand_blks_per_die: + .zero 2 + .type c_ftl_nand_page_pre_blk, %object + .size c_ftl_nand_page_pre_blk, 2 +c_ftl_nand_page_pre_blk: + .zero 2 + .type c_ftl_nand_page_pre_slc_blk, %object + .size c_ftl_nand_page_pre_slc_blk, 2 +c_ftl_nand_page_pre_slc_blk: + .zero 2 + .type c_ftl_nand_page_pre_super_blk, %object + .size c_ftl_nand_page_pre_super_blk, 2 +c_ftl_nand_page_pre_super_blk: + .zero 2 + .type c_ftl_nand_sec_pre_page, %object + .size c_ftl_nand_sec_pre_page, 2 +c_ftl_nand_sec_pre_page: + .zero 2 + .type c_ftl_nand_sec_pre_page_shift, %object + .size c_ftl_nand_sec_pre_page_shift, 2 +c_ftl_nand_sec_pre_page_shift: + .zero 2 + .type c_ftl_nand_byte_pre_page, %object + .size c_ftl_nand_byte_pre_page, 2 +c_ftl_nand_byte_pre_page: + .zero 2 + .type c_ftl_nand_byte_pre_oob, %object + .size c_ftl_nand_byte_pre_oob, 2 +c_ftl_nand_byte_pre_oob: + .zero 2 + .type c_ftl_nand_reserved_blks, %object + .size c_ftl_nand_reserved_blks, 2 +c_ftl_nand_reserved_blks: + .zero 2 + .type DeviceCapacity, %object + .size DeviceCapacity, 4 +DeviceCapacity: + .zero 4 + .type c_ftl_nand_max_vendor_blks, %object + .size c_ftl_nand_max_vendor_blks, 2 +c_ftl_nand_max_vendor_blks: + .zero 2 + .type c_ftl_nand_vendor_region_num, %object + .size c_ftl_nand_vendor_region_num, 2 +c_ftl_nand_vendor_region_num: + .zero 2 + .type c_ftl_nand_map_blks_per_plane, %object + .size c_ftl_nand_map_blks_per_plane, 2 +c_ftl_nand_map_blks_per_plane: + .zero 2 + .zero 2 + .type c_ftl_nand_max_map_blks, %object + .size c_ftl_nand_max_map_blks, 4 +c_ftl_nand_max_map_blks: + .zero 4 + .type c_ftl_nand_init_sys_blks_per_plane, %object + .size c_ftl_nand_init_sys_blks_per_plane, 4 +c_ftl_nand_init_sys_blks_per_plane: + .zero 4 + .type c_ftl_nand_map_region_num, %object + .size c_ftl_nand_map_region_num, 2 +c_ftl_nand_map_region_num: + .zero 2 + .type c_ftl_nand_l2pmap_ram_region_num, %object + .size c_ftl_nand_l2pmap_ram_region_num, 2 +c_ftl_nand_l2pmap_ram_region_num: + .zero 2 + .type g_MaxLbaSector, %object + .size g_MaxLbaSector, 4 +g_MaxLbaSector: + .zero 4 + .type g_page_map_check_enable, %object + .size g_page_map_check_enable, 2 +g_page_map_check_enable: + .zero 2 + .type g_totle_vendor_block, %object + .size g_totle_vendor_block, 2 +g_totle_vendor_block: + .zero 2 + .type p_vendor_block_table, %object + .size p_vendor_block_table, 8 +p_vendor_block_table: + .zero 8 + .type g_wr_page_num, %object + .size g_wr_page_num, 4 +g_wr_page_num: + .zero 4 + .zero 4 + .type req_wr_io, %object + .size req_wr_io, 8 +req_wr_io: + .zero 8 + .type g_MaxLpn, %object + .size g_MaxLpn, 4 +g_MaxLpn: + .zero 4 + .zero 4 + .type gBbtInfo, %object + .size gBbtInfo, 96 +gBbtInfo: + .zero 96 + .type gSysFreeQueue, %object + .size gSysFreeQueue, 2056 +gSysFreeQueue: + .zero 2056 + .type g_flash_read_only_en, %object + .size g_flash_read_only_en, 4 +g_flash_read_only_en: + .zero 4 + .zero 4 + .type req_erase, %object + .size req_erase, 8 +req_erase: + .zero 8 + .type p_erase_count_table, %object + .size p_erase_count_table, 8 +p_erase_count_table: + .zero 8 + .type g_totle_sys_slc_erase_count, %object + .size g_totle_sys_slc_erase_count, 4 +g_totle_sys_slc_erase_count: + .zero 4 + .zero 4 + .type g_sys_save_data, %object + .size g_sys_save_data, 48 +g_sys_save_data: + .zero 48 + .type p_data_block_list_table, %object + .size p_data_block_list_table, 8 +p_data_block_list_table: + .zero 8 + .type p_data_block_list_head, %object + .size p_data_block_list_head, 8 +p_data_block_list_head: + .zero 8 + .type p_valid_page_count_table, %object + .size p_valid_page_count_table, 8 +p_valid_page_count_table: + .zero 8 + .type p_data_block_list_tail, %object + .size p_data_block_list_tail, 8 +p_data_block_list_tail: + .zero 8 + .type g_num_data_superblocks, %object + .size g_num_data_superblocks, 2 +g_num_data_superblocks: + .zero 2 + .zero 6 + .type p_free_data_block_list_head, %object + .size p_free_data_block_list_head, 8 +p_free_data_block_list_head: + .zero 8 + .type g_num_free_superblocks, %object + .size g_num_free_superblocks, 2 +g_num_free_superblocks: + .zero 2 + .zero 6 + .type g_active_superblock, %object + .size g_active_superblock, 48 +g_active_superblock: + .zero 48 + .type g_buffer_superblock, %object + .size g_buffer_superblock, 48 +g_buffer_superblock: + .zero 48 + .type g_gc_temp_superblock, %object + .size g_gc_temp_superblock, 48 +g_gc_temp_superblock: + .zero 48 + .type p_l2p_ram_map, %object + .size p_l2p_ram_map, 8 +p_l2p_ram_map: + .zero 8 + .type g_l2p_last_update_region_id, %object + .size g_l2p_last_update_region_id, 2 +g_l2p_last_update_region_id: + .zero 2 + .type FtlUpdateVaildLpnCount, %object + .size FtlUpdateVaildLpnCount, 2 +FtlUpdateVaildLpnCount: + .zero 2 + .type g_VaildLpn, %object + .size g_VaildLpn, 4 +g_VaildLpn: + .zero 4 + .type g_totle_read_page_count, %object + .size g_totle_read_page_count, 4 +g_totle_read_page_count: + .zero 4 + .type g_totle_discard_page_count, %object + .size g_totle_discard_page_count, 4 +g_totle_discard_page_count: + .zero 4 + .type g_totle_write_page_count, %object + .size g_totle_write_page_count, 4 +g_totle_write_page_count: + .zero 4 + .type g_totle_cache_write_count, %object + .size g_totle_cache_write_count, 4 +g_totle_cache_write_count: + .zero 4 + .type g_totle_l2p_write_count, %object + .size g_totle_l2p_write_count, 4 +g_totle_l2p_write_count: + .zero 4 + .type g_totle_gc_page_count, %object + .size g_totle_gc_page_count, 4 +g_totle_gc_page_count: + .zero 4 + .type g_totle_write_sector, %object + .size g_totle_write_sector, 4 +g_totle_write_sector: + .zero 4 + .type g_totle_read_sector, %object + .size g_totle_read_sector, 4 +g_totle_read_sector: + .zero 4 + .type g_GlobalSysVersion, %object + .size g_GlobalSysVersion, 4 +g_GlobalSysVersion: + .zero 4 + .type g_GlobalDataVersion, %object + .size g_GlobalDataVersion, 4 +g_GlobalDataVersion: + .zero 4 + .type g_totle_mlc_erase_count, %object + .size g_totle_mlc_erase_count, 4 +g_totle_mlc_erase_count: + .zero 4 + .type g_totle_slc_erase_count, %object + .size g_totle_slc_erase_count, 4 +g_totle_slc_erase_count: + .zero 4 + .type g_totle_avg_erase_count, %object + .size g_totle_avg_erase_count, 4 +g_totle_avg_erase_count: + .zero 4 + .type g_max_erase_count, %object + .size g_max_erase_count, 4 +g_max_erase_count: + .zero 4 + .type g_min_erase_count, %object + .size g_min_erase_count, 4 +g_min_erase_count: + .zero 4 + .type c_ftl_nand_data_op_blks_per_plane, %object + .size c_ftl_nand_data_op_blks_per_plane, 2 +c_ftl_nand_data_op_blks_per_plane: + .zero 2 + .zero 2 + .type gSysInfo, %object + .size gSysInfo, 16 +gSysInfo: + .zero 16 + .type g_gc_superblock, %object + .size g_gc_superblock, 48 +g_gc_superblock: + .zero 48 + .type g_sys_ext_data, %object + .size g_sys_ext_data, 512 +g_sys_ext_data: + .zero 512 + .type g_all_blk_used_slc_mode, %object + .size g_all_blk_used_slc_mode, 4 +g_all_blk_used_slc_mode: + .zero 4 + .type g_gc_free_blk_threshold, %object + .size g_gc_free_blk_threshold, 2 +g_gc_free_blk_threshold: + .zero 2 + .type g_gc_merge_free_blk_threshold, %object + .size g_gc_merge_free_blk_threshold, 2 +g_gc_merge_free_blk_threshold: + .zero 2 + .type g_gc_skip_write_count, %object + .size g_gc_skip_write_count, 4 +g_gc_skip_write_count: + .zero 4 + .type g_gc_blk_index, %object + .size g_gc_blk_index, 2 +g_gc_blk_index: + .zero 2 + .zero 2 + .type g_in_swl_replace, %object + .size g_in_swl_replace, 4 +g_in_swl_replace: + .zero 4 + .type g_gc_num_req, %object + .size g_gc_num_req, 4 +g_gc_num_req: + .zero 4 + .type gp_gc_page_buf_info, %object + .size gp_gc_page_buf_info, 8 +gp_gc_page_buf_info: + .zero 8 + .type p_gc_data_buf, %object + .size p_gc_data_buf, 8 +p_gc_data_buf: + .zero 8 + .type p_gc_spare_buf, %object + .size p_gc_spare_buf, 8 +p_gc_spare_buf: + .zero 8 + .type req_gc, %object + .size req_gc, 8 +req_gc: + .zero 8 + .type c_gc_page_buf_num, %object + .size c_gc_page_buf_num, 4 +c_gc_page_buf_num: + .zero 4 + .type g_gc_blk_num, %object + .size g_gc_blk_num, 2 +g_gc_blk_num: + .zero 2 + .zero 2 + .type p_gc_blk_tbl, %object + .size p_gc_blk_tbl, 8 +p_gc_blk_tbl: + .zero 8 + .type g_gc_page_offset, %object + .size g_gc_page_offset, 2 +g_gc_page_offset: + .zero 2 + .zero 6 + .type p_gc_page_info, %object + .size p_gc_page_info, 8 +p_gc_page_info: + .zero 8 + .type g_gc_next_blk, %object + .size g_gc_next_blk, 2 +g_gc_next_blk: + .zero 2 + .type g_gc_next_blk_1, %object + .size g_gc_next_blk_1, 2 +g_gc_next_blk_1: + .zero 2 + .type g_gc_next_blk_2, %object + .size g_gc_next_blk_2, 2 +g_gc_next_blk_2: + .zero 2 + .type g_gc_next_blk_3, %object + .size g_gc_next_blk_3, 2 +g_gc_next_blk_3: + .zero 2 + .type g_gc_bad_block_temp_num, %object + .size g_gc_bad_block_temp_num, 2 +g_gc_bad_block_temp_num: + .zero 2 + .zero 6 + .type g_gc_bad_block_temp_tbl, %object + .size g_gc_bad_block_temp_tbl, 34 +g_gc_bad_block_temp_tbl: + .zero 34 + .type g_gc_bad_block_gc_index, %object + .size g_gc_bad_block_gc_index, 2 +g_gc_bad_block_gc_index: + .zero 2 + .type mlcPageToSlcPageTbl, %object + .size mlcPageToSlcPageTbl, 2048 +mlcPageToSlcPageTbl: + .zero 2048 + .type gNandMaxChip, %object + .size gNandMaxChip, 1 +gNandMaxChip: + .zero 1 + .zero 1 + .type gTotleBlock, %object + .size gTotleBlock, 2 +gTotleBlock: + .zero 2 + .type g_free_slc_blk_num, %object + .size g_free_slc_blk_num, 2 +g_free_slc_blk_num: + .zero 2 + .zero 2 + .type g_SlcPartLbaEndSector, %object + .size g_SlcPartLbaEndSector, 4 +g_SlcPartLbaEndSector: + .zero 4 + .type g_in_gc_progress, %object + .size g_in_gc_progress, 4 +g_in_gc_progress: + .zero 4 + .type g_gc_head_data_block, %object + .size g_gc_head_data_block, 4 +g_gc_head_data_block: + .zero 4 + .type g_gc_head_data_block_count, %object + .size g_gc_head_data_block_count, 4 +g_gc_head_data_block_count: + .zero 4 + .type g_cur_erase_blk, %object + .size g_cur_erase_blk, 4 +g_cur_erase_blk: + .zero 4 + .type g_gc_refresh_block_temp_num, %object + .size g_gc_refresh_block_temp_num, 2 +g_gc_refresh_block_temp_num: + .zero 2 + .zero 2 + .type c_wr_page_buf_num, %object + .size c_wr_page_buf_num, 4 +c_wr_page_buf_num: + .zero 4 + .type req_read, %object + .size req_read, 8 +req_read: + .zero 8 + .type req_gc_dst, %object + .size req_gc_dst, 8 +req_gc_dst: + .zero 8 + .type req_prgm, %object + .size req_prgm, 8 +req_prgm: + .zero 8 + .type p_sys_data_buf, %object + .size p_sys_data_buf, 8 +p_sys_data_buf: + .zero 8 + .type p_sys_data_buf_1, %object + .size p_sys_data_buf_1, 8 +p_sys_data_buf_1: + .zero 8 + .type p_vendor_data_buf, %object + .size p_vendor_data_buf, 8 +p_vendor_data_buf: + .zero 8 + .type p_wr_io_data_buf, %object + .size p_wr_io_data_buf, 8 +p_wr_io_data_buf: + .zero 8 + .type p_io_data_buf_0, %object + .size p_io_data_buf_0, 8 +p_io_data_buf_0: + .zero 8 + .type p_io_data_buf_1, %object + .size p_io_data_buf_1, 8 +p_io_data_buf_1: + .zero 8 + .type p_sys_spare_buf, %object + .size p_sys_spare_buf, 8 +p_sys_spare_buf: + .zero 8 + .type p_io_spare_buf, %object + .size p_io_spare_buf, 8 +p_io_spare_buf: + .zero 8 + .type p_wr_io_spare_buf, %object + .size p_wr_io_spare_buf, 8 +p_wr_io_spare_buf: + .zero 8 + .type g_ect_tbl_info_size, %object + .size g_ect_tbl_info_size, 2 +g_ect_tbl_info_size: + .zero 2 + .zero 6 + .type p_swl_mul_table, %object + .size p_swl_mul_table, 8 +p_swl_mul_table: + .zero 8 + .type gp_ect_tbl_info, %object + .size gp_ect_tbl_info, 8 +gp_ect_tbl_info: + .zero 8 + .type p_valid_page_count_check_table, %object + .size p_valid_page_count_check_table, 8 +p_valid_page_count_check_table: + .zero 8 + .type p_map_block_table, %object + .size p_map_block_table, 8 +p_map_block_table: + .zero 8 + .type p_map_block_valid_page_count, %object + .size p_map_block_valid_page_count, 8 +p_map_block_valid_page_count: + .zero 8 + .type p_vendor_block_valid_page_count, %object + .size p_vendor_block_valid_page_count, 8 +p_vendor_block_valid_page_count: + .zero 8 + .type p_vendor_block_ver_table, %object + .size p_vendor_block_ver_table, 8 +p_vendor_block_ver_table: + .zero 8 + .type p_vendor_region_ppn_table, %object + .size p_vendor_region_ppn_table, 8 +p_vendor_region_ppn_table: + .zero 8 + .type p_map_region_ppn_table, %object + .size p_map_region_ppn_table, 8 +p_map_region_ppn_table: + .zero 8 + .type p_map_region_ppn_check_table, %object + .size p_map_region_ppn_check_table, 8 +p_map_region_ppn_check_table: + .zero 8 + .type p_map_block_ver_table, %object + .size p_map_block_ver_table, 8 +p_map_block_ver_table: + .zero 8 + .type p_l2p_map_buf, %object + .size p_l2p_map_buf, 8 +p_l2p_map_buf: + .zero 8 + .type c_ftl_nand_bbm_buf_size, %object + .size c_ftl_nand_bbm_buf_size, 2 +c_ftl_nand_bbm_buf_size: + .zero 2 + .zero 6 + .type gL2pMapInfo, %object + .size gL2pMapInfo, 64 +gL2pMapInfo: + .zero 64 + .type g_totle_map_block, %object + .size g_totle_map_block, 2 +g_totle_map_block: + .zero 2 + .zero 6 + .type g_req_cache, %object + .size g_req_cache, 8 +g_req_cache: + .zero 8 + .type g_tmp_data_superblock_id, %object + .size g_tmp_data_superblock_id, 2 +g_tmp_data_superblock_id: + .zero 2 + .zero 2 + .type g_totle_swl_count, %object + .size g_totle_swl_count, 4 +g_totle_swl_count: + .zero 4 + .type ftl_gc_temp_power_lost_recovery_flag, %object + .size ftl_gc_temp_power_lost_recovery_flag, 4 +ftl_gc_temp_power_lost_recovery_flag: + .zero 4 + .type g_recovery_page_min_ver, %object + .size g_recovery_page_min_ver, 4 +g_recovery_page_min_ver: + .zero 4 + .type gNandIDataBuf, %object + .size gNandIDataBuf, 2048 +gNandIDataBuf: + .zero 2048 + .type RK29_NANDC_REG_BASE, %object + .size RK29_NANDC_REG_BASE, 8 +RK29_NANDC_REG_BASE: + .zero 8 + .type ftl_dma32_buffer_size, %object + .size ftl_dma32_buffer_size, 4 +ftl_dma32_buffer_size: + .zero 4 + .zero 4 + .type ftl_dma32_buffer, %object + .size ftl_dma32_buffer, 8 +ftl_dma32_buffer: + .zero 8 + .type gFlashPageBuffer0, %object + .size gFlashPageBuffer0, 8 +gFlashPageBuffer0: + .zero 8 + .type FlashDdrTunningReadCount, %object + .size FlashDdrTunningReadCount, 4 +FlashDdrTunningReadCount: + .zero 4 + .zero 4 + .type gpReadRetrial, %object + .size gpReadRetrial, 8 +gpReadRetrial: + .zero 8 + .type gpFlashSaveInfo, %object + .size gpFlashSaveInfo, 8 +gpFlashSaveInfo: + .zero 8 + .type gNandFlashInfoBlockAddr, %object + .size gNandFlashInfoBlockAddr, 4 +gNandFlashInfoBlockAddr: + .zero 4 + .type gNandFlashIdbBlockAddr, %object + .size gNandFlashIdbBlockAddr, 4 +gNandFlashIdbBlockAddr: + .zero 4 + .type gNandIDBResBlkNumSaveInFlash, %object + .size gNandIDBResBlkNumSaveInFlash, 1 +gNandIDBResBlkNumSaveInFlash: + .zero 1 + .type g_maxRetryCount, %object + .size g_maxRetryCount, 1 +g_maxRetryCount: + .zero 1 + .type gNandFlashIDBEccBits, %object + .size gNandFlashIDBEccBits, 1 +gNandFlashIDBEccBits: + .zero 1 + .zero 5 + .type gFlashPageBuffer1, %object + .size gFlashPageBuffer1, 8 +gFlashPageBuffer1: + .zero 8 + .type gFlashSpareBuffer, %object + .size gFlashSpareBuffer, 8 +gFlashSpareBuffer: + .zero 8 + .type gFlashProgCheckBuffer, %object + .size gFlashProgCheckBuffer, 8 +gFlashProgCheckBuffer: + .zero 8 + .type gFlashProgCheckSpareBuffer, %object + .size gFlashProgCheckSpareBuffer, 8 +gFlashProgCheckSpareBuffer: + .zero 8 + .type g_nand_ecc_en, %object + .size g_nand_ecc_en, 1 +g_nand_ecc_en: + .zero 1 + .type gMultiPageReadEn, %object + .size gMultiPageReadEn, 1 +gMultiPageReadEn: + .zero 1 + .zero 6 + .type FbbtBlk, %object + .size FbbtBlk, 16 +FbbtBlk: + .zero 16 + .type req_sys, %object + .size req_sys, 56 +req_sys: + .zero 56 + .type g_MaxLbn, %object + .size g_MaxLbn, 4 +g_MaxLbn: + .zero 4 + .zero 4 + .type gVendorBlkInfo, %object + .size gVendorBlkInfo, 64 +gVendorBlkInfo: + .zero 64 + .type g_ect_tbl_power_up_flush, %object + .size g_ect_tbl_power_up_flush, 2 +g_ect_tbl_power_up_flush: + .zero 2 + .type g_power_lost_ecc_error_blk, %object + .size g_power_lost_ecc_error_blk, 2 +g_power_lost_ecc_error_blk: + .zero 2 + .type g_power_lost_recovery_flag, %object + .size g_power_lost_recovery_flag, 2 +g_power_lost_recovery_flag: + .zero 2 + .zero 2 + .type g_recovery_page_num, %object + .size g_recovery_page_num, 4 +g_recovery_page_num: + .zero 4 + .zero 4 + .type g_recovery_ppa_tbl, %object + .size g_recovery_ppa_tbl, 128 +g_recovery_ppa_tbl: + .zero 128 + .type gc_ink_free_return_value, %object + .size gc_ink_free_return_value, 2 +gc_ink_free_return_value: + .zero 2 + .type g_gc_cur_blk_valid_pages, %object + .size g_gc_cur_blk_valid_pages, 2 +g_gc_cur_blk_valid_pages: + .zero 2 + .type g_gc_cur_blk_max_valid_pages, %object + .size g_gc_cur_blk_max_valid_pages, 2 +g_gc_cur_blk_max_valid_pages: + .zero 2 + .zero 2 + .type gp_last_act_superblock, %object + .size gp_last_act_superblock, 8 +gp_last_act_superblock: + .zero 8 + .type gc_discard_updated, %object + .size gc_discard_updated, 4 +gc_discard_updated: + .zero 4 + .type g_LowFormat, %object + .size g_LowFormat, 4 +g_LowFormat: + .zero 4 + .type gLoaderBootInfo, %object + .size gLoaderBootInfo, 8 +gLoaderBootInfo: + .zero 8 + .type RK29_NANDC1_REG_BASE, %object + .size RK29_NANDC1_REG_BASE, 8 +RK29_NANDC1_REG_BASE: + .zero 8 + .type g_ftl_nand_free_count, %object + .size g_ftl_nand_free_count, 4 +g_ftl_nand_free_count: + .zero 4 + .type last_cache_match_count, %object + .size last_cache_match_count, 4 +last_cache_match_count: + .zero 4 + .type idb_write_enable, %object + .size idb_write_enable, 1 +idb_write_enable: + .zero 1 + .zero 7 + .type idb_buf, %object + .size idb_buf, 8 +idb_buf: + .zero 8 + .type idb_last_lba, %object + .size idb_last_lba, 4 +idb_last_lba: + .zero 4 + .zero 4 + .type gpDrmKeyInfo, %object + .size gpDrmKeyInfo, 8 +gpDrmKeyInfo: + .zero 8 + .type SecureBootCheckOK, %object + .size SecureBootCheckOK, 4 +SecureBootCheckOK: + .zero 4 + .type SecureBootEn, %object + .size SecureBootEn, 4 +SecureBootEn: + .zero 4 + .type gpBootConfig, %object + .size gpBootConfig, 8 +gpBootConfig: + .zero 8 + .type gSnSectorData, %object + .size gSnSectorData, 512 +gSnSectorData: + .zero 512 + .type SecureBootUnlockTryCount, %object + .size SecureBootUnlockTryCount, 4 +SecureBootUnlockTryCount: + .zero 4 + .zero 4 + .type gpVendor0Info, %object + .size gpVendor0Info, 8 +gpVendor0Info: + .zero 8 + .type gpVendor1Info, %object + .size gpVendor1Info, 8 +gpVendor1Info: + .zero 8 + .type g_idb_buffer, %object + .size g_idb_buffer, 8 +g_idb_buffer: + .zero 8 + .type g_vendor, %object + .size g_vendor, 8 +g_vendor: + .zero 8 + .type check_valid_page_count_table, %object + .size check_valid_page_count_table, 8192 +check_valid_page_count_table: + .zero 8192 + .type g_gc_refresh_block_temp_tbl, %object + .size g_gc_refresh_block_temp_tbl, 34 +g_gc_refresh_block_temp_tbl: + .zero 34 + .zero 2 + .type gToggleModeClkDiv, %object + .size gToggleModeClkDiv, 4 +gToggleModeClkDiv: + .zero 4 + .type gpNandc1, %object + .size gpNandc1, 8 +gpNandc1: + .zero 8 + .type gNandFlashResEndPageAddr, %object + .size gNandFlashResEndPageAddr, 4 +gNandFlashResEndPageAddr: + .zero 4 + .type gNandFlashInfoBlockEcc, %object + .size gNandFlashInfoBlockEcc, 1 +gNandFlashInfoBlockEcc: + .zero 1 + .type gFlashOnfiModeEn, %object + .size gFlashOnfiModeEn, 1 +gFlashOnfiModeEn: + .zero 1 + .type gFlashSdrModeEn, %object + .size gFlashSdrModeEn, 1 +gFlashSdrModeEn: + .zero 1 + .section .rodata.str1.1,"aMS",@progbits,1 +.LC0: + .string "FlashEraseBlocks pageAddr error %x\n" +.LC1: + .string "phyBlk = 0x%x die = %d block_in_die = 0x%x 0x%8x\n" +.LC2: + .string "FtlFreeSysBlkQueueOut free count = %d\n" +.LC3: + .string "FtlFreeSysBlkQueueOut = %x, free count = %d, error\n" +.LC4: + .string "FtlFreeSysBlkQueueOut = %x, free count = %d\n" +.LC5: + .string "FLASH INFO:\n" +.LC6: + .string "FLASH ID: %x\n" +.LC7: + .string "Device Capacity: %d MB\n" +.LC8: + .string "FMWAIT: %x %x %x %x\n" +.LC9: + .string "FTL INFO:\n" +.LC10: + .string "g_MaxLpn = 0x%x\n" +.LC11: + .string "g_VaildLpn = 0x%x\n" +.LC12: + .string "read_page_count = 0x%x\n" +.LC13: + .string "discard_page_count = 0x%x\n" +.LC14: + .string "write_page_count = 0x%x\n" +.LC15: + .string "cache_write_count = 0x%x\n" +.LC16: + .string "l2p_write_count = 0x%x\n" +.LC17: + .string "gc_page_count = 0x%x\n" +.LC18: + .string "totle_write = %d MB\n" +.LC19: + .string "totle_read = %d MB\n" +.LC20: + .string "GSV = 0x%x\n" +.LC21: + .string "GDV = 0x%x\n" +.LC22: + .string "bad blk num = %d %d\n" +.LC23: + .string "free_superblocks = 0x%x\n" +.LC24: + .string "mlc_EC = 0x%x\n" +.LC25: + .string "slc_EC = 0x%x\n" +.LC26: + .string "avg_EC = 0x%x\n" +.LC27: + .string "sys_EC = 0x%x\n" +.LC28: + .string "max_EC = 0x%x\n" +.LC29: + .string "min_EC = 0x%x\n" +.LC30: + .string "PLT = 0x%x\n" +.LC31: + .string "POT = 0x%x\n" +.LC32: + .string "MaxSector = 0x%x\n" +.LC33: + .string "init_sys_blks_pp = 0x%x\n" +.LC34: + .string "sys_blks_pp = 0x%x\n" +.LC35: + .string "free sysblock = 0x%x\n" +.LC36: + .string "data_blks_pp = 0x%x\n" +.LC37: + .string "data_op_blks_pp = 0x%x\n" +.LC38: + .string "max_data_blks = 0x%x\n" +.LC39: + .string "Sys.id = 0x%x\n" +.LC40: + .string "Bbt.id = 0x%x\n" +.LC41: + .string "ACT.page = 0x%x\n" +.LC42: + .string "ACT.plane = 0x%x\n" +.LC43: + .string "ACT.id = 0x%x\n" +.LC44: + .string "ACT.mode = 0x%x\n" +.LC45: + .string "ACT.a_pages = 0x%x\n" +.LC46: + .string "ACT VPC = 0x%x\n" +.LC47: + .string "BUF.page = 0x%x\n" +.LC48: + .string "BUF.plane = 0x%x\n" +.LC49: + .string "BUF.id = 0x%x\n" +.LC50: + .string "BUF.mode = 0x%x\n" +.LC51: + .string "BUF.a_pages = 0x%x\n" +.LC52: + .string "BUF VPC = 0x%x\n" +.LC53: + .string "TMP.page = 0x%x\n" +.LC54: + .string "TMP.plane = 0x%x\n" +.LC55: + .string "TMP.id = 0x%x\n" +.LC56: + .string "TMP.mode = 0x%x\n" +.LC57: + .string "TMP.a_pages = 0x%x\n" +.LC58: + .string "GC.page = 0x%x\n" +.LC59: + .string "GC.plane = 0x%x\n" +.LC60: + .string "GC.id = 0x%x\n" +.LC61: + .string "GC.mode = 0x%x\n" +.LC62: + .string "GC.a_pages = 0x%x\n" +.LC63: + .string "WR_CHK = 0x%x %x %x %x\n" +.LC64: + .string "Read Err = 0x%x\n" +.LC65: + .string "Prog Err = 0x%x\n" +.LC66: + .string "gc_free_blk_th= 0x%x\n" +.LC67: + .string "gc_merge_free_blk_th= 0x%x\n" +.LC68: + .string "gc_skip_write_count= 0x%x\n" +.LC69: + .string "gc_blk_index= 0x%x\n" +.LC70: + .string "free min EC= 0x%x\n" +.LC71: + .string "free max EC= 0x%x\n" +.LC72: + .string "GC__SB VPC = 0x%x\n" +.LC73: + .string "%d. [0x%x]=0x%x 0x%x 0x%x\n" +.LC74: + .string "free %d. [0x%x] 0x%x 0x%x\n" +.LC75: + .string "FTL version: 5.0.63 20210616" +.LC76: + .string "%s\n" +.LC77: + .string "swblk %x ,avg = %x max= %x vpc= %x,ec=%x ,max ec=%x\n" +.LC78: + .string "FtlGcRefreshBlock 0x%x\n" +.LC79: + .string "FtlGcMarkBadPhyBlk %d 0x%x\n" +.LC80: + .string "%s error allocating memory. return -1\n" +.LC81: + .string "%s %p:0x%x:" +.LC82: + .string "%x " +.LC83: + .string "" +.LC84: + .string "otp error! %d" +.LC85: + .string "rr" +.LC86: + .string "%d statReg->V6.mtrans_cnt=%d flReg.V6.page_num=%d\n" +.LC87: + .string "nandc:" +.LC88: + .string "%d flReg.d32=%x %x\n" +.LC89: + .string "sdr read ok %x ecc=%d\n" +.LC90: + .string "sync para %d\n" +.LC91: + .string "TOG mode Read error %x %x\n" +.LC92: + .string "read retry status %x %x %x\n" +.LC93: + .string "micron RR %d row=%x,count %d,status=%d\n" +.LC94: + .string "samsung RR %d row=%x,count %d,status=%d\n" +.LC95: + .string "ECC:%d\n" +.LC96: + .string "No.%d FLASH ID:%x %x %x %x %x %x\n" +.LC97: + .string "FlashLoadPhyInfo fail %x!!\n" +.LC98: + .string "Read pageadd=%x ecc=%x err=%x\n" +.LC99: + .string "data:" +.LC100: + .string "spare:" +.LC101: + .string "ReadRetry pageadd=%x ecc=%x err=%x\n" +.LC102: + .string "FLFB:%d %d\n" +.LC103: + .string "prog error: = %x\n" +.LC104: + .string "prog read error: = %x\n" +.LC105: + .string "prog read REFRESH: = %x\n" +.LC106: + .string "prog read s error: = %x %x %x\n" +.LC107: + .string "prog read d error: = %x %x %x\n" +.LC108: + .string "id = %x,%x addr= %x,spare= %x %x %x %x data= %x\n" +.LC109: + .string "...%s enter...\n" +.LC110: + .string "superBlkID = %x vpc=%x\n" +.LC111: + .string "flashmode = %x pagenum = %x %x\n" +.LC112: + .string "id = %x,%x addr= %x,spare= %x %x %x %x data=%x %x\n" +.LC113: + .string "blk = %x vpc=%x mode = %x\n" +.LC114: + .string "mlc id = %x,%x addr= %x,spare= %x %x %x %x data=%x %x\n" +.LC115: + .string "slc id = %x,%x addr= %x,spare= %x %x %x %x data=%x %x\n" +.LC116: + .string "ftl_scan_all_ppa blk %x page %x flag: %x\n" +.LC117: + .string "ftl_scan_all_ppa blk %x page %x flag: %x ............... is bad block\n" +.LC118: + .string "addr= %x, status= %d,spare= %x %x %x %x data=%x %x\n" +.LC119: + .string "%s finished\n" +.LC120: + .string "FlashMakeFactorBbt %d\n" +.LC121: + .string "bad block:%d %d\n" +.LC122: + .string "FMFB:%d %d\n" +.LC123: + .string "E:bad block:%d\n" +.LC124: + .string "FMFB:Save %d %d\n" +.LC125: + .string "FtlBbmTblFlush id=%x,page=%x,previd=%x cnt=%d\n" +.LC126: + .string "FtlBbmTblFlush error:%x\n" +.LC127: + .string "FtlBbmTblFlush error = %x error count = %d\n" +.LC128: + .string "FtlGcFreeBadSuperBlk 0x%x\n" +.LC129: + .string "decrement_vpc_count %x = %d\n" +.LC130: + .string "decrement_vpc_count %x = %d in free list\n" +.LC131: + .string "FtlVpcTblFlush error = %x error count = %d\n" +.LC132: + .string "page map lost: %x %x\n" +.LC133: + .string "FtlMapWritePage error = %x\n" +.LC134: + .string "FtlMapWritePage error = %x error count = %d\n" +.LC135: + .string "FtlVendorPartRead refresh = %x phyAddr = %x\n" +.LC136: + .string "no ect" +.LC137: + .string "slc mode" +.LC138: + .string "BBT:" +.LC139: + .string "region_id = %x phyAddr = %x\n" +.LC140: + .string "map_ppn:" +.LC141: + .string "load_l2p_region refresh = %x phyAddr = %x\n" +.LC142: + .string "FtlCheckVpc2 %x = %x %x\n" +.LC143: + .string "free blk vpc error %x = %x %x\n" +.LC144: + .string "error_flag %x\n" +.LC145: + .string "Ftlscanalldata = %x\n" +.LC146: + .string "scan lpa = %x ppa= %x\n" +.LC147: + .string "lba = %x,addr= %x,spare= %x %x %x %x data=%x %x\n" +.LC148: + .string "RSB refresh addr %x\n" +.LC149: + .string "spuer block %x vpn is 0\n " +.LC150: + .string "g_recovery_ppa %x ver %x\n " +.LC151: + .string "FtlCheckVpc %x = %x %x\n" +.LC152: + .string "FtlGcScanTempBlk Error ID %x %x!!!!!!! \n" +.LC153: + .string "FtlGcScanTempBlkError ID %x %x!!!!!!!\n" +.LC154: + .string "GC des block %x done\n" +.LC155: + .string "too many bad block = %d %d\n" +.LC156: + .string "%d GC datablk = %x vpc %x %x\n" +.LC157: + .string "SWL %x, FSB = %x vpc= %x,ec=%x th=%x\n" +.LC158: + .string "Ftlwrite decrement_vpc_count %x = %d\n" +.LC159: + .string "rk_ftl_de_init %x\n" +.LC160: + .string "...%s: no bad block mapping table, format device\n" +.LC161: + .string "...%s FtlSysBlkInit error ,format device!\n" +.LC162: + .string "FtlInit %x\n" +.LC163: + .string "fix power lost blk = %x vpc=%x\n" +.LC164: + .string "erase power lost blk = %x vpc=%x\n" +.LC165: + .string "FtlWrite: lpa error:%x %x\n" +.LC166: + .string "id = %x,%x addr= %x,spare= %x %x %x %x data = %x\n" +.LC167: + .string ":" +.LC168: + .string "phyBlk = %x,addr= %x,spare= %x %x %x %x data=%x %x\n" +.LC169: + .string "Mblk:" +.LC170: + .string "L2P:" +.LC171: + .string "L2PC:" +.LC172: + .string "write_idblock fix data %x %x\n" +.LC173: + .string "idblk:" +.LC174: + .string "idb reverse %x %x\n" +.LC175: + .string "write_idblock totle_sec %x %x %x %x\n" +.LC176: + .string "IDBlockWriteData %x %x\n" +.LC177: + .string "IDBlockWriteData %x %x ret= %x\n" +.LC178: + .string "IdBlockReadData %x %x\n" +.LC179: + .string "IdBlockReadData %x %x ret= %x\n" +.LC180: + .string "write and check error:%d idb=%x,offset=%x,r=%x,w=%x\n" +.LC181: + .string "write" +.LC182: + .string "read" +.LC183: + .string "write_idblock error %d\n" +.LC184: + .string "wl_lba %p %x %x %x\n" +.LC185: + .string "RKNAND_GET_DRM_KEY\n" +.LC186: + .string "rk_copy_from_user error\n" +.LC187: + .string "RKNAND_STORE_DRM_KEY\n" +.LC188: + .string "RKNAND_DIASBLE_SECURE_BOOT\n" +.LC189: + .string "RKNAND_ENASBLE_SECURE_BOOT\n" +.LC190: + .string "RKNAND_GET_SN_SECTOR\n" +.LC191: + .string "RKNAND_LOADER_UNLOCK\n" +.LC192: + .string "RKNAND_LOADER_STATUS\n" +.LC193: + .string "RKNAND_LOADER_LOCK\n" +.LC194: + .string "LockKey not match %d\n" +.LC195: + .string "RKNAND_GET_VENDOR_SECTOR\n" +.LC196: + .string "RKNAND_STORE_VENDOR_SECTOR\n" +.LC197: + .string "return ret = %lx\n" +.LC198: + .string "secureBootEn check error\n" +.LC199: + .string "\0013vendor storage %x,%x,%x\n" diff --git a/drivers/rk_nand/rk_ftlv5_arm32.S b/drivers/rk_nand/rk_ftlv5_arm32.S new file mode 100644 index 00000000000..035bf726401 --- /dev/null +++ b/drivers/rk_nand/rk_ftlv5_arm32.S @@ -0,0 +1,27612 @@ +/* + * Copyright (c) 2016-2018, Fuzhou Rockchip Electronics Co., Ltd + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * date: 2021-07-26 + * function: rk ftl v5 for rockchip soc base on arm v7 to support MLC NAND. + */ + .arch armv7-a + .eabi_attribute 20, 1 + .eabi_attribute 21, 1 + .eabi_attribute 23, 3 + .eabi_attribute 24, 1 + .eabi_attribute 25, 1 + .eabi_attribute 26, 2 + .eabi_attribute 30, 4 + .eabi_attribute 34, 1 + .eabi_attribute 18, 2 + .file "rk_ftlv5_arm_v8.c" + .text + .align 2 + .fpu softvfp + .type ndelay, %function +ndelay: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L2 + add r0, r0, #996 + add r0, r0, #3 + umull r0, r1, r0, r3 + ldr r3, .L2+4 + ldr r3, [r3, #8] + lsr r0, r1, #6 + bx r3 @ indirect register sibling call +.L3: + .align 2 +.L2: + .word 274877907 + .word arm_delay_ops + .fnend + .size ndelay, .-ndelay + .align 2 + .syntax unified + .arm + .fpu softvfp + .type flash_read_ecc, %function +flash_read_ecc: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L6 + push {r4, lr} + .save {r4, lr} + ldr r4, [r3, r0, lsl #3] + add r3, r3, r0, lsl #3 + mov r0, #80 + ldrb r3, [r3, #4] @ zero_extendqisi2 + add r4, r4, r3, lsl #8 + mov r3, #122 + str r3, [r4, #2056] + bl ndelay + ldr r3, [r4, #2048] + ldr r0, [r4, #2048] + and r3, r3, #15 + and r0, r0, #15 + cmp r0, r3 + movcc r0, r3 + ldr r3, [r4, #2048] + and r3, r3, #15 + cmp r3, r0 + movcc r3, r0 + ldr r0, [r4, #2048] + and r0, r0, #15 + cmp r0, r3 + movcc r0, r3 + pop {r4, pc} +.L7: + .align 2 +.L6: + .word .LANCHOR0 + .fnend + .size flash_read_ecc, .-flash_read_ecc + .align 2 + .syntax unified + .arm + .fpu softvfp + .type ftl_set_blk_mode.part.17, %function +ftl_set_blk_mode.part.17: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L9 + lsr r1, r0, #5 + mov ip, #1 + and r0, r0, #31 + ldr r2, [r3, #32] + ldr r3, [r2, r1, lsl #2] + orr r0, r3, ip, lsl r0 + str r0, [r2, r1, lsl #2] + bx lr +.L10: + .align 2 +.L9: + .word .LANCHOR0 + .fnend + .size ftl_set_blk_mode.part.17, .-ftl_set_blk_mode.part.17 + .align 2 + .global FlashMemCmp8 + .syntax unified + .arm + .fpu softvfp + .type FlashMemCmp8, %function +FlashMemCmp8: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L25 + ldrb r3, [r3, #36] @ zero_extendqisi2 + cmp r3, #0 + beq .L20 + ldrb r3, [r1, #1] @ zero_extendqisi2 + ldrb ip, [r0, #1] @ zero_extendqisi2 + cmp ip, r3 + movne r3, #0 + bne .L20 +.L24: + mov r0, #0 + bx lr +.L14: + cmp r3, r2 + bne .L16 + mov r0, #0 + ldr pc, [sp], #4 +.L20: + cmp r3, r2 + beq .L24 + str lr, [sp, #-4]! + .save {lr} +.L16: + ldrb lr, [r0, r3] @ zero_extendqisi2 + ldrb ip, [r1, r3] @ zero_extendqisi2 + add r3, r3, #1 + cmp lr, ip + beq .L14 + mov r0, r3 + ldr pc, [sp], #4 +.L26: + .align 2 +.L25: + .word .LANCHOR0 + .fnend + .size FlashMemCmp8, .-FlashMemCmp8 + .align 2 + .global FlashRsvdBlkChk + .syntax unified + .arm + .fpu softvfp + .type FlashRsvdBlkChk, %function +FlashRsvdBlkChk: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r2, .L28 + ldrb ip, [r2, #37] @ zero_extendqisi2 + ldr r3, [r2, #40] + mul r3, r3, ip + cmp r3, r1 + movls r2, #0 + movhi r2, #1 + cmp r0, #0 + movne r2, #0 + eor r0, r2, #1 + bx lr +.L29: + .align 2 +.L28: + .word .LANCHOR0 + .fnend + .size FlashRsvdBlkChk, .-FlashRsvdBlkChk + .align 2 + .global FlashGetRandomizer + .syntax unified + .arm + .fpu softvfp + .type FlashGetRandomizer, %function +FlashGetRandomizer: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + and r3, r1, #127 + ldr r2, .L39 + lsl r3, r3, #1 + push {r4, lr} + .save {r4, lr} + ldrh r4, [r2, r3] + ldr r3, .L39+4 + ldrb r3, [r3, #44] @ zero_extendqisi2 + cmp r3, #0 + beq .L30 + bl FlashRsvdBlkChk + cmp r0, #0 + orrne r4, r4, #-1073741824 +.L30: + mov r0, r4 + pop {r4, pc} +.L40: + .align 2 +.L39: + .word .LANCHOR1 + .word .LANCHOR0 + .fnend + .size FlashGetRandomizer, .-FlashGetRandomizer + .align 2 + .global FlashSetRandomizer + .syntax unified + .arm + .fpu softvfp + .type FlashSetRandomizer, %function +FlashSetRandomizer: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r2, .L50 + and r3, r1, #127 + lsl r3, r3, #1 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + mov r6, r0 + ldrh r5, [r2, r3] + ldr r3, .L50+4 + ldrb r2, [r3, #44] @ zero_extendqisi2 + mov r4, r3 + cmp r2, #0 + beq .L42 + bl FlashRsvdBlkChk + cmp r0, #0 + orrne r5, r5, #-1073741824 +.L42: + ldr r3, [r4, r6, lsl #3] + str r5, [r3, #336] + pop {r4, r5, r6, pc} +.L51: + .align 2 +.L50: + .word .LANCHOR1 + .word .LANCHOR0 + .fnend + .size FlashSetRandomizer, .-FlashSetRandomizer + .align 2 + .global FlashBlockAlignInit + .syntax unified + .arm + .fpu softvfp + .type FlashBlockAlignInit, %function +FlashBlockAlignInit: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + cmp r0, #512 + ldr r3, .L58 + movhi r2, #1024 + bhi .L57 + cmp r0, #256 + movhi r2, #512 + bhi .L57 + cmp r0, #128 + movhi r2, #256 + bhi .L57 + str r0, [r3, #40] + bx lr +.L57: + str r2, [r3, #40] + bx lr +.L59: + .align 2 +.L58: + .word .LANCHOR0 + .fnend + .size FlashBlockAlignInit, .-FlashBlockAlignInit + .align 2 + .global FlashReadCmd + .syntax unified + .arm + .fpu softvfp + .type FlashReadCmd, %function +FlashReadCmd: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr ip, .L63 + str lr, [sp, #-4]! + .save {lr} + add r2, ip, r0, lsl #3 + ldr r3, [ip, r0, lsl #3] + ldr ip, [ip, #48] + ldrb r2, [r2, #4] @ zero_extendqisi2 + ldrb ip, [ip, #7] @ zero_extendqisi2 + lsl r2, r2, #8 + cmp ip, #1 + addeq ip, r3, r2 + moveq lr, #38 + add r3, r3, r2 + mov r2, #0 + streq lr, [ip, #2056] + str r2, [r3, #2056] + str r2, [r3, #2052] + str r2, [r3, #2052] + uxtb r2, r1 + str r2, [r3, #2052] + lsr r2, r1, #8 + str r2, [r3, #2052] + lsr r2, r1, #16 + str r2, [r3, #2052] + mov r2, #48 + str r2, [r3, #2056] + ldr lr, [sp], #4 + b FlashSetRandomizer +.L64: + .align 2 +.L63: + .word .LANCHOR0 + .fnend + .size FlashReadCmd, .-FlashReadCmd + .align 2 + .global FlashReadDpDataOutCmd + .syntax unified + .arm + .fpu softvfp + .type FlashReadDpDataOutCmd, %function +FlashReadDpDataOutCmd: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr ip, .L70 + push {r4, lr} + .save {r4, lr} + uxtb r4, r1 + lsr lr, r1, #8 + add r2, ip, r0, lsl #3 + ldr r3, [ip, r0, lsl #3] + ldrb ip, [ip, #68] @ zero_extendqisi2 + ldrb r2, [r2, #4] @ zero_extendqisi2 + cmp ip, #1 + lsr ip, r1, #16 + lsl r2, r2, #8 + add r3, r3, r2 + bne .L66 + mov r2, #6 + str r2, [r3, #2056] + mov r2, #0 + str r2, [r3, #2052] + str r2, [r3, #2052] + str r4, [r3, #2052] + str lr, [r3, #2052] + str ip, [r3, #2052] +.L69: + mov r2, #224 + str r2, [r3, #2056] + pop {r4, lr} + b FlashSetRandomizer +.L66: + mov r2, #0 + str r2, [r3, #2056] + str r2, [r3, #2052] + str r2, [r3, #2052] + str r4, [r3, #2052] + str lr, [r3, #2052] + str ip, [r3, #2052] + mov ip, #5 + str ip, [r3, #2056] + str r2, [r3, #2052] + str r2, [r3, #2052] + b .L69 +.L71: + .align 2 +.L70: + .word .LANCHOR0 + .fnend + .size FlashReadDpDataOutCmd, .-FlashReadDpDataOutCmd + .align 2 + .global FlashProgFirstCmd + .syntax unified + .arm + .fpu softvfp + .type FlashProgFirstCmd, %function +FlashProgFirstCmd: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr ip, .L74 + lsr r2, r1, #16 + str lr, [sp, #-4]! + .save {lr} + ldr r3, [ip, r0, lsl #3] + add ip, ip, r0, lsl #3 + ldrb ip, [ip, #4] @ zero_extendqisi2 + add r3, r3, ip, lsl #8 + mov ip, #128 + str ip, [r3, #2056] + mov ip, #0 + str ip, [r3, #2052] + str ip, [r3, #2052] + uxtb ip, r1 + str ip, [r3, #2052] + lsr ip, r1, #8 + str ip, [r3, #2052] + str r2, [r3, #2052] + ldr lr, [sp], #4 + b FlashSetRandomizer +.L75: + .align 2 +.L74: + .word .LANCHOR0 + .fnend + .size FlashProgFirstCmd, .-FlashProgFirstCmd + .align 2 + .global FlashEraseCmd + .syntax unified + .arm + .fpu softvfp + .type FlashEraseCmd, %function +FlashEraseCmd: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr ip, .L82 + cmp r2, #0 + str lr, [sp, #-4]! + .save {lr} + ldr r3, [ip, r0, lsl #3] + add r0, ip, r0, lsl #3 + ldrb r0, [r0, #4] @ zero_extendqisi2 + lsl r0, r0, #8 + beq .L77 + add r2, r3, r0 + mov lr, #96 + str lr, [r2, #2056] + uxtb lr, r1 + str lr, [r2, #2052] + lsr lr, r1, #8 + str lr, [r2, #2052] + lsr lr, r1, #16 + str lr, [r2, #2052] + ldr r2, [ip, #40] + add r1, r1, r2 +.L77: + add r3, r3, r0 + mov r2, #96 + str r2, [r3, #2056] + uxtb r2, r1 + str r2, [r3, #2052] + lsr r2, r1, #8 + lsr r1, r1, #16 + str r2, [r3, #2052] + mov r2, #208 + str r1, [r3, #2052] + str r2, [r3, #2056] + ldr pc, [sp], #4 +.L83: + .align 2 +.L82: + .word .LANCHOR0 + .fnend + .size FlashEraseCmd, .-FlashEraseCmd + .align 2 + .global FlashProgDpSecondCmd + .syntax unified + .arm + .fpu softvfp + .type FlashProgDpSecondCmd, %function +FlashProgDpSecondCmd: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, lr} + .save {r4, lr} + lsr r2, r1, #16 + ldr lr, .L86 + ldr r3, [lr, r0, lsl #3] + add ip, lr, r0, lsl #3 + ldrb r4, [ip, #4] @ zero_extendqisi2 + ldrb ip, [lr, #63] @ zero_extendqisi2 + add r3, r3, r4, lsl #8 + str ip, [r3, #2056] + mov ip, #0 + str ip, [r3, #2052] + str ip, [r3, #2052] + uxtb ip, r1 + str ip, [r3, #2052] + lsr ip, r1, #8 + str ip, [r3, #2052] + str r2, [r3, #2052] + pop {r4, lr} + b FlashSetRandomizer +.L87: + .align 2 +.L86: + .word .LANCHOR0 + .fnend + .size FlashProgDpSecondCmd, .-FlashProgDpSecondCmd + .align 2 + .global FlashProgSecondCmd + .syntax unified + .arm + .fpu softvfp + .type FlashProgSecondCmd, %function +FlashProgSecondCmd: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L90 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + ldr r4, [r3, r0, lsl #3] + add r3, r3, r0, lsl #3 + ldr r0, .L90+4 + ldrb r5, [r3, #4] @ zero_extendqisi2 + ldr r3, .L90+8 + add r4, r4, r5, lsl #8 + ldr r3, [r3, #4] + blx r3 + mov r3, #16 + str r3, [r4, #2056] + pop {r4, r5, r6, pc} +.L91: + .align 2 +.L90: + .word .LANCHOR0 + .word 64424500 + .word arm_delay_ops + .fnend + .size FlashProgSecondCmd, .-FlashProgSecondCmd + .align 2 + .global FlashProgDpFirstCmd + .syntax unified + .arm + .fpu softvfp + .type FlashProgDpFirstCmd, %function +FlashProgDpFirstCmd: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r2, .L93 + ldr r3, [r2, r0, lsl #3] + add r0, r2, r0, lsl #3 + ldrb r2, [r2, #62] @ zero_extendqisi2 + ldrb r1, [r0, #4] @ zero_extendqisi2 + add r3, r3, r1, lsl #8 + str r2, [r3, #2056] + bx lr +.L94: + .align 2 +.L93: + .word .LANCHOR0 + .fnend + .size FlashProgDpFirstCmd, .-FlashProgDpFirstCmd + .align 2 + .global FlashReadStatus + .syntax unified + .arm + .fpu softvfp + .type FlashReadStatus, %function +FlashReadStatus: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L97 + mov r2, #112 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + ldr r5, [r3, r0, lsl #3] + add r3, r3, r0, lsl #3 + mov r0, #80 + ldrb r4, [r3, #4] @ zero_extendqisi2 + add r3, r5, r4, lsl #8 + add r4, r4, #8 + str r2, [r3, #2056] + bl ndelay + ldr r0, [r5, r4, lsl #8] + pop {r4, r5, r6, pc} +.L98: + .align 2 +.L97: + .word .LANCHOR0 + .fnend + .size FlashReadStatus, .-FlashReadStatus + .align 2 + .global js_hash + .syntax unified + .arm + .fpu softvfp + .type js_hash, %function +js_hash: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L102 + add r1, r0, r1 +.L100: + cmp r0, r1 + bne .L101 + mov r0, r3 + bx lr +.L101: + lsr r2, r3, #2 + ldrb ip, [r0], #1 @ zero_extendqisi2 + add r2, r2, r3, lsl #5 + add r2, r2, ip + eor r3, r3, r2 + b .L100 +.L103: + .align 2 +.L102: + .word 1204201446 + .fnend + .size js_hash, .-js_hash + .align 2 + .global FlashLoadIdbInfo + .syntax unified + .arm + .fpu softvfp + .type FlashLoadIdbInfo, %function +FlashLoadIdbInfo: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + mov r0, #0 + bx lr + .fnend + .size FlashLoadIdbInfo, .-FlashLoadIdbInfo + .align 2 + .global BuildFlashLsbPageTable + .syntax unified + .arm + .fpu softvfp + .type BuildFlashLsbPageTable, %function +BuildFlashLsbPageTable: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + cmp r0, #0 + push {r4, lr} + .save {r4, lr} + mov r4, r1 + bne .L106 + ldr r3, .L162 +.L107: + lsl r2, r0, #1 + strh r0, [r2, r3] @ movhi + add r0, r0, #1 + cmp r0, #512 + bne .L107 +.L113: + mov r2, #2048 + mov r1, #255 + ldr r0, .L162+4 + uxth r4, r4 + bl ftl_memset + ldr r2, .L162 + mov r3, #0 + add r0, r2, #1024 +.L108: + uxth r1, r3 + cmp r4, r1 + bhi .L141 + pop {r4, pc} +.L106: + cmp r0, #1 + bne .L109 + ldr r1, .L162 + mov r3, #0 +.L112: + cmp r3, #3 + uxth r2, r3 + bls .L110 + tst r2, #1 + movne r0, #3 + moveq r0, #2 + rsb r2, r0, r2, lsl #1 + uxth r2, r2 +.L110: + lsl r0, r3, #1 + add r3, r3, #1 + cmp r3, #512 + strh r2, [r0, r1] @ movhi + bne .L112 + b .L113 +.L109: + cmp r0, #2 + bne .L114 + ldr r1, .L162 + mov r2, #0 +.L116: + uxth r3, r2 + cmp r2, #1 + lsl r0, r2, #1 + add r2, r2, #1 + lslhi r3, r3, #1 + subhi r3, r3, #1 + uxthhi r3, r3 + cmp r2, #512 + strh r3, [r0, r1] @ movhi + bne .L116 + b .L113 +.L114: + cmp r0, #3 + bne .L117 + ldr r1, .L162 + mov r3, #0 +.L120: + cmp r3, #5 + uxth r2, r3 + bls .L118 + tst r2, #1 + movne r0, #5 + moveq r0, #4 + rsb r2, r0, r2, lsl #1 + uxth r2, r2 +.L118: + lsl r0, r3, #1 + add r3, r3, #1 + cmp r3, #512 + strh r2, [r0, r1] @ movhi + bne .L120 + b .L113 +.L117: + cmp r0, #4 + mov r3, #0 + bne .L121 + ldr r2, .L162+8 + strh r3, [r2, #84] @ movhi + mov r3, #1 + strh r3, [r2, #86] @ movhi + mov r3, #2 + strh r3, [r2, #88] @ movhi + mov r3, #3 + strh r3, [r2, #90] @ movhi + mov r3, #5 + strh r3, [r2, #94] @ movhi + mov r3, #7 + strh r3, [r2, #96] @ movhi + mov r3, #8 + strh r0, [r2, #92] @ movhi + strh r3, [r2, #98]! @ movhi +.L123: + tst r3, #1 + movne r1, #7 + moveq r1, #6 + rsb r1, r1, r3, lsl #1 + add r3, r3, #1 + uxth r3, r3 + strh r1, [r2, #2]! @ movhi + cmp r3, #512 + bne .L123 + b .L113 +.L121: + cmp r0, #5 + bne .L124 + ldr r2, .L162+8 + add r1, r2, #84 +.L125: + lsl r0, r3, #1 + strh r3, [r0, r1] @ movhi + add r3, r3, #1 + cmp r3, #16 + bne .L125 + add r2, r2, #114 +.L126: + strh r3, [r2, #2]! @ movhi + add r3, r3, #2 + uxth r3, r3 + cmp r3, #1008 + bne .L126 + b .L113 +.L124: + cmp r0, #6 + bne .L127 + ldr r0, .L162 + mov r1, r3 +.L130: + cmp r1, #5 + uxth r2, r1 + bls .L128 + tst r2, #1 + movne r2, #12 + moveq r2, #10 + sub r2, r3, r2 + uxth r2, r2 +.L128: + lsl ip, r1, #1 + add r1, r1, #1 + cmp r1, #512 + add r3, r3, #3 + strh r2, [ip, r0] @ movhi + uxth r3, r3 + bne .L130 + b .L113 +.L127: + cmp r0, #9 + bne .L131 + ldr r2, .L162+8 + movw r1, #1021 + strh r3, [r2, #84] @ movhi + mov r3, #1 + strh r3, [r2, #86] @ movhi + mov r3, r2 + mov r2, #2 + strh r2, [r3, #88]! @ movhi + mov r2, #3 +.L132: + strh r2, [r3, #2]! @ movhi + add r2, r2, #2 + uxth r2, r2 + cmp r2, r1 + bne .L132 + b .L113 +.L131: + cmp r0, #10 + bne .L133 + ldr r2, .L162+8 + add r1, r2, #84 +.L134: + lsl r0, r3, #1 + strh r3, [r0, r1] @ movhi + add r3, r3, #1 + cmp r3, #63 + bne .L134 + add r2, r2, #208 + movw r1, #961 +.L135: + strh r3, [r2, #2]! @ movhi + add r3, r3, #2 + uxth r3, r3 + cmp r3, r1 + bne .L135 + b .L113 +.L133: + cmp r0, #11 + bne .L136 + ldr r2, .L162+8 + mov r3, #0 + add r1, r2, #84 +.L137: + lsl r0, r3, #1 + strh r3, [r0, r1] @ movhi + add r3, r3, #1 + cmp r3, #8 + bne .L137 + add r2, r2, #98 +.L139: + tst r3, #1 + movne r1, #7 + moveq r1, #6 + rsb r1, r1, r3, lsl #1 + add r3, r3, #1 + uxth r3, r3 + strh r1, [r2, #2]! @ movhi + cmp r3, #512 + bne .L139 + b .L113 +.L136: + cmp r0, #12 + bne .L113 + ldr r3, .L162+8 + mov r2, #0 + strh r2, [r3, #84] @ movhi + mov r2, #1 + strh r2, [r3, #86] @ movhi + mov r2, #2 + strh r2, [r3, #88] @ movhi + mov r2, #3 + strh r2, [r3, #90]! @ movhi + mov r2, #4 +.L140: + sub r1, r2, #1 + add r1, r1, r2, lsr #1 + add r2, r2, #1 + uxth r2, r2 + strh r1, [r3, #2]! @ movhi + cmp r2, #512 + bne .L140 + b .L113 +.L141: + lsl r1, r3, #1 + add r3, r3, #1 + ldrh r1, [r1, r2] + lsl ip, r1, #1 + strh r1, [r0, ip] @ movhi + b .L108 +.L163: + .align 2 +.L162: + .word .LANCHOR0+84 + .word .LANCHOR0+1108 + .word .LANCHOR0 + .fnend + .size BuildFlashLsbPageTable, .-BuildFlashLsbPageTable + .align 2 + .global FlashPrintInfo + .syntax unified + .arm + .fpu softvfp + .type FlashPrintInfo, %function +FlashPrintInfo: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + bx lr + .fnend + .size FlashPrintInfo, .-FlashPrintInfo + .align 2 + .global ToshibaSetRRPara + .syntax unified + .arm + .fpu softvfp + .type ToshibaSetRRPara, %function +ToshibaSetRRPara: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + add r8, r1, r1, lsl #2 + ldr r7, .L173 + mov r6, r0 + mov r5, #0 + add r7, r1, r7 +.L166: + ldr r3, .L173+4 + ldrb r3, [r3] @ zero_extendqisi2 + cmp r5, r3 + bcc .L170 + pop {r4, r5, r6, r7, r8, pc} +.L170: + ldr r4, .L173+8 + mov r3, #85 + str r3, [r6, #8] + mov r0, #200 + ldrsb r3, [r5, r4] + str r3, [r6, #4] + bl ndelay + ldr r3, .L173+12 + ldrb r3, [r3] @ zero_extendqisi2 + cmp r3, #34 + addeq r3, r5, r8 + addeq r4, r4, r3 + ldrsbeq r3, [r4, #5] + beq .L172 + cmp r3, #35 + addeq r3, r5, r8 + ldrsbne r3, [r7] + addeq r4, r4, r3 + ldrsbeq r3, [r4, #50] +.L172: + str r3, [r6] + add r5, r5, #1 + b .L166 +.L174: + .align 2 +.L173: + .word .LANCHOR1+396 + .word g_maxRegNum + .word .LANCHOR1+256 + .word g_retryMode + .fnend + .size ToshibaSetRRPara, .-ToshibaSetRRPara + .align 2 + .global SamsungSetRRPara + .syntax unified + .arm + .fpu softvfp + .type SamsungSetRRPara, %function +SamsungSetRRPara: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L179 + push {r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + mov r4, #0 + ldr r8, .L179+4 + mov r6, r0 + mov r7, r3 + mov r9, #161 + add r1, r3, r1, lsl #2 + mov r10, r4 + add r5, r1, #3 +.L176: + ldrb r3, [r8] @ zero_extendqisi2 + cmp r4, r3 + bcc .L177 + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L177: + str r9, [r6, #8] + mov r0, #300 + str r10, [r6] + ldrsb r3, [r7, r4] + add r4, r4, #1 + str r3, [r6] + ldrsb r3, [r5, #1]! + str r3, [r6] + bl ndelay + b .L176 +.L180: + .align 2 +.L179: + .word .LANCHOR1+404 + .word g_maxRegNum + .fnend + .size SamsungSetRRPara, .-SamsungSetRRPara + .align 2 + .global FlashDieInfoInit + .syntax unified + .arm + .fpu softvfp + .type FlashDieInfoInit, %function +FlashDieInfoInit: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L196 + push {r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + mov r6, #0 + ldr r4, .L196+4 + ldrh r0, [r3, #10] + strb r6, [r4, #3156] + strb r6, [r4, #3157] + bl FlashBlockAlignInit + mov r2, #8 + mov r1, r6 + ldr r0, .L196+8 + bl ftl_memset + mov r2, #32 + mov r1, r6 + add r0, r4, #3168 + ldr r9, .L196+12 + bl ftl_memset + mov r2, #128 + mov r1, r6 + add r0, r4, #3200 + mov r8, r9 + bl ftl_memset + ldr r5, [r4, #48] + add r7, r5, #1 +.L183: + ldrb r2, [r5] @ zero_extendqisi2 + add r1, r9, r6, lsl #3 + mov r0, r7 + bl FlashMemCmp8 + cmp r0, #0 + bne .L182 + ldrb r3, [r4, #3156] @ zero_extendqisi2 + add r2, r4, r3, lsl #2 + str r0, [r2, #3168] + add r2, r3, #1 + add r3, r4, r3 + strb r2, [r4, #3156] + strb r6, [r3, #3160] +.L182: + add r6, r6, #1 + cmp r6, #4 + bne .L183 + ldrb r3, [r4, #3156] @ zero_extendqisi2 + strb r3, [r4, #3157] + ldrb r3, [r5, #8] @ zero_extendqisi2 + cmp r3, #2 + beq .L184 +.L188: + ldrh r2, [r5, #14] + ldrb r3, [r4, #3156] @ zero_extendqisi2 + smulbb r3, r3, r2 + ldrb r2, [r5, #13] @ zero_extendqisi2 + smulbb r3, r3, r2 + ldr r2, .L196+16 + strh r3, [r2] @ movhi + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L184: + ldr r9, [r4, #40] + mov r6, #0 +.L187: + ldrb r2, [r5] @ zero_extendqisi2 + add r1, r8, r6, lsl #3 + mov r0, r7 + bl FlashMemCmp8 + cmp r0, #0 + bne .L185 + ldrh r3, [r5, #14] + ldrb r2, [r4, #3156] @ zero_extendqisi2 + and r1, r3, #65280 + ldrb r3, [r5, #13] @ zero_extendqisi2 + mul r3, r9, r3 + mul r3, r3, r1 + add r1, r4, r2, lsl #2 + str r3, [r1, #3168] + ldrb r0, [r5, #23] @ zero_extendqisi2 + cmp r0, #0 + lslne r3, r3, #1 + strne r3, [r1, #3168] + add r3, r2, #1 + add r2, r4, r2 + strb r3, [r4, #3156] + strb r6, [r2, #3160] +.L185: + add r6, r6, #1 + cmp r6, #4 + bne .L187 + b .L188 +.L197: + .align 2 +.L196: + .word .LANCHOR1+468 + .word .LANCHOR0 + .word .LANCHOR0+3160 + .word IDByte + .word .LANCHOR0+3328 + .fnend + .size FlashDieInfoInit, .-FlashDieInfoInit + .align 2 + .global FlashReadIdbData + .syntax unified + .arm + .fpu softvfp + .type FlashReadIdbData, %function +FlashReadIdbData: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, lr} + .save {r4, lr} + mov r2, #2048 + ldr r1, .L200 + bl ftl_memcpy + mov r0, #0 + pop {r4, pc} +.L201: + .align 2 +.L200: + .word .LANCHOR0+3332 + .fnend + .size FlashReadIdbData, .-FlashReadIdbData + .align 2 + .global FlashLoadPhyInfoInRam + .syntax unified + .arm + .fpu softvfp + .type FlashLoadPhyInfoInRam, %function +FlashLoadPhyInfoInRam: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + mov r4, #0 + ldr r5, .L211 + ldr r9, .L211+4 + add r6, r5, #500 +.L205: + lsl r8, r4, #5 + ldrb r2, [r6, r4, lsl #5] @ zero_extendqisi2 + mov r1, r9 + add r0, r8, #1 + add r0, r6, r0 + bl FlashMemCmp8 + subs r7, r0, #0 + bne .L203 + add r5, r5, r8 + ldr r2, .L211+8 + ldrb r0, [r5, #522] @ zero_extendqisi2 + add r6, r6, r8 + mov r3, r7 + mov r1, r2 +.L204: + ldrb ip, [r2, r3, lsl #5] @ zero_extendqisi2 + cmp ip, r0 + beq .L207 + add r3, r3, #1 + cmp r3, #4 + bne .L204 +.L207: + ldr r4, .L211+12 + add r1, r1, r3, lsl #5 + mov r2, #32 + ldr r0, .L211+16 + bl ftl_memcpy + mov r2, #32 + mov r1, r6 + mov r0, r4 + bl ftl_memcpy + ldrh r0, [r4, #10] + bl FlashBlockAlignInit + b .L202 +.L203: + add r4, r4, #1 + cmp r4, #86 + bne .L205 + mvn r7, #0 +.L202: + mov r0, r7 + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L212: + .align 2 +.L211: + .word .LANCHOR1 + .word IDByte + .word .LANCHOR1+3252 + .word .LANCHOR1+468 + .word .LANCHOR0+52 + .fnend + .size FlashLoadPhyInfoInRam, .-FlashLoadPhyInfoInRam + .align 2 + .global ftl_flash_suspend + .syntax unified + .arm + .fpu softvfp + .type ftl_flash_suspend, %function +ftl_flash_suspend: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L214 + ldr r2, [r3, #-2804] + ldr r1, [r2] + str r1, [r3, #-2800] + ldr r1, [r2, #4] + str r1, [r3, #-2796] + ldr r1, [r2, #8] + str r1, [r3, #-2792] + ldr r1, [r2, #12] + str r1, [r3, #-2788] + ldr r1, [r2, #304] + str r1, [r3, #-2784] + ldr r1, [r2, #308] + str r1, [r3, #-2780] + ldr r1, [r2, #336] + ldr r2, [r2, #344] + str r1, [r3, #-2776] + str r2, [r3, #-2772] + bx lr +.L215: + .align 2 +.L214: + .word .LANCHOR2 + .fnend + .size ftl_flash_suspend, .-ftl_flash_suspend + .global __aeabi_uidiv + .global __aeabi_uidivmod + .align 2 + .global LogAddr2PhyAddr + .syntax unified + .arm + .fpu softvfp + .type LogAddr2PhyAddr, %function +LogAddr2PhyAddr: + .fnstart + @ args = 4, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #12 + mov r9, r2 + ldr r2, .L222 + mov fp, r3 + mov r10, r1 + mov r7, r0 + ldr r5, .L222+4 + ldrh r3, [r2, #14] + ldrh r2, [r2, #12] + ldrh r6, [r5, #40] + ldr r4, [r0, #4] + smulbb r3, r3, r2 + ldrb r2, [r5, #36] @ zero_extendqisi2 + uxth r3, r3 + cmp r2, #1 + lsleq r6, r6, #1 + ubfx r2, r4, #10, #16 + mov r1, r3 + str r3, [sp, #4] + mov r0, r2 + uxtheq r6, r6 + str r2, [sp] + bl __aeabi_uidiv + ldr r3, [sp, #4] + uxth r8, r0 + ldr r2, [sp] + mov r1, r3 + mov r0, r2 + bl __aeabi_uidivmod + cmp r10, #1 + uxth r1, r1 + ubfx r0, r4, #0, #10 + bne .L218 + ldr r3, .L222+8 + ldrb r3, [r3, #-2740] @ zero_extendqisi2 + cmp r3, #0 + addeq r0, r5, r0, lsl #1 + ldrheq r0, [r0, #84] +.L218: + add r5, r5, r8, lsl #2 + ldr r3, [r5, #3168] + mla r6, r6, r1, r3 + ldrb r3, [sp, #48] @ zero_extendqisi2 + cmp r3, #1 + add r0, r6, r0 + str r0, [r9] + movls r0, #0 + str r8, [fp] + ldrhi r0, [r7, #4] + ldrhi r3, [r7, #40] + addhi r0, r0, #1024 + subhi r0, r0, r3 + clzhi r0, r0 + lsrhi r0, r0, #5 + add sp, sp, #12 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L223: + .align 2 +.L222: + .word .LANCHOR2-2768 + .word .LANCHOR0 + .word .LANCHOR2 + .fnend + .size LogAddr2PhyAddr, .-LogAddr2PhyAddr + .align 2 + .global FlashReadStatusEN + .syntax unified + .arm + .fpu softvfp + .type FlashReadStatusEN, %function +FlashReadStatusEN: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L237 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + ldr r4, [r3, r0, lsl #3] + add r0, r3, r0, lsl #3 + ldrb r5, [r0, #4] @ zero_extendqisi2 + ldr r0, [r3, #48] + ldrb r0, [r0, #8] @ zero_extendqisi2 + cmp r0, #2 + mov r0, r3 + lsl r3, r5, #8 + movne r2, #112 + add r5, r5, #8 + addne r3, r4, r3 + strne r2, [r3, #2056] + bne .L230 + cmp r2, #0 + add r3, r4, r3 + ldrbne r2, [r0, #66] @ zero_extendqisi2 + ldrbeq r2, [r0, #65] @ zero_extendqisi2 + str r2, [r3, #2056] + ldrb r0, [r0, #67] @ zero_extendqisi2 + cmp r0, #0 + movne r2, #0 + addne ip, r4, r5, lsl #8 + bne .L229 +.L230: + mov r0, #80 + bl ndelay + ldr r0, [r4, r5, lsl #8] + uxtb r0, r0 + pop {r4, r5, r6, pc} +.L231: + lsl r3, r2, #3 + add r2, r2, #1 + lsr r3, r1, r3 + uxtb r3, r3 + str r3, [ip, #4] +.L229: + cmp r2, r0 + bcc .L231 + b .L230 +.L238: + .align 2 +.L237: + .word .LANCHOR0 + .fnend + .size FlashReadStatusEN, .-FlashReadStatusEN + .align 2 + .global FlashWaitReadyEN + .syntax unified + .arm + .fpu softvfp + .type FlashWaitReadyEN, %function +FlashWaitReadyEN: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + mov r4, r0 + mov r5, r1 + mov r6, r2 +.L240: + mov r2, r6 + mov r1, r5 + mov r0, r4 + bl FlashReadStatusEN + cmp r0, #255 + beq .L240 + tst r0, #64 + popne {r4, r5, r6, pc} + mov r1, #3 + mov r0, #1 + bl rk_usleep_range + b .L240 + .fnend + .size FlashWaitReadyEN, .-FlashWaitReadyEN + .align 2 + .global ftl_read_flash_info + .syntax unified + .arm + .fpu softvfp + .type ftl_read_flash_info, %function +ftl_read_flash_info: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, lr} + .save {r4, lr} + mov r2, #11 + mov r1, #0 + mov r4, r0 + bl ftl_memset + ldr r2, .L250 + mov ip, #1 + ldr r0, .L250+4 + ldr r3, [r2, #48] + ldr r1, [r2, #40] + ldrb r3, [r3, #9] @ zero_extendqisi2 + smulbb r3, r3, r1 + strh r3, [r4, #4] @ unaligned + ldr r3, .L250+8 + ldrb r1, [r3, #-2739] @ zero_extendqisi2 + ldr r3, [r3, #-2736] + strb r1, [r4, #7] + str r3, [r4] @ unaligned + ldr r3, [r2, #48] + ldrb r1, [r3, #9] @ zero_extendqisi2 + strb r1, [r4, #6] + mov r1, #32 + strb r1, [r4, #8] + ldrb r1, [r2, #3156] @ zero_extendqisi2 + ldrb r3, [r3, #7] @ zero_extendqisi2 + strb r3, [r4, #9] + mov r3, #0 + strb r3, [r4, #10] +.L247: + uxtb r2, r3 + cmp r1, r2 + bhi .L248 + pop {r4, pc} +.L248: + ldrb lr, [r3, r0] @ zero_extendqisi2 + add r3, r3, #1 + ldrb r2, [r4, #10] @ zero_extendqisi2 + orr r2, r2, ip, lsl lr + strb r2, [r4, #10] + b .L247 +.L251: + .align 2 +.L250: + .word .LANCHOR0 + .word .LANCHOR0+3160 + .word .LANCHOR2 + .fnend + .size ftl_read_flash_info, .-ftl_read_flash_info + .align 2 + .global FlashScheduleEnSet + .syntax unified + .arm + .fpu softvfp + .type FlashScheduleEnSet, %function +FlashScheduleEnSet: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L253 + ldr r2, [r3, #-2732] + str r0, [r3, #-2732] + mov r0, r2 + bx lr +.L254: + .align 2 +.L253: + .word .LANCHOR2 + .fnend + .size FlashScheduleEnSet, .-FlashScheduleEnSet + .align 2 + .global FlashGetPageSize + .syntax unified + .arm + .fpu softvfp + .type FlashGetPageSize, %function +FlashGetPageSize: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L256 + ldr r3, [r3, #48] + ldrb r0, [r3, #9] @ zero_extendqisi2 + bx lr +.L257: + .align 2 +.L256: + .word .LANCHOR0 + .fnend + .size FlashGetPageSize, .-FlashGetPageSize + .align 2 + .global NandcReadDontCaseBusyEn + .syntax unified + .arm + .fpu softvfp + .type NandcReadDontCaseBusyEn, %function +NandcReadDontCaseBusyEn: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + bx lr + .fnend + .size NandcReadDontCaseBusyEn, .-NandcReadDontCaseBusyEn + .align 2 + .global NandcGetChipIf + .syntax unified + .arm + .fpu softvfp + .type NandcGetChipIf, %function +NandcGetChipIf: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r2, .L260 + add r3, r2, r0, lsl #3 + ldr r0, [r2, r0, lsl #3] + ldrb r3, [r3, #4] @ zero_extendqisi2 + add r3, r3, #8 + add r0, r0, r3, lsl #8 + bx lr +.L261: + .align 2 +.L260: + .word .LANCHOR0 + .fnend + .size NandcGetChipIf, .-NandcGetChipIf + .align 2 + .global NandcSetDdrPara + .syntax unified + .arm + .fpu softvfp + .type NandcSetDdrPara, %function +NandcSetDdrPara: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L263 + ldr r2, [r3, #-2804] + lsl r3, r0, #8 + orr r0, r3, r0, lsl #16 + orr r0, r0, #1 + str r0, [r2, #304] + bx lr +.L264: + .align 2 +.L263: + .word .LANCHOR2 + .fnend + .size NandcSetDdrPara, .-NandcSetDdrPara + .align 2 + .global NandcSetDdrDiv + .syntax unified + .arm + .fpu softvfp + .type NandcSetDdrDiv, %function +NandcSetDdrDiv: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L266 + orr r0, r0, #16640 + ldr r3, [r3, #-2804] + str r0, [r3, #344] + bx lr +.L267: + .align 2 +.L266: + .word .LANCHOR2 + .fnend + .size NandcSetDdrDiv, .-NandcSetDdrDiv + .align 2 + .global NandcSetDdrMode + .syntax unified + .arm + .fpu softvfp + .type NandcSetDdrMode, %function +NandcSetDdrMode: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L271 + cmp r0, #0 + ldr r2, [r3, #-2804] + ldr r3, [r2] + bfieq r3, r0, #13, #1 + orrne r3, r3, #253952 + str r3, [r2] + bx lr +.L272: + .align 2 +.L271: + .word .LANCHOR2 + .fnend + .size NandcSetDdrMode, .-NandcSetDdrMode + .align 2 + .global NandcSetMode + .syntax unified + .arm + .fpu softvfp + .type NandcSetMode, %function +NandcSetMode: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L280 + ands r1, r0, #6 + ldr r2, [r3, #-2804] + ldr r3, [r2] + bfieq r3, r1, #13, #1 + beq .L276 + movw r1, #8322 + orr r3, r3, #24576 + str r1, [r2, #344] + bfc r3, #15, #1 + ldr r1, .L280+4 + orr r3, r3, #196608 + tst r0, #4 + orrne r3, r3, #32768 + str r1, [r2, #304] + mov r1, #38 + str r1, [r2, #308] + mov r1, #39 + str r1, [r2, #308] +.L276: + str r3, [r2] + mov r0, #0 + bx lr +.L281: + .align 2 +.L280: + .word .LANCHOR2 + .word 1052675 + .fnend + .size NandcSetMode, .-NandcSetMode + .align 2 + .global NandcFlashCs + .syntax unified + .arm + .fpu softvfp + .type NandcFlashCs, %function +NandcFlashCs: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L283 + mov r2, #1 + ldr r1, [r3, r0, lsl #3] + add r0, r3, r0, lsl #3 + ldrb r0, [r0, #4] @ zero_extendqisi2 + ldr r3, [r1] + lsl r2, r2, r0 + bfi r3, r2, #0, #8 + str r3, [r1] + bx lr +.L284: + .align 2 +.L283: + .word .LANCHOR0 + .fnend + .size NandcFlashCs, .-NandcFlashCs + .align 2 + .global NandcFlashDeCs + .syntax unified + .arm + .fpu softvfp + .type NandcFlashDeCs, %function +NandcFlashDeCs: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L286 + ldr r2, [r3, r0, lsl #3] + ldr r3, [r2] + bfc r3, #0, #8 + bfc r3, #17, #1 + str r3, [r2] + bx lr +.L287: + .align 2 +.L286: + .word .LANCHOR0 + .fnend + .size NandcFlashDeCs, .-NandcFlashDeCs + .align 2 + .global HynixSetRRPara + .syntax unified + .arm + .fpu softvfp + .type HynixSetRRPara, %function +HynixSetRRPara: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #12 + mov r8, r3 + ldr r3, .L297 + mov r7, r2 + mov r5, r0 + mov r6, r1 + ldr r4, .L297+4 + ldr r2, [r3, #48] + ldrb r2, [r2, #19] @ zero_extendqisi2 + cmp r2, #6 + bne .L289 + mov r2, #20 + sub r4, r4, #8 + add r2, r2, r0, lsl #6 + add r2, r2, r8, lsl #2 +.L296: + add r4, r4, r2 +.L290: + ldr r9, [r3, r5, lsl #3] + add r3, r3, r5, lsl #3 + mov r0, r5 + ldrb fp, [r3, #4] @ zero_extendqisi2 + sub r6, r6, #1 + bl NandcFlashCs + mov r3, #54 + sub r4, r4, #1 + lsl fp, fp, #8 + add r10, r9, fp + str r3, [r10, #2056] + sub r3, r7, #1 + add r7, r7, r6 +.L293: + cmp r3, r7 + bne .L294 + mov r3, #22 + add r9, r9, fp + str r3, [r9, #2056] + mov r0, r5 + bl NandcFlashDeCs + ldr r3, .L297+8 + add r5, r3, r5 + strb r8, [r5, #-1876] + add sp, sp, #12 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L289: + cmp r2, #7 + bne .L291 + mov r2, #160 + mov r1, #28 + smlabb r1, r2, r0, r1 + mov r2, #10 + sub r4, r4, #8 + smlabb r2, r2, r8, r1 + b .L296 +.L291: + cmp r2, #8 + addeq r4, r4, #20 + addeq r2, r8, r8, lsl #2 + beq .L296 + add r2, r8, #2 + add r2, r2, r0, lsl #3 + add r4, r4, r2, lsl #3 + sub r4, r4, #4 + b .L290 +.L294: + ldrb r2, [r3, #1]! @ zero_extendqisi2 + mov r0, #200 + str r2, [r10, #2052] + str r3, [sp, #4] + bl ndelay + ldrsb r2, [r4, #1]! + ldr r3, [sp, #4] + str r2, [r10, #2048] + b .L293 +.L298: + .align 2 +.L297: + .word .LANCHOR0 + .word .LANCHOR2-2720 + .word .LANCHOR2 + .fnend + .size HynixSetRRPara, .-HynixSetRRPara + .align 2 + .global FlashSetReadRetryDefault + .syntax unified + .arm + .fpu softvfp + .type FlashSetReadRetryDefault, %function +FlashSetReadRetryDefault: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L309 + ldr r3, [r3, #48] + ldrb r3, [r3, #19] @ zero_extendqisi2 + sub r3, r3, #1 + cmp r3, #7 + bxhi lr + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + mov r4, #0 + ldr r6, .L309+4 + sub r5, r6, #2720 + sub r5, r5, #4 +.L302: + ldr r3, .L309+8 + uxtb r0, r4 + ldrb r3, [r3, r4, lsl #3] @ zero_extendqisi2 + cmp r3, #173 + bne .L301 + mov r3, #0 + mov r2, r5 + ldrb r1, [r6, #-2727] @ zero_extendqisi2 + bl HynixSetRRPara +.L301: + add r4, r4, #1 + cmp r4, #4 + bne .L302 + pop {r4, r5, r6, pc} +.L310: + .align 2 +.L309: + .word .LANCHOR0 + .word .LANCHOR2 + .word IDByte + .fnend + .size FlashSetReadRetryDefault, .-FlashSetReadRetryDefault + .align 2 + .global FlashWaitCmdDone + .syntax unified + .arm + .fpu softvfp + .type FlashWaitCmdDone, %function +FlashWaitCmdDone: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + ldr r5, .L319 + add r4, r5, r0, lsl #4 + ldr r3, [r4, #3208] + cmp r3, #0 + beq .L313 + ldrb r7, [r4, #3200] @ zero_extendqisi2 + mov r6, r0 + add r5, r5, r6, lsl #2 + mov r0, r7 + bl NandcFlashCs + ldr r2, [r5, #3168] + mov r0, r7 + ldr r1, [r4, #3204] + adds r2, r2, #0 + movne r2, #1 + bl FlashWaitReadyEN + mov r1, r0 + mov r0, r7 + bl NandcFlashDeCs + ldr r3, [r4, #3208] + sbfx r0, r1, #0, #1 + str r0, [r3] + mov r3, #0 + ldr r2, [r4, #3212] + str r3, [r4, #3208] + cmp r2, r3 + strne r0, [r2] + strne r3, [r4, #3212] +.L313: + mov r0, #0 + pop {r4, r5, r6, r7, r8, pc} +.L320: + .align 2 +.L319: + .word .LANCHOR0 + .fnend + .size FlashWaitCmdDone, .-FlashWaitCmdDone + .align 2 + .global NandcDelayns + .syntax unified + .arm + .fpu softvfp + .type NandcDelayns, %function +NandcDelayns: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, lr} + .save {r4, lr} + bl ndelay + mov r0, #0 + pop {r4, pc} + .fnend + .size NandcDelayns, .-NandcDelayns + .align 2 + .global NandcWaitFlashReadyNoDelay + .syntax unified + .arm + .fpu softvfp + .type NandcWaitFlashReadyNoDelay, %function +NandcWaitFlashReadyNoDelay: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L329 + push {r0, r1, r2, r4, r5, lr} + .save {r4, r5, lr} + .pad #12 + ldr r4, .L329+4 + ldr r5, [r3, r0, lsl #3] +.L325: + ldr r3, [r5] + str r3, [sp, #4] + ldr r3, [sp, #4] + tst r3, #512 + bne .L326 + mov r0, #10 + bl ndelay + subs r4, r4, #1 + bne .L325 + mvn r0, #0 +.L323: + add sp, sp, #12 + @ sp needed + pop {r4, r5, pc} +.L326: + mov r0, #0 + b .L323 +.L330: + .align 2 +.L329: + .word .LANCHOR0 + .word 100000 + .fnend + .size NandcWaitFlashReadyNoDelay, .-NandcWaitFlashReadyNoDelay + .align 2 + .global NandcWaitFlashReady + .syntax unified + .arm + .fpu softvfp + .type NandcWaitFlashReady, %function +NandcWaitFlashReady: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r4, r5, lr} + .save {r4, r5, lr} + .pad #12 + ldr r3, .L337 + ldr r4, .L337+4 + ldr r5, [r3, r0, lsl #3] + mov r0, #130 + bl ndelay +.L333: + ldr r3, [r5] + str r3, [sp, #4] + ldr r3, [sp, #4] + tst r3, #512 + bne .L334 + mov r1, #2 + mov r0, #1 + bl rk_usleep_range + subs r4, r4, #1 + bne .L333 + mvn r0, #0 +.L331: + add sp, sp, #12 + @ sp needed + pop {r4, r5, pc} +.L334: + mov r0, #0 + b .L331 +.L338: + .align 2 +.L337: + .word .LANCHOR0 + .word 100000 + .fnend + .size NandcWaitFlashReady, .-NandcWaitFlashReady + .align 2 + .global FlashReset + .syntax unified + .arm + .fpu softvfp + .type FlashReset, %function +FlashReset: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L341 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + mov r4, r0 + ldr r5, [r3, r0, lsl #3] + add r3, r3, r0, lsl #3 + ldrb r6, [r3, #4] @ zero_extendqisi2 + bl NandcFlashCs + mov r3, #255 + mov r0, r4 + add r5, r5, r6, lsl #8 + str r3, [r5, #2056] + bl NandcWaitFlashReady + mov r0, r4 + pop {r4, r5, r6, lr} + b NandcFlashDeCs +.L342: + .align 2 +.L341: + .word .LANCHOR0 + .fnend + .size FlashReset, .-FlashReset + .align 2 + .global flash_enter_slc_mode + .syntax unified + .arm + .fpu softvfp + .type flash_enter_slc_mode, %function +flash_enter_slc_mode: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + ldr r6, .L350 + ldrb r3, [r6, #-2740] @ zero_extendqisi2 + cmp r3, #0 + popeq {r4, r5, r6, r7, r8, pc} + mov r5, r0 + bl NandcFlashCs + ldr r3, .L350+4 + ldr r7, [r3, r5, lsl #3] + add r3, r3, r5, lsl #3 + ldrb r8, [r3, #4] @ zero_extendqisi2 + ldr r3, .L350+8 + ldrb r3, [r3, r5, lsl #3] @ zero_extendqisi2 + lsl r8, r8, #8 + cmp r3, #44 + bne .L345 + add r4, r7, r8 + mov r3, #239 + str r3, [r4, #2056] + mov r3, #145 + str r3, [r4, #2052] + mov r0, #50 + bl ndelay + mov r3, #0 + mov r2, #1 + str r3, [r4, #2048] + mov r0, #100 + str r2, [r4, #2048] + str r3, [r4, #2048] + str r3, [r4, #2048] + bl ndelay +.L345: + mov r0, r5 + add r7, r7, r8 + bl NandcWaitFlashReadyNoDelay + mov r3, #218 + mov r0, r5 + str r3, [r7, #2056] + bl NandcWaitFlashReady + mov r3, #2 + strb r3, [r6, #-1872] + pop {r4, r5, r6, r7, r8, pc} +.L351: + .align 2 +.L350: + .word .LANCHOR2 + .word .LANCHOR0 + .word IDByte + .fnend + .size flash_enter_slc_mode, .-flash_enter_slc_mode + .align 2 + .global flash_exit_slc_mode + .syntax unified + .arm + .fpu softvfp + .type flash_exit_slc_mode, %function +flash_exit_slc_mode: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + ldr r6, .L359 + ldrb r3, [r6, #-2740] @ zero_extendqisi2 + cmp r3, #0 + popeq {r4, r5, r6, r7, r8, pc} + mov r5, r0 + bl NandcFlashCs + ldr r3, .L359+4 + ldr r7, [r3, r5, lsl #3] + add r3, r3, r5, lsl #3 + ldrb r8, [r3, #4] @ zero_extendqisi2 + ldr r3, .L359+8 + ldrb r3, [r3, r5, lsl #3] @ zero_extendqisi2 + lsl r8, r8, #8 + cmp r3, #44 + bne .L354 + add r4, r7, r8 + mov r3, #239 + str r3, [r4, #2056] + mov r3, #145 + str r3, [r4, #2052] + mov r0, #50 + bl ndelay + mov r3, #2 + mov r0, #100 + str r3, [r4, #2048] + mov r3, #1 + str r3, [r4, #2048] + mov r3, #0 + str r3, [r4, #2048] + str r3, [r4, #2048] + bl ndelay +.L354: + mov r0, r5 + add r7, r7, r8 + bl NandcWaitFlashReadyNoDelay + mov r3, #223 + mov r0, r5 + str r3, [r7, #2056] + bl NandcWaitFlashReady + mov r3, #0 + strb r3, [r6, #-1872] + pop {r4, r5, r6, r7, r8, pc} +.L360: + .align 2 +.L359: + .word .LANCHOR2 + .word .LANCHOR0 + .word IDByte + .fnend + .size flash_exit_slc_mode, .-flash_exit_slc_mode + .align 2 + .global FlashEraseBlock + .syntax unified + .arm + .fpu softvfp + .type FlashEraseBlock, %function +FlashEraseBlock: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + mov r4, r0 + mov r5, r1 + mov r6, r2 + bl NandcWaitFlashReady + mov r0, r4 + bl NandcFlashCs + mov r2, r6 + mov r1, r5 + mov r0, r4 + bl FlashEraseCmd + mov r0, r4 + bl NandcWaitFlashReady + mov r1, r5 + mov r0, r4 + bl FlashReadStatus + mov r1, r0 + mov r0, r4 + bl NandcFlashDeCs + and r0, r1, #1 + pop {r4, r5, r6, pc} + .fnend + .size FlashEraseBlock, .-FlashEraseBlock + .align 2 + .global FlashSetInterfaceMode + .syntax unified + .arm + .fpu softvfp + .type FlashSetInterfaceMode, %function +FlashSetInterfaceMode: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L386 + push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #12 + mov lr, #0 + ldr r4, .L386+4 + mov r5, #239 + mov r6, #128 + mov r7, #1 + ldrb r3, [r3, #-1871] @ zero_extendqisi2 + mov r9, #35 + mov r8, r4 + mov r10, #32 + and r2, r3, #4 + and r3, r3, #1 + str r2, [sp, #4] + mov r2, lr + str r3, [sp] +.L373: + ldr r1, .L386+8 + add r3, r4, lr + ldrb r3, [r3, #4] @ zero_extendqisi2 + ldrb ip, [lr, r1] @ zero_extendqisi2 + cmp ip, #69 + cmpne ip, #152 + beq .L364 + cmp ip, #44 + cmpne ip, #173 + bne .L365 +.L364: + cmp r0, #1 + ldr r1, [r8, lr] + bne .L366 + ldr fp, [sp] + cmp fp, #0 + beq .L365 + lsl r3, r3, #8 + cmp ip, #173 + add fp, r1, r3 + str r5, [fp, #2056] + streq r0, [fp, #2052] + beq .L385 + cmp ip, #44 + moveq ip, #5 + streq r0, [fp, #2052] + strne r6, [fp, #2052] + streq ip, [fp, #2048] + strne r0, [fp, #2048] +.L371: + add r3, r1, r3 + str r2, [r3, #2048] + str r2, [r3, #2048] + str r2, [r3, #2048] +.L365: + add lr, lr, #8 + cmp lr, #32 + bne .L373 + mov r0, #0 + bl NandcWaitFlashReady + mov r0, #0 + add sp, sp, #12 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L366: + ldr fp, [sp, #4] + cmp fp, #0 + beq .L365 + lsl r3, r3, #8 + cmp ip, #173 + add fp, r1, r3 + str r5, [fp, #2056] + streq r7, [fp, #2052] + streq r10, [fp, #2048] + beq .L371 + cmp ip, #44 + streq r7, [fp, #2052] + streq r9, [fp, #2048] + beq .L371 + str r6, [fp, #2052] +.L385: + str r2, [fp, #2048] + b .L371 +.L387: + .align 2 +.L386: + .word .LANCHOR2 + .word .LANCHOR0 + .word IDByte + .fnend + .size FlashSetInterfaceMode, .-FlashSetInterfaceMode + .align 2 + .global FlashReadSpare + .syntax unified + .arm + .fpu softvfp + .type FlashReadSpare, %function +FlashReadSpare: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr ip, .L390 + ldr r3, .L390+4 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + mov r5, r2 + ldr r4, [ip, r0, lsl #3] + add ip, ip, r0, lsl #3 + ldrb r3, [r3, #477] @ zero_extendqisi2 + ldrb r2, [ip, #4] @ zero_extendqisi2 + lsl r3, r3, #9 + add r4, r4, r2, lsl #8 + mov r2, #0 + str r2, [r4, #2056] + str r3, [r4, #2052] + lsr r3, r3, #8 + str r3, [r4, #2052] + uxtb r3, r1 + str r3, [r4, #2052] + lsr r3, r1, #8 + lsr r1, r1, #16 + str r3, [r4, #2052] + mov r3, #48 + str r1, [r4, #2052] + str r3, [r4, #2056] + bl NandcWaitFlashReady + ldr r3, [r4, #2048] + strb r3, [r5] + pop {r4, r5, r6, pc} +.L391: + .align 2 +.L390: + .word .LANCHOR0 + .word .LANCHOR1 + .fnend + .size FlashReadSpare, .-FlashReadSpare + .align 2 + .global SandiskProgTestBadBlock + .syntax unified + .arm + .fpu softvfp + .type SandiskProgTestBadBlock, %function +SandiskProgTestBadBlock: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L394 + push {r4, lr} + .save {r4, lr} + ldr r4, [r3, r0, lsl #3] + add r3, r3, r0, lsl #3 + ldrb r3, [r3, #4] @ zero_extendqisi2 + add r4, r4, r3, lsl #8 + mov r3, #162 + str r3, [r4, #2056] + mov r3, #128 + str r3, [r4, #2056] + mov r3, #0 + str r3, [r4, #2052] + str r3, [r4, #2052] + uxtb r3, r1 + str r3, [r4, #2052] + lsr r3, r1, #8 + lsr r1, r1, #16 + str r3, [r4, #2052] + mov r3, #16 + str r1, [r4, #2052] + str r3, [r4, #2056] + bl NandcWaitFlashReady + mov r3, #112 + mov r0, #80 + str r3, [r4, #2056] + bl ndelay + ldr r0, [r4, #2048] + and r0, r0, #1 + pop {r4, pc} +.L395: + .align 2 +.L394: + .word .LANCHOR0 + .fnend + .size SandiskProgTestBadBlock, .-SandiskProgTestBadBlock + .align 2 + .global SandiskSetRRPara + .syntax unified + .arm + .fpu softvfp + .type SandiskSetRRPara, %function +SandiskSetRRPara: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + mov r3, #239 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + str r3, [r0, #8] + mov r3, #17 + mov r5, r0 + mov r4, r1 + str r3, [r0, #4] + mov r0, #200 + bl ndelay + ldr r1, .L403 + add r4, r4, r4, lsl #2 + ldr r0, .L403+4 + mov r2, #0 + ldr ip, .L403+8 + sub lr, r1, #45 +.L397: + ldrb r3, [r0] @ zero_extendqisi2 + cmp r2, r3 + bcc .L400 + mov r0, #0 + pop {r4, r5, r6, lr} + b NandcWaitFlashReady +.L400: + ldrb r3, [ip] @ zero_extendqisi2 + cmp r3, #67 + add r3, r2, r4 + addeq r3, lr, r3 + addne r3, r1, r3 + ldrsb r3, [r3, #5] + add r2, r2, #1 + str r3, [r5] + b .L397 +.L404: + .align 2 +.L403: + .word .LANCHOR1+301 + .word g_maxRegNum + .word g_retryMode + .fnend + .size SandiskSetRRPara, .-SandiskSetRRPara + .align 2 + .global micron_auto_read_calibration_config + .syntax unified + .arm + .fpu softvfp + .type micron_auto_read_calibration_config, %function +micron_auto_read_calibration_config: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + mov r5, r0 + mov r6, r1 + bl NandcWaitFlashReady + ldr r0, .L407 + ldr r4, [r0, r5, lsl #3] + add r0, r0, r5, lsl #3 + ldrb r3, [r0, #4] @ zero_extendqisi2 + mov r0, #200 + add r4, r4, r3, lsl #8 + mov r3, #239 + str r3, [r4, #2056] + mov r3, #150 + str r3, [r4, #2052] + bl ndelay + mov r3, #0 + str r6, [r4, #2048] + str r3, [r4, #2048] + str r3, [r4, #2048] + str r3, [r4, #2048] + pop {r4, r5, r6, pc} +.L408: + .align 2 +.L407: + .word .LANCHOR0 + .fnend + .size micron_auto_read_calibration_config, .-micron_auto_read_calibration_config + .align 2 + .global FlashEraseSLc2KBlocks + .syntax unified + .arm + .fpu softvfp + .type FlashEraseSLc2KBlocks, %function +FlashEraseSLc2KBlocks: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + .pad #16 + mov r5, #0 + ldr r8, .L420 + mov r6, r0 + mov r9, r1 + mov r7, r5 + ldr r10, .L420+4 +.L410: + cmp r7, r9 + bne .L415 + mov r0, #0 + add sp, sp, #16 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L415: + sub r3, r9, r7 + add r2, sp, #8 + uxtb r3, r3 + mov r1, #0 + add r0, r6, r5 + str r3, [sp] + add r3, sp, #12 + bl LogAddr2PhyAddr + ldrb r2, [r8, #3156] @ zero_extendqisi2 + ldr r3, [sp, #12] + cmp r2, r3 + mvnls r3, #0 + strls r3, [r6, r5] + bls .L412 + add r2, r8, r3 + add r3, r8, r3, lsl #4 + ldrb r4, [r2, #3160] @ zero_extendqisi2 + strb r4, [r3, #3200] + mov r0, r4 + bl NandcWaitFlashReady + mov r0, r4 + bl NandcFlashCs + mov r2, #0 + ldr r1, [sp, #8] + mov r0, r4 + bl FlashEraseCmd + mov r0, r4 + bl NandcWaitFlashReady + mov r0, r4 + ldr r1, [sp, #8] + bl FlashReadStatus + sbfx r0, r0, #0, #1 + ldr r1, [sp, #8] + str r0, [r6, r5] + mov r2, #0 + ldr r3, [r8, #40] + mov r0, r4 + add r1, r1, r3 + bl FlashEraseCmd + mov r0, r4 + bl NandcWaitFlashReady + mov r0, r4 + ldr r1, [sp, #8] + bl FlashReadStatus + tst r0, #1 + mvnne r3, #0 + strne r3, [r6, r5] + ldr r3, [r6, r5] + cmn r3, #1 + bne .L414 + ldr r1, [sp, #8] + mov r0, r10 + bl rk_printk +.L414: + mov r0, r4 + bl NandcFlashDeCs +.L412: + add r7, r7, #1 + add r5, r5, #36 + b .L410 +.L421: + .align 2 +.L420: + .word .LANCHOR0 + .word .LC1 + .fnend + .size FlashEraseSLc2KBlocks, .-FlashEraseSLc2KBlocks + .align 2 + .global FlashEraseBlocks + .syntax unified + .arm + .fpu softvfp + .type FlashEraseBlocks, %function +FlashEraseBlocks: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r8, r2 + ldr r4, .L455 + .pad #20 + sub sp, sp, #20 + ldrb r5, [r4, #36] @ zero_extendqisi2 + cmp r5, #0 + moveq r9, r0 + moveq r10, r1 + beq .L424 + mov r1, r2 + bl FlashEraseSLc2KBlocks +.L422: + add sp, sp, #20 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L433: + mov r3, #36 + add r2, sp, #8 + mul r6, r3, r5 + sub r3, r8, r5 + uxtb r3, r3 + mov r1, #0 + str r3, [sp] + add r3, sp, #12 + add fp, r9, r6 + mov r0, fp + bl LogAddr2PhyAddr + ldrb r3, [r4, #3156] @ zero_extendqisi2 + mov r7, r0 + ldr r0, [sp, #12] + cmp r3, r0 + mvnls r3, #0 + strls r3, [r9, r6] + bls .L427 + ldr r3, .L455+4 + ldrb r3, [r3, #-1870] @ zero_extendqisi2 + cmp r3, #0 + add r3, r4, r0, lsl #4 + moveq r7, #0 + ldr r3, [r3, #3208] + cmp r3, #0 + beq .L429 + uxtb r0, r0 + bl FlashWaitCmdDone +.L429: + ldr r2, [sp, #12] + cmp r7, #0 + addne r6, r6, #36 + mov r0, #0 + addne r6, r9, r6 + lsl r3, r2, #4 + add r2, r4, r2 + add r1, r4, r3 + add r3, r4, r3 + str r0, [r1, #3212] + ldr r0, [sp, #8] + strne r6, [r1, #3212] + ldrb r6, [r2, #3160] @ zero_extendqisi2 + str r0, [r1, #3204] + str fp, [r1, #3208] + mov r0, r6 + strb r6, [r3, #3200] + bl NandcFlashCs + cmp r10, #1 + mov r0, r6 + bne .L431 + ldr r3, .L455+4 + ldrb r3, [r3, #-2740] @ zero_extendqisi2 + cmp r3, #0 + beq .L431 + bl flash_enter_slc_mode +.L432: + ldr r3, [sp, #12] + mov r0, r6 + ldr r1, [sp, #8] + add r5, r5, r7 + add r3, r4, r3, lsl #2 + ldr r2, [r3, #3168] + adds r2, r2, #0 + movne r2, #1 + bl FlashWaitReadyEN + mov r2, r7 + ldr r1, [sp, #8] + mov r0, r6 + bl FlashEraseCmd + mov r0, r6 + bl NandcFlashDeCs +.L427: + add r5, r5, #1 +.L424: + cmp r5, r8 + bcc .L433 + ldr r6, .L455+4 + mov r5, #0 + ldr r7, .L455+8 +.L434: + ldrb r3, [r4, #3156] @ zero_extendqisi2 + cmp r5, r3 + bcc .L436 + ldr r3, .L455+4 + ldr r3, [r3, #-1868] + cmp r3, #0 + bne .L437 +.L438: + mov r0, #0 + b .L422 +.L431: + bl flash_exit_slc_mode + b .L432 +.L436: + uxtb r0, r5 + bl FlashWaitCmdDone + cmp r10, #1 + bne .L435 + ldrb r3, [r6, #-2740] @ zero_extendqisi2 + cmp r3, #0 + beq .L435 + ldrb r0, [r7, r5, lsl #4] @ zero_extendqisi2 + bl flash_exit_slc_mode +.L435: + add r5, r5, #1 + b .L434 +.L437: + ldr r3, .L455+12 + ldrb r3, [r3] @ zero_extendqisi2 + cmp r3, #69 + moveq r3, #0 + moveq r2, #36 + moveq r1, r3 + bne .L438 +.L439: + cmp r3, r8 + beq .L438 + mul r0, r2, r3 + add r3, r3, #1 + str r1, [r9, r0] + b .L439 +.L456: + .align 2 +.L455: + .word .LANCHOR0 + .word .LANCHOR2 + .word .LANCHOR0+3200 + .word IDByte + .fnend + .size FlashEraseBlocks, .-FlashEraseBlocks + .align 2 + .global HynixGetReadRetryDefault + .syntax unified + .arm + .fpu softvfp + .type HynixGetReadRetryDefault, %function +HynixGetReadRetryDefault: + .fnstart + @ args = 0, pretend = 0, frame = 48 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L574 + mvn r2, #83 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r4, r0 + cmp r4, #2 + mvn r1, #81 + .pad #52 + sub sp, sp, #52 + strb r0, [r3, #-2728] + mvn r0, #82 + strb r2, [r3, #-2724] + mvn r2, #80 + strb r0, [r3, #-2723] + strb r1, [r3, #-2722] + strb r2, [r3, #-2721] + bne .L458 + mvn r2, #88 + mov r5, #7 + strb r2, [r3, #-2724] + mvn r2, #8 + ldr r3, .L574+4 + strb r2, [r3, #3397] +.L523: + mov r6, #4 + b .L459 +.L458: + cmp r4, #3 + bne .L460 + mvn r2, #79 + strb r2, [r3, #-2724] + mvn r2, #78 + strb r2, [r3, #-2723] + mvn r2, #77 + strb r2, [r3, #-2722] + mvn r2, #76 + strb r2, [r3, #-2721] + mvn r2, #75 + strb r2, [r3, #-2720] + mvn r2, #74 + strb r2, [r3, #-2719] + mvn r2, #73 + strb r2, [r3, #-2718] + mvn r2, #72 +.L568: + mov r5, #8 + strb r2, [r3, #-2717] + mov r6, r5 +.L459: + sub r3, r4, #1 + cmp r3, #1 + movls r9, #0 + ldrls r10, .L574+8 + bls .L466 + sub r3, r4, #3 + cmp r3, #5 + bhi .L473 + smulbb r3, r6, r5 + asr r2, r3, #1 + lsl r3, r3, #4 + str r3, [sp, #44] + lsl r3, r2, #2 + str r2, [sp, #4] + str r3, [sp, #36] + lsl r3, r2, #1 + str r3, [sp, #24] + mov r3, #0 +.L573: + str r3, [sp, #20] + ldrb r3, [sp, #20] @ zero_extendqisi2 + str r3, [sp, #8] + ldr r3, .L574+12 + ldr r2, [sp, #8] + ldrb r3, [r3, #3156] @ zero_extendqisi2 + cmp r3, r2 + bls .L473 + ldr r2, [sp, #8] + ldr r3, .L574+12 + add r3, r3, r2 + ldrb r9, [r3, #3160] @ zero_extendqisi2 + ldr r3, .L574+12 + mov r0, r9 + ldr fp, [r3, r9, lsl #3] + add r3, r3, r9, lsl #3 + ldrb r10, [r3, #4] @ zero_extendqisi2 + mov r3, #255 + add r7, fp, r10, lsl #8 + str r3, [r7, #2056] + bl NandcWaitFlashReady + cmp r4, #7 + bne .L475 + ldr r3, .L574+16 + mov r0, #160 + mla r0, r0, r9, r3 + add r3, r0, #20 +.L569: + str r3, [sp, #16] + cmp r4, #4 + add r3, fp, r10, lsl #8 + mov r2, #54 + str r2, [r3, #2056] + bne .L478 + mov r2, #255 + str r2, [r3, #2052] + mov r2, #64 + str r2, [r3, #2048] + mov r2, #204 +.L570: + str r2, [r3, #2052] + mov r2, #77 + b .L571 +.L460: + cmp r4, #4 + bne .L461 + mvn ip, #51 + strb r0, [r3, #-2719] + strb ip, [r3, #-2724] + mvn ip, #64 + strb ip, [r3, #-2723] + mvn ip, #85 + strb ip, [r3, #-2722] + mvn ip, #84 + strb ip, [r3, #-2721] + mvn ip, #50 + strb ip, [r3, #-2720] + strb r1, [r3, #-2718] + b .L568 +.L461: + cmp r4, #5 + bne .L462 + mov r2, #56 + mov r5, #8 + strb r2, [r3, #-2724] + mov r2, #57 + strb r2, [r3, #-2723] + mov r2, #58 + strb r2, [r3, #-2722] + mov r2, #59 + strb r2, [r3, #-2721] + b .L523 +.L462: + cmp r4, #6 + bne .L463 + mov r2, #14 + mov r5, #12 + strb r2, [r3, #-2724] + mov r2, #15 + strb r2, [r3, #-2723] + mov r2, #16 + strb r2, [r3, #-2722] + mov r2, #17 + strb r2, [r3, #-2721] + b .L523 +.L463: + cmp r4, #7 + bne .L464 + mvn r2, #79 + mov r5, #12 + strb r2, [r3, #-2724] + mvn r2, #78 + strb r2, [r3, #-2723] + mvn r2, #77 + strb r2, [r3, #-2722] + mvn r2, #76 + strb r2, [r3, #-2721] + mvn r2, #75 + strb r2, [r3, #-2720] + mvn r2, #74 + strb r2, [r3, #-2719] + mvn r2, #73 + strb r2, [r3, #-2718] + mvn r2, #72 + strb r2, [r3, #-2717] + mvn r2, #43 + strb r2, [r3, #-2716] + mvn r2, #42 + strb r2, [r3, #-2715] + mov r6, #10 + b .L459 +.L464: + cmp r4, #8 + mov r5, #7 + bne .L523 + mov r2, #6 + strb r5, [r3, #-2723] + strb r2, [r3, #-2724] + mov r2, #9 + strb r2, [r3, #-2721] + mov r2, #10 + strb r4, [r3, #-2722] + mov r5, #50 + strb r2, [r3, #-2720] + mov r6, #5 + b .L459 +.L472: + add r2, r3, r2 + ldr r4, .L574+8 + ldrb r2, [r2, #3160] @ zero_extendqisi2 + mov r7, #0 + mov fp, #55 + ldr r8, [r3, r2, lsl #3] + add r3, r3, r2, lsl #3 + add r4, r4, r2, lsl #6 + ldrb r3, [r3, #4] @ zero_extendqisi2 + add r4, r4, #20 + add r8, r8, r3, lsl #8 +.L467: + add r3, r10, r7 + str fp, [r8, #2056] + ldrb r3, [r3, #4] @ zero_extendqisi2 + mov r0, #80 + str r3, [r8, #2052] + bl ndelay + ldr r3, [r8, #2048] + strb r3, [r4, r7] + add r7, r7, #1 + uxtb r3, r7 + cmp r6, r3 + bhi .L467 + ldr lr, .L574+20 + mov r1, r4 + mov r2, #0 +.L470: + mov r3, #1 + add ip, lr, r2 +.L469: + ldrb r0, [ip, r3, lsl #2] @ zero_extendqisi2 + ldrb r7, [r1] @ zero_extendqisi2 + add r0, r0, r7 + strb r0, [r1, r3, lsl #3] + add r3, r3, #1 + cmp r3, #7 + bne .L469 + add r2, r2, #1 + add r1, r1, #1 + cmp r2, #4 + bne .L470 + add r9, r9, #1 + mov r3, #0 + strb r3, [r4, #16] + strb r3, [r4, #24] + strb r3, [r4, #32] + strb r3, [r4, #40] + strb r3, [r4, #48] + strb r3, [r4, #41] + strb r3, [r4, #49] +.L466: + ldr r3, .L574+12 + uxtb r2, r9 + ldrb r1, [r3, #3156] @ zero_extendqisi2 + cmp r1, r2 + bhi .L472 +.L473: + ldr r3, .L574 + strb r6, [r3, #-2727] + strb r5, [r3, #-2726] + add sp, sp, #52 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L475: + cmp r4, #8 + beq .L477 + ldr r3, .L574+16 + add r0, r3, r9, lsl #6 + add r3, r0, #12 + b .L569 +.L478: + sub r2, r4, #5 + cmp r2, #1 + bhi .L480 + ldr r2, .L574 + ldrb r2, [r2, #-2724] @ zero_extendqisi2 + str r2, [r3, #2052] + mov r2, #82 +.L571: + str r2, [r3, #2048] +.L479: + add r3, fp, r10, lsl #8 + mov r2, #22 + cmp r4, #6 + str r2, [r3, #2056] + mov r2, #23 + str r2, [r3, #2056] + mov r2, #4 + str r2, [r3, #2056] + mov r2, #25 + str r2, [r3, #2056] + mov r2, #0 + str r2, [r3, #2056] + str r2, [r3, #2052] + str r2, [r3, #2052] + moveq r2, #31 + str r2, [r3, #2052] + mov r2, #2 + str r2, [r3, #2052] + mov r2, #0 + str r2, [r3, #2052] +.L522: + add r3, fp, r10, lsl #8 + mov r2, #48 + mov r0, r9 + str r2, [r3, #2056] + bl NandcWaitFlashReady + sub r3, r4, #5 + cmp r4, #8 + cmpne r3, #1 + str r3, [sp, #40] + movls r2, #16 + bls .L483 + cmp r4, #7 + moveq r2, #32 + movne r2, #2 +.L483: + ldr r3, .L574 + sub r2, r2, #1 + add ip, fp, r10, lsl #8 + ldr r3, [r3, #-1864] + str ip, [sp] + sub r1, r3, #1 + uxtab r2, r3, r2 + mov r0, r1 +.L484: + ldr ip, [sp] + ldr ip, [ip, #2048] + strb ip, [r0, #1]! + cmp r2, r0 + bne .L484 + cmp r4, #8 + bne .L485 + mov r2, #0 +.L487: + ldrb r0, [r3, r2, lsl #2] @ zero_extendqisi2 + uxtb r1, r2 + cmp r0, #50 + beq .L486 + add r0, r3, r2, lsl #2 + ldrb r0, [r0, #1] @ zero_extendqisi2 + cmp r0, #5 + beq .L486 + add r2, r2, #1 + cmp r2, #8 + bne .L487 +.L488: + mov r1, #0 + ldr r0, .L574+24 + bl rk_printk +.L490: + b .L490 +.L480: + cmp r4, #7 + bne .L479 + mov r2, #174 + str r2, [r3, #2052] + mov r2, #0 + str r2, [r3, #2048] + mov r2, #176 + b .L570 +.L486: + cmp r1, #6 + bhi .L488 +.L489: + ldr r1, .L574 + ldr r2, [r1, #-1864] + mov r3, r2 +.L499: + ldr ip, [sp, #44] + sub r0, r3, r2 + cmp r0, ip + blt .L500 + ldr r3, [sp, #24] + ldr r1, [r1, #-1864] + add r0, r1, r3 + mov r3, #8 +.L502: + mov lr, r0 + mov ip, #0 +.L501: + ldrh r7, [lr] + add ip, ip, #1 + mvn r7, r7 + strh r7, [lr], #2 @ movhi + ldr r7, [sp, #4] + cmp r7, ip + bgt .L501 + ldr ip, [sp, #36] + subs r3, r3, #1 + add r0, r0, ip + bne .L502 + str r3, [sp, #12] +.L508: + mov ip, #0 + mov r0, ip +.L507: + mov lr, #1 + mov r7, #0 + lsl lr, lr, r0 + mov r3, #16 + str r3, [sp, #32] + str lr, [sp, #28] + mov lr, r1 +.L505: + ldrh r8, [lr] + mov r3, r8 + ldr r8, [sp, #28] + bics r3, r8, r3 + ldr r3, [sp, #24] + addeq r7, r7, #1 + add lr, lr, r3 + ldr r3, [sp, #32] + subs r3, r3, #1 + str r3, [sp, #32] + bne .L505 + cmp r7, #8 + add r0, r0, #1 + ldrhi r3, [sp, #28] + orrhi ip, ip, r3 + uxthhi ip, ip + cmp r0, #16 + bne .L507 + ldr r3, [sp, #12] + strh ip, [r1], #2 @ movhi + add r3, r3, #1 + str r3, [sp, #12] + ldr r0, [sp, #12] + ldr r3, [sp, #4] + cmp r3, r0 + bgt .L508 + ldr r3, .L574 + ldr r1, [r3, #-1864] + mov r3, #0 + sub r0, r1, #4 + add ip, r1, #28 +.L511: + ldr lr, [r0, #4]! + cmp lr, #0 + addeq r3, r3, #1 + cmp ip, r0 + bne .L511 + cmp r3, #7 + ble .L512 + ldr r0, .L574+28 + mov r3, #1024 + mov r2, #1 + bl rknand_print_hex + mov r1, #0 + ldr r0, .L574+24 + bl rk_printk +.L513: + b .L513 +.L485: + cmp r4, #7 + bne .L491 + mov r2, #0 +.L493: + ldrb r0, [r3, r2, lsl #2] @ zero_extendqisi2 + uxtb r1, r2 + cmp r0, #12 + beq .L492 + add r0, r3, r2, lsl #2 + ldrb r0, [r0, #1] @ zero_extendqisi2 + cmp r0, #10 + beq .L492 + add r2, r2, #1 + cmp r2, #8 + bne .L493 +.L494: + mov r1, #0 + ldr r0, .L574+24 + bl rk_printk +.L495: + b .L495 +.L492: + cmp r1, #6 + bls .L489 + b .L494 +.L491: + cmp r4, #6 + bne .L489 + add r3, r3, #7 +.L496: + ldrb r2, [r1, #1]! @ zero_extendqisi2 + cmp r2, #12 + beq .L489 + ldrb r2, [r1, #8] @ zero_extendqisi2 + cmp r2, #4 + beq .L489 + cmp r3, r1 + bne .L496 + mov r1, #0 + ldr r0, .L574+24 + bl rk_printk +.L498: + b .L498 +.L500: + ldr r0, [sp] + ldr r0, [r0, #2048] + strb r0, [r3], #1 + b .L499 +.L512: + cmp r4, #6 + moveq ip, #4 + beq .L514 + cmp r4, #7 + moveq ip, #10 + beq .L514 + cmp r4, #8 + moveq ip, #5 + movne ip, #8 +.L514: + sub r3, r6, #1 + ldr r0, [sp, #16] + uxtb r3, r3 + mov lr, #0 + add r3, r3, #1 +.L515: + mov r8, r0 + mov r1, r2 +.L516: + ldrb r7, [r1], #1 @ zero_extendqisi2 + strb r7, [r8], #1 + sub r7, r1, r2 + uxtb r7, r7 + cmp r6, r7 + bhi .L516 + add lr, lr, #1 + add r2, r2, r3 + cmp r5, lr + add r0, r0, ip + bgt .L515 + add r10, fp, r10, lsl #8 + mov r3, #255 + mov r0, r9 + str r3, [r10, #2056] + bl NandcWaitFlashReady + ldr r3, [sp, #40] + cmp r3, #1 + bhi .L518 + mov r3, #54 + ldr r2, [sp] + str r3, [r10, #2056] + mvn r1, #0 + ldr r3, .L574 + ldr r0, [sp, #8] + ldrb r3, [r3, #-2724] @ zero_extendqisi2 + str r3, [r2, #2052] + mov r3, #0 + str r3, [r2, #2048] + mov r3, #22 + str r3, [r10, #2056] + bl FlashReadCmd +.L519: + mov r0, r9 + bl NandcWaitFlashReady + ldr r3, [sp, #20] + add r3, r3, #1 + b .L573 +.L518: + cmp r4, #8 + moveq r3, #190 + movne r3, #56 + str r3, [r10, #2056] + b .L519 +.L477: + mov r3, #120 + mov r2, #23 + str r3, [r7, #2056] + mov r3, #0 + str r3, [r7, #2052] + mov r1, #25 + str r3, [r7, #2052] + str r3, [r7, #2052] + str r2, [r7, #2056] + mov r2, #4 + str r2, [r7, #2056] + str r1, [r7, #2056] + mov r1, #218 + str r1, [r7, #2056] + mov r1, #21 + str r3, [r7, #2056] + str r3, [r7, #2052] + str r3, [r7, #2052] + str r1, [r7, #2052] + str r2, [r7, #2052] + str r3, [r7, #2052] + ldr r3, .L574+32 + str r3, [sp, #16] + b .L522 +.L575: + .align 2 +.L574: + .word .LANCHOR2 + .word .LANCHOR1 + .word .LANCHOR2-2728 + .word .LANCHOR0 + .word .LANCHOR2-2720 + .word .LANCHOR1+3380 + .word .LC2 + .word .LC3 + .word .LANCHOR2-2700 + .fnend + .size HynixGetReadRetryDefault, .-HynixGetReadRetryDefault + .align 2 + .global FlashGetReadRetryDefault + .syntax unified + .arm + .fpu softvfp + .type FlashGetReadRetryDefault, %function +FlashGetReadRetryDefault: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + subs r3, r0, #0 + bxeq lr + sub r2, r3, #1 + cmp r2, #7 + bhi .L578 + b HynixGetReadRetryDefault +.L578: + cmp r3, #49 + bne .L579 + ldr r0, .L590 + mov r2, #64 + ldr r1, .L590+4 + strb r3, [r0, #-2728] + mov r3, #4 + strb r3, [r0, #-2727] + mov r3, #15 + strb r3, [r0, #-2726] +.L588: + sub r0, r0, #2720 + sub r0, r0, #4 + b ftl_memcpy +.L579: + sub r2, r3, #65 + cmp r3, #33 + cmpne r2, #1 + bhi .L580 + ldr r0, .L590 + strb r3, [r0, #-2728] + mov r3, #4 +.L589: + strb r3, [r0, #-2727] + mov r3, #7 + strb r3, [r0, #-2726] + mov r2, #45 + ldr r1, .L590+8 + b .L588 +.L580: + cmp r3, #67 + cmpne r3, #34 + ldreq r0, .L590 + strbeq r3, [r0, #-2728] + moveq r3, #5 + beq .L589 +.L581: + cmp r3, #68 + cmpne r3, #35 + bxne lr + ldr r0, .L590 + mov r2, #95 + ldr r1, .L590+12 + strb r3, [r0, #-2728] + mov r3, #5 + strb r3, [r0, #-2727] + mov r3, #17 + strb r3, [r0, #-2726] + b .L588 +.L591: + .align 2 +.L590: + .word .LANCHOR2 + .word .LANCHOR1+404 + .word .LANCHOR1+256 + .word .LANCHOR1+301 + .fnend + .size FlashGetReadRetryDefault, .-FlashGetReadRetryDefault + .align 2 + .global FlashReadDpCmd + .syntax unified + .arm + .fpu softvfp + .type FlashReadDpCmd, %function +FlashReadDpCmd: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + mov r7, r0 + ldr r0, .L598 + mov r8, r1 + uxtb r10, r2 + lsr r9, r2, #8 + lsr r6, r2, #16 + uxtb lr, r8 + ldr r2, [r0, #48] + lsr ip, r8, #8 + add r1, r0, r7, lsl #3 + ldr r3, [r0, r7, lsl #3] + ldrb r4, [r1, #4] @ zero_extendqisi2 + ldrb r1, [r0, #68] @ zero_extendqisi2 + ldrb r2, [r2, #7] @ zero_extendqisi2 + cmp r1, #1 + lsl r4, r4, #8 + lsr r1, r8, #16 + bne .L593 + cmp r2, #1 + addeq r2, r3, r4 + moveq r5, #38 + add r4, r3, r4 + streq r5, [r2, #2056] + ldrb r3, [r0, #61] @ zero_extendqisi2 + mov r5, #0 + ldrb r2, [r0, #60] @ zero_extendqisi2 + mov r0, r7 + str r2, [r4, #2056] + str r5, [r4, #2052] + str r5, [r4, #2052] + str lr, [r4, #2052] + str ip, [r4, #2052] + str r1, [r4, #2052] + str r3, [r4, #2056] + bl NandcWaitFlashReady + mov r3, #48 + str r5, [r4, #2056] + str r5, [r4, #2052] + str r5, [r4, #2052] + str r10, [r4, #2052] + str r9, [r4, #2052] + str r6, [r4, #2052] + str r3, [r4, #2056] +.L595: + mov r1, r8 + mov r0, r7 + pop {r4, r5, r6, r7, r8, r9, r10, lr} + b FlashSetRandomizer +.L593: + cmp r2, #1 + addeq r2, r3, r4 + moveq r5, #38 + streq r5, [r2, #2056] + add r3, r3, r4 + ldrb r2, [r0, #60] @ zero_extendqisi2 + str r2, [r3, #2056] + ldrb r2, [r0, #61] @ zero_extendqisi2 + str lr, [r3, #2052] + str ip, [r3, #2052] + str r1, [r3, #2052] + str r2, [r3, #2056] + mov r2, #48 + str r10, [r3, #2052] + str r9, [r3, #2052] + str r6, [r3, #2052] + str r2, [r3, #2056] + b .L595 +.L599: + .align 2 +.L598: + .word .LANCHOR0 + .fnend + .size FlashReadDpCmd, .-FlashReadDpCmd + .align 2 + .global ftl_flash_de_init + .syntax unified + .arm + .fpu softvfp + .type ftl_flash_de_init, %function +ftl_flash_de_init: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, lr} + .save {r4, lr} + mov r0, #0 + ldr r4, .L611 + bl NandcWaitFlashReady + bl FlashSetReadRetryDefault + ldr r0, [r4, #-1860] + cmp r0, #0 + beq .L601 + mov r0, #0 + bl flash_enter_slc_mode +.L602: + ldrb r3, [r4, #-1856] @ zero_extendqisi2 + cmp r3, #0 + beq .L603 + ldrb r3, [r4, #-1871] @ zero_extendqisi2 + tst r3, #1 + beq .L603 + mov r0, #1 + bl FlashSetInterfaceMode + mov r0, #1 + bl NandcSetMode + mov r3, #0 + strb r3, [r4, #-1856] +.L603: + ldr r3, .L611+4 + mov r0, #0 + ldr r3, [r3] + str r0, [r3, #336] + pop {r4, pc} +.L601: + bl flash_exit_slc_mode + b .L602 +.L612: + .align 2 +.L611: + .word .LANCHOR2 + .word .LANCHOR0 + .fnend + .size ftl_flash_de_init, .-ftl_flash_de_init + .align 2 + .global NandcRandmzSel + .syntax unified + .arm + .fpu softvfp + .type NandcRandmzSel, %function +NandcRandmzSel: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L614 + ldr r3, [r3, r0, lsl #3] + str r1, [r3, #336] + bx lr +.L615: + .align 2 +.L614: + .word .LANCHOR0 + .fnend + .size NandcRandmzSel, .-NandcRandmzSel + .global __aeabi_idiv + .align 2 + .global NandcTimeCfg + .syntax unified + .arm + .fpu softvfp + .type NandcTimeCfg, %function +NandcTimeCfg: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, lr} + .save {r4, lr} + mov r4, r0 + mov r0, #0 + bl rknand_get_clk_rate + ldr r1, .L627 + bl __aeabi_idiv + ldr r3, .L627+4 + cmp r0, #250 + movwgt r2, #8354 + ldr r3, [r3, #-2804] + bgt .L625 + cmp r0, #220 + ble .L619 +.L626: + movw r2, #8322 + b .L625 +.L619: + cmp r0, #185 + movwgt r2, #4226 + bgt .L625 + cmp r0, #160 + movwgt r2, #4194 + bgt .L625 + cmp r4, #35 + movwls r2, #4193 + bls .L625 + cmp r4, #99 + movwls r2, #4225 + bhi .L626 +.L625: + str r2, [r3, #4] + pop {r4, pc} +.L628: + .align 2 +.L627: + .word 1000000 + .word .LANCHOR2 + .fnend + .size NandcTimeCfg, .-NandcTimeCfg + .align 2 + .global FlashTimingCfg + .syntax unified + .arm + .fpu softvfp + .type FlashTimingCfg, %function +FlashTimingCfg: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + sub r3, r0, #4160 + sub r3, r3, #33 + bic r3, r3, #32 + cmp r3, #1 + bls .L630 + movw r3, #8322 + cmp r0, r3 + bne .L631 +.L630: + ldr r3, .L632 + ldr r3, [r3, #-2804] + str r0, [r3, #4] +.L631: + ldr r3, .L632+4 + ldrb r0, [r3, #489] @ zero_extendqisi2 + b NandcTimeCfg +.L633: + .align 2 +.L632: + .word .LANCHOR2 + .word .LANCHOR1 + .fnend + .size FlashTimingCfg, .-FlashTimingCfg + .align 2 + .global NandcInit + .syntax unified + .arm + .fpu softvfp + .type NandcInit, %function +NandcInit: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L637 + mov r1, #1 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + mov r2, #0 + ldr r4, .L637+4 + mov r5, #0 + str r1, [r3, #12] + mov r1, #2 + str r1, [r3, #20] + mov r1, #3 + stm r3, {r0, r2} + str r0, [r4, #-2804] + str r0, [r3, #8] + str r0, [r3, #16] + str r1, [r3, #28] + str r0, [r3, #24] + ldr r3, [r0] + and r3, r3, #253952 + ubfx r1, r3, #13, #1 + bfi r3, r2, #13, #1 + ldr r2, [r0, #352] + orr r3, r3, #256 + str r1, [r4, #-1852] + movw r1, #2049 + ubfx r2, r2, #16, #4 + str r2, [r4, #-1848] + ldr r2, [r0, #352] + cmp r2, r1 + str r2, [r4, #-1844] + moveq r2, #8 + streq r2, [r4, #-1848] + str r3, [r0] + mov r0, #40 + ldr r3, [r4, #-2804] + str r5, [r3, #336] + bl NandcTimeCfg + ldr r3, [r4, #-2804] + movw r2, #8322 + mov r0, #36864 + str r2, [r3, #344] + ldr r2, .L637+8 + str r2, [r3, #304] + bl ftl_dma32_malloc + str r0, [r4, #-1840] + str r0, [r4, #-1836] + add r0, r0, #32768 + str r0, [r4, #-1832] + str r5, [r4, #-1812] + str r5, [r4, #-1804] + pop {r4, r5, r6, pc} +.L638: + .align 2 +.L637: + .word .LANCHOR0 + .word .LANCHOR2 + .word 1579009 + .fnend + .size NandcInit, .-NandcInit + .align 2 + .global NandcGetTimeCfg + .syntax unified + .arm + .fpu softvfp + .type NandcGetTimeCfg, %function +NandcGetTimeCfg: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr ip, .L641 + str lr, [sp, #-4]! + .save {lr} + ldr lr, [ip, #-2804] + ldr lr, [lr, #4] + str lr, [r0] + ldr r0, [ip, #-2804] + ldr r0, [r0] + str r0, [r1] + ldr r1, [ip, #-2804] + ldr r1, [r1, #304] + str r1, [r2] + ldr r1, [ip, #-2804] + ldr r2, [r1, #308] + ldr r1, [r1, #344] + uxtb r2, r2 + orr r2, r2, r1, lsl #16 + str r2, [r3] + ldr pc, [sp], #4 +.L642: + .align 2 +.L641: + .word .LANCHOR2 + .fnend + .size NandcGetTimeCfg, .-NandcGetTimeCfg + .align 2 + .global NandcBchSel + .syntax unified + .arm + .fpu softvfp + .type NandcBchSel, %function +NandcBchSel: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L651 + mov ip, #1 + mov r1, #0 + ldr r2, [r3, #-2804] + str r0, [r3, #-1800] + mov r3, r1 + str ip, [r2, #8] + mov ip, #16 + cmp r0, ip + bfi r3, ip, #8, #8 + bfi r3, r1, #18, #1 + bne .L644 +.L647: + bfc r3, #4, #1 +.L645: + orr r3, r3, #1 + str r3, [r2, #12] + bx lr +.L644: + cmp r0, #24 + orreq r3, r3, #16 + beq .L645 + cmp r0, #40 + orr r3, r3, #262144 + orr r3, r3, #16 + bne .L645 + b .L647 +.L652: + .align 2 +.L651: + .word .LANCHOR2 + .fnend + .size NandcBchSel, .-NandcBchSel + .align 2 + .global FlashBchSel + .syntax unified + .arm + .fpu softvfp + .type FlashBchSel, %function +FlashBchSel: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L654 + strb r0, [r3, #-2739] + b NandcBchSel +.L655: + .align 2 +.L654: + .word .LANCHOR2 + .fnend + .size FlashBchSel, .-FlashBchSel + .align 2 + .global ftl_flash_resume + .syntax unified + .arm + .fpu softvfp + .type ftl_flash_resume, %function +ftl_flash_resume: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L665 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + mov r5, #0 + ldr r6, .L665+4 + mov r4, r3 + ldr r2, [r3, #-2804] + ldr r1, [r3, #-2800] + str r1, [r2] + ldr r1, [r3, #-2796] + ldr r2, [r3, #-2804] + str r1, [r2, #4] + ldr r1, [r3, #-2792] + str r1, [r2, #8] + ldr r1, [r3, #-2788] + str r1, [r2, #12] + ldr r1, [r3, #-2784] + str r1, [r2, #304] + ldr r1, [r3, #-2780] + str r1, [r2, #308] + ldr r1, [r3, #-2776] + str r1, [r2, #336] + ldr r1, [r3, #-2772] + str r1, [r2, #344] +.L658: + ldrb r3, [r6, r5, lsl #3] @ zero_extendqisi2 + sub r3, r3, #1 + uxtb r3, r3 + cmp r3, #253 + bhi .L657 + uxtb r0, r5 + bl FlashReset +.L657: + add r5, r5, #1 + cmp r5, #4 + bne .L658 + ldrb r3, [r4, #-1856] @ zero_extendqisi2 + cmp r3, #0 + beq .L659 + mov r0, #1 + bl NandcSetMode + ldrb r0, [r4, #-1871] @ zero_extendqisi2 + bl FlashSetInterfaceMode + ldrb r0, [r4, #-1871] @ zero_extendqisi2 + bl NandcSetMode + ldrb r0, [r4, #-2783] @ zero_extendqisi2 + bl NandcSetDdrPara +.L659: + ldr r3, .L665+8 + pop {r4, r5, r6, lr} + ldr r3, [r3, #48] + ldrb r0, [r3, #20] @ zero_extendqisi2 + b FlashBchSel +.L666: + .align 2 +.L665: + .word .LANCHOR2 + .word IDByte + .word .LANCHOR0 + .fnend + .size ftl_flash_resume, .-ftl_flash_resume + .align 2 + .global ftl_nandc_get_irq_status + .syntax unified + .arm + .fpu softvfp + .type ftl_nandc_get_irq_status, %function +ftl_nandc_get_irq_status: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r0, [r0, #372] + bx lr + .fnend + .size ftl_nandc_get_irq_status, .-ftl_nandc_get_irq_status + .align 2 + .global NandcIqrWaitFlashReady + .syntax unified + .arm + .fpu softvfp + .type NandcIqrWaitFlashReady, %function +NandcIqrWaitFlashReady: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + bx lr + .fnend + .size NandcIqrWaitFlashReady, .-NandcIqrWaitFlashReady + .align 2 + .global NandcSendDumpDataStart + .syntax unified + .arm + .fpu softvfp + .type NandcSendDumpDataStart, %function +NandcSendDumpDataStart: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r2, [r0, #16] + .pad #8 + sub sp, sp, #8 + ldr r3, .L671 + str r2, [sp, #4] + ldr r2, [sp, #4] + bfc r2, #2, #1 + str r2, [sp, #4] + ldr r2, [sp, #4] + str r2, [r0, #16] + str r3, [r0, #8] + orr r3, r3, #4 + str r3, [r0, #8] + add sp, sp, #8 + @ sp needed + bx lr +.L672: + .align 2 +.L671: + .word 538969130 + .fnend + .size NandcSendDumpDataStart, .-NandcSendDumpDataStart + .align 2 + .global NandcSendDumpDataDone + .syntax unified + .arm + .fpu softvfp + .type NandcSendDumpDataDone, %function +NandcSendDumpDataDone: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + .pad #8 + sub sp, sp, #8 +.L674: + ldr r3, [r0, #8] + str r3, [sp, #4] + ldr r3, [sp, #4] + tst r3, #1048576 + beq .L674 + add sp, sp, #8 + @ sp needed + bx lr + .fnend + .size NandcSendDumpDataDone, .-NandcSendDumpDataDone + .align 2 + .global NandcXferStart + .syntax unified + .arm + .fpu softvfp + .type NandcXferStart, %function +NandcXferStart: + .fnstart + @ args = 8, pretend = 0, frame = 16 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr ip, .L696 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r4, #0 + ldr r5, .L696+4 + .pad #20 + sub sp, sp, #20 + ldr r6, [ip, r0, lsl #3] + add ip, ip, r0, lsl #3 + ldr r8, [sp, #56] + ldrb r0, [ip, #4] @ zero_extendqisi2 + mov ip, #16 + ldr r7, [r6, #12] + bfi r7, ip, #8, #8 + bfi r7, r4, #3, #1 + bfi r4, r1, #1, #1 + bfi r7, r0, #5, #3 + orr r4, r4, #8 + mov r0, #1 + bfi r4, r0, #5, #2 + lsr r3, r3, r0 + orr r4, r4, #536870912 + orr r4, r4, #1024 + bfi r4, r3, #4, #1 + ldr r3, [r5, #-1848] + cmp r3, #3 + bls .L679 + ldr r3, [r6, #16] + str r3, [sp, #12] + ldr r3, [sp, #12] + bfc r3, #2, #1 + str r3, [sp, #12] + ldr r3, [sp, #60] + cmp r8, #0 + cmpeq r3, #0 + beq .L680 + cmp r1, #0 + bne .L681 +.L689: + add r2, r2, #1 + cmp r8, #0 + asr r2, r2, #1 + movne r0, r8 + bfi r4, r2, #22, #6 + ldreq r0, [r5, #-1836] +.L683: + ldr r3, [r5, #-1832] + ubfx r10, r4, #22, #5 + mov r9, r1 + mov r2, r1 + lsl r1, r10, #10 + str r0, [r5, #-1828] + str r3, [r5, #-1824] + bl rknand_dma_map_single + mov r2, r9 + str r0, [r5, #-1820] + lsl r1, r10, #7 + ldr r0, [r5, #-1824] + bl rknand_dma_map_single + mov r3, #1 + str r0, [r5, #-1816] + str r3, [r5, #-1812] + mov r2, #16 + ldr r3, [r5, #-1820] + tst r8, #3 + clz r1, r9 + lsr r1, r1, #5 + str r3, [r6, #20] + ldr r3, [r5, #-1816] + str r3, [r6, #24] + mov r3, #0 + str r3, [sp, #12] + ldr r3, [sp, #12] + bfi r3, r2, #9, #5 + moveq r2, #2 + str r3, [sp, #12] + ldr r3, [sp, #12] + orr r3, r3, #448 + str r3, [sp, #12] + ldreq r3, [sp, #12] + bfieq r3, r2, #3, #3 + streq r3, [sp, #12] + ldr r3, [sp, #12] + orr r3, r3, #4 + str r3, [sp, #12] + ldr r3, [sp, #12] + bfi r3, r1, #1, #1 + str r3, [sp, #12] + ldr r3, [sp, #12] + orr r3, r3, #1 + str r3, [sp, #12] +.L680: + ldr r3, [sp, #12] + str r3, [r6, #16] +.L679: + str r7, [r6, #12] + str r4, [r6, #8] + orr r4, r4, #4 + str r4, [r6, #8] + add sp, sp, #20 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L681: + ldr r3, [r5, #-1800] + lsr r10, r2, #1 + ldr ip, [sp, #60] + cmp r3, #25 + movcc r3, #64 + movcs r3, #128 + str r3, [sp, #4] + mov r3, #0 + mov r0, r3 +.L685: + cmp r0, r10 + bcs .L689 + ldr lr, [sp, #60] + add r0, r0, #1 + cmp lr, #0 + bic lr, r3, #3 + ldrne fp, [ip], #4 @ unaligned + mvneq r9, #0 + ldrne r9, [r5, #-1832] + ldreq fp, [r5, #-1832] + strne fp, [r9, lr] + streq r9, [fp, lr] + ldr lr, [sp, #4] + add r3, r3, lr + b .L685 +.L697: + .align 2 +.L696: + .word .LANCHOR0 + .word .LANCHOR2 + .fnend + .size NandcXferStart, .-NandcXferStart + .align 2 + .global NandcXferComp + .syntax unified + .arm + .fpu softvfp + .type NandcXferComp, %function +NandcXferComp: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + .pad #8 + ldr r3, .L738 + ldr r5, .L738+4 + ldr r4, [r3, r0, lsl #3] + ldr r3, [r5, #-1848] + cmp r3, #3 + bls .L729 + ldr r3, [r4, #16] + tst r3, #4 + beq .L729 + ldr r6, [r4, #16] + ldr r3, [r4, #8] + ubfx r6, r6, #1, #1 + cmp r6, #0 + str r3, [sp] + beq .L700 + ldr r7, .L738+8 + mov r6, #0 + ldr r8, .L738+12 +.L701: + ldr r2, [r4, #28] + ldr r3, [sp] + ubfx r2, r2, #16, #5 + ubfx r3, r3, #22, #6 + cmp r2, r3 + bge .L709 + ldr r3, [r5, #-1848] + cmp r3, #5 + bhi .L702 +.L705: + add r6, r6, #1 + bics r3, r6, #-16777216 + bne .L704 + ldr r2, [r4, #28] + mov r1, r6 + ldr r3, [sp] + mov r0, r7 + ubfx r2, r2, #16, #5 + ubfx r3, r3, #22, #6 + bl rk_printk + mov r3, #512 + mov r2, #4 + mov r1, r4 + mov r0, r8 + bl rknand_print_hex +.L704: + mov r1, #5 + mov r0, #1 + bl rk_usleep_range + b .L701 +.L702: + ldr r3, [r4] + str r3, [sp, #4] + ldr r3, [sp, #4] + tst r3, #8192 + beq .L705 + ldr r3, [sp, #4] + tst r3, #131072 + beq .L705 +.L709: + ldr r3, [r5, #-1812] + cmp r3, #0 + beq .L710 + ldr r1, [sp] + mov r2, #0 + ldr r0, [r5, #-1820] + ubfx r1, r1, #22, #5 + lsl r1, r1, #10 + bl rknand_dma_unmap_single + ldr r1, [sp] + mov r2, #0 + ldr r0, [r5, #-1816] + ubfx r1, r1, #22, #5 + lsl r1, r1, #7 + bl rknand_dma_unmap_single +.L710: + mov r3, #0 + str r3, [r5, #-1812] +.L698: + add sp, sp, #8 + @ sp needed + pop {r4, r5, r6, r7, r8, pc} +.L700: + ldr r7, .L738+16 + ldr r8, .L738+12 +.L711: + ldr r3, [sp] + tst r3, #1048576 + beq .L713 + ldr r3, [r5, #-1804] + cmp r3, #0 + beq .L714 + mov r0, r4 + bl NandcSendDumpDataStart +.L714: + ldr r3, [r5, #-1812] + cmp r3, #0 + beq .L715 + ldr r1, [sp] + mov r2, #1 + ldr r0, [r5, #-1820] + ubfx r1, r1, #22, #5 + lsl r1, r1, #10 + bl rknand_dma_unmap_single + ldr r1, [sp] + mov r2, #1 + ldr r0, [r5, #-1816] + ubfx r1, r1, #22, #5 + lsl r1, r1, #7 + bl rknand_dma_unmap_single +.L715: + ldr r3, [r5, #-1804] + cmp r3, #0 + beq .L710 + mov r0, r4 + bl NandcSendDumpDataDone + b .L710 +.L713: + ldr r3, [r4, #8] + add r6, r6, #1 + str r3, [sp] + bics r3, r6, #-16777216 + bne .L712 + ldr r2, [sp] + mov r1, r6 + ldr r3, [r4, #28] + mov r0, r7 + ubfx r3, r3, #16, #5 + bl rk_printk + mov r3, #512 + mov r2, #4 + mov r1, r4 + mov r0, r8 + bl rknand_print_hex +.L712: + mov r1, #5 + mov r0, #1 + bl rk_usleep_range + b .L711 +.L729: + ldr r3, [r4, #8] + str r3, [sp] + ldr r3, [sp] + tst r3, #1048576 + beq .L729 + b .L698 +.L739: + .align 2 +.L738: + .word .LANCHOR0 + .word .LANCHOR2 + .word .LC4 + .word .LC5 + .word .LC6 + .fnend + .size NandcXferComp, .-NandcXferComp + .align 2 + .global NandcCopy1KB + .syntax unified + .arm + .fpu softvfp + .type NandcCopy1KB, %function +NandcCopy1KB: + .fnstart + @ args = 4, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + cmp r1, #1 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + mov r4, r2 + add r2, r0, #4096 + add r6, r0, #512 + add r0, r2, r4, lsl #9 + ldr r5, [sp, #16] + bne .L741 + cmp r3, #0 + beq .L742 + mov r2, #1024 + mov r1, r3 + bl ftl_memcpy +.L742: + cmp r5, #0 + lsrne r4, r4, #1 + ldrne r3, [r5] @ unaligned + addne r4, r4, r4, lsl #1 + strne r3, [r6, r4, lsl #4] + pop {r4, r5, r6, pc} +.L741: + cmp r3, #0 + beq .L745 + mov r1, r0 + mov r2, #1024 + mov r0, r3 + bl ftl_memcpy +.L745: + cmp r5, #0 + popeq {r4, r5, r6, pc} + lsr r4, r4, #1 + add r4, r4, r4, lsl #1 + ldr r3, [r6, r4, lsl #4] + strb r3, [r5] + lsr r2, r3, #8 + strb r2, [r5, #1] + lsr r2, r3, #16 + lsr r3, r3, #24 + strb r2, [r5, #2] + strb r3, [r5, #3] + pop {r4, r5, r6, pc} + .fnend + .size NandcCopy1KB, .-NandcCopy1KB + .align 2 + .global NandcXferData + .syntax unified + .arm + .fpu softvfp + .type NandcXferData, %function +NandcXferData: + .fnstart + @ args = 4, pretend = 0, frame = 80 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r8, r3 + ldr r3, .L797 + tst r8, #63 + .pad #92 + sub sp, sp, #92 + mov r7, r0 + mov r5, r1 + str r2, [sp, #8] + ldr r4, [sp, #128] + ldr r6, [r3, r0, lsl #3] + bne .L758 + cmp r4, #0 + bne .L759 + mov r2, #64 + mov r1, #255 + add r0, sp, #24 + bl ftl_memset + add r4, sp, #24 +.L759: + mov r3, #0 + ldr r2, [sp, #8] + mov r1, r5 + mov r0, r7 + str r4, [sp, #4] + str r8, [sp] + bl NandcXferStart + mov r1, r5 + mov r0, r7 + bl NandcXferComp + cmp r5, #0 + movne r9, #0 + bne .L760 + ldr r3, .L797+4 + mov r1, r5 + ldr r2, [r3, #-1800] + cmp r2, #25 + ldr r2, [sp, #8] + movcc lr, #64 + movcs lr, #128 + lsr r0, r2, #1 + mov r2, r5 +.L762: + cmp r1, r0 + add r4, r4, #4 + add ip, lr, r2 + bcc .L763 + ldr r2, [sp, #8] + ldr r0, [r3, #-1800] + ldr r1, [r3, #-1848] + lsr ip, r2, #2 + mov r2, #0 + mov r9, r2 +.L764: + cmp r2, ip + bcs .L760 + cmp r0, #0 + bne .L770 +.L760: + mov r3, #0 + str r3, [r6, #16] +.L771: + ldr r3, .L797+4 + ldr r3, [r3, #-1848] + cmp r3, #5 + movls r3, #0 + movhi r3, #1 + cmp r5, #0 + movne r3, #0 + cmp r3, #0 + beq .L757 + ldr r3, [r6] + and r2, r3, #139264 + cmp r2, #139264 + mvneq r9, #0 + orreq r3, r3, #131072 + streq r3, [r6] +.L757: + mov r0, r9 + add sp, sp, #92 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L763: + ldr r7, [r3, #-1832] + bic r2, r2, #3 + add r1, r1, #1 + ldr r2, [r7, r2] + strb r2, [r4, #-4] + lsr r7, r2, #8 + strb r7, [r4, #-3] + lsr r7, r2, #16 + lsr r2, r2, #24 + strb r7, [r4, #-2] + strb r2, [r4, #-1] + mov r2, ip + b .L762 +.L770: + add r3, r2, #8 + ldr r3, [r6, r3, lsl #2] + str r3, [sp, #20] + ldr r3, [sp, #20] + tst r3, #4 + bne .L786 + ldr r3, [sp, #20] + ubfx r3, r3, #15, #1 + cmp r3, #0 + bne .L786 + cmp r1, #5 + bls .L766 + ldr lr, [sp, #20] + ldr r7, [sp, #20] + ldr r3, [sp, #20] + ldr r4, [sp, #20] + ubfx lr, lr, #3, #5 + ubfx r7, r7, #27, #1 + ubfx r3, r3, #16, #5 + orr lr, lr, r7, lsl #5 + ubfx r4, r4, #29, #1 + orr r3, r3, r4, lsl #5 + cmp lr, r3 + ldr r3, [sp, #20] + ldrhi lr, [sp, #20] + ldrls lr, [sp, #20] + ubfxhi r3, r3, #3, #5 + ubfxls r3, r3, #16, #5 + ubfxhi lr, lr, #27, #1 + ubfxls lr, lr, #29, #1 +.L796: + orr r3, r3, lr, lsl #5 +.L768: + cmp r9, r3 + movcc r9, r3 +.L765: + add r2, r2, #1 + b .L764 +.L766: + cmp r1, #3 + bls .L768 + ldr lr, [sp, #20] + ldr r7, [sp, #20] + ldr r3, [sp, #20] + ldr r4, [sp, #20] + ubfx lr, lr, #3, #5 + ubfx r7, r7, #28, #1 + ubfx r3, r3, #16, #5 + orr lr, lr, r7, lsl #5 + ubfx r4, r4, #30, #1 + orr r3, r3, r4, lsl #5 + cmp lr, r3 + ldr r3, [sp, #20] + ldrhi lr, [sp, #20] + ldrls lr, [sp, #20] + ubfxhi r3, r3, #3, #5 + ubfxls r3, r3, #16, #5 + ubfxhi lr, lr, #28, #1 + ubfxls lr, lr, #30, #1 + b .L796 +.L786: + mvn r9, #0 + b .L765 +.L758: + cmp r1, #1 + bne .L772 + mov r9, #0 + cmp r4, #0 + mov r10, r9 + movne r3, #4 + moveq r3, #0 + str r3, [sp, #12] +.L773: + ldr r3, [sp, #8] + cmp r9, r3 + movcs r9, #0 + bcs .L771 +.L775: + cmp r8, #0 + and fp, r9, #3 + addne r3, r8, r9, lsl #9 + moveq r3, r8 + str r4, [sp] + mov r2, fp + mov r1, #1 + mov r0, r6 + bl NandcCopy1KB + mov r3, fp + mov r2, #2 + mov r1, #1 + mov r0, r7 + str r10, [sp, #4] + add r9, r9, #2 + str r10, [sp] + bl NandcXferStart + mov r1, #1 + mov r0, r7 + bl NandcXferComp + ldr r3, [sp, #12] + add r4, r4, r3 + b .L773 +.L772: + mov r10, #0 + mov r2, #2 + mov r3, r10 + str r10, [sp, #4] + str r10, [sp] + mov r1, r10 + bl NandcXferStart + mov fp, r8 + cmp r4, r10 + mov r9, r10 + movne r3, #4 + moveq r3, r10 + str r3, [sp, #12] +.L776: + ldr r3, [sp, #8] + cmp r10, r3 + bcs .L771 + mov r1, r5 + mov r0, r7 + bl NandcXferComp + ldr r3, [r6, #32] + add r10, r10, #2 + str r3, [sp, #20] + ldr r3, [sp, #8] + cmp r3, r10 + bls .L777 + mov r3, #0 + mov r2, #2 + str r3, [sp, #4] + mov r1, #0 + str r3, [sp] + mov r0, r7 + and r3, r10, #3 + bl NandcXferStart +.L777: + ldr r3, [sp, #20] + tst r3, #4 + mvnne r9, #0 + bne .L778 + ldr r3, [sp, #20] + ldr r2, [sp, #20] + ubfx r3, r3, #3, #5 + ubfx r2, r2, #27, #1 + orr r3, r3, r2, lsl #5 + cmp r9, r3 + movcc r9, r3 +.L778: + cmp r8, #0 + sub r2, r10, #2 + movne r3, fp + str r4, [sp] + moveq r3, #0 + and r2, r2, #3 + mov r1, #0 + mov r0, r6 + bl NandcCopy1KB + ldr r3, [sp, #12] + add fp, fp, #1024 + add r4, r4, r3 + b .L776 +.L798: + .align 2 +.L797: + .word .LANCHOR0 + .word .LANCHOR2 + .fnend + .size NandcXferData, .-NandcXferData + .align 2 + .global FlashReadRawPage + .syntax unified + .arm + .fpu softvfp + .type FlashReadRawPage, %function +FlashReadRawPage: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + .pad #8 + mov r8, r3 + ldr r3, .L802 + subs r4, r0, #0 + mov r6, r1 + mov r7, r2 + ldrb r5, [r3, #477] @ zero_extendqisi2 + bne .L800 + ldr r1, .L802+4 + ldrb r3, [r1, #37] @ zero_extendqisi2 + ldr r0, [r1, #40] + mul r0, r0, r3 + cmp r0, r6 + movhi r5, #4 +.L800: + mov r0, r4 + bl NandcWaitFlashReady + mov r0, r4 + bl NandcFlashCs + mov r1, r6 + mov r0, r4 + bl FlashReadCmd + mov r0, r4 + bl NandcWaitFlashReady + mov r3, r7 + mov r2, r5 + str r8, [sp] + mov r1, #0 + mov r0, r4 + bl NandcXferData + mov r1, r0 + mov r0, r4 + bl NandcFlashDeCs + mov r0, r1 + add sp, sp, #8 + @ sp needed + pop {r4, r5, r6, r7, r8, pc} +.L803: + .align 2 +.L802: + .word .LANCHOR1 + .word .LANCHOR0 + .fnend + .size FlashReadRawPage, .-FlashReadRawPage + .align 2 + .global FlashDdrTunningRead + .syntax unified + .arm + .fpu softvfp + .type FlashDdrTunningRead, %function +FlashDdrTunningRead: + .fnstart + @ args = 4, pretend = 0, frame = 16 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r7, r3 + ldr r4, .L830 + .pad #20 + sub sp, sp, #20 + mov fp, r2 + stm sp, {r0, r1} + ldr r3, [r4, #-2804] + ldr r3, [r3, #304] + str r3, [sp, #12] + ldr r3, [r4, #-1848] + cmp r3, #8 + ldr r3, [sp, #56] + movcc r10, #6 + movcs r10, #12 + cmp r3, #0 + moveq r5, #1024 + beq .L806 + mov r0, #1 + bl FlashSetInterfaceMode + mov r0, #1 + bl NandcSetMode + ldr r0, [sp] + bl FlashReset + mov r3, r7 + mov r2, fp + ldm sp, {r0, r1} + bl FlashReadRawPage + mov r5, r0 + ldrb r0, [r4, #-1871] @ zero_extendqisi2 + bl FlashSetInterfaceMode + ldrb r0, [r4, #-1871] @ zero_extendqisi2 + bl NandcSetMode + cmn r5, #1 + bne .L807 +.L816: + mvn r5, #0 +.L804: + mov r0, r5 + add sp, sp, #20 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L807: + mov r2, r5 + ldr r1, [sp, #4] + ldr r0, .L830+4 + bl rk_printk + cmp r5, #9 + bhi .L809 + ldr r2, [sp] + ldr r3, .L830+8 + ldr r3, [r3, r2, lsl #3] + ldr r2, [r3, #3840] + ldr r2, [r3] + orr r2, r2, #131072 + str r2, [r3] +.L809: + ldr r3, [r4, #-1796] + add r3, r3, #1 + cmp r3, #2048 + str r3, [r4, #-1796] + movcs r7, #0 + strcs r7, [r4, #-1796] + movcs fp, r7 + bcc .L804 +.L806: + mov r9, #0 + mvn r8, #0 + mov r6, r9 + mov r4, r9 + str r9, [sp, #8] +.L814: + uxtb r0, r10 + bl NandcSetDdrPara + mov r3, r7 + mov r2, fp + ldm sp, {r0, r1} + bl FlashReadRawPage + add r3, r5, #1 + cmp r0, r3 + bhi .L810 + cmp r0, #2 + bhi .L820 + add r4, r4, #1 + cmp r4, #9 + bls .L820 + mov r3, r6 + mov r5, r0 + sub r6, r10, r4 + mov r8, #0 +.L812: + ldr r2, [sp, #8] + cmp r4, r2 + movls r6, r3 +.L813: + cmp r6, #0 + beq .L815 + mov r1, r6 + ldr r0, .L830+12 + bl rk_printk + uxtb r0, r6 + bl NandcSetDdrPara +.L815: + cmn r8, #1 + bne .L804 + ldm sp, {r1, r2} + ldr r0, .L830+16 + bl rk_printk + ldr r3, [sp, #56] + cmp r3, #0 + beq .L816 + ldr r3, [sp, #12] + ubfx r0, r3, #8, #8 + bl NandcSetDdrPara + b .L804 +.L810: + ldr r3, [sp, #8] + cmp r4, r3 + bls .L821 + cmp r4, #7 + sub r6, r9, r4 + bhi .L813 + str r4, [sp, #8] +.L821: + mov r4, #0 + b .L811 +.L820: + mov r8, #0 + mov r9, r10 + mov r5, r0 + mov r7, r8 + mov fp, r8 +.L811: + add r10, r10, #2 + cmp r10, #69 + bls .L814 + mov r3, r6 + mov r6, r9 + b .L812 +.L831: + .align 2 +.L830: + .word .LANCHOR2 + .word .LC7 + .word .LANCHOR0 + .word .LC8 + .word .LC9 + .fnend + .size FlashDdrTunningRead, .-FlashDdrTunningRead + .align 2 + .global FlashReadPage + .syntax unified + .arm + .fpu softvfp + .type FlashReadPage, %function +FlashReadPage: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #12 + mov r5, r0 + mov r7, r1 + mov r8, r2 + mov r9, r3 + bl FlashReadRawPage + cmn r0, #1 + mov r4, r0 + ldr r6, .L852 + bne .L833 + ldr r10, .L852+4 + ldrb fp, [r10, #44] @ zero_extendqisi2 + cmp fp, #0 + bne .L834 +.L836: + ldrb r3, [r6, #-1856] @ zero_extendqisi2 + cmp r3, #0 + beq .L833 + ldr r3, [r6, #-2804] + mov r2, r8 + mov r1, r7 + mov r0, r5 + ldr r10, [r3, #304] + mov r3, #1 + str r3, [sp] + mov r3, r9 + bl FlashDdrTunningRead + cmn r0, #1 + mov r4, r0 + beq .L837 + ldrb r3, [r6, #-2739] @ zero_extendqisi2 + cmp r0, r3, lsr #1 + bls .L833 +.L837: + ubfx r0, r10, #8, #8 + bl NandcSetDdrPara + b .L833 +.L834: + mov r3, #0 + mov r2, r8 + strb r3, [r10, #44] + mov r1, r7 + mov r3, r9 + mov r0, r5 + bl FlashReadRawPage + cmn r0, #1 + strb fp, [r10, #44] + movne r4, r0 + beq .L836 +.L833: + ldr r10, [r6, #-1792] + adds r3, r10, #0 + movne r3, #1 + cmn r4, #1 + movne r3, #0 + cmp r3, #0 + beq .L832 + mov r3, r9 + mov r2, r8 + mov r1, r7 + mov r0, r5 + blx r10 + mov r3, r7 + mov r4, r0 + mov r1, r0 + mov r2, r5 + ldr r0, .L852+8 + bl rk_printk + cmn r4, #1 + bne .L832 + ldrb r3, [r6, #-2740] @ zero_extendqisi2 + cmp r3, #0 + beq .L832 + mov r0, r5 + bl flash_enter_slc_mode + ldr r4, [r6, #-1792] + mov r3, r9 + mov r2, r8 + mov r1, r7 + mov r0, r5 + blx r4 + mov r4, r0 + mov r0, r5 + bl flash_exit_slc_mode +.L832: + mov r0, r4 + add sp, sp, #12 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L853: + .align 2 +.L852: + .word .LANCHOR2 + .word .LANCHOR0 + .word .LC10 + .fnend + .size FlashReadPage, .-FlashReadPage + .align 2 + .global FlashDdrParaScan + .syntax unified + .arm + .fpu softvfp + .type FlashDdrParaScan, %function +FlashDdrParaScan: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + .pad #8 + mov r6, r0 + ldr r5, .L864 + mov r4, #0 + mov r7, r1 + ldrb r0, [r5, #-1871] @ zero_extendqisi2 + bl FlashSetInterfaceMode + ldrb r0, [r5, #-1871] @ zero_extendqisi2 + bl NandcSetMode + mov r3, r4 + mov r2, r4 + mov r1, r7 + str r4, [sp] + mov r0, r6 + bl FlashDdrTunningRead + mov r3, r4 + mov r8, r0 + mov r2, r4 + mov r1, r7 + mov r0, r6 + bl FlashReadRawPage + cmn r8, #1 + cmnne r0, #1 + mov r3, r5 + bne .L855 + ldrb r2, [r5, #-1871] @ zero_extendqisi2 + tst r2, #1 + beq .L855 + mov r0, #1 + bl FlashSetInterfaceMode + mov r0, #1 + bl NandcSetMode + strb r4, [r5, #-1856] +.L856: + mov r0, #0 + add sp, sp, #8 + @ sp needed + pop {r4, r5, r6, r7, r8, pc} +.L855: + mov r2, #1 + strb r2, [r3, #-1856] + b .L856 +.L865: + .align 2 +.L864: + .word .LANCHOR2 + .fnend + .size FlashDdrParaScan, .-FlashDdrParaScan + .align 2 + .global FlashLoadPhyInfo + .syntax unified + .arm + .fpu softvfp + .type FlashLoadPhyInfo, %function +FlashLoadPhyInfo: + .fnstart + @ args = 0, pretend = 0, frame = 16 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r3, #60 + .pad #20 + sub sp, sp, #20 + ldr r10, .L881 + mov r5, #0 + mov r7, #4 + strb r3, [sp, #12] + mov r3, #40 + strb r3, [sp, #13] + mov r3, #24 + strb r3, [sp, #14] + mov r3, #16 + ldr r4, .L881+4 + mvn r6, #0 + strb r3, [sp, #15] + mov r0, r5 + ldr r3, [r10, #40] + sub r9, r4, #2720 + str r5, [r4, #-1784] + sub r9, r9, #8 + str r3, [sp, #4] + ldr r3, [r4, #-1864] + str r3, [r4, #-1788] + bl flash_enter_slc_mode +.L867: + add fp, r5, #1 + mov r8, #0 +.L869: + add r3, sp, #12 + ldrb r0, [r3, r8] @ zero_extendqisi2 + bl FlashBchSel + mov r3, #0 + ldr r2, [r4, #-1864] + mov r1, r5 + mov r0, r3 + bl FlashReadRawPage + cmn r0, #1 + bne .L868 + mov r3, #0 + ldr r2, [r4, #-1864] + mov r1, fp + mov r0, r3 + bl FlashReadRawPage + cmn r0, #1 + bne .L868 + add r8, r8, #1 + cmp r8, #4 + bne .L869 +.L870: + ldr r3, [sp, #4] + subs r7, r7, #1 + add r5, r5, r3 + bne .L867 + mov r0, r7 + b .L880 +.L871: + movw r1, #2036 + add r0, r8, #12 + bl js_hash + ldr r3, [r8, #8] + cmp r3, r0 + mvnne r6, #0 + bne .L870 + ldr r6, .L881+8 + mov r2, #32 + add r1, r8, #160 + mov r0, r6 + bl ftl_memcpy + ldr r1, [r4, #-1788] + mov r2, #32 + ldr r0, .L881+12 + add r1, r1, #192 + bl ftl_memcpy + ldr r1, [r4, #-1788] + mov r2, #852 + mov r0, r9 + add r1, r1, #224 + bl ftl_memcpy + ldrh r0, [r6, #10] + bl FlashBlockAlignInit + ldr r6, [r4, #-1788] + mov r0, r5 + str r5, [r4, #-1784] + ldr r1, [r10, #40] + ldr r3, [r6, #1076] + strb r3, [r4, #-1856] + bl __aeabi_uidiv + add r0, r0, #1 + cmp r0, #1 + movls r3, #2 + strhi r0, [r4, #-1780] + strls r3, [r4, #-1780] + ldrh r3, [r6, #14] + mov r6, #0 + strb r3, [r4, #-1776] + b .L870 +.L868: + ldr r8, [r4, #-1788] + ldr r2, .L881+16 + ldr r3, [r8] + cmp r3, r2 + bne .L870 + cmp r6, #0 + bne .L871 + ldr r1, [r10, #40] + mov r0, r5 + bl __aeabi_uidiv + add r0, r0, #1 + str r0, [r4, #-1780] + mov r0, r6 +.L880: + bl flash_exit_slc_mode + mov r0, r6 + add sp, sp, #20 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L882: + .align 2 +.L881: + .word .LANCHOR0 + .word .LANCHOR2 + .word .LANCHOR1+468 + .word .LANCHOR0+52 + .word 1312902724 + .fnend + .size FlashLoadPhyInfo, .-FlashLoadPhyInfo + .align 2 + .global ToshibaReadRetrial + .syntax unified + .arm + .fpu softvfp + .type ToshibaReadRetrial, %function +ToshibaReadRetrial: + .fnstart + @ args = 0, pretend = 0, frame = 24 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #28 + sub sp, sp, #28 + mov r7, r0 + str r2, [sp, #8] + mov r10, r3 + str r1, [sp, #20] + bl NandcWaitFlashReady + ldr r3, .L911 + ldr r2, .L911+4 + ldr r5, [r3, r7, lsl #3] + add r3, r3, r7, lsl #3 + str r2, [sp, #12] + ldrb r3, [r3, #4] @ zero_extendqisi2 + str r3, [sp, #4] + add r6, r3, #8 + ldrb r3, [r2] @ zero_extendqisi2 + add r6, r5, r6, lsl #8 + sub r3, r3, #67 + cmp r3, #1 + ldr r3, [sp, #4] + movls r4, #0 + lsl r3, r3, #8 + str r3, [sp, #16] + bls .L884 + ldr r3, .L911+8 + ldrb r4, [r3, #-1856] @ zero_extendqisi2 + cmp r4, #0 + beq .L885 + mov r4, #1 + mov r0, #0 + bl NandcSetDdrMode +.L885: + ldr r3, [sp, #16] + mov r2, #92 + add r3, r5, r3 + str r2, [r3, #2056] + mov r2, #197 + str r2, [r3, #2056] +.L884: + mov r8, #1 + mvn r9, #0 +.L886: + ldr r3, .L911+12 + ldrb r3, [r3] @ zero_extendqisi2 + add r3, r3, #1 + cmp r8, r3 + bcc .L895 + mov fp, r9 +.L894: + ldr r3, [sp, #12] + mov r1, #0 + mov r0, r6 + ldrb r2, [r3] @ zero_extendqisi2 + sub r2, r2, #67 + cmp r2, #1 + bhi .L896 + bl SandiskSetRRPara +.L897: + ldr r3, [sp, #16] + mov r2, #255 + add r5, r5, r3 + str r2, [r5, #2056] + ldr r2, .L911+8 + ldrb r2, [r2, #-2739] @ zero_extendqisi2 + add r2, r2, r2, lsl #1 + cmp fp, r2, asr #2 + bcc .L898 + cmn fp, #1 + movne fp, #256 +.L898: + mov r0, r7 + bl NandcWaitFlashReady + cmp r4, #0 + beq .L883 + mov r0, #4 + bl NandcSetDdrMode +.L883: + mov r0, fp + add sp, sp, #28 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L895: + ldr r3, [sp, #12] + mov r0, r6 + uxtb r1, r8 + ldrb r3, [r3] @ zero_extendqisi2 + sub r3, r3, #67 + cmp r3, #1 + bhi .L887 + bl SandiskSetRRPara +.L888: + ldr r3, [sp, #12] + ldrb r3, [r3] @ zero_extendqisi2 + cmp r3, #34 + bne .L889 + ldr r3, .L911+12 + ldrb r3, [r3] @ zero_extendqisi2 + sub r3, r3, #3 + cmp r8, r3 + ldreq r3, [sp, #4] + moveq r2, #179 + addeq r3, r5, r3, lsl #8 + streq r2, [r3, #2056] +.L889: + ldr r3, [sp, #16] + mov r2, #38 + cmp r4, #0 + add r3, r5, r3 + str r2, [r3, #2056] + mov r2, #93 + str r2, [r3, #2056] + beq .L890 + mov r0, #4 + bl NandcSetDdrMode + mov r3, r10 + ldr r2, [sp, #8] + ldr r1, [sp, #20] + mov r0, r7 + bl FlashReadRawPage + mov fp, r0 + mov r0, #0 + bl NandcSetDdrMode +.L891: + cmn fp, #1 + beq .L892 + ldr r3, .L911+8 + cmn r9, #1 + moveq r9, fp + ldrb r2, [r3, #-2739] @ zero_extendqisi2 + add r2, r2, r2, lsl #1 + cmp fp, r2, asr #2 + bcc .L894 + mov r10, #0 + str r10, [sp, #8] +.L892: + add r8, r8, #1 + b .L886 +.L887: + bl ToshibaSetRRPara + b .L888 +.L890: + mov r3, r10 + ldr r2, [sp, #8] + ldr r1, [sp, #20] + mov r0, r7 + bl FlashReadRawPage + mov fp, r0 + b .L891 +.L896: + bl ToshibaSetRRPara + b .L897 +.L912: + .align 2 +.L911: + .word .LANCHOR0 + .word g_retryMode + .word .LANCHOR2 + .word g_maxRetryCount + .fnend + .size ToshibaReadRetrial, .-ToshibaReadRetrial + .align 2 + .global SamsungReadRetrial + .syntax unified + .arm + .fpu softvfp + .type SamsungReadRetrial, %function +SamsungReadRetrial: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r7, r0 + mov r9, r2 + mov r8, r3 + mov r10, r1 + mov r6, #1 + bl NandcWaitFlashReady + ldr r2, .L927 + mvn r4, #0 + ldr fp, .L927+4 + add r3, r2, r7, lsl #3 + ldrb r5, [r3, #4] @ zero_extendqisi2 + add r3, r5, #8 + ldr r5, [r2, r7, lsl #3] + add r5, r5, r3, lsl #8 +.L914: + ldr r3, .L927+8 + ldrb r3, [r3] @ zero_extendqisi2 + add r3, r3, #1 + cmp r6, r3 + bcc .L918 +.L917: + mov r1, #0 + mov r0, r5 + bl SamsungSetRRPara + ldr r3, .L927+4 + ldrb r3, [r3, #-2739] @ zero_extendqisi2 + add r3, r3, r3, lsl #1 + cmp r4, r3, asr #2 + bcc .L913 + cmn r4, #1 + movne r4, #256 +.L913: + mov r0, r4 + pop {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L918: + uxtb r1, r6 + mov r0, r5 + bl SamsungSetRRPara + mov r3, r8 + mov r2, r9 + mov r1, r10 + mov r0, r7 + bl FlashReadRawPage + cmn r0, #1 + beq .L915 + ldrb r3, [fp, #-2739] @ zero_extendqisi2 + cmn r4, #1 + moveq r4, r0 + add r3, r3, r3, lsl #1 + cmp r0, r3, asr #2 + bcc .L921 + mov r8, #0 + mov r9, r8 +.L915: + add r6, r6, #1 + b .L914 +.L921: + mov r4, r0 + b .L917 +.L928: + .align 2 +.L927: + .word .LANCHOR0 + .word .LANCHOR2 + .word g_maxRetryCount + .fnend + .size SamsungReadRetrial, .-SamsungReadRetrial + .align 2 + .global MicronReadRetrial + .syntax unified + .arm + .fpu softvfp + .type MicronReadRetrial, %function +MicronReadRetrial: + .fnstart + @ args = 0, pretend = 0, frame = 24 + @ frame_needed = 0, uses_anonymous_args = 0 +.L931: + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r8, r3 + ldr r3, .L954 + mov fp, r2 + .pad #36 + sub sp, sp, #36 + mov r6, r0 + str r1, [sp, #20] + ldrb r2, [r3, #-2739] @ zero_extendqisi2 + ldrb r3, [r3, #-2740] @ zero_extendqisi2 + cmp r3, #0 + ldrne r5, .L954+4 + addeq r2, r2, r2, lsl #1 + asreq r5, r2, #2 + smullne r2, r3, r2, r5 + movne r5, r3 + mov r3, #0 + str r3, [sp, #8] + ldr r3, .L954+8 + add r3, r3, r0, lsl #3 + str r3, [sp, #28] +.L941: + mov r0, r6 + mov r10, #0 + bl NandcWaitFlashReady + ldr r3, .L954+8 + mvn r4, #0 + ldr r3, [r3, r6, lsl #3] + str r3, [sp, #12] + ldr r3, [sp, #28] + ldrb r3, [r3, #4] @ zero_extendqisi2 + str r3, [sp, #16] + ldr r2, [sp, #16] + ldr r3, [sp, #12] + add r7, r3, r2, lsl #8 +.L932: + ldr r3, .L954+12 + ldrb r3, [r3] @ zero_extendqisi2 + cmp r10, r3 + bcc .L936 +.L935: + ldr r3, [sp, #12] + mov r0, #200 + ldr r2, [sp, #16] + add r7, r3, r2, lsl #8 + mov r3, #239 + str r3, [r7, #2056] + mov r3, #137 + str r3, [r7, #2052] + bl ndelay + cmp r4, r5 + mov r3, #0 + str r3, [r7, #2048] + str r3, [r7, #2048] + str r3, [r7, #2048] + str r3, [r7, #2048] + bcc .L937 + cmn r4, #1 + movne r4, #256 +.L937: + cmn r4, #1 + movne r7, #0 + moveq r7, #1 + cmp r4, #256 + movne r1, r7 + orreq r1, r7, #1 + cmp r1, #0 + beq .L938 + mov r3, r10 + str r4, [sp] + ldr r2, [sp, #20] + mov r1, r10 + ldr r0, .L954+16 + bl rk_printk + ldr r3, [sp, #8] + cmp r3, #0 + bne .L939 + ldr r3, .L954 + ldrb r3, [r3, #-2740] @ zero_extendqisi2 + cmp r3, #0 + moveq r7, #0 + andne r7, r7, #1 + cmp r7, #0 + beq .L929 + mov r1, #3 + mov r0, r6 + bl micron_auto_read_calibration_config + mov r3, #1 + str r3, [sp, #8] + b .L941 +.L936: + mov r3, #239 + mov r0, #200 + str r3, [r7, #2056] + mov r3, #137 + str r3, [r7, #2052] + mov r9, #0 + bl ndelay + add r3, r10, #1 + mov r2, fp + str r3, [r7, #2048] + mov r0, r6 + str r9, [r7, #2048] + str r3, [sp, #24] + mov r3, r8 + str r9, [r7, #2048] + ldr r1, [sp, #20] + str r9, [r7, #2048] + bl FlashReadRawPage + cmn r0, #1 + beq .L933 + cmn r4, #1 + moveq r4, r0 + cmp r0, r5 + bcc .L943 + mov r8, r9 + mov fp, r9 +.L933: + ldr r10, [sp, #24] + b .L932 +.L943: + mov r4, r0 + mov r8, r9 + mov fp, r9 + b .L935 +.L939: + mov r1, #0 + mov r0, r6 + bl micron_auto_read_calibration_config + cmn r4, #1 + movne r4, #256 +.L929: + mov r0, r4 + add sp, sp, #36 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L938: + ldr r3, [sp, #8] + cmp r3, #0 + beq .L929 + mov r0, r6 + mov r4, #256 + bl micron_auto_read_calibration_config + b .L929 +.L955: + .align 2 +.L954: + .word .LANCHOR2 + .word 1431655766 + .word .LANCHOR0 + .word g_maxRetryCount + .word .LC11 + .fnend + .size MicronReadRetrial, .-MicronReadRetrial + .align 2 + .global HynixReadRetrial + .syntax unified + .arm + .fpu softvfp + .type HynixReadRetrial, %function +HynixReadRetrial: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #12 + mov r9, r3 + str r1, [sp] + mov r8, #0 + mvn r6, #0 + mov fp, r2 + ldr r1, .L974 + mov r5, r0 + ldr r7, .L974+4 + ldr r3, [r1, #48] + add r2, r7, r0 + ldrb r10, [r7, #-2726] @ zero_extendqisi2 + ldrb r4, [r2, #-2716] @ zero_extendqisi2 + ldrb r3, [r3, #19] @ zero_extendqisi2 + str r1, [sp, #4] + sub r3, r3, #7 + cmp r3, #1 + ldrbls r4, [r2, #-2708] @ zero_extendqisi2 + bl NandcWaitFlashReady +.L958: + cmp r8, r10 + bcc .L963 +.L962: + ldr r3, [sp, #4] + add r5, r7, r5 + ldr r3, [r3, #48] + ldrb r3, [r3, #19] @ zero_extendqisi2 + sub r3, r3, #7 + cmp r3, #1 + ldrb r3, [r7, #-2739] @ zero_extendqisi2 + strbls r4, [r5, #-2708] + strbhi r4, [r5, #-2716] + add r3, r3, r3, lsl #1 + cmp r6, r3, asr #2 + bcc .L956 + cmn r6, #1 + movne r6, #256 +.L956: + mov r0, r6 + add sp, sp, #12 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L963: + add r4, r4, #1 + ldr r2, .L974+8 + uxtb r4, r4 + ldrb r1, [r7, #-2727] @ zero_extendqisi2 + mov r0, r5 + cmp r10, r4 + movls r4, #0 + mov r3, r4 + bl HynixSetRRPara + mov r3, r9 + mov r2, fp + ldr r1, [sp] + mov r0, r5 + bl FlashReadRawPage + cmn r0, #1 + beq .L960 + ldrb r3, [r7, #-2739] @ zero_extendqisi2 + cmn r6, #1 + moveq r6, r0 + add r3, r3, r3, lsl #1 + cmp r0, r3, asr #2 + bcc .L967 + mov r9, #0 + mov fp, r9 +.L960: + add r8, r8, #1 + b .L958 +.L967: + mov r6, r0 + b .L962 +.L975: + .align 2 +.L974: + .word .LANCHOR0 + .word .LANCHOR2 + .word .LANCHOR2-2724 + .fnend + .size HynixReadRetrial, .-HynixReadRetrial + .align 2 + .syntax unified + .arm + .fpu softvfp + .type samsung_read_retrial, %function +samsung_read_retrial: + .fnstart + @ args = 0, pretend = 0, frame = 16 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #28 + sub sp, sp, #28 + mov r10, r0 + mov fp, r2 + mov r9, r3 + str r1, [sp, #16] + bl NandcWaitFlashReady + ldr r3, .L1006 + ldr r2, [r3, r10, lsl #3] + add r3, r3, r10, lsl #3 + ldrb r6, [r3, #4] @ zero_extendqisi2 + ldr r3, .L1006+4 + str r2, [sp, #12] + ldrb r2, [r3, #-1872] @ zero_extendqisi2 + str r3, [sp, #20] + cmp r2, #0 + bne .L977 + ldr r3, [sp, #12] + lsl r8, r6, #8 + mvn r4, #0 + mov r7, #1 + add r5, r3, r8 +.L981: + mov r3, #239 + mov r6, #0 + str r3, [r5, #2056] + mov r3, #141 + str r3, [r5, #2052] + mov r2, fp + ldr r3, .L1006+8 + mov r0, r10 + ldr r1, [sp, #16] + ldrsb r3, [r7, r3] + str r3, [r5, #2048] + mov r3, r9 + str r6, [r5, #2048] + str r6, [r5, #2048] + str r6, [r5, #2048] + bl FlashReadRawPage + cmn r0, #1 + beq .L978 + ldr r3, [sp, #20] + cmn r4, #1 + moveq r4, r0 + ldrb r3, [r3, #-2739] @ zero_extendqisi2 + add r3, r3, r3, lsl #1 + cmp r0, r3, asr #2 + bcc .L989 + mov r9, r6 + mov fp, r6 +.L978: + add r7, r7, #1 + cmp r7, #26 + bne .L981 +.L980: + ldr r3, [sp, #12] + add r8, r3, r8 + mov r3, #239 + str r3, [r8, #2056] + mov r3, #141 +.L1005: + str r3, [r5, #2052] + mov r3, #0 + str r3, [r5, #2048] + str r3, [r5, #2048] + str r3, [r5, #2048] + str r3, [r5, #2048] + ldr r3, .L1006+4 + ldrb r3, [r3, #-2739] @ zero_extendqisi2 + add r3, r3, r3, lsl #1 + cmp r4, r3, asr #2 + bcc .L987 + cmn r4, #1 + movne r4, #256 +.L987: + cmn r4, #1 + cmpne r4, #256 + bne .L988 + str r4, [sp] + mov r3, r7 + ldr r2, [sp, #16] + mov r1, r7 + ldr r0, .L1006+12 + bl rk_printk +.L988: + mov r0, r10 + bl NandcWaitFlashReady + mov r0, r4 + add sp, sp, #28 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L989: + mov r4, r0 + b .L980 +.L977: + ldr r3, [sp, #12] + lsl r6, r6, #8 + ldr r8, .L1006+16 + mvn r4, #0 + mov r7, #1 + add r5, r3, r6 +.L986: + mov r3, #239 + mov r2, fp + str r3, [r5, #2056] + mov r3, #137 + str r3, [r5, #2052] + mov r0, r10 + ldrb r3, [r8, #4] @ zero_extendqisi2 + ldr r1, [sp, #16] + str r3, [r5, #2048] + ldrb r3, [r8, #5] @ zero_extendqisi2 + str r3, [r5, #2048] + ldrb r3, [r8, #6] @ zero_extendqisi2 + str r3, [r5, #2048] + ldrb r3, [r8, #7] @ zero_extendqisi2 + str r3, [r5, #2048] + mov r3, r9 + bl FlashReadRawPage + cmn r0, #1 + beq .L983 + ldr r3, .L1006+4 + cmn r4, #1 + moveq r4, r0 + ldrb r3, [r3, #-2739] @ zero_extendqisi2 + add r3, r3, r3, lsl #1 + cmp r0, r3, asr #2 + bcc .L990 + mov r9, #0 + mov fp, r9 +.L983: + add r7, r7, #1 + add r8, r8, #4 + cmp r7, #26 + bne .L986 +.L985: + ldr r3, [sp, #12] + add r6, r3, r6 + mov r3, #239 + str r3, [r6, #2056] + mov r3, #137 + b .L1005 +.L990: + mov r4, r0 + b .L985 +.L1007: + .align 2 +.L1006: + .word .LANCHOR0 + .word .LANCHOR2 + .word .LANCHOR3 + .word .LC12 + .word .LANCHOR3+26 + .fnend + .size samsung_read_retrial, .-samsung_read_retrial + .align 2 + .global FlashProgPage + .syntax unified + .arm + .fpu softvfp + .type FlashProgPage, %function +FlashProgPage: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + .pad #8 + mov r8, r3 + ldr r3, .L1012 + subs r4, r0, #0 + mov r5, r1 + mov r7, r2 + ldrb r6, [r3, #477] @ zero_extendqisi2 + bne .L1009 + ldr r1, .L1012+4 + ldrb r3, [r1, #37] @ zero_extendqisi2 + ldr r0, [r1, #40] + mul r0, r0, r3 + cmp r0, r5 + bls .L1009 + ldrb r3, [r1, #36] @ zero_extendqisi2 + cmp r3, #0 + movne r6, #4 +.L1009: + mov r0, r4 + bl NandcWaitFlashReady + mov r0, r4 + bl NandcFlashCs + mov r1, r5 + mov r0, r4 + bl FlashProgFirstCmd + mov r3, r7 + mov r2, r6 + str r8, [sp] + mov r1, #1 + mov r0, r4 + bl NandcXferData + mov r1, r5 + mov r0, r4 + bl FlashProgSecondCmd + mov r0, r4 + bl NandcWaitFlashReady + mov r1, r5 + mov r0, r4 + bl FlashReadStatus + mov r1, r0 + mov r0, r4 + bl NandcFlashDeCs + and r0, r1, #1 + add sp, sp, #8 + @ sp needed + pop {r4, r5, r6, r7, r8, pc} +.L1013: + .align 2 +.L1012: + .word .LANCHOR1 + .word .LANCHOR0 + .fnend + .size FlashProgPage, .-FlashProgPage + .align 2 + .global FlashSavePhyInfo + .syntax unified + .arm + .fpu softvfp + .type FlashSavePhyInfo, %function +FlashSavePhyInfo: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + ldr r4, .L1028 + ldr r5, .L1028+4 + ldr r3, [r4, #-1864] + ldrb r0, [r4, #-1775] @ zero_extendqisi2 + ldr r8, .L1028+8 + str r3, [r4, #-1788] + bl FlashBchSel + mov r2, #2048 + mov r1, #0 + ldr r0, [r4, #-1864] + bl ftl_memset + ldr r3, [r4, #-1788] + mov r2, #32 + ldr r1, .L1028+12 + str r8, [r3] + ldr r0, [r4, #-1788] + ldrb r3, [r5, #3156] @ zero_extendqisi2 + add r0, r0, #16 + strh r3, [r0, #-4] @ movhi + ldrb r3, [r5, #37] @ zero_extendqisi2 + strh r3, [r0, #-2] @ movhi + ldrb r3, [r4, #-1856] @ zero_extendqisi2 + str r3, [r0, #1060] + bl ftl_memcpy + ldr r0, [r4, #-1788] + mov r2, #8 + ldr r1, .L1028+16 + add r0, r0, #80 + bl ftl_memcpy + ldr r0, [r4, #-1788] + mov r2, #32 + add r1, r5, #3168 + add r0, r0, #96 + bl ftl_memcpy + ldr r0, [r4, #-1788] + mov r2, #32 + ldr r1, .L1028+20 + add r0, r0, #160 + bl ftl_memcpy + ldr r0, [r4, #-1788] + mov r2, #32 + add r1, r5, #52 + add r0, r0, #192 + bl ftl_memcpy + ldr r0, [r4, #-1788] + sub r1, r4, #2720 + mov r2, #852 + sub r1, r1, #8 + add r0, r0, #224 + bl ftl_memcpy + ldr r6, [r4, #-1788] + movw r1, #2036 + add r0, r6, #12 + bl js_hash + movw r3, #1592 + str r0, [r6, #8] + str r3, [r6, #4] + mov r6, #0 + ldr r3, [r4, #-1772] + mov r7, r6 + mov r0, #0 + str r3, [r4, #-1788] + bl flash_enter_slc_mode +.L1020: + ldr r1, [r5, #40] + mov r2, #0 + mov r0, r2 + mul r1, r1, r7 + bl FlashEraseBlock + ldrb r9, [r4, #-2740] @ zero_extendqisi2 + cmp r9, #0 + beq .L1015 + mov r9, #0 +.L1016: + ldr r1, [r5, #40] + mov r3, #0 + ldr r2, [r4, #-1864] + mov r0, r3 + mla r1, r1, r7, r9 + add r9, r9, #1 + bl FlashProgPage + cmp r9, #10 + bne .L1016 +.L1017: + ldr r1, [r5, #40] + mov r3, #0 + ldr r2, [r4, #-1772] + mov r0, r3 + add r10, r7, #1 + mul r1, r1, r7 + bl FlashReadRawPage + cmn r0, #1 + beq .L1018 + ldr r9, [r4, #-1788] + ldr r3, [r9] + cmp r3, r8 + bne .L1018 + movw r1, #2036 + add r0, r9, #12 + bl js_hash + ldr r3, [r9, #8] + cmp r3, r0 + bne .L1018 + ldr r3, [r5, #40] + cmp r6, #1 + str r10, [r4, #-1780] + mul r7, r7, r3 + str r7, [r4, #-1784] + beq .L1021 + mov r6, #1 +.L1018: + cmp r10, #4 + mov r7, r10 + bne .L1020 +.L1019: + mov r0, #0 + bl flash_exit_slc_mode + clz r0, r6 + lsr r0, r0, #5 + rsb r0, r0, #0 + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L1015: + ldr r1, [r5, #40] + mov r3, r9 + ldr r2, [r4, #-1864] + mov r0, r9 + mul r1, r1, r7 + bl FlashProgPage + ldr r1, [r5, #40] + mov r3, r9 + ldr r2, [r4, #-1864] + mov r0, r9 + mul r1, r1, r7 + add r1, r1, #1 + bl FlashProgPage + b .L1017 +.L1021: + mov r6, #2 + b .L1019 +.L1029: + .align 2 +.L1028: + .word .LANCHOR2 + .word .LANCHOR0 + .word 1312902724 + .word IDByte + .word .LANCHOR0+3160 + .word .LANCHOR1+468 + .fnend + .size FlashSavePhyInfo, .-FlashSavePhyInfo + .align 2 + .global FlashReadIdbDataRaw + .syntax unified + .arm + .fpu softvfp + .type FlashReadIdbDataRaw, %function +FlashReadIdbDataRaw: + .fnstart + @ args = 0, pretend = 0, frame = 16 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r3, #60 + .pad #20 + sub sp, sp, #20 + ldr r4, .L1049 + mov r9, r0 + strb r3, [sp, #12] + mov r3, #40 + strb r3, [sp, #13] + mov r3, #24 + strb r3, [sp, #14] + mov r3, #16 + strb r3, [sp, #15] + ldrb r3, [r4, #-2739] @ zero_extendqisi2 + str r3, [sp, #4] + ldr r3, [r4, #-1860] + cmp r3, #0 + beq .L1031 + mov r0, #0 + bl flash_enter_slc_mode +.L1031: + ldr fp, .L1049+4 + mvn r7, #0 + mov r5, #2 + mov r2, #2048 + mov r1, #0 + mov r0, r9 + mov r10, fp + bl ftl_memset +.L1032: + ldrb r3, [fp, #37] @ zero_extendqisi2 + cmp r5, r3 + bcc .L1037 +.L1036: + ldr r0, [sp, #4] + bl FlashBchSel + ldr r3, [r4, #-1860] + cmp r3, #0 + beq .L1030 + mov r0, #0 + bl flash_exit_slc_mode +.L1030: + mov r0, r7 + add sp, sp, #20 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L1037: + mov r6, #0 +.L1034: + add r3, sp, #12 + ldrb r8, [r3, r6] @ zero_extendqisi2 + mov r0, r8 + bl FlashBchSel + ldr r1, [r10, #40] + mov r3, #0 + ldr r2, [r4, #-1864] + mov r0, r3 + mul r1, r1, r5 + bl FlashReadRawPage + cmn r0, #1 + bne .L1033 + add r6, r6, #1 + cmp r6, #4 + bne .L1034 +.L1035: + add r5, r5, #1 + b .L1032 +.L1040: + mov r7, #0 + b .L1036 +.L1033: + ldr r3, [r4, #-1864] + ldr r2, .L1049+8 + ldr r3, [r3] + cmp r3, r2 + bne .L1035 + mov r1, r8 + ldr r0, .L1049+12 + bl rk_printk + mov r2, #2048 + ldr r1, [r4, #-1864] + mov r0, r9 + bl ftl_memcpy + ldr r3, [r4, #-1864] + ldr r3, [r3, #512] + strb r3, [r10, #37] + ldr r3, [r4, #-1780] + cmp r5, r3 + bcs .L1040 + str r5, [r4, #-1780] + mov r7, #0 + bl FlashSavePhyInfo + b .L1035 +.L1050: + .align 2 +.L1049: + .word .LANCHOR2 + .word .LANCHOR0 + .word -52655045 + .word .LC13 + .fnend + .size FlashReadIdbDataRaw, .-FlashReadIdbDataRaw + .align 2 + .global FlashInit + .syntax unified + .arm + .fpu softvfp + .type FlashInit, %function +FlashInit: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r6, r0 + ldr r4, .L1149 + .pad #28 + sub sp, sp, #28 + mov r0, #32768 + mov r7, #0 + bl ftl_dma32_malloc + str r0, [r4, #-1864] + mov r0, #32768 + bl ftl_dma32_malloc + str r0, [r4, #-1772] + mov r0, #4096 + bl ftl_dma32_malloc + str r0, [r4, #-1768] + mov r0, #32768 + bl ftl_dma32_malloc + str r0, [r4, #-1764] + mov r0, #4096 + bl ftl_dma32_malloc + ldr r5, .L1149+4 + mov r3, #50 + str r0, [r4, #-1760] + mov r0, r6 + ldr r6, .L1149+8 + mov r9, r7 + strb r3, [r5, #37] + strb r3, [r4, #-1776] + mov r3, #128 + mov r8, r6 + str r3, [r5, #40] + mov r3, #60 + str r7, [r4, #-1780] + strb r7, [r4, #-1856] + str r7, [r4, #-1796] + strb r7, [r5, #36] + strb r7, [r4, #-1756] + strb r3, [r4, #-1775] + bl NandcInit +.L1057: + add r2, r5, r7, lsl #3 + uxtb r10, r7 + ldr fp, [r5, r7, lsl #3] + ldrb r2, [r2, #4] @ zero_extendqisi2 + mov r0, r10 + str r2, [sp, #20] + bl FlashReset + mov r0, r10 + bl NandcFlashCs + ldr r2, [sp, #20] + mov r3, #144 + mov r0, #200 + add fp, fp, r2, lsl #8 + str r3, [fp, #2056] + str r9, [fp, #2052] + bl ndelay + ldr r2, [fp, #2048] + uxtb r2, r2 + strb r2, [r6] + cmp r2, #44 + ldr r1, [fp, #2048] + strb r1, [r6, #1] + ldr r1, [fp, #2048] + strb r1, [r6, #2] + ldr r1, [fp, #2048] + strb r1, [r6, #3] + ldr r1, [fp, #2048] + strb r1, [r6, #4] + ldr r1, [fp, #2048] + strb r1, [r6, #5] + bne .L1052 + mov r2, #239 + mov r0, #200 + str r2, [fp, #2056] + mov r2, #1 + str r2, [fp, #2052] + bl ndelay + mov r2, #4 + str r2, [fp, #2048] + str r9, [fp, #2048] + str r9, [fp, #2048] + str r9, [fp, #2048] +.L1052: + mov r0, r10 + bl NandcFlashDeCs + ldrb r2, [r6] @ zero_extendqisi2 + sub r3, r2, #1 + uxtb r3, r3 + cmp r3, #253 + bhi .L1053 + ldrb r1, [r6, #5] @ zero_extendqisi2 + ldrb r3, [r6, #1] @ zero_extendqisi2 + ldr r0, .L1149+12 + str r1, [sp, #12] + ldrb r1, [r6, #4] @ zero_extendqisi2 + str r1, [sp, #8] + ldrb r1, [r6, #3] @ zero_extendqisi2 + str r1, [sp, #4] + ldrb r1, [r6, #2] @ zero_extendqisi2 + str r1, [sp] + add r1, r7, #1 + bl rk_printk +.L1053: + cmp r7, #0 + bne .L1054 + ldrb r3, [r8] @ zero_extendqisi2 + sub r3, r3, #1 + uxtb r3, r3 + cmp r3, #253 + bhi .L1104 + ldrb r3, [r8, #1] @ zero_extendqisi2 + cmp r3, #255 + beq .L1104 + bl FlashCs123Init +.L1054: + ldrb r3, [r6] @ zero_extendqisi2 + add r7, r7, #1 + add r6, r6, #8 + cmp r3, #181 + moveq r3, #44 + strbeq r3, [r6, #-8] + cmp r7, #4 + bne .L1057 + ldrb r3, [r8] @ zero_extendqisi2 + cmp r3, #173 + beq .L1058 + ldr r0, [r4, #-1852] + bl NandcSetDdrMode +.L1058: + mov r2, #852 + mov r1, #0 + ldr r0, .L1149+16 + bl ftl_memset + ldr r7, .L1149+20 + ldr r2, .L1149+24 + ldr r0, [r4, #-1844] + ldr r6, .L1149+28 + add r3, r2, #468 + cmp r0, r7 + str r3, [r5, #48] + mov r3, #0 + strb r3, [r5, #44] + bne .L1059 + ldrb r3, [r2, #487] @ zero_extendqisi2 + cmp r3, #50 + movne r3, #1 + strne r3, [r4, #-1860] +.L1059: + ldrb r3, [r8, #1] @ zero_extendqisi2 + cmp r3, #241 + cmpne r3, #161 + and ip, r3, #253 + moveq r1, #1 + movne r1, #0 + cmp r3, #218 + orreq r1, r1, #1 + cmp ip, #209 + orreq r1, r1, #1 + cmp r1, #0 + bne .L1060 + cmp r3, #220 + bne .L1061 + ldrb r1, [r8, #3] @ zero_extendqisi2 + cmp r1, #149 + bne .L1061 +.L1060: + mov ip, #16 + mov r1, #1 + strb ip, [r5, #37] + strb ip, [r4, #-1775] + ldrb ip, [r8] @ zero_extendqisi2 + strb r1, [r5, #36] + strb r3, [r2, #3410] + cmp ip, #152 + strb ip, [r2, #3409] + bne .L1063 + ldrsb ip, [r8, #4] + cmp ip, #0 + movge r1, #24 + strblt r1, [r4, #-1756] + strbge r1, [r4, #-1775] +.L1063: + movw r1, #2049 + cmp r0, r1 + cmpne r0, r7 + moveq r1, #16 + strbeq r1, [r4, #-1775] + cmp r3, #218 + bne .L1067 + ldr r3, .L1149+32 + mov r1, #2048 + strh r1, [r3, #14] @ movhi + mvn r3, #37 +.L1143: + strb r3, [r2, #3410] +.L1068: + mov r2, #32 + ldr r1, .L1149+36 + ldr r0, .L1149+40 + bl ftl_memcpy + mov r2, #32 + ldr r1, .L1149+32 + ldr r0, .L1149+44 + bl ftl_memcpy +.L1061: + ldrb r3, [r5, #36] @ zero_extendqisi2 + cmp r3, #0 + bne .L1071 + bl FlashLoadPhyInfoInRam + cmp r0, #0 + bne .L1073 + ldr r3, [r5, #48] + ldrh r3, [r3, #16] + lsr r3, r3, #8 + tst r3, #1 + and r0, r3, #7 + strb r0, [r4, #-1871] + bne .L1073 + mov r3, #1 + strb r3, [r4, #-1856] + bl FlashSetInterfaceMode + ldrb r0, [r4, #-1871] @ zero_extendqisi2 + bl NandcSetMode +.L1073: + ldr r3, [r5, #48] + ldrb r3, [r3, #26] @ zero_extendqisi2 + strb r3, [r4, #-2740] + bl FlashLoadPhyInfo + cmp r0, #0 + beq .L1071 + ldr r3, [r4, #-1852] + cmp r3, #0 + beq .L1076 + mov r0, #1 + bl FlashSetInterfaceMode + mov r0, #1 +.L1144: + bl NandcSetMode + bl FlashLoadPhyInfo + cmp r0, #0 + beq .L1071 + mov r0, #1 + bl FlashSetInterfaceMode + mov r0, #1 + bl NandcSetMode + ldr r3, [r5, #48] + ldr r0, .L1149+48 + ldrh r1, [r3, #14] + bl rk_printk + bl FlashLoadPhyInfoInRam + cmn r0, #1 + beq .L1051 + bl FlashDieInfoInit + ldr r3, [r5, #48] + ldrb r0, [r3, #19] @ zero_extendqisi2 + bl FlashGetReadRetryDefault + ldr r3, .L1149+52 + ldr r2, [r5, #48] + ldrh r3, [r3] + ldrb r1, [r2, #9] @ zero_extendqisi2 + add r3, r3, #4080 + add r3, r3, #15 + cmp r1, r3, asr #12 + ldrh r3, [r2, #14] + blt .L1078 + add r0, r3, #255 + cmp r1, r0, asr #8 + bge .L1079 +.L1078: + bic r3, r3, #255 + strh r3, [r2, #14] @ movhi +.L1079: + ldrb r3, [r4, #-1871] @ zero_extendqisi2 + tst r3, #6 + beq .L1080 + bl FlashSavePhyInfo + mov r0, #0 + bl flash_enter_slc_mode + ldr r1, [r4, #-1784] + mov r0, #0 + bl FlashDdrParaScan + mov r0, #0 + bl flash_exit_slc_mode +.L1080: + bl FlashSavePhyInfo +.L1071: + ldr r9, [r5, #48] + ldrb r3, [r9, #26] @ zero_extendqisi2 + ldrb r1, [r9, #12] @ zero_extendqisi2 + ldrh r0, [r9, #10] + strb r3, [r4, #-2740] + ldrh r3, [r9, #16] + ubfx r2, r3, #7, #1 + strb r2, [r5, #44] + ubfx r2, r3, #3, #1 + strb r2, [r4, #-1755] + ubfx r2, r3, #4, #1 + ubfx r3, r3, #8, #3 + strb r2, [r4, #-1870] + strb r3, [r4, #-1871] + mov r3, #0 + str r3, [r4, #-1792] + bl __aeabi_idiv + mov r1, r0 + ldrb r0, [r9, #18] @ zero_extendqisi2 + bl BuildFlashLsbPageTable + bl FlashDieInfoInit + ldr r3, [r5, #48] + ldrh r2, [r3, #16] + tst r2, #64 + beq .L1082 + ldrb r0, [r3, #19] @ zero_extendqisi2 + ldr r3, .L1149+56 + ldr r2, .L1149+60 + ldrb r1, [r4, #-2726] @ zero_extendqisi2 + strb r0, [r3] + ldrb r3, [r4, #-2727] @ zero_extendqisi2 + mov ip, r2 + strb r3, [r2] + ldr r3, .L1149+64 + strb r1, [r3] + sub r1, r0, #1 + cmp r1, #7 + bhi .L1083 + ldr r3, .L1149+68 + str r3, [r4, #-1792] + sub r3, r0, #5 + cmp r0, #8 + cmpne r3, #1 + movls r3, #1 + strls r3, [r4, #-1804] + cmp r0, #7 + beq .L1105 + cmp r0, #8 + addne r6, r6, #12 + bne .L1085 +.L1105: + add r6, r6, #20 +.L1085: + sub r2, r6, #1 + mov r3, #0 + add r6, r6, #31 +.L1087: + ldrsb r1, [r2, #1]! + cmp r1, #0 + addeq r3, r3, #1 + cmp r6, r2 + bne .L1087 + cmp r3, #27 + bls .L1082 + bl FlashGetReadRetryDefault + bl FlashSavePhyInfo +.L1082: + ldr r3, [r4, #-1844] + cmp r3, r7 + bne .L1097 + ldrb r2, [r4, #-2740] @ zero_extendqisi2 + cmp r2, #0 + ldrne r2, [r5, #48] + movne r1, #0 + strbne r1, [r2, #18] +.L1097: + ldrb r2, [r8] @ zero_extendqisi2 + cmp r2, #44 + bne .L1098 + ldrb r2, [r4, #-1856] @ zero_extendqisi2 + cmp r2, #0 + beq .L1098 + cmp r3, r7 + bne .L1099 + ldrb r3, [r4, #-2740] @ zero_extendqisi2 + cmp r3, #0 + bne .L1098 +.L1099: + mov r3, #0 + mov r0, #1 + strb r3, [r4, #-1856] + bl FlashSetInterfaceMode + mov r0, #1 + bl NandcSetMode +.L1098: + ldrb r3, [r4, #-1871] @ zero_extendqisi2 + tst r3, #6 + beq .L1100 + ldrb r2, [r4, #-1856] @ zero_extendqisi2 + cmp r2, #0 + bne .L1101 + tst r3, #1 + bne .L1100 +.L1101: + mov r0, #0 + bl flash_enter_slc_mode + ldr r1, [r4, #-1784] + mov r0, #0 + bl FlashDdrParaScan + mov r0, #0 + bl flash_exit_slc_mode +.L1100: + ldr r3, [r5, #48] + mov r9, #16 + ldr r6, .L1149+72 + ldrb r0, [r3, #20] @ zero_extendqisi2 + bl FlashBchSel + ldr r0, .L1149+76 + bl FlashReadIdbDataRaw + ldr r0, .L1149+80 + strb r9, [r5, #37] + bl FlashTimingCfg + ldr r7, [r5, #48] + ldrb r2, [r8, #1] @ zero_extendqisi2 + ldrb r3, [r7, #12] @ zero_extendqisi2 + strh r3, [r6, #8] @ movhi + ldrb r3, [r7, #7] @ zero_extendqisi2 + str r3, [r4, #-2764] + lsl r3, r2, r9 + orr r3, r3, r2, lsl #8 + ldrb r2, [r8] @ zero_extendqisi2 + orr r3, r3, r2 + ldrb r2, [r8, #3] @ zero_extendqisi2 + orr r3, r3, r2, lsl #24 + str r3, [r4, #-2768] + ldrb r3, [r5, #3156] @ zero_extendqisi2 + ldrh r4, [r7, #14] + strh r3, [r6, #10] @ movhi + ldrb r3, [r7, #13] @ zero_extendqisi2 + strh r4, [r6, #14] @ movhi + strh r3, [r6, #12] @ movhi + ldrh r3, [r7, #10] + strh r3, [r6, #16] @ movhi + ldrb r1, [r7, #12] @ zero_extendqisi2 + ldrh r0, [r7, #10] + bl __aeabi_idiv + strh r0, [r6, #18] @ movhi + ldrb r2, [r7, #9] @ zero_extendqisi2 + strh r2, [r6, #20] @ movhi + ldrh r1, [r7, #10] + ldrb r3, [r7, #9] @ zero_extendqisi2 + smulbb r3, r3, r1 + mov r1, #512 + strh r1, [r6, #24] @ movhi + ldrb r1, [r5, #37] @ zero_extendqisi2 + uxth r3, r3 + strh r1, [r6, #26] @ movhi + ldrb r1, [r5, #36] @ zero_extendqisi2 + strh r3, [r6, #22] @ movhi + cmp r1, #1 + bne .L1102 + lsl r3, r3, #1 + lsr r4, r4, #1 + lsl r2, r2, #1 + strb r9, [r5, #37] + strh r3, [r6, #22] @ movhi + mov r3, #8 + strh r4, [r6, #14] @ movhi + strh r2, [r6, #20] @ movhi + strh r3, [r6, #26] @ movhi +.L1102: + ldrb r0, [r7, #20] @ zero_extendqisi2 + bl FlashBchSel + bl ftl_flash_suspend + mov r0, #0 +.L1051: + add sp, sp, #28 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L1067: + cmp r3, #220 + ldreq r3, .L1149+32 + moveq r1, #4096 + strheq r1, [r3, #14] @ movhi + mvneq r3, #35 + beq .L1143 +.L1069: + cmp r3, #211 + ldreq r3, .L1149+32 + moveq r1, #4096 + strheq r1, [r3, #14] @ movhi + moveq r3, #2 + strbeq r3, [r2, #3421] + b .L1068 +.L1076: + ldrb r0, [r4, #-1871] @ zero_extendqisi2 + bl FlashSetInterfaceMode + ldrb r0, [r4, #-1871] @ zero_extendqisi2 + b .L1144 +.L1083: + sub r1, r0, #17 + cmp r1, #2 + bhi .L1089 + ldr r2, .L1149+84 + cmp r0, #19 + str r2, [r4, #-1792] + moveq r2, #15 + beq .L1146 +.L1148: + mov r2, #7 +.L1146: + strb r2, [r3] + b .L1082 +.L1089: + sub r1, r0, #65 + cmp r0, #33 + cmpne r1, #1 + ldrls r1, .L1149+88 + strls r1, [r4, #-1792] + movls r1, #4 + strbls r1, [r2] + bls .L1148 +.L1091: + sub r2, r0, #67 + sub r1, r0, #34 + uxtb r2, r2 + cmp r2, #1 + cmphi r1, #1 + movls r1, #1 + movhi r1, #0 + bhi .L1092 + ldr r1, .L1149+88 + cmp r0, #68 + cmpne r0, #35 + str r1, [r4, #-1792] + movne r1, #7 + moveq r1, #17 + cmp r2, #1 + strb r1, [r3] + movls r3, #4 + movhi r3, #5 + strb r3, [ip] + b .L1082 +.L1092: + cmp r0, #49 + ldreq r3, .L1149+92 + streq r3, [r4, #-1792] + beq .L1082 + cmp r0, #50 + ldreq r3, .L1149+96 + streq r1, [r4, #-1860] + streq r3, [r4, #-1792] + b .L1082 +.L1104: + mvn r0, #1 + b .L1051 +.L1150: + .align 2 +.L1149: + .word .LANCHOR2 + .word .LANCHOR0 + .word IDByte + .word .LC14 + .word .LANCHOR2-2728 + .word 1446522928 + .word .LANCHOR1 + .word .LANCHOR2-2720 + .word .LANCHOR1+3408 + .word .LANCHOR1+3284 + .word .LANCHOR0+52 + .word .LANCHOR1+468 + .word .LC15 + .word .LANCHOR0+3328 + .word g_retryMode + .word g_maxRegNum + .word g_maxRetryCount + .word HynixReadRetrial + .word .LANCHOR2-2768 + .word .LANCHOR0+3332 + .word 150000 + .word MicronReadRetrial + .word ToshibaReadRetrial + .word SamsungReadRetrial + .word samsung_read_retrial + .fnend + .size FlashInit, .-FlashInit + .align 2 + .global FlashPageProgMsbFFData + .syntax unified + .arm + .fpu softvfp + .type FlashPageProgMsbFFData, %function +FlashPageProgMsbFFData: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + mov r6, r0 + ldr r5, .L1167 + mov r7, r1 + mov r4, r2 + ldrb r3, [r5, #-2740] @ zero_extendqisi2 + cmp r3, #0 + beq .L1152 + ldr r3, [r5, #-1860] + cmp r3, #0 + popne {r4, r5, r6, r7, r8, r9, r10, pc} +.L1152: + ldr r2, .L1167+4 + ldr r3, [r2, #48] + mov r8, r2 + ldrb r3, [r3, #19] @ zero_extendqisi2 + sub r1, r3, #5 + cmp r3, #50 + cmpne r1, #2 + bls .L1153 + sub r2, r3, #19 + and r2, r2, #239 + cmp r2, #0 + cmpne r3, #68 + popne {r4, r5, r6, r7, r8, r9, r10, pc} +.L1153: + ldr r9, .L1167+8 + movw r10, #65535 +.L1155: + ldr r3, [r8, #48] + ldrh r3, [r3, #10] + cmp r3, r4 + bhi .L1156 + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L1156: + lsl r3, r4, #1 + ldrh r3, [r9, r3] + cmp r3, r10 + popne {r4, r5, r6, r7, r8, r9, r10, pc} + mov r2, #32768 + mov r1, #255 + ldr r0, [r5, #-1772] + bl ftl_memset + ldr r3, [r5, #-1772] + add r1, r4, r7 + mov r0, r6 + add r4, r4, #1 + uxth r4, r4 + mov r2, r3 + bl FlashProgPage + b .L1155 +.L1168: + .align 2 +.L1167: + .word .LANCHOR2 + .word .LANCHOR0 + .word .LANCHOR0+1108 + .fnend + .size FlashPageProgMsbFFData, .-FlashPageProgMsbFFData + .align 2 + .global FlashReadSlc2KPages + .syntax unified + .arm + .fpu softvfp + .type FlashReadSlc2KPages, %function +FlashReadSlc2KPages: + .fnstart + @ args = 0, pretend = 0, frame = 24 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L1218 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r4, r0 + ldr r10, .L1218+4 + mov r8, #0 + .pad #36 + sub sp, sp, #36 + ldr r9, .L1218+8 + ldrb r3, [r3, #477] @ zero_extendqisi2 + str r1, [sp, #16] + str r2, [sp, #20] + str r3, [sp, #12] +.L1170: + ldr r3, [sp, #16] + cmp r8, r3 + bne .L1190 + mov r0, #0 + add sp, sp, #36 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L1190: + ldr r3, [sp, #16] + add r2, sp, #28 + ldr r1, [sp, #20] + mov r0, r4 + sub r3, r3, r8 + uxtb r3, r3 + str r3, [sp] + add r3, sp, #24 + bl LogAddr2PhyAddr + ldrb r2, [r10, #3156] @ zero_extendqisi2 + ldr r3, [sp, #24] + cmp r2, r3 + mvnls r3, #0 + strls r3, [r4] + bls .L1172 + add r3, r10, r3 + mov r7, #0 + ldrb r6, [r3, #3160] @ zero_extendqisi2 + mov r0, r6 + bl NandcWaitFlashReady + mov r0, r6 + bl NandcFlashCs +.L1173: + ldr r1, [sp, #28] + mov r0, r6 + bl FlashReadCmd + mov r0, r6 + bl NandcWaitFlashReady + ldr r3, [r4, #12] + mov r1, #0 + ldr r2, [sp, #12] + mov r0, r6 + str r3, [sp] + ldr r3, [r4, #8] + bl NandcXferData + ldrb r3, [r9, #-1756] @ zero_extendqisi2 + mov r5, r0 + cmp r3, #0 + beq .L1174 + mov r0, r6 + bl flash_read_ecc + cmp r0, #5 + movhi r5, #256 +.L1174: + cmp r7, #9 + cmnls r5, #1 + moveq r3, #1 + movne r3, #0 + addeq r7, r7, #1 + beq .L1173 +.L1175: + cmp r7, #0 + mov r7, r3 + movne r5, #256 +.L1177: + ldr r3, [r10, #40] + mov r0, r6 + ldr r1, [sp, #28] + add r1, r1, r3 + bl FlashReadCmd + mov r0, r6 + bl NandcWaitFlashReady + ldr r3, [r4, #8] + mov r1, #0 + ldr r2, [r4, #12] + mov r0, r6 + cmp r3, #0 + addne r3, r3, #2048 + cmp r2, #0 + addne r2, r2, #8 + str r2, [sp] + ldr r2, [sp, #12] + bl NandcXferData + ldrb r2, [r9, #-1756] @ zero_extendqisi2 + mov fp, r0 + cmp r2, #0 + beq .L1180 + mov r0, r6 + bl flash_read_ecc + cmp r0, #5 + movhi fp, #256 +.L1180: + cmp r7, #9 + cmnls fp, #1 + addeq r7, r7, #1 + beq .L1177 +.L1181: + cmp r7, #0 + mov r0, r6 + movne fp, #256 + bl NandcFlashDeCs + ldrb r3, [r9, #-2739] @ zero_extendqisi2 + cmp r5, fp + movcc r5, fp + add r3, r3, r3, lsl #1 + cmp r5, r3, asr #2 + bls .L1183 + cmn r5, #1 + movne r5, #256 +.L1183: + cmp r5, #256 + cmnne r5, #1 + movne r3, #0 + streq r5, [r4] + strne r3, [r4] + ldr r3, [r4, #12] + cmp r3, #0 + beq .L1186 + ldr r2, [r3, #12] + cmn r2, #1 + bne .L1186 + ldr r2, [r3, #8] + cmn r2, #1 + bne .L1186 + ldr r3, [r3] + cmn r3, #1 + strne r2, [r4] +.L1186: + ldr r3, [r4] + cmn r3, #1 + bne .L1172 + ldr r1, [r4, #4] + ldrb r2, [r9, #-2739] @ zero_extendqisi2 + ldr r0, .L1218+12 + bl rk_printk + ldr r1, [r4, #8] + cmp r1, #0 + beq .L1188 + mov r3, #8 + mov r2, #4 + ldr r0, .L1218+16 + bl rknand_print_hex +.L1188: + ldr r1, [r4, #12] + cmp r1, #0 + beq .L1172 + mov r3, #4 + ldr r0, .L1218+20 + mov r2, r3 + bl rknand_print_hex +.L1172: + add r8, r8, #1 + add r4, r4, #36 + b .L1170 +.L1219: + .align 2 +.L1218: + .word .LANCHOR1 + .word .LANCHOR0 + .word .LANCHOR2 + .word .LC16 + .word .LC17 + .word .LC18 + .fnend + .size FlashReadSlc2KPages, .-FlashReadSlc2KPages + .align 2 + .global FlashReadPages + .syntax unified + .arm + .fpu softvfp + .type FlashReadPages, %function +FlashReadPages: + .fnstart + @ args = 0, pretend = 0, frame = 40 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #52 + sub sp, sp, #52 + ldr r9, .L1291 + str r1, [sp, #24] + ldrb r10, [r9, #36] @ zero_extendqisi2 + str r2, [sp, #28] + cmp r10, #0 + bne .L1221 + ldr r3, .L1291+4 + mov fp, r0 + ldr r6, .L1291+8 + str r10, [sp, #8] + ldrb r3, [r3, #477] @ zero_extendqisi2 + str r3, [sp, #20] + ldrb r3, [r9, #44] @ zero_extendqisi2 + str r3, [sp, #36] +.L1222: + ldr r3, [sp, #8] + ldr r2, [sp, #24] + cmp r3, r2 + bcc .L1255 + mov r0, #0 + b .L1220 +.L1221: + bl FlashReadSlc2KPages +.L1220: + add sp, sp, #52 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L1255: + ldr r2, [sp, #8] + mov r3, #36 + ldr r1, [sp, #28] + mul r3, r3, r2 + add r8, fp, r3 + str r3, [sp, #12] + ldr r3, [sp, #24] + mov r0, r8 + ldr r7, [r8, #4] + sub r3, r3, r2 + add r2, sp, #44 + uxtb r3, r3 + str r3, [sp] + add r3, sp, #40 + bl LogAddr2PhyAddr + ldrb r2, [r9, #3156] @ zero_extendqisi2 + mov r5, r0 + ldr r3, [sp, #40] + cmp r2, r3 + ldrls r2, [sp, #12] + mvnls r3, #0 + strls r3, [fp, r2] + bls .L1225 + add r3, r9, r3 + ldrb r4, [r3, #3160] @ zero_extendqisi2 + ldrb r3, [r6, #-1755] @ zero_extendqisi2 + mov r0, r4 + cmp r3, #0 + moveq r5, #0 + bl NandcWaitFlashReady + ldr r3, [r9, #48] + ldrb r2, [r3, #19] @ zero_extendqisi2 + sub r3, r2, #1 + cmp r3, #7 + bhi .L1227 + sub r2, r2, #7 + add r1, r6, r4 + cmp r2, #1 + add r2, r6, r4 + ldrb r3, [r1, #-2716] @ zero_extendqisi2 + ldrb r2, [r2, #-1876] @ zero_extendqisi2 + ldrbls r3, [r1, #-2708] @ zero_extendqisi2 + cmp r2, r3 + beq .L1227 + ldr r2, .L1291+12 + mov r0, r4 + ldrb r1, [r6, #-2727] @ zero_extendqisi2 + bl HynixSetRRPara +.L1227: + mov r0, r4 + lsr r7, r7, #31 + bl NandcFlashCs + ldr r3, [sp, #28] + mov r0, r4 + cmp r3, #1 + orreq r7, r7, #1 + cmp r7, #0 + str r7, [sp, #16] + beq .L1229 + ldrb r3, [r6, #-2740] @ zero_extendqisi2 + cmp r3, #0 + beq .L1229 + bl flash_enter_slc_mode +.L1235: + ldr r1, [sp, #44] + cmn r1, #1 + cmpeq r4, #255 + moveq r3, #0 + movne r3, #1 + moveq r5, r3 + beq .L1231 + cmp r5, #0 + beq .L1232 + ldr r2, [r9, #40] + mov r0, r4 + add r2, r1, r2 + bl FlashReadDpCmd +.L1233: + mov r0, r4 + bl NandcWaitFlashReady + cmp r5, #0 + beq .L1231 + ldr r1, [sp, #44] + mov r0, r4 + bl FlashReadDpDataOutCmd +.L1231: + ldr r3, [r8, #12] + mov r1, #0 + ldr r2, [sp, #20] + mov r0, r4 + str r3, [sp] + ldr r3, [r8, #8] + bl NandcXferData + ldrb r3, [r9, #44] @ zero_extendqisi2 + mov r7, r0 + adds r2, r3, #0 + movne r2, #1 + cmn r0, #1 + movne r2, #0 + cmp r2, #0 + str r2, [sp, #32] + beq .L1234 + mov r3, #0 + mov r5, #0 + strb r3, [r9, #44] + b .L1235 +.L1229: + bl flash_exit_slc_mode + b .L1235 +.L1232: + mov r0, r4 + bl FlashReadCmd + b .L1233 +.L1234: + cmp r5, #0 + beq .L1236 + ldr r3, [r9, #40] + mov r0, r4 + ldr r1, [sp, #44] + add r1, r1, r3 + bl FlashReadDpDataOutCmd + ldr r3, [sp, #12] + mov r0, r4 + ldr r1, [sp, #32] + add r3, r3, #36 + add r3, fp, r3 + ldr r2, [r3, #12] + str r2, [sp] + ldr r2, [sp, #20] + ldr r3, [r3, #8] + bl NandcXferData + cmn r0, #1 + mov r10, r0 + moveq r5, #0 +.L1236: + mov r0, r4 + bl NandcFlashDeCs + ldrb r3, [sp, #36] @ zero_extendqisi2 + cmn r7, #1 + strb r3, [r9, #44] + bne .L1237 + ldrb r3, [r6, #-1856] @ zero_extendqisi2 + cmp r3, #0 + bne .L1238 +.L1242: + ldr r5, [r6, #-1792] + cmp r5, #0 + bne .L1239 + ldr r3, [r8, #12] + mov r0, r4 + ldr r2, [r8, #8] + ldr r1, [sp, #44] + bl FlashReadRawPage + mov r7, r0 +.L1243: + cmp r7, #256 + cmnne r7, #1 + ldreq r3, [sp, #12] + movne r3, #0 + ldrne r2, [sp, #12] + streq r7, [fp, r3] + strne r3, [fp, r2] + ldr r3, [sp, #12] + ldr r3, [fp, r3] + cmn r3, #1 + bne .L1250 + ldr r1, [r8, #4] + ldrb r2, [r6, #-2739] @ zero_extendqisi2 + ldr r0, .L1291+16 + bl rk_printk + ldr r1, [r8, #12] + cmp r1, #0 + beq .L1250 + mov r3, #4 + ldr r0, .L1291+20 + mov r2, r3 + bl rknand_print_hex +.L1250: + cmp r5, #0 + beq .L1252 + ldrb r3, [r6, #-2739] @ zero_extendqisi2 + add r3, r3, r3, lsl #1 + cmp r10, r3, asr #2 + bls .L1253 + ldr r3, [r6, #-1792] + cmp r3, #0 + moveq r10, #256 +.L1253: + ldr r3, [sp, #12] + cmp r10, #256 + cmnne r10, #1 + movne r2, #0 + add r3, r3, #36 + streq r10, [fp, r3] + strne r2, [fp, r3] +.L1252: + ldr r3, [sp, #8] + add r3, r3, r5 + str r3, [sp, #8] + ldr r3, [sp, #16] + cmp r3, #0 + beq .L1225 + ldrb r3, [r6, #-2740] @ zero_extendqisi2 + cmp r3, #0 + beq .L1225 + mov r0, r4 + bl flash_exit_slc_mode +.L1225: + ldr r3, [sp, #8] + add r3, r3, #1 + str r3, [sp, #8] + b .L1222 +.L1238: + ldr r3, [r6, #-2804] + mov r0, r4 + ldr r1, [sp, #44] + ldr r5, [r3, #304] + mov r3, #1 + str r3, [sp] + ldr r3, [r8, #12] + ldr r2, [r8, #8] + bl FlashDdrTunningRead + cmn r0, #1 + mov r7, r0 + beq .L1241 + ldrb r3, [r6, #-2739] @ zero_extendqisi2 + cmp r0, r3, lsr #1 + bls .L1258 +.L1241: + ubfx r0, r5, #8, #8 + bl NandcSetDdrPara + cmn r7, #1 + beq .L1242 +.L1258: + mov r5, #0 +.L1237: + ldrb r3, [r6, #-2739] @ zero_extendqisi2 + add r3, r3, r3, lsl #1 + cmp r7, r3, asr #2 + bls .L1243 + ldr r3, [r6, #-1792] + cmp r3, #0 + moveq r7, #256 + b .L1243 +.L1239: + ldr r3, [r8, #12] + mov r0, r4 + ldr r2, [r8, #8] + ldr r1, [sp, #44] + blx r5 + cmn r0, #1 + mov r7, r0 + bne .L1260 + ldr r3, [r9, #48] + ldrb r3, [r3, #19] @ zero_extendqisi2 + sub r3, r3, #1 + cmp r3, #7 + bhi .L1244 + mov r3, #0 + ldr r2, .L1291+12 + ldrb r1, [r6, #-2727] @ zero_extendqisi2 + mov r0, r4 + bl HynixSetRRPara +.L1244: + ldr r3, [r8, #12] + mov r0, r4 + ldr r2, [r8, #8] + ldr r1, [sp, #44] + bl FlashReadRawPage + ldrb r2, [r6, #-2739] @ zero_extendqisi2 + mov r7, r0 + mov r3, r0 + ldr r1, [r8, #4] + ldr r0, .L1291+24 + bl rk_printk + cmn r7, #1 + bne .L1260 + ldrb r5, [r6, #-2740] @ zero_extendqisi2 + cmp r5, #0 + beq .L1243 + ldr r3, [sp, #16] + mov r0, r4 + cmp r3, #0 + beq .L1245 + bl flash_enter_slc_mode +.L1246: + ldr r5, [r6, #-1792] + mov r0, r4 + ldr r3, [r8, #12] + ldr r2, [r8, #8] + ldr r1, [sp, #44] + blx r5 + mov r7, r0 +.L1260: + mov r5, #0 + b .L1243 +.L1245: + bl flash_exit_slc_mode + b .L1246 +.L1292: + .align 2 +.L1291: + .word .LANCHOR0 + .word .LANCHOR1 + .word .LANCHOR2 + .word .LANCHOR2-2724 + .word .LC16 + .word .LC18 + .word .LC19 + .fnend + .size FlashReadPages, .-FlashReadPages + .align 2 + .global FlashLoadFactorBbt + .syntax unified + .arm + .fpu softvfp + .type FlashLoadFactorBbt, %function +FlashLoadFactorBbt: + .fnstart + @ args = 0, pretend = 0, frame = 56 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r2, #16 + ldr r8, .L1305 + .pad #60 + sub sp, sp, #60 + mov r1, #0 + mov r5, #0 + ldr fp, .L1305+4 + mov r9, r5 + sub r3, r8, #2768 + sub r4, r8, #1744 + ldrh r6, [r3, #14] + sub r0, r4, #10 + ldrh r3, [r3, #12] + mvn r10, #0 + smulbb r6, r6, r3 + bl ftl_memset + uxth r6, r6 + ldr r3, [r8, #-1768] + str r5, [sp, #28] + str r4, [sp, #8] + str r3, [sp, #32] +.L1294: + ldrb r3, [fp, #3156] @ zero_extendqisi2 + uxtb r7, r5 + cmp r3, r7 + bhi .L1300 + mov r0, r10 + add sp, sp, #60 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L1300: + sub r4, r6, #1 + mul r3, r7, r6 + uxth r4, r4 + sub r2, r6, #12 + str r2, [sp, #4] +.L1295: + ldr r2, [sp, #4] + cmp r4, r2 + ble .L1297 + add r2, r4, r3 + add r0, sp, #20 + lsl r2, r2, #10 + str r3, [sp, #12] + str r2, [sp, #24] + mov r2, #1 + mov r1, r2 + bl FlashReadPages + ldr r2, [sp, #20] + ldr r3, [sp, #12] + cmn r2, #1 + beq .L1296 + ldr r2, [r8, #-1768] + ldrh r1, [r2] + movw r2, #61664 + cmp r1, r2 + bne .L1296 + mov r1, r7 + mov r2, r4 + ldr r0, .L1305+8 + add r9, r9, #1 + bl rk_printk + ldr r3, [sp, #8] + uxth r9, r9 + add r7, r3, r7, lsl #1 + strh r4, [r7, #-10] @ movhi +.L1297: + ldr r3, .L1305+4 + add r5, r5, #1 + ldrb r3, [r3, #3156] @ zero_extendqisi2 + cmp r3, r9 + moveq r10, #0 + b .L1294 +.L1296: + sub r4, r4, #1 + uxth r4, r4 + b .L1295 +.L1306: + .align 2 +.L1305: + .word .LANCHOR2 + .word .LANCHOR0 + .word .LC20 + .fnend + .size FlashLoadFactorBbt, .-FlashLoadFactorBbt + .align 2 + .global FlashReadFacBbtData + .syntax unified + .arm + .fpu softvfp + .type FlashReadFacBbtData, %function +FlashReadFacBbtData: + .fnstart + @ args = 0, pretend = 0, frame = 40 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + mov r8, r2 + ldr r5, .L1320 + .pad #40 + sub sp, sp, #40 + mov r6, r0 + mov r9, r1 + sub r2, r5, #2768 + ldrh r3, [r2, #14] + ldrh r2, [r2, #12] + smulbb r3, r3, r2 + ldr r2, [r5, #-1864] + uxth r3, r3 + str r2, [sp, #12] + ldr r2, [r5, #-1768] + sub r7, r3, #1 + mul r10, r1, r3 + uxth r7, r7 + sub r4, r3, #16 + str r2, [sp, #16] +.L1308: + cmp r7, r4 + mvnle r0, #0 + ble .L1307 +.L1314: + add r3, r7, r10 + mov r2, #1 + lsl r3, r3, #10 + mov r1, r2 + add r0, sp, #4 + str r3, [sp, #8] + bl FlashReadPages + ldr r3, [sp, #4] + cmn r3, #1 + beq .L1309 + ldr r3, [r5, #-1768] + ldrh r2, [r3] + movw r3, #61664 + cmp r2, r3 + bne .L1309 + cmp r6, #0 + moveq r0, r6 + beq .L1307 + cmp r9, #0 + moveq r1, r9 + moveq lr, #1 + beq .L1312 +.L1311: + mov r2, r8 + ldr r1, [r5, #-1864] + mov r0, r6 + bl ftl_memcpy + mov r3, #4 + ldr r0, .L1320+4 + mov r2, r3 + mov r1, r6 + bl rknand_print_hex + mov r0, #0 +.L1307: + add sp, sp, #40 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L1313: + ldr r0, [r5, #-1864] + lsr ip, r3, #5 + and r3, r3, #31 + ldr r2, [r0, ip, lsl #2] + orr r3, r2, lr, lsl r3 + str r3, [r0, ip, lsl #2] +.L1312: + ldr r0, [r5, #-1780] + uxth r3, r1 + add r1, r1, #1 + cmp r3, r0 + bcc .L1313 + b .L1311 +.L1309: + sub r7, r7, #1 + uxth r7, r7 + b .L1308 +.L1321: + .align 2 +.L1320: + .word .LANCHOR2 + .word .LC21 + .fnend + .size FlashReadFacBbtData, .-FlashReadFacBbtData + .align 2 + .global FlashGetBadBlockList + .syntax unified + .arm + .fpu softvfp + .type FlashGetBadBlockList, %function +FlashGetBadBlockList: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L1333 + push {r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + mov r5, r0 + ldr r6, .L1333+4 + ldr r3, [r3, #48] + ldr r0, [r6, #-1772] + ldrb r4, [r3, #13] @ zero_extendqisi2 + ldrh r3, [r3, #14] + smulbb r4, r4, r3 + uxth r4, r4 + add r2, r4, #7 + asr r2, r2, #3 + bl FlashReadFacBbtData + cmn r0, #1 + bne .L1323 +.L1327: + mov r3, #0 +.L1324: + lsl r3, r3, #1 + mvn r2, #0 + mov r0, #0 + strh r2, [r5, r3] @ movhi + pop {r4, r5, r6, r7, r8, pc} +.L1323: + mov r2, #0 + lsr lr, r4, #4 + mov r3, r2 + sub r4, r4, #1 + mov r7, #1 +.L1325: + uxth r1, r2 + cmp r1, r4 + bge .L1324 + ldr r8, [r6, #-1772] + lsr ip, r1, #5 + and r0, r1, #31 + add r2, r2, #1 + ldr ip, [r8, ip, lsl #2] + ands r0, ip, r7, lsl r0 + addne r0, r3, #1 + lslne r3, r3, #1 + strhne r1, [r5, r3] @ movhi + uxthne r3, r0 + cmp r3, lr + bcc .L1325 + b .L1327 +.L1334: + .align 2 +.L1333: + .word .LANCHOR0 + .word .LANCHOR2 + .fnend + .size FlashGetBadBlockList, .-FlashGetBadBlockList + .align 2 + .global FlashProgSlc2KPages + .syntax unified + .arm + .fpu softvfp + .type FlashProgSlc2KPages, %function +FlashProgSlc2KPages: + .fnstart + @ args = 0, pretend = 0, frame = 48 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L1363 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r10, r1 + ldr r9, .L1363+4 + .pad #60 + sub sp, sp, #60 + mov r8, r2 + mov r4, r0 + ldrb fp, [r3, #477] @ zero_extendqisi2 + mov r6, r0 + mov r7, #0 +.L1336: + cmp r7, r10 + bne .L1342 + ldr r5, .L1363+8 + mov r6, #0 + ldr r9, .L1363+12 +.L1343: + cmp r7, r6 + bne .L1350 + mov r0, #0 + add sp, sp, #60 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L1342: + sub r3, r10, r7 + add r2, sp, #12 + uxtb r3, r3 + mov r1, r8 + mov r0, r6 + str r3, [sp] + add r3, sp, #16 + bl LogAddr2PhyAddr + ldrb r2, [r9, #3156] @ zero_extendqisi2 + ldr r3, [sp, #16] + cmp r2, r3 + mvnls r3, #0 + strls r3, [r6] + bls .L1338 + add r3, r9, r3 + ldrb r5, [r3, #3160] @ zero_extendqisi2 + mov r0, r5 + bl NandcWaitFlashReady + mov r0, r5 + bl NandcFlashCs + mov r0, r5 + ldr r1, [sp, #12] + bl FlashProgFirstCmd + ldr r3, [r6, #12] + mov r2, fp + mov r1, #1 + mov r0, r5 + str r3, [sp] + ldr r3, [r6, #8] + bl NandcXferData + mov r0, r5 + ldr r1, [sp, #12] + bl FlashProgSecondCmd + mov r0, r5 + bl NandcWaitFlashReady + mov r0, r5 + ldr r1, [sp, #12] + bl FlashReadStatus + sbfx r0, r0, #0, #1 + ldr r1, [sp, #12] + str r0, [r6] + mov r0, r5 + ldr r3, [r9, #40] + add r1, r1, r3 + bl FlashProgFirstCmd + ldr r3, [r6, #8] + mov r1, #1 + ldr r2, [r6, #12] + mov r0, r5 + cmp r3, #0 + addne r3, r3, #2048 + cmp r2, #0 + addne r2, r2, #8 + str r2, [sp] + mov r2, fp + bl NandcXferData + ldr r3, [r9, #40] + mov r0, r5 + ldr r1, [sp, #12] + add r1, r1, r3 + bl FlashProgSecondCmd + mov r0, r5 + bl NandcWaitFlashReady + mov r0, r5 + ldr r1, [sp, #12] + bl FlashReadStatus + tst r0, #1 + mov r0, r5 + mvnne r3, #0 + strne r3, [r6] + bl NandcFlashDeCs +.L1338: + add r7, r7, #1 + add r6, r6, #36 + b .L1336 +.L1350: + ldr r3, [r4] + cmn r3, #1 + bne .L1344 + ldr r1, [r4, #4] + ldr r0, .L1363+16 + bl rk_printk +.L1345: + add r6, r6, #1 + add r4, r4, #36 + b .L1343 +.L1344: + sub r3, r7, r6 + add r2, sp, #12 + uxtb r3, r3 + mov r1, r8 + mov r0, r4 + str r3, [sp] + add r3, sp, #16 + bl LogAddr2PhyAddr + ldr r2, [r5, #-1764] + mov r3, #0 + mov lr, r4 + add ip, sp, #20 + str r3, [r2] + ldr r2, [r5, #-1760] + str r3, [r2] + ldmia lr!, {r0, r1, r2, r3} + stmia ip!, {r0, r1, r2, r3} + ldmia lr!, {r0, r1, r2, r3} + stmia ip!, {r0, r1, r2, r3} + mov r2, r8 + ldr r3, [lr] + mov r1, #1 + add r0, sp, #20 + str r3, [ip] + ldr r3, [r5, #-1764] + str r3, [sp, #28] + ldr r3, [r5, #-1760] + str r3, [sp, #32] + bl FlashReadPages + ldr r10, [sp, #20] + cmn r10, #1 + bne .L1346 + ldr r1, [r4, #4] + ldr r0, .L1363+20 + bl rk_printk + str r10, [r4] +.L1346: + ldr r10, [sp, #20] + cmp r10, #256 + bne .L1347 + ldr r1, [r4, #4] + ldr r0, .L1363+24 + bl rk_printk + str r10, [r4] +.L1347: + ldr r3, [r4, #12] + cmp r3, #0 + beq .L1348 + ldr r2, [r3] + ldr r3, [r5, #-1760] + ldr r3, [r3] + cmp r2, r3 + beq .L1348 + ldr r1, [r4, #4] + ldr r0, .L1363+28 + bl rk_printk + mvn r3, #0 + str r3, [r4] +.L1348: + ldr r3, [r4, #8] + cmp r3, #0 + beq .L1345 + ldr r2, [r3] + ldr r3, [r5, #-1764] + ldr r3, [r3] + cmp r2, r3 + beq .L1345 + ldr r1, [r4, #4] + mov r0, r9 + bl rk_printk + mvn r3, #0 + str r3, [r4] + b .L1345 +.L1364: + .align 2 +.L1363: + .word .LANCHOR1 + .word .LANCHOR0 + .word .LANCHOR2 + .word .LC26 + .word .LC22 + .word .LC23 + .word .LC24 + .word .LC25 + .fnend + .size FlashProgSlc2KPages, .-FlashProgSlc2KPages + .align 2 + .global FlashProgPages + .syntax unified + .arm + .fpu softvfp + .type FlashProgPages, %function +FlashProgPages: + .fnstart + @ args = 0, pretend = 0, frame = 64 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #76 + sub sp, sp, #76 + ldr r6, .L1418 + str r1, [sp, #8] + ldr ip, [r6, #48] + ldrb r8, [r6, #36] @ zero_extendqisi2 + str r3, [sp, #20] + ldrb ip, [ip, #19] @ zero_extendqisi2 + cmp r8, #0 + str ip, [sp, #16] + bne .L1366 + ldr r3, .L1418+4 + mov r4, r0 + mov r9, r2 + ldrb r3, [r3, #477] @ zero_extendqisi2 + str r3, [sp, #12] +.L1367: + ldr r3, [sp, #8] + cmp r8, r3 + bcc .L1380 + ldr r7, .L1418+8 + mov r5, #0 + ldr r8, .L1418+12 +.L1381: + ldrb r3, [r6, #3156] @ zero_extendqisi2 + cmp r5, r3 + bcc .L1383 + ldr r3, [sp, #20] + cmp r3, #0 + bne .L1384 +.L1392: + mov r0, #0 + b .L1365 +.L1366: + bl FlashProgSlc2KPages +.L1365: + add sp, sp, #76 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L1380: + ldr r3, [sp, #8] + mov r7, #36 + mul r7, r7, r8 + add r2, sp, #28 + mov r1, r9 + sub r3, r3, r8 + uxtb r3, r3 + add fp, r4, r7 + str r3, [sp] + mov r0, fp + add r3, sp, #32 + bl LogAddr2PhyAddr + ldrb r3, [r6, #3156] @ zero_extendqisi2 + mov r10, r0 + ldr r0, [sp, #32] + cmp r3, r0 + mvnls r3, #0 + strls r3, [r4, r7] + bls .L1370 + ldr r3, .L1418+8 + ldrb r3, [r3, #-1870] @ zero_extendqisi2 + cmp r3, #0 + add r3, r6, r0, lsl #4 + moveq r10, #0 + ldr r3, [r3, #3208] + cmp r3, #0 + beq .L1372 + uxtb r0, r0 + bl FlashWaitCmdDone +.L1372: + ldr r3, [sp, #32] + mov r1, #0 + cmp r10, #0 + add r2, r6, r3, lsl #4 + str r1, [r2, #3212] + ldr r1, [sp, #28] + str fp, [r2, #3208] + str r1, [r2, #3204] + addne r1, r7, #36 + addne r1, r4, r1 + strne r1, [r2, #3212] + add r2, r6, r3 + ldrb r5, [r2, #3160] @ zero_extendqisi2 + add r3, r6, r3, lsl #4 + strb r5, [r3, #3200] + mov r0, r5 + ldrb r3, [r6, #3156] @ zero_extendqisi2 + cmp r3, #1 + bne .L1374 + bl NandcWaitFlashReady +.L1375: + ldr r3, [sp, #16] + sub r3, r3, #1 + cmp r3, #7 + bhi .L1376 + ldr r1, .L1418+8 + add r3, r1, r5 + ldrb r3, [r3, #-1876] @ zero_extendqisi2 + cmp r3, #0 + beq .L1376 + mov r3, #0 + ldr r2, .L1418+16 + ldrb r1, [r1, #-2727] @ zero_extendqisi2 + mov r0, r5 + bl HynixSetRRPara +.L1376: + mov r0, r5 + bl NandcFlashCs + cmp r9, #1 + mov r0, r5 + bne .L1377 + ldr r3, .L1418+8 + ldrb r3, [r3, #-2740] @ zero_extendqisi2 + cmp r3, #0 + beq .L1377 + bl flash_enter_slc_mode +.L1378: + ldr r1, [sp, #28] + mov r0, r5 + bl FlashProgFirstCmd + ldr r3, [fp, #12] + mov r1, #1 + ldr r2, [sp, #12] + mov r0, r5 + str r3, [sp] + ldr r3, [fp, #8] + bl NandcXferData + cmp r10, #0 + beq .L1379 + ldr r1, [sp, #28] + mov r0, r5 + bl FlashProgDpFirstCmd + ldr r3, [sp, #32] + mov r0, r5 + ldr r1, [sp, #28] + add r7, r7, #36 + add r7, r4, r7 + add r3, r6, r3, lsl #2 + ldr r2, [r3, #3168] + adds r2, r2, #0 + movne r2, #1 + bl FlashWaitReadyEN + ldr r3, [r6, #40] + mov r0, r5 + ldr r1, [sp, #28] + add r1, r1, r3 + bl FlashProgDpSecondCmd + ldr r3, [r7, #12] + mov r1, #1 + ldr r2, [sp, #12] + mov r0, r5 + str r3, [sp] + ldr r3, [r7, #8] + bl NandcXferData +.L1379: + ldr r1, [sp, #28] + mov r0, r5 + add r8, r8, r10 + bl FlashProgSecondCmd + mov r0, r5 + bl NandcFlashDeCs +.L1370: + add r8, r8, #1 + b .L1367 +.L1374: + bl NandcFlashCs + ldr r3, [sp, #32] + mov r0, r5 + ldr r1, [sp, #28] + add r3, r6, r3, lsl #2 + ldr r2, [r3, #3168] + adds r2, r2, #0 + movne r2, #1 + bl FlashWaitReadyEN + mov r0, r5 + bl NandcFlashDeCs + b .L1375 +.L1377: + bl flash_exit_slc_mode + b .L1378 +.L1383: + uxtb r0, r5 + bl FlashWaitCmdDone + cmp r9, #1 + bne .L1382 + ldrb r3, [r7, #-2740] @ zero_extendqisi2 + cmp r3, #0 + beq .L1382 + ldrb r0, [r8, r5, lsl #4] @ zero_extendqisi2 + bl flash_exit_slc_mode +.L1382: + add r5, r5, #1 + b .L1381 +.L1384: + ldr r5, .L1418+8 + mov r6, #0 + ldr r7, .L1418+20 +.L1385: + ldr r3, [sp, #8] + cmp r6, r3 + beq .L1392 + ldr r3, [r4] + cmn r3, #1 + bne .L1386 + ldr r1, [r4, #4] + ldr r0, .L1418+24 + bl rk_printk +.L1387: + add r6, r6, #1 + add r4, r4, #36 + b .L1385 +.L1386: + ldr r3, [sp, #8] + add r2, sp, #28 + mov r1, r9 + mov r0, r4 + sub r3, r3, r6 + uxtb r3, r3 + str r3, [sp] + add r3, sp, #32 + bl LogAddr2PhyAddr + ldr r2, [r5, #-1764] + mov r3, #0 + mov lr, r4 + add ip, sp, #36 + str r3, [r2] + ldr r2, [r5, #-1760] + str r3, [r2] + ldmia lr!, {r0, r1, r2, r3} + stmia ip!, {r0, r1, r2, r3} + ldmia lr!, {r0, r1, r2, r3} + stmia ip!, {r0, r1, r2, r3} + mov r2, r9 + ldr r3, [lr] + mov r1, #1 + add r0, sp, #36 + str r3, [ip] + ldr r3, [r5, #-1764] + str r3, [sp, #44] + ldr r3, [r5, #-1760] + str r3, [sp, #48] + bl FlashReadPages + ldr r8, [sp, #36] + cmn r8, #1 + bne .L1388 + ldr r1, [r4, #4] + ldr r0, .L1418+28 + bl rk_printk + str r8, [r4] +.L1388: + ldr r3, [r4, #12] + cmp r3, #0 + beq .L1389 + ldr r2, [r3] + ldr r3, [r5, #-1760] + ldr r3, [r3] + cmp r2, r3 + beq .L1389 + ldr r1, [r4, #4] + ldr r0, .L1418+32 + bl rk_printk + mvn r3, #0 + str r3, [r4] +.L1389: + ldr r3, [r4, #8] + cmp r3, #0 + beq .L1387 + ldr r2, [r3] + ldr r3, [r5, #-1764] + ldr r3, [r3] + cmp r2, r3 + beq .L1387 + ldr r1, [r4, #4] + mov r0, r7 + bl rk_printk + mvn r3, #0 + str r3, [r4] + b .L1387 +.L1419: + .align 2 +.L1418: + .word .LANCHOR0 + .word .LANCHOR1 + .word .LANCHOR2 + .word .LANCHOR0+3200 + .word .LANCHOR2-2724 + .word .LC26 + .word .LC22 + .word .LC23 + .word .LC25 + .fnend + .size FlashProgPages, .-FlashProgPages + .align 2 + .global FlashTestBlk + .syntax unified + .arm + .fpu softvfp + .type FlashTestBlk, %function +FlashTestBlk: + .fnstart + @ args = 0, pretend = 0, frame = 104 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, lr} + .save {r4, r5, lr} + .pad #108 + sub sp, sp, #108 + ldr r5, .L1424 + ldr r3, [r5, #-1780] + cmp r0, r3 + movcc r4, #0 + bcc .L1420 + ldr r3, [r5, #-1772] + mov r4, r0 + mov r2, #32 + add r0, sp, #40 + mov r1, #165 + str r0, [sp, #16] + str r3, [sp, #12] + bl ftl_memset + mov r2, #8 + mov r1, #90 + ldr r0, [r5, #-1772] + bl ftl_memset + lsl r0, r4, #10 + mov r2, #1 + mov r1, r2 + str r0, [sp, #8] + add r0, sp, #4 + bl FlashEraseBlocks + mov r3, #1 + add r0, sp, #4 + mov r2, r3 + mov r1, r3 + bl FlashProgPages + ldr r4, [sp, #4] + mov r2, #1 + mov r1, #0 + add r0, sp, #4 + adds r4, r4, #0 + movne r4, #1 + rsb r4, r4, #0 + bl FlashEraseBlocks +.L1420: + mov r0, r4 + add sp, sp, #108 + @ sp needed + pop {r4, r5, pc} +.L1425: + .align 2 +.L1424: + .word .LANCHOR2 + .fnend + .size FlashTestBlk, .-FlashTestBlk + .align 2 + .global FlashMakeFactorBbt + .syntax unified + .arm + .fpu softvfp + .type FlashMakeFactorBbt, %function +FlashMakeFactorBbt: + .fnstart + @ args = 0, pretend = 0, frame = 80 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L1477 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #84 + sub sp, sp, #84 + ldr r0, .L1477+4 + sub r1, r3, #2768 + mov r4, r3 + ldr r2, [r3, #-1768] + str r2, [sp, #20] + ldrh r2, [r1, #14] + ldrh r1, [r1, #12] + smulbb r2, r2, r1 + uxth r2, r2 + str r2, [sp] + ldr r2, .L1477+8 + ldr r1, [r2, #48] + ldrb r1, [r1, #24] @ zero_extendqisi2 + str r1, [sp, #24] + ldrh r1, [r2, #40] + ldrb r2, [r2, #36] @ zero_extendqisi2 + str r1, [sp, #16] + cmp r2, #1 + moveq r3, r1 + mov r1, #1 + lsleq r3, r3, #1 + uxtheq r3, r3 + streq r3, [sp, #16] + bl rk_printk + ldr r0, [r4, #-1768] + mov r2, #4096 + mov r1, #0 + ldr r4, .L1477 + bl ftl_memset + ldr r3, [sp] + lsr r3, r3, #4 + str r3, [sp, #28] + mov r3, #0 + str r3, [sp, #8] + sub r3, r4, #1744 + sub r3, r3, #10 + str r3, [sp, #32] +.L1428: + ldr r5, .L1477+8 + ldrb r7, [sp, #8] @ zero_extendqisi2 + ldrb r3, [r5, #3156] @ zero_extendqisi2 + cmp r3, r7 + bhi .L1455 + add sp, sp, #84 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L1455: + ldr r2, [sp, #32] + lsl r3, r7, #1 + ldrh r6, [r2, r3] + cmp r6, #0 + bne .L1429 + ldr r3, .L1477+12 + mov r1, r6 + ldr r0, [r4, #-1864] + add fp, r5, r7, lsl #2 + mov r8, r6 + ldrh r2, [r3, #20] + mov r9, r6 + lsl r2, r2, #9 + bl ftl_memset + add r3, r5, r7 + str r6, [sp, #4] + ldrb r10, [r3, #3160] @ zero_extendqisi2 +.L1430: + ldrh r3, [sp, #4] + ldr r2, [sp] + str r3, [sp, #12] + cmp r3, r2 + bcc .L1441 +.L1440: + ldr r5, .L1477+8 + mov r2, r8 + mov r1, r7 + ldr r0, .L1477+16 + bl rk_printk + ldrb r3, [r5, #3156] @ zero_extendqisi2 + ldr r2, [sp, #28] + mul r3, r2, r3 + cmp r8, r3 + mov r8, r5 + blt .L1442 + ldr r3, .L1477+12 + mov r1, #0 + ldr r0, [r4, #-1864] + ldrh r2, [r3, #20] + lsl r2, r2, #9 + bl ftl_memset +.L1442: + cmp r7, #0 + bne .L1444 + sub r3, r4, #1776 + ldr r9, .L1477+20 + sub r3, r3, #4 + ldrh fp, [r3] + mov r10, #1 +.L1445: + ldrb r3, [r8, #37] @ zero_extendqisi2 + cmp r3, fp + bhi .L1447 + ldr r3, [sp] + mov r10, #1 + ldr r9, .L1477+20 + sub fp, r3, #1 + sub r8, r3, #50 + uxth fp, fp +.L1448: + cmp fp, r8 + bgt .L1450 + ldrb r3, [r5, #37] @ zero_extendqisi2 + ldr r2, [r4, #-1780] + sub r3, r3, r2 + cmp r6, r3 + bcc .L1444 + ldr r3, .L1477+12 + mov r1, #0 + ldr r0, [r4, #-1864] + ldrh r2, [r3, #20] + lsl r2, r2, #9 + bl ftl_memset +.L1444: + ldr r3, [sp] + ldrb r6, [sp, #8] @ zero_extendqisi2 + ldr r8, .L1477+24 + sub r5, r3, #1 + ldr r10, .L1477+28 + ldr r9, .L1477+32 + uxth r5, r5 + mul r6, r3, r6 + add r8, r8, r7, lsl #1 +.L1452: + mov r1, r7 + mov r2, r5 + mov r0, r10 + bl rk_printk + ldr r1, [r4, #-1864] +.L1453: + lsr r2, r5, #5 + and r3, r5, #31 + ldr r2, [r1, r2, lsl #2] + lsr r3, r2, r3 + ands r3, r3, #1 + bne .L1454 + ldr r2, [sp, #20] + add r0, sp, #44 + strh r5, [r8] @ movhi + strh r9, [r2] @ movhi + strh r5, [r2, #2] @ movhi + strh r3, [r2, #8] @ movhi + mov r2, #1 + ldr r3, [r4, #-1864] + mov r1, r2 + str r3, [sp, #52] + ldr r3, [r4, #-1768] + str r3, [sp, #56] + add r3, r5, r6 + lsl r3, r3, #10 + str r3, [sp, #48] + bl FlashEraseBlocks + mov r3, #1 + add r0, sp, #44 + mov r2, r3 + mov r1, r3 + bl FlashProgPages + ldr r3, [sp, #44] + cmp r3, #0 + beq .L1429 + sub r5, r5, #1 + uxth r5, r5 + b .L1452 +.L1441: + mvn r3, #0 + strb r3, [sp, #42] + strb r3, [sp, #43] + ldr r3, [sp, #24] + tst r3, #1 + beq .L1432 + ldr r3, [fp, #3168] + add r2, sp, #42 + mov r0, r10 + add r3, r9, r3 + mov r1, r3 + str r3, [sp, #36] + bl FlashReadSpare + ldrb r2, [r5, #36] @ zero_extendqisi2 + ldr r3, [sp, #36] + cmp r2, #1 + bne .L1432 + ldr r1, [r5, #40] + add r2, sp, #43 + mov r0, r10 + add r1, r3, r1 + bl FlashReadSpare + ldrb r3, [sp, #42] @ zero_extendqisi2 + ldrb r2, [sp, #43] @ zero_extendqisi2 + and r3, r3, r2 + strb r3, [sp, #42] +.L1432: + ldr r3, [sp, #24] + tst r3, #2 + beq .L1434 + ldr r3, [r5, #48] + add r2, sp, #43 + mov r0, r10 + ldrh r1, [r3, #10] + ldr r3, [fp, #3168] + sub r1, r1, #1 + add r1, r1, r3 + add r1, r1, r9 + bl FlashReadSpare +.L1434: + ldr r2, [r5, #48] + ldrb r3, [r2, #7] @ zero_extendqisi2 + cmp r3, #8 + cmpne r3, #1 + ldrb r3, [sp, #42] @ zero_extendqisi2 + beq .L1435 + ldrb r2, [r2, #18] @ zero_extendqisi2 + cmp r2, #12 + bne .L1436 +.L1435: + cmp r3, #0 + ldrbne r0, [sp, #43] @ zero_extendqisi2 + clzne r0, r0 + lsrne r0, r0, #5 + bne .L1437 +.L1457: + mov r0, #1 + b .L1437 +.L1436: + cmp r3, #255 + bne .L1457 + ldrb r0, [sp, #43] @ zero_extendqisi2 + subs r0, r0, #255 + movne r0, #1 +.L1437: + ldr r3, [sp, #24] + tst r3, #4 + beq .L1438 + ldr r1, [fp, #3168] + mov r0, r10 + add r1, r9, r1 + bl SandiskProgTestBadBlock +.L1438: + cmp r0, #0 + beq .L1439 + ldr r2, [sp, #4] + mov r1, r7 + ldr r0, .L1477+36 + add r8, r8, #1 + bl rk_printk + ldr r3, [sp, #12] + mov ip, #1 + ldr r2, [r4, #-1864] + uxth r8, r8 + and r0, r3, #31 + lsr r1, r3, #5 + ldr r3, [r2, r1, lsl #2] + orr r3, r3, ip, lsl r0 + str r3, [r2, r1, lsl #2] + ldr r2, [sp, #28] + ldrb r3, [r5, #3156] @ zero_extendqisi2 + mul r3, r2, r3 + cmp r8, r3 + bgt .L1440 +.L1439: + ldr r3, [sp, #4] + add r3, r3, #1 + str r3, [sp, #4] + ldr r3, [sp, #16] + add r9, r9, r3 + b .L1430 +.L1447: + mov r0, fp + bl FlashTestBlk + cmp r0, #0 + beq .L1446 + mov r1, fp + mov r0, r9 + bl rk_printk + ldr r1, [r4, #-1864] + lsr r0, fp, #5 + add r6, r6, #1 + and r3, fp, #31 + uxth r6, r6 + ldr r2, [r1, r0, lsl #2] + orr r3, r2, r10, lsl r3 + str r3, [r1, r0, lsl #2] +.L1446: + add fp, fp, #1 + uxth fp, fp + b .L1445 +.L1450: + mov r0, fp + bl FlashTestBlk + cmp r0, #0 + beq .L1449 + mov r1, fp + mov r0, r9 + bl rk_printk + ldr r1, [r4, #-1864] + lsr r0, fp, #5 + and r3, fp, #31 + ldr r2, [r1, r0, lsl #2] + orr r3, r2, r10, lsl r3 + str r3, [r1, r0, lsl #2] +.L1449: + sub fp, fp, #1 + uxth fp, fp + b .L1448 +.L1454: + sub r5, r5, #1 + uxth r5, r5 + b .L1453 +.L1429: + ldr r3, [sp, #8] + add r3, r3, #1 + str r3, [sp, #8] + b .L1428 +.L1478: + .align 2 +.L1477: + .word .LANCHOR2 + .word .LC27 + .word .LANCHOR0 + .word .LANCHOR2-2768 + .word .LC29 + .word .LC30 + .word .LANCHOR2-1754 + .word .LC31 + .word -3872 + .word .LC28 + .fnend + .size FlashMakeFactorBbt, .-FlashMakeFactorBbt + .align 2 + .global Ftl_log2 + .syntax unified + .arm + .fpu softvfp + .type Ftl_log2, %function +Ftl_log2: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + mov r1, #0 + mov r2, #1 +.L1480: + cmp r2, r0 + uxth r3, r1 + add r1, r1, #1 + bls .L1481 + sub r0, r3, #1 + uxth r0, r0 + bx lr +.L1481: + lsl r2, r2, #1 + b .L1480 + .fnend + .size Ftl_log2, .-Ftl_log2 + .align 2 + .global FtlPrintInfo + .syntax unified + .arm + .fpu softvfp + .type FtlPrintInfo, %function +FtlPrintInfo: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + bx lr + .fnend + .size FtlPrintInfo, .-FtlPrintInfo + .align 2 + .global FtlSysBlkNumInit + .syntax unified + .arm + .fpu softvfp + .type FtlSysBlkNumInit, %function +FtlSysBlkNumInit: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L1484 + cmp r0, #24 + movcc r0, #24 + sub r2, r3, #1728 + sub ip, r3, #1712 + ldrh r2, [r2, #-4] + ldrh r1, [ip, #-10] + str r0, [r3, #-1736] + mul r2, r0, r2 + sub r0, r1, r0 + ldr r1, [r3, #-1716] + strh r0, [ip, #-12] @ movhi + mov r0, #0 + str r2, [r3, #-1728] + sub r2, r1, r2 + str r2, [r3, #-1720] + bx lr +.L1485: + .align 2 +.L1484: + .word .LANCHOR2 + .fnend + .size FtlSysBlkNumInit, .-FtlSysBlkNumInit + .align 2 + .global FtlConstantsInit + .syntax unified + .arm + .fpu softvfp + .type FtlConstantsInit, %function +FtlConstantsInit: + .fnstart + @ args = 0, pretend = 0, frame = 24 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #28 + sub sp, sp, #28 + ldr ip, .L1514 + mov r9, r0 + ldrh r4, [r0, #14] + ldrh r5, [r0, #8] + mov r2, ip + ldrh r1, [r0, #10] + ldrh r3, [r0, #12] + mov r0, #0 + strh r4, [ip, #-10] @ movhi + str ip, [sp, #4] + add ip, ip, #6 + strh r5, [r2], #16 @ movhi + strh r1, [r2, #-14] @ movhi + strh r3, [r2, #-12] @ movhi + str r2, [sp, #8] +.L1487: + strb r0, [r0, ip] + add r0, r0, #1 + cmp r0, #32 + bne .L1487 + ldrh ip, [r9, #14] + ldrh r0, [r9, #20] + cmp r0, ip, lsr #8 + bcs .L1488 + uxtb r8, r3 + ldr r7, .L1514+4 + lsl r0, r8, #1 + uxtb r0, r0 + str r0, [sp, #12] + sub r0, r1, #1 + mul r0, r3, r0 + str r0, [sp, #20] + mov r0, #0 +.L1489: + cmp r0, r3 + bcs .L1491 + ldr r2, [sp, #20] + sub fp, r0, r3 + uxtb ip, r0 + add fp, r7, fp + add lr, r0, r2 + add r2, r7, lr + mov lr, #0 + str r2, [sp, #16] + mov r6, lr + b .L1492 +.L1490: + ldr r2, [sp, #16] + add r10, r8, ip + strb ip, [fp, lr] + add r6, r6, #1 + strb r10, [r2, lr] + ldr r2, [sp, #12] + add ip, r2, ip + uxtb ip, ip +.L1492: + cmp r6, r1 + add lr, lr, r3 + bcc .L1490 + add r0, r0, #1 + b .L1489 +.L1491: + ldr r2, [sp, #8] + lsl r1, r1, #1 + lsr r4, r4, #1 + strh r1, [r2, #-14] @ movhi + ldr r2, [sp, #4] + strh r4, [r2, #-10] @ movhi +.L1488: + ldr r2, [sp, #8] + cmp r5, #1 + ldr r1, .L1514+8 + mov r0, #5 + ldrh r10, [r9, #16] + ldrh r7, [r2, #-14] + strh r0, [r1, #-10] @ movhi + mov r0, #0 + strheq r5, [r1, #-10] @ movhi + ldr r5, .L1514+12 + smulbb r7, r7, r3 + strh r0, [r1, #-8] @ movhi + mov r0, #4352 + sub r2, r5, #1728 + strh r0, [r1, #-6] @ movhi + uxth r7, r7 + ldr r0, .L1514+16 + sub r6, r5, #1664 + strh r7, [r2, #-4] @ movhi + sub r8, r5, #1648 + ldr r2, [sp, #4] + ldrb fp, [r0, #36] @ zero_extendqisi2 + strh r10, [r6, #-2] @ movhi + ldrh r4, [r2, #-10] + cmp fp, #0 + ldrh r2, [r9, #20] + movne r0, #384 + strhne r0, [r1, #-6] @ movhi + smulbb r3, r3, r4 + ldrh r1, [r9, #18] + mov r0, r2 + strh r2, [r8, #-12] @ movhi + str r2, [sp, #8] + strh r3, [r6, #-4] @ movhi + smulbb r3, r7, r10 + strh r1, [r6] @ movhi + str r1, [sp, #12] + strh r3, [r8, #-14] @ movhi + bl Ftl_log2 + ldr r2, [sp, #8] + mov r3, r0 + strh r0, [r8, #-10] @ movhi + cmp r4, #1024 + ldr r1, [sp, #12] + str r3, [sp, #8] + lsl r0, r2, #9 + uxth r0, r0 + mul r1, r2, r1 + strh r0, [r8, #-8] @ movhi + lsr r0, r0, #8 + strh r0, [r8, #-6] @ movhi + ldrh r0, [r9, #26] + ldr r9, .L1514+20 + strh r0, [r8, #-4] @ movhi + mul r0, r4, r7 + str r0, [r5, #-1716] + uxtbhi r0, r4 + strhhi r0, [r6, #-8] @ movhi + ldrh r0, [r6, #-8] + sub r0, r4, r0 + lsl r4, r4, #6 + mul r0, r7, r0 + mul r0, r2, r0 + mul r10, r10, r0 + ldrh r0, [r6, #-6] + asr r10, r10, #11 + lsl r0, r0, #3 + str r10, [r5, #-1648] + bl __aeabi_idiv + uxth r0, r0 + ldr r3, [sp, #8] + mov r1, r7 + cmp r0, #4 + movls r2, #4 + strhhi r0, [r9, #-12] @ movhi + strhls r2, [r9, #-12] @ movhi + cmp fp, #0 + movne r2, #640 + ldrh r0, [r9, #-12] + strhne r2, [r6, #-6] @ movhi + ldrh r2, [r6, #-6] + asr r2, r2, r3 + add r3, r3, #9 + asr r4, r4, r3 + add r2, r2, #2 + strh r4, [r9, #-8] @ movhi + uxth r4, r4 + strh r2, [r9, #-10] @ movhi + mul r3, r4, r7 + add r4, r4, #8 + str r3, [r5, #-1636] + bl __aeabi_uidiv + uxtah r0, r4, r0 + cmp r7, #1 + sub r3, r5, #1728 + ldr r7, .L1514+24 + addeq r0, r0, #4 + sub r3, r3, #8 + str r0, [r5, #-1736] + ldrh r0, [r3] + bl FtlSysBlkNumInit + ldr r4, [r5, #-1720] + mov r0, #2048 + ldr r3, [r5, #-1736] + str r3, [r5, #-1632] + lsl r3, r4, #2 + ldrh r4, [r6, #-2] + ldrh r6, [r8, #-12] + mul r4, r4, r3 + ldrh r3, [r8, #-10] + mov r1, r6 + add r3, r3, #9 + lsr r4, r4, r3 + add r4, r4, #2 + uxth r4, r4 + strh r4, [r7, #-12] @ movhi + bl __aeabi_idiv + ldrh r2, [r9, #-12] + mov r3, #0 + strh r0, [r7, #-10] @ movhi + str r3, [r5, #-2736] + ldrb r0, [r5, #-2740] @ zero_extendqisi2 + add r3, r2, #3 + strh r3, [r9, #-12] @ movhi + ldr r3, [r5, #-1636] + cmp r0, #0 + addne r2, r2, #4 + add r1, r3, #3 + strhne r2, [r9, #-12] @ movhi + str r1, [r5, #-1636] + addne r3, r3, #5 + bne .L1513 + cmp r1, #7 + bhi .L1502 + mov r3, #8 +.L1513: + str r3, [r5, #-1636] +.L1502: + mov r3, #0 + mov r0, #0 + strh r3, [r7, #-8] @ movhi + ldr r3, [sp, #4] + ldrh r2, [r3, #-12] + lsr r3, r2, #3 + add r3, r3, r2, lsl #1 + add r3, r3, #52 + add r4, r3, r4, lsl #2 + cmp r4, r6, lsl #9 + movcc r3, #1 + strhcc r3, [r7, #-8] @ movhi + add sp, sp, #28 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L1515: + .align 2 +.L1514: + .word .LANCHOR2-1712 + .word .LANCHOR2-1706 + .word .LANCHOR2-1664 + .word .LANCHOR2 + .word .LANCHOR0 + .word .LANCHOR2-1632 + .word .LANCHOR2-1616 + .fnend + .size FtlConstantsInit, .-FtlConstantsInit + .align 2 + .global FtlMemInit + .syntax unified + .arm + .fpu softvfp + .type FtlMemInit, %function +FtlMemInit: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr} + movw r3, #65535 + ldr r4, .L1619 + mvn r2, #0 + mov r5, #0 + mov r0, #1024 + mov r8, #12 + mov r10, #36 + str r3, [r4, #-1552] + sub r3, r4, #1536 + strh r2, [r3] @ movhi + sub r3, r4, #1520 + strh r2, [r3, #-14] @ movhi + sub r6, r4, #1648 + strh r2, [r3, #-12] @ movhi + sub r7, r4, #1616 + strh r2, [r3, #-10] @ movhi + mov r2, #32 + strh r2, [r3, #-8] @ movhi + mov r2, #128 + strh r2, [r3, #-6] @ movhi + sub r9, r4, #1728 + strh r5, [r3, #-4] @ movhi + strh r5, [r3, #-2] @ movhi + strh r5, [r3] @ movhi + sub r3, r4, #1504 + strh r5, [r7, #-6] @ movhi + str r5, [r4, #-1620] + str r5, [r4, #-1616] + str r5, [r4, #-1612] + str r5, [r4, #-1608] + str r5, [r4, #-1604] + str r5, [r4, #-1600] + str r5, [r4, #-1596] + str r5, [r4, #-1592] + str r5, [r4, #-1588] + str r5, [r4, #-1584] + str r5, [r4, #-1580] + str r5, [r4, #-1576] + str r5, [r4, #-1572] + str r5, [r4, #-1568] + str r5, [r4, #-1564] + str r5, [r4, #-1560] + str r5, [r4, #-1556] + str r5, [r4, #-1548] + str r5, [r4, #-1544] + str r5, [r4, #-1540] + strh r5, [r3, #-14] @ movhi + ldrh r1, [r6, #-12] + bl __aeabi_idiv + ldrh r3, [r9, #-4] + str r0, [r4, #-1516] + str r5, [r4, #-1512] + lsl r3, r3, #2 + cmp r0, r3 + ldrh r0, [r6, #-14] + strhi r3, [r4, #-1516] + lsl r0, r0, #1 + bl ftl_malloc + str r0, [r4, #-1508] + ldrh r0, [r6, #-14] + mul r0, r8, r0 + bl ftl_malloc + ldrh r5, [r9, #-4] + str r0, [r4, #-1504] + mul r5, r10, r5 + lsl fp, r5, #3 + mov r0, fp + bl ftl_malloc + str r0, [r4, #-1500] + mov r0, r5 + bl ftl_malloc + str r0, [r4, #-1496] + mov r0, fp + bl ftl_malloc + str r0, [r4, #-1492] + mov r0, r5 + bl ftl_malloc + str r0, [r4, #-1488] + mov r0, r5 + bl ftl_malloc + str r0, [r4, #-1484] + ldr r0, [r4, #-1516] + mul r0, r10, r0 + bl ftl_malloc + ldrh r3, [r9, #-4] + ldrh r5, [r6, #-8] + str r0, [r4, #-1480] + lsl r3, r3, #1 + mov r0, r5 + add r3, r3, #1 + str r3, [r4, #-1476] + bl ftl_malloc + str r0, [r4, #-1472] + mov r0, r5 + bl ftl_malloc + str r0, [r4, #-1468] + mov r0, r5 + bl ftl_malloc + str r0, [r4, #-1464] + ldr r0, [r4, #-1476] + mul r0, r0, r5 + bl ftl_malloc + str r0, [r4, #-1460] + ldr r0, [r4, #-1516] + mul r0, r0, r5 + bl ftl_malloc + str r0, [r4, #-1456] + mov r0, r5 + bl ftl_malloc + str r0, [r4, #-1452] + mov r0, r5 + bl ftl_malloc + str r0, [r4, #-1448] + ldr r0, [r4, #-1476] + mul r0, r8, r0 + bl ftl_malloc + ldrh r3, [r6, #-6] + ldrh r5, [r9, #-4] + str r0, [r4, #-1444] + mul r5, r5, r3 + mov r0, r5 + bl ftl_malloc + str r0, [r4, #-1440] + lsl r0, r5, #3 + ldr r5, .L1619+4 + bl ftl_malloc + ldrh r3, [r6, #-6] + str r0, [r4, #-1436] + add r9, r5, #288 + ldr r0, [r4, #-1476] + mul r0, r0, r3 + bl ftl_malloc + ldrh r3, [r6, #-6] + str r0, [r4, #-1432] + ldr r0, [r4, #-1516] + mul r0, r0, r3 + bl ftl_malloc + str r0, [r4, #-1428] + ldrh r0, [r5, #-10] + lsl r0, r0, #1 + uxth r0, r0 + strh r0, [r9] @ movhi + bl ftl_malloc + str r0, [r4, #-1420] + ldrh r0, [r9] + ldr r3, .L1619+8 + add r0, r0, #544 + add r0, r0, #3 + lsr r0, r0, #9 + strh r0, [r9] @ movhi + and r0, r3, r0, lsl #9 + bl ftl_malloc + ldrh r9, [r5, #-10] + str r0, [r4, #-1416] + add r0, r0, #32 + str r0, [r4, #-1412] + lsl r9, r9, #1 + mov r0, r9 + bl ftl_malloc + str r0, [r4, #-1408] + mov r0, r9 + bl ftl_malloc + ldr r9, [r4, #-1636] + str r0, [r4, #-1404] + lsl r9, r9, #1 + mov r0, r9 + bl ftl_malloc + str r0, [r4, #-1400] + mov r0, r9 + bl ftl_malloc + str r0, [r4, #-1396] + ldrh r0, [r5, #-10] + lsr r0, r0, #3 + add r0, r0, #4 + bl ftl_malloc + ldr r3, .L1619+12 + str r0, [r3, #32] + ldrh r0, [r5, #68] + lsl r0, r0, #1 + bl ftl_malloc + str r0, [r4, #-1392] + ldrh r0, [r5, #68] + lsl r0, r0, #1 + bl ftl_malloc + str r0, [r4, #-1388] + ldrh r0, [r5, #68] + lsl r0, r0, #2 + bl ftl_malloc + str r0, [r4, #-1384] + ldrh r0, [r5, #70] + lsl r0, r0, #2 + bl ftl_malloc + ldrh r2, [r5, #70] + mov r1, #0 + str r0, [r4, #-1380] + lsl r2, r2, #2 + bl ftl_memset + ldrh r9, [r7, #-12] + lsl r9, r9, #2 + mov r0, r9 + bl ftl_malloc + str r0, [r4, #-1376] + mov r0, r9 + bl ftl_malloc + str r0, [r4, #-1372] + ldr r0, [r4, #-1636] + lsl r0, r0, #2 + bl ftl_malloc + str r0, [r4, #-1368] + ldrh r0, [r7, #-10] + mul r0, r8, r0 + bl ftl_malloc + ldrh r3, [r7, #-10] + add r7, r5, #16 + str r0, [r4, #-1364] + ldrh r0, [r6, #-8] + add r6, r5, #368 + mul r0, r0, r3 + bl ftl_malloc + ldrh r3, [r5, #-10] + str r0, [r4, #-1360] + mov r0, #6 + mul r0, r0, r3 + bl ftl_malloc + str r0, [r4, #-1356] + ldrh r0, [r5, #44] + ldrh r3, [r5, #2] + add r0, r0, #31 + asr r0, r0, #5 + strh r0, [r6, #-8] @ movhi + mul r0, r0, r3 + lsl r0, r0, #2 + bl ftl_malloc + ldrh r2, [r6, #-8] + mov r3, #1 + ldrh ip, [r5, #2] + add r5, r5, #392 + str r0, [r4, #-1320] + lsl r2, r2, #2 + mov r1, r2 +.L1518: + cmp r3, ip + bcc .L1519 + add r3, r6, r3, lsl #2 + mov r2, #0 + add r6, r6, #52 + add r3, r3, #20 +.L1520: + cmp r6, r3 + bne .L1521 + ldr r3, [r4, #-1400] + cmp r3, #0 + bne .L1522 +.L1524: + ldr r1, .L1619+16 + ldr r0, .L1619+20 + bl rk_printk + mvn r0, #0 + pop {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L1519: + ldr r0, [r4, #-1320] + add r3, r3, #1 + add r0, r0, r1 + add r1, r1, r2 + str r0, [r5, #4]! + b .L1518 +.L1521: + str r2, [r3, #4]! + b .L1520 +.L1522: + ldr r3, [r4, #-1396] + cmp r3, #0 + beq .L1524 + ldr r3, [r4, #-1376] + cmp r3, #0 + beq .L1524 + ldr r3, [r4, #-1368] + cmp r3, #0 + beq .L1524 + ldr r3, [r4, #-1364] + cmp r3, #0 + beq .L1524 + ldr r3, [r4, #-1360] + cmp r3, #0 + beq .L1524 + ldr r3, [r4, #-1356] + cmp r3, #0 + beq .L1524 + ldr r3, [r4, #-1320] + cmp r3, #0 + beq .L1524 + ldr r3, [r4, #-1404] + cmp r3, #0 + beq .L1524 + ldr r3, [r4, #-1508] + cmp r3, #0 + beq .L1524 + ldr r3, [r4, #-1504] + cmp r3, #0 + beq .L1524 + ldr r3, [r4, #-1500] + cmp r3, #0 + beq .L1524 + ldr r3, [r4, #-1492] + cmp r3, #0 + beq .L1524 + ldr r3, [r4, #-1488] + cmp r3, #0 + beq .L1524 + ldr r3, [r4, #-1484] + cmp r3, #0 + beq .L1524 + ldr r3, [r4, #-1496] + cmp r3, #0 + beq .L1524 + ldr r3, [r4, #-1472] + cmp r3, #0 + beq .L1524 + ldr r3, [r4, #-1468] + cmp r3, #0 + beq .L1524 + ldr r3, [r4, #-1464] + cmp r3, #0 + beq .L1524 + ldr r3, [r4, #-1460] + cmp r3, #0 + beq .L1524 + ldr r3, [r4, #-1452] + cmp r3, #0 + beq .L1524 + ldr r3, [r4, #-1448] + cmp r3, #0 + beq .L1524 + ldr r3, [r4, #-1444] + cmp r3, #0 + beq .L1524 + ldr r3, [r4, #-1440] + cmp r3, #0 + beq .L1524 + ldr r3, [r4, #-1436] + cmp r3, #0 + beq .L1524 + ldr r3, [r4, #-1432] + cmp r3, #0 + beq .L1524 + ldr r3, [r4, #-1412] + cmp r3, #0 + beq .L1524 + ldr r3, [r4, #-1420] + cmp r3, #0 + beq .L1524 + ldr r3, [r4, #-1392] + cmp r3, #0 + beq .L1524 + ldr r3, .L1619 + ldr r2, [r3, #-1388] + cmp r2, #0 + beq .L1524 + ldr r2, [r3, #-1384] + cmp r2, #0 + beq .L1524 + ldr r3, [r3, #-1380] + cmp r3, #0 + beq .L1524 + mov r0, #0 + pop {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L1620: + .align 2 +.L1619: + .word .LANCHOR2 + .word .LANCHOR2-1712 + .word 33553920 + .word .LANCHOR0 + .word .LANCHOR3+130 + .word .LC32 + .fnend + .size FtlMemInit, .-FtlMemInit + .align 2 + .global IsBlkInVendorPart + .syntax unified + .arm + .fpu softvfp + .type IsBlkInVendorPart, %function +IsBlkInVendorPart: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r2, .L1628 + sub r3, r2, #1280 + ldrh r3, [r3, #-8] + cmp r3, #0 + beq .L1627 + ldr r3, [r2, #-1392] + sub r2, r2, #1632 + ldrh r2, [r2, #-12] + add r2, r3, r2, lsl #1 +.L1623: + cmp r3, r2 + bne .L1624 +.L1627: + mov r0, #0 + bx lr +.L1624: + ldrh r1, [r3], #2 + cmp r0, r1 + bne .L1623 + mov r0, #1 + bx lr +.L1629: + .align 2 +.L1628: + .word .LANCHOR2 + .fnend + .size IsBlkInVendorPart, .-IsBlkInVendorPart + .align 2 + .global FtlCacheMetchLpa + .syntax unified + .arm + .fpu softvfp + .type FtlCacheMetchLpa, %function +FtlCacheMetchLpa: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r2, .L1640 + ldr r3, [r2, #-1512] + cmp r3, #0 + beq .L1633 + push {r4, r5, lr} + .save {r4, r5, lr} + mov r5, #36 + ldr r4, [r2, #-1480] + mov r2, #0 +.L1632: + mla ip, r5, r2, r4 + ldr lr, [ip, #16] + cmp lr, r1 + movhi ip, #0 + movls ip, #1 + cmp lr, r0 + movcc ip, #0 + cmp ip, #0 + bne .L1634 + add r2, r2, #1 + cmp r3, r2 + bne .L1632 + mov r0, ip + pop {r4, r5, pc} +.L1633: + mov r0, r3 + bx lr +.L1634: + mov r0, #1 + pop {r4, r5, pc} +.L1641: + .align 2 +.L1640: + .word .LANCHOR2 + .fnend + .size FtlCacheMetchLpa, .-FtlCacheMetchLpa + .align 2 + .global FtlGetCap + .syntax unified + .arm + .fpu softvfp + .type FtlGetCap, %function +FtlGetCap: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L1643 + ldr r0, [r3, #-2736] + bx lr +.L1644: + .align 2 +.L1643: + .word .LANCHOR2 + .fnend + .size FtlGetCap, .-FtlGetCap + .align 2 + .global FtlGetCapacity + .syntax unified + .arm + .fpu softvfp + .type FtlGetCapacity, %function +FtlGetCapacity: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L1646 + ldr r0, [r3, #-2736] + bx lr +.L1647: + .align 2 +.L1646: + .word .LANCHOR2 + .fnend + .size FtlGetCapacity, .-FtlGetCapacity + .align 2 + .global ftl_get_density + .syntax unified + .arm + .fpu softvfp + .type ftl_get_density, %function +ftl_get_density: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L1649 + ldr r0, [r3, #-2736] + bx lr +.L1650: + .align 2 +.L1649: + .word .LANCHOR2 + .fnend + .size ftl_get_density, .-ftl_get_density + .align 2 + .global FtlGetLpn + .syntax unified + .arm + .fpu softvfp + .type FtlGetLpn, %function +FtlGetLpn: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L1652 + ldr r0, [r3, #-1284] + bx lr +.L1653: + .align 2 +.L1652: + .word .LANCHOR2 + .fnend + .size FtlGetLpn, .-FtlGetLpn + .align 2 + .global FtlBbmMapBadBlock + .syntax unified + .arm + .fpu softvfp + .type FtlBbmMapBadBlock, %function +FtlBbmMapBadBlock: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r4, r5, r6, r7, lr} + .save {r4, r5, r6, r7, lr} + .pad #12 + mov r5, r0 + ldr r4, .L1656 + sub r3, r4, #1664 + ldrh r7, [r3, #-4] + mov r1, r7 + bl __aeabi_uidiv + uxth r6, r0 + mov r1, r7 + mov r0, r5 + bl __aeabi_uidivmod + add r2, r4, r6, lsl #2 + uxth r3, r1 + ldr r2, [r2, #-1320] + lsr r1, r3, #5 + and ip, r3, #31 + mov lr, #1 + ldr r0, [r2, r1, lsl #2] + orr r0, r0, lr, lsl ip + str r0, [r2, r1, lsl #2] + mov r2, r6 + str r0, [sp] + mov r1, r5 + ldr r0, .L1656+4 + bl rk_printk + sub r3, r4, #1344 + mov r0, #0 + ldrh r2, [r3, #2] + add r2, r2, #1 + strh r2, [r3, #2] @ movhi + add sp, sp, #12 + @ sp needed + pop {r4, r5, r6, r7, pc} +.L1657: + .align 2 +.L1656: + .word .LANCHOR2 + .word .LC33 + .fnend + .size FtlBbmMapBadBlock, .-FtlBbmMapBadBlock + .align 2 + .global FtlBbmIsBadBlock + .syntax unified + .arm + .fpu softvfp + .type FtlBbmIsBadBlock, %function +FtlBbmIsBadBlock: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + mov r7, r0 + ldr r5, .L1660 + sub r3, r5, #1664 + ldrh r6, [r3, #-4] + mov r1, r6 + bl __aeabi_uidivmod + mov r0, r7 + uxth r4, r1 + mov r1, r6 + bl __aeabi_uidiv + uxth r0, r0 + lsr r2, r4, #5 + add r5, r5, r0, lsl #2 + and r4, r4, #31 + ldr r3, [r5, #-1320] + ldr r0, [r3, r2, lsl #2] + lsr r0, r0, r4 + and r0, r0, #1 + pop {r4, r5, r6, r7, r8, pc} +.L1661: + .align 2 +.L1660: + .word .LANCHOR2 + .fnend + .size FtlBbmIsBadBlock, .-FtlBbmIsBadBlock + .align 2 + .global FtlBbtInfoPrint + .syntax unified + .arm + .fpu softvfp + .type FtlBbtInfoPrint, %function +FtlBbtInfoPrint: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + bx lr + .fnend + .size FtlBbtInfoPrint, .-FtlBbtInfoPrint + .align 2 + .global FtlBbt2Bitmap + .syntax unified + .arm + .fpu softvfp + .type FtlBbt2Bitmap, %function +FtlBbt2Bitmap: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + mov r6, r1 + ldr r5, .L1669 + mov r4, r0 + mov r1, #0 + mov r0, r6 + ldrh r2, [r5, #-8] + sub r5, r5, #4 + lsl r2, r2, #2 + bl ftl_memset + add r0, r4, #1020 + sub r2, r4, #2 + add r0, r0, #2 + movw r4, #65535 + mov lr, #1 +.L1665: + ldrh r3, [r2, #2]! + cmp r3, r4 + popeq {r4, r5, r6, pc} + lsr ip, r3, #5 + and r3, r3, #31 + cmp r2, r0 + ldr r1, [r6, ip, lsl #2] + orr r3, r1, lr, lsl r3 + str r3, [r6, ip, lsl #2] + ldrh r3, [r5, #6] + add r3, r3, #1 + strh r3, [r5, #6] @ movhi + bne .L1665 + pop {r4, r5, r6, pc} +.L1670: + .align 2 +.L1669: + .word .LANCHOR2-1344 + .fnend + .size FtlBbt2Bitmap, .-FtlBbt2Bitmap + .align 2 + .global FtlBbmTblFlush + .syntax unified + .arm + .fpu softvfp + .type FtlBbmTblFlush, %function +FtlBbmTblFlush: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + .pad #8 + ldr r4, .L1686 + ldr r6, [r4, #-1280] + cmp r6, #0 + bne .L1673 + ldr r0, [r4, #-1472] + sub r7, r4, #1648 + ldr r3, [r4, #-1440] + sub r5, r4, #1344 + ldrh r2, [r7, #-8] + add r7, r7, #324 + mov r1, r6 + str r0, [r4, #-1268] + str r3, [r4, #-1264] + bl ftl_memset +.L1674: + ldr r3, .L1686+4 + ldrh r3, [r3] + cmp r6, r3 + blt .L1675 + ldr r6, [r4, #-1264] + mov r2, #16 + mov r1, #255 + ldr r9, .L1686+8 + mov r7, #0 + mov r0, r6 + mov r8, r7 + bl ftl_memset + ldr r3, .L1686+12 + strh r3, [r6] @ movhi + ldr r3, [r4, #-1340] + str r3, [r6, #4] + ldrh r3, [r5, #-4] + strh r3, [r6, #2] @ movhi + ldrh r3, [r5], #-4 + strh r3, [r6, #8] @ movhi + ldrh r3, [r5, #6] + strh r3, [r6, #10] @ movhi + ldr r3, [r4, #-1736] + strh r3, [r6, #12] @ movhi +.L1676: + ldr r3, [r4, #-1472] + mov r10, #0 + ldrh r2, [r5, #2] + ldrh r1, [r5] + str r3, [r4, #-1268] + ldr r3, [r4, #-1440] + str r10, [r4, #-1276] + str r3, [r4, #-1264] + orr r3, r2, r1, lsl #10 + ldrh r0, [r6, #10] + str r3, [r4, #-1272] + ldrh r3, [r5, #4] + str r0, [sp] + mov r0, r9 + bl rk_printk + ldr r3, .L1686+16 + ldrh r2, [r5, #2] + ldrh r3, [r3] + sub r3, r3, #1 + cmp r2, r3 + blt .L1677 + ldr r3, [r4, #-1340] + ldrh r2, [r5] + ldr r0, [r4, #-1488] + add r3, r3, #1 + strh r10, [r5, #2] @ movhi + str r3, [r4, #-1340] + str r3, [r6, #4] + ldrh r3, [r5, #4] + strh r2, [r6, #8] @ movhi + strh r2, [r5, #4] @ movhi + mov r2, #1 + strh r3, [r5] @ movhi + mov r1, r2 + lsl r3, r3, #10 + str r3, [r4, #-1272] + str r3, [r0, #4] + bl FlashEraseBlocks +.L1677: + mov r3, #1 + ldr r0, .L1686+20 + mov r2, r3 + mov r1, r3 + bl FlashProgPages + ldrh r3, [r5, #2] + add r3, r3, #1 + strh r3, [r5, #2] @ movhi + ldr r3, [r4, #-1276] + cmn r3, #1 + bne .L1678 + add r7, r7, #1 + ldr r1, [r4, #-1272] + uxth r7, r7 + ldr r0, .L1686+24 + bl rk_printk + cmp r7, #3 + bls .L1676 + mov r2, r7 + ldr r1, [r4, #-1272] + ldr r0, .L1686+28 + bl rk_printk + mov r3, #1 + str r3, [r4, #-1280] +.L1673: + mov r0, #0 + add sp, sp, #8 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L1675: + ldrh r2, [r5, #-8] + ldr r3, [r4, #-1268] + ldr r1, [r7, #4]! + mul r0, r6, r2 + lsl r2, r2, #2 + add r6, r6, #1 + add r0, r3, r0, lsl #2 + bl ftl_memcpy + b .L1674 +.L1681: + mov r8, #1 + b .L1676 +.L1678: + add r8, r8, #1 + cmp r8, #1 + ble .L1681 + cmp r3, #256 + bne .L1673 + b .L1676 +.L1687: + .align 2 +.L1686: + .word .LANCHOR2 + .word .LANCHOR2-1710 + .word .LC34 + .word -3887 + .word .LANCHOR2-1664 + .word .LANCHOR2-1276 + .word .LC35 + .word .LC36 + .fnend + .size FtlBbmTblFlush, .-FtlBbmTblFlush + .align 2 + .global FtlLoadFactoryBbt + .syntax unified + .arm + .fpu softvfp + .type FtlLoadFactoryBbt, %function +FtlLoadFactoryBbt: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + mov r8, #0 + ldr r5, .L1699 + ldr r3, [r5, #-1472] + sub r7, r5, #1328 + ldr r10, [r5, #-1440] + sub r9, r5, #1264 + sub r7, r7, #10 + sub r9, r9, #12 + str r3, [r5, #-1268] + str r10, [r5, #-1264] +.L1689: + ldr r6, .L1699+4 + ldrh r3, [r6] + cmp r8, r3 + bcc .L1694 + mov r0, #0 + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L1694: + ldrh r4, [r6, #42] + mvn r3, #0 + add r6, r6, #46 + strh r3, [r7, #2]! @ movhi + add r4, r4, r3 + uxth r4, r4 +.L1690: + ldrh r3, [r6, #-4] + sub r2, r3, #16 + cmp r4, r2 + ble .L1692 + mla r3, r8, r3, r4 + mov r2, #1 + mov r1, r2 + mov r0, r9 + lsl r3, r3, #10 + str r3, [r5, #-1272] + bl FlashReadPages + ldr r3, [r5, #-1276] + cmn r3, #1 + beq .L1691 + ldrh r2, [r10] + movw r3, #61664 + cmp r2, r3 + bne .L1691 + strh r4, [r7] @ movhi +.L1692: + add r8, r8, #1 + b .L1689 +.L1691: + sub r4, r4, #1 + uxth r4, r4 + b .L1690 +.L1700: + .align 2 +.L1699: + .word .LANCHOR2 + .word .LANCHOR2-1710 + .fnend + .size FtlLoadFactoryBbt, .-FtlLoadFactoryBbt + .align 2 + .global FtlBbtMemInit + .syntax unified + .arm + .fpu softvfp + .type FtlBbtMemInit, %function +FtlBbtMemInit: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r0, .L1702 + mvn r2, #0 + mov r1, #255 + strh r2, [r0, #-4] @ movhi + mov r2, #0 + strh r2, [r0, #2] @ movhi + mov r2, #16 + add r0, r0, #8 + b ftl_memset +.L1703: + .align 2 +.L1702: + .word .LANCHOR2-1344 + .fnend + .size FtlBbtMemInit, .-FtlBbtMemInit + .align 2 + .global FtlBbtCalcTotleCnt + .syntax unified + .arm + .fpu softvfp + .type FtlBbtCalcTotleCnt, %function +FtlBbtCalcTotleCnt: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L1712 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + mov r5, #0 + mov r4, r5 + ldrh r2, [r3, #-4] + ldrh r6, [r3, #-46] + mul r6, r6, r2 +.L1705: + uxth r0, r5 + cmp r0, r6 + blt .L1707 + mov r0, r4 + pop {r4, r5, r6, pc} +.L1707: + bl FtlBbmIsBadBlock + cmp r0, #0 + add r5, r5, #1 + addne r4, r4, #1 + uxthne r4, r4 + b .L1705 +.L1713: + .align 2 +.L1712: + .word .LANCHOR2-1664 + .fnend + .size FtlBbtCalcTotleCnt, .-FtlBbtCalcTotleCnt + .align 2 + .global FtlMakeBbt + .syntax unified + .arm + .fpu softvfp + .type FtlMakeBbt, %function +FtlMakeBbt: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #12 + ldr r4, .L1735 + ldr r7, [r4, #-1280] + cmp r7, #0 + bne .L1715 + ldr r10, .L1735+4 + sub fp, r4, #1264 + sub r8, r4, #1344 + sub fp, fp, #12 + bl FtlBbtMemInit + sub r9, r10, #18 + bl FtlLoadFactoryBbt +.L1716: + ldr r5, .L1735+8 + ldrh r3, [r5] + cmp r7, r3 + bcc .L1722 + mov r5, #0 +.L1723: + ldr r3, .L1735+12 + uxth r0, r5 + add r5, r5, #1 + ldrh r3, [r3] + cmp r3, r0 + bhi .L1724 + sub r6, r8, #4 + ldrh r5, [r6, #12] + movw r7, #65535 + sub r5, r5, #1 + uxth r5, r5 +.L1725: + ldrh r3, [r6, #12] + sub r3, r3, #48 + cmp r5, r3 + ble .L1729 + mov r0, r5 + bl FtlBbmIsBadBlock + cmp r0, #1 + beq .L1726 + mov r0, r5 + bl FlashTestBlk + cmp r0, #0 + beq .L1727 + mov r0, r5 + bl FtlBbmMapBadBlock +.L1726: + sub r5, r5, #1 + uxth r5, r5 + b .L1725 +.L1722: + ldr r3, [r4, #-1440] + movw r2, #65535 + ldr r0, [r4, #-1472] + str r3, [sp, #4] + str r3, [r4, #-1264] + ldrh r3, [r9, #2]! + str r0, [r4, #-1268] + cmp r3, r2 + beq .L1717 + ldrh r6, [r5, #42] + mov r2, #1 + mov r1, r2 + mov r0, fp + mla r6, r7, r6, r3 + lsl r3, r6, #10 + str r3, [r4, #-1272] + bl FlashReadPages + ldrh r2, [r5, #42] + ldr r1, [r4, #-1268] + ldr r0, [r10] + add r2, r2, #7 + asr r2, r2, #3 + bl ftl_memcpy +.L1718: + uxth r0, r6 + add r7, r7, #1 + add r10, r10, #4 + bl FtlBbmMapBadBlock + b .L1716 +.L1717: + mov r1, r7 + bl FlashGetBadBlockList + ldr r1, [r10] + ldr r0, [r4, #-1268] + bl FtlBbt2Bitmap + ldrh r5, [r5, #42] +.L1720: + sub r5, r5, #1 + uxth r5, r5 +.L1719: + ldr r3, .L1735+16 + ldrh r0, [r3, #-4] + smlabb r0, r0, r7, r5 + uxth r0, r0 + bl FtlBbmIsBadBlock + cmp r0, #1 + beq .L1720 + mov r2, #16 + mov r1, #0 + strh r5, [r9] @ movhi + ldr r0, [r4, #-1440] + bl ftl_memset + ldr r3, [sp, #4] + movw r2, 61664 @ movhi + strh r2, [r3] @ movhi + mov r3, #0 + ldr r2, [sp, #4] + str r3, [r2, #4] + ldrh r3, [r9] + strh r3, [r2, #2] @ movhi + ldr r3, .L1735+16 + ldrh r2, [r8, #-8] + ldr r1, [r10] + ldrh r6, [r3, #-4] + ldrh r3, [r9] + lsl r2, r2, #2 + ldr r0, [r4, #-1268] + mla r6, r7, r6, r3 + lsl r3, r6, #10 + str r3, [r4, #-1272] + bl ftl_memcpy + mov r2, #1 + mov r0, fp + mov r1, r2 + bl FlashEraseBlocks + mov r3, #1 + mov r0, fp + mov r2, r3 + mov r1, r3 + bl FlashProgPages + ldr r3, [r4, #-1276] + cmn r3, #1 + bne .L1718 + uxth r0, r6 + bl FtlBbmMapBadBlock + b .L1719 +.L1724: + bl FtlBbmMapBadBlock + b .L1723 +.L1727: + ldrh r3, [r6] + cmp r3, r7 + strheq r5, [r6] @ movhi + beq .L1726 +.L1728: + strh r5, [r6, #4] @ movhi +.L1729: + ldrh r3, [r8, #-4] + sub r5, r8, #4 + ldr r0, [r4, #-1488] + mov r6, #0 + str r6, [r4, #-1340] + mov r2, #2 + mov r1, #1 + strh r6, [r8, #-2] @ movhi + lsl r3, r3, #10 + str r3, [r0, #4] + ldrh r3, [r5, #4] + lsl r3, r3, #10 + str r3, [r0, #40] + bl FlashEraseBlocks + ldrh r0, [r8, #-4] + bl FtlBbmMapBadBlock + ldrh r0, [r5, #4] + bl FtlBbmMapBadBlock + bl FtlBbmTblFlush + ldr r3, [r4, #-1340] + ldrh r2, [r5, #4] + strh r6, [r8, #-2] @ movhi + add r3, r3, #1 + str r3, [r4, #-1340] + ldrh r3, [r8, #-4] + strh r2, [r8, #-4] @ movhi + strh r3, [r5, #4] @ movhi + bl FtlBbmTblFlush +.L1715: + mov r0, #0 + add sp, sp, #12 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L1736: + .align 2 +.L1735: + .word .LANCHOR2 + .word .LANCHOR2-1320 + .word .LANCHOR2-1710 + .word .LANCHOR2-1652 + .word .LANCHOR2-1664 + .fnend + .size FtlMakeBbt, .-FtlMakeBbt + .align 2 + .global V2P_block + .syntax unified + .arm + .fpu softvfp + .type V2P_block, %function +V2P_block: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + mov r5, r1 + ldr r4, .L1739 + mov r7, r0 + sub r3, r4, #1696 + sub r4, r4, #1664 + ldrh r6, [r3, #-12] + mov r1, r6 + bl __aeabi_uidiv + ldrh r4, [r4, #-4] + smulbb r5, r6, r5 + mov r1, r6 + smulbb r4, r4, r0 + mov r0, r7 + bl __aeabi_uidivmod + add r0, r5, r1 + add r0, r4, r0 + uxth r0, r0 + pop {r4, r5, r6, r7, r8, pc} +.L1740: + .align 2 +.L1739: + .word .LANCHOR2 + .fnend + .size V2P_block, .-V2P_block + .align 2 + .global P2V_plane + .syntax unified + .arm + .fpu softvfp + .type P2V_plane, %function +P2V_plane: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L1743 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + mov r6, r0 + sub r2, r3, #1696 + sub r3, r3, #1664 + ldrh r5, [r2, #-12] + ldrh r1, [r3, #-4] + bl __aeabi_uidiv + mov r1, r5 + smulbb r4, r0, r5 + mov r0, r6 + bl __aeabi_uidivmod + add r1, r4, r1 + uxth r0, r1 + pop {r4, r5, r6, pc} +.L1744: + .align 2 +.L1743: + .word .LANCHOR2 + .fnend + .size P2V_plane, .-P2V_plane + .align 2 + .global P2V_block_in_plane + .syntax unified + .arm + .fpu softvfp + .type P2V_block_in_plane, %function +P2V_block_in_plane: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, lr} + .save {r4, lr} + ldr r4, .L1747 + sub r3, r4, #1664 + sub r4, r4, #1696 + ldrh r1, [r3, #-4] + bl __aeabi_uidivmod + uxth r0, r1 + ldrh r1, [r4, #-12] + bl __aeabi_uidiv + uxth r0, r0 + pop {r4, pc} +.L1748: + .align 2 +.L1747: + .word .LANCHOR2 + .fnend + .size P2V_block_in_plane, .-P2V_block_in_plane + .align 2 + .global ftl_cmp_data_ver + .syntax unified + .arm + .fpu softvfp + .type ftl_cmp_data_ver, %function +ftl_cmp_data_ver: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + cmp r0, r1 + bls .L1750 + sub r0, r0, r1 + cmp r0, #-2147483648 + movhi r0, #0 + movls r0, #1 + bx lr +.L1750: + sub r0, r1, r0 + cmp r0, #-2147483648 + movls r0, #0 + movhi r0, #1 + bx lr + .fnend + .size ftl_cmp_data_ver, .-ftl_cmp_data_ver + .align 2 + .global FtlGetLastWrittenPage + .syntax unified + .arm + .fpu softvfp + .type FtlGetLastWrittenPage, %function +FtlGetLastWrittenPage: + .fnstart + @ args = 0, pretend = 0, frame = 104 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L1764 + cmp r1, #1 + push {r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + lsl r8, r0, #10 + .pad #104 + sub sp, sp, #104 + mov r2, r1 + mov r7, r1 + ldrheq r5, [r3] + mov r6, #0 + ldrhne r5, [r3, #-2] + add r3, sp, #40 + str r3, [sp, #16] + mov r1, #1 + add r0, sp, #4 + str r6, [sp, #12] + sub r5, r5, #1 + sxth r5, r5 + orr r3, r5, r8 + str r3, [sp, #8] + bl FlashReadPages + ldr r3, [sp, #40] + cmn r3, #1 + bne .L1755 +.L1756: + cmp r6, r5 + ble .L1759 +.L1755: + mov r0, r5 + add sp, sp, #104 + @ sp needed + pop {r4, r5, r6, r7, r8, pc} +.L1759: + add r3, r6, r5 + mov r2, r7 + add r3, r3, r3, lsr #31 + mov r1, #1 + add r0, sp, #4 + asr r4, r3, #1 + sxth r3, r4 + orr r3, r3, r8 + str r3, [sp, #8] + bl FlashReadPages + ldr r3, [sp, #40] + cmn r3, #1 + bne .L1757 + ldr r3, [sp, #44] + cmn r3, #1 + bne .L1757 + ldr r3, [sp, #4] + cmn r3, #1 + subne r4, r4, #1 + sxthne r5, r4 + bne .L1756 +.L1757: + add r4, r4, #1 + sxth r6, r4 + b .L1756 +.L1765: + .align 2 +.L1764: + .word .LANCHOR2-1664 + .fnend + .size FtlGetLastWrittenPage, .-FtlGetLastWrittenPage + .align 2 + .global FtlLoadBbt + .syntax unified + .arm + .fpu softvfp + .type FtlLoadBbt, %function +FtlLoadBbt: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + ldr r4, .L1798 + ldr r3, [r4, #-1472] + sub r7, r4, #1664 + ldr r6, [r4, #-1440] + sub r8, r4, #1264 + sub r8, r8, #12 + str r3, [r4, #-1268] + str r6, [r4, #-1264] + bl FtlBbtMemInit + ldrh r5, [r7, #-4] + sub r5, r5, #1 + uxth r5, r5 +.L1767: + ldrh r3, [r7, #-4] + sub r3, r3, #48 + cmp r5, r3 + ble .L1770 + lsl r3, r5, #10 + mov r2, #1 + mov r1, r2 + mov r0, r8 + str r3, [r4, #-1272] + bl FlashReadPages + ldr r3, [r4, #-1276] + cmn r3, #1 + bne .L1768 + ldr r3, [r4, #-1272] + mov r2, #1 + mov r1, r2 + mov r0, r8 + add r3, r3, #1 + str r3, [r4, #-1272] + bl FlashReadPages +.L1768: + ldr r3, [r4, #-1276] + cmn r3, #1 + beq .L1769 + ldrh r2, [r6] + movw r3, #61649 + cmp r2, r3 + bne .L1769 + ldr r2, [r6, #4] + ldr r3, .L1798+4 + str r2, [r4, #-1340] + ldrh r2, [r6, #8] + strh r5, [r3, #-4] @ movhi + strh r2, [r3] @ movhi +.L1770: + ldr r5, .L1798+4 + movw r2, #65535 + ldrh r3, [r5, #-4] + sub r7, r5, #4 + cmp r3, r2 + beq .L1784 + ldrh r3, [r7, #4] + cmp r3, r2 + beq .L1774 + lsl r3, r3, #10 + mov r2, #1 + mov r1, r2 + add r0, r5, #68 + str r3, [r4, #-1272] + bl FlashReadPages + ldr r3, [r4, #-1276] + cmn r3, #1 + beq .L1774 + ldrh r2, [r6] + movw r3, #61649 + cmp r2, r3 + bne .L1774 + ldr r3, [r6, #4] + ldr r2, [r4, #-1340] + cmp r3, r2 + ldrhhi r2, [r7, #4] + strhi r3, [r4, #-1340] + ldrhhi r3, [r6, #8] + strhhi r2, [r5, #-4] @ movhi + strhhi r3, [r7, #4] @ movhi +.L1774: + ldr r8, .L1798+8 + mov r1, #1 + ldrh r0, [r5, #-4] + bl FtlGetLastWrittenPage + sxth r7, r0 + add r0, r0, #1 + strh r0, [r5, #-2] @ movhi +.L1776: + cmp r7, #0 + blt .L1781 + ldrh r3, [r5, #-4] + mov r2, #1 + mov r1, r2 + mov r0, r8 + orr r3, r7, r3, lsl #10 + str r3, [r4, #-1272] + ldr r3, [r4, #-1472] + str r3, [r4, #-1268] + bl FlashReadPages + ldr r3, [r4, #-1276] + cmn r3, #1 + beq .L1777 + ldrh r2, [r6] + movw r3, #61649 + cmp r2, r3 + bne .L1777 +.L1781: + ldrh r3, [r6, #10] + ldrh r0, [r6, #12] + strh r3, [r5, #2] @ movhi + movw r3, #65535 + cmp r0, r3 + bne .L1778 +.L1779: + add r7, r5, #20 + mov r6, #0 +.L1782: + ldr r3, .L1798+12 + ldrh r3, [r3] + cmp r6, r3 + bcc .L1783 + mov r0, #0 + pop {r4, r5, r6, r7, r8, pc} +.L1769: + sub r5, r5, #1 + uxth r5, r5 + b .L1767 +.L1777: + sub r7, r7, #1 + sxth r7, r7 + b .L1776 +.L1778: + ldr r2, [r4, #-1736] + cmp r0, r2 + beq .L1779 + ldr r3, .L1798+16 + ldrh r3, [r3, #-10] + lsr r3, r3, #2 + cmp r2, r3 + cmpcc r0, r3 + bcs .L1779 + bl FtlSysBlkNumInit + b .L1779 +.L1783: + ldrh r2, [r5, #-8] + ldr r1, [r4, #-1268] + ldr r0, [r7, #4]! + lsl r2, r2, #2 + mla r1, r6, r2, r1 + add r6, r6, #1 + bl ftl_memcpy + b .L1782 +.L1784: + mvn r0, #0 + pop {r4, r5, r6, r7, r8, pc} +.L1799: + .align 2 +.L1798: + .word .LANCHOR2 + .word .LANCHOR2-1344 + .word .LANCHOR2-1276 + .word .LANCHOR2-1710 + .word .LANCHOR2-1712 + .fnend + .size FtlLoadBbt, .-FtlLoadBbt + .align 2 + .global FtlFreeSysBlkQueueInit + .syntax unified + .arm + .fpu softvfp + .type FtlFreeSysBlkQueueInit, %function +FtlFreeSysBlkQueueInit: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L1802 + mov r2, #2048 + push {r4, lr} + .save {r4, lr} + mov r4, #0 + mov r1, r4 + strh r0, [r3, #-8] @ movhi + mov r0, r3 + strh r4, [r3, #-6] @ movhi + strh r4, [r3, #-4] @ movhi + strh r4, [r3, #-2] @ movhi + bl ftl_memset + mov r0, r4 + pop {r4, pc} +.L1803: + .align 2 +.L1802: + .word .LANCHOR2-1232 + .fnend + .size FtlFreeSysBlkQueueInit, .-FtlFreeSysBlkQueueInit + .align 2 + .global FtlFreeSysBlkQueueEmpty + .syntax unified + .arm + .fpu softvfp + .type FtlFreeSysBlkQueueEmpty, %function +FtlFreeSysBlkQueueEmpty: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L1805 + ldrh r0, [r3, #6] + clz r0, r0 + lsr r0, r0, #5 + bx lr +.L1806: + .align 2 +.L1805: + .word .LANCHOR2-1240 + .fnend + .size FtlFreeSysBlkQueueEmpty, .-FtlFreeSysBlkQueueEmpty + .align 2 + .global FtlFreeSysBlkQueueFull + .syntax unified + .arm + .fpu softvfp + .type FtlFreeSysBlkQueueFull, %function +FtlFreeSysBlkQueueFull: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L1808 + ldrh r0, [r3, #6] + sub r0, r0, #1024 + clz r0, r0 + lsr r0, r0, #5 + bx lr +.L1809: + .align 2 +.L1808: + .word .LANCHOR2-1240 + .fnend + .size FtlFreeSysBlkQueueFull, .-FtlFreeSysBlkQueueFull + .align 2 + .global FtlFreeSysBlkQueueIn + .syntax unified + .arm + .fpu softvfp + .type FtlFreeSysBlkQueueIn, %function +FtlFreeSysBlkQueueIn: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + sub r3, r0, #1 + movw r2, #65533 + uxth r3, r3 + cmp r3, r2 + bxhi lr + push {r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + ldr r5, .L1823 + sub r3, r5, #1232 + ldrh r2, [r3, #-2] + mov r4, r3 + cmp r2, #1024 + popeq {r4, r5, r6, r7, r8, pc} + cmp r1, #0 + mov r6, r0 + beq .L1812 + ldr r3, [r5, #-1280] + cmp r3, #0 + bne .L1812 + bl P2V_block_in_plane + mov r7, r0 + ldr r0, [r5, #-1488] + lsl r3, r6, #10 + mov r2, #1 + mov r1, r2 + str r3, [r0, #4] + bl FlashEraseBlocks + ldr r2, [r5, #-1412] + lsl r0, r7, #1 + ldrh r3, [r2, r0] + add r3, r3, #1 + strh r3, [r2, r0] @ movhi + ldr r3, [r5, #-1572] + add r3, r3, #1 + str r3, [r5, #-1572] +.L1812: + ldrh r2, [r4, #-2] + sub r3, r4, #8 + add r2, r2, #1 + strh r2, [r4, #-2] @ movhi + ldrh r2, [r4, #-4] + add r1, r3, r2, lsl #1 + add r2, r2, #1 + ubfx r2, r2, #0, #10 + strh r6, [r1, #8] @ movhi + strh r2, [r4, #-4] @ movhi + pop {r4, r5, r6, r7, r8, pc} +.L1824: + .align 2 +.L1823: + .word .LANCHOR2 + .fnend + .size FtlFreeSysBlkQueueIn, .-FtlFreeSysBlkQueueIn + .align 2 + .global FtlLowFormatEraseBlock + .syntax unified + .arm + .fpu softvfp + .type FtlLowFormatEraseBlock, %function +FtlLowFormatEraseBlock: + .fnstart + @ args = 0, pretend = 0, frame = 24 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L1870 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #28 + sub sp, sp, #28 + ldr r2, [r3, #-1280] + cmp r2, #0 + movne r4, #0 + bne .L1825 + mov r10, r3 + ldrb r3, [r3, #-1870] @ zero_extendqisi2 + ldrb r8, [r10, #-2740] @ zero_extendqisi2 + mov r7, r1 + mov fp, r2 + mov r5, r2 + mov r4, r2 + mov r9, #36 + str r0, [sp, #4] + str r3, [sp, #16] + str r0, [r10, #-1540] +.L1827: + ldr r1, .L1870+4 + ldrh r0, [r1] + uxth r1, fp + cmp r0, r1 + bhi .L1831 + cmp r5, #0 + beq .L1825 + adds r8, r8, #0 + mov r6, #0 + movne r8, #1 + mov r2, r5 + mov r1, r8 + ldr r0, [r10, #-1488] + strb r6, [r10, #-1870] + mov r9, #36 + bl FlashEraseBlocks + ldrb r3, [sp, #16] @ zero_extendqisi2 + strb r3, [r10, #-1870] +.L1833: + uxth r2, r6 + cmp r5, r2 + bhi .L1835 + cmp r7, #0 + bne .L1836 + uxth r8, r8 + mov r3, #6 + str r3, [sp, #12] + mov r3, #1 + str r3, [sp, #8] +.L1837: + ldr r5, .L1870 + mov fp, #0 +.L1846: + mov r10, #0 + mov r6, r10 +.L1838: + ldr r3, .L1870+8 + ldrh r1, [r3, #-4] + uxth r3, r10 + cmp r1, r3 + bhi .L1841 + cmp r6, #0 + beq .L1825 + mov r3, #1 + mov r2, r8 + mov r9, #0 + mov r1, r6 + ldr r0, [r5, #-1488] + strb r9, [r5, #-1870] + bl FlashProgPages + ldrb r3, [sp, #16] @ zero_extendqisi2 + mov r2, #36 + strb r3, [r5, #-1870] +.L1843: + uxth r3, r9 + cmp r6, r3 + bhi .L1845 + ldr r3, [sp, #12] + add fp, fp, r3 + ldr r3, [sp, #8] + uxth fp, fp + cmp r3, fp + bhi .L1846 + mov r9, #0 + mov fp, #36 +.L1847: + uxth r3, r9 + cmp r6, r3 + bhi .L1849 + ldr r3, [sp, #4] + adds r7, r7, #0 + movne r7, #1 + cmp r3, #63 + movhi r10, r7 + orrls r10, r7, #1 + cmp r10, #0 + beq .L1825 + mov r2, r6 + mov r1, r8 + ldr r0, [r5, #-1488] + bl FlashEraseBlocks +.L1825: + mov r0, r4 + add sp, sp, #28 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L1831: + uxth r1, fp + ldr ip, [r10, #-1488] + mov r3, #0 + mul r0, r9, r1 + str r3, [ip, r0] + add r0, r10, r1 + ldrb r0, [r0, #-1706] @ zero_extendqisi2 + ldr r1, [sp, #4] + bl V2P_block + cmp r7, #0 + mov r6, r0 + beq .L1828 + bl IsBlkInVendorPart + cmp r0, #0 + bne .L1829 +.L1828: + mov r0, r6 + bl FtlBbmIsBadBlock + cmp r0, #0 + addne r4, r4, #1 + uxthne r4, r4 + bne .L1829 + ldr r1, .L1870+12 + lsl r6, r6, #10 + ldr ip, [r10, #-1488] + ldrh r1, [r1] + mla ip, r9, r5, ip + mul r1, r5, r1 + add r5, r5, #1 + uxth r5, r5 + str r0, [ip, #8] + str r6, [ip, #4] + add r0, r1, #3 + cmp r1, #0 + movlt r1, r0 + ldr r0, [r10, #-1436] + bic r1, r1, #3 + add r1, r0, r1 + str r1, [ip, #12] +.L1829: + add fp, fp, #1 + b .L1827 +.L1835: + mul r2, r9, r6 + ldr r1, [r10, #-1488] + add ip, r1, r2 + ldr r2, [r1, r2] + cmn r2, #1 + bne .L1834 + ldr r0, [ip, #4] + add r4, r4, #1 + uxth r4, r4 + ubfx r0, r0, #10, #16 + bl FtlBbmMapBadBlock +.L1834: + add r6, r6, #1 + b .L1833 +.L1836: + ldr r2, .L1870+16 + ldrh r3, [r2] + str r3, [sp, #8] + ldrb r3, [r10, #-2740] @ zero_extendqisi2 + cmp r3, #0 + ldreq r3, [sp, #8] + movne r8, #1 + moveq r8, #1 + strne r8, [sp, #12] + lsreq r3, r3, #2 + streq r3, [sp, #12] + b .L1837 +.L1841: + uxth r3, r10 + mov r2, #36 + ldr r0, [r5, #-1488] + mul r1, r2, r3 + mov r2, #0 + add r3, r5, r3 + str r2, [r0, r1] + ldr r1, [sp, #4] + ldrb r0, [r3, #-1706] @ zero_extendqisi2 + bl V2P_block + cmp r7, #0 + mov r9, r0 + beq .L1839 + bl IsBlkInVendorPart + cmp r0, #0 + bne .L1840 +.L1839: + mov r0, r9 + bl FtlBbmIsBadBlock + cmp r0, #0 + bne .L1840 + ldr r1, [r5, #-1488] + mov r3, #36 + add r9, fp, r9, lsl #10 + mla r1, r3, r6, r1 + ldr r3, [r5, #-1452] + str r3, [r1, #8] + ldr r3, .L1870+20 + str r9, [r1, #4] + ldrh r3, [r3, #-6] + mul r3, r6, r3 + add r6, r6, #1 + uxth r6, r6 + add r0, r3, #3 + cmp r3, #0 + movlt r3, r0 + ldr r0, [r5, #-1448] + bic r3, r3, #3 + add r3, r0, r3 + str r3, [r1, #12] +.L1840: + add r10, r10, #1 + b .L1838 +.L1845: + mul r3, r2, r9 + ldr r1, [r5, #-1488] + add ip, r1, r3 + ldr r3, [r1, r3] + cmp r3, #0 + beq .L1844 + ldr r0, [ip, #4] + add r4, r4, #1 + str r2, [sp, #20] + uxth r4, r4 + ubfx r0, r0, #10, #16 + bl FtlBbmMapBadBlock + ldr r2, [sp, #20] +.L1844: + add r9, r9, #1 + b .L1843 +.L1849: + cmp r7, #0 + beq .L1848 + mul r3, fp, r9 + ldr r2, [r5, #-1488] + add r1, r2, r3 + ldr r3, [r2, r3] + cmp r3, #0 + bne .L1848 + ldr r0, [r1, #4] + mov r1, #1 + ubfx r0, r0, #10, #16 + bl FtlFreeSysBlkQueueIn +.L1848: + add r9, r9, #1 + b .L1847 +.L1871: + .align 2 +.L1870: + .word .LANCHOR2 + .word .LANCHOR2-1732 + .word .LANCHOR2-1728 + .word .LANCHOR2-1654 + .word .LANCHOR2-1664 + .word .LANCHOR2-1648 + .fnend + .size FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock + .align 2 + .global FtlFreeSysBLkSort + .syntax unified + .arm + .fpu softvfp + .type FtlFreeSysBLkSort, %function +FtlFreeSysBLkSort: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L1885 + ldrh r2, [r3, #6] + cmp r2, #0 + bxeq lr + push {r4, r5, lr} + .save {r4, r5, lr} + add lr, r3, #8 + add r2, lr, #2048 + ldrh ip, [r3, #2] + mov r4, #0 + ldrh r5, [r2, #28] + mov r0, r4 + ldrh r2, [r3, #4] + and r5, r5, #31 +.L1874: + uxth r1, r4 + add r4, r4, #1 + cmp r5, r1 + bgt .L1875 + cmp r0, #0 + strhne ip, [lr, #-6] @ movhi + strhne r2, [lr, #-4] @ movhi + pop {r4, r5, pc} +.L1875: + add r1, r3, ip, lsl #1 + add ip, ip, #1 + ubfx ip, ip, #0, #10 + ldrh r0, [r1, #8] + add r1, r3, r2, lsl #1 + strh r0, [r1, #8] @ movhi + mov r0, #1 + add r2, r2, r0 + ubfx r2, r2, #0, #10 + b .L1874 +.L1886: + .align 2 +.L1885: + .word .LANCHOR2-1240 + .fnend + .size FtlFreeSysBLkSort, .-FtlFreeSysBLkSort + .align 2 + .global FtlFreeSysBlkQueueOut + .syntax unified + .arm + .fpu softvfp + .type FtlFreeSysBlkQueueOut, %function +FtlFreeSysBlkQueueOut: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + ldr r4, .L1898 + sub r6, r4, #1232 + sub r7, r6, #8 +.L1888: + ldrh r1, [r6, #-2] + sub r2, r6, #8 + cmp r1, #0 + beq .L1889 + ldrh r3, [r6, #-6] + sub r1, r1, #1 + ldr r9, [r4, #-1280] + strh r1, [r6, #-2] @ movhi + add r0, r2, r3, lsl #1 + cmp r9, #0 + add r3, r3, #1 + ubfx r3, r3, #0, #10 + ldrh r5, [r0, #8] + strh r3, [r6, #-6] @ movhi + bne .L1890 + mov r0, r5 + bl P2V_block_in_plane + mov r8, r0 + ldr r0, [r4, #-1488] + lsl r3, r5, #10 + str r3, [r0, #4] + ldrb r3, [r4, #-2740] @ zero_extendqisi2 + cmp r3, #0 + beq .L1891 + mov r2, #1 + mov r1, r9 + bl FlashEraseBlocks +.L1891: + mov r2, #1 + ldr r0, [r4, #-1488] + mov r1, r2 + bl FlashEraseBlocks + ldr r2, [r4, #-1412] + lsl r0, r8, #1 + ldrh r3, [r2, r0] + add r3, r3, #1 + strh r3, [r2, r0] @ movhi + ldr r3, [r4, #-1572] + add r3, r3, #1 + str r3, [r4, #-1572] +.L1890: + sub r3, r5, #1 + movw r2, #65533 + uxth r3, r3 + cmp r3, r2 + bls .L1893 + ldrh r2, [r7, #6] + mov r1, r5 + ldr r0, .L1898+4 + bl rk_printk + b .L1888 +.L1889: + ldr r0, .L1898+8 + bl rk_printk +.L1892: + b .L1892 +.L1893: + mov r0, r5 + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L1899: + .align 2 +.L1898: + .word .LANCHOR2 + .word .LC38 + .word .LC37 + .fnend + .size FtlFreeSysBlkQueueOut, .-FtlFreeSysBlkQueueOut + .align 2 + .global test_node_in_list + .syntax unified + .arm + .fpu softvfp + .type test_node_in_list, %function +test_node_in_list: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L1906 + str lr, [sp, #-4]! + .save {lr} + movw lr, #65535 + ldr r2, [r0] + ldr ip, [r3, #-1356] + sub r3, r2, ip + asr r0, r3, #1 + ldr r3, .L1906+4 + mul r3, r3, r0 + mov r0, #6 + uxth r3, r3 +.L1902: + cmp r3, r1 + beq .L1903 + ldrh r3, [r2] + cmp r3, lr + beq .L1904 + mla r2, r0, r3, ip + b .L1902 +.L1903: + mov r0, #1 + ldr pc, [sp], #4 +.L1904: + mov r0, #0 + ldr pc, [sp], #4 +.L1907: + .align 2 +.L1906: + .word .LANCHOR2 + .word -1431655765 + .fnend + .size test_node_in_list, .-test_node_in_list + .align 2 + .global insert_data_list + .syntax unified + .arm + .fpu softvfp + .type insert_data_list, %function +insert_data_list: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #12 + ldr r2, .L1924 + sub r4, r2, #1712 + ldrh r3, [r4, #-12] + cmp r3, r0 + bls .L1910 + mov lr, #6 + ldr r6, [r2, #-1356] + mul lr, lr, r0 + mvn ip, #0 + add r1, r6, lr + strh ip, [r1, #2] @ movhi + strh ip, [r6, lr] @ movhi + ldr r3, [r2, #864] + cmp r3, #0 + streq r1, [r2, #864] + beq .L1910 + ldr r8, [r2, #-1404] + lsl r10, r0, #1 + mov r5, r2 + ldrh r2, [r1, #4] + ldrh r4, [r4, #-12] + ldrh r7, [r8, r10] + cmp r2, #0 + str r4, [sp] + mulne ip, r2, r7 + ldr r7, [r5, #-1356] + sub r2, r3, r7 + asr r9, r2, #1 + ldr r2, .L1924+4 + mul r2, r2, r9 + ldr r9, [r5, #-1412] + add r4, r9, r10 + uxth r2, r2 + str r4, [sp, #4] + mov r4, #0 +.L1919: + ldr r5, [sp] + add r4, r4, #1 + uxth r4, r4 + cmp r4, r5 + movls r5, #0 + movhi r5, #1 + cmp r0, r2 + orreq r5, r5, #1 + cmp r5, #0 + bne .L1910 + lsl r10, r2, #1 + ldrh r5, [r3, #4] + ldrh fp, [r8, r10] + cmp r5, #0 + mvneq r5, #0 + mulne r5, r5, fp + cmp ip, r5 + bne .L1915 + ldr r5, [sp, #4] + ldrh r10, [r9, r10] + ldrh r5, [r5] + cmp r10, r5 + bcc .L1917 +.L1916: + strh r2, [r6, lr] @ movhi + ldr ip, .L1924 + ldrh r2, [r3, #2] + strh r2, [r1, #2] @ movhi + ldr r2, [ip, #864] + cmp r3, r2 + ldrhne lr, [r3, #2] + movne r2, #6 + ldrne r1, [ip, #-1356] + strheq r0, [r3, #2] @ movhi + streq r1, [ip, #864] + mulne r2, r2, lr + strhne r0, [r1, r2] @ movhi + strhne r0, [r3, #2] @ movhi + b .L1910 +.L1915: + bcc .L1916 +.L1917: + ldrh r5, [r3] + movw r10, #65535 + cmp r5, r10 + bne .L1918 + strh r2, [r1, #2] @ movhi + strh r0, [r3] @ movhi + ldr r3, .L1924 + str r1, [r3, #868] +.L1910: + mov r0, #0 + add sp, sp, #12 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L1918: + mov r3, #6 + mov r2, r5 + mla r3, r3, r5, r7 + b .L1919 +.L1925: + .align 2 +.L1924: + .word .LANCHOR2 + .word -1431655765 + .fnend + .size insert_data_list, .-insert_data_list + .align 2 + .global INSERT_DATA_LIST + .syntax unified + .arm + .fpu softvfp + .type INSERT_DATA_LIST, %function +INSERT_DATA_LIST: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, lr} + .save {r4, lr} + bl insert_data_list + ldr r2, .L1928 + ldrh r3, [r2] + add r3, r3, #1 + strh r3, [r2] @ movhi + pop {r4, pc} +.L1929: + .align 2 +.L1928: + .word .LANCHOR2+872 + .fnend + .size INSERT_DATA_LIST, .-INSERT_DATA_LIST + .align 2 + .global insert_free_list + .syntax unified + .arm + .fpu softvfp + .type insert_free_list, %function +insert_free_list: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + movw r4, #65535 + cmp r0, r4 + beq .L1931 + ldr r2, .L1938 + mov r1, #6 + mul r5, r1, r0 + mvn r3, #0 + ldr r6, [r2, #-1356] + mov ip, r2 + add lr, r6, r5 + strh r3, [lr, #2] @ movhi + strh r3, [r6, r5] @ movhi + ldr r3, [r2, #876] + cmp r3, #0 + streq lr, [r2, #876] + beq .L1931 + ldr r8, [r2, #-1412] + lsl r2, r0, #1 + ldr r7, [ip, #-1356] + ldrh r9, [r8, r2] + sub r2, r3, r7 + asr r10, r2, #1 + ldr r2, .L1938+4 + mul r2, r2, r10 + mov r10, r1 + uxth r2, r2 +.L1935: + lsl r1, r2, #1 + ldrh r1, [r8, r1] + cmp r1, r9 + bcs .L1933 + ldrh r1, [r3] + cmp r1, r4 + bne .L1934 + strh r2, [lr, #2] @ movhi + strh r0, [r3] @ movhi +.L1931: + mov r0, #0 + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L1934: + mla r3, r10, r1, r7 + mov r2, r1 + b .L1935 +.L1933: + ldrh r1, [r3, #2] + strh r1, [lr, #2] @ movhi + strh r2, [r6, r5] @ movhi + ldr r2, [ip, #876] + cmp r3, r2 + ldrhne lr, [r3, #2] + movne r2, #6 + ldrne r1, [ip, #-1356] + strheq r0, [r3, #2] @ movhi + streq lr, [ip, #876] + mulne r2, r2, lr + strhne r0, [r1, r2] @ movhi + strhne r0, [r3, #2] @ movhi + b .L1931 +.L1939: + .align 2 +.L1938: + .word .LANCHOR2 + .word -1431655765 + .fnend + .size insert_free_list, .-insert_free_list + .align 2 + .global INSERT_FREE_LIST + .syntax unified + .arm + .fpu softvfp + .type INSERT_FREE_LIST, %function +INSERT_FREE_LIST: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, lr} + .save {r4, lr} + bl insert_free_list + ldr r2, .L1942 + ldrh r3, [r2] + add r3, r3, #1 + strh r3, [r2] @ movhi + pop {r4, pc} +.L1943: + .align 2 +.L1942: + .word .LANCHOR2+880 + .fnend + .size INSERT_FREE_LIST, .-INSERT_FREE_LIST + .align 2 + .global List_remove_node + .syntax unified + .arm + .fpu softvfp + .type List_remove_node, %function +List_remove_node: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, lr} + .save {r4, r5, lr} + mov ip, #6 + ldr r4, .L1950 + mul r1, ip, r1 + movw r5, #65535 + ldr r3, [r0] + ldr r2, [r4, #-1356] + add lr, r2, r1 + cmp lr, r3 + ldrh r3, [r2, r1] + bne .L1945 + cmp r3, r5 + mlane r3, ip, r3, r2 + moveq r3, #0 + streq r3, [r0] + strne r3, [r0] + mvnne r0, #0 + strhne r0, [r3, #2] @ movhi +.L1947: + mvn r3, #0 + mov r0, #0 + strh r3, [r2, r1] @ movhi + strh r3, [lr, #2] @ movhi + pop {r4, r5, pc} +.L1945: + cmp r3, r5 + ldrh r0, [lr, #2] + bne .L1948 + cmp r0, r3 + mulne r3, ip, r0 + mvnne r0, #0 + strhne r0, [r2, r3] @ movhi + b .L1947 +.L1948: + mla r3, ip, r3, r2 + strh r0, [r3, #2] @ movhi + ldrh r3, [lr, #2] + ldrh r5, [r2, r1] + ldr r0, [r4, #-1356] + mul r3, ip, r3 + strh r5, [r0, r3] @ movhi + b .L1947 +.L1951: + .align 2 +.L1950: + .word .LANCHOR2 + .fnend + .size List_remove_node, .-List_remove_node + .align 2 + .global List_pop_index_node + .syntax unified + .arm + .fpu softvfp + .type List_pop_index_node, %function +List_pop_index_node: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, [r0] + cmp r3, #0 + beq .L1958 + ldr r2, .L1963 + push {r4, lr} + .save {r4, lr} + movw lr, #65535 + mov r4, #6 + ldr r2, [r2, #-1356] +.L1954: + cmp r1, #0 + bne .L1955 +.L1957: + ldr r4, .L1963+4 + sub r3, r3, r2 + asr r3, r3, #1 + mul r4, r4, r3 + uxth r1, r4 + bl List_remove_node + uxth r0, r4 + pop {r4, pc} +.L1955: + ldrh ip, [r3] + cmp ip, lr + beq .L1957 + sub r1, r1, #1 + mla r3, r4, ip, r2 + uxth r1, r1 + b .L1954 +.L1958: + movw r0, #65535 + bx lr +.L1964: + .align 2 +.L1963: + .word .LANCHOR2 + .word -1431655765 + .fnend + .size List_pop_index_node, .-List_pop_index_node + .align 2 + .global List_get_gc_head_node + .syntax unified + .arm + .fpu softvfp + .type List_get_gc_head_node, %function +List_get_gc_head_node: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r2, .L1971 + ldr r3, [r2, #864] + cmp r3, #0 + ldrne r1, [r2, #-1356] + movne ip, #6 + movwne r2, #65535 + bne .L1967 +.L1970: + movw r0, #65535 + bx lr +.L1969: + sub r0, r0, #1 + mla r3, ip, r3, r1 + uxth r0, r0 +.L1967: + cmp r0, #0 + beq .L1968 + ldrh r3, [r3] + cmp r3, r2 + bne .L1969 + b .L1970 +.L1968: + ldr r0, .L1971+4 + sub r3, r3, r1 + asr r3, r3, #1 + mul r3, r0, r3 + uxth r0, r3 + bx lr +.L1972: + .align 2 +.L1971: + .word .LANCHOR2 + .word -1431655765 + .fnend + .size List_get_gc_head_node, .-List_get_gc_head_node + .align 2 + .global List_update_data_list + .syntax unified + .arm + .fpu softvfp + .type List_update_data_list, %function +List_update_data_list: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L1984 + add r2, r3, #884 + ldrh r2, [r2] + cmp r2, r0 + beq .L1981 + add r2, r3, #932 + ldrh r2, [r2] + cmp r2, r0 + beq .L1981 + add r2, r3, #980 + ldrh r2, [r2] + cmp r2, r0 + beq .L1981 + push {r4, lr} + .save {r4, lr} + mov lr, #6 + mul lr, lr, r0 + ldr r1, [r3, #-1356] + ldr r2, [r3, #864] + add ip, r1, lr + cmp ip, r2 + beq .L1974 + ldr r4, [r3, #-1404] + lsl r3, r0, #1 + ldrh r2, [ip, #4] + ldrh r3, [r4, r3] + cmp r2, #0 + mvneq r2, #0 + mulne r2, r2, r3 + ldrh r3, [ip, #2] + movw ip, #65535 + cmp r3, ip + bne .L1976 + ldrh ip, [r1, lr] + cmp ip, r3 + beq .L1974 +.L1976: + mov ip, #6 + mul ip, ip, r3 + ldr r3, .L1984+4 + asr lr, ip, #1 + add r1, r1, ip + mul r3, r3, lr + lsl r3, r3, #1 + ldrh lr, [r4, r3] + ldrh r3, [r1, #4] + cmp r3, #0 + mulne r3, r3, lr + mvneq r3, #0 + cmp r2, r3 + bcs .L1974 + mov r4, r0 + mov r1, r0 + ldr r0, .L1984+8 + bl List_remove_node + ldr r2, .L1984+12 + mov r0, r4 + ldrh r3, [r2] + sub r3, r3, #1 + strh r3, [r2] @ movhi + bl INSERT_DATA_LIST +.L1974: + mov r0, #0 + pop {r4, pc} +.L1981: + mov r0, #0 + bx lr +.L1985: + .align 2 +.L1984: + .word .LANCHOR2 + .word -1431655765 + .word .LANCHOR2+864 + .word .LANCHOR2+872 + .fnend + .size List_update_data_list, .-List_update_data_list + .align 2 + .global ftl_free_no_use_map_blk + .syntax unified + .arm + .fpu softvfp + .type ftl_free_no_use_map_blk, %function +ftl_free_no_use_map_blk: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r1, #0 + ldrh r2, [r0, #10] + mov r4, r0 + ldr r5, [r0, #20] + ldr r7, [r0, #12] + ldr r6, [r0, #24] + lsl r2, r2, #1 + mov r0, r5 + bl ftl_memset + mov r2, #0 +.L1987: + ldrh r1, [r4, #6] + uxth r3, r2 + cmp r1, r3 + bhi .L1991 + ldr r3, .L2007 + mov r6, #0 + mov r8, r6 + mov r10, r6 + ldrh r2, [r3] + ldrh r3, [r4] + lsl r3, r3, #1 + strh r2, [r5, r3] @ movhi + ldrh r9, [r5] +.L1992: + ldrh r3, [r4, #10] + uxth r1, r6 + cmp r3, r1 + bhi .L1996 + mov r0, r8 + pop {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L1991: + uxth r3, r2 + mov r1, #0 + ldr r0, [r6, r3, lsl #2] + ubfx r0, r0, #10, #16 +.L1988: + ldrh ip, [r4, #10] + uxth r3, r1 + cmp ip, r3 + addls r2, r2, #1 + bls .L1987 +.L1990: + uxth r3, r1 + add r1, r1, #1 + lsl r3, r3, #1 + ldrh ip, [r7, r3] + adds lr, ip, #0 + movne lr, #1 + cmp r0, ip + movne lr, #0 + cmp lr, #0 + ldrhne ip, [r5, r3] + addne ip, ip, #1 + strhne ip, [r5, r3] @ movhi + b .L1988 +.L1996: + uxth r3, r6 + lsl r3, r3, #1 + ldrh r2, [r5, r3] + cmp r9, r2 + bls .L1993 + ldrh r0, [r7, r3] + add fp, r7, r3 + cmp r0, #0 + bne .L1994 +.L1995: + add r6, r6, #1 + b .L1992 +.L1993: + cmp r2, #0 + bne .L1995 + ldrh r0, [r7, r3] + add fp, r7, r3 + cmp r0, #0 + beq .L1995 +.L1997: + mov r1, #1 + bl FtlFreeSysBlkQueueIn + strh r10, [fp] @ movhi + ldrh r3, [r4, #8] + sub r3, r3, #1 + strh r3, [r4, #8] @ movhi + b .L1995 +.L1994: + subs r9, r2, #0 + mov r8, r1 + beq .L1997 + b .L1995 +.L2008: + .align 2 +.L2007: + .word .LANCHOR2-1664 + .fnend + .size ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk + .align 2 + .global ftl_map_blk_alloc_new_blk + .syntax unified + .arm + .fpu softvfp + .type ftl_map_blk_alloc_new_blk, %function +ftl_map_blk_alloc_new_blk: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + mov r3, #0 + ldrh r1, [r0, #10] + ldr r2, [r0, #12] +.L2010: + uxth r5, r3 + cmp r5, r1 + bcs .L2013 + mov r7, r2 + add r3, r3, #1 + ldrh r6, [r7] + add r2, r2, #2 + cmp r6, #0 + bne .L2010 + mov r4, r0 + bl FtlFreeSysBlkQueueOut + sub r3, r0, #1 + movw r2, #65533 + uxth r3, r3 + mov r1, r0 + strh r0, [r7] @ movhi + cmp r3, r2 + bls .L2011 + ldr r3, .L2017 + ldr r0, .L2017+4 + ldrh r2, [r3, #6] + bl rk_printk +.L2012: + b .L2012 +.L2011: + ldr r3, [r4, #28] + strh r6, [r4, #2] @ movhi + strh r5, [r4] @ movhi + add r3, r3, #1 + str r3, [r4, #28] + ldrh r3, [r4, #8] + add r3, r3, #1 + strh r3, [r4, #8] @ movhi +.L2013: + mov r0, #0 + pop {r4, r5, r6, r7, r8, pc} +.L2018: + .align 2 +.L2017: + .word .LANCHOR2-1240 + .word .LC39 + .fnend + .size ftl_map_blk_alloc_new_blk, .-ftl_map_blk_alloc_new_blk + .align 2 + .global FtlMapWritePage + .syntax unified + .arm + .fpu softvfp + .type FtlMapWritePage, %function +FtlMapWritePage: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #12 + mov r4, r0 + ldr r5, .L2038 + mov r8, r1 + mov r10, r2 + mov r6, #0 + sub r9, r5, #1664 + mov fp, r9 +.L2020: + ldr r3, [r5, #-1588] + add r3, r3, #1 + str r3, [r5, #-1588] + ldrh r3, [r9] + ldrh r2, [r4, #2] + sub r3, r3, #1 + cmp r2, r3 + bge .L2021 + ldrh r2, [r4] + movw r3, #65535 + cmp r2, r3 + bne .L2022 +.L2021: + mov r0, r4 + bl Ftl_write_map_blk_to_last_page +.L2022: + ldr r1, [r5, #-1280] + cmp r1, #0 + bne .L2023 + ldrh r3, [r4] + ldr r2, [r4, #12] + ldr r0, [r5, #-1440] + lsl r3, r3, #1 + ldrh r7, [r2, r3] + mov r2, #16 + ldrh r3, [r4, #2] + str r10, [r5, #-1268] + str r0, [r5, #-1264] + orr r3, r3, r7, lsl #10 + str r3, [r5, #-1272] + bl ftl_memset + ldr r3, [r5, #-1264] + ldr r2, [r4, #28] + strh r8, [r3, #8] @ movhi + str r2, [r3, #4] + ldrh r2, [r4, #4] + str r3, [sp, #4] + strh r7, [r3, #2] @ movhi + strh r2, [r3] @ movhi + ldr r2, .L2038+4 + ldrb r2, [r2, #36] @ zero_extendqisi2 + cmp r2, #0 + beq .L2024 + ldr r2, .L2038+8 + ldr r0, [r5, #-1268] + ldrh r1, [r2] + bl js_hash + ldr r3, [sp, #4] + str r0, [r3, #12] +.L2024: + mov r3, #1 + ldr r0, .L2038+12 + mov r2, r3 + mov r1, r3 + bl FlashProgPages + ldrh r3, [r4, #2] + add r3, r3, #1 + uxth r3, r3 + strh r3, [r4, #2] @ movhi + ldr r2, [r5, #-1276] + cmn r2, #1 + bne .L2025 + ldr r1, [r5, #-1272] + add r6, r6, #1 + ldr r0, .L2038+16 + uxth r6, r6 + bl rk_printk + ldrh r3, [r4, #2] + cmp r3, #2 + ldrhls r3, [fp] + subls r3, r3, #1 + strhls r3, [r4, #2] @ movhi + cmp r6, #3 + bls .L2020 + mov r2, r6 + ldr r1, [r5, #-1272] + ldr r0, .L2038+20 + bl rk_printk + mov r3, #1 + str r3, [r5, #-1280] +.L2023: + mov r0, #0 + add sp, sp, #12 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2025: + cmp r2, #0 + strhne r7, [r4, #40] @ movhi + cmp r3, #1 + cmpne r2, #256 + beq .L2029 + ldr r3, [r4, #36] + cmp r3, #0 + beq .L2030 +.L2029: + mov r3, #0 + str r3, [r4, #36] + b .L2020 +.L2030: + ldr r2, [r5, #-1272] + ldr r3, [r4, #24] + str r2, [r3, r8, lsl #2] + b .L2023 +.L2039: + .align 2 +.L2038: + .word .LANCHOR2 + .word .LANCHOR0 + .word .LANCHOR2-1656 + .word .LANCHOR2-1276 + .word .LC40 + .word .LC41 + .fnend + .size FtlMapWritePage, .-FtlMapWritePage + .align 2 + .global ftl_map_blk_gc + .syntax unified + .arm + .fpu softvfp + .type ftl_map_blk_gc, %function +ftl_map_blk_gc: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #12 + mov r4, r0 + ldr r5, [r0, #12] + ldr r10, [r0, #24] + bl ftl_free_no_use_map_blk + ldrh r3, [r4, #10] + ldrh r2, [r4, #8] + sub r3, r3, #4 + cmp r2, r3 + blt .L2041 + uxth r0, r0 + lsl r0, r0, #1 + ldrh r9, [r5, r0] + cmp r9, #0 + beq .L2041 + ldr r3, [r4, #32] + cmp r3, #0 + bne .L2041 + mov r2, #1 + str r2, [r4, #32] + strh r3, [r5, r0] @ movhi + ldrh r3, [r4, #8] + ldrh r2, [r4, #2] + sub r3, r3, #1 + strh r3, [r4, #8] @ movhi + ldr r3, .L2053 + ldrh r3, [r3] + cmp r2, r3 + bcc .L2042 + mov r0, r4 + bl ftl_map_blk_alloc_new_blk +.L2042: + ldr r5, .L2053+4 + mov r6, #0 + sub fp, r5, #1264 + sub fp, fp, #12 +.L2043: + ldrh r2, [r4, #6] + uxth r3, r6 + cmp r2, r3 + bhi .L2048 + mov r1, #1 + mov r0, r9 + bl FtlFreeSysBlkQueueIn + mov r3, #0 + str r3, [r4, #32] +.L2041: + ldr r3, .L2053 + ldrh r2, [r4, #2] + ldrh r3, [r3] + cmp r2, r3 + bcc .L2046 + mov r0, r4 + bl ftl_map_blk_alloc_new_blk + b .L2046 +.L2048: + uxth r7, r6 + add r2, r10, r7, lsl #2 + str r2, [sp] + ldr r2, [r10, r7, lsl #2] + cmp r9, r2, lsr #10 + bne .L2044 + ldr r2, [r5, #-1468] + mov r0, fp + ldr r8, [r5, #-1440] + str r3, [sp, #4] + str r2, [r5, #-1268] + str r8, [r5, #-1264] + ldr r2, [r10, r7, lsl #2] + str r2, [r5, #-1272] + mov r2, #1 + mov r1, r2 + bl FlashReadPages + ldr r2, [r5, #-1276] + ldr r3, [sp, #4] + cmn r2, #1 + bne .L2045 +.L2047: + ldr r2, [sp] + mov r3, #0 + ldr r0, .L2053+8 + str r3, [r2] + ldrh r2, [r8, #8] + ldr r1, [r5, #-1272] + bl rk_printk + mov r3, #1 + str r3, [r5, #-1280] +.L2046: + mov r0, #0 + add sp, sp, #12 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2045: + ldrh r2, [r8, #8] + cmp r2, r3 + bne .L2047 + ldrh r2, [r8] + ldrh r3, [r4, #4] + cmp r2, r3 + bne .L2047 + ldr r2, [r5, #-1268] + mov r1, r7 + mov r0, r4 + bl FtlMapWritePage +.L2044: + add r6, r6, #1 + b .L2043 +.L2054: + .align 2 +.L2053: + .word .LANCHOR2-1664 + .word .LANCHOR2 + .word .LC42 + .fnend + .size ftl_map_blk_gc, .-ftl_map_blk_gc + .align 2 + .global Ftl_write_map_blk_to_last_page + .syntax unified + .arm + .fpu softvfp + .type Ftl_write_map_blk_to_last_page, %function +Ftl_write_map_blk_to_last_page: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + ldr r5, .L2066 + ldr r6, [r5, #-1280] + cmp r6, #0 + bne .L2056 + ldrh r3, [r0] + movw r2, #65535 + mov r4, r0 + ldr r7, [r0, #12] + cmp r3, r2 + bne .L2057 + ldrh r3, [r0, #8] + add r3, r3, #1 + strh r3, [r0, #8] @ movhi + bl FtlFreeSysBlkQueueOut + strh r0, [r7] @ movhi + ldr r3, [r4, #28] + strh r6, [r4, #2] @ movhi + strh r6, [r4] @ movhi + add r3, r3, #1 + str r3, [r4, #28] +.L2056: + mov r0, #0 + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L2057: + lsl r3, r3, #1 + ldr r8, [r0, #24] + mov r1, #255 + ldrh r9, [r7, r3] + ldrh r3, [r0, #2] + ldr r7, [r5, #-1440] + orr r3, r3, r9, lsl #10 + str r7, [r5, #-1264] + str r3, [r5, #-1272] + ldr r3, [r5, #-1472] + str r3, [r5, #-1268] + ldr r3, [r0, #28] + str r3, [r7, #4] + ldr r3, .L2066+4 + strh r3, [r7, #8] @ movhi + ldrh r3, [r0, #4] + strh r9, [r7, #2] @ movhi + strh r3, [r7] @ movhi + sub r3, r5, #1664 + ldrh r2, [r3] + ldr r0, [r5, #-1472] + lsl r2, r2, #3 + bl ftl_memset + mov r2, r6 + mov r3, r6 +.L2058: + ldrh r0, [r4, #6] + uxth r1, r2 + cmp r0, r1 + bhi .L2060 + ldr r3, .L2066+8 + ldrb r3, [r3, #36] @ zero_extendqisi2 + cmp r3, #0 + beq .L2061 + ldr r3, .L2066+12 + ldr r0, [r5, #-1268] + ldrh r1, [r3, #-8] + bl js_hash + str r0, [r7, #12] +.L2061: + mov r2, #1 + mov r3, #0 + mov r1, r2 + ldr r0, .L2066+16 + bl FlashProgPages + ldrh r3, [r4, #2] + mov r0, r4 + add r3, r3, #1 + strh r3, [r4, #2] @ movhi + bl ftl_map_blk_gc + b .L2056 +.L2060: + uxth r1, r2 + ldr r0, [r8, r1, lsl #2] + cmp r9, r0, lsr #10 + bne .L2059 + ldr r0, [r5, #-1472] + add r3, r3, #1 + uxth r3, r3 + str r1, [r0, r3, lsl #3] + ldr r0, [r8, r1, lsl #2] + ldr r1, [r5, #-1472] + add r1, r1, r3, lsl #3 + str r0, [r1, #4] +.L2059: + add r2, r2, #1 + b .L2058 +.L2067: + .align 2 +.L2066: + .word .LANCHOR2 + .word -1291 + .word .LANCHOR0 + .word .LANCHOR2-1648 + .word .LANCHOR2-1276 + .fnend + .size Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page + .align 2 + .global flush_l2p_region + .syntax unified + .arm + .fpu softvfp + .type flush_l2p_region, %function +flush_l2p_region: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + mov r4, #12 + ldr r5, .L2070 + mul r4, r4, r0 + ldr r3, [r5, #-1364] + add r0, r5, #1024 + add r0, r0, #4 + add r2, r3, r4 + ldrh r1, [r3, r4] + ldr r2, [r2, #8] + bl FtlMapWritePage + ldr r3, [r5, #-1364] + mov r0, #0 + add r4, r3, r4 + ldr r3, [r4, #4] + bic r3, r3, #-2147483648 + str r3, [r4, #4] + pop {r4, r5, r6, pc} +.L2071: + .align 2 +.L2070: + .word .LANCHOR2 + .fnend + .size flush_l2p_region, .-flush_l2p_region + .align 2 + .global select_l2p_ram_region + .syntax unified + .arm + .fpu softvfp + .type select_l2p_ram_region, %function +select_l2p_ram_region: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L2083 + mov r1, #0 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + mov ip, #12 + movw lr, #65535 + sub r2, r3, #1616 + ldrh r2, [r2, #-10] + ldr r3, [r3, #-1364] +.L2073: + uxth r0, r1 + cmp r0, r2 + bcc .L2075 + mov r0, r2 + mov r1, #0 + mov ip, #-2147483648 + mov r5, #12 +.L2076: + uxth r4, r1 + cmp r4, r2 + bcc .L2078 + cmp r0, r2 + popcc {r4, r5, r6, pc} + ldr r1, .L2083+4 + mov r0, r2 + mvn ip, #0 + ldrh r5, [r1] + mov r1, #0 +.L2079: + uxth lr, r1 + cmp lr, r2 + bcc .L2081 + pop {r4, r5, r6, pc} +.L2075: + add r1, r1, #1 + mla r4, ip, r1, r3 + ldrh r4, [r4, #-12] + cmp r4, lr + bne .L2073 + pop {r4, r5, r6, pc} +.L2078: + mla lr, r5, r1, r3 + add r1, r1, #1 + ldr lr, [lr, #4] + cmp ip, lr + movls r6, #0 + movhi r6, #1 + cmp lr, #0 + movlt r6, #0 + cmp r6, #0 + movne ip, lr + movne r0, r4 + b .L2076 +.L2081: + ldr r4, [r3, #4] + cmp ip, r4 + bls .L2080 + ldrh r6, [r3] + cmp r6, r5 + movne ip, r4 + movne r0, lr +.L2080: + add r1, r1, #1 + add r3, r3, #12 + b .L2079 +.L2084: + .align 2 +.L2083: + .word .LANCHOR2 + .word .LANCHOR2+1072 + .fnend + .size select_l2p_ram_region, .-select_l2p_ram_region + .align 2 + .global log2phys + .syntax unified + .arm + .fpu softvfp + .type log2phys, %function +log2phys: + .fnstart + @ args = 0, pretend = 0, frame = 16 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #20 + sub sp, sp, #20 + ldr r4, .L2101 + ldr r3, [r4, #-1284] + cmp r0, r3 + bcs .L2086 + sub fp, r4, #1648 + mov r9, r0 + ldrh r0, [fp, #-10] + mov r10, r1 + str r2, [sp, #8] + mov r5, #12 + ldr r2, [r4, #-1364] + add r3, r0, #7 + str fp, [sp, #4] + lsr r6, r9, r3 + str r3, [sp] + sub r3, r4, #1616 + uxth r8, r6 + ldrh r1, [r3, #-10] + mov r3, #0 +.L2087: + uxth r7, r3 + cmp r7, r1 + bcc .L2092 + str r2, [sp, #12] + bl select_l2p_ram_region + mul r5, r5, r0 + ldr r2, [sp, #12] + mov r7, r0 + ldrh r1, [r2, r5] + add r3, r2, r5 + movw r2, #65535 + cmp r1, r2 + beq .L2093 + ldr r3, [r3, #4] + cmp r3, #0 + bge .L2093 + bl flush_l2p_region +.L2093: + ldr r3, [r4, #-1376] + uxth r6, r6 + ldr fp, [r3, r6, lsl #2] + cmp fp, #0 + bne .L2094 + ldr r0, [r4, #-1364] + mov r1, #255 + ldr r3, [sp, #4] + add r0, r0, r5 + ldrh r2, [r3, #-8] + ldr r0, [r0, #8] + bl ftl_memset + ldr r2, [r4, #-1364] + strh r8, [r2, r5] @ movhi + ldr r2, [r4, #-1364] + add r5, r2, r5 + str fp, [r5, #4] + b .L2089 +.L2086: + cmp r2, #0 + mvn r0, #0 + streq r0, [r1] +.L2085: + add sp, sp, #20 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2092: + add r3, r3, #1 + mla r0, r5, r3, r2 + ldrh r0, [r0, #-12] + cmp r0, r8 + bne .L2087 +.L2089: + ldr r3, [sp] + mvn r0, #0 + bic r9, r9, r0, lsl r3 + ldr r3, [sp, #8] + uxth r9, r9 + cmp r3, #0 + mov r3, #12 + bne .L2090 + ldr r2, [r4, #-1364] + mla r3, r3, r7, r2 + ldr r3, [r3, #8] + ldr r3, [r3, r9, lsl #2] + str r3, [r10] +.L2091: + ldr r2, [r4, #-1364] + mov r3, #12 + mov r0, #0 + mla r7, r3, r7, r2 + ldr r3, [r7, #4] + cmn r3, #1 + addne r3, r3, #1 + strne r3, [r7, #4] + b .L2085 +.L2090: + mul r3, r3, r7 + ldr r2, [r4, #-1364] + ldr r1, [r10] + add r2, r2, r3 + ldr r2, [r2, #8] + str r1, [r2, r9, lsl #2] + ldr r2, [r4, #-1364] + add r3, r2, r3 + ldr r2, [r3, #4] + orr r2, r2, #-2147483648 + str r2, [r3, #4] + ldr r3, .L2101+4 + strh r8, [r3] @ movhi + b .L2091 +.L2094: + ldr r2, [r4, #-1364] + ldr r0, .L2101+8 + str fp, [r4, #-1272] + add r2, r2, r5 + ldr r2, [r2, #8] + str r2, [r4, #-1268] + ldr r2, [r4, #-1440] + str r2, [r4, #-1264] + mov r2, #1 + mov r1, r2 + bl FlashReadPages + ldr r2, [r4, #-1264] + ldrh r2, [r2, #8] + cmp r2, r8 + beq .L2095 + mov r2, fp + mov r1, r6 + ldr r0, .L2101+12 + bl rk_printk + mov r3, #4 + ldr r1, [r4, #-1264] + mov r2, r3 + ldr r0, .L2101+16 + bl rknand_print_hex + ldr r3, .L2101+20 + mov r2, #4 + ldr r1, [r4, #-1376] + ldr r0, .L2101+24 + ldrh r3, [r3, #-12] + bl rknand_print_hex + mov r3, #1 + str r3, [r4, #-1280] +.L2096: + ldr r3, [r4, #-1364] + mov r1, #0 + add r2, r3, r5 + str r1, [r2, #4] + strh r8, [r3, r5] @ movhi + b .L2089 +.L2095: + ldr r2, [r4, #-1276] + cmp r2, #256 + bne .L2096 + mov r2, fp + mov r1, r6 + ldr r0, .L2101+28 + bl rk_printk + ldr r3, [r4, #-1364] + mov r1, r6 + ldr r0, .L2101+32 + add r3, r3, r5 + ldr r2, [r3, #8] + bl FtlMapWritePage + b .L2096 +.L2102: + .align 2 +.L2101: + .word .LANCHOR2 + .word .LANCHOR2+1072 + .word .LANCHOR2-1276 + .word .LC43 + .word .LC18 + .word .LANCHOR2-1616 + .word .LC44 + .word .LC45 + .word .LANCHOR2+1028 + .fnend + .size log2phys, .-log2phys + .align 2 + .global FtlVendorPartWrite + .syntax unified + .arm + .fpu softvfp + .type FtlVendorPartWrite, %function +FtlVendorPartWrite: + .fnstart + @ args = 0, pretend = 0, frame = 56 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r10, r2 + ldr r4, .L2113 + add r2, r0, r1 + .pad #60 + sub sp, sp, #60 + ldrh r3, [r4, #-6] + cmp r2, r3 + mvnhi r8, #0 + bhi .L2103 + add r4, r4, #1664 + mov r9, r0 + sub r3, r4, #1648 + mov r6, r1 + ldrh r7, [r3, #-10] + mov r8, #0 + str r3, [sp, #4] + lsr r7, r0, r7 + lsl fp, r7, #2 +.L2105: + cmp r6, #0 + bne .L2110 +.L2103: + mov r0, r8 + add sp, sp, #60 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2110: + ldr r3, [r4, #-1380] + mov r0, r9 + ldr r2, [r3, fp] + ldr r3, [sp, #4] + str r2, [sp, #12] + ldrh r3, [r3, #-12] + mov r1, r3 + str r3, [sp, #8] + bl __aeabi_uidivmod + ldr r3, [sp, #8] + ldr r2, [sp, #12] + str r1, [sp] + sub r5, r3, r1 + uxth r5, r5 + cmp r6, r5 + uxthcc r5, r6 + cmp r2, #0 + cmpne r5, r3 + movne r1, #1 + moveq r1, #0 + beq .L2107 + ldr r3, [r4, #-1464] + add r0, sp, #20 + str r2, [sp, #24] + mov r2, #1 + mov r1, r2 + str r3, [sp, #28] + mov r3, #0 + str r3, [sp, #32] + bl FlashReadPages +.L2108: + lsl r3, r5, #9 + ldr r0, [r4, #-1464] + mov r1, r10 + mov r2, r3 + str r3, [sp, #8] + ldr r3, [sp] + sub r6, r6, r5 + add r9, r9, r5 + add fp, fp, #4 + add r0, r0, r3, lsl #9 + bl ftl_memcpy + mov r1, r7 + ldr r2, [r4, #-1464] + ldr r0, .L2113+4 + add r7, r7, #1 + bl FtlMapWritePage + ldr r3, [sp, #8] + cmn r0, #1 + mvneq r8, #0 + add r10, r10, r3 + b .L2105 +.L2107: + ldr r3, [sp, #4] + ldr r0, [r4, #-1464] + ldrh r2, [r3, #-8] + bl ftl_memset + b .L2108 +.L2114: + .align 2 +.L2113: + .word .LANCHOR2-1664 + .word .LANCHOR2+1076 + .fnend + .size FtlVendorPartWrite, .-FtlVendorPartWrite + .align 2 + .global FtlVendorPartRead + .syntax unified + .arm + .fpu softvfp + .type FtlVendorPartRead, %function +FtlVendorPartRead: + .fnstart + @ args = 0, pretend = 0, frame = 56 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r10, r2 + ldr r5, .L2126 + add r2, r0, r1 + .pad #60 + sub sp, sp, #60 + ldrh r3, [r5, #-6] + cmp r2, r3 + mvnhi r8, #0 + bhi .L2115 + add r5, r5, #1664 + mov r9, r0 + sub r3, r5, #1648 + mov r7, r1 + ldrh r6, [r3, #-10] + mov r8, #0 + str r3, [sp, #8] + lsr r6, r0, r6 + lsl fp, r6, #2 +.L2117: + cmp r7, #0 + bne .L2123 +.L2115: + mov r0, r8 + add sp, sp, #60 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2123: + ldr r3, [r5, #-1380] + mov r0, r9 + ldr r3, [r3, fp] + str r3, [sp, #12] + ldr r3, [sp, #8] + ldrh r4, [r3, #-12] + mov r1, r4 + bl __aeabi_uidivmod + sub r4, r4, r1 + ldr r3, [sp, #12] + uxth r4, r4 + str r1, [sp, #4] + cmp r7, r4 + uxthcc r4, r7 + cmp r3, #0 + lsl r2, r4, #9 + str r2, [sp, #12] + beq .L2119 + ldr r2, [r5, #-1464] + add r0, sp, #20 + str r3, [sp, #24] + str r3, [sp, #12] + mov r3, #0 + str r2, [sp, #28] + mov r2, #1 + mov r1, r2 + str r3, [sp, #32] + bl FlashReadPages + ldr r2, [sp, #20] + ldr r3, [sp, #12] + cmn r2, #1 + ldr r2, [r5, #-1276] + mvneq r8, #0 + cmp r2, #256 + bne .L2121 + mov r2, r3 + mov r1, r6 + ldr r0, .L2126+4 + bl rk_printk + ldr r2, [r5, #-1464] + mov r1, r6 + ldr r0, .L2126+8 + bl FtlMapWritePage +.L2121: + ldr r1, [r5, #-1464] + lsl r2, r4, #9 + ldr r3, [sp, #4] + mov r0, r10 + add r1, r1, r3, lsl #9 + bl ftl_memcpy +.L2122: + add r6, r6, #1 + sub r7, r7, r4 + add r9, r9, r4 + add r10, r10, r4, lsl #9 + add fp, fp, #4 + b .L2117 +.L2119: + lsl r2, r4, #9 + mov r1, r3 + mov r0, r10 + bl ftl_memset + b .L2122 +.L2127: + .align 2 +.L2126: + .word .LANCHOR2-1664 + .word .LC46 + .word .LANCHOR2+1076 + .fnend + .size FtlVendorPartRead, .-FtlVendorPartRead + .align 2 + .global FtlUpdateVaildLpn + .syntax unified + .arm + .fpu softvfp + .type FtlUpdateVaildLpn, %function +FtlUpdateVaildLpn: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L2137 + add r1, r3, #1120 + ldrh r2, [r1] + cmp r2, #4 + cmpls r0, #0 + bne .L2129 + add r2, r2, #1 + strh r2, [r1] @ movhi + bx lr +.L2129: + mov r2, #0 + str lr, [sp, #-4]! + .save {lr} + strh r2, [r1] @ movhi + sub r1, r3, #1712 + movw lr, #65535 + str r2, [r3, #1124] + ldrh r1, [r1, #-12] + ldr r2, [r3, #-1404] + add r1, r2, r1, lsl #1 +.L2130: + cmp r2, r1 + bne .L2132 + ldr pc, [sp], #4 +.L2132: + ldrh ip, [r2], #2 + cmp ip, lr + ldrne r0, [r3, #1124] + addne r0, r0, ip + strne r0, [r3, #1124] + b .L2130 +.L2138: + .align 2 +.L2137: + .word .LANCHOR2 + .fnend + .size FtlUpdateVaildLpn, .-FtlUpdateVaildLpn + .align 2 + .global FtlMapBlkWriteDumpData + .syntax unified + .arm + .fpu softvfp + .type FtlMapBlkWriteDumpData, %function +FtlMapBlkWriteDumpData: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, [r0, #36] + cmp r3, #0 + bxeq lr + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + mov r2, #0 + ldr r4, .L2149 + str r2, [r0, #36] + ldr r2, [r4, #-1280] + ldrh r5, [r0, #6] + ldr r3, [r0, #24] + cmp r2, #0 + popne {r4, r5, r6, pc} + mov r6, r0 + ldr r2, [r4, #-1440] + ldr r0, [r4, #-1468] + sub r5, r5, #1 + uxth r5, r5 + str r2, [r4, #-1264] + str r0, [r4, #-1268] + ldr r3, [r3, r5, lsl #2] + cmp r3, #0 + str r3, [r4, #-1272] + beq .L2143 + mov r2, #1 + ldr r0, .L2149+4 + mov r1, r2 + bl FlashReadPages +.L2144: + ldr r2, [r4, #-1268] + mov r1, r5 + mov r0, r6 + pop {r4, r5, r6, lr} + b FtlMapWritePage +.L2143: + sub r3, r4, #1648 + mov r1, #255 + ldrh r2, [r3, #-8] + bl ftl_memset + b .L2144 +.L2150: + .align 2 +.L2149: + .word .LANCHOR2 + .word .LANCHOR2-1276 + .fnend + .size FtlMapBlkWriteDumpData, .-FtlMapBlkWriteDumpData + .align 2 + .global FtlVpcTblFlush + .syntax unified + .arm + .fpu softvfp + .type FtlVpcTblFlush, %function +FtlVpcTblFlush: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #12 + ldr r4, .L2169 + ldr r3, [r4, #-1280] + cmp r3, #0 + bne .L2153 + ldr r2, [r4, #-1472] + add r7, r4, #816 + ldr r6, [r4, #-1440] + sub r9, r4, #1648 + ldr r5, .L2169+4 + mov r1, #255 + str r2, [r4, #-1268] + movw r2, #1128 + ldrh r2, [r4, r2] + str r6, [r4, #-1264] + str r3, [r6, #12] + strh r2, [r6, #2] @ movhi + ldr r2, .L2169+8 + ldr r8, .L2169+12 + strh r2, [r6] @ movhi + ldr r2, [r4, #1136] + stmib r6, {r2, r3} + ldr r3, .L2169+16 + str r3, [r4, #816] + ldr r3, .L2169+20 + str r3, [r4, #820] + ldrh r3, [r5, #6] + strh r3, [r7, #8] @ movhi + sub r3, r4, #1696 + ldrh r3, [r3, #-14] + strb r3, [r4, #826] + add r3, r4, #884 + ldrh r2, [r3] + strh r2, [r7, #14] @ movhi + ldrh r2, [r3, #2] + ldrb r3, [r4, #890] @ zero_extendqisi2 + orr r3, r3, r2, lsl #6 + strh r3, [r7, #16] @ movhi + ldrb r3, [r4, #892] @ zero_extendqisi2 + strb r3, [r4, #827] + add r3, r4, #932 + ldrh r2, [r3] + strh r2, [r7, #18] @ movhi + ldrh r2, [r3, #2] + ldrb r3, [r4, #938] @ zero_extendqisi2 + orr r3, r3, r2, lsl #6 + strh r3, [r7, #20] @ movhi + ldrb r3, [r4, #940] @ zero_extendqisi2 + strb r3, [r4, #828] + add r3, r4, #980 + ldrh r2, [r3] + strh r2, [r7, #22] @ movhi + ldrh r2, [r3, #2] + ldrb r3, [r4, #986] @ zero_extendqisi2 + ldr r0, [r4, #-1268] + orr r3, r3, r2, lsl #6 + ldrh r2, [r9, #-8] + strh r3, [r7, #24] @ movhi + ldrb r3, [r4, #988] @ zero_extendqisi2 + strb r3, [r4, #829] + ldr r3, [r4, #-1580] + str r3, [r4, #848] + ldr r3, [r4, #-1612] + str r3, [r4, #856] + ldr r3, [r4, #-1608] + str r3, [r4, #852] + sub r3, r4, #1536 + ldrh r3, [r3] + strh r3, [r7, #44] @ movhi + sub r3, r4, #1520 + ldrh r3, [r3, #-14] + strh r3, [r7, #46] @ movhi + bl ftl_memset + mov r1, r7 + mov r2, #48 + sub r7, r4, #1712 + ldr r0, [r4, #-1268] + bl ftl_memcpy + ldrh r2, [r7, #-12] + ldr r0, [r4, #-1268] + ldr r1, [r4, #-1404] + lsl r2, r2, #1 + add r0, r0, #48 + bl ftl_memcpy + ldrh r0, [r7, #-12] + ldr r3, [r4, #-1268] + ldr r1, [r8, #32] + lsr r2, r0, #3 + lsl r0, r0, #1 + add r0, r0, #51 + add r2, r2, #4 + bic r0, r0, #3 + add r0, r3, r0 + bl ftl_memcpy + sub r3, r4, #1616 + str r9, [sp, #4] + ldrh r2, [r3, #-8] + cmp r2, #0 + beq .L2154 + ldrh r0, [r7, #-12] + ldrh r2, [r3, #-12] + ldr r1, [r4, #-1376] + lsr r3, r0, #3 + lsl r2, r2, #2 + add r3, r3, r0, lsl #1 + ldr r0, [r4, #-1268] + add r3, r3, #52 + ubfx r3, r3, #2, #14 + add r0, r0, r3, lsl #2 + bl ftl_memcpy +.L2154: + ldr r10, .L2169+24 + mov r7, #0 + movw r9, #65535 + mov r0, #0 + bl FtlUpdateVaildLpn + mov fp, r10 +.L2155: + ldr r3, [r4, #-1472] + ldrh r1, [r5, #2] + ldrh r2, [r5] + str r3, [r4, #-1268] + ldr r3, [r4, #-1440] + str r3, [r4, #-1264] + orr r3, r1, r2, lsl #10 + str r3, [r4, #-1272] + ldrh r3, [r10] + sub r3, r3, #1 + cmp r1, r3 + blt .L2156 + mov r3, #0 + ldrh r9, [r5, #4] + strh r3, [r5, #2] @ movhi + strh r2, [r5, #4] @ movhi + bl FtlFreeSysBlkQueueOut + ldr r3, [r4, #-1612] + strh r0, [r5] @ movhi + add r2, r3, #1 + str r3, [r4, #1136] + str r2, [r4, #-1612] + lsl r2, r0, #10 + str r2, [r4, #-1272] + str r3, [r6, #4] + strh r0, [r6, #2] @ movhi +.L2156: + ldrb r3, [r8, #36] @ zero_extendqisi2 + cmp r3, #0 + beq .L2157 + ldr r3, [sp, #4] + ldr r0, [r4, #-1472] + ldrh r1, [r3, #-8] + bl js_hash + str r0, [r6, #12] +.L2157: + mov r3, #1 + ldr r0, .L2169+28 + mov r2, r3 + mov r1, r3 + bl FlashProgPages + ldrh r3, [r5, #2] + ldr r2, [r4, #-1276] + add r3, r3, #1 + uxth r3, r3 + cmn r2, #1 + strh r3, [r5, #2] @ movhi + bne .L2158 + cmp r3, #1 + add r7, r7, #1 + ldrheq r3, [fp] + uxth r7, r7 + subeq r3, r3, #1 + strheq r3, [r5, #2] @ movhi + cmp r7, #3 + bls .L2155 + mov r2, r7 + ldr r1, [r4, #-1272] + ldr r0, .L2169+32 + bl rk_printk + mov r3, #1 + str r3, [r4, #-1280] +.L2153: + mov r0, #0 + add sp, sp, #12 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2158: + cmp r3, #1 + cmpne r2, #256 + beq .L2155 + movw r3, #65535 + cmp r9, r3 + beq .L2153 + mov r1, #1 + mov r0, r9 + bl FtlFreeSysBlkQueueIn + b .L2153 +.L2170: + .align 2 +.L2169: + .word .LANCHOR2 + .word .LANCHOR2+1128 + .word -3932 + .word .LANCHOR0 + .word 1179929683 + .word 1342177379 + .word .LANCHOR2-1664 + .word .LANCHOR2-1276 + .word .LC47 + .fnend + .size FtlVpcTblFlush, .-FtlVpcTblFlush + .align 2 + .global FtlScanSysBlk + .syntax unified + .arm + .fpu softvfp + .type FtlScanSysBlk, %function +FtlScanSysBlk: + .fnstart + @ args = 0, pretend = 0, frame = 24 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r5, #0 + ldr r4, .L2250 + movw r3, #1144 + mov r1, r5 + .pad #28 + sub sp, sp, #28 + ldr r2, [r4, #-1636] + sub r7, r4, #1280 + ldr r0, [r4, #-1368] + sub r6, r4, #1632 + strh r5, [r4, r3] @ movhi + strh r5, [r7, #-8] @ movhi + lsl r2, r2, #2 + bl ftl_memset + ldr r2, [r4, #-1636] + mov r1, r5 + ldr r0, [r4, #-1400] + lsl r2, r2, #1 + bl ftl_memset + ldrh r2, [r6, #-12] + mov r1, r5 + ldr r0, [r4, #-1384] + lsl r2, r2, #2 + bl ftl_memset + ldrh r2, [r6, #-12] + mov r1, r5 + ldr r0, [r4, #-1392] + lsl r2, r2, #1 + bl ftl_memset + mov r2, #16 + mov r1, #255 + ldr r0, .L2250+4 + bl ftl_memset + sub r3, r4, #1712 + str r7, [sp, #8] + ldrh r3, [r3, #-12] + str r6, [sp, #12] + str r3, [sp] + sub r3, r4, #1696 + sub r3, r3, #10 + str r3, [sp, #16] +.L2172: + ldr r2, .L2250+8 + ldr r1, [sp] + ldrh r3, [r2] + cmp r3, r1 + bls .L2212 + mov r5, #0 + ldrh r3, [r2, #-10] + ldr r6, [r4, #-1500] + mov r7, r5 + ldr fp, [r4, #-1460] + mov r8, #36 + ldr r10, [r4, #-1432] + ldrh r9, [r2, #68] + b .L2213 +.L2174: + str r3, [sp, #20] + ldr r3, [sp, #16] + ldr r1, [sp] + ldrb r0, [r3, r5] @ zero_extendqisi2 + bl V2P_block + str r0, [sp, #4] + bl FtlBbmIsBadBlock + cmp r0, #0 + ldr r3, [sp, #20] + bne .L2173 + ldr r2, [sp, #4] + mla r1, r8, r7, r6 + lsl r2, r2, #10 + stmib r1, {r2, fp} + mul r2, r9, r7 + add r7, r7, #1 + uxth r7, r7 + add r0, r2, #3 + cmp r2, #0 + movlt r2, r0 + bic r2, r2, #3 + add r2, r10, r2 + str r2, [r1, #12] +.L2173: + add r5, r5, #1 +.L2213: + uxth r2, r5 + cmp r3, r2 + bhi .L2174 + cmp r7, #0 + bne .L2175 +.L2211: + ldr r3, [sp] + add r3, r3, #1 + uxth r3, r3 + str r3, [sp] + b .L2172 +.L2175: + ldr r8, .L2250+4 + mov r2, #1 + mov r1, r7 + mov r0, r6 + bl FlashReadPages + add r9, r8, #16 + mov r3, #0 + str r3, [sp, #4] +.L2176: + ldrh r3, [sp, #4] + cmp r7, r3 + bls .L2211 + ldr r3, [sp, #4] + mov r10, #36 + mul r10, r10, r3 + ldr r3, [r4, #-1500] + add r2, r3, r10 + ldr r3, [r3, r10] + ldr r5, [r2, #4] + ldr r6, [r2, #12] + cmn r3, #1 + ubfx r5, r5, #10, #16 + bne .L2179 + mov fp, #16 + movw r3, #65535 +.L2181: + ldr r0, [r4, #-1500] + str r3, [sp, #20] + add r0, r0, r10 + ldr r2, [r0, #4] + add r2, r2, #1 + str r2, [r0, #4] + mov r2, #1 + mov r1, r2 + bl FlashReadPages + ldrh r2, [r6] + ldr r3, [sp, #20] + cmp r2, r3 + bne .L2178 + ldr r3, [r4, #-1500] + mvn r2, #0 + str r2, [r3, r10] + ldr r3, [r4, #-1500] + ldr r3, [r3, r10] + cmp r3, r2 + beq .L2180 +.L2179: + ldr r2, [r4, #-1612] + ldr r3, [r6, #4] + cmn r2, #1 + beq .L2182 + cmp r2, r3 + bhi .L2183 +.L2182: + cmn r3, #1 + addne r2, r3, #1 + strne r2, [r4, #-1612] +.L2183: + ldrh r2, [r6] + movw r1, #61604 + cmp r2, r1 + beq .L2185 + bhi .L2186 + movw r3, #61574 + cmp r2, r3 + beq .L2187 +.L2184: + ldr r3, [sp, #4] + add r3, r3, #1 + str r3, [sp, #4] + b .L2176 +.L2178: + ldr r2, [r4, #-1500] + ldr r2, [r2, r10] + cmn r2, #1 + bne .L2179 + sub fp, fp, #1 + uxth fp, fp + cmp fp, #0 + bne .L2181 +.L2180: + ldrb r1, [r4, #-2740] @ zero_extendqisi2 + cmp r1, #0 + bne .L2249 +.L2209: + mov r0, r5 + bl FtlFreeSysBlkQueueIn + b .L2184 +.L2186: + movw r3, #61634 + cmp r2, r3 + beq .L2188 + movw r3, #65535 + cmp r2, r3 + bne .L2184 +.L2249: + mov r1, #0 + b .L2209 +.L2188: + ldr r0, [r4, #-1636] + ldrh r2, [r9] + ldr ip, [r4, #-1368] + uxth r1, r0 + sub r3, r1, #1 + sub r1, r1, r2 + sub r1, r1, #1 + sxth r3, r3 + sxth r1, r1 +.L2190: + cmp r3, r1 + bgt .L2196 + cmp r3, #0 + bge .L2226 + b .L2184 +.L2196: + ldr fp, [r6, #4] + lsl lr, r3, #2 + ldr r10, [ip, r3, lsl #2] + cmp fp, r10 + bls .L2191 + ldr r1, [ip] + cmp r1, #0 + bne .L2192 + cmp r0, r2 + addne r2, r2, #1 + strhne r2, [r9] @ movhi +.L2192: + uxth ip, r3 + mov r1, #0 +.L2193: + uxth r0, r1 + sxth r2, r1 + cmp r0, ip + bcc .L2194 + ldr r1, [r6, #4] + cmp r3, #0 + ldr r2, [r4, #-1368] + str r1, [r2, lr] + lsl r2, r3, #1 + ldr r1, [r4, #-1400] + strh r5, [r1, r2] @ movhi + blt .L2184 + ldrh r2, [r9] + ldr r1, [r4, #-1636] + sub r1, r1, r2 + sub r1, r1, #1 + sxth r1, r1 + cmp r3, r1 + bgt .L2184 +.L2226: + add r2, r2, #1 + ldr r1, [r6, #4] + strh r2, [r9] @ movhi + ldr r2, [r4, #-1368] + str r1, [r2, r3, lsl #2] + lsl r3, r3, #1 + ldr r2, [r4, #-1400] +.L2247: + strh r5, [r2, r3] @ movhi + b .L2184 +.L2194: + ldr r0, [r4, #-1368] + add r1, r1, #1 + add r10, r0, r2, lsl #2 + ldr r10, [r10, #4] + str r10, [r0, r2, lsl #2] + lsl r2, r2, #1 + ldr r0, [r4, #-1400] + add r10, r0, r2 + ldrh r10, [r10, #2] + strh r10, [r0, r2] @ movhi + b .L2193 +.L2191: + sub r3, r3, #1 + sxth r3, r3 + b .L2190 +.L2187: + ldr r3, [sp, #12] + ldr r1, [sp, #8] + ldr ip, [r4, #-1384] + ldrh r2, [r3, #-12] + ldrh r1, [r1, #-8] + sub r0, r2, #1 + sxth r3, r0 + sub r0, r0, r1 +.L2199: + cmp r3, r0 + ble .L2204 + ldr fp, [r6, #4] + lsl lr, r3, #2 + ldr r10, [ip, r3, lsl #2] + cmp fp, r10 + bls .L2200 + sub r2, r2, r1 + ldr r0, [ip] + clz r2, r2 + uxth ip, r3 + lsr r2, r2, #5 + cmp r0, #0 + orrne r2, r2, #1 + cmp r2, #0 + ldreq r2, .L2250+12 + addeq r1, r1, #1 + strheq r1, [r2] @ movhi + mov r1, #0 +.L2202: + uxth r0, r1 + sxth r2, r1 + cmp r0, ip + bcc .L2203 + ldr r1, [r6, #4] + ldr r2, [r4, #-1384] + str r1, [r2, lr] + lsl r2, r3, #1 + ldr r1, [r4, #-1392] + strh r5, [r1, r2] @ movhi +.L2204: + cmp r3, #0 + blt .L2184 + ldr r2, [sp, #8] + ldrh r1, [r2, #-8] + ldr r2, .L2250+16 + ldrh r2, [r2] + sub r2, r2, #1 + sub r2, r2, r1 + sxth r2, r2 + cmp r3, r2 + bgt .L2184 + ldr r2, [sp, #8] + add r1, r1, #1 + strh r1, [r2, #-8] @ movhi + ldr r2, [r4, #-1384] + ldr r1, [r6, #4] + str r1, [r2, r3, lsl #2] + lsl r3, r3, #1 + ldr r2, [r4, #-1392] + b .L2247 +.L2203: + ldr r0, [r4, #-1384] + add r1, r1, #1 + add r10, r0, r2, lsl #2 + ldr r10, [r10, #4] + str r10, [r0, r2, lsl #2] + lsl r2, r2, #1 + ldr r0, [r4, #-1392] + add r10, r0, r2 + ldrh r10, [r10, #2] + strh r10, [r0, r2] @ movhi + b .L2202 +.L2200: + sub r3, r3, #1 + sxth r3, r3 + b .L2199 +.L2185: + ldrh r1, [r8] + movw r2, #65535 + cmp r1, r2 + strheq r5, [r8] @ movhi + beq .L2248 + ldrh r0, [r8, #4] + cmp r0, r2 + beq .L2207 + mov r1, #1 + bl FtlFreeSysBlkQueueIn +.L2207: + ldr r3, [r6, #4] + ldr r2, [r4, #1136] + cmp r2, r3 + strhcs r5, [r8, #4] @ movhi + bcs .L2184 + ldrh r3, [r8] + strh r5, [r8] @ movhi + strh r3, [r8, #4] @ movhi + ldr r3, [r6, #4] +.L2248: + str r3, [r4, #1136] + b .L2184 +.L2212: + ldr r1, [r4, #-1400] + ldrh r3, [r1] + cmp r3, #0 + beq .L2214 +.L2217: + ldr r1, [r4, #-1392] + ldrh r2, [r1] + cmp r2, #0 + beq .L2215 +.L2237: + mov r0, #0 + add sp, sp, #28 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2214: + movw r2, #1144 + ldrh r2, [r4, r2] + cmp r2, #0 + ldrne r0, [r4, #-1636] + beq .L2217 +.L2218: + sxth r2, r3 + cmp r2, r0 + bcs .L2217 + lsl ip, r2, #1 + add r3, r3, #1 + ldrh ip, [r1, ip] + cmp ip, #0 + beq .L2218 + mov r3, r2 + mov lr, #0 +.L2219: + ldr r1, [r4, #-1636] + cmp r3, r1 + bcs .L2217 + ldr r0, [r4, #-1400] + lsl r1, r3, #1 + sub ip, r3, r2 + lsl r5, ip, #1 + ldrh r6, [r0, r1] + strh r6, [r0, r5] @ movhi + ldr r0, [r4, #-1368] + ldr r5, [r0, r3, lsl #2] + add r3, r3, #1 + sxth r3, r3 + str r5, [r0, ip, lsl #2] + ldr r0, [r4, #-1400] + strh lr, [r0, r1] @ movhi + b .L2219 +.L2215: + ldr r3, .L2250+20 + ldrh r0, [r3, #-8] + cmp r0, #0 + subne r3, r3, #352 + ldrhne r0, [r3, #-12] + beq .L2237 +.L2222: + sxth r3, r2 + cmp r3, r0 + mov lr, r3 + bge .L2237 + lsl ip, r3, #1 + add r2, r2, #1 + ldrh ip, [r1, ip] + cmp ip, #0 + beq .L2222 + mov ip, #0 +.L2223: + ldr r2, [sp, #12] + ldrh r2, [r2, #-12] + cmp r3, r2 + bge .L2237 + ldr r1, [r4, #-1392] + lsl r2, r3, #1 + sub r0, r3, lr + lsl r5, r0, #1 + ldrh r6, [r1, r2] + strh r6, [r1, r5] @ movhi + ldr r1, [r4, #-1384] + ldr r5, [r1, r3, lsl #2] + add r3, r3, #1 + sxth r3, r3 + str r5, [r1, r0, lsl #2] + ldr r1, [r4, #-1392] + strh ip, [r1, r2] @ movhi + b .L2223 +.L2251: + .align 2 +.L2250: + .word .LANCHOR2 + .word .LANCHOR2+1128 + .word .LANCHOR2-1722 + .word .LANCHOR2-1288 + .word .LANCHOR2-1644 + .word .LANCHOR2-1280 + .fnend + .size FtlScanSysBlk, .-FtlScanSysBlk + .align 2 + .global FtlLoadEctTbl + .syntax unified + .arm + .fpu softvfp + .type FtlLoadEctTbl, %function +FtlLoadEctTbl: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + mov r0, #64 + ldr r4, .L2255 + sub r5, r4, #1424 + ldr r2, [r4, #-1416] + ldrh r1, [r5] + bl FtlVendorPartRead + ldr r3, [r4, #-1416] + ldr r2, [r3] + ldr r3, .L2255+4 + cmp r2, r3 + beq .L2253 + ldr r1, .L2255+8 + ldr r0, .L2255+12 + bl rk_printk + ldrh r2, [r5] + mov r1, #0 + ldr r0, [r4, #-1416] + lsl r2, r2, #9 + bl ftl_memset +.L2253: + mov r0, #0 + pop {r4, r5, r6, pc} +.L2256: + .align 2 +.L2255: + .word .LANCHOR2 + .word 1112818501 + .word .LC48 + .word .LC49 + .fnend + .size FtlLoadEctTbl, .-FtlLoadEctTbl + .align 2 + .global ftl_set_blk_mode + .syntax unified + .arm + .fpu softvfp + .type ftl_set_blk_mode, %function +ftl_set_blk_mode: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + cmp r1, #0 + mov r3, r0 + beq .L2258 + b ftl_set_blk_mode.part.17 +.L2258: + ldr r2, .L2259 + lsr r0, r0, #5 + and r3, r3, #31 + mov ip, #1 + ldr r1, [r2, #32] + ldr r2, [r1, r0, lsl #2] + bic r3, r2, ip, lsl r3 + str r3, [r1, r0, lsl #2] + bx lr +.L2260: + .align 2 +.L2259: + .word .LANCHOR0 + .fnend + .size ftl_set_blk_mode, .-ftl_set_blk_mode + .align 2 + .global ftl_get_blk_mode + .syntax unified + .arm + .fpu softvfp + .type ftl_get_blk_mode, %function +ftl_get_blk_mode: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L2262 + lsr r2, r0, #5 + and r0, r0, #31 + ldr r3, [r3, #32] + ldr r3, [r3, r2, lsl #2] + lsr r0, r3, r0 + and r0, r0, #1 + bx lr +.L2263: + .align 2 +.L2262: + .word .LANCHOR0 + .fnend + .size ftl_get_blk_mode, .-ftl_get_blk_mode + .align 2 + .global FtlCheckVpc + .syntax unified + .arm + .fpu softvfp + .type FtlCheckVpc, %function +FtlCheckVpc: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #12 + mov r4, #0 + ldr r6, .L2285 + ldr r7, .L2285+4 + ldr r1, .L2285+8 + mov r5, r6 + ldr r0, .L2285+12 + bl rk_printk + mov r2, #8192 + mov r1, #0 + ldr r0, .L2285+4 + bl memset +.L2265: + ldr r3, [r6, #-1284] + cmp r4, r3 + bcc .L2267 + ldr r8, .L2285+4 + mov r4, #0 + ldr r9, .L2285+16 + mov r6, r4 +.L2268: + ldr r3, .L2285+20 + ldrh r2, [r3] + uxth r3, r4 + cmp r2, r3 + bhi .L2270 + ldr r4, [r5, #876] + cmp r4, #0 + beq .L2271 + ldr r3, .L2285+24 + mov r7, #0 + ldr r9, .L2285+4 + mov fp, #6 + ldr r10, .L2285+28 + ldrh r8, [r3] + ldr r3, [r5, #-1356] + sub r4, r4, r3 + ldr r3, .L2285+32 + asr r4, r4, #1 + mul r4, r3, r4 + uxth r4, r4 +.L2272: + uxth r3, r7 + cmp r8, r3 + bls .L2271 + ldr r2, [r5, #-1404] + lsl r3, r4, #1 + ldrh r2, [r2, r3] + cmp r2, #0 + beq .L2273 + mov r6, #1 + ldrh r3, [r9, r3] + mov r1, r4 + mov r0, r10 + bl rk_printk +.L2273: + mul r4, fp, r4 + ldr r3, [r5, #-1356] + add r7, r7, #1 + ldrh r4, [r3, r4] + movw r3, #65535 + cmp r4, r3 + bne .L2272 +.L2271: + mov r1, r6 + ldr r0, .L2285+36 + bl rk_printk + add sp, sp, #12 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2267: + mov r2, #0 + add r1, sp, #4 + mov r0, r4 + bl log2phys + ldr r0, [sp, #4] + cmn r0, #1 + beq .L2266 + ubfx r0, r0, #10, #16 + bl P2V_block_in_plane + lsl r0, r0, #1 + ldrh r3, [r7, r0] + add r3, r3, #1 + strh r3, [r7, r0] @ movhi +.L2266: + add r4, r4, #1 + b .L2265 +.L2270: + uxth r1, r4 + ldr r3, [r5, #-1404] + lsl r7, r1, #1 + ldrh r2, [r3, r7] + ldrh r3, [r8, r7] + cmp r2, r3 + beq .L2269 + mov r0, r9 + bl rk_printk + ldr r3, [r5, #-1404] + movw r2, #65535 + ldrh r3, [r3, r7] + cmp r3, r2 + beq .L2269 + ldrh r2, [r8, r7] + cmp r2, r3 + movhi r6, #1 +.L2269: + add r4, r4, #1 + b .L2268 +.L2286: + .align 2 +.L2285: + .word .LANCHOR2 + .word check_valid_page_count_table + .word .LANCHOR3+141 + .word .LC50 + .word .LC51 + .word .LANCHOR2-1724 + .word .LANCHOR2+880 + .word .LC52 + .word -1431655765 + .word .LC53 + .fnend + .size FtlCheckVpc, .-FtlCheckVpc + .align 2 + .global FtlDumpSysBlock + .syntax unified + .arm + .fpu softvfp + .type FtlDumpSysBlock, %function +FtlDumpSysBlock: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, lr} + .save {r4, r5, r6, r7, r8, r9, lr} + lsl r8, r0, #10 + ldr r4, .L2295 + .pad #28 + sub sp, sp, #28 + mov r7, r0 + mov r5, #0 + ldr r3, [r4, #-1472] + sub r6, r4, #1264 + sub r9, r4, #1664 + sub r6, r6, #12 + str r3, [r4, #-1268] + ldr r3, [r4, #-1440] + str r3, [r4, #-1264] +.L2288: + ldrh r2, [r9] + sxth r3, r5 + cmp r3, r2 + blt .L2290 + add sp, sp, #28 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, pc} +.L2290: + mov r2, #1 + orr r3, r3, r8 + mov r1, r2 + mov r0, r6 + str r3, [r4, #-1272] + bl FlashReadPages + ldr r2, [r4, #-1268] + mov r1, r7 + ldr r3, [r4, #-1264] + ldr r0, .L2295+4 + ldr r2, [r2] + str r2, [sp, #16] + ldr r2, [r3, #12] + str r2, [sp, #12] + ldr r2, [r3, #8] + str r2, [sp, #8] + ldr r2, [r3, #4] + str r2, [sp, #4] + ldr r3, [r3] + ldr r2, [r4, #-1276] + str r3, [sp] + ldr r3, [r4, #-1272] + bl rk_printk + ldr r3, [r4, #-1264] + ldr r3, [r3] + cmn r3, #1 + beq .L2289 + mov r3, #768 + mov r2, #4 + ldr r1, [r4, #-1472] + ldr r0, .L2295+8 + bl rknand_print_hex +.L2289: + add r5, r5, #1 + b .L2288 +.L2296: + .align 2 +.L2295: + .word .LANCHOR2 + .word .LC54 + .word .LC55 + .fnend + .size FtlDumpSysBlock, .-FtlDumpSysBlock + .align 2 + .global Ftlscanalldata + .syntax unified + .arm + .fpu softvfp + .type Ftlscanalldata, %function +Ftlscanalldata: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + mov r5, #0 + ldr r6, .L2306 + .pad #32 + sub sp, sp, #32 + mov r1, #0 + ldr r8, .L2306+4 + mov r4, r6 + ldr r0, .L2306+8 + bl rk_printk +.L2298: + ldr r3, [r6, #-1284] + cmp r5, r3 + bcc .L2304 + add sp, sp, #32 + @ sp needed + pop {r4, r5, r6, r7, r8, pc} +.L2304: + mov r2, #0 + add r1, sp, #28 + mov r0, r5 + bl log2phys + ubfx r3, r5, #0, #11 + cmp r3, #0 + bne .L2299 + ldr r2, [sp, #28] + mov r1, r5 + mov r0, r8 + bl rk_printk +.L2299: + ldr r3, [sp, #28] + cmn r3, #1 + beq .L2301 + str r3, [r4, #-1272] + mov r2, #0 + ldr r3, [r4, #-1472] + mov r1, #1 + ldr r7, [r4, #-1440] + ldr r0, .L2306+12 + str r3, [r4, #-1268] + str r5, [r4, #-1260] + str r7, [r4, #-1264] + str r2, [r4, #-1276] + bl FlashReadPages + ldr r3, [r4, #-1276] + cmn r3, #1 + cmpne r3, #256 + beq .L2302 + ldr r3, [r7, #8] + cmp r5, r3 + beq .L2301 +.L2302: + ldr r2, [r4, #-1268] + ldr r3, [r4, #-1264] + ldr r0, .L2306+16 + ldr r1, [r2, #4] + str r1, [sp, #16] + mov r1, r5 + ldr r2, [r2] + str r2, [sp, #12] + ldr r2, [r3, #12] + str r2, [sp, #8] + ldr r2, [r3, #8] + str r2, [sp, #4] + ldr r2, [r3, #4] + str r2, [sp] + ldr r3, [r3] + ldr r2, [r4, #-1272] + bl rk_printk +.L2301: + add r5, r5, #1 + b .L2298 +.L2307: + .align 2 +.L2306: + .word .LANCHOR2 + .word .LC57 + .word .LC56 + .word .LANCHOR2-1276 + .word .LC58 + .fnend + .size Ftlscanalldata, .-Ftlscanalldata + .align 2 + .global dump_map_info + .syntax unified + .arm + .fpu softvfp + .type dump_map_info, %function +dump_map_info: + .fnstart + @ args = 0, pretend = 0, frame = 16 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #44 + sub sp, sp, #44 + ldr r8, .L2323 + ldrh r6, [r8, #-12] + add fp, r8, #6 +.L2309: + ldrh r3, [r8, #-10] + ldr r1, .L2323+4 + cmp r3, r6 + mov r4, r1 + bhi .L2316 + sub r8, r1, #1264 + mov r7, #0 + sub r8, r8, #12 +.L2317: + ldr r3, .L2323+8 + sxth r5, r7 + ldrh r3, [r3] + cmp r5, r3 + bge .L2320 + lsl r5, r5, #1 + mov r6, #0 + ldr r9, .L2323+12 + b .L2321 +.L2311: + mov r1, r6 + ldrb r0, [fp, r7] @ zero_extendqisi2 + str r3, [sp, #36] + str r2, [sp, #32] + bl V2P_block + str r0, [sp, #28] + bl FtlBbmIsBadBlock + cmp r0, #0 + ldr r2, [sp, #32] + ldr r3, [sp, #36] + bne .L2310 + mov r1, #36 + mla r0, r1, r5, r9 + ldr r1, [sp, #28] + lsl r1, r1, #10 + stmib r0, {r1, r3} + ldr r1, [sp, #24] + mul r1, r1, r5 + add r5, r5, #1 + uxth r5, r5 + add ip, r1, #3 + cmp r1, #0 + movlt r1, ip + bic r1, r1, #3 + add r1, r10, r1 + str r1, [r0, #12] +.L2310: + add r7, r7, #1 +.L2318: + uxth r1, r7 + cmp r2, r1 + bhi .L2311 + cmp r5, #0 + bne .L2312 +.L2315: + add r6, r6, #1 + uxth r6, r6 + b .L2309 +.L2312: + ldr r10, .L2323+16 + mov r0, r9 + mov r7, #0 + mov r9, #36 + mov r2, #1 + mov r1, r5 + bl FlashReadPages +.L2313: + uxth r3, r7 + cmp r5, r3 + bls .L2315 + ldr r3, [r4, #-1500] + mla r3, r9, r7, r3 + add r7, r7, #1 + ldr r1, [r3, #12] + ldr r2, [r3, #4] + ldr r3, [r3, #8] + ldr r0, [r3, #4] + str r0, [sp, #16] + mov r0, r10 + ldr r3, [r3] + str r3, [sp, #12] + ldr r3, [r1, #12] + str r3, [sp, #8] + ldr r3, [r1, #8] + str r3, [sp, #4] + ldr r3, [r1, #4] + str r3, [sp] + ldr r3, [r1] + ubfx r1, r2, #10, #16 + bl rk_printk + b .L2313 +.L2316: + sub r0, r1, #1728 + ldr r9, [r1, #-1500] + ldr r3, [r1, #-1460] + mov r7, #0 + ldr r10, [r1, #-1432] + mov r5, r7 + ldrh r1, [r0, #74] + ldrh r2, [r0, #-4] + str r1, [sp, #24] + b .L2318 +.L2319: + ldr r2, [r4, #-1400] + mov r0, r8 + ldrh r2, [r2, r5] + orr r3, r3, r2, lsl #10 + mov r2, #1 + mov r1, r2 + str r3, [r4, #-1272] + bl FlashReadPages + ldr r2, [r4, #-1268] + ldr r1, [r4, #-1400] + ldr r3, [r4, #-1264] + ldr r0, [r2, #4] + ldrh r1, [r1, r5] + str r0, [sp, #20] + ldr r2, [r2] + ldr r0, .L2323+20 + str r2, [sp, #16] + ldr r2, [r3, #12] + str r2, [sp, #12] + ldr r2, [r3, #8] + str r2, [sp, #8] + ldr r2, [r3, #4] + str r2, [sp, #4] + ldr r3, [r3] + str r3, [sp] + ldr r3, [r4, #-1272] + ldr r2, [r4, #-1276] + bl rk_printk +.L2321: + ldrh r2, [r9] + sxth r3, r6 + add r6, r6, #1 + cmp r3, r2 + blt .L2319 + add r7, r7, #1 + b .L2317 +.L2320: + ldr r5, .L2323+24 + mov r2, #2 + ldr r3, [r4, #-1636] + ldr r1, [r4, #-1400] + ldr r0, .L2323+28 + bl rknand_print_hex + ldrh r3, [r5, #-12] + mov r2, #4 + ldr r1, [r4, #-1376] + ldr r0, .L2323+32 + bl rknand_print_hex + ldrh r3, [r5, #-12] + mov r2, #4 + ldr r1, [r4, #-1372] + ldr r0, .L2323+36 + add sp, sp, #44 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, lr} + b rknand_print_hex +.L2324: + .align 2 +.L2323: + .word .LANCHOR2-1712 + .word .LANCHOR2 + .word .LANCHOR2+1144 + .word .LANCHOR2-1664 + .word .LC59 + .word .LC60 + .word .LANCHOR2-1616 + .word .LC61 + .word .LC62 + .word .LC63 + .fnend + .size dump_map_info, .-dump_map_info + .align 2 + .global FtlMapTblRecovery + .syntax unified + .arm + .fpu softvfp + .type FtlMapTblRecovery, %function +FtlMapTblRecovery: + .fnstart + @ args = 0, pretend = 0, frame = 32 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #36 + sub sp, sp, #36 + ldr r3, [r0, #24] + mov r4, r0 + mov r1, #0 + mov r6, #0 + ldrh fp, [r0, #6] + str r3, [sp, #4] + ldr r3, [r0, #16] + ldr r5, .L2367 + ldr r10, [r0, #12] + lsl r2, fp, #2 + str r3, [sp, #12] + ldrh r3, [r0, #8] + mov r8, r5 + ldr r0, [sp, #4] + str r3, [sp, #8] + bl ftl_memset + ldr r3, [r5, #-1472] + ldr r7, [r5, #-1440] + str r6, [r4, #32] + str r3, [r5, #-1268] + mvn r3, #0 + str r7, [r5, #-1264] + strh r3, [r4] @ movhi + strh r3, [r4, #2] @ movhi + mov r3, #1 + str r3, [r4, #36] + sub r3, r5, #1664 + add r3, r3, #388 + str r6, [r4, #28] + str r3, [sp, #20] +.L2326: + ldr r2, [sp, #8] + sxth r3, r6 + cmp r3, r2 + bge .L2345 + ldr r2, [sp, #8] + sub r2, r2, #1 + cmp r3, r2 + lsl r2, r3, #1 + bne .L2327 + ldrh r0, [r10, r2] + mov r1, #1 + str r3, [sp, #16] + add r3, r10, r2 + str r3, [sp, #8] + mov r8, #0 + bl FtlGetLastWrittenPage + ldr r2, [sp, #12] + sxth r9, r0 + ldr r3, [sp, #16] + add r0, r0, #1 + strh r6, [r4] @ movhi + ldr r10, .L2367+4 + ldr r6, .L2367+8 + strh r0, [r4, #2] @ movhi + ldr r3, [r2, r3, lsl #2] + str r3, [r4, #28] +.L2328: + sxth r2, r8 + add r1, r9, #1 + cmp r2, r1 + blt .L2331 +.L2345: + mov r0, r4 + bl ftl_free_no_use_map_blk + ldr r3, .L2367+12 + ldrh r2, [r4, #2] + ldrh r3, [r3] + cmp r2, r3 + bne .L2333 + mov r0, r4 + bl ftl_map_blk_alloc_new_blk +.L2333: + mov r0, r4 + bl ftl_map_blk_gc + mov r0, r4 + bl ftl_map_blk_gc + mov r0, #0 + add sp, sp, #36 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2331: + ldr r3, [sp, #8] + mov r0, r6 + ldrh r1, [r3] + orr r2, r2, r1, lsl #10 + str r2, [r5, #-1272] + mov r2, #1 + mov r1, r2 + bl FlashReadPages + ldrb r2, [r10, #36] @ zero_extendqisi2 + cmp r2, #0 + beq .L2329 + ldr r2, [r5, #-1264] + ldr r2, [r2, #12] + cmp r2, #0 + str r2, [sp, #12] + beq .L2329 + sub r1, r6, #380 + ldr r0, [r5, #-1268] + ldrh r1, [r1] + bl js_hash + ldr r2, [sp, #12] + cmp r2, r0 + mvnne r2, #0 + strne r2, [r5, #-1276] +.L2329: + ldr r1, .L2367 + ldr r2, [r1, #-1276] + cmn r2, #1 + beq .L2330 + ldrh r2, [r7, #8] + cmp fp, r2 + bls .L2330 + ldrh ip, [r7] + ldrh r0, [r4, #4] + cmp ip, r0 + ldreq r1, [r1, #-1272] + ldreq r3, [sp, #4] + streq r1, [r3, r2, lsl #2] +.L2330: + add r8, r8, #1 + b .L2328 +.L2327: + ldr r3, [r5, #-1472] + ldr r0, [sp, #20] + str r3, [r5, #-1268] + add r3, r10, r2 + str r3, [sp, #16] + ldr r3, .L2367+12 + ldrh r2, [r10, r2] + ldrh r3, [r3] + sub r3, r3, #1 + orr r3, r3, r2, lsl #10 + mov r2, #1 + mov r1, r2 + str r3, [r5, #-1272] + bl FlashReadPages + ldr r3, [r5, #-1276] + cmn r3, #1 + beq .L2347 + ldrh r2, [r7] + ldrh r3, [r4, #4] + cmp r2, r3 + bne .L2347 + ldrh r2, [r7, #8] + movw r3, #64245 + cmp r2, r3 + beq .L2335 +.L2347: + mov r9, #0 +.L2336: + ldr r2, .L2367+12 + sxth r3, r9 + ldrh r2, [r2] + cmp r3, r2 + bge .L2343 + ldr r2, [sp, #16] + ldrh r2, [r2] + orr r3, r3, r2, lsl #10 + mov r2, #1 + mov r1, r2 + str r3, [r8, #-1272] + ldr r3, .L2367+8 + mov r0, r3 + str r3, [sp, #28] + bl FlashReadPages + ldr r2, .L2367+4 + ldrb r2, [r2, #36] @ zero_extendqisi2 + cmp r2, #0 + beq .L2340 + ldr r2, [r8, #-1264] + ldr r2, [r2, #12] + cmp r2, #0 + str r2, [sp, #24] + beq .L2340 + ldr r3, [sp, #28] + ldr r0, [r8, #-1268] + sub r3, r3, #380 + ldrh r1, [r3] + bl js_hash + ldr r2, [sp, #24] + cmp r2, r0 + mvnne r3, #0 + strne r3, [r8, #-1276] +.L2340: + ldr r3, [r8, #-1276] + cmn r3, #1 + beq .L2341 + ldrh r3, [r7, #8] + cmp fp, r3 + bls .L2341 + ldrh r1, [r7] + ldrh r2, [r4, #4] + cmp r1, r2 + ldreq r2, [r8, #-1272] + ldreq r1, [sp, #4] + streq r2, [r1, r3, lsl #2] +.L2341: + add r9, r9, #1 + b .L2336 +.L2335: + mov r1, #0 + mov ip, #4 +.L2337: + ldr r2, .L2367+12 + sxth r3, r1 + ldrh r2, [r2] + sub r2, r2, #1 + cmp r3, r2 + blt .L2339 +.L2343: + add r6, r6, #1 + b .L2326 +.L2339: + ldr r0, [r8, #-1472] + add r1, r1, #1 + ldr r2, [r0, r3, lsl #3] + uxth lr, r2 + cmp fp, lr + addhi r3, ip, r3, lsl #3 + movhi r2, lr + ldrhi r3, [r0, r3] + ldrhi r0, [sp, #4] + strhi r3, [r0, r2, lsl #2] + b .L2337 +.L2368: + .align 2 +.L2367: + .word .LANCHOR2 + .word .LANCHOR0 + .word .LANCHOR2-1276 + .word .LANCHOR2-1664 + .fnend + .size FtlMapTblRecovery, .-FtlMapTblRecovery + .align 2 + .global FtlLoadVonderInfo + .syntax unified + .arm + .fpu softvfp + .type FtlLoadVonderInfo, %function +FtlLoadVonderInfo: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L2371 + push {r4, lr} + .save {r4, lr} + sub r2, r3, #1632 + add r0, r3, #1072 + ldrh r1, [r2, #-12] + add r0, r0, #4 + ldrh r2, [r2, #-10] + strh r1, [r0, #10] @ movhi + strh r2, [r0, #6] @ movhi + ldr r2, [r3, #-1392] + ldr r1, .L2371+4 + str r2, [r3, #1088] + ldr r2, [r3, #-1384] + strh r1, [r0, #4] @ movhi + sub r1, r3, #1280 + ldrh r1, [r1, #-8] + str r2, [r3, #1092] + ldr r2, [r3, #-1388] + strh r1, [r0, #8] @ movhi + str r2, [r3, #1096] + ldr r2, [r3, #-1380] + str r2, [r3, #1100] + bl FtlMapTblRecovery + mov r0, #0 + pop {r4, pc} +.L2372: + .align 2 +.L2371: + .word .LANCHOR2 + .word -3962 + .fnend + .size FtlLoadVonderInfo, .-FtlLoadVonderInfo + .align 2 + .global FtlL2PDataInit + .syntax unified + .arm + .fpu softvfp + .type FtlL2PDataInit, %function +FtlL2PDataInit: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + mov r1, #0 + ldr r4, .L2377 + ldr r2, [r4, #-1636] + sub r6, r4, #1648 + sub r5, r4, #1616 + ldr r0, [r4, #-1396] + lsl r2, r2, #1 + bl ftl_memset + ldrh r3, [r6, #-8] + mov r1, #255 + ldrh r2, [r5, #-10] + ldr r0, [r4, #-1360] + mul r2, r2, r3 + bl ftl_memset + mov r2, #0 + mov r3, r4 + mov r0, r6 + mov r1, r5 + mov r4, #12 + mov r5, r2 + mvn r6, #0 +.L2374: + ldrh r7, [r1, #-10] + uxth ip, r2 + add lr, r2, #1 + cmp r7, ip + bhi .L2375 + ldr r2, .L2377+4 + mvn r0, #0 + movw ip, #1028 + ldrh r1, [r1, #-12] + strh r0, [r3, ip] @ movhi + strh r0, [r2, #2] @ movhi + ldr r0, [r3, #-1636] + strh r1, [r2, #6] @ movhi + strh r0, [r2, #10] @ movhi + ldr r0, .L2377+8 + strh r0, [r2, #4] @ movhi + movw r0, #1144 + ldrh r0, [r3, r0] + strh r0, [r2, #8] @ movhi + ldr r2, [r3, #-1400] + str r2, [r3, #1040] + ldr r2, [r3, #-1368] + str r2, [r3, #1044] + ldr r2, [r3, #-1396] + str r2, [r3, #1048] + ldr r2, [r3, #-1376] + str r2, [r3, #1052] + pop {r4, r5, r6, r7, r8, pc} +.L2375: + uxth r2, r2 + ldr ip, [r3, #-1364] + mul r7, r4, r2 + add r8, ip, r7 + str r5, [r8, #4] + strh r6, [ip, r7] @ movhi + ldr ip, [r3, #-1364] + add ip, ip, r7 + ldrh r7, [r0, #-8] + mul r2, r2, r7 + ldr r7, [r3, #-1360] + bic r2, r2, #3 + add r2, r7, r2 + str r2, [ip, #8] + mov r2, lr + b .L2374 +.L2378: + .align 2 +.L2377: + .word .LANCHOR2 + .word .LANCHOR2+1028 + .word -3902 + .fnend + .size FtlL2PDataInit, .-FtlL2PDataInit + .align 2 + .global FtlLoadMapInfo + .syntax unified + .arm + .fpu softvfp + .type FtlLoadMapInfo, %function +FtlLoadMapInfo: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, lr} + .save {r4, lr} + bl FtlL2PDataInit + ldr r0, .L2381 + bl FtlMapTblRecovery + mov r0, #0 + pop {r4, pc} +.L2382: + .align 2 +.L2381: + .word .LANCHOR2+1028 + .fnend + .size FtlLoadMapInfo, .-FtlLoadMapInfo + .align 2 + .global ftl_sb_update_avl_pages + .syntax unified + .arm + .fpu softvfp + .type ftl_sb_update_avl_pages, %function +ftl_sb_update_avl_pages: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + mov r3, #0 + push {r4, lr} + .save {r4, lr} + strh r3, [r0, #4] @ movhi + movw r4, #65535 + ldr r3, .L2391 + ldrh lr, [r3, #-4] + add r3, r0, r2, lsl #1 + add r3, r3, #14 +.L2384: + cmp r2, lr + bcc .L2386 + ldr r3, .L2391+4 + add ip, r0, #16 + movw r4, #65535 + ldrh r3, [r3, #-2] + sub r3, r3, #1 + sub r1, r3, r1 + mov r3, #0 + uxth r1, r1 +.L2387: + uxth r2, r3 + cmp lr, r2 + bhi .L2389 + pop {r4, pc} +.L2386: + ldrh ip, [r3, #2]! + add r2, r2, #1 + uxth r2, r2 + cmp ip, r4 + ldrhne ip, [r0, #4] + addne ip, ip, #1 + strhne ip, [r0, #4] @ movhi + b .L2384 +.L2389: + ldrh r2, [ip], #2 + add r3, r3, #1 + cmp r2, r4 + ldrhne r2, [r0, #4] + addne r2, r1, r2 + strhne r2, [r0, #4] @ movhi + b .L2387 +.L2392: + .align 2 +.L2391: + .word .LANCHOR2-1728 + .word .LANCHOR2-1664 + .fnend + .size ftl_sb_update_avl_pages, .-ftl_sb_update_avl_pages + .align 2 + .global FtlReUsePrevPpa + .syntax unified + .arm + .fpu softvfp + .type FtlReUsePrevPpa, %function +FtlReUsePrevPpa: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r4, r5, r6, r7, r8, r9, lr} + .save {r4, r5, r6, r7, r8, r9, lr} + .pad #12 + mov r5, r0 + ldr r6, .L2403 + ubfx r0, r1, #10, #16 + str r1, [sp, #4] + bl P2V_block_in_plane + ldr r2, [r6, #-1404] + lsl r7, r0, #1 + ldrh r3, [r2, r7] + cmp r3, #0 + bne .L2394 + ldr r4, [r6, #876] + cmp r4, #0 + beq .L2395 + ldr r2, [r6, #-1356] + add r8, r6, #880 + ldr ip, .L2403+4 + mov lr, #6 + ldrh r1, [r8] + movw r9, #65535 + sub r4, r4, r2 + asr r4, r4, #1 + mul r4, ip, r4 + uxth r4, r4 +.L2396: + uxth ip, r3 + cmp r1, ip + bls .L2395 + cmp r4, r0 + bne .L2397 + mov r1, r4 + ldr r0, .L2403+8 + bl List_remove_node + ldrh r3, [r8] + mov r0, r4 + sub r3, r3, #1 + strh r3, [r8] @ movhi + bl INSERT_DATA_LIST + ldr r2, [r6, #-1404] + ldrh r3, [r2, r7] +.L2394: + add r3, r3, #1 + strh r3, [r2, r7] @ movhi + b .L2395 +.L2397: + mul r4, lr, r4 + add r3, r3, #1 + ldrh r4, [r2, r4] + cmp r4, r9 + bne .L2396 +.L2395: + mov r2, #1 + add r1, sp, #4 + mov r0, r5 + bl log2phys + add sp, sp, #12 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, pc} +.L2404: + .align 2 +.L2403: + .word .LANCHOR2 + .word -1431655765 + .word .LANCHOR2+876 + .fnend + .size FtlReUsePrevPpa, .-FtlReUsePrevPpa + .align 2 + .global make_superblock + .syntax unified + .arm + .fpu softvfp + .type make_superblock, %function +make_superblock: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L2418 + push {r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + mov r4, r0 + add r7, r0, #16 + mvn r9, #0 + add r6, r3, #22 + mov r5, #0 + ldrh r8, [r3, #-4] + strh r5, [r0, #4] @ movhi + strb r5, [r0, #7] +.L2406: + uxth r3, r5 + cmp r8, r3 + bhi .L2408 + ldr r2, .L2418+4 + ldrb r3, [r4, #7] @ zero_extendqisi2 + sub r1, r2, #1664 + ldrh r1, [r1, #-2] + smulbb r3, r3, r1 + strh r3, [r4, #4] @ movhi + mov r3, #0 + strb r3, [r4, #9] + ldr r3, [r2, #-1868] + cmp r3, #0 + beq .L2409 + ldrh r3, [r4] + ldr r2, [r2, #-1412] + lsl r3, r3, #1 + ldrh r3, [r2, r3] + cmp r3, #79 + movls r3, #1 + strbls r3, [r4, #9] +.L2409: + ldr r3, .L2418+8 + mov r0, #0 + ldrb r3, [r3, #36] @ zero_extendqisi2 + cmp r3, #0 + movne r3, #1 + strbne r3, [r4, #9] + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L2408: + ldrb r0, [r6, r5] @ zero_extendqisi2 + add r7, r7, #2 + ldrh r1, [r4] + add r5, r5, #1 + bl V2P_block + strh r9, [r7, #-2] @ movhi + mov r10, r0 + bl FtlBbmIsBadBlock + cmp r0, #0 + strheq r10, [r7, #-2] @ movhi + ldrbeq r3, [r4, #7] @ zero_extendqisi2 + addeq r3, r3, #1 + strbeq r3, [r4, #7] + b .L2406 +.L2419: + .align 2 +.L2418: + .word .LANCHOR2-1728 + .word .LANCHOR2 + .word .LANCHOR0 + .fnend + .size make_superblock, .-make_superblock + .align 2 + .global FtlLoadSysInfo + .syntax unified + .arm + .fpu softvfp + .type FtlLoadSysInfo, %function +FtlLoadSysInfo: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r1, #0 + ldr r4, .L2449 + .pad #36 + sub sp, sp, #36 + movw r8, #1128 + ldr r3, [r4, #-1472] + sub r6, r4, #1712 + ldrh r2, [r6, #-12] + ldr r0, [r4, #-1404] + str r3, [r4, #-1268] + ldr r3, [r4, #-1440] + lsl r2, r2, #1 + str r3, [r4, #-1264] + bl ftl_memset + ldrh r0, [r4, r8] + movw r3, #65535 + cmp r0, r3 + bne .L2421 +.L2432: + mvn r0, #0 +.L2420: + add sp, sp, #36 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2421: + mov r1, #1 + ldr r7, .L2449+4 + bl FtlGetLastWrittenPage + ldrsh r10, [r4, r8] + sub r8, r4, #1264 + sub r8, r8, #12 + sxth r5, r0 + add r0, r0, #1 + strh r0, [r7, #2] @ movhi +.L2423: + cmp r5, #0 + ldr fp, .L2449+8 + blt .L2431 + orr r3, r5, r10, lsl #10 + mov r2, #1 + mov r1, r2 + str r3, [r4, #-1272] + mov r0, r8 + ldr r3, [r4, #-1472] + str r3, [r4, #-1268] + bl FlashReadPages + ldrb r3, [fp, #36] @ zero_extendqisi2 + cmp r3, #0 + beq .L2424 + ldr r9, [r4, #-1264] + ldr r3, [r9, #12] + cmp r3, #0 + str r3, [sp, #28] + beq .L2424 + ldr r2, [r4, #-1268] + sub r1, r8, #380 + ldrh r1, [r1] + mov r0, r2 + str r2, [sp, #24] + bl js_hash + ldr r3, [sp, #28] + cmp r3, r0 + beq .L2424 + cmp r5, #0 + bne .L2425 + ldrh r1, [r7, #4] + ldr r2, [sp, #24] + cmp r10, r1 + beq .L2425 + ldr r2, [r2] + str r3, [sp, #12] + ldrh r1, [r7] + str r2, [sp, #16] + ldr r3, [r9, #8] + ldr r2, [r4, #-1276] + ldr r0, .L2449+12 + str r3, [sp, #8] + ldr r3, [r9, #4] + str r3, [sp, #4] + ldr r3, [r9] + str r3, [sp] + ldr r3, [r4, #-1272] + bl rk_printk + sub r3, r8, #388 + ldrsh r10, [r7, #4] + ldrh r5, [r3] +.L2427: + sub r5, r5, #1 + sxth r5, r5 + b .L2423 +.L2425: + mvn r3, #0 + str r3, [r4, #-1276] +.L2424: + ldr r3, [r4, #-1276] + cmn r3, #1 + beq .L2427 + ldr r3, [r4, #-1472] + ldr r2, .L2449+16 + ldr r3, [r3] + cmp r3, r2 + bne .L2427 + ldr r3, [r4, #-1440] + ldrh r2, [r3] + movw r3, #61604 + cmp r2, r3 + bne .L2427 +.L2431: + mov r2, #48 + ldr r1, [r4, #-1268] + ldr r0, .L2449+20 + bl ftl_memcpy + ldrh r2, [r6, #-12] + ldr r1, [r4, #-1268] + ldr r0, [r4, #-1404] + lsl r2, r2, #1 + add r1, r1, #48 + bl ftl_memcpy + ldrh r1, [r6, #-12] + ldr r3, [r4, #-1268] + ldr r0, [fp, #32] + lsr r2, r1, #3 + lsl r1, r1, #1 + add r1, r1, #51 + add r2, r2, #4 + bic r1, r1, #3 + add r1, r3, r1 + bl ftl_memcpy + ldr r3, .L2449+24 + ldrh r2, [r3, #-8] + cmp r2, #0 + beq .L2429 + ldrh r1, [r6, #-12] + ldrh r2, [r3, #-12] + ldr r0, [r4, #-1372] + lsr r3, r1, #3 + lsl r2, r2, #2 + add r3, r3, r1, lsl #1 + ldr r1, [r4, #-1268] + add r3, r3, #52 + ubfx r3, r3, #2, #14 + add r1, r1, r3, lsl #2 + bl ftl_memcpy +.L2429: + ldr r2, [r4, #816] + ldr r3, .L2449+16 + cmp r2, r3 + bne .L2432 + ldr r5, .L2449+20 + ldrb r1, [r4, #826] @ zero_extendqisi2 + sub r3, r5, #2512 + ldrh r2, [r5, #8] + ldrh r3, [r3, #-14] + strh r2, [r7, #6] @ movhi + cmp r1, r3 + bne .L2432 + sub r1, r5, #2480 + sub r0, r5, #2464 + ldrh r3, [r1, #-2] + add r1, r1, #316 + ldrh r0, [r0, #-12] + add r6, r5, #336 + str r2, [r4, #1148] + mul r3, r2, r3 + str r3, [r4, #-1284] + mul r3, r3, r0 + ldr r0, [r4, #-1720] + str r3, [r4, #-2736] + ldrh r3, [r1, #6] + sub r0, r0, r3 + sub r3, r5, #2544 + ldrh r1, [r3, #-4] + sub r0, r0, r2 + bl __aeabi_uidiv + ldrh r3, [r5, #16] + mov r2, r5 + ldrh ip, [r5, #14] + strh r0, [r6] @ movhi + lsr r1, r3, #6 + and r3, r3, #63 + strb r3, [r4, #890] + ldrb r3, [r4, #827] @ zero_extendqisi2 + strh ip, [r2, #68]! @ movhi + strh r1, [r2, #2] @ movhi + mvn r1, #0 + strb r3, [r4, #892] + movw r3, #1156 + strh r1, [r4, r3] @ movhi + add r2, r5, #340 + ldrh r1, [r5, #18] + mov r3, #0 + strh r3, [r2, #2] @ movhi + mov r2, r5 + strb r3, [r4, #1162] + strh r1, [r2, #116]! @ movhi + ldrh r1, [r5, #20] + strb r3, [r4, #1164] + lsr r0, r1, #6 + and r1, r1, #63 + strb r1, [r4, #938] + ldrb r1, [r4, #828] @ zero_extendqisi2 + strh r0, [r2, #2] @ movhi + ldrh r0, [r5, #22] + strb r1, [r4, #940] + mov r1, r5 + strh r0, [r1, #164]! @ movhi + mov r6, r1 + ldrh r0, [r5, #24] + mov r5, r2 + lsr lr, r0, #6 + and r0, r0, #63 + strb r0, [r4, #986] + ldrb r0, [r4, #829] @ zero_extendqisi2 + strh lr, [r1, #2] @ movhi + strb r0, [r4, #988] + str r3, [r4, #-1604] + ldr r0, [r4, #848] + str r3, [r4, #-1600] + str r3, [r4, #-1584] + str r3, [r4, #-1588] + str r0, [r4, #-1580] + str r3, [r4, #-1576] + ldr r0, [r4, #-1612] + str r3, [r4, #-1568] + str r3, [r4, #-1592] + ldr r3, [r4, #856] + ldr r2, [r4, #-1608] + cmp r3, r0 + strhi r3, [r4, #-1612] + ldr r3, [r4, #852] + cmp r3, r2 + strhi r3, [r4, #-1608] + movw r3, #65535 + cmp ip, r3 + beq .L2435 + ldr r0, .L2449+28 + bl make_superblock +.L2435: + ldrh r2, [r5] + movw r3, #65535 + cmp r2, r3 + beq .L2436 + ldr r0, .L2449+32 + bl make_superblock +.L2436: + ldrh r2, [r6] + movw r3, #65535 + cmp r2, r3 + beq .L2437 + ldr r0, .L2449+36 + bl make_superblock +.L2437: + movw r3, #1156 + ldrh r2, [r4, r3] + movw r3, #65535 + cmp r2, r3 + beq .L2438 + ldr r0, .L2449+40 + bl make_superblock +.L2438: + mov r0, #0 + b .L2420 +.L2450: + .align 2 +.L2449: + .word .LANCHOR2 + .word .LANCHOR2+1128 + .word .LANCHOR0 + .word .LC64 + .word 1179929683 + .word .LANCHOR2+816 + .word .LANCHOR2-1616 + .word .LANCHOR2+884 + .word .LANCHOR2+932 + .word .LANCHOR2+980 + .word .LANCHOR2+1156 + .fnend + .size FtlLoadSysInfo, .-FtlLoadSysInfo + .align 2 + .global FtlDumpBlockInfo + .syntax unified + .arm + .fpu softvfp + .type FtlDumpBlockInfo, %function +FtlDumpBlockInfo: + .fnstart + @ args = 0, pretend = 0, frame = 72 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + ubfx r0, r0, #10, #16 + ldr r7, .L2463 + .pad #100 + sub sp, sp, #100 + mov r8, r1 + bl P2V_block_in_plane + sub r5, r7, #1664 + mov r6, r0 + ldr r1, .L2463+4 + ldr r0, .L2463+8 + ldrh r9, [r5, #-2] + bl rk_printk + ldr r2, [r7, #-1404] + lsl r3, r6, #1 + mov r1, r6 + ldr r0, .L2463+12 + ldrh r2, [r2, r3] + bl rk_printk + add r0, sp, #96 + strh r6, [r0, #-48]! @ movhi + bl make_superblock + ldrb r4, [r7, #-2740] @ zero_extendqisi2 + str r7, [sp, #44] + adds r3, r4, #0 + movne r3, #1 + cmp r8, #0 + movne r3, #0 + cmp r3, #0 + moveq r4, r3 + beq .L2452 + mov r0, r6 + bl ftl_get_blk_mode + cmp r0, #1 + mov r4, r0 + ldrheq r9, [r5] +.L2452: + ldr r7, .L2463 + mov r6, #0 + mov r10, #36 + ldrh r3, [r5, #-2] + mov r2, r9 + mov r1, r4 + ldr r0, .L2463+16 + bl rk_printk +.L2453: + ldr r3, .L2463+20 + add ip, sp, #62 + ldr r0, [r7, #-1500] + movw lr, #65535 + ldrh r3, [r3, #-4] + str r3, [sp, #28] + ldr r3, [r7, #-1460] + str r3, [sp, #32] + ldr r3, .L2463+24 + ldrh r2, [r3, #-8] + ldrh fp, [r3, #-6] + str r2, [sp, #36] + ldr r2, [r7, #-1432] + str r2, [sp, #40] + mov r2, #0 + mov r5, r2 +.L2454: + ldr r1, [sp, #28] + uxth r3, r2 + cmp r1, r3 + bhi .L2456 + mov r8, #0 + mov r2, r4 + mov r1, r5 + bl FlashReadPages +.L2457: + uxth r3, r8 + cmp r5, r3 + bhi .L2458 + add r6, r6, #1 + uxth r6, r6 + cmp r9, r6 + bne .L2453 +.L2459: + mov r0, #0 + add sp, sp, #100 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2456: + ldrh r3, [ip, #2]! + cmp r3, lr + beq .L2455 + mla r1, r10, r5, r0 + orr r3, r6, r3, lsl #10 + str r3, [r1, #4] + ldr r3, [sp, #36] + mul r3, r3, r5 + add r8, r3, #3 + cmp r3, #0 + movlt r3, r8 + ldr r8, [sp, #32] + bic r3, r3, #3 + add r3, r8, r3 + str r3, [r1, #8] + mul r3, fp, r5 + add r5, r5, #1 + uxth r5, r5 + add r8, r3, #3 + cmp r3, #0 + movlt r3, r8 + ldr r8, [sp, #40] + bic r3, r3, #3 + add r3, r8, r3 + str r3, [r1, #12] +.L2455: + add r2, r2, #1 + b .L2454 +.L2458: + ldr r3, [sp, #44] + mul r0, r10, r8 + ldrh r1, [sp, #48] + add r8, r8, #1 + ldr ip, [r3, #-1500] + add r2, ip, r0 + ldr lr, [r2, #8] + ldr r3, [r2, #12] + ldr fp, [lr, #4] + str fp, [sp, #20] + ldr lr, [lr] + str lr, [sp, #16] + ldr lr, [r3, #12] + str lr, [sp, #12] + ldr lr, [r3, #8] + str lr, [sp, #8] + ldr lr, [r3, #4] + str lr, [sp, #4] + ldr r3, [r3] + str r3, [sp] + ldr r3, [r2, #4] + ldr r2, [ip, r0] + ldr r0, .L2463+28 + bl rk_printk + b .L2457 +.L2464: + .align 2 +.L2463: + .word .LANCHOR2 + .word .LANCHOR3+153 + .word .LC50 + .word .LC65 + .word .LC66 + .word .LANCHOR2-1728 + .word .LANCHOR2-1648 + .word .LC60 + .fnend + .size FtlDumpBlockInfo, .-FtlDumpBlockInfo + .align 2 + .global FtlScanAllBlock + .syntax unified + .arm + .fpu softvfp + .type FtlScanAllBlock, %function +FtlScanAllBlock: + .fnstart + @ args = 0, pretend = 0, frame = 56 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r6, #0 + ldr r5, .L2476 + .pad #84 + sub sp, sp, #84 + ldr r1, .L2476+4 + ldr r0, .L2476+8 + bl rk_printk +.L2466: + ldr r3, .L2476+12 + uxth r0, r6 + ldrh r3, [r3, #-10] + cmp r3, r0 + bhi .L2474 + mov r0, #0 + add sp, sp, #84 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2474: + add r4, sp, #80 + movw r9, #65535 + strh r0, [r4, #-48]! @ movhi + mov r10, #36 + bl ftl_get_blk_mode + uxth r1, r6 + ldr ip, [r5, #-1404] + mov r3, r0 + ldr r0, .L2476+16 + lsl r2, r1, #1 + ldrh r2, [ip, r2] + bl rk_printk + mov r0, r4 + bl make_superblock + ldr r3, .L2476+20 + add ip, sp, #46 + ldr r0, [r5, #-1500] + ldr r7, [r5, #-1432] + ldrh r2, [r3, #-4] + ldrh lr, [r3, #72] + ldrh r8, [r3, #74] + str r2, [sp, #24] + ldr r2, [r5, #-1460] + str r2, [sp, #28] + mov r2, #0 + mov r4, r2 +.L2467: + ldr r1, [sp, #24] + uxth r3, r2 + cmp r1, r3 + bhi .L2469 + ldr r9, .L2476+24 + mov r7, #0 + mov r8, #36 + mov r2, #0 + mov r1, r4 + bl FlashReadPages +.L2470: + uxth r3, r7 + cmp r4, r3 + bhi .L2471 + ldr r9, .L2476+28 + mov r7, #0 + mov r8, #36 + mov r2, #1 + mov r1, r4 + ldr r0, [r5, #-1500] + bl FlashReadPages +.L2472: + uxth r3, r7 + cmp r4, r3 + bhi .L2473 + add r6, r6, #1 + b .L2466 +.L2469: + ldrh r3, [ip, #2]! + cmp r3, r9 + beq .L2468 + mla r1, r10, r4, r0 + lsl r3, r3, #10 + str r3, [r1, #4] + mul r3, lr, r4 + add fp, r3, #3 + cmp r3, #0 + movlt r3, fp + ldr fp, [sp, #28] + bic r3, r3, #3 + add r3, fp, r3 + str r3, [r1, #8] + mul r3, r8, r4 + add r4, r4, #1 + uxth r4, r4 + add fp, r3, #3 + cmp r3, #0 + movlt r3, fp + bic r3, r3, #3 + add r3, r7, r3 + str r3, [r1, #12] +.L2468: + add r2, r2, #1 + b .L2467 +.L2471: + mul r0, r8, r7 + ldr ip, [r5, #-1500] + ldrh r1, [sp, #32] + add r7, r7, #1 + add r2, ip, r0 + ldr lr, [r2, #8] + ldr r3, [r2, #12] + ldr r10, [lr, #4] + str r10, [sp, #20] + ldr lr, [lr] + str lr, [sp, #16] + ldr lr, [r3, #12] + str lr, [sp, #12] + ldr lr, [r3, #8] + str lr, [sp, #8] + ldr lr, [r3, #4] + str lr, [sp, #4] + ldr r3, [r3] + str r3, [sp] + ldr r3, [r2, #4] + ldr r2, [ip, r0] + mov r0, r9 + bl rk_printk + b .L2470 +.L2473: + mul r0, r8, r7 + ldr ip, [r5, #-1500] + ldrh r1, [sp, #32] + add r7, r7, #1 + add r2, ip, r0 + ldr lr, [r2, #8] + ldr r3, [r2, #12] + ldr r10, [lr, #4] + str r10, [sp, #20] + ldr lr, [lr] + str lr, [sp, #16] + ldr lr, [r3, #12] + str lr, [sp, #12] + ldr lr, [r3, #8] + str lr, [sp, #8] + ldr lr, [r3, #4] + str lr, [sp, #4] + ldr r3, [r3] + str r3, [sp] + ldr r3, [r2, #4] + ldr r2, [ip, r0] + mov r0, r9 + bl rk_printk + b .L2472 +.L2477: + .align 2 +.L2476: + .word .LANCHOR2 + .word .LANCHOR3+170 + .word .LC50 + .word .LANCHOR2-1712 + .word .LC67 + .word .LANCHOR2-1728 + .word .LC68 + .word .LC69 + .fnend + .size FtlScanAllBlock, .-FtlScanAllBlock + .align 2 + .global SupperBlkListInit + .syntax unified + .arm + .fpu softvfp + .type SupperBlkListInit, %function +SupperBlkListInit: + .fnstart + @ args = 0, pretend = 0, frame = 16 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r2, #6 + ldr r4, .L2489 + mov r5, #0 + .pad #20 + sub sp, sp, #20 + mov r1, #0 + mov r8, r5 + mov r9, r5 + sub r6, r4, #1712 + ldr r0, [r4, #-1356] + ldrh r3, [r6, #-10] + mul r2, r2, r3 + bl ftl_memset + add r2, r4, #880 + add r3, r4, #872 + strh r5, [r2] @ movhi + sub r2, r4, #1616 + str r5, [r4, #876] + str r5, [r4, #864] + str r5, [r4, #868] + strh r5, [r3] @ movhi + strh r5, [r2, #-6] @ movhi + str r6, [sp] + str r3, [sp, #4] +.L2479: + ldr r3, [sp] + sxth r7, r5 + ldrh r3, [r3, #-12] + cmp r7, r3 + bge .L2486 + ldr r3, .L2489+4 + mov r10, #0 + mov r6, r10 + uxth fp, r5 + ldrh r2, [r3] + add r3, r3, #4 + ldrh r3, [r3, #62] + b .L2487 +.L2481: + add r0, r4, r1 + mov r1, fp + ldrb r0, [r0, #-1706] @ zero_extendqisi2 + add r10, r10, #1 + str r3, [sp, #12] + str r2, [sp, #8] + bl V2P_block + bl FtlBbmIsBadBlock + ldr r3, [sp, #12] + cmp r0, #0 + ldr r2, [sp, #8] + addeq r6, r3, r6 + sxtheq r6, r6 +.L2487: + sxth r1, r10 + cmp r1, r2 + blt .L2481 + cmp r6, #0 + lsl r10, r7, #1 + ldreq r3, [r4, #-1404] + mvneq r2, #0 + strheq r2, [r3, r10] @ movhi + beq .L2483 + mov r1, r6 + mov r0, #32768 + bl __aeabi_idiv + sxth r6, r0 +.L2483: + ldr r2, [r4, #-1356] + add r3, r10, r7 + add r3, r2, r3, lsl #1 + strh r6, [r3, #4] @ movhi + ldr r3, .L2489+8 + ldrh r3, [r3] + cmp r7, r3 + beq .L2484 + ldr r3, .L2489+12 + ldrh r3, [r3] + cmp r7, r3 + beq .L2484 + ldr r3, .L2489+16 + ldrh r3, [r3] + cmp r7, r3 + beq .L2484 + ldr r3, [r4, #-1404] + uxth r0, r5 + ldrh r3, [r3, r10] + cmp r3, #0 + bne .L2485 + add r8, r8, #1 + uxth r8, r8 + bl INSERT_FREE_LIST +.L2484: + add r5, r5, #1 + b .L2479 +.L2485: + add r9, r9, #1 + uxth r9, r9 + bl INSERT_DATA_LIST + b .L2484 +.L2486: + ldr r3, [sp, #4] + mov r0, #0 + strh r9, [r3] @ movhi + ldr r3, .L2489+20 + strh r8, [r3] @ movhi + add sp, sp, #20 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2490: + .align 2 +.L2489: + .word .LANCHOR2 + .word .LANCHOR2-1732 + .word .LANCHOR2+884 + .word .LANCHOR2+932 + .word .LANCHOR2+980 + .word .LANCHOR2+880 + .fnend + .size SupperBlkListInit, .-SupperBlkListInit + .align 2 + .global Ftl_save_ext_data + .syntax unified + .arm + .fpu softvfp + .type Ftl_save_ext_data, %function +Ftl_save_ext_data: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L2493 + ldr r2, .L2493+4 + ldr r1, [r3, #1204] + cmp r1, r2 + bxne lr + ldr r2, .L2493+8 + mov r1, #1 + mov r0, #0 + str r2, [r3, #1208] + ldr r2, [r3, #1716] + str r2, [r3, #1292] + ldr r2, [r3, #1720] + str r2, [r3, #1296] + ldr r2, [r3, #-1604] + str r2, [r3, #1212] + ldr r2, [r3, #-1600] + str r2, [r3, #1216] + ldr r2, [r3, #-1584] + str r2, [r3, #1220] + ldr r2, [r3, #-1588] + str r2, [r3, #1224] + ldr r2, [r3, #-1576] + str r2, [r3, #1232] + ldr r2, [r3, #-1572] + str r2, [r3, #1236] + ldr r2, [r3, #-1596] + str r2, [r3, #1240] + ldr r2, [r3, #-1592] + str r2, [r3, #1244] + ldr r2, [r3, #-1568] + str r2, [r3, #1248] + ldr r2, [r3, #-1564] + str r2, [r3, #1252] + ldr r2, [r3, #-1616] + str r2, [r3, #1264] + ldr r2, [r3, #-1620] + str r2, [r3, #1268] + ldr r2, .L2493+12 + b FtlVendorPartWrite +.L2494: + .align 2 +.L2493: + .word .LANCHOR2 + .word 1179929683 + .word 1342177379 + .word .LANCHOR2+1204 + .fnend + .size Ftl_save_ext_data, .-Ftl_save_ext_data + .align 2 + .global FtlEctTblFlush + .syntax unified + .arm + .fpu softvfp + .type FtlEctTblFlush, %function +FtlEctTblFlush: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L2505 + ldr r2, [r3, #-1868] + cmp r2, #0 + moveq r2, #32 + beq .L2496 + ldr r2, [r3, #-1564] + cmp r2, #39 + movhi r2, #32 + movls r2, #4 +.L2496: + movw ip, #1724 + ldrh r1, [r3, ip] + cmp r1, #31 + addls r1, r1, #1 + movls r2, #1 + strhls r1, [r3, ip] @ movhi + cmp r0, #0 + bne .L2498 + ldr r1, [r3, #-1416] + ldr r0, [r1, #20] + ldr r1, [r1, #16] + add r2, r2, r0 + cmp r1, r2 + bcc .L2503 +.L2498: + push {r4, lr} + .save {r4, lr} + mov r0, #64 + ldr r2, [r3, #-1416] + ldr r1, [r2, #16] + str r1, [r2, #20] + ldr r1, .L2505+4 + str r1, [r2] + ldr r2, [r3, #-1416] + ldr r3, .L2505+8 + ldrh r1, [r3] + lsl r3, r1, #9 + str r3, [r2, #12] + ldr r3, [r2, #8] + add r3, r3, #1 + str r3, [r2, #8] + mov r3, #0 + str r3, [r2, #4] + bl FtlVendorPartWrite + bl Ftl_save_ext_data + mov r0, #0 + pop {r4, pc} +.L2503: + mov r0, #0 + bx lr +.L2506: + .align 2 +.L2505: + .word .LANCHOR2 + .word 1112818501 + .word .LANCHOR2-1424 + .fnend + .size FtlEctTblFlush, .-FtlEctTblFlush + .align 2 + .global Ftl_load_ext_data + .syntax unified + .arm + .fpu softvfp + .type Ftl_load_ext_data, %function +Ftl_load_ext_data: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + mov r1, #1 + ldr r4, .L2513 + mov r0, #0 + ldr r2, .L2513+4 + bl FtlVendorPartRead + ldr r5, .L2513+8 + ldr r3, [r4, #1204] + cmp r3, r5 + beq .L2508 + mov r2, #512 + mov r1, #0 + ldr r0, .L2513+4 + bl ftl_memset + str r5, [r4, #1204] +.L2508: + ldr r3, [r4, #1204] + cmp r3, r5 + bne .L2509 + ldr r3, [r4, #1292] + str r3, [r4, #1716] + ldr r3, [r4, #1296] + str r3, [r4, #1720] + ldr r3, [r4, #1212] + str r3, [r4, #-1604] + ldr r3, [r4, #1216] + str r3, [r4, #-1600] + ldr r3, [r4, #1220] + str r3, [r4, #-1584] + ldr r3, [r4, #1224] + str r3, [r4, #-1588] + ldr r3, [r4, #1232] + str r3, [r4, #-1576] + ldr r3, [r4, #1236] + str r3, [r4, #-1572] + ldr r3, [r4, #1240] + str r3, [r4, #-1596] + ldr r3, [r4, #1244] + str r3, [r4, #-1592] + ldr r3, [r4, #1248] + str r3, [r4, #-1568] + ldr r3, [r4, #1252] + str r3, [r4, #-1564] + ldr r3, [r4, #1264] + str r3, [r4, #-1616] +.L2509: + ldr r1, [r4, #1272] + mov r3, #0 + ldr r2, .L2513+12 + str r3, [r4, #-1620] + cmp r1, r2 + bne .L2510 + ldrb r2, [r4, #-2740] @ zero_extendqisi2 + cmp r2, r3 + beq .L2511 + str r3, [r4, #1272] + bl Ftl_save_ext_data +.L2510: + ldr r3, .L2513+16 + ldr ip, [r4, #-1580] + ldr r2, [r4, #-1576] + ldrh r0, [r3, #-10] + ldrh r1, [r3, #-60] + mla r0, ip, r0, r2 + bl __aeabi_uidiv + str r0, [r4, #1728] + pop {r4, r5, r6, pc} +.L2511: + mov r3, #1 + ldr r1, .L2513+20 + ldr r0, .L2513+24 + str r3, [r4, #-1868] + bl rk_printk + b .L2510 +.L2514: + .align 2 +.L2513: + .word .LANCHOR2 + .word .LANCHOR2+1204 + .word 1179929683 + .word 305432421 + .word .LANCHOR2-1664 + .word .LC70 + .word .LC49 + .fnend + .size Ftl_load_ext_data, .-Ftl_load_ext_data + .align 2 + .global ftl_scan_all_ppa + .syntax unified + .arm + .fpu softvfp + .type ftl_scan_all_ppa, %function +ftl_scan_all_ppa: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #36 + sub sp, sp, #36 + ldr r6, .L2532 + ldrh r4, [r6, #-4] + add r3, r6, #388 + str r3, [sp, #28] + sub r4, r4, #16 + lsl r10, r4, #10 +.L2516: + ldrh r3, [r6, #-4] + ldr r1, .L2532+4 + cmp r4, r3 + mov r5, r1 + blt .L2524 + ldr r1, .L2532+8 + ldr r0, .L2532+12 + add sp, sp, #36 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, lr} + b rk_printk +.L2524: + uxth r8, r4 + mov r0, r8 + bl ftl_get_blk_mode + ldrb r3, [r1, #-2740] @ zero_extendqisi2 + cmp r3, #0 + beq .L2517 + ldr r3, .L2532+16 + ldrh r3, [r3] + cmp r4, r3 + bge .L2518 + ldr r3, .L2532+20 + ldrh r3, [r3] + cmp r4, r3 + blt .L2518 +.L2517: + cmp r0, #1 + ldrhne r7, [r6, #-2] + movne r9, #0 + bne .L2520 +.L2518: + ldrh r7, [r6] + mov r9, #-2147483648 +.L2520: + mov r3, r9 + mov r2, r7 + mov r1, r4 + ldr r0, .L2532+24 + bl rk_printk + mov r0, r8 + bl FtlBbmIsBadBlock + cmp r0, #0 + beq .L2521 + mov r3, r9 + mov r2, r7 + mov r1, r4 + ldr r0, .L2532+28 + bl rk_printk +.L2521: + ldr fp, .L2532+32 + mov r8, #0 +.L2522: + cmp r8, r7 + addeq r4, r4, #1 + addeq r10, r10, #1024 + beq .L2516 +.L2523: + add r3, r9, r10 + mov r2, #0 + add r3, r3, r8 + mov r1, #1 + str r3, [r5, #-1272] + add r8, r8, #1 + ldr r3, [r5, #-1472] + ldr r0, [sp, #28] + str r2, [r5, #-1276] + str r3, [r5, #-1268] + ldr r3, [r5, #-1440] + str r3, [r5, #-1264] + bl FlashReadPages + ldr r2, [r5, #-1268] + mov r0, fp + ldr r3, [r5, #-1264] + ldr r1, [r2, #4] + str r1, [sp, #16] + ldr r2, [r2] + str r2, [sp, #12] + ldr r2, [r3, #12] + str r2, [sp, #8] + ldr r2, [r3, #8] + str r2, [sp, #4] + ldr r2, [r3, #4] + str r2, [sp] + ldr r3, [r3] + ldr r2, [r5, #-1276] + ldr r1, [r5, #-1272] + bl rk_printk + b .L2522 +.L2533: + .align 2 +.L2532: + .word .LANCHOR2-1664 + .word .LANCHOR2 + .word .LANCHOR3+186 + .word .LC74 + .word .LANCHOR2-1724 + .word .LANCHOR2-1652 + .word .LC71 + .word .LC72 + .word .LC73 + .fnend + .size ftl_scan_all_ppa, .-ftl_scan_all_ppa + .align 2 + .global update_multiplier_value + .syntax unified + .arm + .fpu softvfp + .type update_multiplier_value, %function +update_multiplier_value: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L2541 + push {r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + mov r5, #0 + mov r7, r0 + mov r4, r5 + add r6, r3, #22 + ldrh r8, [r3, #-4] + ldrh r9, [r3, #62] +.L2535: + uxth r3, r5 + cmp r8, r3 + bhi .L2537 + cmp r4, #0 + moveq r0, r4 + beq .L2538 + mov r1, r4 + mov r0, #32768 + bl __aeabi_idiv +.L2538: + ldr r3, .L2541+4 + mov r2, #6 + ldr r3, [r3, #-1356] + mla r7, r2, r7, r3 + strh r0, [r7, #4] @ movhi + mov r0, #0 + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L2537: + mov r1, r7 + ldrb r0, [r6, r5] @ zero_extendqisi2 + bl V2P_block + bl FtlBbmIsBadBlock + cmp r0, #0 + add r5, r5, #1 + addeq r4, r4, r9 + uxtheq r4, r4 + b .L2535 +.L2542: + .align 2 +.L2541: + .word .LANCHOR2-1728 + .word .LANCHOR2 + .fnend + .size update_multiplier_value, .-update_multiplier_value + .align 2 + .global GetFreeBlockMinEraseCount + .syntax unified + .arm + .fpu softvfp + .type GetFreeBlockMinEraseCount, %function +GetFreeBlockMinEraseCount: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r2, .L2546 + ldr r0, [r2, #876] + cmp r0, #0 + bxeq lr + ldr r3, [r2, #-1356] + sub r0, r0, r3 + ldr r3, .L2546+4 + asr r0, r0, #1 + mul r0, r3, r0 + ldr r3, [r2, #-1412] + uxth r0, r0 + lsl r0, r0, #1 + ldrh r0, [r3, r0] + bx lr +.L2547: + .align 2 +.L2546: + .word .LANCHOR2 + .word -1431655765 + .fnend + .size GetFreeBlockMinEraseCount, .-GetFreeBlockMinEraseCount + .align 2 + .global GetFreeBlockMaxEraseCount + .syntax unified + .arm + .fpu softvfp + .type GetFreeBlockMaxEraseCount, %function +GetFreeBlockMaxEraseCount: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r1, .L2560 + ldr r3, [r1, #876] + cmp r3, #0 + beq .L2554 + add r2, r1, #880 + push {r4, r5, lr} + .save {r4, r5, lr} + ldrh r2, [r2] + mov r4, #6 + movw r5, #65535 + ldr ip, [r1, #-1356] + rsb r2, r2, r2, lsl #3 + sub r3, r3, ip + asr r2, r2, #3 + asr r3, r3, #1 + cmp r0, r2 + uxthgt r0, r2 + ldr r2, .L2560+4 + mul r3, r2, r3 + mov r2, #0 + uxth r3, r3 +.L2551: + uxth lr, r2 + cmp r0, lr + bls .L2553 + mul lr, r4, r3 + add r2, r2, #1 + ldrh lr, [ip, lr] + cmp lr, r5 + bne .L2555 +.L2553: + ldr r2, [r1, #-1412] + lsl r3, r3, #1 + ldrh r0, [r2, r3] + pop {r4, r5, pc} +.L2555: + mov r3, lr + b .L2551 +.L2554: + mov r0, r3 + bx lr +.L2561: + .align 2 +.L2560: + .word .LANCHOR2 + .word -1431655765 + .fnend + .size GetFreeBlockMaxEraseCount, .-GetFreeBlockMaxEraseCount + .align 2 + .global FtlPrintInfo2buf + .syntax unified + .arm + .fpu softvfp + .type FtlPrintInfo2buf, %function +FtlPrintInfo2buf: + .fnstart + @ args = 0, pretend = 0, frame = 16 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r8, r0 + ldr r7, .L2575 + add r5, r8, #12 + .pad #36 + sub sp, sp, #36 + ldr r1, .L2575+4 + bl strcpy + ldr r2, [r7, #-2768] + mov r0, r5 + ldr r1, .L2575+8 + bl sprintf + add r5, r5, r0 + ldr r2, [r7, #-1648] + mov r0, r5 + ldr r1, .L2575+12 + bl sprintf + ldr r3, .L2575+16 + add r5, r5, r0 + ldr r3, [r3, #3440] + cmp r3, #1 + subne r0, r5, r8 + bne .L2562 + add r3, sp, #28 + add r2, sp, #24 + add r1, sp, #20 + add r0, sp, #16 + bl NandcGetTimeCfg + ldr r3, [sp, #28] + mov r0, r5 + ldr r2, [sp, #16] + sub r4, r7, #1344 + ldr r1, .L2575+20 + add r9, r7, #880 + str r3, [sp, #4] + ldr r3, [sp, #24] + str r3, [sp] + ldr r3, [sp, #20] + bl sprintf + add r6, r5, r0 + ldr r1, .L2575+24 + mov r0, r6 + add r6, r6, #10 + bl strcpy + ldr r2, [r7, #-1284] + mov r0, r6 + ldr r1, .L2575+28 + add r5, r7, #816 + bl sprintf + add r6, r6, r0 + ldr r2, [r7, #1124] + ldr r1, .L2575+32 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldr r2, [r7, #-1584] + ldr r1, .L2575+36 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldr r2, [r7, #-1596] + ldr r1, .L2575+40 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldr r2, [r7, #-1600] + ldr r1, .L2575+44 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldr r2, [r7, #-1592] + ldr r1, .L2575+48 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldr r2, [r7, #-1588] + ldr r1, .L2575+52 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldr r2, [r7, #-1604] + ldr r1, .L2575+56 + mov r0, r6 + bl sprintf + ldr r2, [r7, #1716] + add r6, r6, r0 + ldr r1, .L2575+60 + mov r0, r6 + lsr r2, r2, #11 + bl sprintf + ldr r2, [r7, #1720] + add r6, r6, r0 + ldr r1, .L2575+64 + mov r0, r6 + lsr r2, r2, #11 + bl sprintf + add r6, r6, r0 + ldr r2, [r7, #-1612] + ldr r1, .L2575+68 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldr r2, [r7, #-1608] + ldr r1, .L2575+72 + mov r0, r6 + bl sprintf + add r6, r6, r0 + bl FtlBbtCalcTotleCnt + ldrh r2, [r4, #2] + mov r3, r0 + ldr r1, .L2575+76 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldrh r2, [r9] + ldr r1, .L2575+80 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldr r2, [r7, #-1580] + ldr r1, .L2575+84 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldr r2, [r7, #-1576] + ldr r1, .L2575+88 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldr r2, [r7, #1728] + ldr r1, .L2575+92 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldr r2, [r7, #-1572] + ldr r1, .L2575+96 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldr r2, [r7, #-1568] + ldr r1, .L2575+100 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldr r2, [r7, #-1564] + ldr r1, .L2575+104 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldrh r2, [r5, #30] + ldr r1, .L2575+108 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldrh r2, [r5, #28] + ldr r1, .L2575+112 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldr r2, [r7, #-2736] + ldr r1, .L2575+116 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldr r2, [r7, #-1632] + ldr r1, .L2575+120 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldr r2, [r7, #-1736] + ldr r1, .L2575+124 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldrh r2, [r4, #110] + ldr r1, .L2575+128 + mov r0, r6 + bl sprintf + sub r3, r7, #1712 + add r6, r6, r0 + ldrh r2, [r3, #-12] + mov r0, r6 + ldr r1, .L2575+132 + movw r5, #1156 + bl sprintf + add r3, r7, #1152 + add r6, r6, r0 + ldrh r2, [r3] + mov r0, r6 + ldr r1, .L2575+136 + bl sprintf + add r6, r6, r0 + ldr r2, [r7, #-1720] + ldr r1, .L2575+140 + mov r0, r6 + bl sprintf + movw r3, #1128 + add r6, r6, r0 + ldrh r2, [r7, r3] + mov r0, r6 + ldr r1, .L2575+144 + bl sprintf + add r6, r6, r0 + ldrh r2, [r4, #-4] + ldr r1, .L2575+148 + mov r0, r6 + bl sprintf + add r4, r7, #884 + add r6, r6, r0 + ldrh r2, [r4, #2] + mov r0, r6 + ldr r1, .L2575+152 + bl sprintf + add r6, r6, r0 + ldrb r2, [r7, #890] @ zero_extendqisi2 + ldr r1, .L2575+156 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldrh r2, [r4] + ldr r1, .L2575+160 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldrb r2, [r7, #892] @ zero_extendqisi2 + ldr r1, .L2575+164 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldrh r2, [r4, #4] + ldr r1, .L2575+168 + mov r0, r6 + bl sprintf + ldrh r3, [r4] + add r6, r6, r0 + ldr r2, [r7, #-1404] + mov r0, r6 + ldr r1, .L2575+172 + add r4, r7, #932 + lsl r3, r3, #1 + ldrh r2, [r2, r3] + bl sprintf + add r6, r6, r0 + ldrh r2, [r4, #2] + ldr r1, .L2575+176 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldrb r2, [r7, #938] @ zero_extendqisi2 + ldr r1, .L2575+180 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldrh r2, [r4] + ldr r1, .L2575+184 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldrb r2, [r7, #940] @ zero_extendqisi2 + ldr r1, .L2575+188 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldrh r2, [r4, #4] + ldr r1, .L2575+192 + mov r0, r6 + bl sprintf + ldrh r3, [r4] + add r6, r6, r0 + ldr r2, [r7, #-1404] + mov r0, r6 + ldr r1, .L2575+196 + add r4, r7, #980 + lsl r3, r3, #1 + ldrh r2, [r2, r3] + bl sprintf + add r6, r6, r0 + ldrh r2, [r4, #2] + ldr r1, .L2575+200 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldrb r2, [r7, #986] @ zero_extendqisi2 + ldr r1, .L2575+204 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldrh r2, [r4] + ldr r1, .L2575+208 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldrb r2, [r7, #988] @ zero_extendqisi2 + ldr r1, .L2575+212 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldrh r2, [r4, #4] + ldr r1, .L2575+216 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldrh r2, [r4, #178] + ldr r1, .L2575+220 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldrb r2, [r7, #1162] @ zero_extendqisi2 + ldr r1, .L2575+224 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldrh r2, [r7, r5] + ldr r1, .L2575+228 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldrb r2, [r7, #1164] @ zero_extendqisi2 + ldr r1, .L2575+232 + mov r0, r6 + bl sprintf + add r6, r6, r0 + ldrh r2, [r4, #180] + ldr r1, .L2575+236 + mov r0, r6 + bl sprintf + ldr r3, [r7, #1280] + add r6, r6, r0 + ldr r1, [r7, #-1616] + mov r0, r6 + ldr r2, [r7, #-1868] + str r3, [sp, #4] + ldr r3, [r7, #1288] + orr r2, r2, r1, lsl #8 + ldr r1, .L2575+240 + str r3, [sp] + ldr r3, [r7, #1284] + bl sprintf + add r4, r6, r0 + ldr r2, [r7, #1276] + ldr r1, .L2575+244 + mov r0, r4 + bl sprintf + add r4, r4, r0 + ldr r2, [r7, #1300] + ldr r1, .L2575+248 + mov r0, r4 + bl sprintf + sub r6, r7, #1520 + add r4, r4, r0 + ldrh r2, [r6, #-8] + mov r0, r4 + ldr r1, .L2575+252 + bl sprintf + add r4, r4, r0 + ldrh r2, [r6, #-6] + ldr r1, .L2575+256 + mov r0, r4 + bl sprintf + add r4, r4, r0 + ldr r2, [r7, #-1544] + ldr r1, .L2575+260 + mov r0, r4 + bl sprintf + add r4, r4, r0 + ldrh r2, [r6, #-4] + ldr r1, .L2575+264 + mov r0, r4 + bl sprintf + add r4, r4, r0 + bl GetFreeBlockMinEraseCount + ldr r1, .L2575+268 + mov r2, r0 + mov r0, r4 + bl sprintf + add r4, r4, r0 + ldrh r0, [r9] + bl GetFreeBlockMaxEraseCount + ldr r1, .L2575+272 + mov r2, r0 + mov r0, r4 + bl sprintf + ldrh r3, [r7, r5] + movw r2, #65535 + add r4, r4, r0 + cmp r3, r2 + beq .L2565 + ldr r2, [r7, #-1404] + lsl r3, r3, #1 + mov r0, r4 + ldr r1, .L2575+276 + ldrh r2, [r2, r3] + bl sprintf + add r4, r4, r0 +.L2565: + mov r0, #0 + ldr r9, .L2575+280 + bl List_get_gc_head_node + uxth r3, r0 + mov r5, #0 + movw fp, #65535 + mov r10, #6 +.L2567: + cmp r3, fp + beq .L2566 + ldr r2, [r7, #-1412] + lsl r1, r3, #1 + mul r6, r10, r3 + mov r0, r4 + ldrh r2, [r2, r1] + str r2, [sp, #8] + ldr r2, [r7, #-1356] + add r2, r2, r6 + ldrh r2, [r2, #4] + str r2, [sp, #4] + ldr r2, [r7, #-1404] + ldrh r2, [r2, r1] + mov r1, r9 + str r2, [sp] + mov r2, r5 + bl sprintf + add r5, r5, #1 + ldr r3, [r7, #-1356] + cmp r5, #16 + add r4, r4, r0 + ldrh r3, [r3, r6] + bne .L2567 +.L2566: + ldr r2, [r7, #-1356] + mov r5, #0 + ldr r3, [r7, #876] + movw r9, #65535 + ldr fp, .L2575+284 + mov r10, #6 + sub r3, r3, r2 + ldr r2, .L2575+288 + asr r3, r3, #1 + mul r3, r2, r3 + uxth r3, r3 +.L2569: + cmp r3, r9 + beq .L2568 + ldr r1, [r7, #-1412] + lsl r2, r3, #1 + mul r6, r10, r3 + mov r0, r4 + ldrh r2, [r1, r2] + mov r1, fp + str r2, [sp, #4] + ldr r2, [r7, #-1356] + add r2, r2, r6 + ldrh r2, [r2, #4] + str r2, [sp] + mov r2, r5 + add r5, r5, #1 + bl sprintf + cmp r5, #4 + add r4, r4, r0 + ldrne r3, [r7, #-1356] + ldrhne r3, [r3, r6] + bne .L2569 +.L2568: + sub r0, r4, r8 +.L2562: + add sp, sp, #36 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2576: + .align 2 +.L2575: + .word .LANCHOR2 + .word .LC75 + .word .LC76 + .word .LC77 + .word .LANCHOR1 + .word .LC78 + .word .LC79 + .word .LC80 + .word .LC81 + .word .LC82 + .word .LC83 + .word .LC84 + .word .LC85 + .word .LC86 + .word .LC87 + .word .LC88 + .word .LC89 + .word .LC90 + .word .LC91 + .word .LC92 + .word .LC93 + .word .LC94 + .word .LC95 + .word .LC96 + .word .LC97 + .word .LC98 + .word .LC99 + .word .LC100 + .word .LC101 + .word .LC102 + .word .LC103 + .word .LC104 + .word .LC105 + .word .LC106 + .word .LC107 + .word .LC108 + .word .LC109 + .word .LC110 + .word .LC111 + .word .LC112 + .word .LC113 + .word .LC114 + .word .LC115 + .word .LC116 + .word .LC117 + .word .LC118 + .word .LC119 + .word .LC120 + .word .LC121 + .word .LC122 + .word .LC123 + .word .LC124 + .word .LC125 + .word .LC126 + .word .LC127 + .word .LC128 + .word .LC129 + .word .LC130 + .word .LC131 + .word .LC132 + .word .LC133 + .word .LC134 + .word .LC135 + .word .LC136 + .word .LC137 + .word .LC138 + .word .LC139 + .word .LC140 + .word .LC141 + .word .LC142 + .word .LC143 + .word .LC144 + .word -1431655765 + .fnend + .size FtlPrintInfo2buf, .-FtlPrintInfo2buf + .align 2 + .global ftl_proc_ftl_read + .syntax unified + .arm + .fpu softvfp + .type ftl_proc_ftl_read, %function +ftl_proc_ftl_read: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + mov r5, r0 + ldr r2, .L2579 + ldr r1, .L2579+4 + bl sprintf + add r4, r5, r0 + mov r0, r4 + bl FtlPrintInfo2buf + add r0, r4, r0 + sub r0, r0, r5 + pop {r4, r5, r6, pc} +.L2580: + .align 2 +.L2579: + .word .LC145 + .word .LC49 + .fnend + .size ftl_proc_ftl_read, .-ftl_proc_ftl_read + .align 2 + .global GetSwlReplaceBlock + .syntax unified + .arm + .fpu softvfp + .type GetSwlReplaceBlock, %function +GetSwlReplaceBlock: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #28 + sub sp, sp, #28 + ldr r4, .L2609 + ldr r2, [r4, #1728] + ldr r3, [r4, #-1564] + cmp r2, r3 + bcs .L2582 + sub r2, r4, #1712 + mov r3, #0 + ldrh r1, [r2, #-12] + ldr r2, [r4, #-1412] + str r3, [r4, #-1580] + sub r2, r2, #2 +.L2583: + cmp r3, r1 + bcc .L2584 + ldr r5, [r4, #-1580] + mov r0, r5 + bl __aeabi_uidiv + ldr r3, .L2609+4 + str r0, [r4, #1728] + ldr r0, [r4, #-1576] + ldrh r1, [r3, #-10] + sub r0, r5, r0 + bl __aeabi_uidiv + str r0, [r4, #-1580] +.L2585: + ldr r5, [r4, #-1564] + ldr r8, [r4, #1728] + add r3, r5, #256 + cmp r3, r8 + bls .L2590 + ldr r2, [r4, #-1568] + add r3, r5, #768 + cmp r3, r2 + bls .L2590 + ldr r2, [r4, #-1868] + cmp r5, #40 + movls r3, #0 + movhi r3, #1 + cmp r2, #0 + orreq r3, r3, #1 + cmp r3, #0 + beq .L2590 +.L2592: + movw r6, #65535 +.L2591: + mov r0, r6 + add sp, sp, #28 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2584: + ldrh r0, [r2, #2]! + add r3, r3, #1 + ldr ip, [r4, #-1580] + add r0, r0, ip + str r0, [r4, #-1580] + b .L2583 +.L2582: + ldr r3, [r4, #-1568] + cmp r2, r3 + addhi r3, r3, #1 + strhi r3, [r4, #-1568] + movhi r3, #0 + bls .L2585 +.L2587: + ldr r2, .L2609+8 + ldrh r2, [r2] + cmp r3, r2 + bcs .L2585 + ldr r0, [r4, #-1412] + lsl r1, r3, #1 + add r3, r3, #1 + ldrh r2, [r0, r1] + add r2, r2, #1 + strh r2, [r0, r1] @ movhi + b .L2587 +.L2590: + ldr r6, .L2609+12 + ldrh r0, [r6] + add r0, r0, r0, lsl #1 + ubfx r0, r0, #2, #16 + bl GetFreeBlockMaxEraseCount + add r1, r5, #64 + mov r10, r0 + cmp r0, r1 + movcs r1, #0 + movcc r1, #1 + cmp r5, #40 + movls r1, #0 + cmp r1, #0 + bne .L2592 + ldr r3, [r4, #864] + cmp r3, #0 + beq .L2592 + sub r6, r6, #2592 + ldr ip, [r4, #-1356] + ldrh r2, [r6, #-12] + movw r7, #65535 + ldr r9, [r4, #-1412] + mov fp, #6 + ldr lr, .L2609+16 + str r2, [sp, #20] + mov r2, r7 +.L2593: + ldrh r0, [r3] + movw r6, #65535 + cmp r0, r6 + bne .L2596 + mov r6, r2 +.L2595: + movw r3, #65535 + cmp r6, r3 + beq .L2592 + lsl fp, r6, #1 + ldrh r1, [r9, fp] + cmp r5, r1 + bcs .L2597 + bl GetFreeBlockMinEraseCount + cmp r5, r0 + strcc r7, [r4, #-1564] +.L2597: + cmp r8, r1 + bls .L2592 + add r3, r1, #128 + cmp r10, r3 + ble .L2592 + add r3, r1, #256 + cmp r8, r3 + bhi .L2598 + ldr r3, [r4, #-1568] + add r1, r1, #768 + cmp r1, r3 + bcs .L2592 +.L2598: + str r10, [sp, #8] + mov r2, r8 + ldrh r3, [r9, fp] + mov r1, r6 + ldr r0, .L2609+20 + str r3, [sp, #4] + ldr r3, [r4, #-1404] + ldrh r3, [r3, fp] + str r3, [sp] + ldr r3, [r4, #-1568] + bl rk_printk + mov r3, #1 + str r3, [r4, #-1556] + b .L2591 +.L2596: + add r1, r1, #1 + ldr r6, [sp, #20] + uxth r1, r1 + cmp r1, r6 + bhi .L2592 + ldrh r6, [r3, #4] + cmp r6, #0 + beq .L2594 + sub r3, r3, ip + asr r3, r3, #1 + mul r3, lr, r3 + uxth r6, r3 + lsl r3, r6, #1 + ldrh r3, [r9, r3] + cmp r5, r3 + bcs .L2595 + cmp r7, r3 + movhi r7, r3 + movhi r2, r6 +.L2594: + mla r3, fp, r0, ip + b .L2593 +.L2610: + .align 2 +.L2609: + .word .LANCHOR2 + .word .LANCHOR2-1664 + .word .LANCHOR2-1724 + .word .LANCHOR2+880 + .word -1431655765 + .word .LC146 + .fnend + .size GetSwlReplaceBlock, .-GetSwlReplaceBlock + .align 2 + .global free_data_superblock + .syntax unified + .arm + .fpu softvfp + .type free_data_superblock, %function +free_data_superblock: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + movw r2, #65535 + cmp r0, r2 + beq .L2614 + ldr r2, .L2617 + lsl r3, r0, #1 + push {r4, lr} + .save {r4, lr} + mov r1, #0 + ldr r2, [r2, #-1404] + strh r1, [r2, r3] @ movhi + bl INSERT_FREE_LIST + mov r0, #0 + pop {r4, pc} +.L2614: + mov r0, #0 + bx lr +.L2618: + .align 2 +.L2617: + .word .LANCHOR2 + .fnend + .size free_data_superblock, .-free_data_superblock + .align 2 + .global allocate_data_superblock + .syntax unified + .arm + .fpu softvfp + .type allocate_data_superblock, %function +allocate_data_superblock: + .fnstart + @ args = 0, pretend = 0, frame = 16 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #20 + sub sp, sp, #20 + ldr r4, .L2669 + ldr r3, [r4, #-1280] + cmp r3, #0 + bne .L2620 + mov r5, r0 +.L2621: + ldr r3, .L2669+4 + ldrb r2, [r5, #8] @ zero_extendqisi2 + cmp r5, r3 + sub r7, r3, #100 + sub r10, r7, #2592 + bne .L2622 + ldrh r3, [r7] + ldr ip, [r4, #-1556] + lsr r0, r3, #1 + mul lr, ip, r3 + add r1, r0, #1 + add r1, r1, lr, lsr #2 + ldr lr, [r4, #-1868] + uxth r1, r1 + cmp lr, #0 + beq .L2623 + ldr lr, [r4, #-1564] + cmp lr, #39 + bhi .L2623 + cmp lr, #2 + bls .L2649 + cmp ip, #0 + movne r3, #0 + andeq r3, r3, #1 + cmp r3, #0 + moveq r1, r0 + beq .L2623 +.L2649: + mov r1, #0 + b .L2624 +.L2622: + cmp r2, #1 + bne .L2649 + ldrh r3, [r10] + cmp r3, #1 + beq .L2649 + ldrb r3, [r4, #-2740] @ zero_extendqisi2 + cmp r3, #0 + bne .L2649 + ldr r0, [r4, #-1868] + ldrh r3, [r7] + cmp r0, #0 + lsr r1, r3, #3 + beq .L2623 + ldr r0, [r4, #-1564] + cmp r0, #1 + rsbls r3, r3, r3, lsl #3 + ubfxls r1, r3, #3, #16 +.L2623: + cmp r1, #0 + subne r1, r1, #1 + uxthne r1, r1 +.L2624: + ldr r0, .L2669+8 + bl List_pop_index_node + ldrh r3, [r7] + uxth r8, r0 + sub r3, r3, #1 + strh r3, [r7] @ movhi + ldrh r3, [r10, #-12] + cmp r3, r8 + bls .L2621 + ldr r3, [r4, #-1404] + lsl r6, r8, #1 + ldrh r7, [r3, r6] + cmp r7, #0 + bne .L2621 + strh r8, [r5] @ movhi + mov r0, r5 + bl make_superblock + ldrb r3, [r5, #7] @ zero_extendqisi2 + cmp r3, #0 + beq .L2666 + ldr r2, .L2669+12 + add r9, r5, #16 + ldr r0, [r4, #-1488] + mov ip, r9 + mov lr, r7 + ldrh r1, [r2] + mov r2, #36 + mov r3, r0 + mla r1, r2, r1, r0 + str r1, [sp, #4] +.L2627: + ldr r1, [sp, #4] + cmp r1, r3 + bne .L2629 + ldr r3, [r4, #-1868] + ldr r2, .L2669+16 + adds r3, r3, #0 + movne r3, #1 + cmp r5, r2 + movne r3, #0 + cmp r3, #0 + beq .L2630 + ldr r3, [r4, #-1412] + ldrh r3, [r3, r6] + cmp r3, #40 + movhi r3, #0 + strbhi r3, [r4, #892] +.L2630: + ldrb r3, [r5, #8] @ zero_extendqisi2 + ldr r2, [r4, #-1412] + ldr fp, .L2669+20 + cmp r3, #0 + ldrh r3, [r2, r6] + bne .L2631 + cmp r3, #0 + mov r0, r8 + ldrhne r1, [fp, #-10] + moveq r3, #2 + addne r3, r3, r1 + mov r1, #0 + strh r3, [r2, r6] @ movhi + ldr r3, [r4, #-1580] + add r3, r3, #1 + str r3, [r4, #-1580] + bl ftl_set_blk_mode +.L2634: + ldr r3, [r4, #-1412] + ldr r2, [r4, #-1568] + ldr r0, [r4, #-1580] + ldrh r3, [r3, r6] + ldrh r1, [r10, #-12] + cmp r3, r2 + ldrh r2, [fp, #-10] + strhi r3, [r4, #-1568] + ldr r3, [r4, #-1576] + mla r0, r0, r2, r3 + bl __aeabi_uidiv + ldr r2, [r4, #-1416] + ldr r1, [r4, #-1488] + str r0, [r4, #1728] + ldr r3, [r2, #16] + add r3, r3, #1 + str r3, [r2, #16] + mov r2, #36 + mla r2, r2, r7, r1 + add r3, r1, #4 + add r2, r2, #40 +.L2636: + add r3, r3, #36 + cmp r2, r3 + bne .L2637 + ldrb r3, [r4, #-2740] @ zero_extendqisi2 + cmp r3, #0 + beq .L2638 + ldrb r3, [r5, #8] @ zero_extendqisi2 + mov r2, r7 + ldr r0, [r4, #-1488] + cmp r3, #1 + moveq r1, #0 + movne r1, #1 + bl FlashEraseBlocks +.L2638: + ldrb r1, [r5, #8] @ zero_extendqisi2 + mov r2, r7 + ldr r0, [r4, #-1488] + mov r10, #0 + bl FlashEraseBlocks + mov r3, r10 + mov r1, #36 +.L2640: + uxth r2, r10 + cmp r7, r2 + bhi .L2642 + cmp r3, #0 + ble .L2643 + mov r0, r8 + bl update_multiplier_value + bl FtlBbmTblFlush +.L2643: + ldrb r2, [r5, #7] @ zero_extendqisi2 + cmp r2, #0 + bne .L2644 +.L2666: + ldr r3, [r4, #-1404] + mvn r2, #0 + strh r2, [r3, r6] @ movhi + b .L2621 +.L2629: + str lr, [r3, #8] + movw fp, #65535 + str lr, [r3, #12] + add r3, r3, #36 + ldrh r1, [ip], #2 + cmp r1, fp + mlane fp, r2, r7, r0 + lslne r1, r1, #10 + addne r7, r7, #1 + uxthne r7, r7 + strne r1, [fp, #4] + b .L2627 +.L2631: + add r3, r3, #1 + mov r0, r8 + strh r3, [r2, r6] @ movhi + ldr r3, [r4, #-1576] + add r3, r3, #1 + str r3, [r4, #-1576] + bl ftl_set_blk_mode.part.17 + b .L2634 +.L2637: + ldr r1, [r3, #-36] + bic r1, r1, #1020 + bic r1, r1, #3 + str r1, [r3, #-36] + b .L2636 +.L2642: + mul r2, r1, r10 + ldr r0, [r4, #-1488] + add ip, r0, r2 + ldr r2, [r0, r2] + cmn r2, #1 + bne .L2641 + ldr r0, [ip, #4] + add r3, r3, #1 + str r1, [sp, #12] + str r2, [sp, #8] + ubfx r0, r0, #10, #16 + str r3, [sp, #4] + bl FtlBbmMapBadBlock + ldr r2, [sp, #8] + ldr r1, [sp, #12] + ldr r3, [sp, #4] + strh r2, [r9] @ movhi + ldrb r2, [r5, #7] @ zero_extendqisi2 + sub r2, r2, #1 + strb r2, [r5, #7] +.L2641: + add r10, r10, #1 + add r9, r9, #2 + b .L2640 +.L2644: + ldrh r3, [fp, #-2] + strh r8, [r5] @ movhi + smulbb r3, r3, r2 + mov r2, #0 + strh r2, [r5, #2] @ movhi + strb r2, [r5, #6] + ldr r2, [r4, #-1612] + uxth r3, r3 + ldr r1, [r4, #-1404] + strh r3, [r5, #4] @ movhi + str r2, [r5, #12] + add r2, r2, #1 + str r2, [r4, #-1612] + ldrh r2, [r5] + lsl r2, r2, #1 + strh r3, [r1, r2] @ movhi +.L2620: + mov r0, #0 + add sp, sp, #20 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2670: + .align 2 +.L2669: + .word .LANCHOR2 + .word .LANCHOR2+980 + .word .LANCHOR2+876 + .word .LANCHOR2-1732 + .word .LANCHOR2+884 + .word .LANCHOR2-1664 + .fnend + .size allocate_data_superblock, .-allocate_data_superblock + .align 2 + .global FtlGcBufInit + .syntax unified + .arm + .fpu softvfp + .type FtlGcBufInit, %function +FtlGcBufInit: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r2, .L2677 + mov ip, #12 + push {r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + mov lr, #1 + mov r4, #36 + mov r3, #0 + str r3, [r2, #1732] +.L2672: + ldr r8, .L2677+4 + uxth r5, r3 + add r0, r3, #1 + ldrh r1, [r8] + cmp r5, r1 + bcc .L2673 + mov ip, #12 + mov lr, #0 +.L2674: + ldr r3, [r2, #-1476] + cmp r1, r3 + bcc .L2675 + pop {r4, r5, r6, r7, r8, pc} +.L2673: + uxth r3, r3 + ldr r6, [r2, #-1444] + mul r5, ip, r3 + add r1, r6, r5 + str lr, [r1, #8] + ldrh r1, [r8, #76] + mul r1, r3, r1 + add r7, r1, #3 + cmp r1, #0 + movlt r1, r7 + ldr r7, [r2, #-1460] + bic r1, r1, #3 + add r1, r7, r1 + str r1, [r6, r5] + ldrh r1, [r8, #78] + ldr r7, [r2, #-1444] + mul r1, r3, r1 + add r6, r7, r5 + add r8, r1, #3 + cmp r1, #0 + movlt r1, r8 + ldr r8, [r2, #-1432] + bic r1, r1, #3 + add r1, r8, r1 + str r1, [r6, #4] + ldr r1, [r2, #-1484] + mla r3, r4, r3, r1 + ldr r1, [r7, r5] + str r1, [r3, #8] + ldr r1, [r6, #4] + str r1, [r3, #12] + mov r3, r0 + b .L2672 +.L2675: + mul r4, ip, r1 + ldr r6, [r2, #-1444] + ldr r5, .L2677+8 + add r3, r6, r4 + str lr, [r3, #8] + ldrh r3, [r5] + mul r3, r1, r3 + add r0, r3, #3 + cmp r3, #0 + movlt r3, r0 + ldr r0, [r2, #-1460] + bic r3, r3, #3 + add r3, r0, r3 + str r3, [r6, r4] + ldrh r3, [r5, #2] + ldr r0, [r2, #-1444] + mul r3, r1, r3 + add r0, r0, r4 + add r1, r1, #1 + uxth r1, r1 + add r4, r3, #3 + cmp r3, #0 + movlt r3, r4 + ldr r4, [r2, #-1432] + bic r3, r3, #3 + add r3, r4, r3 + str r3, [r0, #4] + b .L2674 +.L2678: + .align 2 +.L2677: + .word .LANCHOR2 + .word .LANCHOR2-1732 + .word .LANCHOR2-1656 + .fnend + .size FtlGcBufInit, .-FtlGcBufInit + .align 2 + .global FtlVariablesInit + .syntax unified + .arm + .fpu softvfp + .type FtlVariablesInit, %function +FtlVariablesInit: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + mvn r3, #0 + ldr r4, .L2681 + movw r2, #1740 + mov r5, #0 + mov r1, r5 + strh r3, [r4, r2] @ movhi + sub r6, r4, #1712 + str r3, [r4, #1752] + sub r3, r4, #1280 + strh r5, [r3, #-8] @ movhi + sub r3, r4, #1632 + ldrh r2, [r3, #-12] + ldr r0, [r4, #-1392] + str r5, [r4, #1736] + str r5, [r4, #1744] + lsl r2, r2, #1 + str r5, [r4, #1748] + str r5, [r4, #-1868] + bl ftl_memset + ldrh r2, [r6, #-10] + mov r1, r5 + ldr r0, [r4, #-1412] + lsl r2, r2, #1 + bl ftl_memset + ldrh r2, [r6, #-10] + mov r1, r5 + ldr r0, [r4, #-1420] + lsl r2, r2, #1 + bl ftl_memset + mov r1, r5 + mov r2, #48 + add r0, r4, #816 + bl ftl_memset + add r0, r4, #1200 + mov r2, #512 + mov r1, r5 + add r0, r0, #4 + bl ftl_memset + bl FtlGcBufInit + bl FtlL2PDataInit + mov r0, r5 + pop {r4, r5, r6, pc} +.L2682: + .align 2 +.L2681: + .word .LANCHOR2 + .fnend + .size FtlVariablesInit, .-FtlVariablesInit + .align 2 + .global FtlGcBufFree + .syntax unified + .arm + .fpu softvfp + .type FtlGcBufFree, %function +FtlGcBufFree: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L2691 + push {r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + mov lr, #0 + mov r5, #36 + mov r7, #12 + mov r8, lr + ldr r6, [r3, #-1476] + ldr r4, [r3, #-1444] +.L2684: + uxth r3, lr + cmp r1, r3 + popls {r4, r5, r6, r7, r8, r9, r10, pc} + mla ip, r5, r3, r0 + mov r2, #0 +.L2685: + uxth r3, r2 + cmp r6, r3 + bls .L2686 + mul r3, r7, r3 + add r2, r2, #1 + ldr r10, [r4, r3] + add r9, r4, r3 + ldr r3, [ip, #8] + cmp r10, r3 + bne .L2685 + str r8, [r9, #8] +.L2686: + add lr, lr, #1 + b .L2684 +.L2692: + .align 2 +.L2691: + .word .LANCHOR2 + .fnend + .size FtlGcBufFree, .-FtlGcBufFree + .align 2 + .global FtlGcBufAlloc + .syntax unified + .arm + .fpu softvfp + .type FtlGcBufAlloc, %function +FtlGcBufAlloc: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L2701 + mov ip, #0 + push {r4, r5, r6, r7, r8, r9, lr} + .save {r4, r5, r6, r7, r8, r9, lr} + mov r6, #12 + mov r7, #1 + mov r8, #36 + ldr r4, [r3, #-1476] + ldr r5, [r3, #-1444] +.L2694: + uxth r2, ip + cmp r1, r2 + bhi .L2698 + pop {r4, r5, r6, r7, r8, r9, pc} +.L2698: + mov lr, #0 +.L2695: + uxth r3, lr + cmp r4, r3 + bls .L2696 + mla r3, r6, r3, r5 + add lr, lr, #1 + ldr r9, [r3, #8] + cmp r9, #0 + bne .L2695 + mla r2, r8, r2, r0 + ldr lr, [r3] + str r7, [r3, #8] + str lr, [r2, #8] + ldr r3, [r3, #4] + str r3, [r2, #12] +.L2696: + add ip, ip, #1 + b .L2694 +.L2702: + .align 2 +.L2701: + .word .LANCHOR2 + .fnend + .size FtlGcBufAlloc, .-FtlGcBufAlloc + .align 2 + .global IsBlkInGcList + .syntax unified + .arm + .fpu softvfp + .type IsBlkInGcList, %function +IsBlkInGcList: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r2, .L2708 + movw r1, #1756 + ldr r3, [r2, #-1508] + ldrh r2, [r2, r1] + add r2, r3, r2, lsl #1 +.L2704: + cmp r3, r2 + bne .L2706 + mov r0, #0 + bx lr +.L2706: + ldrh r1, [r3], #2 + cmp r1, r0 + bne .L2704 + mov r0, #1 + bx lr +.L2709: + .align 2 +.L2708: + .word .LANCHOR2 + .fnend + .size IsBlkInGcList, .-IsBlkInGcList + .align 2 + .global FtlGcUpdatePage + .syntax unified + .arm + .fpu softvfp + .type FtlGcUpdatePage, %function +FtlGcUpdatePage: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + mov r4, r0 + ubfx r0, r0, #10, #16 + mov r5, r1 + mov r6, r2 + bl P2V_block_in_plane + ldr r3, .L2715 + movw r2, #1756 + mov ip, #0 + ldrh lr, [r3, r2] + ldr r2, [r3, #-1508] + sub r1, r2, #2 +.L2711: + uxth r7, ip + cmp r7, lr + bcc .L2713 + bne .L2712 + lsl ip, r7, #1 + strh r0, [r2, ip] @ movhi + movw r2, #1756 + ldrh r0, [r3, r2] + add r0, r0, #1 + strh r0, [r3, r2] @ movhi + b .L2712 +.L2713: + ldrh r7, [r1, #2]! + add ip, ip, #1 + cmp r7, r0 + bne .L2711 +.L2712: + movw ip, #1758 + mov r0, #12 + ldrh r2, [r3, ip] + mul r0, r0, r2 + ldr r2, [r3, #-1504] + add r1, r2, r0 + stmib r1, {r5, r6} + str r4, [r2, r0] + ldrh r2, [r3, ip] + add r2, r2, #1 + strh r2, [r3, ip] @ movhi + pop {r4, r5, r6, r7, r8, pc} +.L2716: + .align 2 +.L2715: + .word .LANCHOR2 + .fnend + .size FtlGcUpdatePage, .-FtlGcUpdatePage + .align 2 + .global FtlGcPageVarInit + .syntax unified + .arm + .fpu softvfp + .type FtlGcPageVarInit, %function +FtlGcPageVarInit: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + mov r3, #0 + ldr r4, .L2719 + movw r2, #1756 + mov r1, #255 + strh r3, [r4, r2] @ movhi + sub r5, r4, #1648 + movw r2, #1758 + ldr r0, [r4, #-1508] + strh r3, [r4, r2] @ movhi + ldrh r2, [r5, #-14] + lsl r2, r2, #1 + bl ftl_memset + ldrh r3, [r5, #-14] + mov r2, #12 + ldr r0, [r4, #-1504] + mov r1, #255 + mul r2, r2, r3 + bl ftl_memset + pop {r4, r5, r6, lr} + b FtlGcBufInit +.L2720: + .align 2 +.L2719: + .word .LANCHOR2 + .fnend + .size FtlGcPageVarInit, .-FtlGcPageVarInit + .align 2 + .global FtlGcScanTempBlk + .syntax unified + .arm + .fpu softvfp + .type FtlGcScanTempBlk, %function +FtlGcScanTempBlk: + .fnstart + @ args = 0, pretend = 0, frame = 64 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r2, .L2770 + movw r3, #3444 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #68 + sub sp, sp, #68 + mov r5, r0 + str r1, [sp, #8] + ldrh r6, [r2, r3] + movw r3, #65535 + cmp r6, r3 + beq .L2753 + cmp r6, #0 + bne .L2722 +.L2723: + bl FtlGcPageVarInit + b .L2724 +.L2753: + mov r6, #0 +.L2722: + ldr r3, .L2770+4 + ldr r2, [sp, #8] + ldrh r3, [r3, #-2] + cmp r3, r2 + beq .L2723 +.L2724: + ldr r4, .L2770+8 + mov r2, #0 + mvn r3, #0 + stm sp, {r2, r3} +.L2725: + ldrh r1, [r5] + movw r3, #65535 + mov r2, #0 + strb r2, [r5, #8] + cmp r1, r3 + beq .L2726 +.L2750: + ldr r3, .L2770+12 + add ip, r5, #16 + ldr r0, [r4, #-1500] + movw r8, #65535 + ldr fp, [r4, #-1432] + mov r9, #36 + ldrh r2, [r3, #-4] + ldrh lr, [r3, #74] + str r2, [sp, #12] + ldr r2, [r4, #-1460] + str r2, [sp, #16] + ldrh r2, [r3, #72] + str r2, [sp, #20] + mov r2, #0 + mov r7, r2 +.L2727: + ldr r1, [sp, #12] + uxth r3, r2 + cmp r1, r3 + bhi .L2729 + mov r10, #0 + mov r2, #0 + mov r1, r7 + bl FlashReadPages +.L2730: + uxth r3, r10 + cmp r7, r3 + bhi .L2748 + ldr r3, [sp] + add r6, r6, #1 + uxth r6, r6 + add r3, r3, #1 + str r3, [sp] + ldr r2, [sp] + ldr r3, [sp, #8] + cmp r3, r2 + ldr r2, .L2770+4 + bls .L2749 +.L2751: + ldrh r3, [r2, #-2] + cmp r3, r6 + bhi .L2750 + mov r2, #0 + b .L2726 +.L2729: + ldrh r3, [ip], #2 + cmp r3, r8 + beq .L2728 + mla r1, r9, r7, r0 + orr r3, r6, r3, lsl #10 + str r3, [r1, #4] + ldr r3, [sp, #20] + mul r3, r3, r7 + add r10, r3, #3 + cmp r3, #0 + movlt r3, r10 + ldr r10, [sp, #16] + bic r3, r3, #3 + add r3, r10, r3 + str r3, [r1, #8] + mul r3, lr, r7 + add r7, r7, #1 + uxth r7, r7 + add r10, r3, #3 + cmp r3, #0 + movlt r3, r10 + bic r3, r3, #3 + add r3, fp, r3 + str r3, [r1, #12] +.L2728: + add r2, r2, #1 + b .L2727 +.L2748: + mov r9, #36 + ldr r8, [r4, #-1500] + mul r9, r9, r10 + add r3, r8, r9 + ldr fp, [r3, #4] + str r3, [sp, #12] + ubfx r0, fp, #10, #16 + bl P2V_plane + ldr r8, [r8, r9] + mov r2, r0 + ldr r3, [sp, #12] + cmp r8, #0 + ldr r3, [r3, #12] + bne .L2731 + ldrh r0, [r3] + movw r1, #65535 + cmp r0, r1 + bne .L2732 +.L2735: + ldrb r1, [r4, #-2740] @ zero_extendqisi2 + cmp r1, #0 + beq .L2765 + mov r3, #1 + str r3, [r4, #1748] +.L2726: + ldr r1, .L2770 + mvn r0, #0 + movw r3, #3444 + strh r6, [r5, #2] @ movhi + strb r2, [r5, #6] + strh r0, [r1, r3] @ movhi + mov r1, r6 + mov r0, r5 + bl ftl_sb_update_avl_pages + b .L2721 +.L2732: + ldr r0, [r3, #8] + ldr r1, [r4, #-1284] + cmp r0, r1 + bhi .L2735 + ldr r2, .L2770+16 + ldrb r2, [r2, #36] @ zero_extendqisi2 + cmp r2, #0 + bne .L2738 +.L2739: + ldr r2, [r3, #8] + mov r1, fp + ldr r0, [r3, #12] + add r10, r10, #1 + bl FtlGcUpdatePage + b .L2730 +.L2765: + ldrh r3, [r5] + ldr r2, [r4, #-1404] + lsl r3, r3, #1 +.L2769: + strh r1, [r2, r3] @ movhi + ldrh r0, [r5] + bl INSERT_FREE_LIST + ldr r2, .L2770+20 + mvn r3, #0 + strh r3, [r5] @ movhi + strh r3, [r2] @ movhi +.L2768: + bl FtlGcPageVarInit + mov r6, #0 + b .L2725 +.L2738: + mov r2, r8 + add r1, sp, #24 + str r3, [sp, #12] + bl log2phys + ldr r3, [sp, #12] + ldr r1, [sp, #24] + ldr r2, [r3, #12] + cmn r1, #1 + sub r0, r2, r1 + clz r0, r0 + lsr r0, r0, #5 + moveq r0, #0 + cmp r0, #0 + beq .L2739 + str r2, [sp, #32] + mov r1, #1 + ldr r2, [r4, #-1448] + add r0, sp, #28 + str r2, [sp, #36] + ldr r2, [r4, #-1436] + str r2, [sp, #40] + mov r2, r8 + bl FlashReadPages + ldr r2, .L2770+24 + ldr r1, [r4, #-1500] + ldr r3, [sp, #12] + ldrh r2, [r2] + add r9, r1, r9 + ldr r1, [sp, #36] + lsl r2, r2, #7 +.L2740: + cmp r8, r2 + beq .L2739 + ldr r0, [r9, #8] + ldr ip, [r0, r8, lsl #2] + ldr r0, [r1, r8, lsl #2] + cmp ip, r0 + beq .L2741 + ldr r2, [sp, #32] + ldrh r1, [r5] + ldr r0, .L2770+28 + bl rk_printk + ldrh r3, [r5] + mov r1, #0 + ldr r2, [r4, #-1404] + lsl r3, r3, #1 + b .L2769 +.L2741: + add r8, r8, #1 + b .L2740 +.L2731: + mov r2, fp + ldrh r1, [r5] + ldr r0, .L2770+32 + bl rk_printk + ldr r3, [r4, #-1868] + cmp r3, #0 + ldrh r3, [r5] + bne .L2744 + ldrb r2, [r4, #-2740] @ zero_extendqisi2 + cmp r2, #0 + beq .L2745 +.L2744: + ldr r1, [r4, #-1412] + lsl r2, r3, #1 + ldrh r2, [r1, r2] + cmp r2, #159 + bls .L2746 +.L2745: + ldr r2, [r4, #-1500] + ldr r2, [r2, r9] + cmn r2, #1 + bne .L2747 +.L2746: + ldr r2, [r4, #-1500] + add r9, r2, r9 + ldr r2, [r9, #4] + str r2, [sp, #4] +.L2747: + ldr r2, [r4, #-1404] + lsl r3, r3, #1 + mov r1, #0 + strh r1, [r2, r3] @ movhi + ldrh r0, [r5] + bl INSERT_FREE_LIST + mvn r3, #0 + strh r3, [r5] @ movhi + b .L2768 +.L2749: + ldr r1, .L2770+36 + movw r0, #65535 + ldrh r3, [r1] + cmp r3, r0 + beq .L2751 + ldr r0, [sp] + add r3, r3, r0 + strh r3, [r1] @ movhi + ldrh r3, [r2, #-2] + cmp r3, r6 + bls .L2751 +.L2721: + ldr r0, [sp, #4] + add sp, sp, #68 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2771: + .align 2 +.L2770: + .word .LANCHOR1 + .word .LANCHOR2-1664 + .word .LANCHOR2 + .word .LANCHOR2-1728 + .word .LANCHOR0 + .word .LANCHOR2+1156 + .word .LANCHOR2-1660 + .word .LC147 + .word .LC148 + .word .LANCHOR1+3444 + .fnend + .size FtlGcScanTempBlk, .-FtlGcScanTempBlk + .align 2 + .global FtlGcRefreshOpenBlock + .syntax unified + .arm + .fpu softvfp + .type FtlGcRefreshOpenBlock, %function +FtlGcRefreshOpenBlock: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + ldr r6, .L2780 + ldrh r3, [r6] + cmp r3, r0 + beq .L2774 + add r5, r6, #16 + ldrh r3, [r5, #-14] + cmp r3, r0 + beq .L2774 + ldrh r3, [r5, #-12] + cmp r3, r0 + beq .L2774 + ldrh r3, [r5, #-10] + cmp r3, r0 + beq .L2774 + mov r4, r0 + mov r1, r0 + ldr r0, .L2780+4 + bl rk_printk + ldrh r2, [r6] + movw r3, #65535 + cmp r2, r3 + strheq r4, [r6] @ movhi + beq .L2774 + ldrh r2, [r5, #-14] + cmp r2, r3 + strheq r4, [r5, #-14] @ movhi + beq .L2774 + ldrh r2, [r5, #-12] + cmp r2, r3 + strheq r4, [r5, #-12] @ movhi + beq .L2774 + ldrh r2, [r5, #-10] + cmp r2, r3 + strheq r4, [r5, #-10] @ movhi +.L2774: + mov r0, #0 + pop {r4, r5, r6, pc} +.L2781: + .align 2 +.L2780: + .word .LANCHOR2-1536 + .word .LC149 + .fnend + .size FtlGcRefreshOpenBlock, .-FtlGcRefreshOpenBlock + .align 2 + .global FtlGcRefreshBlock + .syntax unified + .arm + .fpu softvfp + .type FtlGcRefreshBlock, %function +FtlGcRefreshBlock: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + ldr r6, .L2793 + ldrh r3, [r6] + cmp r3, r0 + beq .L2790 + add r5, r6, #16 + ldrh r3, [r5, #-14] + cmp r3, r0 + beq .L2790 + ldrh r3, [r5, #-12] + cmp r3, r0 + beq .L2790 + ldrh r3, [r5, #-10] + cmp r3, r0 + beq .L2790 + mov r4, r0 + mov r1, r0 + ldr r0, .L2793+4 + bl rk_printk + ldrh r2, [r6] + movw r3, #65535 + cmp r2, r3 + strheq r4, [r6] @ movhi + beq .L2790 + ldrh r2, [r5, #-14] + cmp r2, r3 + strheq r4, [r5, #-14] @ movhi + beq .L2790 + ldrh r2, [r5, #-12] + cmp r2, r3 + strheq r4, [r5, #-12] @ movhi + beq .L2790 + ldrh r2, [r5, #-10] + cmp r2, r3 + bne .L2791 + strh r4, [r5, #-10] @ movhi +.L2790: + mov r0, #0 + pop {r4, r5, r6, pc} +.L2791: + mvn r0, #0 + pop {r4, r5, r6, pc} +.L2794: + .align 2 +.L2793: + .word .LANCHOR2-1536 + .word .LC149 + .fnend + .size FtlGcRefreshBlock, .-FtlGcRefreshBlock + .align 2 + .global FtlGcMarkBadPhyBlk + .syntax unified + .arm + .fpu softvfp + .type FtlGcMarkBadPhyBlk, %function +FtlGcMarkBadPhyBlk: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + mov r5, r0 + ldr r6, .L2804 + bl P2V_block_in_plane + sub r7, r6, #1520 + mov r4, r0 + mov r2, r5 + ldrh r1, [r7, #-2] + ldr r0, .L2804+4 + bl rk_printk + mov r0, r4 + bl FtlGcRefreshBlock + ldr r3, [r6, #-1868] + cmp r3, #0 + beq .L2796 + ldr r2, [r6, #-1412] + lsl r4, r4, #1 + ldrh r3, [r2, r4] + cmp r3, #39 + subhi r3, r3, #40 + strhhi r3, [r2, r4] @ movhi +.L2796: + ldrh r3, [r7, #-2] + mov r2, #0 + ldr r0, .L2804+8 +.L2797: + uxth r1, r2 + cmp r3, r1 + bhi .L2799 + cmp r3, #15 + addls r2, r3, #1 + lslls r3, r3, #1 + strhls r2, [r7, #-2] @ movhi + ldrls r2, .L2804+8 + strhls r5, [r2, r3] @ movhi + b .L2798 +.L2799: + add r2, r2, #1 + add r1, r0, r2, lsl #1 + ldrh r1, [r1, #-2] + cmp r1, r5 + bne .L2797 +.L2798: + mov r0, #0 + pop {r4, r5, r6, r7, r8, pc} +.L2805: + .align 2 +.L2804: + .word .LANCHOR2 + .word .LC150 + .word .LANCHOR2+1760 + .fnend + .size FtlGcMarkBadPhyBlk, .-FtlGcMarkBadPhyBlk + .align 2 + .global FtlGcReFreshBadBlk + .syntax unified + .arm + .fpu softvfp + .type FtlGcReFreshBadBlk, %function +FtlGcReFreshBadBlk: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, lr} + .save {r4, lr} + ldr r4, .L2813 + ldrh r3, [r4, #-2] + cmp r3, #0 + beq .L2807 + ldrh r1, [r4, #-16] + movw r2, #65535 + cmp r1, r2 + bne .L2807 + add r4, r4, #16 + ldrh r2, [r4, #-14] + cmp r2, r3 + ldr r2, .L2813+4 + movcs r3, #0 + strhcs r3, [r4, #-14] @ movhi + ldrh r3, [r4, #-14] + lsl r3, r3, #1 + ldrh r0, [r2, r3] + bl P2V_block_in_plane + bl FtlGcRefreshBlock + ldrh r3, [r4, #-14] + add r3, r3, #1 + strh r3, [r4, #-14] @ movhi +.L2807: + mov r0, #0 + pop {r4, pc} +.L2814: + .align 2 +.L2813: + .word .LANCHOR2-1520 + .word .LANCHOR2+1760 + .fnend + .size FtlGcReFreshBadBlk, .-FtlGcReFreshBadBlk + .align 2 + .global FtlGcFreeBadSuperBlk + .syntax unified + .arm + .fpu softvfp + .type FtlGcFreeBadSuperBlk, %function +FtlGcFreeBadSuperBlk: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #12 + ldr r4, .L2828 + ldrh r3, [r4, #-2] + cmp r3, #0 + beq .L2816 + add r9, r4, #1520 + mov r7, #0 + add fp, r9, #1760 + str r0, [sp] +.L2817: + ldr r3, .L2828+4 + ldrh r2, [r3, #-4] + uxth r3, r7 + cmp r2, r3 + bhi .L2823 + bl FtlGcReFreshBadBlk +.L2816: + mov r0, #0 + add sp, sp, #12 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2823: + uxtah r3, r9, r7 + ldr r1, [sp] + mov r8, #0 + ldrb r0, [r3, #-1706] @ zero_extendqisi2 + bl V2P_block + ldr r2, .L2828+8 + mov r10, r0 +.L2818: + ldrh r1, [r4, #-2] + uxth r5, r8 + cmp r1, r5 + addls r7, r7, #1 + bls .L2817 +.L2822: + uxth r6, r8 + lsl r1, r6, #1 + ldrh r1, [fp, r1] + cmp r1, r10 + bne .L2819 + mov r1, r10 + mov r0, r2 + str r2, [sp, #4] + add r6, fp, r6, lsl #1 + bl rk_printk + mov r0, r10 + bl FtlBbmMapBadBlock + bl FtlBbmTblFlush + ldrh r1, [r4, #-2] + ldr r2, [sp, #4] +.L2820: + cmp r5, r1 + bcc .L2821 + sub r1, r1, #1 + strh r1, [r4, #-2] @ movhi +.L2819: + add r8, r8, #1 + b .L2818 +.L2821: + ldrh r0, [r6, #2]! + add r5, r5, #1 + uxth r5, r5 + strh r0, [r6, #-2] @ movhi + b .L2820 +.L2829: + .align 2 +.L2828: + .word .LANCHOR2-1520 + .word .LANCHOR2-1728 + .word .LC151 + .fnend + .size FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk + .align 2 + .global update_vpc_list + .syntax unified + .arm + .fpu softvfp + .type update_vpc_list, %function +update_vpc_list: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r2, .L2839 + lsl r3, r0, #1 + push {r4, lr} + .save {r4, lr} + ldr r1, [r2, #-1404] + ldrh r3, [r1, r3] + cmp r3, #0 + bne .L2831 + movw r1, #1156 + mov r4, r0 + ldrh r0, [r2, r1] + cmp r0, r4 + mvneq r3, #0 + strheq r3, [r2, r1] @ movhi + beq .L2833 + add r1, r2, #884 + ldrh r1, [r1] + cmp r1, r4 + beq .L2830 + add r1, r2, #932 + ldrh r1, [r1] + cmp r1, r4 + beq .L2830 + add r2, r2, #980 + ldrh r2, [r2] + cmp r2, r4 + beq .L2830 +.L2833: + mov r1, r4 + ldr r0, .L2839+4 + bl List_remove_node + ldr r2, .L2839+8 + mov r0, r4 + ldrh r3, [r2] + sub r3, r3, #1 + strh r3, [r2] @ movhi + bl free_data_superblock + mov r0, r4 + bl FtlGcFreeBadSuperBlk + mov r3, #1 +.L2830: + mov r0, r3 + pop {r4, pc} +.L2831: + bl List_update_data_list + mov r3, #0 + b .L2830 +.L2840: + .align 2 +.L2839: + .word .LANCHOR2 + .word .LANCHOR2+864 + .word .LANCHOR2+872 + .fnend + .size update_vpc_list, .-update_vpc_list + .align 2 + .global decrement_vpc_count + .syntax unified + .arm + .fpu softvfp + .type decrement_vpc_count, %function +decrement_vpc_count: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + movw r3, #65535 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + cmp r0, r3 + mov r4, r0 + ldr r5, .L2852 + beq .L2842 + ldr r3, [r5, #-1404] + lsl r6, r0, #1 + ldrh r2, [r3, r6] + cmp r2, #0 + subne r2, r2, #1 + strhne r2, [r3, r6] @ movhi + bne .L2842 + mov r1, r0 + ldr r0, .L2852+4 + bl rk_printk + ldr r3, [r5, #-1404] + mov r2, #32 + mov r1, r4 + add r0, r5, #876 + strh r2, [r3, r6] @ movhi + bl test_node_in_list + cmp r0, #0 + beq .L2844 + mov r1, r4 + add r0, r5, #876 + bl List_remove_node + add r2, r5, #880 + mov r0, r4 + ldrh r3, [r2] + sub r3, r3, #1 + strh r3, [r2] @ movhi + bl INSERT_DATA_LIST + ldr r3, [r5, #-1404] + mov r1, r4 + ldr r0, .L2852+8 + ldrh r2, [r3, r6] + bl rk_printk +.L2844: + mov r0, r4 + bl FtlGcRefreshBlock +.L2847: + mov r0, #0 + pop {r4, r5, r6, pc} +.L2842: + movw r6, #1740 + movw r3, #65535 + ldrh r0, [r5, r6] + cmp r0, r3 + strheq r4, [r5, r6] @ movhi + beq .L2847 + cmp r4, r0 + beq .L2847 + bl update_vpc_list + adds r0, r0, #0 + strh r4, [r5, r6] @ movhi + movne r0, #1 + pop {r4, r5, r6, pc} +.L2853: + .align 2 +.L2852: + .word .LANCHOR2 + .word .LC152 + .word .LC153 + .fnend + .size decrement_vpc_count, .-decrement_vpc_count + .align 2 + .global FtlRecoverySuperblock + .syntax unified + .arm + .fpu softvfp + .type FtlRecoverySuperblock, %function +FtlRecoverySuperblock: + .fnstart + @ args = 0, pretend = 0, frame = 48 + @ frame_needed = 0, uses_anonymous_args = 0 + ldrh r2, [r0] + movw r1, #65535 + cmp r2, r1 + beq .L2999 + ldr r2, .L3011 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #52 + sub sp, sp, #52 + ldrh r3, [r0, #2] + mov fp, r0 + ldrh r2, [r2, #-2] + str r3, [sp, #8] + cmp r2, r3 + mov r2, #0 + strheq r2, [r0, #4] @ movhi + strbeq r2, [r0, #6] + ldrhne r0, [r0, #16] + bne .L2858 +.L2997: + mov r0, #0 + add sp, sp, #52 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2859: + uxth r0, r2 + add r0, fp, r0, lsl #1 + ldrh r0, [r0, #16] +.L2858: + cmp r0, r1 + add r2, r2, #1 + beq .L2859 + ldrb r1, [fp, #8] @ zero_extendqisi2 + ldrb r3, [fp, #6] @ zero_extendqisi2 + cmp r1, #1 + str r3, [sp, #12] + bne .L2860 + bl FtlGetLastWrittenPage + cmn r0, #1 + mov r4, r0 + beq .L2861 + ldr r3, .L3011+4 + ldrb r3, [r3, #-2740] @ zero_extendqisi2 + cmp r3, #0 + bne .L2932 + ldr r3, .L3011+8 + add r3, r3, r0, lsl #1 + ldrh r5, [r3, #84] +.L2862: + ldr r3, .L3011+4 + mov r9, #36 + sub r2, r3, #1728 + ldr r0, [r3, #-1500] + ldrh r2, [r2, #-4] + sub r3, r3, #1648 + ldr lr, [r3, #216] + ldrh r7, [r3, #-6] + add r3, fp, #16 + str r2, [sp] + mov r2, #0 + mov ip, r3 + mov r6, r2 + mov r10, r2 + str r3, [sp, #20] +.L2863: + ldr r1, [sp] + uxth r3, r2 + cmp r1, r3 + bhi .L2865 + ldrb r3, [fp, #8] @ zero_extendqisi2 + ldr r8, .L3011+4 + cmp r3, #1 + movne r3, #0 + bne .L3002 + ldrb r3, [r8, #-2740] @ zero_extendqisi2 + adds r3, r3, #0 + movne r3, #1 +.L3002: + str r3, [sp, #24] + mov r1, r6 + ldr r2, [sp, #24] + mov r7, #0 + ldr r10, .L3011+4 + movw r9, #65535 + bl FlashReadPages + ldr r3, [r8, #-1608] + str r3, [sp, #16] +.L2867: + uxth r3, r7 + cmp r6, r3 + bhi .L2872 + bne .L2870 + add r4, r4, #1 + uxth r3, r4 + str r3, [sp] + ldr r3, [r8, #-1500] + ldr r0, [r3, #4] +.L3003: + ubfx r0, r0, #10, #16 + bl P2V_plane + ldrb r3, [fp, #8] @ zero_extendqisi2 + str r0, [sp, #4] + cmp r3, #1 + bne .L2874 + ldrb r2, [r8, #-2740] @ zero_extendqisi2 + cmp r2, #0 + ldreq r2, [sp] + ldreq r4, .L3011+8 + addeq r4, r4, r2, lsl #1 + ldrheq r2, [r4, #84] + streq r2, [sp] +.L2874: + ldr r2, .L3011 + ldr r1, [sp] + ldrh r2, [r2, #-2] + cmp r2, r1 + ldmib sp, {r0, r1} + ldrheq r2, [sp] + strheq r2, [fp, #2] @ movhi + moveq r2, #0 + strbeq r2, [fp, #6] + strheq r2, [fp, #4] @ movhi + ldrh r2, [sp, #12] + str r2, [sp, #28] + ldr ip, [sp, #28] + ldr r2, [sp] + cmp r2, r1 + cmpeq r0, ip + moveq r2, r0 + beq .L3010 + ldr r2, [sp, #16] + sub r10, r2, #1 + movw r2, #65535 + subs r9, r9, r2 + movne r9, #1 + cmp r3, #0 + orreq r9, r9, #1 + cmp r9, #0 + beq .L2878 + ldr r3, [r8, #1752] + uxth r9, r5 + uxth r5, r5 + ldr r6, .L3011+4 + cmn r3, #1 + streq r10, [r8, #1752] + ldr r3, [r8, #1752] + mvn r8, #0 + mov r7, r8 + str r3, [sp, #12] + ldr r3, [sp, #8] + add r3, r3, #7 + cmp r5, r3 + subgt r4, r9, #7 + ldrle r4, [sp, #8] + uxthgt r4, r4 +.L2881: + cmp r4, r9 + bhi .L2894 + ldr r3, .L3011+12 + mov ip, #36 + ldr r0, [r6, #-1500] + ldr r1, [sp, #20] + ldrh r3, [r3] + str r3, [sp, #16] + mov r3, #0 + mov r5, r3 + b .L2895 +.L2860: + mov r1, #0 + bl FtlGetLastWrittenPage + cmn r0, #1 + mov r4, r0 + beq .L2861 +.L2932: + mov r5, r4 + b .L2862 +.L2861: + mov r3, #0 + strh r3, [fp, #2] @ movhi +.L3009: + strb r3, [fp, #6] + b .L2997 +.L2865: + ldrh r3, [ip], #2 + movw r1, #65535 + cmp r3, r1 + beq .L2864 + mla r1, r9, r6, r0 + orr r3, r5, r3, lsl #10 + stmib r1, {r3, r10} + mul r3, r7, r6 + add r6, r6, #1 + uxth r6, r6 + add r8, r3, #3 + cmp r3, #0 + movlt r3, r8 + bic r3, r3, #3 + add r3, lr, r3 + str r3, [r1, #12] +.L2864: + add r2, r2, #1 + b .L2863 +.L2872: + mov r3, #36 + ldr r1, [r10, #-1500] + mul r3, r3, r7 + add r2, r1, r3 + ldr r3, [r1, r3] + cmp r3, #0 + bne .L2868 + ldr r2, [r2, #12] + ldr r3, [r2, #4] + cmn r3, #1 + beq .L2869 + ldr r1, [r10, #-1608] + mov r0, r3 + bl ftl_cmp_data_ver + cmp r0, #0 + addne r3, r3, #1 + strne r3, [r10, #-1608] +.L2869: + ldr r3, [r2] + cmn r3, #1 + bne .L2871 +.L2870: + uxth r3, r4 + uxth r7, r7 + str r3, [sp] + mov r2, #36 + ldr r3, [r8, #-1500] + mla r7, r2, r7, r3 + ldr r0, [r7, #4] + b .L3003 +.L2868: + ldr r1, [r2, #4] + uxth r9, r5 + ldr r0, .L3011+16 + bl rk_printk + ldrh r3, [fp] + ldr r2, .L3011+20 + strh r3, [r2] @ movhi +.L2871: + add r7, r7, #1 + b .L2867 +.L2883: + ldrh r2, [r1], #2 + movw lr, #65535 + add r3, r3, #1 + cmp r2, lr + mlane lr, ip, r5, r0 + addne r5, r5, #1 + orrne r2, r4, r2, lsl #10 + uxthne r5, r5 + strne r2, [lr, #4] +.L2895: + ldr lr, [sp, #16] + uxth r2, r3 + cmp r2, lr + bcc .L2883 + mov r1, r5 + ldr r2, [sp, #24] + bl FlashReadPages + ldr r3, [r6, #-1500] + mov r2, #36 + ldrb ip, [r6, #-2740] @ zero_extendqisi2 + movw r1, #65535 + mla r5, r2, r5, r3 + ldr r2, .L3011+24 + add r2, r2, r4, lsl #1 +.L2884: + cmp r5, r3 + addeq r4, r4, #1 + uxtheq r4, r4 + beq .L2881 +.L2893: + ldr r0, [r3] + cmp r0, #0 + bne .L2885 + ldr r0, [r3, #12] + ldrh lr, [r0] + cmp lr, r1 + beq .L2886 + ldr r0, [r0, #4] + cmn r0, #1 + beq .L2886 + cmn r8, #1 + ldr r7, [r6, #1752] + str r0, [r6, #1752] + bne .L2886 + ldrh r0, [r2] + cmp r0, r1 + bne .L2887 + cmp ip, #0 + beq .L2886 +.L2887: + cmp r10, r7 + movne r8, r7 +.L2886: + add r3, r3, #36 + b .L2884 +.L2885: + ldrh r1, [fp] + movw r2, #1794 + ldr r3, .L3011+4 + strh r1, [r3, r2] @ movhi + ldrb r2, [fp, #8] @ zero_extendqisi2 + cmp r2, #0 + bne .L2878 + ldr r2, .L3011+24 + lsl r4, r4, #1 + ldrh r1, [r2, r4] + movw r2, #65535 + cmp r1, r2 + bne .L2889 + cmn r8, #1 + strne r8, [r3, #1752] + bne .L2878 + ldr r2, [sp, #12] + cmp r10, r2 + beq .L2891 +.L3005: + str r2, [r3, #1752] + b .L2878 +.L2891: + ldr r2, [r3, #1752] +.L3004: + sub r2, r2, #1 + b .L3005 +.L2889: + cmp r7, r10 + beq .L2892 + cmn r7, #1 + strne r7, [r3, #1752] +.L2878: + ldr r9, [sp, #8] + mov r2, #1 + ldr r4, .L3011+4 + movw r3, #1796 + strh r2, [r4, r3] @ movhi +.L2896: + ldr r3, .L3011+28 + movw r6, #65535 + ldr r0, [r4, #-1500] + mov r7, #36 + ldrb r5, [r4, #-2740] @ zero_extendqisi2 + mov r2, #0 + ldrh lr, [r3, #-4] + ldr r1, [sp, #20] + str r2, [sp, #12] +.L2897: + uxth r3, r2 + cmp lr, r3 + bhi .L2900 + ldr r2, [sp, #24] + ldr r1, [sp, #12] + bl FlashReadPages + mov r3, #0 +.L3008: + str r3, [sp, #16] + ldr r2, [sp, #12] + ldrh r3, [sp, #16] + cmp r2, r3 + bhi .L2926 + ldrb r3, [fp, #8] @ zero_extendqisi2 + add r9, r9, #1 + uxth r9, r9 + cmp r3, #1 + ldr r3, .L3011 + bne .L2927 + ldrb r2, [r4, #-2740] @ zero_extendqisi2 + cmp r2, #0 + beq .L2927 + ldrh r2, [r3] + ldr r1, [sp] + cmp r2, r9 + cmpeq r1, r9 + beq .L2903 +.L2927: + ldrh r3, [r3, #-2] + cmp r3, r9 + bne .L2896 + ldr r2, .L3011+28 + movw r0, #65535 + mov r3, #0 + strh r9, [fp, #2] @ movhi + strh r3, [fp, #4] @ movhi + ldrh r2, [r2, #-4] +.L2928: + uxth r1, r3 + cmp r1, r2 + bcs .L2997 + ldr r1, [sp, #20] + ldrh ip, [r1], #2 + cmp ip, r0 + str r1, [sp, #20] + add r1, r3, #1 + bne .L3009 + mov r3, r1 + b .L2928 +.L2892: + ldr r2, [r3, #1752] + cmp r10, r2 + bne .L3004 + b .L2878 +.L2894: + mvn r3, #0 + str r3, [r6, #1752] + b .L2878 +.L2900: + ldrh r3, [r1], #2 + cmp r3, r6 + beq .L2898 + ldr ip, [sp, #12] + orr r3, r9, r3, lsl #10 + mla ip, r7, ip, r0 + str r3, [ip, #4] + ldrb r8, [fp, #8] @ zero_extendqisi2 + cmp r8, #1 + bne .L2899 + cmp r5, #0 + orrne r3, r3, #-2147483648 + strne r3, [ip, #4] +.L2899: + ldr r3, [sp, #12] + add r3, r3, #1 + uxth r3, r3 + str r3, [sp, #12] +.L2898: + add r2, r2, #1 + b .L2897 +.L2926: + ldr r3, [sp, #16] + mov r6, #36 + ldr r8, [r4, #-1500] + mul r6, r6, r3 + add r7, r8, r6 + ldr r5, [r7, #4] + ubfx r0, r5, #10, #16 + str r5, [sp, #44] + bl P2V_plane + ldr r3, [sp, #8] + cmp r9, r3 + bcc .L2902 + ldr r2, [sp, #28] + moveq r3, #1 + movne r3, #0 + cmp r2, r0 + movls r3, #0 + andhi r3, r3, #1 + cmp r3, #0 + bne .L2902 + ldr r3, [sp] + ldr r2, [sp, #4] + cmp r9, r3 + cmpeq r2, r0 + beq .L2903 + ldr r3, [r8, r6] + cmn r3, #1 + beq .L2904 + ldr r3, [r7, #12] + movw r2, #61589 + ldrh r1, [r3] + cmp r1, r2 + ldrhne r0, [fp] + bne .L3006 + ldr r10, [r3, #4] + cmn r10, #1 + beq .L2906 + ldr r1, [r4, #-1608] + mov r0, r10 + bl ftl_cmp_data_ver + cmp r0, #0 + addne r2, r10, #1 + strne r2, [r4, #-1608] +.L2906: + ldr r5, [r3, #8] + add r1, sp, #40 + ldr r3, [r3, #12] + mov r2, #0 + mov r0, r5 + str r3, [sp, #36] + bl log2phys + ldr r1, [r4, #1752] + cmn r1, #1 + beq .L2907 + mov r0, r10 + bl ftl_cmp_data_ver + cmp r0, #0 + beq .L2907 + ldr r3, [sp, #36] + cmn r3, #1 + beq .L2908 + ldr r0, [r4, #-1500] + mov r2, #0 + mov r1, #1 + add r0, r0, r6 + str r3, [r0, #4] + ldr r7, [r0, #12] + bl FlashReadPages + ldr r2, [r4, #-1500] + ldr r1, [r2, r6] + add r3, r2, r6 + cmn r1, #1 + bne .L2909 +.L2910: + mvn r3, #0 + str r3, [sp, #36] +.L2917: + ldr r8, [sp, #36] + cmn r8, #1 + beq .L2902 +.L2931: + ubfx r0, r8, #10, #16 + bl P2V_block_in_plane + ldr r2, [r4, #-1404] + lsl r3, r0, #1 + mov r1, r0 + ldrh r3, [r2, r3] + cmp r3, #0 + beq .L2923 +.L3006: + bl decrement_vpc_count + b .L2902 +.L2908: + ldr r3, [sp, #44] + ldr r2, [sp, #40] + cmp r2, r3 + bne .L2902 + mov r2, #1 + add r1, sp, #36 + mov r0, r5 + bl log2phys +.L2902: + ldr r3, [sp, #16] + add r3, r3, #1 + b .L3008 +.L2909: + ldr r1, [r7, #8] + cmp r5, r1 + bne .L2910 + ldr r8, [r7, #4] + ldr r0, [r4, #1752] + mov r1, r8 + bl ftl_cmp_data_ver + cmp r0, #0 + beq .L2910 + ldr r1, [sp, #40] + ldr r0, [sp, #44] + cmp r1, r0 + bne .L2912 +.L2915: + ldr r1, [sp, #36] + mov r0, r5 + bl FtlReUsePrevPpa + b .L2910 +.L2912: + ldr r0, [sp, #36] + cmp r1, r0 + beq .L2910 + cmn r1, #1 + streq r1, [r2, r6] + beq .L2914 + str r1, [r3, #4] + mov r2, #0 + mov r1, #1 + mov r0, r3 + ldr r7, [r3, #12] + bl FlashReadPages +.L2914: + ldr r3, [r4, #-1500] + ldr r3, [r3, r6] + cmn r3, #1 + beq .L2915 + ldr r3, [r7, #4] + ldr r0, [r4, #1752] + mov r1, r3 + bl ftl_cmp_data_ver + cmp r0, #0 + beq .L2915 + mov r1, r3 + mov r0, r8 + bl ftl_cmp_data_ver + cmp r0, #0 + beq .L2910 + b .L2915 +.L2907: + ldr r3, [sp, #44] + ldr r2, [sp, #40] + cmp r2, r3 + beq .L2917 + ldr r3, [sp, #36] + cmn r3, #1 + beq .L2919 + ldr r2, [r4, #-1716] + ubfx r3, r3, #10, #21 + cmp r3, r2 + bcs .L2902 +.L2919: + mov r2, #1 + add r1, sp, #44 + mov r0, r5 + bl log2phys + ldr r8, [sp, #40] + cmn r8, #1 + beq .L2917 + ldr r3, [sp, #36] + cmp r8, r3 + beq .L2931 + ldr r6, .L3011+32 + ubfx r0, r8, #10, #16 + bl P2V_block_in_plane + ldrh r3, [r6] + sub r6, r6, #884 + cmp r3, r0 + beq .L2922 + add r3, r6, #932 + ldrh r3, [r3] + cmp r3, r0 + beq .L2922 + add r3, r6, #980 + ldrh r3, [r3] + cmp r3, r0 + bne .L2917 +.L2922: + ldr r0, [r6, #-1500] + mov r2, #0 + mov r1, #1 + str r8, [r0, #4] + ldr r7, [r0, #12] + bl FlashReadPages + ldr r3, [r6, #-1500] + ldr r3, [r3] + cmn r3, #1 + beq .L2917 + ldr r1, [r7, #4] + mov r0, r10 + bl ftl_cmp_data_ver + cmp r0, #0 + bne .L2917 + mov r2, #1 + add r1, sp, #40 + mov r0, r5 + bl log2phys + b .L2917 +.L2923: + ldr r0, .L3011+36 + bl rk_printk + b .L2902 +.L2904: + ldrh r3, [fp] + mov r1, r5 + ldr r2, .L3011+20 + ldr r0, .L3011+40 + strh r3, [r2] @ movhi + mov r2, r10 + bl rk_printk + ldr r3, [r4, #1800] + cmp r3, #31 + ldrls r1, [sp, #44] + addls r2, r4, r3, lsl #2 + addls r3, r3, #1 + strls r3, [r4, #1800] + strls r1, [r2, #1804] + ldrh r0, [fp] + bl decrement_vpc_count + ldr r3, [r4, #1752] + cmn r3, #1 + bne .L2925 +.L3007: + str r10, [r4, #1752] + b .L2902 +.L2925: + cmp r10, r3 + bcs .L2902 + b .L3007 +.L2903: + ldrb r3, [sp, #4] @ zero_extendqisi2 + ldr r2, [sp, #4] + strb r3, [fp, #6] + ldrh r3, [sp] + strh r3, [fp, #2] @ movhi +.L3010: + ldr r1, [sp] + mov r0, fp + bl ftl_sb_update_avl_pages + b .L2997 +.L2999: + mov r0, #0 + bx lr +.L3012: + .align 2 +.L3011: + .word .LANCHOR2-1664 + .word .LANCHOR2 + .word .LANCHOR0 + .word .LANCHOR2-1732 + .word .LC154 + .word .LANCHOR2+1794 + .word .LANCHOR0+1108 + .word .LANCHOR2-1728 + .word .LANCHOR2+884 + .word .LC155 + .word .LC156 + .fnend + .size FtlRecoverySuperblock, .-FtlRecoverySuperblock + .align 2 + .global FtlSlcSuperblockCheck + .syntax unified + .arm + .fpu softvfp + .type FtlSlcSuperblockCheck, %function +FtlSlcSuperblockCheck: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldrh r3, [r0, #4] + cmp r3, #0 + bxeq lr + ldrh r2, [r0] + movw r3, #65535 + cmp r2, r3 + bxeq lr + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + mov r4, r0 + ldrb r3, [r0, #6] @ zero_extendqisi2 + ldr r5, .L3028 + ldr r6, .L3028+4 + add r3, r0, r3, lsl #1 + ldrh r3, [r3, #16] +.L3017: + movw r1, #65535 + cmp r3, r1 + beq .L3019 + ldrb r2, [r4, #8] @ zero_extendqisi2 + cmp r2, #1 + bne .L3020 + ldrb r3, [r5, #-2740] @ zero_extendqisi2 + cmp r3, #0 + bne .L3020 + ldrh r3, [r4, #2] + lsl r3, r3, #1 + ldrh r3, [r6, r3] + cmp r3, r1 + bne .L3020 + ldrh r3, [r4, #4] + ldrh r0, [r4] + sub r3, r3, #1 + strh r3, [r4, #4] @ movhi + bl decrement_vpc_count + ldrh r2, [r4, #4] + cmp r2, #0 + bne .L3019 + ldrh r3, [r4, #2] + strb r2, [r4, #6] + add r3, r3, #1 + strh r3, [r4, #2] @ movhi + pop {r4, r5, r6, pc} +.L3019: + ldrb r3, [r4, #6] @ zero_extendqisi2 + ldr r2, .L3028+8 + add r3, r3, #1 + ldrh r2, [r2] + uxtb r3, r3 + strb r3, [r4, #6] + cmp r2, r3 + ldrheq r3, [r4, #2] + addeq r3, r3, #1 + strheq r3, [r4, #2] @ movhi + moveq r3, #0 + strbeq r3, [r4, #6] + ldrb r3, [r4, #6] @ zero_extendqisi2 + add r3, r4, r3, lsl #1 + ldrh r3, [r3, #16] + b .L3017 +.L3020: + ldrb r3, [r5, #-2740] @ zero_extendqisi2 + adds r3, r3, #0 + movne r3, #1 + cmp r2, #1 + movne r3, #0 + cmp r3, #0 + popeq {r4, r5, r6, pc} + ldr r1, .L3028+12 + ldrh r2, [r4, #2] + ldrh r3, [r1] + cmp r2, r3 + popcc {r4, r5, r6, pc} + ldrh r3, [r4] + ldr r0, [r5, #-1404] + ldrh ip, [r4, #4] + lsl r3, r3, #1 + ldrh r2, [r0, r3] + sub r2, r2, ip + strh r2, [r0, r3] @ movhi + mov r3, #0 + ldrh r2, [r1, #-2] + strh r3, [r4, #4] @ movhi + strb r3, [r4, #6] + strh r2, [r4, #2] @ movhi + pop {r4, r5, r6, pc} +.L3029: + .align 2 +.L3028: + .word .LANCHOR2 + .word .LANCHOR0+1108 + .word .LANCHOR2-1732 + .word .LANCHOR2-1664 + .fnend + .size FtlSlcSuperblockCheck, .-FtlSlcSuperblockCheck + .align 2 + .global get_new_active_ppa + .syntax unified + .arm + .fpu softvfp + .type get_new_active_ppa, %function +get_new_active_ppa: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + mov r3, #0 + push {r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + strb r3, [r0, #10] + mov r4, r0 + ldrb r3, [r0, #6] @ zero_extendqisi2 + ldr r6, .L3046 + ldr r8, .L3046+4 + add r3, r0, r3, lsl #1 + add r7, r6, #1728 + ldrh r2, [r3, #16] +.L3031: + movw r1, #65535 + cmp r2, r1 + beq .L3032 + ldrb r3, [r4, #8] @ zero_extendqisi2 + ldrh r5, [r4, #2] + cmp r3, #1 + ldrh r3, [r4, #4] + bne .L3034 + ldrb r0, [r7, #-2740] @ zero_extendqisi2 + cmp r0, #0 + bne .L3034 + lsl r0, r5, #1 + ldrh r0, [r8, r0] + cmp r0, r1 + bne .L3034 + sub r3, r3, #1 + ldrh r0, [r4] + strh r3, [r4, #4] @ movhi + bl decrement_vpc_count +.L3032: + ldrb r3, [r4, #6] @ zero_extendqisi2 + ldrh r2, [r6, #-4] + add r3, r3, #1 + uxtb r3, r3 + cmp r2, r3 + strb r3, [r4, #6] + ldrheq r3, [r4, #2] + addeq r3, r3, #1 + strheq r3, [r4, #2] @ movhi + moveq r3, #0 + strbeq r3, [r4, #6] + ldrb r3, [r4, #6] @ zero_extendqisi2 + add r3, r4, r3, lsl #1 + ldrh r2, [r3, #16] + b .L3031 +.L3034: + ldr r7, .L3046+8 + orr r5, r5, r2, lsl #10 + ldr r8, .L3046+4 + sub r3, r3, #1 + strh r3, [r4, #4] @ movhi +.L3035: + ldrb r3, [r4, #6] @ zero_extendqisi2 + movw r2, #65535 + ldrh r0, [r6, #-4] +.L3037: + add r3, r3, #1 + uxtb r3, r3 + cmp r3, r0 + ldrheq r3, [r4, #2] + addeq r3, r3, #1 + strheq r3, [r4, #2] @ movhi + moveq r3, #0 + add r1, r4, r3, lsl #1 + ldrh r1, [r1, #16] + cmp r1, r2 + beq .L3037 + strb r3, [r4, #6] + ldrb r3, [r4, #8] @ zero_extendqisi2 + cmp r3, #1 + bne .L3030 + ldrb r3, [r7, #-2740] @ zero_extendqisi2 + cmp r3, #0 + ldrh r3, [r4, #2] + bne .L3039 + lsl r3, r3, #1 + ldrh r3, [r8, r3] + cmp r3, r2 + bne .L3030 + ldrh r3, [r4, #4] + cmp r3, #0 + beq .L3030 + sub r3, r3, #1 + ldrh r0, [r4] + strh r3, [r4, #4] @ movhi + bl decrement_vpc_count + b .L3035 +.L3039: + ldr r1, .L3046+12 + ldrh r2, [r1] + cmp r3, r2 + bcc .L3030 + ldrh r3, [r4] + ldr r0, [r7, #-1404] + ldrh ip, [r4, #4] + lsl r3, r3, #1 + ldrh r2, [r0, r3] + sub r2, r2, ip + strh r2, [r0, r3] @ movhi + mov r3, #0 + ldrh r2, [r1, #-2] + strh r3, [r4, #4] @ movhi + strb r3, [r4, #6] + strh r2, [r4, #2] @ movhi +.L3030: + mov r0, r5 + pop {r4, r5, r6, r7, r8, pc} +.L3047: + .align 2 +.L3046: + .word .LANCHOR2-1728 + .word .LANCHOR0+1108 + .word .LANCHOR2 + .word .LANCHOR2-1664 + .fnend + .size get_new_active_ppa, .-get_new_active_ppa + .align 2 + .global FtlWriteDumpData + .syntax unified + .arm + .fpu softvfp + .type FtlWriteDumpData, %function +FtlWriteDumpData: + .fnstart + @ args = 0, pretend = 0, frame = 40 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #44 + sub sp, sp, #44 + ldr r4, .L3067 + ldr r3, [r4, #-1280] + cmp r3, #0 + bne .L3048 + add r6, r4, #884 + ldrh r2, [r6, #4] + cmp r2, #0 + beq .L3050 + ldrb r3, [r4, #892] @ zero_extendqisi2 + cmp r3, #0 + bne .L3050 + sub r3, r4, #1664 + ldrb r1, [r4, #891] @ zero_extendqisi2 + ldrh r3, [r3, #-2] + mul r3, r3, r1 + cmp r2, r3 + beq .L3050 + ldrb r8, [r4, #894] @ zero_extendqisi2 + cmp r8, #0 + bne .L3048 + ldr r7, [r4, #-1284] + sub r3, r4, #1728 + mov r2, r8 + mov r1, sp + ldrh r9, [r3, #-4] + sub r7, r7, #1 + mov r0, r7 + bl log2phys + ldr r3, [sp] + ldr r5, [r4, #-1440] + ldr r0, [r4, #-1472] + cmn r3, #1 + str r3, [sp, #8] + str r7, [sp, #20] + str r0, [sp, #12] + str r5, [sp, #16] + str r8, [r5, #4] + beq .L3052 + mov r2, r8 + mov r1, #1 + add r0, sp, #4 + bl FlashReadPages +.L3053: + ldr r10, .L3067+4 + mov r8, #0 + ldr r3, .L3067+8 + lsl r9, r9, #2 + mov fp, r8 + strh r3, [r5] @ movhi +.L3054: + cmp r9, r8 + bne .L3058 +.L3055: + mov r3, #1 +.L3066: + strb r3, [r4, #894] +.L3048: + add sp, sp, #44 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L3052: + sub r3, r4, #1648 + mov r1, #255 + ldrh r2, [r3, #-8] + bl ftl_memset + b .L3053 +.L3058: + ldrh r3, [r6, #4] + cmp r3, #0 + beq .L3055 + ldr r3, [sp, #8] + mov r0, r10 + str r7, [r5, #8] + add r8, r8, #1 + str r3, [r5, #12] + ldrh r3, [r6] + strh r3, [r5, #2] @ movhi + bl get_new_active_ppa + ldr r3, [r4, #-1608] + mov r1, #1 + str r0, [sp, #8] + add r0, sp, #4 + str r3, [r5, #4] + add r3, r3, #1 + cmn r3, #1 + moveq r3, fp + str r3, [r4, #-1608] + mov r3, #0 + mov r2, r3 + bl FlashProgPages + ldrh r0, [r6] + bl decrement_vpc_count + b .L3054 +.L3050: + mov r3, #0 + b .L3066 +.L3068: + .align 2 +.L3067: + .word .LANCHOR2 + .word .LANCHOR2+884 + .word -3947 + .fnend + .size FtlWriteDumpData, .-FtlWriteDumpData + .align 2 + .global l2p_flush + .syntax unified + .arm + .fpu softvfp + .type l2p_flush, %function +l2p_flush: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + mov r4, #0 + ldr r5, .L3074 + mov r7, #12 + bl FtlWriteDumpData + sub r6, r5, #1616 +.L3070: + ldrh r3, [r6, #-10] + uxth r0, r4 + cmp r3, r0 + bhi .L3072 + mov r0, #0 + pop {r4, r5, r6, r7, r8, pc} +.L3072: + ldr r2, [r5, #-1364] + uxth r3, r4 + mla r3, r7, r3, r2 + ldr r3, [r3, #4] + cmp r3, #0 + bge .L3071 + bl flush_l2p_region +.L3071: + add r4, r4, #1 + b .L3070 +.L3075: + .align 2 +.L3074: + .word .LANCHOR2 + .fnend + .size l2p_flush, .-l2p_flush + .align 2 + .global FtlSuperblockPowerLostFix + .syntax unified + .arm + .fpu softvfp + .type FtlSuperblockPowerLostFix, %function +FtlSuperblockPowerLostFix: + .fnstart + @ args = 0, pretend = 0, frame = 40 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, lr} + .save {r4, r5, r6, r7, r8, r9, lr} + .pad #44 + sub sp, sp, #44 + ldr r5, .L3092 + ldr r9, [r5, #-1280] + cmp r9, #0 + bne .L3076 + ldrb r3, [r5, #-2740] @ zero_extendqisi2 + cmp r3, #0 + beq .L3087 + ldrb r3, [r0, #8] @ zero_extendqisi2 + cmp r3, #1 + ldrheq r7, [r0, #4] + moveq r9, r3 + beq .L3078 +.L3087: + mov r7, #12 +.L3078: + mvn r3, #0 + ldr r6, [r5, #-1440] + str r3, [sp, #20] + mov r8, #0 + ldr r3, [r5, #-1472] + movw r2, #61589 + str r6, [sp, #16] + mov r4, r0 + str r3, [sp, #12] + mvn r3, #2 + str r3, [r6, #8] + mvn r3, #1 + str r3, [r6, #12] + ldrh r3, [r0] + strh r8, [r6] @ movhi + strh r3, [r6, #2] @ movhi + ldr r3, [r5, #-1472] + str r2, [r3] + ldr r2, .L3092+4 + ldr r3, [r5, #-1472] + str r2, [r3, #4] +.L3079: + subs r7, r7, #1 + bcc .L3082 + ldrh r3, [r4, #4] + cmp r3, #0 + bne .L3080 +.L3082: + ldrh r3, [r4] + ldr r1, [r5, #-1404] + ldrh r0, [r4, #4] + lsl r3, r3, #1 + ldrh r2, [r1, r3] + sub r2, r2, r0 + strh r2, [r1, r3] @ movhi + ldr r3, .L3092+8 + ldrh r3, [r3, #-2] + strh r3, [r4, #2] @ movhi + mov r3, #0 + strb r3, [r4, #6] + strh r3, [r4, #4] @ movhi +.L3076: + add sp, sp, #44 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, pc} +.L3080: + mov r0, r4 + bl get_new_active_ppa + cmn r0, #1 + str r0, [sp, #8] + beq .L3082 + ldr r3, [r5, #-1608] + mov r2, r9 + mov r1, #1 + add r0, sp, #4 + str r3, [r6, #4] + add r3, r3, #1 + cmn r3, #1 + moveq r3, r8 + str r3, [r5, #-1608] + mov r3, #0 + bl FlashProgPages + ldrh r0, [r4] + bl decrement_vpc_count + b .L3079 +.L3093: + .align 2 +.L3092: + .word .LANCHOR2 + .word 305419896 + .word .LANCHOR2-1664 + .fnend + .size FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix + .align 2 + .global FtlVpcCheckAndModify + .syntax unified + .arm + .fpu softvfp + .type FtlVpcCheckAndModify, %function +FtlVpcCheckAndModify: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #12 + mov r5, #0 + ldr r4, .L3109 + ldr r1, .L3109+4 + ldr r0, .L3109+8 + sub r7, r4, #1712 + bl rk_printk + ldrh r2, [r7, #-10] + mov r1, #0 + ldr r0, [r4, #-1408] + lsl r2, r2, #1 + bl ftl_memset +.L3095: + ldr r3, [r4, #-1284] + cmp r5, r3 + bcc .L3097 + ldr r9, .L3109+12 + mov r8, #0 + add r10, r9, #96 + add fp, r9, #48 +.L3098: + ldrh r3, [r7, #-12] + uxth r6, r8 + cmp r3, r6 + bhi .L3101 + bl l2p_flush + bl FtlVpcTblFlush + add sp, sp, #12 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L3097: + mov r2, #0 + add r1, sp, #4 + mov r0, r5 + bl log2phys + ldr r0, [sp, #4] + cmn r0, #1 + beq .L3096 + ubfx r0, r0, #10, #16 + bl P2V_block_in_plane + ldr r2, [r4, #-1408] + lsl r0, r0, #1 + ldrh r3, [r2, r0] + add r3, r3, #1 + strh r3, [r2, r0] @ movhi +.L3096: + add r5, r5, #1 + b .L3095 +.L3101: + uxth r1, r8 + ldr r3, [r4, #-1404] + movw r0, #65535 + lsl r5, r1, #1 + ldrh r2, [r3, r5] + ldr r3, [r4, #-1408] + ldrh r3, [r3, r5] + cmp r2, r0 + cmpne r2, r3 + beq .L3099 + ldrh r0, [r9] + cmp r0, r6 + beq .L3099 + ldrh r0, [r10] + cmp r0, r6 + beq .L3099 + ldrh r0, [fp] + cmp r0, r6 + beq .L3099 + ldr r0, .L3109+16 + bl rk_printk + ldr r3, [r4, #-1404] + ldrh r2, [r3, r5] + cmp r2, #0 + ldr r2, [r4, #-1408] + ldrh r2, [r2, r5] + strh r2, [r3, r5] @ movhi + bne .L3100 +.L3099: + add r8, r8, #1 + b .L3098 +.L3100: + mov r0, r6 + bl update_vpc_list + b .L3099 +.L3110: + .align 2 +.L3109: + .word .LANCHOR2 + .word .LANCHOR3+203 + .word .LC50 + .word .LANCHOR2+884 + .word .LC157 + .fnend + .size FtlVpcCheckAndModify, .-FtlVpcCheckAndModify + .align 2 + .global allocate_new_data_superblock + .syntax unified + .arm + .fpu softvfp + .type allocate_new_data_superblock, %function +allocate_new_data_superblock: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + ldr r4, .L3138 + ldr r3, [r4, #-1280] + cmp r3, #0 + bne .L3112 + ldrh r6, [r0] + movw r3, #65535 + mov r5, r0 + cmp r6, r3 + beq .L3113 + ldr r2, [r4, #-1404] + lsl r3, r6, #1 + mov r0, r6 + ldrh r3, [r2, r3] + cmp r3, #0 + beq .L3114 + bl INSERT_DATA_LIST +.L3113: + mov r3, #0 + strb r3, [r5, #8] + ldr r3, .L3138+4 + cmp r5, r3 + beq .L3115 + ldr r2, .L3138+8 + ldrh r2, [r2] + cmp r2, #1 + beq .L3115 + ldrb r1, [r4, #-2740] @ zero_extendqisi2 + cmp r1, #0 + beq .L3116 +.L3115: + mov r3, #1 + strb r3, [r5, #8] +.L3117: + movw r3, #1740 + ldrh r0, [r4, r3] + movw r3, #65535 + cmp r0, r3 + beq .L3122 + cmp r6, r0 + bne .L3123 + ldr r2, [r4, #-1404] + lsl r3, r0, #1 + ldrh r3, [r2, r3] + cmp r3, #0 + beq .L3124 +.L3123: + bl update_vpc_list +.L3124: + mvn r2, #0 + movw r3, #1740 + strh r2, [r4, r3] @ movhi +.L3122: + mov r0, r5 + bl allocate_data_superblock + bl l2p_flush + mov r0, #0 + bl FtlEctTblFlush + bl FtlVpcTblFlush +.L3112: + mov r0, #0 + pop {r4, r5, r6, pc} +.L3114: + bl INSERT_FREE_LIST + b .L3113 +.L3116: + sub r3, r3, #48 + cmp r5, r3 + bne .L3117 + cmp r2, #3 + beq .L3119 + ldr r3, [r4, #-1616] + cmp r3, #1 + bne .L3120 +.L3119: + mov r3, #1 + strb r3, [r4, #892] +.L3120: + ldr r3, [r4, #-1868] + cmp r3, #0 + beq .L3117 + ldr r3, [r4, #-1564] + cmp r3, #39 + movls r3, #1 + strbls r3, [r4, #892] + b .L3117 +.L3139: + .align 2 +.L3138: + .word .LANCHOR2 + .word .LANCHOR2+932 + .word .LANCHOR2-1712 + .fnend + .size allocate_new_data_superblock, .-allocate_new_data_superblock + .align 2 + .global FtlReadRefresh + .syntax unified + .arm + .fpu softvfp + .type FtlReadRefresh, %function +FtlReadRefresh: + .fnstart + @ args = 0, pretend = 0, frame = 40 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + .pad #40 + sub sp, sp, #40 + ldr r5, .L3157 + ldr r9, [r5, #1284] + mov r6, r5 + cmp r9, #0 + beq .L3141 + ldr r2, [r5, #1288] + ldr r3, [r5, #-1284] + cmp r2, r3 + bcs .L3142 + mov r4, #2048 +.L3147: + ldr r0, [r6, #1288] + ldr r3, [r6, #-1284] + cmp r0, r3 + bcc .L3143 +.L3146: + mvn r0, #0 +.L3140: + add sp, sp, #40 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L3143: + mov r2, #0 + mov r1, sp + bl log2phys + ldr r2, [sp] + ldr r3, [r6, #1288] + cmn r2, #1 + add r3, r3, #1 + str r3, [r6, #1288] + beq .L3145 + str r2, [sp, #8] + add r0, sp, #40 + mov r2, #0 + mov r1, #1 + str r2, [r0, #-36]! + str r3, [sp, #20] + str r2, [sp, #12] + str r2, [sp, #16] + bl FlashReadPages + ldr r3, [sp, #4] + cmp r3, #256 + bne .L3146 + ldr r0, [sp] + ubfx r0, r0, #10, #16 + bl P2V_block_in_plane + bl FtlGcRefreshBlock + b .L3146 +.L3145: + subs r4, r4, #1 + bne .L3147 + b .L3146 +.L3142: + ldr r3, [r5, #-1584] + mov r0, #0 + str r0, [r5, #1284] + str r0, [r5, #1288] + str r3, [r5, #1280] + b .L3140 +.L3141: + ldr r1, [r5, #-1568] + movw r4, #10000 + ldr r8, [r5, #-1584] + add r10, r5, #816 + ldr r7, [r5, #1280] + cmp r1, r4 + add r3, r8, #1048576 + movhi r4, #31 + movls r4, #63 + cmp r7, r3 + bhi .L3151 + ldr r3, [r5, #-1284] + lsr r1, r1, #10 + mov r0, #1000 + add r1, r1, #1 + mul r0, r0, r3 + bl __aeabi_uidiv + add r0, r0, r7 + cmp r8, r0 + bhi .L3151 + ldrh r3, [r10, #28] + ands r0, r4, r3 + movne r0, r9 + bne .L3140 + ldr r2, [r5, #1304] + cmp r3, r2 + beq .L3140 +.L3151: + ldrh r3, [r10, #28] + mov r0, #0 + str r0, [r6, #1288] + str r8, [r6, #1280] + str r3, [r6, #1304] + mov r3, #1 + str r3, [r6, #1284] + b .L3140 +.L3158: + .align 2 +.L3157: + .word .LANCHOR2 + .fnend + .size FtlReadRefresh, .-FtlReadRefresh + .align 2 + .global ftl_do_gc + .syntax unified + .arm + .fpu softvfp + .type ftl_do_gc, %function +ftl_do_gc: + .fnstart + @ args = 0, pretend = 0, frame = 32 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L3323 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov lr, r0 + .pad #44 + sub sp, sp, #44 + ldr r0, [r3, #-1280] + cmp r0, #0 + bne .L3255 + ldr ip, .L3323+4 + ldr r4, [ip, #3440] + cmp r4, #1 + bne .L3159 + ldr r2, [r3, #-1560] + cmp r2, #0 + bne .L3159 + add r0, r3, #872 + ldrh r0, [r0] + cmp r0, #47 + bls .L3255 + movw r2, #3444 + mov r8, r1 + ldrh r1, [ip, r2] + movw r2, #65535 + mov r5, r3 + str lr, [sp, #24] + cmp r1, r2 + bne .L3161 +.L3164: + ldr r6, .L3323+8 + movw r1, #65535 + ldrh ip, [r6, #-14] + cmp ip, r1 + bne .L3162 +.L3163: + ldr r3, [r5, #-1544] + ldr r2, [sp, #24] + add r3, r3, #1 + cmp r2, #1 + add r3, r3, r2, lsl #7 + str r3, [r5, #-1544] + bne .L3165 + ldr r2, [r5, #-1868] + cmp r2, #0 + bne .L3166 + ldrb r2, [r5, #-2740] @ zero_extendqisi2 + cmp r2, #0 + beq .L3165 +.L3166: + ldr r2, [r5, #-1564] + cmp r2, #39 + bhi .L3165 + movw r2, #1932 + movw r4, #65535 + ldrh r2, [r5, r2] + add r3, r2, r3 + str r3, [r5, #-1544] + bl FtlGcReFreshBadBlk + movw r3, #1156 + ldrh r2, [r5, r3] + cmp r2, r4 + bne .L3167 + ldr r3, .L3323+12 + ldrh r1, [r3] + cmp r1, r2 + bne .L3254 + ldr r2, [r5, #-1544] + add r3, r3, #2416 + cmp r2, #1024 + bhi .L3169 + ldrh r2, [r3] + cmp r2, #63 + bhi .L3254 +.L3169: + ldrh r0, [r3] + movw r2, #1932 + ldrh r3, [r6, #-6] + mov r1, #0 + strh r1, [r5, r2] @ movhi + add r3, r3, #64 + cmp r0, r3 + bgt .L3254 + ldr r3, [r5, #-1564] + str r1, [r5, #-1544] + cmp r3, r1 + moveq r3, #6 + beq .L3315 + cmp r3, #5 + bhi .L3171 + mov r3, #18 +.L3315: + strh r3, [r5, r2] @ movhi +.L3171: + mov r0, #32 + movw r10, #65535 + bl List_get_gc_head_node + uxth r3, r0 + cmp r3, r10 + beq .L3175 + ldrh r0, [r6, #-4] + cmp r0, #0 + beq .L3173 + ldr r2, .L3323+16 + lsl r7, r3, #1 + ldr r1, [r5, #-1404] + ldrh lr, [r2], #-64 + ldrh ip, [r1, r7] + str r1, [sp, #12] + ldrh r3, [r2, #-4] + mul r3, r3, lr + add r3, r3, #1 + cmp ip, r3 + bgt .L3175 + add fp, r0, #1 + mov r9, #0 + uxth fp, fp + str r9, [r5, #-1556] + strh fp, [r6, #-4] @ movhi + bl List_get_gc_head_node + uxth r4, r0 + ldr r1, [sp, #12] + cmp r4, r10 + beq .L3175 + lsl r10, r4, #1 + mov r2, r4 + ldr r0, .L3323+20 + ldrh r3, [r1, r10] + ldrh r1, [r1, r7] + str r1, [sp] + mov r1, fp + bl rk_printk + ldrh r3, [r6, #-4] + cmp r3, #40 + bls .L3174 + ldr r3, [r5, #-1404] + ldrh r3, [r3, r10] + cmp r3, #32 + strhhi r9, [r6, #-4] @ movhi +.L3174: + mov r2, #6 + movw r3, #1932 + strh r2, [r5, r3] @ movhi +.L3167: + movw r0, #65535 + ldr r3, [sp, #24] + sub r2, r4, r0 + clz r2, r2 + lsr r2, r2, #5 + cmp r3, #0 + movne r1, #0 + andeq r1, r2, #1 + cmp r1, #0 + beq .L3189 + ldr r3, .L3323+24 + ldrh r2, [r3] + cmp r2, #24 + movhi r9, #1 + bhi .L3190 + cmp r2, #16 + sub r3, r3, #2544 + ldrhhi r3, [r3, #-2] + lsrhi r9, r3, #5 + bhi .L3190 + cmp r2, #12 + ldrhhi r3, [r3, #-2] + lsrhi r9, r3, #4 + bhi .L3190 + cmp r2, #8 + ldrhhi r3, [r3, #-2] + ldrhls r9, [r3, #-2] + lsrhi r9, r3, #2 +.L3190: + ldrh r3, [r6, #-8] + cmp r3, r2 + bcs .L3194 + ldr r3, .L3323+28 + movw r2, #65535 + ldrh r3, [r3] + cmp r3, r2 + bne .L3195 + ldr r2, .L3323+12 + ldrh r2, [r2] + cmp r2, r3 + bne .L3195 + movw r3, #1932 + ldrh r0, [r5, r3] + cmp r0, #0 + bne .L3196 + ldr r3, [r5, #-1284] + ldr r2, [r5, #1124] + add r3, r3, r3, lsl #1 + cmp r2, r3, lsr #2 + movcs r3, #18 + bcs .L3319 +.L3196: + ldr r3, .L3323+32 + ldrh r3, [r3] + add r3, r3, r3, lsl #1 + asr r3, r3, #2 +.L3319: + strh r3, [r6, #-8] @ movhi + mov r3, #0 + str r3, [r5, #-1556] +.L3159: + add sp, sp, #44 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L3161: + add r3, r3, #980 + ldrh r3, [r3] + cmp r3, r2 + beq .L3164 + mov r0, r4 + bl FtlGcFreeTempBlock + cmp r0, #0 + beq .L3164 + mov r0, r4 + b .L3159 +.L3162: + mov r3, r6 + ldrh r2, [r3, #-16]! + cmp r2, r1 + bne .L3163 + ldrh r0, [r6, #-12] + cmp r0, r2 + beq .L3163 + ldrh r1, [r6, #-10] + cmp r1, r2 + strhne ip, [r3] @ movhi + mvnne r3, #0 + strhne r0, [r6, #-14] @ movhi + strhne r1, [r6, #-12] @ movhi + strhne r3, [r6, #-10] @ movhi + b .L3163 +.L3173: + mov r3, #1 + strh r3, [r6, #-4] @ movhi +.L3175: + bl GetSwlReplaceBlock + movw r3, #65535 + mov r4, r0 + cmp r0, r3 + bne .L3167 + mov r2, #0 + movw r3, #1932 + strh r2, [r5, r3] @ movhi +.L3165: + movw r3, #1156 + movw r4, #65535 + ldrh r3, [r5, r3] + cmp r3, r4 + bne .L3167 +.L3254: + ldr r7, .L3323+28 + movw r3, #65535 + ldrh r4, [r7] + cmp r4, r3 + movne r4, r3 + bne .L3167 + ldr r3, .L3323+12 + ldrh r9, [r3] + cmp r9, r4 + bne .L3167 + ldrh r3, [r7, #-100]! + ldr r2, [r5, #-1544] + cmp r3, #24 + movcc r3, #5120 + movcs r3, #1024 + cmp r2, r3 + bls .L3167 + mov r3, #0 + movw r2, #1932 + str r3, [r5, #-1544] + strh r3, [r5, r2] @ movhi + bl GetSwlReplaceBlock + cmp r0, r9 + mov r4, r0 + movne r9, r0 + bne .L3177 + ldrh r2, [r7] + ldrh r3, [r6, #-6] + cmp r2, r3 + bcs .L3178 + mov r0, #64 + bl List_get_gc_head_node + uxth r3, r0 + cmp r3, r4 + beq .L3180 + ldr r3, [r5, #-1620] + ldr r1, .L3323+36 + cmp r3, #0 + uxth r3, r0 + bne .L3181 + ldrh r2, [r1] + cmp r2, #3 + beq .L3181 + ldr r2, [r5, #-1616] + cmp r2, #0 + bne .L3181 + ldr r2, [r5, #-1868] + cmp r2, #0 + bne .L3181 + ldrb r0, [r5, #-2740] @ zero_extendqisi2 + cmp r0, #0 + beq .L3182 +.L3181: + ldr r2, [r5, #-1404] + lsl r3, r3, #1 + ldrh r1, [r1] + ldrh r0, [r2, r3] + ldr r2, .L3323+16 + cmp r1, #3 + ldrh r3, [r2], #-64 + ldrh r2, [r2, #-4] + mul r2, r3, r2 + lsreq r3, r3, #1 + movne r3, #0 + add r3, r3, r2 + cmp r0, r3 + bgt .L3184 + mov r0, #0 + bl List_get_gc_head_node + ldr r3, [r5, #-1284] + uxth r9, r0 + ldr r2, [r5, #1124] + add r3, r3, r3, lsl #1 + cmp r2, r3, lsr #2 + movls r3, #160 + bls .L3316 +.L3317: + mov r3, #128 +.L3316: + strh r3, [r6, #-6] @ movhi + movw r3, #65535 + cmp r9, r3 + beq .L3180 +.L3177: + ldr r3, [r5, #-1404] + lsl r1, r9, #1 + ldrh r0, [r6, #-8] + mov r4, r9 + ldrh r2, [r7] + ldrh r3, [r3, r1] + str r0, [sp, #4] + ldr r0, [r5, #-1412] + ldrh r1, [r0, r1] + ldr r0, .L3323+40 + str r1, [sp] + mov r1, r9 + bl rk_printk + b .L3180 +.L3184: + mov r3, #128 +.L3318: + strh r3, [r6, #-6] @ movhi +.L3180: + bl FtlGcReFreshBadBlk + b .L3167 +.L3182: + ldr r2, [r5, #-1404] + lsl r3, r3, #1 + ldrh r3, [r2, r3] + cmp r3, #7 + bhi .L3187 + bl List_get_gc_head_node + uxth r9, r0 + b .L3317 +.L3187: + mov r3, #64 + b .L3318 +.L3178: + mov r3, #80 + b .L3318 +.L3195: + ldr r3, .L3323+32 + ldrh r3, [r3] + add r3, r3, r3, lsl #1 + asr r3, r3, #2 + strh r3, [r6, #-8] @ movhi +.L3194: + ldr r3, [r5, #-1868] + movw r4, #65535 + adds r3, r3, #0 + movne r3, #1 + cmp r8, #2 + movhi r3, #0 + cmp r3, #0 + addne r3, r9, #1 + uxthne r9, r3 +.L3200: + movw r3, #1156 + ldrh r2, [r5, r3] + movw r1, #65535 + cmp r2, r1 + bne .L3210 + cmp r4, r2 + strhne r4, [r5, r3] @ movhi + bne .L3212 + ldr r3, .L3323+12 + ldrh r2, [r3] + cmp r2, r4 + beq .L3212 + ldr r1, [r5, #-1404] + lsl r2, r2, #1 + ldrh r2, [r1, r2] + cmp r2, #0 + mvneq r2, #0 + strheq r2, [r3] @ movhi + movw r2, #1156 + ldrh r1, [r3] + strh r1, [r5, r2] @ movhi + mvn r2, #0 + strh r2, [r3] @ movhi +.L3212: + movw r6, #1156 + mov r3, #0 + ldrh r0, [r5, r6] + strb r3, [r5, #1164] + movw r3, #65535 + cmp r0, r3 + beq .L3210 + bl IsBlkInGcList + cmp r0, #0 + mvnne r3, #0 + strhne r3, [r5, r6] @ movhi + ldrb r3, [r5, #-2740] @ zero_extendqisi2 + cmp r3, #0 + beq .L3216 + movw r3, #1156 + ldrh r0, [r5, r3] + bl ftl_get_blk_mode + strb r0, [r5, #1164] +.L3216: + movw r7, #1156 + movw r3, #65535 + ldrh r2, [r5, r7] + ldr r6, .L3323+44 + cmp r2, r3 + beq .L3210 + mov r0, r6 + bl make_superblock + mov r3, #0 + movw r2, #1934 + strh r3, [r6, #2] @ movhi + add r6, r6, #780 + strh r3, [r5, r2] @ movhi + strb r3, [r5, #1162] + ldrh r3, [r5, r7] + ldr r2, [r5, #-1404] + lsl r3, r3, #1 + ldrh r3, [r2, r3] + strh r3, [r6] @ movhi +.L3210: + ldr r2, .L3323+48 + movw r3, #1156 + ldrh r3, [r5, r3] + ldrh r1, [r2] + cmp r1, r3 + beq .L3217 + ldrh r1, [r2, #48] + cmp r1, r3 + beq .L3217 + ldrh r2, [r2, #96] + cmp r2, r3 + bne .L3218 +.L3217: + mvn r2, #0 + movw r3, #1156 + strh r2, [r5, r3] @ movhi +.L3218: + ldr r5, .L3323 + mov r10, r5 +.L3251: + ldr r8, .L3323+44 + movw r3, #65535 + ldrh r2, [r8] + cmp r2, r3 + bne .L3219 + ldr fp, .L3323+8 + mov r3, #0 + str r3, [r5, #-1556] +.L3220: + ldr r6, .L3323+52 + ldrh r7, [r6] + mov r0, r7 + bl List_get_gc_head_node + ldr r1, .L3323+44 + uxth r2, r0 + strh r2, [r1] @ movhi + movw r1, #65535 + cmp r2, r1 + bne .L3221 + mov r3, #0 + mov r0, #8 + strh r3, [r6] @ movhi + b .L3159 +.L3189: + ldr r3, .L3323+28 + ldrh r8, [r3] + cmp r8, r0 + bne .L3201 + ldr r0, .L3323+12 + ldrh r0, [r0] + cmp r0, r8 + movne r2, #0 + andeq r2, r2, #1 + cmp r2, #0 + beq .L3201 + movw r2, #1156 + ldrh r2, [r5, r2] + cmp r2, r8 + beq .L3202 +.L3207: + mov r4, r8 +.L3201: + ldr r3, [r5, #-1868] + cmp r3, #0 + moveq r9, #1 + movne r9, #2 + b .L3200 +.L3202: + mov r4, r3 + ldrh r3, [r6, #-8] + ldrh r2, [r4, #-100]! + str r1, [r5, #-1556] + cmp r2, r3 + bls .L3203 + movw r3, #1932 + ldrh r3, [r5, r3] + cmp r3, #0 + bne .L3204 + ldr r3, [r5, #-1284] + ldr r2, [r5, #1124] + add r3, r3, r3, lsl #1 + cmp r2, r3, lsr #2 + movcs r3, #18 + bcs .L3320 +.L3204: + ldr r3, .L3323+32 + ldrh r3, [r3] + add r3, r3, r3, lsl #1 + asr r3, r3, #2 +.L3320: + strh r3, [r6, #-8] @ movhi + bl FtlReadRefresh + mov r0, #0 + bl List_get_gc_head_node + uxth r0, r0 + ldr r3, [r5, #-1404] + lsl r0, r0, #1 + ldrh r3, [r3, r0] + cmp r3, #4 + bls .L3203 +.L3322: + movw r3, #1932 + ldrh r0, [r5, r3] + b .L3159 +.L3203: + movw r7, #1932 + ldrh r0, [r5, r7] + cmp r0, #0 + bne .L3207 + ldr r10, .L3323+32 + ldrh r9, [r10] + add r3, r9, r9, lsl #1 + asr r3, r3, #2 + strh r3, [r6, #-8] @ movhi + bl List_get_gc_head_node + uxth r0, r0 + ldr r3, [r5, #-1404] + lsl r0, r0, #1 + ldrh r2, [r3, r0] + sub r3, r10, #2816 + sub r10, r10, #2880 + ldrh r1, [r3] + ldrh r3, [r10, #-4] + mul r3, r3, r1 + add r3, r3, r3, lsr #31 + cmp r2, r3, asr #1 + ble .L3208 + ldrh r3, [r4] + sub r9, r9, #1 + cmp r3, r9 + blt .L3208 + bl FtlReadRefresh + ldrh r0, [r5, r7] + b .L3159 +.L3208: + cmp r2, #0 + bne .L3207 + movw r0, #65535 + bl decrement_vpc_count + ldrh r0, [r4] + add r0, r0, #1 + b .L3159 +.L3221: + str r0, [sp, #16] + mov r0, r2 + str r2, [sp, #12] + add r7, r7, #1 + bl IsBlkInGcList + cmp r0, #0 + ldr r2, [sp, #12] + ldr r3, [sp, #16] + strhne r7, [r6] @ movhi + bne .L3220 + ldr lr, .L3323+16 + uxth r3, r3 + ldr r0, [r10, #-1404] + uxth r7, r7 + lsl r1, r3, #1 + ldrh r3, [r6, #-142] + ldrh lr, [lr, #-68] + strh r7, [r6] @ movhi + ldrh ip, [r0, r1] + mul r3, lr, r3 + add lr, r3, r3, lsr #31 + cmp ip, lr, asr #1 + bgt .L3224 + cmp r7, #48 + cmphi ip, #8 + bls .L3225 + add r6, r6, #3280 + ldrh ip, [r6] + cmp ip, #35 + bhi .L3225 +.L3224: + mov ip, #0 + strh ip, [fp, #-4] @ movhi +.L3225: + ldrh r1, [r0, r1] + movw r0, #65535 + cmp r3, r1 + cmple r4, r0 + bne .L3226 + ldrh r0, [fp, #-4] + cmp r0, #3 + bhi .L3226 + movw r2, #1156 + mvn r1, #0 + strh r1, [r10, r2] @ movhi + movw r3, #1932 + mov r2, #0 + ldrh r0, [r10, r3] + strh r2, [fp, #-4] @ movhi + b .L3159 +.L3226: + cmp r1, #0 + bne .L3227 + movw r0, #65535 + bl decrement_vpc_count + ldrh r3, [fp, #-4] + add r3, r3, #1 + strh r3, [fp, #-4] @ movhi + b .L3220 +.L3227: + mov r3, #0 + strb r3, [r10, #1164] + ldrb r3, [r10, #-2740] @ zero_extendqisi2 + cmp r3, #0 + beq .L3228 + mov r0, r2 + bl ftl_get_blk_mode + strb r0, [r10, #1164] +.L3228: + ldr r0, .L3323+44 + bl make_superblock + ldrh r2, [r8] + mov r3, #0 + ldr r1, .L3323+56 + ldr r0, [r10, #-1404] + lsl r2, r2, #1 + strh r3, [r1] @ movhi + ldrh r2, [r0, r2] + strh r3, [r8, #2] @ movhi + strb r3, [r10, #1162] + strh r2, [r1, #2] @ movhi +.L3219: + ldr r3, [sp, #24] + cmp r3, #1 + bne .L3229 + bl FtlReadRefresh +.L3229: + mov r3, #1 + str r3, [r10, #-1560] + ldr r3, .L3323+16 + ldrh r2, [r3, #-2] + str r2, [sp, #12] + ldrb r2, [r10, #-2740] @ zero_extendqisi2 + cmp r2, #0 + beq .L3230 + ldrb r2, [r10, #1164] @ zero_extendqisi2 + cmp r2, #1 + ldrheq r3, [r3] + streq r3, [sp, #12] +.L3230: + ldrh r3, [r8, #2] + ldr r1, [sp, #12] + ldr r6, .L3323+44 + add r2, r3, r9 + cmp r2, r1 + movgt r2, r1 + subgt r3, r2, r3 + uxthgt r9, r3 + mov r3, #0 + str r3, [sp, #20] +.L3232: + ldrh r3, [sp, #20] + cmp r9, r3 + bls .L3239 + ldr r3, .L3323+60 + add ip, r6, #14 + ldrh r1, [r6, #2] + mov lr, #36 + ldr r0, [r5, #-1484] + ldrh r8, [r3] + ldr r3, [sp, #20] + add r1, r1, r3 + mov r3, #0 + mov fp, r3 + b .L3240 +.L3234: + ldrh r2, [ip, #2]! + movw r7, #65535 + add r3, r3, #1 + cmp r2, r7 + mlane r7, lr, fp, r0 + addne fp, fp, #1 + orrne r2, r1, r2, lsl #10 + uxthne fp, fp + strne r2, [r7, #4] +.L3240: + uxth r2, r3 + cmp r8, r2 + bhi .L3234 + ldrb r2, [r5, #1164] @ zero_extendqisi2 + mov r1, fp + bl FlashReadPages + mov r3, #0 +.L3321: + str r3, [sp, #16] + ldrh r3, [sp, #16] + cmp fp, r3 + ldrls r3, [sp, #20] + addls r3, r3, #1 + strls r3, [sp, #20] + bls .L3232 +.L3238: + ldr r2, [sp, #16] + mov r3, #36 + mul r7, r3, r2 + ldr r3, [r5, #-1484] + add r2, r3, r7 + ldr r3, [r3, r7] + cmn r3, #1 + beq .L3236 + ldr r8, [r2, #12] + movw r3, #61589 + ldrh r2, [r8] + cmp r2, r3 + bne .L3236 + mov r2, #0 + add r1, sp, #32 + ldr r0, [r8, #8] + bl log2phys + ldr r2, [r5, #-1484] + ldr r3, [sp, #32] + add r2, r2, r7 + ldr r1, [r2, #4] + bic r3, r3, #-2147483648 + cmp r3, r1 + bne .L3236 + ldr r3, .L3323+56 + mov r0, #36 + ldr r1, .L3323+56 + ldr r2, [r2, #16] + ldrh r3, [r3] + add r3, r3, #1 + strh r3, [r1] @ movhi + ldr r1, [r5, #1732] + ldr r3, [r5, #-1496] + mla r3, r0, r1, r3 + str r2, [r3, #16] + str r3, [sp, #28] + bl Ftl_get_new_temp_ppa + ldr r3, [sp, #28] + mov r1, #36 + ldr r2, [r5, #-1496] + str r0, [r3, #4] + ldr r3, [r5, #1732] + mla r2, r1, r3, r2 + ldr r3, [r5, #-1484] + add r3, r3, r7 + ldr r1, [r3, #8] + str r1, [r2, #8] + mov r1, #1 + ldr r3, [r3, #12] + str r3, [r2, #12] + ldr r3, [sp, #32] + str r3, [r8, #12] + ldr r3, .L3323+28 + ldrh r3, [r3] + strh r3, [r8, #2] @ movhi + ldr r3, [r5, #-1608] + ldr r0, [r5, #-1484] + str r3, [r8, #4] + ldr r3, [r5, #1732] + add r0, r0, r7 + add r3, r3, #1 + str r3, [r5, #1732] + bl FtlGcBufAlloc + ldrb r3, [r5, #-2740] @ zero_extendqisi2 + cmp r3, #0 + bne .L3237 + ldrb r2, [r5, #987] @ zero_extendqisi2 + ldr r3, [r5, #1732] + cmp r2, r3 + beq .L3237 + ldr r3, .L3323+28 + ldrh r3, [r3, #4] + cmp r3, #0 + bne .L3236 +.L3237: + bl Ftl_gc_temp_data_write_back + cmp r0, #0 + beq .L3236 + ldr r3, .L3323 + mvn r0, #0 + movw r1, #1156 + mov r2, #0 + strh r0, [r3, r1] @ movhi + ldr r1, .L3323+44 + str r2, [r3, #-1560] + strh r2, [r1, #2] @ movhi + movw r2, #1932 + ldrh r0, [r3, r2] + b .L3159 +.L3236: + ldr r3, [sp, #16] + add r3, r3, #1 + b .L3321 +.L3239: + ldrh r3, [r6, #2] + ldr r2, [sp, #12] + add r3, r9, r3 + uxth r3, r3 + cmp r2, r3 + strh r3, [r6, #2] @ movhi + bhi .L3241 + ldr r3, [r5, #1732] + cmp r3, #0 + beq .L3242 + bl Ftl_gc_temp_data_write_back + cmp r0, #0 + movne r3, #0 + strne r3, [r5, #-1560] + bne .L3322 +.L3242: + ldr r3, .L3323+56 + ldrh r7, [r3] + cmp r7, #0 + bne .L3243 + ldrh r3, [r6] + ldr r2, [r5, #-1404] + lsl r3, r3, #1 + ldrh r3, [r2, r3] + cmp r3, #0 + beq .L3243 +.L3244: + ldr r3, [r5, #-1284] + cmp r7, r3 + bcs .L3249 + mov r2, #0 + add r1, sp, #36 + mov r0, r7 + bl log2phys + ldr r0, [sp, #36] + cmn r0, #1 + beq .L3245 + ubfx r0, r0, #10, #16 + bl P2V_block_in_plane + ldrh r3, [r6] + cmp r3, r0 + bne .L3245 +.L3249: + ldr r3, [r5, #-1284] + cmp r7, r3 + bcc .L3243 + ldrh r3, [r6] + mov r1, #0 + ldr r2, [r5, #-1404] + lsl r3, r3, #1 + strh r1, [r2, r3] @ movhi + ldrh r0, [r6] + bl update_vpc_list + bl FtlCacheWriteBack + bl l2p_flush + bl FtlVpcTblFlush +.L3243: + mvn r3, #0 + strh r3, [r6] @ movhi +.L3241: + ldr r3, .L3323+24 + ldrh r3, [r3] + cmp r3, #2 + bhi .L3250 + ldr r3, .L3323+64 + ldrh r9, [r3] + b .L3251 +.L3245: + add r7, r7, #1 + b .L3244 +.L3250: + mov r2, #0 + str r2, [r5, #-1560] + movw r2, #1932 + ldrh r0, [r5, r2] + cmp r0, #0 + addeq r0, r3, #1 + b .L3159 +.L3255: + mov r0, #0 + b .L3159 +.L3324: + .align 2 +.L3323: + .word .LANCHOR2 + .word .LANCHOR1 + .word .LANCHOR2-1520 + .word .LANCHOR2-1536 + .word .LANCHOR2-1664 + .word .LC158 + .word .LANCHOR2+880 + .word .LANCHOR2+980 + .word .LANCHOR2+1152 + .word .LANCHOR2-1712 + .word .LC159 + .word .LANCHOR2+1156 + .word .LANCHOR2+884 + .word .LANCHOR2-1524 + .word .LANCHOR2+1934 + .word .LANCHOR2-1732 + .word .LANCHOR2-1666 + .fnend + .size ftl_do_gc, .-ftl_do_gc + .align 2 + .global FtlCacheWriteBack + .syntax unified + .arm + .fpu softvfp + .type FtlCacheWriteBack, %function +FtlCacheWriteBack: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #12 + ldr r4, .L3368 + ldr r8, [r4, #-1280] + cmp r8, #0 + bne .L3327 + ldr r1, [r4, #-1512] + cmp r1, #0 + beq .L3327 + ldrb r3, [r4, #-2740] @ zero_extendqisi2 + mov r6, #0 + ldr r5, [r4, #1940] + mov r9, #36 + ldr r10, .L3368+4 + cmp r3, #0 + ldr r0, [r4, #-1480] + ldrbne r7, [r5, #8] @ zero_extendqisi2 + moveq r7, r8 + ldrb r3, [r5, #9] @ zero_extendqisi2 + subne r7, r7, #1 + clzne r7, r7 + lsrne r7, r7, #5 + mov r2, r7 + bl FlashProgPages +.L3330: + ldr r3, [r4, #-1512] + cmp r6, r3 + bcc .L3337 +.L3349: + mov r3, #0 + str r3, [r4, #-1512] +.L3327: + mov r0, #0 + add sp, sp, #12 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L3337: + mul fp, r9, r6 + ldr r3, [r4, #-1480] + add r0, r3, fp + ldr r3, [r3, fp] + cmn r3, #1 + bne .L3331 + ldr r10, .L3368+4 +.L3332: + ldr r3, [r4, #-1512] + cmp r8, r3 + bcc .L3347 + movw r5, #16386 +.L3350: + ldr r3, .L3368+8 + ldrh r3, [r3] + cmp r3, #0 + beq .L3349 + mov r1, #1 + mov r0, r1 + bl ftl_do_gc + subs r5, r5, #1 + bne .L3350 + b .L3349 +.L3331: + ldr r3, [r0, #4] + cmp r7, #0 + mov r2, #1 + add r1, sp, #4 + ldr r0, [r0, #16] + orrne r3, r3, #-2147483648 + str r3, [sp, #4] + bl log2phys + ldr r3, [r4, #-1480] + add fp, r3, fp + ldr r3, [fp, #12] + ldr r0, [r3, #12] + cmn r0, #1 + beq .L3335 + ubfx r0, r0, #10, #16 + bl P2V_block_in_plane + ldr r2, [r4, #-1404] + lsl r3, r0, #1 + mov fp, r0 + ldrh r2, [r2, r3] + cmp r2, #0 + bne .L3336 + mov r1, r0 + mov r0, r10 + bl rk_printk +.L3336: + mov r0, fp + bl decrement_vpc_count +.L3335: + add r6, r6, #1 + b .L3330 +.L3347: + mov r6, #36 + ldr r3, [r4, #-1480] + mul r6, r6, r8 + mov r9, #0 + mov fp, #1 + mvn r2, #0 + str r2, [r3, r6] +.L3338: + ldr r2, [r4, #-1480] + add r3, r2, r6 + ldr r2, [r2, r6] + ldr r0, [r3, #4] + cmn r2, #1 + beq .L3342 + cmp r7, #0 + mov r2, #1 + orrne r0, r0, #-2147483648 + add r1, sp, #4 + str r0, [sp, #4] + ldr r0, [r3, #16] + bl log2phys + ldr r3, [r4, #-1480] + add r6, r3, r6 + ldr r3, [r6, #12] + ldr r0, [r3, #12] + cmn r0, #1 + beq .L3345 + ubfx r0, r0, #10, #16 + bl P2V_block_in_plane + ldr r2, [r4, #-1404] + lsl r3, r0, #1 + mov r6, r0 + ldrh r2, [r2, r3] + cmp r2, #0 + bne .L3346 + mov r1, r0 + mov r0, r10 + bl rk_printk +.L3346: + mov r0, r6 + bl decrement_vpc_count +.L3345: + add r8, r8, #1 + b .L3332 +.L3342: + ubfx r0, r0, #10, #16 + bl P2V_block_in_plane + ldrh r3, [r5] + cmp r3, r0 + bne .L3339 + ldr r1, [r4, #-1404] + lsl r3, r3, #1 + ldrh r0, [r5, #4] + ldrh r2, [r1, r3] + sub r2, r2, r0 + strh r2, [r1, r3] @ movhi + ldr r3, .L3368+12 + strb r9, [r5, #6] + strh r9, [r5, #4] @ movhi + ldrh r3, [r3] + strh r3, [r5, #2] @ movhi +.L3339: + ldrh r3, [r5, #4] + cmp r3, #0 + bne .L3340 + mov r0, r5 + bl allocate_new_data_superblock +.L3340: + ldr r3, [r4, #1300] + add r3, r3, #1 + str r3, [r4, #1300] + ldr r3, [r4, #-1480] + add r3, r3, r6 + ldr r0, [r3, #4] + ubfx r0, r0, #10, #16 + bl FtlGcMarkBadPhyBlk + mov r0, r5 + bl get_new_active_ppa + ldr r3, [r4, #-1480] + mov r2, r0 + str r0, [sp, #4] + mov r1, #1 + add r0, r3, r6 + str r2, [r0, #4] + mov r2, r7 + ldrb r3, [r5, #9] @ zero_extendqisi2 + bl FlashProgPages + ldr r3, [r4, #-1480] + ldr r3, [r3, r6] + cmn r3, #1 + streq fp, [r4, #-1280] + ldr r3, [r4, #-1280] + cmp r3, #0 + beq .L3338 + b .L3327 +.L3369: + .align 2 +.L3368: + .word .LANCHOR2 + .word .LC160 + .word .LANCHOR2-1522 + .word .LANCHOR2-1666 + .fnend + .size FtlCacheWriteBack, .-FtlCacheWriteBack + .align 2 + .global FtlSysFlush + .syntax unified + .arm + .fpu softvfp + .type FtlSysFlush, %function +FtlSysFlush: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L3376 + ldr r3, [r3, #-1280] + cmp r3, #0 + bne .L3373 + ldr r3, .L3376+4 + push {r4, lr} + .save {r4, lr} + ldr r4, [r3, #3440] + cmp r4, #1 + bne .L3371 + bl FtlCacheWriteBack + bl l2p_flush + mov r0, r4 + bl FtlEctTblFlush + bl FtlVpcTblFlush +.L3371: + mov r0, #0 + pop {r4, pc} +.L3373: + mov r0, #0 + bx lr +.L3377: + .align 2 +.L3376: + .word .LANCHOR2 + .word .LANCHOR1 + .fnend + .size FtlSysFlush, .-FtlSysFlush + .align 2 + .global FtlDeInit + .syntax unified + .arm + .fpu softvfp + .type FtlDeInit, %function +FtlDeInit: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L3384 + ldr r3, [r3, #3440] + cmp r3, #1 + bne .L3381 + push {r4, lr} + .save {r4, lr} + bl FtlSysFlush + mov r0, #0 + pop {r4, pc} +.L3381: + mov r0, #0 + bx lr +.L3385: + .align 2 +.L3384: + .word .LANCHOR1 + .fnend + .size FtlDeInit, .-FtlDeInit + .align 2 + .global ftl_deinit + .syntax unified + .arm + .fpu softvfp + .type ftl_deinit, %function +ftl_deinit: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, lr} + .save {r4, lr} + bl ftl_flash_de_init + bl FtlDeInit + pop {r4, lr} + b ftl_flash_de_init + .fnend + .size ftl_deinit, .-ftl_deinit + .align 2 + .global ftl_cache_flush + .syntax unified + .arm + .fpu softvfp + .type ftl_cache_flush, %function +ftl_cache_flush: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + b FtlCacheWriteBack + .fnend + .size ftl_cache_flush, .-ftl_cache_flush + .align 2 + .global ftl_discard + .syntax unified + .arm + .fpu softvfp + .type ftl_discard, %function +ftl_discard: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r4, r5, r6, r7, r8, r9, lr} + .save {r4, r5, r6, r7, r8, r9, lr} + .pad #12 + ldr r4, .L3406 + ldr r3, [r4, #-2736] + cmp r3, r1 + cmpcs r3, r0 + bls .L3398 + add r2, r0, r1 + mov r7, r0 + cmp r3, r2 + mov r5, r1 + bcc .L3398 + cmp r1, #31 + bhi .L3391 +.L3392: + mov r0, #0 +.L3389: + add sp, sp, #12 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, pc} +.L3391: + ldr r3, [r4, #-1280] + cmp r3, #0 + bne .L3392 + sub r9, r4, #1648 + bl FtlCacheWriteBack + ldrh r6, [r9, #-12] + mov r0, r7 + mov r1, r6 + bl __aeabi_uidiv + smulbb r3, r0, r6 + mov r8, r0 + sub r7, r7, r3 + uxth r7, r7 + cmp r7, #0 + beq .L3393 + sub r6, r6, r7 + add r8, r0, #1 + cmp r6, r5 + movcs r6, r5 + uxth r6, r6 + sub r5, r5, r6 +.L3393: + mvn r3, #0 + str r3, [sp, #4] +.L3394: + ldrh r3, [r9, #-12] + cmp r5, r3 + bcs .L3396 + ldr r3, [r4, #1944] + cmp r3, #32 + bls .L3392 + mov r5, #0 + str r5, [r4, #1944] + bl l2p_flush + bl FtlVpcTblFlush + b .L3392 +.L3396: + mov r2, #0 + mov r1, sp + mov r0, r8 + bl log2phys + ldr r3, [sp] + cmn r3, #1 + beq .L3395 + ldr r3, [r4, #1944] + mov r2, #1 + add r1, sp, #4 + mov r0, r8 + add r3, r3, #1 + str r3, [r4, #1944] + ldr r3, [r4, #-1596] + add r3, r3, #1 + str r3, [r4, #-1596] + bl log2phys + ldr r0, [sp] + ubfx r0, r0, #10, #16 + bl P2V_block_in_plane + bl decrement_vpc_count +.L3395: + ldrh r3, [r9, #-12] + add r8, r8, #1 + sub r5, r5, r3 + b .L3394 +.L3398: + mvn r0, #0 + b .L3389 +.L3407: + .align 2 +.L3406: + .word .LANCHOR2 + .fnend + .size ftl_discard, .-ftl_discard + .align 2 + .global FtlGcFreeTempBlock + .syntax unified + .arm + .fpu softvfp + .type FtlGcFreeTempBlock, %function +FtlGcFreeTempBlock: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #12 + ldr r4, .L3447 + ldr ip, [r4, #-1280] + sub r7, r4, #1664 + ldrh r1, [r7, #-2] + cmp ip, #0 + beq .L3409 +.L3445: + mov r0, #0 +.L3408: + add sp, sp, #12 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L3409: + add r5, r4, #980 + movw lr, #65535 + ldrh r6, [r5] + cmp r6, lr + bne .L3411 +.L3420: + ldrh r2, [r5] + movw r3, #65535 + mov r6, #0 + str r6, [r4, #1748] + cmp r2, r3 + beq .L3445 + bl FtlCacheWriteBack + ldrb r2, [r4, #987] @ zero_extendqisi2 + mov r10, #12 + ldrh r0, [r7, #-2] + ldrh r3, [r5] + ldr r1, [r4, #-1404] + ldr r9, .L3447+4 + smulbb r2, r2, r0 + lsl r3, r3, #1 + strh r2, [r1, r3] @ movhi + movw r3, #1758 + ldr r2, [r4, #-1604] + ldrh r3, [r4, r3] + add r3, r3, r2 + str r3, [r4, #-1604] +.L3421: + ldrh r2, [r9] + uxth r3, r6 + cmp r2, r3 + bhi .L3425 + movw r0, #65535 + bl decrement_vpc_count + ldrb r3, [r4, #-2740] @ zero_extendqisi2 + cmp r3, #0 + beq .L3426 + ldrh r1, [r5] + ldr r0, .L3447+8 + bl rk_printk +.L3426: + ldrh r0, [r5] + ldr r2, [r4, #-1404] + lsl r3, r0, #1 + ldrh r3, [r2, r3] + cmp r3, #0 + beq .L3427 + bl INSERT_DATA_LIST +.L3428: + mvn r6, #0 + movw r3, #1758 + strh r6, [r5] @ movhi + mov r5, #0 + strh r5, [r4, r3] @ movhi + movw r3, #1756 + strh r5, [r4, r3] @ movhi + bl l2p_flush + bl FtlVpcTblFlush + movw r3, #1156 + strh r6, [r4, r3] @ movhi + ldr r3, [r4, #-1868] + cmp r3, r5 + ldr r3, .L3447+12 + add r2, r3, #272 + ldrh r2, [r2] + beq .L3429 + ldr r1, [r4, #-1564] + cmp r1, #39 + bhi .L3429 + ldrh r1, [r3] + cmp r1, r2 + subcc r3, r3, #2400 + lslcc r2, r2, #1 + bcs .L3445 +.L3446: + strh r2, [r3, #-8] @ movhi + b .L3445 +.L3411: + cmp r0, #0 + beq .L3414 + ldr r2, .L3447+16 + movw r3, #3444 + ldrh r0, [r2, r3] + cmp r0, lr + beq .L3415 +.L3416: + mov r1, #2 +.L3414: + ldr r0, .L3447+20 + bl FtlGcScanTempBlk + cmn r0, #1 + str r0, [sp, #4] + beq .L3417 + ldr r2, [r4, #-1412] + lsl r6, r6, #1 + ldrh r3, [r2, r6] + cmp r3, #4 + bls .L3418 + sub r3, r3, #5 + mov r0, #1 + strh r3, [r2, r6] @ movhi + bl FtlEctTblFlush +.L3418: + ldr r3, [r4, #1748] + cmp r3, #0 + bne .L3419 + ldr r3, [r4, #1300] + ldr r0, [sp, #4] + add r3, r3, #1 + ubfx r0, r0, #10, #16 + str r3, [r4, #1300] + bl FtlBbmMapBadBlock + bl FtlBbmTblFlush +.L3419: + mov r3, #0 + str r3, [r4, #1748] +.L3431: + mov r0, #1 + b .L3408 +.L3415: + strh ip, [r2, r3] @ movhi + add r3, r4, #880 + ldrh r3, [r3] + cmp r3, #17 + bhi .L3416 + b .L3414 +.L3417: + ldr r2, .L3447+16 + movw r3, #3444 + ldrh r2, [r2, r3] + movw r3, #65535 + cmp r2, r3 + bne .L3431 + b .L3420 +.L3425: + uxth r8, r6 + ldr fp, [r4, #-1504] + ldr r3, [r4, #-1284] + mul r8, r10, r8 + add r7, fp, r8 + ldr r0, [r7, #8] + cmp r0, r3 + bcc .L3422 +.L3443: + ldrh r0, [r5] + b .L3444 +.L3422: + mov r2, #0 + add r1, sp, #4 + bl log2phys + ldr r0, [fp, r8] + ldr r3, [sp, #4] + cmp r0, r3 + bne .L3424 + ubfx r0, r0, #10, #16 + bl P2V_block_in_plane + mov r2, #1 + mov r8, r0 + add r1, r7, #4 + ldr r0, [r7, #8] + bl log2phys + mov r0, r8 +.L3444: + bl decrement_vpc_count + b .L3423 +.L3424: + ldr r2, [r7, #4] + cmp r3, r2 + bne .L3443 +.L3423: + add r6, r6, #1 + b .L3421 +.L3427: + bl INSERT_FREE_LIST + b .L3428 +.L3429: + ldrh r3, [r3] + add r1, r2, r2, lsl #1 + cmp r3, r1, asr #2 + ble .L3445 + ldrb r0, [r4, #-2740] @ zero_extendqisi2 + ldr r3, .L3447+24 + cmp r0, #0 + moveq r2, #20 + strheq r2, [r3, #-8] @ movhi + beq .L3408 + sub r2, r2, #2 + b .L3446 +.L3448: + .align 2 +.L3447: + .word .LANCHOR2 + .word .LANCHOR2+1758 + .word .LC161 + .word .LANCHOR2+880 + .word .LANCHOR1 + .word .LANCHOR2+980 + .word .LANCHOR2-1520 + .fnend + .size FtlGcFreeTempBlock, .-FtlGcFreeTempBlock + .align 2 + .global FtlGcPageRecovery + .syntax unified + .arm + .fpu softvfp + .type FtlGcPageRecovery, %function +FtlGcPageRecovery: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + ldr r4, .L3452 + sub r5, r4, #1664 + add r6, r4, #980 + ldrh r1, [r5, #-2] + mov r0, r6 + bl FtlGcScanTempBlk + ldrh r2, [r6, #2] + ldrh r3, [r5, #-2] + cmp r2, r3 + popcc {r4, r5, r6, pc} + add r0, r6, #48 + bl FtlMapBlkWriteDumpData + mov r0, #0 + bl FtlGcFreeTempBlock + mov r3, #0 + str r3, [r4, #1748] + pop {r4, r5, r6, pc} +.L3453: + .align 2 +.L3452: + .word .LANCHOR2 + .fnend + .size FtlGcPageRecovery, .-FtlGcPageRecovery + .align 2 + .global FtlPowerLostRecovery + .syntax unified + .arm + .fpu softvfp + .type FtlPowerLostRecovery, %function +FtlPowerLostRecovery: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + mov r5, #0 + ldr r4, .L3456 + add r6, r4, #884 + str r5, [r4, #1800] + mov r0, r6 + add r4, r4, #932 + bl FtlRecoverySuperblock + mov r0, r6 + bl FtlSlcSuperblockCheck + mov r0, r4 + bl FtlRecoverySuperblock + mov r0, r4 + bl FtlSlcSuperblockCheck + bl FtlGcPageRecovery + movw r0, #65535 + bl decrement_vpc_count + mov r0, r5 + pop {r4, r5, r6, pc} +.L3457: + .align 2 +.L3456: + .word .LANCHOR2 + .fnend + .size FtlPowerLostRecovery, .-FtlPowerLostRecovery + .align 2 + .global FtlSysBlkInit + .syntax unified + .arm + .fpu softvfp + .type FtlSysBlkInit, %function +FtlSysBlkInit: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + mov r2, #0 + ldr r4, .L3476 + movw r3, #1796 + strh r2, [r4, r3] @ movhi + mvn r2, #0 + movw r3, #1794 + strh r2, [r4, r3] @ movhi + sub r3, r4, #1728 + ldrh r0, [r3] + bl FtlFreeSysBlkQueueInit + bl FtlScanSysBlk + movw r3, #1128 + ldrh r2, [r4, r3] + movw r3, #65535 + cmp r2, r3 + bne .L3459 +.L3461: + mvn r7, #0 +.L3458: + mov r0, r7 + pop {r4, r5, r6, r7, r8, pc} +.L3459: + bl FtlLoadSysInfo + subs r7, r0, #0 + bne .L3461 + bl FtlLoadMapInfo + bl FtlLoadVonderInfo + bl Ftl_load_ext_data + bl FtlLoadEctTbl + bl FtlFreeSysBLkSort + bl SupperBlkListInit + bl FtlPowerLostRecovery + mov r0, #1 + bl FtlUpdateVaildLpn + ldr r2, [r4, #-1364] + sub r3, r4, #1616 + ldrh r1, [r3, #-10] + mov r0, #12 + mov r3, r7 +.L3462: + cmp r3, r1 + bge .L3467 + mla ip, r0, r3, r2 + ldr ip, [ip, #4] + cmp ip, #0 + bge .L3463 +.L3467: + ldr r5, .L3476+4 + cmp r3, r1 + ldrh r2, [r5, #28] + add r6, r5, #68 + add r2, r2, #1 + strh r2, [r5, #28] @ movhi + bge .L3474 +.L3464: + ldrh r3, [r6] + ldr r1, [r4, #-1404] + ldrh r0, [r6, #4] + ldr ip, .L3476+8 + lsl r3, r3, #1 + ldrh r2, [r1, r3] + sub r2, r2, r0 + strh r2, [r1, r3] @ movhi + mov r2, #0 + ldrh r3, [ip, #-2] + ldr lr, [r4, #-1404] + strb r2, [r4, #890] + strh r3, [r6, #2] @ movhi + ldr r3, .L3476+12 + strh r2, [r6, #4] @ movhi + ldrh r1, [r3] + ldrh r8, [r3, #4] + lsl r1, r1, #1 + ldrh r0, [lr, r1] + sub r0, r0, r8 + strh r0, [lr, r1] @ movhi + ldrh r1, [ip, #-2] + strh r2, [r3, #4] @ movhi + strb r2, [r4, #938] + strh r1, [r3, #2] @ movhi + ldrh r3, [r5, #30] + add r3, r3, #1 + strh r3, [r5, #30] @ movhi + bl l2p_flush + bl FtlVpcTblFlush + bl FtlVpcTblFlush + b .L3468 +.L3463: + add r3, r3, #1 + b .L3462 +.L3474: + movw r3, #1796 + ldrh r3, [r4, r3] + cmp r3, #0 + bne .L3464 +.L3468: + ldrh r0, [r6] + movw r3, #65535 + cmp r0, r3 + beq .L3469 + ldrh r3, [r6, #4] + cmp r3, #0 + bne .L3469 + ldr r4, .L3476+12 + ldrh r3, [r4, #4] + cmp r3, #0 + bne .L3469 + bl FtlGcRefreshOpenBlock + ldrh r0, [r4] + bl FtlGcRefreshOpenBlock + bl FtlVpcTblFlush + sub r0, r4, #48 + bl allocate_new_data_superblock + mov r0, r4 + bl allocate_new_data_superblock +.L3469: + ldr r3, .L3476+16 + ldrb r3, [r3, #36] @ zero_extendqisi2 + cmp r3, #0 + bne .L3470 + ldrh r3, [r5, #28] + tst r3, #31 + bne .L3458 +.L3470: + bl FtlVpcCheckAndModify + b .L3458 +.L3477: + .align 2 +.L3476: + .word .LANCHOR2 + .word .LANCHOR2+816 + .word .LANCHOR2-1664 + .word .LANCHOR2+932 + .word .LANCHOR0 + .fnend + .size FtlSysBlkInit, .-FtlSysBlkInit + .align 2 + .global FtlLowFormat + .syntax unified + .arm + .fpu softvfp + .type FtlLowFormat, %function +FtlLowFormat: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #12 + ldr r4, .L3510 + ldr r5, [r4, #-1280] + cmp r5, #0 + bne .L3480 + sub r6, r4, #1616 + mov r1, r5 + ldrh r2, [r6, #-12] + ldr r0, [r4, #-1372] + lsl r2, r2, #2 + bl ftl_memset + ldrh r2, [r6, #-12] + mov r1, r5 + ldr r0, [r4, #-1376] + lsl r2, r2, #2 + bl ftl_memset + sub r3, r4, #1728 + str r5, [r4, #-1612] + ldrh r0, [r3] + str r5, [r4, #-1608] + bl FtlFreeSysBlkQueueInit + bl FtlLoadBbt + cmp r0, #0 + beq .L3481 + bl FtlMakeBbt +.L3481: + ldr r0, .L3510+4 + mov r2, #0 +.L3482: + ldr r7, .L3510+8 + uxth r3, r2 + add r2, r2, #1 + ldrh r1, [r7] + cmp r3, r1, lsl #7 + blt .L3483 + sub r7, r7, #52 + ldrh r6, [r7, #-12] + mov r5, #0 +.L3484: + ldrh r3, [r7, #-10] + cmp r3, r6 + bhi .L3485 + ldr r10, .L3510+12 + sub r3, r5, #3 + ldrh r1, [r10, #-4] + cmp r3, r1, lsl #1 + blt .L3486 + mov r0, r5 + mov r5, #0 + bl __aeabi_uidiv + ldr r3, [r4, #-1632] + add r0, r0, r3 + uxth r0, r0 + bl FtlSysBlkNumInit + sub r3, r4, #1728 + ldrh r0, [r3] + bl FtlFreeSysBlkQueueInit + ldrh r6, [r7, #-12] +.L3487: + ldrh r3, [r7, #-10] + cmp r3, r6 + bhi .L3488 +.L3486: + mov r6, #0 + mov r8, r6 +.L3489: + ldrh r3, [r7, #-12] + uxth r0, r6 + add r6, r6, #1 + cmp r3, r0 + bhi .L3490 + ldrh r3, [r7, #-10] + ldr r2, [r4, #-1720] + ldrh r6, [r10, #-4] + str r3, [r4, #-1540] + mov r0, r2 + str r2, [sp, #4] + mov r1, r6 + bl __aeabi_uidiv + ldr r3, .L3510+16 + ubfx r10, r0, #5, #16 + add r1, r10, #36 + mov fp, r0 + str r0, [r4, #-1284] + strh r1, [r3] @ movhi + mov r1, #24 + mul r1, r1, r6 + mov r9, r3 + cmp r8, r1 + ble .L3491 + ldr r2, [sp, #4] + mov r1, r6 + sub r0, r2, r8 + bl __aeabi_uidiv + str r0, [r4, #-1284] + lsr r0, r0, #5 + add r0, r0, #24 + strh r0, [r9] @ movhi +.L3491: + ldr r2, [r4, #-1868] + cmp r2, #1 + bne .L3492 + ldrh r2, [r9] + mov r1, r6 + mov r0, r8 + str r2, [sp, #4] + bl __aeabi_uidiv + ldr r2, [sp, #4] + uxtah r0, r2, r0 + add r2, r2, r0, asr #2 + strh r2, [r9] @ movhi +.L3492: + ldrb r2, [r4, #-2740] @ zero_extendqisi2 + cmp r2, #0 + beq .L3493 + ldrh r2, [r9] + mov r1, r6 + mov r0, r8 + str r2, [sp, #4] + bl __aeabi_uidiv + ldr r2, [sp, #4] + uxtah r0, r2, r0 + add r2, r2, r0, asr #2 + strh r2, [r9] @ movhi +.L3493: + ldr r1, .L3510+20 + ldrh r2, [r1, #-8] + cmp r2, #0 + beq .L3495 + ldrh r0, [r9] + add r0, r0, r2, lsr #1 + strh r0, [r9] @ movhi + mul r0, r6, r2 + cmp r8, r0 + addlt r2, r2, #32 + strlt fp, [r4, #-1284] + addlt r2, r10, r2 + strhlt r2, [r9] @ movhi +.L3495: + ldrh r2, [r9] + ldr r3, [r4, #-1284] + sub r3, r3, r2 + mul r6, r6, r3 + ldrh r3, [r1, #-2] + str r6, [r4, #1148] + mul r6, r6, r3 + ldr r3, .L3510+24 + ldrh r3, [r3, #-12] + str r6, [r4, #-1284] + mul r6, r6, r3 + str r6, [r4, #-2736] + bl FtlBbmTblFlush + ldr r3, .L3510+24 + add r1, r5, r8 + ldr r2, [r4, #-1716] + ldrh r3, [r3, #-4] + add r3, r3, r2, lsr #3 + cmp r1, r3 + bls .L3497 + lsr r2, r2, #5 + ldr r0, .L3510+28 + bl rk_printk +.L3497: + ldrh r2, [r7, #-10] + mov r1, #0 + ldr r5, .L3510+32 + mvn r6, #0 + ldr r0, [r4, #-1404] + lsl r2, r2, #1 + bl ftl_memset + mov r3, #0 + movw r2, #1156 + strh r3, [r5, #2] @ movhi + sub r5, r5, #272 + str r3, [r4, #1124] + mov r1, #255 + strh r6, [r4, r2] @ movhi + strb r3, [r4, #1162] + ldrh r2, [r7, #-12] + mov r7, r5 + strb r3, [r4, #1164] + strh r3, [r5, #2] @ movhi + strb r3, [r4, #890] + strh r3, [r5] @ movhi + mov r3, #1 + strb r3, [r4, #892] + lsr r2, r2, #3 + ldr r3, .L3510+36 + ldr r0, [r3, #32] + bl ftl_memset +.L3498: + mov r0, r7 + bl make_superblock + ldrb r3, [r4, #891] @ zero_extendqisi2 + cmp r3, #0 + ldrh r3, [r5] + bne .L3499 + ldr r2, [r4, #-1404] + lsl r3, r3, #1 + strh r6, [r2, r3] @ movhi + ldrh r3, [r5] + add r3, r3, #1 + strh r3, [r5] @ movhi + b .L3498 +.L3483: + ldr ip, [r4, #-1452] + mvn r1, r3 + orr r1, r3, r1, lsl #16 + str r1, [ip, r3, lsl #2] + ldr r1, [r4, #-1448] + str r0, [r1, r3, lsl #2] + b .L3482 +.L3485: + mov r0, r6 + mov r1, #1 + bl FtlLowFormatEraseBlock + add r6, r6, #1 + add r5, r5, r0 + uxth r5, r5 + uxth r6, r6 + b .L3484 +.L3488: + mov r0, r6 + mov r1, #1 + bl FtlLowFormatEraseBlock + add r6, r6, #1 + add r5, r5, r0 + uxth r5, r5 + uxth r6, r6 + b .L3487 +.L3490: + mov r1, #0 + bl FtlLowFormatEraseBlock + add r8, r8, r0 + uxth r8, r8 + b .L3489 +.L3499: + ldr r2, [r4, #-1612] + lsl r3, r3, #1 + ldrh r1, [r5, #4] + mvn r6, #0 + str r2, [r4, #896] + add r2, r2, #1 + str r2, [r4, #-1612] + ldr r2, [r4, #-1404] + strh r1, [r2, r3] @ movhi + mov r2, #0 + ldr r3, .L3510+40 + strb r2, [r4, #938] + strh r2, [r3, #2] @ movhi + mov r7, r3 + ldrh r2, [r5] + mov r5, r3 + add r2, r2, #1 + strh r2, [r3] @ movhi + mov r2, #1 + strb r2, [r4, #940] +.L3500: + mov r0, r7 + bl make_superblock + ldrb r3, [r4, #939] @ zero_extendqisi2 + cmp r3, #0 + ldrh r3, [r5] + bne .L3501 + ldr r2, [r4, #-1404] + lsl r3, r3, #1 + strh r6, [r2, r3] @ movhi + ldrh r3, [r5] + add r3, r3, #1 + strh r3, [r5] @ movhi + b .L3500 +.L3501: + ldr r2, [r4, #-1612] + lsl r3, r3, #1 + ldrh r1, [r5, #4] + mvn r6, #0 + ldr r5, .L3510+44 + str r2, [r4, #944] + add r2, r2, #1 + str r2, [r4, #-1612] + ldr r2, [r4, #-1404] + strh r1, [r2, r3] @ movhi + strh r6, [r5], #148 @ movhi + bl FtlFreeSysBlkQueueOut + movw r3, #1128 + strh r6, [r5, #4] @ movhi + strh r0, [r4, r3] @ movhi + mov r3, #0 + strh r3, [r5, #2] @ movhi + ldr r3, [r4, #1148] + strh r3, [r5, #6] @ movhi + ldr r3, [r4, #-1612] + str r3, [r4, #1136] + add r3, r3, #1 + str r3, [r4, #-1612] + bl FtlVpcTblFlush + bl FtlSysBlkInit + cmp r0, #0 + ldreq r3, .L3510+48 + moveq r2, #1 + streq r2, [r3, #3440] +.L3480: + mov r0, #0 + add sp, sp, #12 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L3511: + .align 2 +.L3510: + .word .LANCHOR2 + .word 168778952 + .word .LANCHOR2-1660 + .word .LANCHOR2-1728 + .word .LANCHOR2+1152 + .word .LANCHOR2-1664 + .word .LANCHOR2-1648 + .word .LC162 + .word .LANCHOR2+1156 + .word .LANCHOR0 + .word .LANCHOR2+932 + .word .LANCHOR2+980 + .word .LANCHOR1 + .fnend + .size FtlLowFormat, .-FtlLowFormat + .align 2 + .global FtlReInitForSDUpdata + .syntax unified + .arm + .fpu softvfp + .type FtlReInitForSDUpdata, %function +FtlReInitForSDUpdata: + .fnstart + @ args = 0, pretend = 0, frame = 16 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, lr} + .save {r4, r5, lr} + .pad #20 + sub sp, sp, #20 + ldr r4, .L3548 + ldrb r3, [r4, #-2740] @ zero_extendqisi2 + cmp r3, #0 + beq .L3513 +.L3515: + mov r5, #0 +.L3512: + mov r0, r5 + add sp, sp, #20 + @ sp needed + pop {r4, r5, pc} +.L3513: + ldr r3, .L3548+4 + ldr r0, [r3] + bl FlashInit + subs r5, r0, #0 + bne .L3515 + bl FlashLoadFactorBbt + cmp r0, #0 + beq .L3516 + bl FlashMakeFactorBbt +.L3516: + ldr r0, [r4, #-1772] + bl FlashReadIdbDataRaw + cmp r0, #0 + beq .L3517 + mov r2, #16 + mov r1, #0 + mov r0, sp + bl FlashReadFacBbtData + ldr r1, [sp] + mov r3, #0 + mov r2, r3 + mov r0, #1 +.L3519: + ands ip, r1, r0, lsl r2 + add r2, r2, #1 + addne r3, r3, #1 + cmp r2, #16 + bne .L3519 + cmp r3, #6 + ldrls r3, .L3548+8 + bls .L3545 + mov r2, #0 + mov r0, #1 +.L3523: + ands ip, r1, r0, lsl r2 + add r2, r2, #1 + addne r3, r3, #1 + cmp r2, #24 + bne .L3523 + cmp r3, #17 + ldr r3, .L3548+8 + movhi r2, #36 +.L3545: + strb r2, [r3, #37] + ldr r3, .L3548+8 + ldrb r2, [r3, #37] @ zero_extendqisi2 + ldr r3, .L3548+12 + strh r2, [r3, #26] @ movhi +.L3517: + ldr r1, .L3548+16 + ldr r0, .L3548+20 + bl rk_printk + ldr r0, .L3548+12 + bl FtlConstantsInit + bl FtlVariablesInit + ldr r0, [r4, #-1728] + mov r4, #1 + uxth r0, r0 + bl FtlFreeSysBlkQueueInit +.L3525: + bl FtlLoadBbt + cmp r0, #0 + beq .L3526 +.L3547: + bl FtlLowFormat + cmp r4, #3 + mvnhi r5, #0 + bhi .L3512 +.L3527: + add r4, r4, #1 + b .L3525 +.L3526: + bl FtlSysBlkInit + cmp r0, #0 + bne .L3547 + ldr r3, .L3548+24 + mov r2, #1 + str r2, [r3, #3440] + b .L3512 +.L3549: + .align 2 +.L3548: + .word .LANCHOR2 + .word RK29_NANDC_REG_BASE + .word .LANCHOR0 + .word .LANCHOR2-2768 + .word .LC145 + .word .LC49 + .word .LANCHOR1 + .fnend + .size FtlReInitForSDUpdata, .-FtlReInitForSDUpdata + .align 2 + .global Ftl_gc_temp_data_write_back + .syntax unified + .arm + .fpu softvfp + .type Ftl_gc_temp_data_write_back, %function +Ftl_gc_temp_data_write_back: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + ldr r4, .L3566 + ldr r3, [r4, #-1280] + cmp r3, #0 + beq .L3551 +.L3554: + mov r0, #0 + pop {r4, r5, r6, pc} +.L3551: + ldrb r3, [r4, #-2740] @ zero_extendqisi2 + cmp r3, #0 + beq .L3553 + ldr r3, [r4, #1732] + tst r3, #1 + beq .L3553 + add r3, r4, #980 + ldrh r3, [r3, #4] + cmp r3, #0 + bne .L3554 +.L3553: + mov r3, #0 + mov r5, #0 + mov r6, #36 + mov r2, r3 + ldr r1, [r4, #1732] + ldr r0, [r4, #-1496] + bl FlashProgPages +.L3555: + ldr r1, [r4, #1732] + uxth r3, r5 + cmp r3, r1 + bcc .L3557 + ldr r0, [r4, #-1496] + bl FtlGcBufFree + mov r3, #0 + str r3, [r4, #1732] + ldr r3, .L3566+4 + ldrh r3, [r3, #4] + cmp r3, #0 + bne .L3554 + mov r0, #1 + bl FtlGcFreeTempBlock + b .L3565 +.L3557: + mul r3, r6, r3 + ldr r2, [r4, #-1496] + add r5, r5, #1 + ldr ip, [r2, r3] + add r1, r2, r3 + ldr r0, [r1, #12] + cmn ip, #1 + bne .L3556 + ldr r1, .L3566+4 + mov lr, #0 + ldr r0, [r4, #-1404] + ldrh r2, [r1] + lsl r2, r2, #1 + strh lr, [r0, r2] @ movhi + ldr r2, [r4, #1300] + strh ip, [r1] @ movhi + add r2, r2, #1 + str r2, [r4, #1300] + ldr r2, [r4, #-1496] + add r3, r2, r3 + ldr r0, [r3, #4] + ubfx r0, r0, #10, #16 + bl FtlBbmMapBadBlock + bl FtlBbmTblFlush + bl FtlGcPageVarInit +.L3565: + mov r0, #1 + pop {r4, r5, r6, pc} +.L3556: + ldr r2, [r0, #8] + ldr r1, [r1, #4] + ldr r0, [r0, #12] + bl FtlGcUpdatePage + b .L3555 +.L3567: + .align 2 +.L3566: + .word .LANCHOR2 + .word .LANCHOR2+980 + .fnend + .size Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back + .align 2 + .global Ftl_get_new_temp_ppa + .syntax unified + .arm + .fpu softvfp + .type Ftl_get_new_temp_ppa, %function +Ftl_get_new_temp_ppa: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L3575 + movw r2, #65535 + ldrh r1, [r3] + cmp r1, r2 + beq .L3569 + ldrh r3, [r3, #4] + cmp r3, #0 + ldrne r0, .L3575 + bne .L3574 +.L3569: + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + mov r4, #0 + ldr r5, .L3575+4 + bl FtlCacheWriteBack + mov r0, #0 + bl FtlGcFreeTempBlock + add r0, r5, #980 + strb r4, [r5, #988] + bl allocate_data_superblock + movw r3, #1756 + strh r4, [r5, r3] @ movhi + movw r3, #1758 + strh r4, [r5, r3] @ movhi + bl l2p_flush + mov r0, r4 + bl FtlEctTblFlush + bl FtlVpcTblFlush + pop {r4, r5, r6, lr} + ldr r0, .L3575 +.L3574: + b get_new_active_ppa +.L3576: + .align 2 +.L3575: + .word .LANCHOR2+980 + .word .LANCHOR2 + .fnend + .size Ftl_get_new_temp_ppa, .-Ftl_get_new_temp_ppa + .align 2 + .global ftl_read + .syntax unified + .arm + .fpu softvfp + .type ftl_read, %function +ftl_read: + .fnstart + @ args = 0, pretend = 0, frame = 56 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr ip, .L3621 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #84 + sub sp, sp, #84 + ldr ip, [ip, #3440] + cmp ip, #1 + bne .L3601 + cmp r0, #16 + mov r8, r3 + str r2, [sp, #28] + mov r5, r1 + bne .L3579 + mov r2, r3 + ldr r1, [sp, #28] + add r0, r5, #256 + bl FtlVendorPartRead + mov r10, r0 +.L3577: + mov r0, r10 + add sp, sp, #84 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L3579: + ldr r4, .L3621+4 + ldr r2, [sp, #28] + ldr r3, [r4, #-2736] + cmp r2, r3 + cmpls r1, r3 + bcs .L3601 + add r2, r1, r2 + cmp r3, r2 + str r2, [sp, #44] + bcc .L3601 + sub r3, r4, #1648 + mov r0, r5 + ldrh r6, [r3, #-12] + mov r1, r6 + bl __aeabi_uidiv + ldr r3, [sp, #44] + mov r1, r6 + str r0, [sp, #36] + sub r0, r3, #1 + bl __aeabi_uidiv + ldr r3, [sp, #36] + mov r1, r0 + ldr r2, [sp, #28] + str r0, [sp, #40] + rsb r3, r3, #1 + add r3, r3, r0 + ldr r0, [sp, #36] + str r3, [sp, #32] + ldr r3, [r4, #1720] + add r3, r3, r2 + ldr r2, [sp, #32] + str r3, [r4, #1720] + ldr r3, [r4, #-1584] + add r3, r3, r2 + str r3, [r4, #-1584] + bl FtlCacheMetchLpa + cmp r0, #0 + beq .L3580 + bl FtlCacheWriteBack +.L3580: + ldr r6, [sp, #36] + mov r3, #0 + ldr r4, .L3621+4 + mov r7, r3 + mov r10, r3 + str r3, [sp, #52] + str r3, [sp, #48] +.L3581: + ldr r3, [sp, #32] + cmp r3, #0 + bne .L3598 + ldr r3, .L3621+8 + ldrh r3, [r3, #-2] + cmp r3, #0 + beq .L3577 + mov r1, #1 + ldr r0, [sp, #32] + bl ftl_do_gc + b .L3577 +.L3598: + mov r2, #0 + add r1, sp, #76 + mov r0, r6 + bl log2phys + ldr r3, [sp, #76] + cmn r3, #1 + moveq r9, #0 + beq .L3583 + ldr r2, [r4, #-1500] + mov r9, #36 + mla r9, r9, r7, r2 + str r3, [r9, #4] + ldr r3, [sp, #36] + cmp r6, r3 + bne .L3587 + ldr r3, [r4, #-1452] + mov r0, r5 + str r3, [r9, #8] + ldr r3, .L3621+12 + ldrh fp, [r3, #-12] + mov r1, fp + bl __aeabi_uidivmod + ldr r2, [sp, #28] + sub r3, fp, r1 + str r1, [sp, #56] + cmp r2, r3 + movcc r3, r2 + cmp r3, fp + str r3, [sp, #48] + streq r8, [r9, #8] +.L3588: + ldr r3, .L3621+12 + ldr r2, [r4, #-1436] + str r6, [r9, #16] + ldrh r3, [r3, #-6] + mul r3, r7, r3 + add r7, r7, #1 + bic r3, r3, #3 + add r3, r2, r3 + str r3, [r9, #12] + b .L3586 +.L3585: + mla r0, r0, r6, r9 + ldr r2, [sp, #44] + cmp r5, r0 + movls r3, #1 + movhi r3, #0 + cmp r2, r0 + movls r3, #0 + cmp r3, #0 + beq .L3584 + sub r0, r0, r5 + mov r2, #512 + mov r1, #0 + add r0, r8, r0, lsl #9 + bl ftl_memset +.L3584: + add r9, r9, #1 +.L3583: + ldr r3, .L3621+16 + ldrh r0, [r3] + cmp r9, r0 + bcc .L3585 +.L3586: + ldr r3, [sp, #32] + add r6, r6, #1 + subs r3, r3, #1 + str r3, [sp, #32] + beq .L3590 + ldr r3, .L3621+20 + ldrh r3, [r3] + cmp r7, r3, lsl #3 + bne .L3581 +.L3590: + cmp r7, #0 + beq .L3581 + mov r2, #0 + mov r1, r7 + ldr r0, [r4, #-1500] + mov fp, #0 + bl FlashReadPages + ldr r3, [sp, #52] + lsl r3, r3, #9 + str r3, [sp, #68] + ldr r3, [sp, #56] + lsl r3, r3, #9 + str r3, [sp, #60] + ldr r3, [sp, #48] + lsl r3, r3, #9 + str r3, [sp, #64] +.L3597: + mov r9, #36 + ldr r3, [r4, #-1500] + mul r9, r9, fp + ldr r1, [sp, #36] + add r3, r3, r9 + ldr r2, [r3, #16] + cmp r1, r2 + bne .L3592 + ldr r1, [r3, #8] + ldr r3, [r4, #-1452] + cmp r1, r3 + bne .L3593 + ldr r3, [sp, #60] + mov r0, r8 + ldr r2, [sp, #64] + add r1, r1, r3 +.L3620: + bl ftl_memcpy +.L3593: + ldr r3, [r4, #-1500] + ldr r2, [r3, r9] + add r1, r3, r9 + cmn r2, #1 + ldreq r3, [r4, #1276] + moveq r10, r2 + addeq r3, r3, #1 + streq r3, [r4, #1276] + ldr r3, [r1, #12] + ldr r2, [r1, #16] + ldr r3, [r3, #8] + cmp r2, r3 + beq .L3595 + ldr r3, [r4, #1276] + add r3, r3, #1 + str r3, [r4, #1276] + ldr r2, [r1, #8] + ldr r3, [r1, #12] + ldr r0, [r2, #4] + str r0, [sp, #16] + ldr r2, [r2] + ldr r0, .L3621+24 + str r2, [sp, #12] + ldr r2, [r3, #12] + str r2, [sp, #8] + ldr r2, [r3, #8] + str r2, [sp, #4] + ldr r2, [r3, #4] + str r2, [sp] + ldr r2, [r1, #4] + ldr r3, [r3] + ldr r1, [r1, #16] + bl rk_printk +.L3595: + ldr r3, [r4, #-1500] + add r2, r3, r9 + ldr r3, [r3, r9] + cmp r3, #256 + bne .L3596 + ldr r0, [r2, #4] + ubfx r0, r0, #10, #16 + bl P2V_block_in_plane + bl FtlGcRefreshBlock +.L3596: + add fp, fp, #1 + cmp r7, fp + bne .L3597 + mov r7, #0 + b .L3581 +.L3587: + ldr r3, [sp, #40] + cmp r6, r3 + bne .L3589 + ldr r3, [r4, #-1448] + ldr r1, [sp, #44] + str r3, [r9, #8] + ldr r3, .L3621+12 + ldrh r2, [r3, #-12] + mul r3, r2, r6 + sub r1, r1, r3 + cmp r2, r1 + str r1, [sp, #52] + bne .L3588 +.L3619: + sub r3, r3, r5 + add r3, r8, r3, lsl #9 + str r3, [r9, #8] + b .L3588 +.L3589: + ldr r3, .L3621+12 + ldrh r3, [r3, #-12] + mul r3, r6, r3 + b .L3619 +.L3592: + ldr r1, [sp, #40] + cmp r1, r2 + bne .L3593 + ldr r1, [r3, #8] + ldr r3, [r4, #-1448] + cmp r1, r3 + bne .L3593 + ldr r3, .L3621+16 + ldr r2, [sp, #68] + ldrh r0, [r3] + ldr r3, [sp, #40] + mul r0, r3, r0 + sub r0, r0, r5 + add r0, r8, r0, lsl #9 + b .L3620 +.L3601: + mvn r10, #0 + b .L3577 +.L3622: + .align 2 +.L3621: + .word .LANCHOR1 + .word .LANCHOR2 + .word .LANCHOR2-1520 + .word .LANCHOR2-1648 + .word .LANCHOR2-1660 + .word .LANCHOR2-1732 + .word .LC58 + .fnend + .size ftl_read, .-ftl_read + .align 2 + .global ftl_vendor_read + .syntax unified + .arm + .fpu softvfp + .type ftl_vendor_read, %function +ftl_vendor_read: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + mov r3, r2 + mov r2, r1 + mov r1, r0 + mov r0, #16 + b ftl_read + .fnend + .size ftl_vendor_read, .-ftl_vendor_read + .align 2 + .global ftl_sys_read + .syntax unified + .arm + .fpu softvfp + .type ftl_sys_read, %function +ftl_sys_read: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + mov r3, r2 + mov r2, r1 + add r1, r0, #256 + mov r0, #16 + b ftl_read + .fnend + .size ftl_sys_read, .-ftl_sys_read + .align 2 + .global FtlInit + .syntax unified + .arm + .fpu softvfp + .type FtlInit, %function +FtlInit: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + mvn r3, #0 + ldr r6, .L3642 + ldr r4, .L3642+4 + ldr r1, .L3642+8 + str r3, [r6, #3440] + mov r3, #0 + ldr r0, .L3642+12 + str r3, [r4, #1948] + str r3, [r4, #-1280] + bl rk_printk + sub r0, r4, #2768 + bl FtlConstantsInit + bl FtlMemInit + bl FtlVariablesInit + sub r3, r4, #1728 + ldrh r0, [r3] + bl FtlFreeSysBlkQueueInit + bl FtlLoadBbt + cmp r0, #0 + beq .L3626 + ldr r1, .L3642+16 + ldr r0, .L3642+20 +.L3641: + bl rk_printk +.L3627: + mov r0, #0 + pop {r4, r5, r6, r7, r8, pc} +.L3626: + bl FtlSysBlkInit + subs r5, r0, #0 + ldrne r1, .L3642+16 + ldrne r0, .L3642+24 + bne .L3641 +.L3628: + mov r1, #1 + str r1, [r6, #3440] + bl ftl_do_gc + add r3, r4, #880 + ldrh r7, [r3] + mov r6, r3 + cmp r7, #15 + bhi .L3629 + add r8, r3, #276 + sub r4, r4, #1536 +.L3632: + ldrh r3, [r8] + movw r2, #65535 + cmp r3, r2 + bne .L3630 + ldrh r2, [r4] + cmp r2, r3 + bne .L3630 + and r0, r5, #63 + bl List_get_gc_head_node + uxth r0, r0 + bl FtlGcRefreshBlock +.L3630: + mov r1, #1 + mov r0, r1 + bl ftl_do_gc + mov r1, #1 + mov r0, #0 + bl ftl_do_gc + ldrh r2, [r6] + add r3, r7, #2 + cmp r2, r3 + bhi .L3627 + add r5, r5, #1 + cmp r5, #4096 + bne .L3632 + b .L3627 +.L3629: + ldrb r3, [r4, #-2740] @ zero_extendqisi2 + cmp r3, #0 + beq .L3627 + mov r4, #128 +.L3634: + mov r1, #1 + mov r0, r1 + bl ftl_do_gc + subs r4, r4, #1 + bne .L3634 + b .L3627 +.L3643: + .align 2 +.L3642: + .word .LANCHOR1 + .word .LANCHOR2 + .word .LC145 + .word .LC49 + .word .LANCHOR3+224 + .word .LC163 + .word .LC164 + .fnend + .size FtlInit, .-FtlInit + .align 2 + .global ftl_write + .syntax unified + .arm + .fpu softvfp + .type ftl_write, %function +ftl_write: + .fnstart + @ args = 0, pretend = 0, frame = 80 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov fp, r3 + ldr r4, .L3712 + .pad #84 + sub sp, sp, #84 + ldr r3, [r4, #-1280] + cmp r3, #0 + bne .L3685 + mov r9, r2 + ldr r2, .L3712+4 + ldr r2, [r2, #3440] + cmp r2, #1 + movne r0, r3 + bne .L3644 + cmp r0, #16 + mov r7, r1 + bne .L3646 + mov r2, fp + mov r1, r9 + add r0, r7, #256 + bl FtlVendorPartWrite +.L3644: + add sp, sp, #84 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L3646: + ldr r3, [r4, #-2736] + cmp r9, r3 + cmpls r1, r3 + bcs .L3688 + add r6, r1, r9 + cmp r3, r6 + bcc .L3688 + mov r3, #2048 + mov r0, r7 + str r3, [r4, #1952] + sub r3, r4, #1648 + ldrh r5, [r3, #-12] + mov r1, r5 + bl __aeabi_uidiv + mov r1, r5 + str r0, [sp] + sub r0, r6, #1 + bl __aeabi_uidiv + ldr r2, [sp] + cmp r9, r5, lsl #1 + ldr r3, [r4, #-1600] + str r0, [sp, #24] + sub r6, r0, r2 + ldr r2, [r4, #-1512] + add r8, r6, #1 + add r3, r3, r8 + str r3, [r4, #-1600] + ldr r3, [r4, #1716] + add r3, r3, r9 + str r3, [r4, #1716] + movcs r3, #1 + movcc r3, #0 + cmp r2, #0 + str r3, [sp, #16] + beq .L3689 + mov r3, #36 + mul r3, r3, r2 + ldr r2, [r4, #-1480] + sub r3, r3, #36 + add r10, r2, r3 + ldr r3, [sp] + ldr r2, [r10, #16] + cmp r3, r2 + strne fp, [sp, #12] + bne .L3649 + ldr r2, [r4, #-1592] + mov r1, r5 + mov r0, r7 + add r2, r2, #1 + str r2, [r4, #-1592] + ldr r2, [r4, #1956] + add r2, r2, #1 + str r2, [r4, #1956] + bl __aeabi_uidivmod + sub r5, r5, r1 + ldr r3, [r10, #8] + cmp r9, r5 + mov r0, r1 + movcc r5, r9 + mov r1, fp + lsl r8, r5, #9 + add r0, r3, r0, lsl #9 + mov r2, r8 + bl ftl_memcpy + cmp r6, #0 + bne .L3650 + ldr r3, [r4, #1956] + cmp r3, #2 + bgt .L3650 +.L3685: + mov r0, #0 + b .L3644 +.L3650: + add r3, fp, r8 + sub r9, r9, r5 + str r3, [sp, #12] + add r7, r7, r5 + ldr r3, [sp] + mov r8, r6 + add r3, r3, #1 + str r3, [sp] +.L3649: + mov r3, #0 + str r3, [r4, #1956] +.L3648: + ldr r1, [sp, #24] + ldr r0, [sp] + bl FtlCacheMetchLpa + cmp r0, #0 + beq .L3651 + bl FtlCacheWriteBack +.L3651: + ldr r5, .L3712+8 + ldr r6, [sp] + sub r10, r5, #884 + str r5, [r4, #1940] + sub r3, r10, #1648 + str r3, [sp, #4] +.L3652: + cmp r8, #0 + bne .L3680 + ldr r3, [sp, #24] + mov r0, r8 + ldr r2, [sp] + sub r1, r3, r2 + bl ftl_do_gc + ldr r2, .L3712+12 + ldrh r3, [r2] + mov r6, r2 + cmp r3, #5 + bls .L3681 + cmp r3, #31 + bhi .L3685 + ldr r3, .L3712+16 + ldrb r3, [r3, #36] @ zero_extendqisi2 + cmp r3, #0 + bne .L3685 +.L3681: + ldr r5, .L3712 + ldr r7, .L3712+20 + sub r4, r5, #1520 +.L3684: + ldrh r2, [r7] + movw r3, #65535 + cmp r2, r3 + bne .L3683 + ldr r3, .L3712+24 + ldrh r3, [r3] + cmp r3, r2 + bne .L3683 + ldrh r2, [r4, #-14] + cmp r2, r3 + bne .L3683 + and r0, r8, #7 + bl List_get_gc_head_node + uxth r0, r0 + bl FtlGcRefreshBlock +.L3683: + mov r1, #1 + mov r3, #128 + mov r0, r1 + strh r3, [r4, #-6] @ movhi + strh r3, [r4, #-8] @ movhi + bl ftl_do_gc + mov r1, #1 + mov r0, #0 + bl ftl_do_gc + ldr r3, [r5, #-1280] + cmp r3, #0 + bne .L3685 + ldrh r3, [r6] + cmp r3, #2 + bhi .L3685 + add r8, r8, #1 + cmp r8, #256 + bne .L3684 + b .L3685 +.L3689: + str fp, [sp, #12] + b .L3648 +.L3680: + ldrh r1, [r5, #4] + cmp r1, #0 + bne .L3653 + ldr r2, .L3712+8 + ldr r4, .L3712+4 + cmp r5, r2 + bne .L3654 + add r0, r5, #48 + ldrh fp, [r0, #4] + cmp fp, #0 + bne .L3655 + bl allocate_new_data_superblock + str fp, [r4, #3448] +.L3655: + ldr r0, .L3712+8 + bl allocate_new_data_superblock + ldr r5, .L3712+8 + ldr r2, [r4, #3448] + add r0, r5, #48 + cmp r2, #0 + movne r5, r0 +.L3656: + ldrh r2, [r5, #4] + cmp r2, #0 + bne .L3657 + mov r0, r5 + bl allocate_new_data_superblock +.L3657: + str r5, [r10, #1940] +.L3653: + ldr r1, [r10, #-1512] + ldr r2, [r10, #-1516] + sub r2, r2, r1 + ldrh r1, [r5, #4] + cmp r2, r8 + movcs r2, r8 + cmp r1, r2 + movcc r3, r1 + movcs r3, r2 + str r3, [sp, #36] + mov r3, #0 +.L3710: + str r3, [sp, #20] + ldr r3, [sp, #20] + ldr r2, [sp, #36] + cmp r3, r2 + bne .L3676 +.L3659: + ldr r3, [sp, #20] + ldr r2, [r10, #-1512] + ldr r1, [r10, #-1516] + sub r8, r8, r3 + ldr r3, [sp, #16] + cmp r2, r1 + orrcs r3, r3, #1 + cmp r3, #0 + bne .L3677 + ldrh r2, [r5, #4] + cmp r2, #0 + beq .L3677 +.L3679: + mov r3, #0 + str r3, [sp, #16] + b .L3652 +.L3654: + str r1, [r4, #3448] + ldrh r1, [r2, #4] + cmp r1, #0 + movne r5, r2 + bne .L3657 + mov r0, r5 + bl allocate_new_data_superblock + b .L3656 +.L3676: + ldrh r2, [r5, #4] + cmp r2, #0 + beq .L3659 + ldr r3, [sp, #24] + sub r4, r3, r6 + ldr r3, [sp, #16] + clz r4, r4 + lsr r4, r4, #5 + and r2, r4, r3 + ldr r3, [sp, #20] + cmp r3, #0 + moveq r2, #0 + andne r2, r2, #1 + cmp r2, #0 + beq .L3660 + ldr r2, .L3712+28 + ldrh r1, [r2] + add r2, r7, r9 + mls r2, r1, r6, r2 + cmp r1, r2 + bne .L3659 +.L3660: + mov r2, #0 + add r1, sp, #40 + mov r0, r6 + mov fp, #36 + bl log2phys + mov r0, r5 + bl get_new_active_ppa + ldr r1, [r10, #-1512] + ldr ip, [r10, #-1480] + ldr r3, [sp, #4] + mla ip, fp, r1, ip + ldrh r2, [r3, #-6] + str r0, [ip, #4] + mul r0, r2, r1 + str r6, [ip, #16] + bic r3, r0, #3 + str r3, [sp, #28] + ldr r0, [sp, #28] + ldr r3, [r10, #-1428] + str r3, [sp, #32] + add r3, r3, r0 + str r3, [sp, #8] + str r3, [ip, #12] + ldr r3, [sp, #4] + ldrh r0, [r3, #-8] + mul r1, r1, r0 + ldr r0, [r10, #-1456] + bic r1, r1, #3 + add r1, r0, r1 + ldr r0, [sp, #8] + str r1, [ip, #8] + mov r1, #0 + bl ftl_memset + ldr r3, [sp] + cmp r3, r6 + orreq r4, r4, #1 + cmp r4, #0 + beq .L3661 + cmp r3, r6 + bne .L3662 + ldr r3, [sp, #4] + mov r0, r7 + ldrh r4, [r3, #-12] + mov r1, r4 + bl __aeabi_uidivmod + sub r4, r4, r1 + mov fp, r1 + cmp r4, r9 + movcs r4, r9 +.L3663: + ldr r3, [sp, #4] + ldrh r2, [r3, #-12] + cmp r2, r4 + bne .L3664 + ldr r3, [sp] + cmp r3, r6 + mulne r1, r4, r6 + ldrne r3, [sp, #12] + ldreq r1, [sp, #12] + subne r1, r1, r7 + addne r1, r3, r1, lsl #9 + ldr r3, [sp, #16] + cmp r3, #0 + beq .L3666 + ldr r2, [r10, #-1512] + mov ip, #36 + ldr r0, [r10, #-1480] + mla r2, ip, r2, r0 + str r1, [r2, #8] +.L3667: + ldr r2, .L3712+32 + ldr r3, [sp, #32] + ldr r1, [sp, #28] + strh r2, [r3, r1] @ movhi + ldr r3, [sp, #8] + ldr r2, [r10, #-1608] + str r2, [r3, #4] + add r2, r2, #1 + cmn r2, #1 + ldr r3, [sp, #8] + moveq r2, #0 + str r2, [r10, #-1608] + ldr r2, [sp, #40] + str r6, [r3, #8] + add r6, r6, #1 + str r2, [r3, #12] + ldrh r2, [r5] + strh r2, [r3, #2] @ movhi + ldr r2, [r10, #-1512] + ldr r3, [sp, #20] + add r2, r2, #1 + str r2, [r10, #-1512] + add r3, r3, #1 + b .L3710 +.L3662: + ldr r3, [sp, #4] + add r4, r7, r9 + mov fp, #0 + ldrh r2, [r3, #-12] + smulbb r2, r2, r6 + sub r4, r4, r2 + uxth r4, r4 + b .L3663 +.L3666: + ldr r2, [r10, #-1480] + mov ip, #36 + ldr r0, [r10, #-1512] + ldr r3, [sp, #4] + mla r0, ip, r0, r2 + ldrh r2, [r3, #-8] +.L3711: + ldr r0, [r0, #8] + b .L3708 +.L3664: + ldr r2, [sp, #40] + cmn r2, #1 + beq .L3668 + ldr r1, [r10, #-1480] + mov r0, #36 + str r2, [sp, #48] + ldr r2, [r10, #-1512] + str r6, [sp, #60] + mla r2, r0, r2, r1 + add r0, sp, #44 + ldr r1, [r2, #8] + ldr r2, [r2, #12] + str r1, [sp, #52] + mov r1, #1 + str r2, [sp, #56] + mov r2, #0 + bl FlashReadPages + ldr r2, [sp, #44] + cmn r2, #1 + ldreq r2, [r10, #1276] + addeq r2, r2, #1 + streq r2, [r10, #1276] + beq .L3671 + ldr r3, [sp, #8] + ldr r2, [r3, #8] + cmp r6, r2 + beq .L3671 + ldr r2, [r10, #1276] + ldr r0, .L3712+36 + add r2, r2, #1 + str r2, [r10, #1276] + mov r2, r6 + ldr r1, [r3, #8] + bl rk_printk +.L3671: + ldr r3, [sp] + lsl r2, r4, #9 + cmp r3, r6 + bne .L3672 + ldr r0, [r10, #-1480] + mov ip, #36 + ldr r1, [r10, #-1512] + mla r1, ip, r1, r0 + ldr r0, [r1, #8] + ldr r1, [sp, #12] + add r0, r0, fp, lsl #9 +.L3708: + bl ftl_memcpy + b .L3667 +.L3668: + ldr r2, [r10, #-1480] + mov r1, #36 + ldr r0, [r10, #-1512] + ldr r3, [sp, #4] + mla r0, r1, r0, r2 + ldrh r2, [r3, #-8] + mov r1, #0 + ldr r0, [r0, #8] + bl ftl_memset + b .L3671 +.L3672: + ldr r1, .L3712+28 + mov lr, #36 + ldr r0, [r10, #-1512] + ldr ip, [r10, #-1480] + ldrh r1, [r1] + ldr r3, [sp, #12] + mla r0, lr, r0, ip + mul r1, r6, r1 + sub r1, r1, r7 + add r1, r3, r1, lsl #9 + b .L3711 +.L3661: + ldr r3, [sp, #16] + cmp r3, #0 + beq .L3673 + ldr r2, [r10, #-1512] + ldr r1, [r10, #-1480] + ldr r3, [sp, #4] + mla fp, fp, r2, r1 + ldrh r2, [r3, #-12] + ldr r3, [sp, #12] + mul r2, r6, r2 + sub r2, r2, r7 + add r2, r3, r2, lsl #9 + str r2, [fp, #8] + b .L3667 +.L3673: + ldr r3, [sp, #4] + ldr r2, [r10, #-1512] + ldr r0, [r10, #-1480] + ldrh r1, [r3, #-12] + mla fp, fp, r2, r0 + ldrh r2, [r3, #-8] + ldr r3, [sp, #12] + mul r1, r6, r1 + ldr r0, [fp, #8] + sub r1, r1, r7 + add r1, r3, r1, lsl #9 + b .L3708 +.L3677: + bl FtlCacheWriteBack + cmp r8, #1 + mov r2, #0 + str r2, [r10, #-1512] + bhi .L3652 + b .L3679 +.L3688: + mvn r0, #0 + b .L3644 +.L3713: + .align 2 +.L3712: + .word .LANCHOR2 + .word .LANCHOR1 + .word .LANCHOR2+884 + .word .LANCHOR2+880 + .word .LANCHOR0 + .word .LANCHOR2+1156 + .word .LANCHOR2-1536 + .word .LANCHOR2-1660 + .word -3947 + .word .LC165 + .fnend + .size ftl_write, .-ftl_write + .align 2 + .global ftl_vendor_write + .syntax unified + .arm + .fpu softvfp + .type ftl_vendor_write, %function +ftl_vendor_write: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + mov r3, r2 + mov r2, r1 + mov r1, r0 + mov r0, #16 + b ftl_write + .fnend + .size ftl_vendor_write, .-ftl_vendor_write + .align 2 + .global ftl_sys_write + .syntax unified + .arm + .fpu softvfp + .type ftl_sys_write, %function +ftl_sys_write: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + mov r3, r2 + mov r2, r1 + add r1, r0, #256 + mov r0, #16 + b ftl_write + .fnend + .size ftl_sys_write, .-ftl_sys_write + .align 2 + .global ftl_fix_nand_power_lost_error + .syntax unified + .arm + .fpu softvfp + .type ftl_fix_nand_power_lost_error, %function +ftl_fix_nand_power_lost_error: + .fnstart + @ args = 0, pretend = 0, frame = 48 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + .pad #48 + sub sp, sp, #48 + ldr r4, .L3731 + ldrb r3, [r4, #-2740] @ zero_extendqisi2 + cmp r3, #0 + beq .L3716 + movw r3, #1794 + add r8, r4, #884 + ldrh r6, [r4, r3] + add r5, r4, #932 + ldr r3, [r4, #-1404] + ldr r0, .L3731+4 + mov r1, r6 + lsl r7, r6, #1 + ldrh r2, [r3, r7] + bl rk_printk + ldrh r0, [r8] + bl FtlGcRefreshOpenBlock + ldrh r0, [r5] + bl FtlGcRefreshOpenBlock + mov r0, r8 + bl allocate_new_data_superblock + mov r0, r5 + movw r5, #4097 + bl allocate_new_data_superblock +.L3718: + subs r5, r5, #1 + beq .L3722 + mov r1, #1 + mov r0, r1 + bl ftl_do_gc + ldr r3, [r4, #-1404] + ldrh r3, [r3, r7] + cmp r3, #0 + bne .L3718 +.L3722: + ldr r3, [r4, #-1404] + mov r1, r6 + ldr r0, .L3731+4 + ldrh r2, [r3, r7] + bl rk_printk + ldr r3, [r4, #-1404] + ldrh r5, [r3, r7] + cmp r5, #0 + bne .L3720 + add r0, sp, #48 + movw r9, #65535 + strh r6, [r0, #-48]! @ movhi + mov r10, #36 + bl make_superblock + ldr r3, .L3731+8 + add r0, sp, #14 + ldr r8, [r4, #-1488] + mov r2, r5 + mov ip, r5 + ldrh lr, [r3, #-4] +.L3723: + uxth r3, r2 + cmp lr, r3 + bhi .L3725 + ldr r3, [r4, #-1404] + mov r1, r6 + ldr r0, .L3731+12 + ldrh r2, [r3, r7] + bl rk_printk + mov r2, r5 + mov r1, #0 + ldr r0, [r4, #-1488] + bl FlashEraseBlocks + mov r2, r5 + mov r1, #1 + ldr r0, [r4, #-1488] + bl FlashEraseBlocks +.L3720: + mvn r2, #0 + movw r3, #1794 + strh r2, [r4, r3] @ movhi +.L3716: + add sp, sp, #48 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L3725: + ldrh r3, [r0, #2]! + add r2, r2, #1 + cmp r3, r9 + mlane r1, r10, r5, r8 + lslne r3, r3, #10 + addne r5, r5, #1 + uxthne r5, r5 + stmibne r1, {r3, ip} + strne ip, [r1, #12] + b .L3723 +.L3732: + .align 2 +.L3731: + .word .LANCHOR2 + .word .LC166 + .word .LANCHOR2-1728 + .word .LC167 + .fnend + .size ftl_fix_nand_power_lost_error, .-ftl_fix_nand_power_lost_error + .global gc_ink_free_return_value + .global check_valid_page_count_table + .global FtlUpdateVaildLpnCount + .global g_ect_tbl_power_up_flush + .global last_cache_match_count + .global power_up_flag + .global g_LowFormat + .global gFtlInitStatus + .global DeviceCapacity + .global ToshibaRefValue + .global Toshiba15RefValue + .global ToshibaA19RefValue + .global SamsungRefValue + .global refValueDefault + .global FbbtBlk + .global random_seed + .global gSlcNandParaInfo + .global gNandParaInfo + .global g_page_map_check_enable + .global g_power_lost_ecc_error_blk + .global g_power_lost_recovery_flag + .global c_mlc_erase_count_value + .global g_recovery_ppa_tbl + .global g_recovery_page_min_ver + .global g_recovery_page_num + .global g_cur_erase_blk + .global g_gc_skip_write_count + .global g_gc_head_data_block_count + .global g_gc_head_data_block + .global g_ftl_nand_free_count + .global g_in_swl_replace + .global g_in_gc_progress + .global g_all_blk_used_slc_mode + .global g_max_erase_count + .global g_totle_sys_slc_erase_count + .global g_totle_slc_erase_count + .global g_min_erase_count + .global g_totle_avg_erase_count + .global g_totle_mlc_erase_count + .global g_totle_l2p_write_count + .global g_totle_cache_write_count + .global g_tmp_data_superblock_id + .global g_totle_read_page_count + .global g_totle_discard_page_count + .global g_totle_read_sector + .global g_totle_write_sector + .global g_totle_write_page_count + .global g_totle_gc_page_count + .global g_gc_blk_index + .global g_gc_merge_free_blk_threshold + .global g_gc_free_blk_threshold + .global g_gc_refresh_block_temp_tbl + .global g_free_slc_blk_num + .global g_gc_refresh_block_temp_num + .global g_gc_bad_block_temp_tbl + .global g_gc_bad_block_gc_index + .global g_gc_bad_block_temp_num + .global g_gc_next_blk_3 + .global g_gc_next_blk_2 + .global g_gc_next_blk_1 + .global g_gc_next_blk + .global g_gc_cur_blk_max_valid_pages + .global g_gc_cur_blk_valid_pages + .global g_gc_page_offset + .global g_gc_blk_num + .global p_gc_blk_tbl + .global p_gc_page_info + .global g_sys_ext_data + .global g_sys_save_data + .global gp_last_act_superblock + .global g_gc_superblock + .global g_gc_temp_superblock + .global g_buffer_superblock + .global g_active_superblock + .global g_num_data_superblocks + .global g_num_free_superblocks + .global p_data_block_list_tail + .global p_data_block_list_head + .global p_free_data_block_list_head + .global p_data_block_list_table + .global g_l2p_last_update_region_id + .global p_l2p_map_buf + .global p_l2p_ram_map + .global g_totle_vendor_block + .global p_vendor_region_ppn_table + .global p_vendor_block_ver_table + .global p_vendor_block_valid_page_count + .global p_vendor_block_table + .global g_totle_map_block + .global p_map_region_ppn_check_table + .global p_map_region_ppn_table + .global p_map_block_ver_table + .global p_map_block_valid_page_count + .global p_map_block_table + .global p_blk_mode_table + .global p_valid_page_count_check_table + .global p_valid_page_count_table + .global g_totle_swl_count + .global p_swl_mul_table + .global p_erase_count_table + .global g_ect_tbl_info_size + .global gp_ect_tbl_info + .global g_gc_num_req + .global c_gc_page_buf_num + .global gp_gc_page_buf_info + .global p_gc_data_buf + .global p_gc_spare_buf + .global p_io_spare_buf + .global p_io_data_buf_1 + .global p_io_data_buf_0 + .global p_sys_spare_buf + .global p_vendor_data_buf + .global p_sys_data_buf_1 + .global p_sys_data_buf + .global g_wr_page_num + .global req_wr_io + .global c_wr_page_buf_num + .global p_wr_io_data_buf + .global p_wr_io_spare_buf + .global p_plane_order_table + .global g_req_cache + .global req_gc_dst + .global req_gc + .global req_erase + .global req_prgm + .global req_read + .global req_sys + .global gVendorBlkInfo + .global gL2pMapInfo + .global gSysFreeQueue + .global gSysInfo + .global gBbtInfo + .global g_flash_read_only_en + .global g_inkDie_check_enable + .global g_SlcPartLbaEndSector + .global g_MaxLbn + .global g_VaildLpn + .global g_MaxLpn + .global g_MaxLbaSector + .global g_GlobalDataVersion + .global g_GlobalSysVersion + .global ftl_gc_temp_power_lost_recovery_flag + .global c_ftl_nand_max_data_blks + .global c_ftl_nand_data_op_blks_per_plane + .global c_ftl_nand_data_blks_per_plane + .global c_ftl_nand_max_sys_blks + .global c_ftl_nand_init_sys_blks_per_plane + .global c_ftl_nand_sys_blks_per_plane + .global c_ftl_vendor_part_size + .global c_ftl_nand_max_vendor_blks + .global c_ftl_nand_max_map_blks + .global c_ftl_nand_map_blks_per_plane + .global c_ftl_nand_vendor_region_num + .global c_ftl_nand_l2pmap_ram_region_num + .global c_ftl_nand_map_region_num + .global c_ftl_nand_totle_phy_blks + .global c_ftl_nand_reserved_blks + .global c_ftl_nand_byte_pre_oob + .global c_ftl_nand_byte_pre_page + .global c_ftl_nand_sec_pre_page_shift + .global c_ftl_nand_sec_pre_page + .global c_ftl_nand_page_pre_super_blk + .global c_ftl_nand_page_pre_slc_blk + .global c_ftl_nand_page_pre_blk + .global c_ftl_nand_bbm_buf_size + .global c_ftl_nand_ext_blk_pre_plane + .global c_ftl_nand_blk_pre_plane + .global c_ftl_nand_planes_num + .global c_ftl_nand_blks_per_die + .global c_ftl_nand_planes_per_die + .global c_ftl_nand_die_num + .global c_ftl_nand_type + .global gMasterTempBuf + .global gMasterInfo + .global gNandcDumpWriteEn + .global gToggleModeClkDiv + .global gBootDdrMode + .global gNandcEccBits + .global gpNandc1 + .global gpNandc + .global g_nandc_version_data + .global gNandcVer + .global gNandChipMap + .global gNandIDataBuf + .global idb_flash_slc_mode + .global FlashDdrTunningReadCount + .global FlashWaitBusyScheduleEn + .global gNandPhyInfo + .global gFlashProgCheckSpareBuffer + .global gFlashProgCheckBuffer + .global gFlashSpareBuffer + .global gFlashPageBuffer1 + .global gFlashPageBuffer0 + .global gpFlashSaveInfo + .global gReadRetryInfo + .global gpNandParaInfo + .global gNandOptPara + .global g_nand_ecc_en + .global g_slc2KBNand + .global gNandIDBResBlkNumSaveInFlash + .global gNandIDBResBlkNum + .global gNandFlashResEndPageAddr + .global gNandFlashInfoBlockAddr + .global gNandFlashIdbBlockAddr + .global gNandFlashInfoBlockEcc + .global gNandFlashIDBEccBits + .global gNandFlashEccBits + .global gNandRandomizer + .global gBlockPageAlignSize + .global gTotleBlock + .global gNandMaxChip + .global gNandMaxDie + .global gFlashInterfaceMode + .global gFlashCurMode + .global gFlashSlcMode + .global gFlashOnfiModeEn + .global gFlashToggleModeEn + .global gFlashSdrModeEn + .global gMultiPageProgEn + .global gMultiPageReadEn + .global gpReadRetrial + .global mlcPageToSlcPageTbl + .global slcPageToMlcPageTbl + .global DieAddrs + .global gDieOp + .global DieCsIndex + .global read_retry_cur_offset + .section .rodata + .set .LANCHOR3,. + 0 + .type samsung_14nm_slc_rr, %object + .size samsung_14nm_slc_rr, 26 +samsung_14nm_slc_rr: + .byte 0 + .byte 10 + .byte -10 + .byte 20 + .byte -20 + .byte 30 + .byte -30 + .byte 40 + .byte -40 + .byte 50 + .byte -50 + .byte 60 + .byte -60 + .byte -70 + .byte -80 + .byte -90 + .byte -100 + .byte -110 + .byte -120 + .byte -9 + .byte 70 + .byte 80 + .byte 90 + .byte -125 + .byte -115 + .byte 100 + .type samsung_14nm_mlc_rr, %object + .size samsung_14nm_mlc_rr, 104 +samsung_14nm_mlc_rr: + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte -4 + .byte 3 + .byte -4 + .byte -6 + .byte 6 + .byte 0 + .byte 6 + .byte -10 + .byte -10 + .byte 4 + .byte -10 + .byte 16 + .byte 12 + .byte -4 + .byte 12 + .byte 8 + .byte -16 + .byte 10 + .byte -16 + .byte 24 + .byte 18 + .byte -14 + .byte 18 + .byte -4 + .byte -22 + .byte -16 + .byte -22 + .byte -8 + .byte 24 + .byte -9 + .byte 24 + .byte 8 + .byte -28 + .byte -4 + .byte -28 + .byte 16 + .byte 30 + .byte 10 + .byte 30 + .byte 10 + .byte -34 + .byte 6 + .byte -34 + .byte 0 + .byte 36 + .byte -8 + .byte 36 + .byte -8 + .byte -40 + .byte -2 + .byte -40 + .byte -20 + .byte -46 + .byte -4 + .byte -46 + .byte -30 + .byte 3 + .byte 0 + .byte 3 + .byte -3 + .byte -2 + .byte -4 + .byte -2 + .byte -6 + .byte -4 + .byte -4 + .byte -4 + .byte -10 + .byte -6 + .byte -8 + .byte -6 + .byte -14 + .byte -9 + .byte -8 + .byte -9 + .byte -18 + .byte -52 + .byte 22 + .byte -52 + .byte 10 + .byte 42 + .byte 4 + .byte 42 + .byte 4 + .byte 48 + .byte -9 + .byte 48 + .byte 4 + .byte -58 + .byte 12 + .byte -58 + .byte 0 + .byte -64 + .byte -24 + .byte -64 + .byte -6 + .byte 9 + .byte 18 + .byte 9 + .byte 8 + .type __func__.23800, %object + .size __func__.23800, 11 +__func__.23800: + .ascii "FtlMemInit\000" + .type __func__.24547, %object + .size __func__.24547, 12 +__func__.24547: + .ascii "FtlCheckVpc\000" + .type __func__.24579, %object + .size __func__.24579, 17 +__func__.24579: + .ascii "FtlDumpBlockInfo\000" + .type __func__.24598, %object + .size __func__.24598, 16 +__func__.24598: + .ascii "FtlScanAllBlock\000" + .type __func__.24866, %object + .size __func__.24866, 17 +__func__.24866: + .ascii "ftl_scan_all_ppa\000" + .type __func__.24846, %object + .size __func__.24846, 21 +__func__.24846: + .ascii "FtlVpcCheckAndModify\000" + .type __func__.23873, %object + .size __func__.23873, 8 +__func__.23873: + .ascii "FtlInit\000" + .data + .align 2 + .set .LANCHOR1,. + 0 + .type random_seed, %object + .size random_seed, 256 +random_seed: + .short 22378 + .short 1512 + .short 25245 + .short 17827 + .short 25756 + .short 19440 + .short 9026 + .short 10030 + .short 29528 + .short 20467 + .short 29676 + .short 24432 + .short 31328 + .short 6872 + .short 13426 + .short 13842 + .short 8783 + .short 1108 + .short 782 + .short 28837 + .short 30729 + .short 9505 + .short 18676 + .short 23085 + .short 18730 + .short 1085 + .short 32609 + .short 14697 + .short 20858 + .short 15170 + .short 30365 + .short 1607 + .short 32298 + .short 4995 + .short 18905 + .short 1976 + .short 9592 + .short 20204 + .short 17443 + .short 13615 + .short 23330 + .short 29369 + .short 13947 + .short 9398 + .short 32398 + .short 8984 + .short 27600 + .short 21785 + .short 6019 + .short 6311 + .short 31598 + .short 30210 + .short 19327 + .short 13896 + .short 11347 + .short 27545 + .short 3107 + .short 26575 + .short 32270 + .short 19852 + .short 20601 + .short 8349 + .short 9290 + .short 29819 + .short 13579 + .short 3661 + .short 28676 + .short 27331 + .short 32574 + .short 8693 + .short 31253 + .short 9081 + .short 5399 + .short 6842 + .short 20087 + .short 5537 + .short 1274 + .short 11617 + .short 9530 + .short 4866 + .short 8035 + .short 23219 + .short 1178 + .short 23272 + .short 7383 + .short 18944 + .short 12488 + .short 12871 + .short 29340 + .short 20532 + .short 11022 + .short 22514 + .short 228 + .short 22363 + .short 24978 + .short 14584 + .short 12138 + .short 3092 + .short 17916 + .short 16863 + .short 14554 + .short 31457 + .short 29474 + .short 25311 + .short 24121 + .short 3684 + .short 28037 + .short 22865 + .short 22839 + .short 25217 + .short 13217 + .short 27186 + .short 14938 + .short 11180 + .short 29754 + .short 24180 + .short 15150 + .short 32455 + .short 20434 + .short 23848 + .short 29983 + .short 16120 + .short 14769 + .short 20041 + .short 29803 + .short 28406 + .short 17598 + .short 28087 + .type ToshibaA19RefValue, %object + .size ToshibaA19RefValue, 45 +ToshibaA19RefValue: + .byte 4 + .byte 5 + .byte 6 + .byte 7 + .byte 13 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 4 + .byte 4 + .byte 124 + .byte 126 + .byte 0 + .byte 0 + .byte 124 + .byte 120 + .byte 120 + .byte 0 + .byte 124 + .byte 118 + .byte 116 + .byte 114 + .byte 0 + .byte 8 + .byte 8 + .byte 0 + .byte 0 + .byte 0 + .byte 11 + .byte 126 + .byte 118 + .byte 116 + .byte 0 + .byte 16 + .byte 118 + .byte 114 + .byte 112 + .byte 0 + .byte 2 + .byte 0 + .byte 126 + .byte 124 + .byte 0 + .type Toshiba15RefValue, %object + .size Toshiba15RefValue, 95 +Toshiba15RefValue: + .byte 4 + .byte 5 + .byte 6 + .byte 7 + .byte 13 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 2 + .byte 4 + .byte 2 + .byte 0 + .byte 0 + .byte 8 + .byte 8 + .byte 0 + .byte 0 + .byte 0 + .byte 124 + .byte 0 + .byte 124 + .byte 124 + .byte 0 + .byte 122 + .byte 0 + .byte 122 + .byte 122 + .byte 0 + .byte 11 + .byte 126 + .byte 118 + .byte 116 + .byte 0 + .byte 120 + .byte 2 + .byte 120 + .byte 122 + .byte 0 + .byte 126 + .byte 4 + .byte 126 + .byte 122 + .byte 0 + .byte 16 + .byte 118 + .byte 114 + .byte 112 + .byte 0 + .byte 118 + .byte 4 + .byte 118 + .byte 120 + .byte 0 + .byte 4 + .byte 4 + .byte 4 + .byte 118 + .byte 0 + .byte 2 + .byte 0 + .byte 126 + .byte 124 + .byte 0 + .byte 6 + .byte 10 + .byte 6 + .byte 2 + .byte 0 + .byte 116 + .byte 124 + .byte 116 + .byte 118 + .byte 0 + .byte 4 + .byte 4 + .byte 124 + .byte 126 + .byte 0 + .byte 0 + .byte 124 + .byte 120 + .byte 120 + .byte 0 + .byte 124 + .byte 118 + .byte 116 + .byte 114 + .byte 0 + .type ToshibaRefValue, %object + .size ToshibaRefValue, 8 +ToshibaRefValue: + .byte 0 + .byte 4 + .byte 124 + .byte 120 + .byte 116 + .byte 8 + .byte 12 + .byte 112 + .type SamsungRefValue, %object + .size SamsungRefValue, 64 +SamsungRefValue: + .byte -89 + .byte -92 + .byte -91 + .byte -90 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 5 + .byte 10 + .byte 0 + .byte 0 + .byte 40 + .byte 0 + .byte -20 + .byte -40 + .byte -19 + .byte -11 + .byte -19 + .byte -26 + .byte 10 + .byte 15 + .byte 5 + .byte 0 + .byte 15 + .byte 10 + .byte -5 + .byte -20 + .byte -24 + .byte -17 + .byte -24 + .byte -36 + .byte -15 + .byte -5 + .byte -2 + .byte -16 + .byte 10 + .byte 0 + .byte -5 + .byte -20 + .byte -48 + .byte -30 + .byte -48 + .byte -62 + .byte 20 + .byte 15 + .byte -5 + .byte -20 + .byte -24 + .byte -5 + .byte -24 + .byte -36 + .byte 30 + .byte 20 + .byte -5 + .byte -20 + .byte -5 + .byte -1 + .byte -5 + .byte -8 + .byte 7 + .byte 12 + .byte 2 + .byte 0 + .type gNandParaInfo, %object + .size gNandParaInfo, 32 +gNandParaInfo: + .byte 0 + .byte 0 + .space 5 + .byte 0 + .byte 1 + .byte 8 + .short 128 + .byte 2 + .byte 1 + .short 2048 + .short 0 + .byte 1 + .byte 0 + .byte 24 + .byte 32 + .byte 1 + .byte 0 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .type NandFlashParaTbl, %object + .size NandFlashParaTbl, 2752 +NandFlashParaTbl: + .byte 6 + .byte 44 + .byte 100 + .byte 68 + .byte 75 + .byte -87 + .byte 0 + .byte 4 + .byte 1 + .byte 16 + .short 256 + .byte 2 + .byte 2 + .short 2048 + .short 479 + .byte 3 + .byte 17 + .byte 40 + .byte 32 + .byte 1 + .byte 0 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte 44 + .byte 68 + .byte 68 + .byte 75 + .byte -87 + .byte 0 + .byte 4 + .byte 1 + .byte 16 + .short 256 + .byte 2 + .byte 2 + .short 1064 + .short 479 + .byte 3 + .byte 17 + .byte 40 + .byte 32 + .byte 1 + .byte 0 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte 44 + .byte 104 + .byte 4 + .byte 74 + .byte -87 + .byte 0 + .byte 4 + .byte 1 + .byte 8 + .short 256 + .byte 2 + .byte 2 + .short 2048 + .short 287 + .byte 1 + .byte 0 + .byte 24 + .byte 32 + .byte 1 + .byte 0 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 5 + .byte 44 + .byte -120 + .byte 4 + .byte 75 + .byte -87 + .byte 0 + .byte 4 + .byte 1 + .byte 16 + .short 256 + .byte 2 + .byte 2 + .short 2048 + .short 287 + .byte 1 + .byte 0 + .byte 24 + .byte 32 + .byte 1 + .byte 0 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte 44 + .byte -88 + .byte 5 + .byte -53 + .byte -87 + .byte 0 + .byte 4 + .byte 2 + .byte 16 + .short 256 + .byte 2 + .byte 2 + .short 2048 + .short 287 + .byte 1 + .byte 0 + .byte 24 + .byte 32 + .byte 1 + .byte 0 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte 44 + .byte 104 + .byte 4 + .byte 70 + .byte -119 + .byte 0 + .byte 4 + .byte 1 + .byte 8 + .short 256 + .byte 2 + .byte 2 + .short 2048 + .short 287 + .byte 1 + .byte 0 + .byte 24 + .byte 32 + .byte 1 + .byte 0 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte 44 + .byte 72 + .byte 4 + .byte 74 + .byte -91 + .byte 0 + .byte 4 + .byte 1 + .byte 8 + .short 256 + .byte 2 + .byte 2 + .short 1024 + .short 287 + .byte 1 + .byte 0 + .byte 24 + .byte 32 + .byte 1 + .byte 0 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte 44 + .byte -124 + .byte 100 + .byte 60 + .byte -91 + .byte 0 + .byte 4 + .byte 1 + .byte 32 + .short 512 + .byte 2 + .byte 2 + .short 1024 + .short 479 + .byte 3 + .byte 17 + .byte 40 + .byte 32 + .byte 1 + .byte 0 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 5 + .byte 44 + .byte -124 + .byte 100 + .byte 84 + .byte -87 + .byte 0 + .byte 4 + .byte 1 + .byte 32 + .short 512 + .byte 2 + .byte 2 + .short 1024 + .short 479 + .byte 4 + .byte 18 + .byte 60 + .byte 32 + .byte 1 + .byte 0 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte 44 + .byte -41 + .byte -108 + .byte 62 + .byte -124 + .byte 0 + .byte 4 + .byte 1 + .byte 8 + .short 128 + .byte 2 + .byte 2 + .short 4096 + .short 279 + .byte 1 + .byte 0 + .byte 24 + .byte 32 + .byte 1 + .byte 0 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte 44 + .byte 72 + .byte 4 + .byte 70 + .byte -123 + .byte 0 + .byte 4 + .byte 1 + .byte 8 + .short 256 + .byte 2 + .byte 2 + .short 1024 + .short 287 + .byte 1 + .byte 0 + .byte 24 + .byte 32 + .byte 1 + .byte 0 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte 44 + .byte -120 + .byte 5 + .byte -58 + .byte -119 + .byte 0 + .byte 4 + .byte 2 + .byte 8 + .short 256 + .byte 2 + .byte 2 + .short 2048 + .short 287 + .byte 1 + .byte 0 + .byte 24 + .byte 32 + .byte 1 + .byte 0 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 5 + .byte 44 + .byte -120 + .byte 36 + .byte 75 + .byte -87 + .byte 0 + .byte 4 + .byte 1 + .byte 16 + .short 256 + .byte 2 + .byte 2 + .short 2048 + .short 287 + .byte 1 + .byte 0 + .byte 24 + .byte 32 + .byte 1 + .byte 0 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte 44 + .byte 104 + .byte 0 + .byte 39 + .byte -87 + .byte 0 + .byte 4 + .byte 1 + .byte 16 + .short 128 + .byte 1 + .byte 2 + .short 2048 + .short 287 + .byte 0 + .byte 0 + .byte 24 + .byte 32 + .byte 1 + .byte 0 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 5 + .byte 44 + .byte 100 + .byte 100 + .byte 86 + .byte -91 + .byte 0 + .byte 4 + .byte 1 + .byte 24 + .short 512 + .byte 2 + .byte 2 + .short 700 + .short 479 + .byte 4 + .byte 18 + .byte 60 + .byte 32 + .byte 1 + .byte 0 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 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.short 479 + .byte 4 + .byte 18 + .byte 60 + .byte 32 + .byte 1 + .byte 0 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 5 + .byte 44 + .byte -124 + .byte 68 + .byte 50 + .byte -86 + .byte 0 + .byte 4 + .byte 1 + .byte 32 + .short 512 + .byte 2 + .byte 1 + .short 2184 + .short 1479 + .byte 5 + .byte 19 + .byte 60 + .byte 32 + .byte 1 + .byte 0 + .byte 1 + .byte 0 + .byte 1 + .byte 0 + .space 4 + .byte 5 + .byte 44 + .byte 100 + .byte 68 + .byte 50 + .byte -91 + .byte 0 + .byte 4 + .byte 1 + .byte 32 + .short 512 + .byte 2 + .byte 1 + .short 1048 + .short 1479 + .byte 5 + .byte 19 + .byte 60 + .byte 32 + .byte 1 + .byte 0 + .byte 1 + .byte 0 + .byte 1 + .byte 0 + .space 4 + .byte 5 + .byte 44 + .byte 100 + .byte 100 + .byte 60 + .byte -91 + .byte 0 + .byte 4 + .byte 1 + .byte 32 + .short 512 + .byte 2 + .byte 1 + .short 1044 + .short 479 + .byte 3 + .byte 17 + .byte 40 + .byte 32 + .byte 1 + .byte 0 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 5 + .byte 44 + .byte -124 + .byte 68 + .byte 50 + .byte -86 + .byte 0 + .byte 4 + .byte 1 + .byte 32 + .short 512 + .byte 2 + .byte 1 + .short 2184 + .short 1479 + .byte 5 + .byte 19 + .byte 60 + .byte 32 + .byte 1 + .byte 0 + .byte 4 + .byte 0 + .byte 1 + .byte 0 + .space 4 + .byte 5 + .byte 44 + .byte -124 + .byte 68 + .byte 52 + .byte -86 + .byte 0 + .byte 4 + .byte 1 + .byte 32 + .short 512 + .byte 2 + .byte 1 + .short 2184 + .short 1479 + .byte 5 + .byte 19 + .byte 60 + .byte 32 + .byte 1 + .byte 0 + .byte 4 + .byte 0 + .byte 1 + .byte 0 + .space 4 + .byte 5 + .byte 44 + .byte -124 + .byte -60 + .byte 52 + .byte -86 + .byte 0 + .byte 4 + .byte 1 + .byte 32 + .short 512 + .byte 2 + .byte 1 + .short 2184 + .short 1479 + .byte 5 + .byte 19 + .byte 60 + .byte 32 + .byte 1 + .byte 0 + .byte 1 + .byte 0 + .byte 1 + .byte 0 + .space 4 + .byte 5 + .byte 44 + .byte -124 + .byte 68 + .byte 52 + .byte -92 + .byte 0 + .byte 4 + .byte 1 + .byte 32 + .short 512 + .byte 2 + .byte 1 + .short 2184 + .short 1479 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.byte -41 + .byte 20 + .byte -98 + .byte 52 + .byte 74 + .byte 2 + .byte 1 + .byte 16 + .short 256 + .byte 2 + .byte 2 + .short 1056 + .short 473 + .byte 2 + .byte 5 + .byte 40 + .byte 32 + .byte 4 + .byte 1 + .byte 3 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte -83 + .byte -34 + .byte -108 + .byte -89 + .byte 66 + .byte 72 + .byte 2 + .byte 1 + .byte 32 + .short 256 + .byte 2 + .byte 2 + .short 1060 + .short 473 + .byte 2 + .byte 5 + .byte 40 + .byte 32 + .byte 4 + .byte 1 + .byte 3 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte -83 + .byte -34 + .byte 20 + .byte -85 + .byte 66 + .byte 74 + .byte 2 + .byte 1 + .byte 32 + .short 256 + .byte 2 + .byte 2 + .short 1056 + .short 473 + .byte 2 + .byte 6 + .byte 40 + .byte 32 + .byte 3 + .byte 1 + .byte 3 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte -83 + .byte 58 + .byte 20 + .byte -85 + .byte 66 + .byte 74 + .byte 2 + .byte 1 + .byte 32 + .short 256 + .byte 2 + .byte 2 + .short 2092 + .short 473 + .byte 2 + .byte 5 + .byte 40 + .byte 32 + .byte 3 + .byte 1 + .byte 3 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte -83 + .byte -43 + .byte -108 + .byte -102 + .byte 116 + .byte 66 + .byte 2 + .byte 1 + .byte 16 + .short 256 + .byte 2 + .byte 1 + .short 1024 + .short 273 + .byte 1 + .byte 0 + .byte 24 + .byte 32 + .byte 4 + .byte 1 + .byte 3 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte -83 + .byte 58 + .byte 20 + .byte 3 + .byte 8 + .byte 80 + .byte 2 + .byte 1 + .byte 32 + .short 388 + .byte 2 + .byte 2 + .short 1362 + .short 473 + .byte 9 + .byte 8 + .byte 40 + .byte 32 + .byte 3 + .byte 1 + .byte 3 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte -119 + .byte 100 + .byte 68 + .byte 75 + .byte -87 + .byte 0 + .byte 7 + .byte 1 + .byte 16 + .short 256 + .byte 2 + .byte 2 + .short 2048 + .short 479 + .byte 3 + .byte 17 + .byte 40 + .byte 32 + .byte 1 + .byte 0 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte -119 + .byte -120 + .byte 36 + .byte 75 + .byte -87 + .byte -124 + .byte 7 + .byte 1 + .byte 16 + .short 256 + .byte 2 + .byte 2 + .short 2048 + .short 479 + .byte 3 + .byte 17 + .byte 40 + .byte 32 + .byte 1 + .byte 0 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte -119 + .byte -120 + .byte 36 + .byte 75 + .byte -87 + .byte 0 + .byte 7 + .byte 1 + .byte 16 + .short 256 + .byte 2 + .byte 2 + .short 2048 + .short 279 + .byte 1 + .byte 0 + .byte 24 + .byte 32 + .byte 1 + .byte 0 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte -119 + .byte 104 + .byte 36 + .byte 74 + .byte -87 + .byte 0 + .byte 7 + .byte 1 + .byte 8 + .short 256 + .byte 2 + .byte 2 + .short 2048 + .short 279 + .byte 1 + .byte 0 + .byte 24 + .byte 32 + .byte 1 + .byte 0 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte -119 + .byte 104 + .byte 4 + .byte 74 + .byte -87 + .byte 0 + .byte 7 + .byte 1 + .byte 8 + .short 256 + .byte 2 + .byte 2 + .short 2048 + .short 279 + .byte 1 + .byte 0 + .byte 24 + .byte 32 + .byte 1 + .byte 0 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte -119 + .byte -41 + .byte -108 + .byte 62 + .byte -124 + .byte 0 + .byte 7 + .byte 1 + .byte 8 + .short 256 + .byte 2 + .byte 2 + .short 2048 + .short 279 + .byte 1 + .byte 0 + .byte 24 + .byte 32 + .byte 1 + .byte 0 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte -119 + .byte 104 + .byte 4 + .byte 70 + .byte -87 + .byte 0 + .byte 7 + .byte 1 + .byte 8 + .short 256 + .byte 2 + .byte 2 + .short 2048 + .short 279 + .byte 1 + .byte 0 + .byte 24 + .byte 32 + .byte 1 + .byte 0 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 5 + .byte -119 + .byte 100 + .byte 100 + .byte 60 + .byte -95 + .byte 0 + .byte 7 + .byte 1 + .byte 32 + .short 512 + .byte 2 + .byte 1 + .short 1024 + .short 455 + .byte 4 + .byte 17 + .byte 40 + .byte 32 + .byte 1 + .byte 0 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 5 + .byte -119 + .byte -124 + .byte 100 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.byte 6 + .byte -104 + .byte 58 + .byte -108 + .byte -109 + .byte 118 + .byte 81 + .byte 1 + .byte 1 + .byte 32 + .short 256 + .byte 2 + .byte 2 + .short 2106 + .short 1497 + .byte 2 + .byte 35 + .byte 40 + .byte 32 + .byte 3 + .byte 1 + .byte 4 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte -104 + .byte -41 + .byte -124 + .byte -109 + .byte 114 + .byte 81 + .byte 1 + .byte 1 + .byte 32 + .short 256 + .byte 2 + .byte 1 + .short 1056 + .short 1497 + .byte 2 + .byte 35 + .byte 40 + .byte 32 + .byte 3 + .byte 1 + .byte 4 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte -104 + .byte -34 + .byte -108 + .byte -109 + .byte 118 + .byte -47 + .byte 1 + .byte 1 + .byte 32 + .short 256 + .byte 2 + .byte 2 + .short 1074 + .short 1497 + .byte 2 + .byte 35 + .byte 40 + .byte 32 + .byte 3 + .byte 1 + .byte 4 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte 69 + .byte -34 + .byte -108 + .byte -109 + .byte 118 + .byte 87 + .byte 8 + .byte 1 + .byte 32 + .short 256 + .byte 2 + .byte 2 + .short 1058 + .short 1497 + .byte 2 + .byte 66 + .byte 40 + .byte 32 + .byte 3 + .byte 1 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte 69 + .byte -41 + .byte -124 + .byte -109 + .byte 114 + .byte 87 + .byte 8 + .byte 1 + .byte 32 + .short 256 + .byte 2 + .byte 1 + .short 1060 + .short 1473 + .byte 2 + .byte 66 + .byte 40 + .byte 32 + .byte 2 + .byte 1 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte 69 + .byte -34 + .byte -92 + .byte -126 + .byte 118 + .byte 86 + .byte 8 + .byte 1 + .byte 16 + .short 256 + .byte 2 + .byte 2 + .short 2082 + .short 473 + .byte 1 + .byte 65 + .byte 40 + .byte 32 + .byte 3 + .byte 1 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte 69 + .byte -34 + .byte -108 + .byte -109 + .byte 118 + .byte 80 + .byte 8 + .byte 1 + .byte 32 + .short 256 + .byte 2 + .byte 2 + .short 1066 + .short 1497 + .byte 2 + .byte 67 + .byte 40 + .byte 32 + .byte 3 + .byte 1 + .byte 1 + .byte 0 + .byte 0 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.short 256 + .byte 2 + .byte 2 + .short 2106 + .short 473 + .byte 2 + .byte 68 + .byte 40 + .byte 32 + .byte 3 + .byte 1 + .byte 4 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte 69 + .byte -34 + .byte -108 + .byte -109 + .byte 118 + .byte 81 + .byte 8 + .byte 1 + .byte 32 + .short 256 + .byte 2 + .byte 2 + .short 1074 + .short 473 + .byte 2 + .byte 68 + .byte 40 + .byte 32 + .byte 3 + .byte 1 + .byte 4 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte 69 + .byte 58 + .byte -92 + .byte -109 + .byte 122 + .byte 80 + .byte 8 + .byte 1 + .byte 32 + .short 256 + .byte 2 + .byte 2 + .short 2138 + .short 1497 + .byte 2 + .byte 0 + .byte 40 + .byte 32 + .byte 3 + .byte 1 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte 69 + .byte -34 + .byte -108 + .byte -126 + .byte 118 + .byte 86 + .byte 8 + .byte 1 + .byte 16 + .short 256 + .byte 2 + .byte 2 + .short 2062 + .short 473 + .byte 1 + .byte 0 + .byte 40 + .byte 32 + .byte 3 + .byte 1 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte 69 + .byte -34 + .byte -108 + .byte -109 + .byte 118 + .byte -41 + .byte 8 + .byte 1 + .byte 32 + .short 256 + .byte 2 + .byte 2 + .short 1058 + .short 1497 + .byte 2 + .byte 66 + .byte 40 + .byte 32 + .byte 3 + .byte 1 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 5 + .byte -20 + .byte -41 + .byte -108 + .byte 126 + .byte 100 + .byte 68 + .byte 0 + .byte 1 + .byte 16 + .short 128 + .byte 2 + .byte 2 + .short 2048 + .short 473 + .byte 2 + .byte 49 + .byte 60 + .byte 36 + .byte 3 + .byte 0 + .byte 3 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte -20 + .byte -34 + .byte -43 + .byte 126 + .byte 104 + .byte 68 + .byte 0 + .byte 2 + .byte 16 + .short 128 + .byte 2 + .byte 2 + .short 2048 + .short 505 + .byte 2 + .byte 49 + .byte 60 + .byte 36 + .byte 3 + .byte 0 + .byte 3 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte -20 + .byte -41 + .byte -108 + .byte 122 + .byte 84 + .byte 67 + .byte 0 + .byte 1 + .byte 16 + .short 128 + .byte 2 + .byte 2 + .short 2076 + .short 409 + .byte 2 + .byte 0 + .byte 40 + .byte 36 + .byte 3 + .byte 1 + .byte 3 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte -20 + .byte -34 + .byte -43 + .byte 122 + .byte 88 + .byte 67 + .byte 0 + .byte 2 + .byte 16 + .short 128 + .byte 2 + .byte 2 + .short 2076 + .short 441 + .byte 2 + .byte 0 + .byte 40 + .byte 36 + .byte 3 + .byte 1 + .byte 3 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte -20 + .byte -43 + .byte -108 + .byte 118 + .byte 84 + .byte 67 + .byte 0 + .byte 1 + .byte 16 + .short 128 + .byte 2 + .byte 2 + .short 1038 + .short 281 + .byte 2 + .byte 0 + .byte 24 + .byte 36 + .byte 3 + .byte 1 + .byte 3 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte -20 + .byte -41 + .byte 20 + .byte 118 + .byte 84 + .byte -62 + .byte 0 + .byte 1 + .byte 16 + .short 128 + .byte 2 + .byte 2 + .short 2076 + .short 1169 + .byte 2 + .byte 0 + .byte 24 + .byte 40 + .byte 3 + .byte 1 + .byte 3 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .byte 6 + .byte -20 + .byte -34 + .byte -108 + .byte -61 + .byte -92 + .byte -54 + .byte 0 + .byte 1 + .byte 32 + .short 792 + .byte 2 + .byte 1 + .short 688 + .short 1217 + .byte 11 + .byte 50 + .byte 40 + .byte 32 + .byte 3 + .byte 1 + .byte 1 + .byte 0 + .byte 1 + .byte 0 + .space 4 + .type NandOptPara, %object + .size NandOptPara, 128 +NandOptPara: + .byte 1 + .byte 0 + .byte 49 + .byte 63 + .byte 0 + .byte 49 + .byte -128 + .byte 21 + .byte 0 + .byte 50 + .byte 17 + .byte -128 + .byte 112 + .byte 120 + .byte 120 + .byte 3 + .byte 1 + .byte 0 + .space 14 + .byte 2 + .byte 0 + .byte 49 + .byte 63 + .byte 0 + .byte 49 + .byte -128 + .byte 21 + .byte 0 + .byte 0 + .byte 17 + .byte -127 + .byte 112 + .byte -15 + .byte -14 + .byte 0 + .byte 0 + .byte 0 + .space 14 + .byte 3 + .byte 0 + .byte 49 + .byte 63 + .byte 0 + .byte 49 + .byte -128 + .byte 21 + .byte 96 + .byte 96 + .byte 17 + .byte -127 + .byte 112 + .byte -15 + .byte -14 + .byte 0 + .byte 0 + .byte 0 + .space 14 + .byte 4 + .byte 0 + .byte 49 + .byte 63 + .byte 0 + .byte 49 + .byte -128 + .byte 21 + .byte 96 + .byte 96 + .byte 17 + .byte -127 + .byte 112 + .byte 112 + .byte 112 + .byte 0 + .byte 0 + .byte 0 + .space 14 + .type refValueDefault, %object + .size refValueDefault, 28 +refValueDefault: + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 6 + .byte 10 + .byte 6 + .byte 0 + .byte -3 + .byte -7 + .byte -8 + .byte 0 + .byte -6 + .byte -13 + .byte -15 + .byte 0 + .byte -11 + .byte -20 + .byte -23 + .byte 0 + .byte 0 + .byte -26 + .byte -30 + .byte 0 + .byte 0 + .byte -32 + .byte -37 + .type gSlcNandParaInfo, %object + .size gSlcNandParaInfo, 32 +gSlcNandParaInfo: + .byte 2 + .byte -104 + .byte -15 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 1 + .byte 1 + .byte 4 + .short 64 + .byte 1 + .byte 1 + .short 1024 + .short 256 + .byte 0 + .byte 0 + .byte 16 + .byte 40 + .byte 1 + .byte 0 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .space 4 + .type gFtlInitStatus, %object + .size gFtlInitStatus, 4 +gFtlInitStatus: + .word -1 + .type ftl_gc_temp_block_bops_scan_page_addr, %object + .size ftl_gc_temp_block_bops_scan_page_addr, 2 +ftl_gc_temp_block_bops_scan_page_addr: + .short -1 + .space 2 + .type power_up_flag, %object + .size power_up_flag, 4 +power_up_flag: + .word 1 + .bss + .align 2 + .set .LANCHOR0,. + 0 + .set .LANCHOR2,. + 8184 + .type gNandChipMap, %object + .size gNandChipMap, 32 +gNandChipMap: + .space 32 + .type p_blk_mode_table, %object + .size p_blk_mode_table, 4 +p_blk_mode_table: + .space 4 + .type g_slc2KBNand, %object + .size g_slc2KBNand, 1 +g_slc2KBNand: + .space 1 + .type gNandIDBResBlkNum, %object + .size gNandIDBResBlkNum, 1 +gNandIDBResBlkNum: + .space 1 + .space 2 + .type gBlockPageAlignSize, %object + .size gBlockPageAlignSize, 4 +gBlockPageAlignSize: + .space 4 + .type gNandRandomizer, %object + .size gNandRandomizer, 1 +gNandRandomizer: + .space 1 + .space 3 + .type gpNandParaInfo, %object + .size gpNandParaInfo, 4 +gpNandParaInfo: + .space 4 + .type gNandOptPara, %object + .size gNandOptPara, 32 +gNandOptPara: + .space 32 + .type slcPageToMlcPageTbl, %object + .size slcPageToMlcPageTbl, 1024 +slcPageToMlcPageTbl: + .space 1024 + .type mlcPageToSlcPageTbl, %object + .size mlcPageToSlcPageTbl, 2048 +mlcPageToSlcPageTbl: + .space 2048 + .type gNandMaxDie, %object + .size gNandMaxDie, 1 +gNandMaxDie: + .space 1 + .type gNandMaxChip, %object + .size gNandMaxChip, 1 +gNandMaxChip: + .space 1 + .space 2 + .type DieCsIndex, %object + .size DieCsIndex, 8 +DieCsIndex: + .space 8 + .type DieAddrs, %object + .size DieAddrs, 32 +DieAddrs: + .space 32 + .type gDieOp, %object + .size gDieOp, 128 +gDieOp: + .space 128 + .type gTotleBlock, %object + .size gTotleBlock, 2 +gTotleBlock: + .space 2 + .space 2 + .type gNandIDataBuf, %object + .size gNandIDataBuf, 2048 +gNandIDataBuf: + .space 2048 + .type gpNandc, %object + .size gpNandc, 4 +gpNandc: + .space 4 + .type NANDC_FMCTL, %object + .size NANDC_FMCTL, 4 +NANDC_FMCTL: + .space 4 + .type NANDC_FMWAIT, %object + .size NANDC_FMWAIT, 4 +NANDC_FMWAIT: + .space 4 + .type NANDC_FLCTL, %object + .size NANDC_FLCTL, 4 +NANDC_FLCTL: + .space 4 + .type NANDC_BCHCTL, %object + .size NANDC_BCHCTL, 4 +NANDC_BCHCTL: + .space 4 + .type NANDC_DLL_CTL_REG0, %object + .size NANDC_DLL_CTL_REG0, 4 +NANDC_DLL_CTL_REG0: + .space 4 + .type NANDC_DLL_CTL_REG1, %object + .size NANDC_DLL_CTL_REG1, 4 +NANDC_DLL_CTL_REG1: + .space 4 + .type NANDC_RANDMZ_CFG, %object + .size NANDC_RANDMZ_CFG, 4 +NANDC_RANDMZ_CFG: + .space 4 + .type NANDC_FMWAIT_SYN, %object + .size NANDC_FMWAIT_SYN, 4 +NANDC_FMWAIT_SYN: + .space 4 + .type gNandPhyInfo, %object + .size gNandPhyInfo, 28 +gNandPhyInfo: + .space 28 + .type gFlashSlcMode, %object + .size gFlashSlcMode, 1 +gFlashSlcMode: + .space 1 + .type gNandFlashEccBits, %object + .size gNandFlashEccBits, 1 +gNandFlashEccBits: + .space 1 + .space 2 + .type g_MaxLbaSector, %object + .size g_MaxLbaSector, 4 +g_MaxLbaSector: + .space 4 + .type FlashWaitBusyScheduleEn, %object + .size FlashWaitBusyScheduleEn, 4 +FlashWaitBusyScheduleEn: + .space 4 + .type gReadRetryInfo, %object + .size gReadRetryInfo, 852 +gReadRetryInfo: + .space 852 + .type read_retry_cur_offset, %object + .size read_retry_cur_offset, 4 +read_retry_cur_offset: + .space 4 + .type gFlashCurMode, %object + .size gFlashCurMode, 1 +gFlashCurMode: + .space 1 + .type gFlashInterfaceMode, %object + .size gFlashInterfaceMode, 1 +gFlashInterfaceMode: + .space 1 + .type gMultiPageProgEn, %object + .size gMultiPageProgEn, 1 +gMultiPageProgEn: + .space 1 + .space 1 + .type g_inkDie_check_enable, %object + .size g_inkDie_check_enable, 4 +g_inkDie_check_enable: + .space 4 + .type gFlashPageBuffer0, %object + .size gFlashPageBuffer0, 4 +gFlashPageBuffer0: + .space 4 + .type idb_flash_slc_mode, %object + .size idb_flash_slc_mode, 4 +idb_flash_slc_mode: + .space 4 + .type gFlashToggleModeEn, %object + .size gFlashToggleModeEn, 1 +gFlashToggleModeEn: + .space 1 + .space 3 + .type gBootDdrMode, %object + .size gBootDdrMode, 4 +gBootDdrMode: + .space 4 + .type gNandcVer, %object + .size gNandcVer, 4 +gNandcVer: + .space 4 + .type g_nandc_version_data, %object + .size g_nandc_version_data, 4 +g_nandc_version_data: + .space 4 + .type gMasterTempBuf, %object + .size gMasterTempBuf, 4 +gMasterTempBuf: + .space 4 + .type gMasterInfo, %object + .size gMasterInfo, 32 +gMasterInfo: + .space 32 + .type gNandcDumpWriteEn, %object + .size gNandcDumpWriteEn, 4 +gNandcDumpWriteEn: + .space 4 + .type gNandcEccBits, %object + .size gNandcEccBits, 4 +gNandcEccBits: + .space 4 + .type FlashDdrTunningReadCount, %object + .size FlashDdrTunningReadCount, 4 +FlashDdrTunningReadCount: + .space 4 + .type gpReadRetrial, %object + .size gpReadRetrial, 4 +gpReadRetrial: + .space 4 + .type gpFlashSaveInfo, %object + .size gpFlashSaveInfo, 4 +gpFlashSaveInfo: + .space 4 + .type gNandFlashInfoBlockAddr, %object + .size gNandFlashInfoBlockAddr, 4 +gNandFlashInfoBlockAddr: + .space 4 + .type gNandFlashIdbBlockAddr, %object + .size gNandFlashIdbBlockAddr, 4 +gNandFlashIdbBlockAddr: + .space 4 + .type gNandIDBResBlkNumSaveInFlash, %object + .size gNandIDBResBlkNumSaveInFlash, 1 +gNandIDBResBlkNumSaveInFlash: + .space 1 + .type gNandFlashIDBEccBits, %object + .size gNandFlashIDBEccBits, 1 +gNandFlashIDBEccBits: + .space 1 + .space 2 + .type gFlashPageBuffer1, %object + .size gFlashPageBuffer1, 4 +gFlashPageBuffer1: + .space 4 + .type gFlashSpareBuffer, %object + .size gFlashSpareBuffer, 4 +gFlashSpareBuffer: + .space 4 + .type gFlashProgCheckBuffer, %object + .size gFlashProgCheckBuffer, 4 +gFlashProgCheckBuffer: + .space 4 + .type gFlashProgCheckSpareBuffer, %object + .size gFlashProgCheckSpareBuffer, 4 +gFlashProgCheckSpareBuffer: + .space 4 + .type g_nand_ecc_en, %object + .size g_nand_ecc_en, 1 +g_nand_ecc_en: + .space 1 + .type gMultiPageReadEn, %object + .size gMultiPageReadEn, 1 +gMultiPageReadEn: + .space 1 + .type FbbtBlk, %object + .size FbbtBlk, 16 +FbbtBlk: + .space 16 + .space 2 + .type c_ftl_nand_sys_blks_per_plane, %object + .size c_ftl_nand_sys_blks_per_plane, 4 +c_ftl_nand_sys_blks_per_plane: + .space 4 + .type c_ftl_nand_planes_num, %object + .size c_ftl_nand_planes_num, 2 +c_ftl_nand_planes_num: + .space 2 + .space 2 + .type c_ftl_nand_max_sys_blks, %object + .size c_ftl_nand_max_sys_blks, 4 +c_ftl_nand_max_sys_blks: + .space 4 + .type c_ftl_nand_data_blks_per_plane, %object + .size c_ftl_nand_data_blks_per_plane, 2 +c_ftl_nand_data_blks_per_plane: + .space 2 + .type c_ftl_nand_blk_pre_plane, %object + .size c_ftl_nand_blk_pre_plane, 2 +c_ftl_nand_blk_pre_plane: + .space 2 + .type c_ftl_nand_max_data_blks, %object + .size c_ftl_nand_max_data_blks, 4 +c_ftl_nand_max_data_blks: + .space 4 + .type c_ftl_nand_totle_phy_blks, %object + .size c_ftl_nand_totle_phy_blks, 4 +c_ftl_nand_totle_phy_blks: + .space 4 + .type c_ftl_nand_type, %object + .size c_ftl_nand_type, 2 +c_ftl_nand_type: + .space 2 + .type c_ftl_nand_die_num, %object + .size c_ftl_nand_die_num, 2 +c_ftl_nand_die_num: + .space 2 + .type c_ftl_nand_planes_per_die, %object + .size c_ftl_nand_planes_per_die, 2 +c_ftl_nand_planes_per_die: + .space 2 + .type p_plane_order_table, %object + .size p_plane_order_table, 32 +p_plane_order_table: + .space 32 + .type c_mlc_erase_count_value, %object + .size c_mlc_erase_count_value, 2 +c_mlc_erase_count_value: + .space 2 + .type c_ftl_nand_ext_blk_pre_plane, %object + .size c_ftl_nand_ext_blk_pre_plane, 2 +c_ftl_nand_ext_blk_pre_plane: + .space 2 + .type c_ftl_vendor_part_size, %object + .size c_ftl_vendor_part_size, 2 +c_ftl_vendor_part_size: + .space 2 + .type c_ftl_nand_blks_per_die, %object + .size c_ftl_nand_blks_per_die, 2 +c_ftl_nand_blks_per_die: + .space 2 + .type c_ftl_nand_page_pre_blk, %object + .size c_ftl_nand_page_pre_blk, 2 +c_ftl_nand_page_pre_blk: + .space 2 + .type c_ftl_nand_page_pre_slc_blk, %object + .size c_ftl_nand_page_pre_slc_blk, 2 +c_ftl_nand_page_pre_slc_blk: + .space 2 + .type c_ftl_nand_page_pre_super_blk, %object + .size c_ftl_nand_page_pre_super_blk, 2 +c_ftl_nand_page_pre_super_blk: + .space 2 + .type c_ftl_nand_sec_pre_page, %object + .size c_ftl_nand_sec_pre_page, 2 +c_ftl_nand_sec_pre_page: + .space 2 + .type c_ftl_nand_sec_pre_page_shift, %object + .size c_ftl_nand_sec_pre_page_shift, 2 +c_ftl_nand_sec_pre_page_shift: + .space 2 + .type c_ftl_nand_byte_pre_page, %object + .size c_ftl_nand_byte_pre_page, 2 +c_ftl_nand_byte_pre_page: + .space 2 + .type c_ftl_nand_byte_pre_oob, %object + .size c_ftl_nand_byte_pre_oob, 2 +c_ftl_nand_byte_pre_oob: + .space 2 + .type c_ftl_nand_reserved_blks, %object + .size c_ftl_nand_reserved_blks, 2 +c_ftl_nand_reserved_blks: + .space 2 + .space 2 + .type DeviceCapacity, %object + .size DeviceCapacity, 4 +DeviceCapacity: + .space 4 + .type c_ftl_nand_max_vendor_blks, %object + .size c_ftl_nand_max_vendor_blks, 2 +c_ftl_nand_max_vendor_blks: + .space 2 + .type c_ftl_nand_vendor_region_num, %object + .size c_ftl_nand_vendor_region_num, 2 +c_ftl_nand_vendor_region_num: + .space 2 + .type c_ftl_nand_map_blks_per_plane, %object + .size c_ftl_nand_map_blks_per_plane, 2 +c_ftl_nand_map_blks_per_plane: + .space 2 + .space 2 + .type c_ftl_nand_max_map_blks, %object + .size c_ftl_nand_max_map_blks, 4 +c_ftl_nand_max_map_blks: + .space 4 + .type c_ftl_nand_init_sys_blks_per_plane, %object + .size c_ftl_nand_init_sys_blks_per_plane, 4 +c_ftl_nand_init_sys_blks_per_plane: + .space 4 + .type c_ftl_nand_map_region_num, %object + .size c_ftl_nand_map_region_num, 2 +c_ftl_nand_map_region_num: + .space 2 + .type c_ftl_nand_l2pmap_ram_region_num, %object + .size c_ftl_nand_l2pmap_ram_region_num, 2 +c_ftl_nand_l2pmap_ram_region_num: + .space 2 + .type g_page_map_check_enable, %object + .size g_page_map_check_enable, 2 +g_page_map_check_enable: + .space 2 + .type g_free_slc_blk_num, %object + .size g_free_slc_blk_num, 2 +g_free_slc_blk_num: + .space 2 + .type g_SlcPartLbaEndSector, %object + .size g_SlcPartLbaEndSector, 4 +g_SlcPartLbaEndSector: + .space 4 + .type g_all_blk_used_slc_mode, %object + .size g_all_blk_used_slc_mode, 4 +g_all_blk_used_slc_mode: + .space 4 + .type g_GlobalSysVersion, %object + .size g_GlobalSysVersion, 4 +g_GlobalSysVersion: + .space 4 + .type g_GlobalDataVersion, %object + .size g_GlobalDataVersion, 4 +g_GlobalDataVersion: + .space 4 + .type g_totle_gc_page_count, %object + .size g_totle_gc_page_count, 4 +g_totle_gc_page_count: + .space 4 + .type g_totle_write_page_count, %object + .size g_totle_write_page_count, 4 +g_totle_write_page_count: + .space 4 + .type g_totle_discard_page_count, %object + .size g_totle_discard_page_count, 4 +g_totle_discard_page_count: + .space 4 + .type g_totle_cache_write_count, %object + .size g_totle_cache_write_count, 4 +g_totle_cache_write_count: + .space 4 + .type g_totle_l2p_write_count, %object + .size g_totle_l2p_write_count, 4 +g_totle_l2p_write_count: + .space 4 + .type g_totle_read_page_count, %object + .size g_totle_read_page_count, 4 +g_totle_read_page_count: + .space 4 + .type g_totle_mlc_erase_count, %object + .size g_totle_mlc_erase_count, 4 +g_totle_mlc_erase_count: + .space 4 + .type g_totle_slc_erase_count, %object + .size g_totle_slc_erase_count, 4 +g_totle_slc_erase_count: + .space 4 + .type g_totle_sys_slc_erase_count, %object + .size g_totle_sys_slc_erase_count, 4 +g_totle_sys_slc_erase_count: + .space 4 + .type g_max_erase_count, %object + .size g_max_erase_count, 4 +g_max_erase_count: + .space 4 + .type g_min_erase_count, %object + .size g_min_erase_count, 4 +g_min_erase_count: + .space 4 + .type g_in_gc_progress, %object + .size g_in_gc_progress, 4 +g_in_gc_progress: + .space 4 + .type g_in_swl_replace, %object + .size g_in_swl_replace, 4 +g_in_swl_replace: + .space 4 + .type g_gc_head_data_block, %object + .size g_gc_head_data_block, 4 +g_gc_head_data_block: + .space 4 + .type g_gc_head_data_block_count, %object + .size g_gc_head_data_block_count, 4 +g_gc_head_data_block_count: + .space 4 + .type g_gc_skip_write_count, %object + .size g_gc_skip_write_count, 4 +g_gc_skip_write_count: + .space 4 + .type g_cur_erase_blk, %object + .size g_cur_erase_blk, 4 +g_cur_erase_blk: + .space 4 + .type g_gc_next_blk, %object + .size g_gc_next_blk, 2 +g_gc_next_blk: + .space 2 + .type g_gc_next_blk_1, %object + .size g_gc_next_blk_1, 2 +g_gc_next_blk_1: + .space 2 + .type g_gc_next_blk_2, %object + .size g_gc_next_blk_2, 2 +g_gc_next_blk_2: + .space 2 + .type g_gc_next_blk_3, %object + .size g_gc_next_blk_3, 2 +g_gc_next_blk_3: + .space 2 + .type g_gc_free_blk_threshold, %object + .size g_gc_free_blk_threshold, 2 +g_gc_free_blk_threshold: + .space 2 + .type g_gc_merge_free_blk_threshold, %object + .size g_gc_merge_free_blk_threshold, 2 +g_gc_merge_free_blk_threshold: + .space 2 + .type g_gc_blk_index, %object + .size g_gc_blk_index, 2 +g_gc_blk_index: + .space 2 + .type g_gc_bad_block_temp_num, %object + .size g_gc_bad_block_temp_num, 2 +g_gc_bad_block_temp_num: + .space 2 + .type g_gc_refresh_block_temp_num, %object + .size g_gc_refresh_block_temp_num, 2 +g_gc_refresh_block_temp_num: + .space 2 + .type g_gc_bad_block_gc_index, %object + .size g_gc_bad_block_gc_index, 2 +g_gc_bad_block_gc_index: + .space 2 + .type c_wr_page_buf_num, %object + .size c_wr_page_buf_num, 4 +c_wr_page_buf_num: + .space 4 + .type g_wr_page_num, %object + .size g_wr_page_num, 4 +g_wr_page_num: + .space 4 + .type p_gc_blk_tbl, %object + .size p_gc_blk_tbl, 4 +p_gc_blk_tbl: + .space 4 + .type p_gc_page_info, %object + .size p_gc_page_info, 4 +p_gc_page_info: + .space 4 + .type req_read, %object + .size req_read, 4 +req_read: + .space 4 + .type req_gc_dst, %object + .size req_gc_dst, 4 +req_gc_dst: + .space 4 + .type req_prgm, %object + .size req_prgm, 4 +req_prgm: + .space 4 + .type req_erase, %object + .size req_erase, 4 +req_erase: + .space 4 + .type req_gc, %object + .size req_gc, 4 +req_gc: + .space 4 + .type req_wr_io, %object + .size req_wr_io, 4 +req_wr_io: + .space 4 + .type c_gc_page_buf_num, %object + .size c_gc_page_buf_num, 4 +c_gc_page_buf_num: + .space 4 + .type p_sys_data_buf, %object + .size p_sys_data_buf, 4 +p_sys_data_buf: + .space 4 + .type p_sys_data_buf_1, %object + .size p_sys_data_buf_1, 4 +p_sys_data_buf_1: + .space 4 + .type p_vendor_data_buf, %object + .size p_vendor_data_buf, 4 +p_vendor_data_buf: + .space 4 + .type p_gc_data_buf, %object + .size p_gc_data_buf, 4 +p_gc_data_buf: + .space 4 + .type p_wr_io_data_buf, %object + .size p_wr_io_data_buf, 4 +p_wr_io_data_buf: + .space 4 + .type p_io_data_buf_0, %object + .size p_io_data_buf_0, 4 +p_io_data_buf_0: + .space 4 + .type p_io_data_buf_1, %object + .size p_io_data_buf_1, 4 +p_io_data_buf_1: + .space 4 + .type gp_gc_page_buf_info, %object + .size gp_gc_page_buf_info, 4 +gp_gc_page_buf_info: + .space 4 + .type p_sys_spare_buf, %object + .size p_sys_spare_buf, 4 +p_sys_spare_buf: + .space 4 + .type p_io_spare_buf, %object + .size p_io_spare_buf, 4 +p_io_spare_buf: + .space 4 + .type p_gc_spare_buf, %object + .size p_gc_spare_buf, 4 +p_gc_spare_buf: + .space 4 + .type p_wr_io_spare_buf, %object + .size p_wr_io_spare_buf, 4 +p_wr_io_spare_buf: + .space 4 + .type g_ect_tbl_info_size, %object + .size g_ect_tbl_info_size, 2 +g_ect_tbl_info_size: + .space 2 + .space 2 + .type p_swl_mul_table, %object + .size p_swl_mul_table, 4 +p_swl_mul_table: + .space 4 + .type gp_ect_tbl_info, %object + .size gp_ect_tbl_info, 4 +gp_ect_tbl_info: + .space 4 + .type p_erase_count_table, %object + .size p_erase_count_table, 4 +p_erase_count_table: + .space 4 + .type p_valid_page_count_check_table, %object + .size p_valid_page_count_check_table, 4 +p_valid_page_count_check_table: + .space 4 + .type p_valid_page_count_table, %object + .size p_valid_page_count_table, 4 +p_valid_page_count_table: + .space 4 + .type p_map_block_table, %object + .size p_map_block_table, 4 +p_map_block_table: + .space 4 + .type p_map_block_valid_page_count, %object + .size p_map_block_valid_page_count, 4 +p_map_block_valid_page_count: + .space 4 + .type p_vendor_block_table, %object + .size p_vendor_block_table, 4 +p_vendor_block_table: + .space 4 + .type p_vendor_block_valid_page_count, %object + .size p_vendor_block_valid_page_count, 4 +p_vendor_block_valid_page_count: + .space 4 + .type p_vendor_block_ver_table, %object + .size p_vendor_block_ver_table, 4 +p_vendor_block_ver_table: + .space 4 + .type p_vendor_region_ppn_table, %object + .size p_vendor_region_ppn_table, 4 +p_vendor_region_ppn_table: + .space 4 + .type p_map_region_ppn_table, %object + .size p_map_region_ppn_table, 4 +p_map_region_ppn_table: + .space 4 + .type p_map_region_ppn_check_table, %object + .size p_map_region_ppn_check_table, 4 +p_map_region_ppn_check_table: + .space 4 + .type p_map_block_ver_table, %object + .size p_map_block_ver_table, 4 +p_map_block_ver_table: + .space 4 + .type p_l2p_ram_map, %object + .size p_l2p_ram_map, 4 +p_l2p_ram_map: + .space 4 + .type p_l2p_map_buf, %object + .size p_l2p_map_buf, 4 +p_l2p_map_buf: + .space 4 + .type p_data_block_list_table, %object + .size p_data_block_list_table, 4 +p_data_block_list_table: + .space 4 + .type c_ftl_nand_bbm_buf_size, %object + .size c_ftl_nand_bbm_buf_size, 2 +c_ftl_nand_bbm_buf_size: + .space 2 + .space 2 + .type gBbtInfo, %object + .size gBbtInfo, 60 +gBbtInfo: + .space 60 + .type g_totle_vendor_block, %object + .size g_totle_vendor_block, 2 +g_totle_vendor_block: + .space 2 + .space 2 + .type g_MaxLpn, %object + .size g_MaxLpn, 4 +g_MaxLpn: + .space 4 + .type g_flash_read_only_en, %object + .size g_flash_read_only_en, 4 +g_flash_read_only_en: + .space 4 + .type req_sys, %object + .size req_sys, 36 +req_sys: + .space 36 + .type gSysFreeQueue, %object + .size gSysFreeQueue, 2056 +gSysFreeQueue: + .space 2056 + .type g_sys_save_data, %object + .size g_sys_save_data, 48 +g_sys_save_data: + .space 48 + .type p_data_block_list_head, %object + .size p_data_block_list_head, 4 +p_data_block_list_head: + .space 4 + .type p_data_block_list_tail, %object + .size p_data_block_list_tail, 4 +p_data_block_list_tail: + .space 4 + .type g_num_data_superblocks, %object + .size g_num_data_superblocks, 2 +g_num_data_superblocks: + .space 2 + .space 2 + .type p_free_data_block_list_head, %object + .size p_free_data_block_list_head, 4 +p_free_data_block_list_head: + .space 4 + .type g_num_free_superblocks, %object + .size g_num_free_superblocks, 2 +g_num_free_superblocks: + .space 2 + .space 2 + .type g_active_superblock, %object + .size g_active_superblock, 48 +g_active_superblock: + .space 48 + .type g_buffer_superblock, %object + .size g_buffer_superblock, 48 +g_buffer_superblock: + .space 48 + .type g_gc_temp_superblock, %object + .size g_gc_temp_superblock, 48 +g_gc_temp_superblock: + .space 48 + .type gL2pMapInfo, %object + .size gL2pMapInfo, 44 +gL2pMapInfo: + .space 44 + .type g_l2p_last_update_region_id, %object + .size g_l2p_last_update_region_id, 2 +g_l2p_last_update_region_id: + .space 2 + .space 2 + .type gVendorBlkInfo, %object + .size gVendorBlkInfo, 44 +gVendorBlkInfo: + .space 44 + .type FtlUpdateVaildLpnCount, %object + .size FtlUpdateVaildLpnCount, 2 +FtlUpdateVaildLpnCount: + .space 2 + .space 2 + .type g_VaildLpn, %object + .size g_VaildLpn, 4 +g_VaildLpn: + .space 4 + .type gSysInfo, %object + .size gSysInfo, 16 +gSysInfo: + .space 16 + .type g_totle_map_block, %object + .size g_totle_map_block, 2 +g_totle_map_block: + .space 2 + .space 2 + .type g_MaxLbn, %object + .size g_MaxLbn, 4 +g_MaxLbn: + .space 4 + .type c_ftl_nand_data_op_blks_per_plane, %object + .size c_ftl_nand_data_op_blks_per_plane, 2 +c_ftl_nand_data_op_blks_per_plane: + .space 2 + .space 2 + .type g_gc_superblock, %object + .size g_gc_superblock, 48 +g_gc_superblock: + .space 48 + .type g_sys_ext_data, %object + .size g_sys_ext_data, 512 +g_sys_ext_data: + .space 512 + .type g_totle_write_sector, %object + .size g_totle_write_sector, 4 +g_totle_write_sector: + .space 4 + .type g_totle_read_sector, %object + .size g_totle_read_sector, 4 +g_totle_read_sector: + .space 4 + .type g_ect_tbl_power_up_flush, %object + .size g_ect_tbl_power_up_flush, 2 +g_ect_tbl_power_up_flush: + .space 2 + .space 2 + .type g_totle_avg_erase_count, %object + .size g_totle_avg_erase_count, 4 +g_totle_avg_erase_count: + .space 4 + .type g_gc_num_req, %object + .size g_gc_num_req, 4 +g_gc_num_req: + .space 4 + .type g_req_cache, %object + .size g_req_cache, 4 +g_req_cache: + .space 4 + .type g_tmp_data_superblock_id, %object + .size g_tmp_data_superblock_id, 2 +g_tmp_data_superblock_id: + .space 2 + .space 2 + .type g_totle_swl_count, %object + .size g_totle_swl_count, 4 +g_totle_swl_count: + .space 4 + .type ftl_gc_temp_power_lost_recovery_flag, %object + .size ftl_gc_temp_power_lost_recovery_flag, 4 +ftl_gc_temp_power_lost_recovery_flag: + .space 4 + .type g_recovery_page_min_ver, %object + .size g_recovery_page_min_ver, 4 +g_recovery_page_min_ver: + .space 4 + .type g_gc_blk_num, %object + .size g_gc_blk_num, 2 +g_gc_blk_num: + .space 2 + .type g_gc_page_offset, %object + .size g_gc_page_offset, 2 +g_gc_page_offset: + .space 2 + .type g_gc_bad_block_temp_tbl, %object + .size g_gc_bad_block_temp_tbl, 34 +g_gc_bad_block_temp_tbl: + .space 34 + .type g_power_lost_ecc_error_blk, %object + .size g_power_lost_ecc_error_blk, 2 +g_power_lost_ecc_error_blk: + .space 2 + .type g_power_lost_recovery_flag, %object + .size g_power_lost_recovery_flag, 2 +g_power_lost_recovery_flag: + .space 2 + .space 2 + .type g_recovery_page_num, %object + .size g_recovery_page_num, 4 +g_recovery_page_num: + .space 4 + .type g_recovery_ppa_tbl, %object + .size g_recovery_ppa_tbl, 128 +g_recovery_ppa_tbl: + .space 128 + .type gc_ink_free_return_value, %object + .size gc_ink_free_return_value, 2 +gc_ink_free_return_value: + .space 2 + .type g_gc_cur_blk_valid_pages, %object + .size g_gc_cur_blk_valid_pages, 2 +g_gc_cur_blk_valid_pages: + .space 2 + .type g_gc_cur_blk_max_valid_pages, %object + .size g_gc_cur_blk_max_valid_pages, 2 +g_gc_cur_blk_max_valid_pages: + .space 2 + .space 2 + .type gp_last_act_superblock, %object + .size gp_last_act_superblock, 4 +gp_last_act_superblock: + .space 4 + .type gc_discard_updated, %object + .size gc_discard_updated, 4 +gc_discard_updated: + .space 4 + .type g_LowFormat, %object + .size g_LowFormat, 4 +g_LowFormat: + .space 4 + .type g_ftl_nand_free_count, %object + .size g_ftl_nand_free_count, 4 +g_ftl_nand_free_count: + .space 4 + .type last_cache_match_count, %object + .size last_cache_match_count, 4 +last_cache_match_count: + .space 4 + .type check_valid_page_count_table, %object + .size check_valid_page_count_table, 8192 +check_valid_page_count_table: + .space 8192 + .type g_gc_refresh_block_temp_tbl, %object + .size g_gc_refresh_block_temp_tbl, 34 +g_gc_refresh_block_temp_tbl: + .space 34 + .space 2 + .type gToggleModeClkDiv, %object + .size gToggleModeClkDiv, 4 +gToggleModeClkDiv: + .space 4 + .type gpNandc1, %object + .size gpNandc1, 4 +gpNandc1: + .space 4 + .type gNandFlashResEndPageAddr, %object + .size gNandFlashResEndPageAddr, 4 +gNandFlashResEndPageAddr: + .space 4 + .type gNandFlashInfoBlockEcc, %object + .size gNandFlashInfoBlockEcc, 1 +gNandFlashInfoBlockEcc: + .space 1 + .type gFlashOnfiModeEn, %object + .size gFlashOnfiModeEn, 1 +gFlashOnfiModeEn: + .space 1 + .type gFlashSdrModeEn, %object + .size gFlashSdrModeEn, 1 +gFlashSdrModeEn: + .space 1 + .section .rodata.str1.1,"aMS",%progbits,1 +.LC1: + .ascii "FlashEraseBlocks pageAddr error %x\012\000" +.LC2: + .ascii "otp error! %d\000" +.LC3: + .ascii "rr\000" +.LC4: + .ascii "%d statReg->V6.mtrans_cnt=%d flReg.V6.page_num=%d\012" + .ascii "\000" +.LC5: + .ascii "nandc:\000" +.LC6: + .ascii "%d flReg.d32=%x %x\012\000" +.LC7: + .ascii "sdr read ok %x ecc=%d\012\000" +.LC8: + .ascii "sync para %d\012\000" +.LC9: + .ascii "TOG mode Read error %x %x\012\000" +.LC10: + .ascii "read retry status %x %x %x\012\000" +.LC11: + .ascii "micron RR %d row=%x,count %d,status=%d\012\000" +.LC12: + .ascii "samsung RR %d row=%x,count %d,status=%d\012\000" +.LC13: + .ascii "ECC:%d\012\000" +.LC14: + .ascii "No.%d FLASH ID:%x %x %x %x %x %x\012\000" +.LC15: + .ascii "FlashLoadPhyInfo fail %x!!\012\000" +.LC16: + .ascii "Read pageadd=%x ecc=%x err=%x\012\000" +.LC17: + .ascii "data:\000" +.LC18: + .ascii "spare:\000" +.LC19: + .ascii "ReadRetry pageadd=%x ecc=%x err=%x\012\000" +.LC20: + .ascii "FLFB:%d %d\012\000" +.LC21: + .ascii "BBT:\000" +.LC22: + .ascii "prog error: = %x\012\000" +.LC23: + .ascii "prog read error: = %x\012\000" +.LC24: + .ascii "prog read REFRESH: = %x\012\000" +.LC25: + .ascii "prog read s error: = %x %x %x\012\000" +.LC26: + .ascii "prog read d error: = %x %x %x\012\000" +.LC27: + .ascii "FlashMakeFactorBbt %d\012\000" +.LC28: + .ascii "bad block:%d %d\012\000" +.LC29: + .ascii "FMFB:%d %d\012\000" +.LC30: + .ascii "E:bad block:%d\012\000" +.LC31: + .ascii "FMFB:Save %d %d\012\000" +.LC32: + .ascii "%s error allocating memory. return -1\012\000" +.LC33: + .ascii "phyBlk = 0x%x die = %d block_in_die = 0x%x 0x%8x\012" + .ascii "\000" +.LC34: + .ascii "FtlBbmTblFlush id=%x,page=%x,previd=%x cnt=%d\012\000" +.LC35: + .ascii "FtlBbmTblFlush error:%x\012\000" +.LC36: + .ascii "FtlBbmTblFlush error = %x error count = %d\012\000" +.LC37: + .ascii "FtlFreeSysBlkQueueOut free count = %d\012\000" +.LC38: + .ascii "FtlFreeSysBlkQueueOut = %x, free count = %d, error\012" + .ascii "\000" +.LC39: + .ascii "FtlFreeSysBlkQueueOut = %x, free count = %d\012\000" +.LC40: + .ascii "FtlMapWritePage error = %x\012\000" +.LC41: + .ascii "FtlMapWritePage error = %x error count = %d\012\000" +.LC42: + .ascii "page map lost: %x %x\012\000" +.LC43: + .ascii "region_id = %x phyAddr = %x\012\000" +.LC44: + .ascii "map_ppn:\000" +.LC45: + .ascii "load_l2p_region refresh = %x phyAddr = %x\012\000" +.LC46: + .ascii "FtlVendorPartRead refresh = %x phyAddr = %x\012\000" +.LC47: + .ascii "FtlVpcTblFlush error = %x error count = %d\012\000" +.LC48: + .ascii "no ect\000" +.LC49: + .ascii "%s\012\000" +.LC50: + .ascii "...%s enter...\012\000" +.LC51: + .ascii "FtlCheckVpc2 %x = %x %x\012\000" +.LC52: + .ascii "free blk vpc error %x = %x %x\012\000" +.LC53: + .ascii "error_flag %x\012\000" +.LC54: + .ascii "id = %x,%x addr= %x,spare= %x %x %x %x data = %x\012" + .ascii "\000" +.LC55: + .ascii ":\000" +.LC56: + .ascii "Ftlscanalldata = %x\012\000" +.LC57: + .ascii "scan lpa = %x ppa= %x\012\000" +.LC58: + .ascii "lba = %x,addr= %x,spare= %x %x %x %x data=%x %x\012" + .ascii "\000" +.LC59: + .ascii "phyBlk = %x,addr= %x,spare= %x %x %x %x data=%x %x\012" + .ascii "\000" +.LC60: + .ascii "id = %x,%x addr= %x,spare= %x %x %x %x data=%x %x\012" + .ascii "\000" +.LC61: + .ascii "Mblk:\000" +.LC62: + .ascii "L2P:\000" +.LC63: + .ascii "L2PC:\000" +.LC64: + .ascii "id = %x,%x addr= %x,spare= %x %x %x %x data= %x\012" + .ascii "\000" +.LC65: + .ascii "superBlkID = %x vpc=%x\012\000" +.LC66: + .ascii "flashmode = %x pagenum = %x %x\012\000" +.LC67: + .ascii "blk = %x vpc=%x mode = %x\012\000" +.LC68: + .ascii "mlc id = %x,%x addr= %x,spare= %x %x %x %x data=%x " + .ascii "%x\012\000" +.LC69: + .ascii "slc id = %x,%x addr= %x,spare= %x %x %x %x data=%x " + .ascii "%x\012\000" +.LC70: + .ascii "slc mode\000" +.LC71: + .ascii "ftl_scan_all_ppa blk %x page %x flag: %x\012\000" +.LC72: + .ascii "ftl_scan_all_ppa blk %x page %x flag: %x .........." + .ascii "..... is bad block\012\000" +.LC73: + .ascii "addr= %x, status= %d,spare= %x %x %x %x data=%x %x\012" + .ascii "\000" +.LC74: + .ascii "%s finished\012\000" +.LC75: + .ascii "FLASH INFO:\012\000" +.LC76: + .ascii "FLASH ID: %x\012\000" +.LC77: + .ascii "Device Capacity: %d MB\012\000" +.LC78: + .ascii "FMWAIT: %x %x %x %x\012\000" +.LC79: + .ascii "FTL INFO:\012\000" +.LC80: + .ascii "g_MaxLpn = 0x%x\012\000" +.LC81: + .ascii "g_VaildLpn = 0x%x\012\000" +.LC82: + .ascii "read_page_count = 0x%x\012\000" +.LC83: + .ascii "discard_page_count = 0x%x\012\000" +.LC84: + .ascii "write_page_count = 0x%x\012\000" +.LC85: + .ascii "cache_write_count = 0x%x\012\000" +.LC86: + .ascii "l2p_write_count = 0x%x\012\000" +.LC87: + .ascii "gc_page_count = 0x%x\012\000" +.LC88: + .ascii "totle_write = %d MB\012\000" +.LC89: + .ascii "totle_read = %d MB\012\000" +.LC90: + .ascii "GSV = 0x%x\012\000" +.LC91: + .ascii "GDV = 0x%x\012\000" +.LC92: + .ascii "bad blk num = %d %d\012\000" +.LC93: + .ascii "free_superblocks = 0x%x\012\000" +.LC94: + .ascii "mlc_EC = 0x%x\012\000" +.LC95: + .ascii "slc_EC = 0x%x\012\000" +.LC96: + .ascii "avg_EC = 0x%x\012\000" +.LC97: + .ascii "sys_EC = 0x%x\012\000" +.LC98: + .ascii "max_EC = 0x%x\012\000" +.LC99: + .ascii "min_EC = 0x%x\012\000" +.LC100: + .ascii "PLT = 0x%x\012\000" +.LC101: + .ascii "POT = 0x%x\012\000" +.LC102: + .ascii "MaxSector = 0x%x\012\000" +.LC103: + .ascii "init_sys_blks_pp = 0x%x\012\000" +.LC104: + .ascii "sys_blks_pp = 0x%x\012\000" +.LC105: + .ascii "free sysblock = 0x%x\012\000" +.LC106: + .ascii "data_blks_pp = 0x%x\012\000" +.LC107: + .ascii "data_op_blks_pp = 0x%x\012\000" +.LC108: + .ascii "max_data_blks = 0x%x\012\000" +.LC109: + .ascii "Sys.id = 0x%x\012\000" +.LC110: + .ascii "Bbt.id = 0x%x\012\000" +.LC111: + .ascii "ACT.page = 0x%x\012\000" +.LC112: + .ascii "ACT.plane = 0x%x\012\000" +.LC113: + .ascii "ACT.id = 0x%x\012\000" +.LC114: + .ascii "ACT.mode = 0x%x\012\000" +.LC115: + .ascii "ACT.a_pages = 0x%x\012\000" +.LC116: + .ascii "ACT VPC = 0x%x\012\000" +.LC117: + .ascii "BUF.page = 0x%x\012\000" +.LC118: + .ascii "BUF.plane = 0x%x\012\000" +.LC119: + .ascii "BUF.id = 0x%x\012\000" +.LC120: + .ascii "BUF.mode = 0x%x\012\000" +.LC121: + .ascii "BUF.a_pages = 0x%x\012\000" +.LC122: + .ascii "BUF VPC = 0x%x\012\000" +.LC123: + .ascii "TMP.page = 0x%x\012\000" +.LC124: + .ascii "TMP.plane = 0x%x\012\000" +.LC125: + .ascii "TMP.id = 0x%x\012\000" +.LC126: + .ascii "TMP.mode = 0x%x\012\000" +.LC127: + .ascii "TMP.a_pages = 0x%x\012\000" +.LC128: + .ascii "GC.page = 0x%x\012\000" +.LC129: + .ascii "GC.plane = 0x%x\012\000" +.LC130: + .ascii "GC.id = 0x%x\012\000" +.LC131: + .ascii "GC.mode = 0x%x\012\000" +.LC132: + .ascii "GC.a_pages = 0x%x\012\000" +.LC133: + .ascii "WR_CHK = 0x%x %x %x %x\012\000" +.LC134: + .ascii "Read Err = 0x%x\012\000" +.LC135: + .ascii "Prog Err = 0x%x\012\000" +.LC136: + .ascii "gc_free_blk_th= 0x%x\012\000" +.LC137: + .ascii "gc_merge_free_blk_th= 0x%x\012\000" +.LC138: + .ascii "gc_skip_write_count= 0x%x\012\000" +.LC139: + .ascii "gc_blk_index= 0x%x\012\000" +.LC140: + .ascii "free min EC= 0x%x\012\000" +.LC141: + .ascii "free max EC= 0x%x\012\000" +.LC142: + .ascii "GC__SB VPC = 0x%x\012\000" +.LC143: + .ascii "%d. [0x%x]=0x%x 0x%x 0x%x\012\000" +.LC144: + .ascii "free %d. [0x%x] 0x%x 0x%x\012\000" +.LC145: + .ascii "FTL version: 5.0.63 20210616\000" +.LC146: + .ascii "swblk %x ,avg = %x max= %x vpc= %x,ec=%x ,max ec=%x" + .ascii "\012\000" +.LC147: + .ascii "FtlGcScanTempBlk Error ID %x %x!!!!!!! \012\000" +.LC148: + .ascii "FtlGcScanTempBlkError ID %x %x!!!!!!!\012\000" +.LC149: + .ascii "FtlGcRefreshBlock 0x%x\012\000" +.LC150: + .ascii "FtlGcMarkBadPhyBlk %d 0x%x\012\000" +.LC151: + .ascii "FtlGcFreeBadSuperBlk 0x%x\012\000" +.LC152: + .ascii "decrement_vpc_count %x = %d\012\000" +.LC153: + .ascii "decrement_vpc_count %x = %d in free list\012\000" +.LC154: + .ascii "RSB refresh addr %x\012\000" +.LC155: + .ascii "spuer block %x vpn is 0\012 \000" +.LC156: + .ascii "g_recovery_ppa %x ver %x\012 \000" +.LC157: + .ascii "FtlCheckVpc %x = %x %x\012\000" +.LC158: + .ascii "%d GC datablk = %x vpc %x %x\012\000" +.LC159: + .ascii "SWL %x, FSB = %x vpc= %x,ec=%x th=%x\012\000" +.LC160: + .ascii "Ftlwrite decrement_vpc_count %x = %d\012\000" +.LC161: + .ascii "GC des block %x done\012\000" +.LC162: + .ascii "too many bad block = %d %d\012\000" +.LC163: + .ascii "...%s: no bad block mapping table, format device\012" + .ascii "\000" +.LC164: + .ascii "...%s FtlSysBlkInit error ,format device!\012\000" +.LC165: + .ascii "FtlWrite: lpa error:%x %x\012\000" +.LC166: + .ascii "fix power lost blk = %x vpc=%x\012\000" +.LC167: + .ascii "erase power lost blk = %x vpc=%x\012\000" diff --git a/drivers/rk_nand/rk_ftlv5_arm64.S b/drivers/rk_nand/rk_ftlv5_arm64.S new file mode 100644 index 00000000000..260a57d855b --- /dev/null +++ b/drivers/rk_nand/rk_ftlv5_arm64.S @@ -0,0 +1,25632 @@ +/* + * Copyright (c) 2016-2017, Fuzhou Rockchip Electronics Co., Ltd + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * date: 2021-07-16 + * function: rk ftl v5 for rockchip soc base on arm v8 to support MLC NAND. + */ + .file "rk_ftlv5_arm64.S" + .text + .align 2 + .type flash_read_ecc, %function +flash_read_ecc: + stp x29, x30, [sp, -32]! + ubfiz x0, x0, 4, 8 + adrp x1, .LANCHOR0 + add x1, x1, :lo12:.LANCHOR0 + add x2, x1, x0 + add x29, sp, 0 + str x19, [sp, 16] + ldr x0, [x1, x0] + ldrb w19, [x2, 8] + add x19, x0, x19, lsl 8 + mov w0, 122 + str w0, [x19, 2056] + mov x0, 400 + bl __const_udelay + ldr w1, [x19, 2048] + ldr w0, [x19, 2048] + and w1, w1, 15 + and w0, w0, 15 + cmp w1, w0 + csel w1, w1, w0, cs + ldr w0, [x19, 2048] + ldr w2, [x19, 2048] + and w0, w0, 15 + ldr x19, [sp, 16] + and w2, w2, 15 + cmp w0, w2 + csel w0, w0, w2, cs + cmp w0, w1 + csel w0, w0, w1, cs + ldp x29, x30, [sp], 32 + ret + .size flash_read_ecc, .-flash_read_ecc + .align 2 + .type FlashReadFacBbtData.part.6, %function +FlashReadFacBbtData.part.6: + stp x29, x30, [sp, -32]! + adrp x3, .LANCHOR0 + add x29, sp, 0 + str x19, [sp, 16] + mov x19, x0 + cbnz w1, .L4 + add x5, x3, :lo12:.LANCHOR0 + mov w0, 0 + mov w7, 1 +.L5: + ldr w1, [x5, 72] + cmp w0, w1 + bcc .L6 +.L4: + add x3, x3, :lo12:.LANCHOR0 + mov x0, x19 + ldr x1, [x3, 64] + bl ftl_memcpy + mov w3, 4 + mov x1, x19 + mov w2, w3 + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl rknand_print_hex + mov w0, 0 + ldr x19, [sp, 16] + ldp x29, x30, [sp], 32 + ret +.L6: + ubfx x1, x0, 5, 11 + ldr x6, [x5, 64] + lsl x1, x1, 2 + lsl w8, w7, w0 + add w0, w0, 1 + and w0, w0, 65535 + ldr w4, [x6, x1] + orr w4, w4, w8 + str w4, [x6, x1] + b .L5 + .size FlashReadFacBbtData.part.6, .-FlashReadFacBbtData.part.6 + .align 2 + .type ftl_set_blk_mode.part.17, %function +ftl_set_blk_mode.part.17: + and w0, w0, 65535 + adrp x2, .LANCHOR0+80 + ubfx x1, x0, 5, 11 + ldr x3, [x2, #:lo12:.LANCHOR0+80] + lsl x1, x1, 2 + mov w2, 1 + lsl w2, w2, w0 + ldr w0, [x3, x1] + orr w0, w0, w2 + str w0, [x3, x1] + ret + .size ftl_set_blk_mode.part.17, .-ftl_set_blk_mode.part.17 + .align 2 + .global FlashMemCmp8 + .type FlashMemCmp8, %function +FlashMemCmp8: + adrp x3, .LANCHOR0+88 + ldrb w3, [x3, #:lo12:.LANCHOR0+88] + cbz w3, .L15 + ldrb w4, [x0, 1] + ldrb w3, [x1, 1] + cmp w4, w3 + beq .L16 +.L15: + mov x3, 0 +.L13: + mov w4, w3 + cmp w3, w2 + bcc .L14 +.L16: + mov w0, 0 + ret +.L14: + ldrb w5, [x0, x3] + add x3, x3, 1 + add x6, x1, x3 + ldrb w6, [x6, -1] + cmp w6, w5 + beq .L13 + add w0, w4, 1 + ret + .size FlashMemCmp8, .-FlashMemCmp8 + .align 2 + .global FlashRsvdBlkChk + .type FlashRsvdBlkChk, %function +FlashRsvdBlkChk: + adrp x2, .LANCHOR0 + add x2, x2, :lo12:.LANCHOR0 + and w0, w0, 255 + ldrb w3, [x2, 89] + ldr w2, [x2, 92] + mul w2, w3, w2 + cmp w2, w1 + bls .L20 + cmp w0, 0 + cset w0, ne + ret +.L20: + mov w0, 1 + ret + .size FlashRsvdBlkChk, .-FlashRsvdBlkChk + .align 2 + .global FlashGetRandomizer + .type FlashGetRandomizer, %function +FlashGetRandomizer: + and x3, x1, 127 + adrp x2, .LANCHOR1 + add x2, x2, :lo12:.LANCHOR1 + ldrh w4, [x2, x3, lsl 1] + adrp x2, .LANCHOR0+96 + ldrb w2, [x2, #:lo12:.LANCHOR0+96] + cbz w2, .L29 + stp x29, x30, [sp, -16]! + and w0, w0, 255 + add x29, sp, 0 + bl FlashRsvdBlkChk + cmp w0, 0 + orr w1, w4, -1073741824 + csel w4, w1, w4, ne + mov w0, w4 + ldp x29, x30, [sp], 16 + ret +.L29: + mov w0, w4 + ret + .size FlashGetRandomizer, .-FlashGetRandomizer + .align 2 + .global FlashSetRandomizer + .type FlashSetRandomizer, %function +FlashSetRandomizer: + and x2, x1, 127 + and w6, w0, 255 + adrp x0, .LANCHOR1 + add x0, x0, :lo12:.LANCHOR1 + ldrh w5, [x0, x2, lsl 1] + adrp x0, .LANCHOR0 + add x2, x0, :lo12:.LANCHOR0 + mov x4, x0 + ldrb w2, [x2, 96] + cbz w2, .L40 + stp x29, x30, [sp, -16]! + mov w0, w6 + add x29, sp, 0 + bl FlashRsvdBlkChk + cmp w0, 0 + sbfiz x6, x6, 4, 32 + add x0, x4, :lo12:.LANCHOR0 + orr w1, w5, -1073741824 + csel w5, w1, w5, ne + ldr x0, [x0, x6] + str w5, [x0, 336] + ldp x29, x30, [sp], 16 + ret +.L40: + add x0, x0, :lo12:.LANCHOR0 + sbfiz x6, x6, 4, 32 + ldr x0, [x0, x6] + str w5, [x0, 336] + ret + .size FlashSetRandomizer, .-FlashSetRandomizer + .align 2 + .global FlashBlockAlignInit + .type FlashBlockAlignInit, %function +FlashBlockAlignInit: + and w0, w0, 65535 + adrp x1, .LANCHOR0 + cmp w0, 512 + add x1, x1, :lo12:.LANCHOR0 + bls .L44 + mov w0, 1024 +.L48: + str w0, [x1, 92] + ret +.L44: + cmp w0, 256 + bls .L46 + mov w0, 512 + b .L48 +.L46: + cmp w0, 128 + bls .L48 + mov w0, 256 + b .L48 + .size FlashBlockAlignInit, .-FlashBlockAlignInit + .align 2 + .global FlashReadCmd + .type FlashReadCmd, %function +FlashReadCmd: + and w0, w0, 255 + adrp x3, .LANCHOR0 + sbfiz x2, x0, 4, 32 + add x3, x3, :lo12:.LANCHOR0 + stp x29, x30, [sp, -16]! + add x4, x3, x2 + add x29, sp, 0 + ldr x2, [x3, x2] + ldr x3, [x3, 104] + ldrb w4, [x4, 8] + ldrb w3, [x3, 7] + cmp w3, 1 + bne .L50 + sxtw x3, w4 + mov w5, 38 + add x3, x3, 8 + add x3, x2, x3, lsl 8 + str w5, [x3, 8] +.L50: + ubfiz x4, x4, 8, 8 + and w3, w1, 255 + add x2, x2, x4 + str wzr, [x2, 2056] + str wzr, [x2, 2052] + str wzr, [x2, 2052] + str w3, [x2, 2052] + lsr w3, w1, 8 + str w3, [x2, 2052] + lsr w3, w1, 16 + str w3, [x2, 2052] + mov w3, 48 + str w3, [x2, 2056] + bl FlashSetRandomizer + ldp x29, x30, [sp], 16 + ret + .size FlashReadCmd, .-FlashReadCmd + .align 2 + .global FlashReadDpDataOutCmd + .type FlashReadDpDataOutCmd, %function +FlashReadDpDataOutCmd: + and w0, w0, 255 + adrp x3, .LANCHOR0 + sbfiz x2, x0, 4, 32 + add x3, x3, :lo12:.LANCHOR0 + stp x29, x30, [sp, -16]! + add x4, x3, x2 + and w5, w1, 255 + add x29, sp, 0 + ldr x6, [x3, x2] + ldrb w2, [x3, 128] + lsr w3, w1, 16 + cmp w2, 1 + ldrb w2, [x4, 8] + lsr w4, w1, 8 + add x2, x6, x2, lsl 8 + bne .L53 + mov w6, 6 + str w6, [x2, 2056] + str wzr, [x2, 2052] + str wzr, [x2, 2052] + str w5, [x2, 2052] + str w4, [x2, 2052] + str w3, [x2, 2052] +.L56: + mov w3, 224 + str w3, [x2, 2056] + bl FlashSetRandomizer + ldp x29, x30, [sp], 16 + ret +.L53: + str wzr, [x2, 2056] + str wzr, [x2, 2052] + str wzr, [x2, 2052] + str w5, [x2, 2052] + str w4, [x2, 2052] + str w3, [x2, 2052] + mov w3, 5 + str w3, [x2, 2056] + str wzr, [x2, 2052] + str wzr, [x2, 2052] + b .L56 + .size FlashReadDpDataOutCmd, .-FlashReadDpDataOutCmd + .align 2 + .global FlashProgFirstCmd + .type FlashProgFirstCmd, %function +FlashProgFirstCmd: + and w0, w0, 255 + adrp x4, .LANCHOR0 + sbfiz x5, x0, 4, 32 + add x4, x4, :lo12:.LANCHOR0 + add x2, x4, x5 + stp x29, x30, [sp, -16]! + lsr w3, w1, 16 + add x29, sp, 0 + ldr x4, [x4, x5] + ldrb w2, [x2, 8] + add x2, x4, x2, lsl 8 + mov w4, 128 + str w4, [x2, 2056] + and w4, w1, 255 + str wzr, [x2, 2052] + str wzr, [x2, 2052] + str w4, [x2, 2052] + lsr w4, w1, 8 + str w4, [x2, 2052] + str w3, [x2, 2052] + bl FlashSetRandomizer + ldp x29, x30, [sp], 16 + ret + .size FlashProgFirstCmd, .-FlashProgFirstCmd + .align 2 + .global FlashEraseCmd + .type FlashEraseCmd, %function +FlashEraseCmd: + ubfiz x0, x0, 4, 8 + adrp x3, .LANCHOR0 + add x3, x3, :lo12:.LANCHOR0 + add x5, x3, x0 + ldr x4, [x3, x0] + ldrb w0, [x5, 8] + cbz w2, .L60 + add x2, x4, x0, lsl 8 + mov w5, 96 + str w5, [x2, 2056] + and w5, w1, 255 + str w5, [x2, 2052] + lsr w5, w1, 8 + str w5, [x2, 2052] + lsr w5, w1, 16 + str w5, [x2, 2052] + ldr w2, [x3, 92] + add w1, w1, w2 +.L60: + add x0, x4, x0, lsl 8 + mov w2, 96 + str w2, [x0, 2056] + and w2, w1, 255 + str w2, [x0, 2052] + lsr w2, w1, 8 + str w2, [x0, 2052] + lsr w1, w1, 16 + str w1, [x0, 2052] + mov w1, 208 + str w1, [x0, 2056] + ret + .size FlashEraseCmd, .-FlashEraseCmd + .align 2 + .global FlashProgDpSecondCmd + .type FlashProgDpSecondCmd, %function +FlashProgDpSecondCmd: + and w0, w0, 255 + adrp x4, .LANCHOR0 + sbfiz x5, x0, 4, 32 + add x4, x4, :lo12:.LANCHOR0 + add x2, x4, x5 + stp x29, x30, [sp, -16]! + lsr w3, w1, 16 + add x29, sp, 0 + ldrb w6, [x4, 123] + ldrb w2, [x2, 8] + ldr x4, [x4, x5] + add x2, x4, x2, lsl 8 + and w4, w1, 255 + str w6, [x2, 2056] + str wzr, [x2, 2052] + str wzr, [x2, 2052] + str w4, [x2, 2052] + lsr w4, w1, 8 + str w4, [x2, 2052] + str w3, [x2, 2052] + bl FlashSetRandomizer + ldp x29, x30, [sp], 16 + ret + .size FlashProgDpSecondCmd, .-FlashProgDpSecondCmd + .align 2 + .global FlashProgSecondCmd + .type FlashProgSecondCmd, %function +FlashProgSecondCmd: + stp x29, x30, [sp, -32]! + ubfiz x0, x0, 4, 8 + adrp x1, .LANCHOR0 + add x1, x1, :lo12:.LANCHOR0 + add x29, sp, 0 + add x2, x1, x0 + stp x19, x20, [sp, 16] + ldr x20, [x1, x0] + mov x0, 36284 + ldrb w19, [x2, 8] + movk x0, 0x6, lsl 16 + bl __const_udelay + add x19, x19, 8 + mov w0, 16 + add x19, x20, x19, lsl 8 + str w0, [x19, 8] + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 32 + ret + .size FlashProgSecondCmd, .-FlashProgSecondCmd + .align 2 + .global FlashProgDpFirstCmd + .type FlashProgDpFirstCmd, %function +FlashProgDpFirstCmd: + ubfiz x0, x0, 4, 8 + adrp x1, .LANCHOR0 + add x1, x1, :lo12:.LANCHOR0 + add x3, x1, x0 + ldr x2, [x1, x0] + ldrb w0, [x3, 8] + ldrb w1, [x1, 122] + add x0, x0, 8 + add x0, x2, x0, lsl 8 + str w1, [x0, 8] + ret + .size FlashProgDpFirstCmd, .-FlashProgDpFirstCmd + .align 2 + .global FlashReadStatus + .type FlashReadStatus, %function +FlashReadStatus: + stp x29, x30, [sp, -32]! + ubfiz x0, x0, 4, 8 + adrp x1, .LANCHOR0 + add x1, x1, :lo12:.LANCHOR0 + add x29, sp, 0 + add x2, x1, x0 + str x19, [sp, 16] + ldr x0, [x1, x0] + ldrb w19, [x2, 8] + add x19, x0, x19, lsl 8 + mov w0, 112 + str w0, [x19, 2056] + mov x0, 400 + bl __const_udelay + ldr w0, [x19, 2048] + ldr x19, [sp, 16] + ldp x29, x30, [sp], 32 + ret + .size FlashReadStatus, .-FlashReadStatus + .align 2 + .global js_hash + .type js_hash, %function +js_hash: + mov x4, x0 + mov w0, 42982 + mov x3, 0 + movk w0, 0x47c6, lsl 16 +.L72: + cmp w1, w3 + bhi .L73 + ret +.L73: + lsr w2, w0, 2 + ldrb w5, [x4, x3] + add w2, w2, w0, lsl 5 + add x3, x3, 1 + add w2, w2, w5 + eor w0, w0, w2 + b .L72 + .size js_hash, .-js_hash + .align 2 + .global FlashLoadIdbInfo + .type FlashLoadIdbInfo, %function +FlashLoadIdbInfo: + mov w0, 0 + ret + .size FlashLoadIdbInfo, .-FlashLoadIdbInfo + .align 2 + .global BuildFlashLsbPageTable + .type BuildFlashLsbPageTable, %function +BuildFlashLsbPageTable: + stp x29, x30, [sp, -48]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + mov w19, w1 + str x21, [sp, 32] + adrp x1, .LANCHOR0 + cbnz w0, .L76 + add x2, x1, :lo12:.LANCHOR0 + mov x0, 0 + add x2, x2, 144 +.L77: + strh w0, [x2, x0, lsl 1] + add x0, x0, 1 + cmp x0, 512 + bne .L77 +.L83: + add x20, x1, :lo12:.LANCHOR0 + mov w2, 2048 + add x21, x20, 1168 + mov w1, 255 + mov x0, x21 + bl ftl_memset + and w19, w19, 65535 + add x1, x20, 144 + mov x2, 0 +.L78: + cmp w19, w2, uxth + bhi .L111 + ldp x19, x20, [sp, 16] + ldr x21, [sp, 32] + ldp x29, x30, [sp], 48 + ret +.L76: + cmp w0, 1 + bne .L79 + add x3, x1, :lo12:.LANCHOR0 + mov x2, 0 + add x3, x3, 144 +.L82: + and w0, w2, 65535 + cmp x2, 3 + bls .L80 + ubfiz w4, w0, 1, 15 + and w0, w0, 1 + add w0, w0, 2 + sub w0, w4, w0 + and w0, w0, 65535 +.L80: + strh w0, [x3, x2, lsl 1] + add x2, x2, 1 + cmp x2, 512 + bne .L82 + b .L83 +.L79: + cmp w0, 2 + bne .L84 + add x3, x1, :lo12:.LANCHOR0 + mov w2, 65535 + add x3, x3, 144 + mov x0, 0 +.L86: + cmp x0, 2 + and w4, w0, 65535 + csel w4, w4, w2, cc + strh w4, [x3, x0, lsl 1] + add w2, w2, 2 + add x0, x0, 1 + and w2, w2, 65535 + cmp x0, 512 + bne .L86 + b .L83 +.L84: + cmp w0, 3 + bne .L87 + add x3, x1, :lo12:.LANCHOR0 + mov x2, 0 + add x3, x3, 144 +.L90: + and w0, w2, 65535 + cmp x2, 5 + bls .L88 + ubfiz w4, w0, 1, 15 + and w0, w0, 1 + add w0, w0, 4 + sub w0, w4, w0 + and w0, w0, 65535 +.L88: + strh w0, [x3, x2, lsl 1] + add x2, x2, 1 + cmp x2, 512 + bne .L90 + b .L83 +.L87: + cmp w0, 4 + bne .L91 + add x3, x1, :lo12:.LANCHOR0 + mov w4, 1 + add x3, x3, 160 + strh w0, [x3, -8] + mov w0, 5 + strh w4, [x3, -14] + mov w4, 2 + strh w0, [x3, -6] + mov w0, 7 + strh w4, [x3, -12] + mov w4, 3 + strh w0, [x3, -4] + mov w0, 8 + strh wzr, [x3, -16] + strh w0, [x3, -2] + mov w0, 8 + strh w4, [x3, -10] +.L93: + and w4, w0, 1 + ubfiz w2, w0, 1, 15 + add w4, w4, 6 + add w0, w0, 1 + sub w2, w2, w4 + strh w2, [x3], 2 + and w0, w0, 65535 + cmp w0, 512 + bne .L93 + b .L83 +.L91: + cmp w0, 5 + bne .L94 + add x2, x1, :lo12:.LANCHOR0 + mov x0, 0 + add x3, x2, 144 +.L95: + strh w0, [x3, x0, lsl 1] + add x0, x0, 1 + cmp x0, 16 + bne .L95 + add x2, x2, 176 +.L96: + strh w0, [x2], 2 + add w0, w0, 2 + and w0, w0, 65535 + cmp w0, 1008 + bne .L96 + b .L83 +.L94: + cmp w0, 6 + bne .L97 + add x4, x1, :lo12:.LANCHOR0 + mov w2, 0 + add x4, x4, 144 + mov x3, 0 + mov w5, 12 + mov w6, 10 +.L100: + and w0, w3, 65535 + cmp x3, 5 + bls .L98 + tst x0, 1 + csel w0, w5, w6, ne + sub w0, w2, w0 + and w0, w0, 65535 +.L98: + strh w0, [x4, x3, lsl 1] + add w2, w2, 3 + and w2, w2, 65535 + add x3, x3, 1 + cmp w2, 1536 + bne .L100 + b .L83 +.L97: + cmp w0, 9 + bne .L101 + add x0, x1, :lo12:.LANCHOR0 + mov w3, 1 + add x2, x0, 150 + strh w3, [x0, 146] + mov w3, 2 + strh wzr, [x0, 144] + strh w3, [x0, 148] + mov w0, 3 +.L102: + strh w0, [x2], 2 + add w0, w0, 2 + and w0, w0, 65535 + cmp w0, 1021 + bne .L102 + b .L83 +.L101: + cmp w0, 10 + bne .L103 + add x2, x1, :lo12:.LANCHOR0 + mov x0, 0 + add x3, x2, 144 +.L104: + strh w0, [x3, x0, lsl 1] + add x0, x0, 1 + cmp x0, 63 + bne .L104 + add x2, x2, 270 +.L105: + strh w0, [x2], 2 + add w0, w0, 2 + and w0, w0, 65535 + cmp w0, 961 + bne .L105 + b .L83 +.L103: + cmp w0, 11 + bne .L106 + add x2, x1, :lo12:.LANCHOR0 + mov x0, 0 + add x3, x2, 144 +.L107: + strh w0, [x3, x0, lsl 1] + add x0, x0, 1 + cmp x0, 8 + bne .L107 + add x2, x2, 160 +.L109: + and w4, w0, 1 + ubfiz w3, w0, 1, 15 + add w4, w4, 6 + add w0, w0, 1 + sub w3, w3, w4 + strh w3, [x2], 2 + and w0, w0, 65535 + cmp w0, 512 + bne .L109 + b .L83 +.L106: + cmp w0, 12 + bne .L83 + add x0, x1, :lo12:.LANCHOR0 + mov w3, 1 + add x2, x0, 152 + strh w3, [x0, 146] + mov w3, 2 + strh wzr, [x0, 144] + strh w3, [x0, 148] + mov w3, 3 + strh w3, [x0, 150] + mov w0, 4 +.L110: + sub w3, w0, #1 + add w3, w3, w0, lsr 1 + add w0, w0, 1 + strh w3, [x2], 2 + and w0, w0, 65535 + cmp w0, 512 + bne .L110 + b .L83 +.L111: + ldrh w0, [x1, x2, lsl 1] + add x2, x2, 1 + strh w0, [x21, w0, sxtw 1] + b .L78 + .size BuildFlashLsbPageTable, .-BuildFlashLsbPageTable + .align 2 + .global FlashPrintInfo + .type FlashPrintInfo, %function +FlashPrintInfo: + ret + .size FlashPrintInfo, .-FlashPrintInfo + .align 2 + .global ToshibaSetRRPara + .type ToshibaSetRRPara, %function +ToshibaSetRRPara: + stp x29, x30, [sp, -80]! + and w1, w1, 255 + add w2, w1, 1 + add x29, sp, 0 + stp x21, x22, [sp, 32] + mov x21, x0 + mov w0, 5 + stp x23, x24, [sp, 48] + stp x25, x26, [sp, 64] + adrp x23, g_maxRegNum + umull x2, w2, w0 + adrp x0, .LANCHOR1 + add x0, x0, :lo12:.LANCHOR1 + stp x19, x20, [sp, 16] + add x25, x0, 256 + add x24, x0, 352 + add x25, x25, x2 + add x24, x24, x2 + add x23, x23, :lo12:g_maxRegNum + mov x19, x0 + add x22, x0, w1, sxtw + mov x20, 0 + mov w26, 85 +.L135: + ldrb w0, [x23] + cmp w0, w20 + bhi .L139 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x29, x30, [sp], 80 + ret +.L139: + add x0, x19, 352 + str w26, [x21, 8] + ldrsb w0, [x20, x0] + str w0, [x21, 4] + mov x0, 1000 + bl __const_udelay + adrp x0, g_retryMode + ldrb w0, [x0, #:lo12:g_retryMode] + cmp w0, 34 + bne .L136 + ldrsb w0, [x24, x20] +.L141: + add x20, x20, 1 + str w0, [x21] + b .L135 +.L136: + cmp w0, 35 + bne .L138 + ldrsb w0, [x25, x20] + b .L141 +.L138: + ldrsb w0, [x22, 400] + b .L141 + .size ToshibaSetRRPara, .-ToshibaSetRRPara + .align 2 + .global SamsungSetRRPara + .type SamsungSetRRPara, %function +SamsungSetRRPara: + stp x29, x30, [sp, -64]! + add x29, sp, 0 + stp x21, x22, [sp, 32] + mov x22, x0 + ubfiz x21, x1, 2, 8 + adrp x0, .LANCHOR1 + add x0, x0, :lo12:.LANCHOR1 + add x21, x21, 4 + add x0, x0, 408 + stp x19, x20, [sp, 16] + stp x23, x24, [sp, 48] + add x21, x0, x21 + adrp x23, g_maxRegNum + mov x19, x0 + add x23, x23, :lo12:g_maxRegNum + mov x20, 0 + mov w24, 161 +.L143: + ldrb w0, [x23] + cmp w0, w20 + bhi .L144 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x29, x30, [sp], 64 + ret +.L144: + str w24, [x22, 8] + str wzr, [x22] + ldrsb w0, [x20, x19] + str w0, [x22] + ldrsb w0, [x21, x20] + add x20, x20, 1 + str w0, [x22] + mov x0, 1500 + bl __const_udelay + b .L143 + .size SamsungSetRRPara, .-SamsungSetRRPara + .align 2 + .global FlashDieInfoInit + .type FlashDieInfoInit, %function +FlashDieInfoInit: + stp x29, x30, [sp, -48]! + adrp x0, .LANCHOR1+482 + add x29, sp, 0 + ldrh w0, [x0, #:lo12:.LANCHOR1+482] + stp x19, x20, [sp, 16] + str x21, [sp, 32] + adrp x21, .LANCHOR0 + add x19, x21, :lo12:.LANCHOR0 + add x20, x19, 3228 + strb wzr, [x19, 3216] + strb wzr, [x19, 3217] + bl FlashBlockAlignInit + mov w2, 8 + mov w1, 0 + add x0, x19, 3220 + bl ftl_memset + mov w2, 32 + mov w1, 0 + mov x0, x20 + bl ftl_memset + mov w2, 192 + mov w1, 0 + add x0, x19, 3260 + bl ftl_memset + ldr x7, [x19, 104] + adrp x0, IDByte + add x13, x19, 3072 + add x11, x0, :lo12:IDByte + mov x10, x0 + add x12, x7, 1 + mov x8, 0 +.L148: + ldrb w2, [x7] + add x1, x11, x8, lsl 3 + mov x0, x12 + bl FlashMemCmp8 + cbnz w0, .L147 + ldrb w0, [x19, 3216] + add w1, w0, 1 + strb w1, [x19, 3216] + str wzr, [x20, x0, lsl 2] + add x0, x13, x0 + strb w8, [x0, 148] +.L147: + add x8, x8, 1 + cmp x8, 4 + bne .L148 + add x8, x21, :lo12:.LANCHOR0 + ldrb w0, [x8, 3216] + strb w0, [x8, 3217] + ldrb w0, [x7, 8] + cmp w0, 2 + beq .L149 +.L153: + add x9, x21, :lo12:.LANCHOR0 + ldrh w1, [x7, 14] + ldp x19, x20, [sp, 16] + ldrb w0, [x9, 3216] + ldr x21, [sp, 32] + ldp x29, x30, [sp], 48 + mul w0, w0, w1 + ldrb w1, [x7, 13] + mul w0, w0, w1 + strh w0, [x9, 3452] + ret +.L149: + ldr w14, [x8, 92] + add x10, x10, :lo12:IDByte + add x13, x8, 3228 + add x15, x8, 3072 + mov x11, 0 +.L152: + ldrb w2, [x7] + add x1, x10, x11, lsl 3 + mov x0, x12 + bl FlashMemCmp8 + cbnz w0, .L150 + ldrb w1, [x7, 13] + ldrh w0, [x7, 14] + ldrb w2, [x8, 3216] + and w0, w0, 65280 + mul w1, w1, w14 + mul w0, w0, w1 + sxtw x1, w2 + str w0, [x13, x1, lsl 2] + ldrb w3, [x7, 23] + cbz w3, .L151 + lsl w0, w0, 1 + str w0, [x13, x1, lsl 2] +.L151: + add x1, x15, x1 + add w2, w2, 1 + strb w2, [x8, 3216] + strb w11, [x1, 148] +.L150: + add x11, x11, 1 + cmp x11, 4 + bne .L152 + b .L153 + .size FlashDieInfoInit, .-FlashDieInfoInit + .align 2 + .global FlashReadIdbData + .type FlashReadIdbData, %function +FlashReadIdbData: + stp x29, x30, [sp, -16]! + adrp x1, .LANCHOR0 + add x1, x1, :lo12:.LANCHOR0 + mov w2, 2048 + add x29, sp, 0 + add x1, x1, 3456 + bl ftl_memcpy + mov w0, 0 + ldp x29, x30, [sp], 16 + ret + .size FlashReadIdbData, .-FlashReadIdbData + .align 2 + .global FlashLoadPhyInfoInRam + .type FlashLoadPhyInfoInRam, %function +FlashLoadPhyInfoInRam: + stp x29, x30, [sp, -48]! + adrp x9, IDByte + add x9, x9, :lo12:IDByte + mov x8, 0 + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x19, .LANCHOR1 + add x7, x19, :lo12:.LANCHOR1 + str x21, [sp, 32] + add x7, x7, 505 +.L166: + ldrb w2, [x7, -1] + mov w10, w8 + lsl x21, x8, 5 + mov x1, x9 + mov x0, x7 + bl FlashMemCmp8 + mov w20, w0 + cbnz w0, .L164 + add x2, x19, :lo12:.LANCHOR1 + ubfiz x10, x10, 5, 32 + add x0, x2, 504 + add x1, x2, 3256 + add x21, x0, x21 + add x0, x0, x10 + ldrb w3, [x0, 22] + mov x0, 0 +.L165: + lsl x4, x0, 5 + mov w2, w0 + ldrb w4, [x4, x1] + cmp w4, w3 + beq .L168 + add x0, x0, 1 + cmp x0, 4 + bne .L165 + mov w2, w0 +.L168: + add x19, x19, :lo12:.LANCHOR1 + ubfiz x1, x2, 5, 32 + add x0, x19, 3256 + add x19, x19, 472 + add x1, x0, x1 + adrp x0, .LANCHOR0 + add x0, x0, :lo12:.LANCHOR0 + mov w2, 32 + add x0, x0, 112 + bl ftl_memcpy + mov w2, 32 + mov x1, x21 + mov x0, x19 + bl ftl_memcpy + ldrh w0, [x19, 10] + bl FlashBlockAlignInit + b .L163 +.L164: + add x8, x8, 1 + add x7, x7, 32 + cmp x8, 86 + bne .L166 + mov w20, -1 +.L163: + mov w0, w20 + ldr x21, [sp, 32] + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 48 + ret + .size FlashLoadPhyInfoInRam, .-FlashLoadPhyInfoInRam + .align 2 + .global ftl_flash_suspend + .type ftl_flash_suspend, %function +ftl_flash_suspend: + adrp x0, .LANCHOR2 + add x0, x0, :lo12:.LANCHOR2 + ldr x1, [x0, 1152] + ldr w2, [x1] + str w2, [x0, 1160] + ldr w2, [x1, 4] + str w2, [x0, 1164] + ldr w2, [x1, 8] + str w2, [x0, 1168] + ldr w2, [x1, 12] + str w2, [x0, 1172] + ldr w2, [x1, 304] + str w2, [x0, 1176] + ldr w2, [x1, 308] + str w2, [x0, 1180] + ldr w2, [x1, 336] + ldr w1, [x1, 344] + str w2, [x0, 1184] + str w1, [x0, 1188] + ret + .size ftl_flash_suspend, .-ftl_flash_suspend + .align 2 + .global LogAddr2PhyAddr + .type LogAddr2PhyAddr, %function +LogAddr2PhyAddr: + adrp x7, .LANCHOR2 + add x6, x7, :lo12:.LANCHOR2 + mov x9, x7 + ldr w7, [x0, 4] + and w4, w4, 255 + ldrh w10, [x6, 1204] + ldrh w5, [x6, 1206] + adrp x6, .LANCHOR0 + ubfx x12, x7, 10, 16 + and w7, w7, 1023 + mul w5, w5, w10 + and w10, w5, 65535 + add x5, x6, :lo12:.LANCHOR0 + ldrh w8, [x5, 92] + ldrb w11, [x5, 88] + ubfiz w5, w8, 1, 15 + cmp w11, 1 + csel w8, w5, w8, eq + cmp w1, 1 + udiv w5, w12, w10 + and w11, w5, 65535 + msub w5, w5, w10, w12 + and w5, w5, 65535 + bne .L175 + add x1, x9, :lo12:.LANCHOR2 + ldrb w1, [x1, 1220] + cbnz w1, .L175 + add x1, x6, :lo12:.LANCHOR0 + add x1, x1, 144 + ldrh w7, [x1, w7, sxtw 1] +.L175: + add x6, x6, :lo12:.LANCHOR0 + uxtw x1, w11 + add x6, x6, 3228 + cmp w4, 1 + ldr w1, [x6, x1, lsl 2] + madd w5, w5, w8, w1 + add w5, w5, w7 + str w5, [x2] + str w11, [x3] + bls .L177 + ldr w1, [x0, 4] + ldr w0, [x0, 60] + add w1, w1, 1024 + cmp w1, w0 + cset w0, eq + ret +.L177: + mov w0, 0 + ret + .size LogAddr2PhyAddr, .-LogAddr2PhyAddr + .align 2 + .global FlashReadStatusEN + .type FlashReadStatusEN, %function +FlashReadStatusEN: + stp x29, x30, [sp, -32]! + ubfiz x0, x0, 4, 8 + adrp x4, .LANCHOR0 + add x3, x4, :lo12:.LANCHOR0 + add x29, sp, 0 + stp x19, x20, [sp, 16] + add x5, x3, x0 + ldr x20, [x3, x0] + ldr x0, [x3, 104] + ldrb w19, [x5, 8] + ldrb w0, [x0, 8] + cmp w0, 2 + bne .L179 + and w2, w2, 255 + add x3, x3, 112 + cbnz w2, .L180 + ldrb w2, [x3, 13] +.L190: + add x0, x19, 8 + add x4, x4, :lo12:.LANCHOR0 + add x0, x20, x0, lsl 8 + str w2, [x0, 8] + ldrb w4, [x4, 127] + cbz w4, .L184 + add x3, x19, 8 + mov w2, 0 + add x3, x20, x3, lsl 8 +.L183: + cmp w2, w4 + bcc .L185 +.L184: + add x19, x19, 8 + mov x0, 400 + lsl x19, x19, 8 + bl __const_udelay + ldr w0, [x20, x19] + ldp x19, x20, [sp, 16] + and w0, w0, 255 + ldp x29, x30, [sp], 32 + ret +.L180: + ldrb w2, [x3, 14] + b .L190 +.L185: + lsl w0, w2, 3 + add w2, w2, 1 + lsr w0, w1, w0 + and w0, w0, 255 + str w0, [x3, 4] + b .L183 +.L179: + add x0, x19, 8 + mov w1, 112 + add x0, x20, x0, lsl 8 + str w1, [x0, 8] + b .L184 + .size FlashReadStatusEN, .-FlashReadStatusEN + .align 2 + .global FlashWaitReadyEN + .type FlashWaitReadyEN, %function +FlashWaitReadyEN: + stp x29, x30, [sp, -48]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + and w19, w0, 255 + str x21, [sp, 32] + mov w20, w1 + and w21, w2, 255 +.L192: + mov w1, w20 + mov w2, w21 + mov w0, w19 + bl FlashReadStatusEN + mov w1, w0 + cmp w0, 255 + beq .L192 + tbnz x1, 6, .L191 + mov x1, 3 + mov x0, 1 + bl usleep_range + b .L192 +.L191: + ldp x19, x20, [sp, 16] + ldr x21, [sp, 32] + ldp x29, x30, [sp], 48 + ret + .size FlashWaitReadyEN, .-FlashWaitReadyEN + .align 2 + .global ftl_read_flash_info + .type ftl_read_flash_info, %function +ftl_read_flash_info: + stp x29, x30, [sp, -32]! + mov w2, 11 + mov w1, 0 + add x29, sp, 0 + str x19, [sp, 16] + mov x19, x0 + bl ftl_memset + adrp x0, .LANCHOR0 + add x0, x0, :lo12:.LANCHOR0 + mov w4, 1 + ldr x1, [x0, 104] + ldrb w2, [x1, 9] + ldr w1, [x0, 92] + mul w1, w1, w2 + strh w1, [x19, 4] + adrp x1, .LANCHOR2 + add x1, x1, :lo12:.LANCHOR2 + ldrb w2, [x1, 1221] + ldr w1, [x1, 1224] + strb w2, [x19, 7] + mov x2, 0 + str w1, [x19] + ldr x1, [x0, 104] + ldrb w3, [x0, 3216] + ldrb w1, [x1, 9] + strb w1, [x19, 6] + mov w1, 32 + strb w1, [x19, 8] + ldr x1, [x0, 104] + add x0, x0, 3220 + ldrb w1, [x1, 7] + strb w1, [x19, 9] + strb wzr, [x19, 10] +.L199: + cmp w3, w2, uxtb + bhi .L200 + ldr x19, [sp, 16] + ldp x29, x30, [sp], 32 + ret +.L200: + ldrb w1, [x2, x0] + add x2, x2, 1 + ldrb w5, [x19, 10] + lsl w1, w4, w1 + orr w1, w1, w5 + strb w1, [x19, 10] + b .L199 + .size ftl_read_flash_info, .-ftl_read_flash_info + .align 2 + .global FlashScheduleEnSet + .type FlashScheduleEnSet, %function +FlashScheduleEnSet: + adrp x1, .LANCHOR2 + add x1, x1, :lo12:.LANCHOR2 + ldr w2, [x1, 1228] + str w0, [x1, 1228] + mov w0, w2 + ret + .size FlashScheduleEnSet, .-FlashScheduleEnSet + .align 2 + .global FlashGetPageSize + .type FlashGetPageSize, %function +FlashGetPageSize: + adrp x0, .LANCHOR0+104 + ldr x0, [x0, #:lo12:.LANCHOR0+104] + ldrb w0, [x0, 9] + ret + .size FlashGetPageSize, .-FlashGetPageSize + .align 2 + .global NandcReadDontCaseBusyEn + .type NandcReadDontCaseBusyEn, %function +NandcReadDontCaseBusyEn: + ret + .size NandcReadDontCaseBusyEn, .-NandcReadDontCaseBusyEn + .align 2 + .global NandcGetChipIf + .type NandcGetChipIf, %function +NandcGetChipIf: + ubfiz x0, x0, 4, 8 + adrp x1, .LANCHOR0 + add x1, x1, :lo12:.LANCHOR0 + add x2, x1, x0 + ldr x0, [x1, x0] + ldrb w2, [x2, 8] + add x2, x2, 8 + add x0, x0, x2, lsl 8 + ret + .size NandcGetChipIf, .-NandcGetChipIf + .align 2 + .global NandcSetDdrPara + .type NandcSetDdrPara, %function +NandcSetDdrPara: + adrp x1, .LANCHOR2+1152 + and w0, w0, 255 + lsl w2, w0, 8 + ldr x1, [x1, #:lo12:.LANCHOR2+1152] + orr w0, w2, w0, lsl 16 + orr w0, w0, 1 + str w0, [x1, 304] + ret + .size NandcSetDdrPara, .-NandcSetDdrPara + .align 2 + .global NandcSetDdrDiv + .type NandcSetDdrDiv, %function +NandcSetDdrDiv: + adrp x1, .LANCHOR2+1152 + and w0, w0, 255 + mov w2, 16640 + orr w0, w0, w2 + ldr x1, [x1, #:lo12:.LANCHOR2+1152] + str w0, [x1, 344] + ret + .size NandcSetDdrDiv, .-NandcSetDdrDiv + .align 2 + .global NandcSetDdrMode + .type NandcSetDdrMode, %function +NandcSetDdrMode: + adrp x1, .LANCHOR2+1152 + cmp w0, 0 + ldr x2, [x1, #:lo12:.LANCHOR2+1152] + ldr w1, [x2] + and w3, w1, -8193 + orr w1, w1, 253952 + csel w1, w1, w3, ne + str w1, [x2] + ret + .size NandcSetDdrMode, .-NandcSetDdrMode + .align 2 + .global NandcSetMode + .type NandcSetMode, %function +NandcSetMode: + adrp x1, .LANCHOR2+1152 + and w0, w0, 255 + tst w0, 6 + ldr x2, [x1, #:lo12:.LANCHOR2+1152] + ldr w1, [x2] + beq .L212 + orr w1, w1, 24576 + tst x0, 4 + and w1, w1, -32769 + mov w0, 8322 + orr w1, w1, 196608 + str w0, [x2, 344] + mov w0, 4099 + orr w3, w1, 32768 + movk w0, 0x10, lsl 16 + str w0, [x2, 304] + csel w1, w3, w1, ne + mov w0, 38 + str w0, [x2, 308] + mov w0, 39 + str w0, [x2, 308] +.L214: + mov w0, 0 + str w1, [x2] + ret +.L212: + and w1, w1, -8193 + b .L214 + .size NandcSetMode, .-NandcSetMode + .align 2 + .global NandcFlashCs + .type NandcFlashCs, %function +NandcFlashCs: + ubfiz x0, x0, 4, 8 + adrp x1, .LANCHOR0 + add x1, x1, :lo12:.LANCHOR0 + add x3, x1, x0 + ldr x2, [x1, x0] + mov w1, 1 + ldrb w3, [x3, 8] + ldr w0, [x2] + lsl w1, w1, w3 + bfi w0, w1, 0, 8 + str w0, [x2] + ret + .size NandcFlashCs, .-NandcFlashCs + .align 2 + .global NandcFlashDeCs + .type NandcFlashDeCs, %function +NandcFlashDeCs: + ubfiz x0, x0, 4, 8 + adrp x1, .LANCHOR0 + add x1, x1, :lo12:.LANCHOR0 + ldr x1, [x1, x0] + ldr w0, [x1] + and w0, w0, -256 + and w0, w0, -131073 + str w0, [x1] + ret + .size NandcFlashDeCs, .-NandcFlashDeCs + .align 2 + .global HynixSetRRPara + .type HynixSetRRPara, %function +HynixSetRRPara: + stp x29, x30, [sp, -96]! + add x29, sp, 0 + stp x23, x24, [sp, 48] + and w23, w0, 255 + str x27, [sp, 80] + adrp x0, .LANCHOR0 + and w27, w1, 255 + add x1, x0, :lo12:.LANCHOR0 + stp x19, x20, [sp, 16] + mov x20, x2 + stp x21, x22, [sp, 32] + mov x2, x0 + stp x25, x26, [sp, 64] + adrp x21, .LANCHOR2 + and w22, w3, 255 + add x19, x21, :lo12:.LANCHOR2 + ldr x1, [x1, 104] + ldrb w1, [x1, 19] + cmp w1, 6 + bne .L220 + ubfiz x0, x23, 6, 8 + add x19, x19, 1232 + add x0, x0, 20 + add x0, x0, w22, uxtw 2 +.L227: + add x19, x19, x0 +.L221: + sxtw x25, w23 + add x0, x2, :lo12:.LANCHOR0 + lsl x1, x25, 4 + and x27, x27, 255 + add x2, x0, x1 + mov x26, 0 + ldr x24, [x0, x1] + mov w0, w23 + ldrb w5, [x2, 8] + bl NandcFlashCs + ubfiz x5, x5, 8, 8 + add x24, x24, x5 + mov w0, 54 + str w0, [x24, 2056] +.L224: + cmp x26, x27 + bne .L225 + add x21, x21, :lo12:.LANCHOR2 + mov w0, 22 + add x21, x21, x25 + str w0, [x24, 2056] + mov w0, w23 + bl NandcFlashDeCs + strb w22, [x21, 2088] + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldr x27, [sp, 80] + ldp x29, x30, [sp], 96 + ret +.L220: + cmp w1, 7 + bne .L222 + mov w0, 160 + mov x1, 28 + add x19, x19, 1232 + umaddl x1, w0, w23, x1 + mov w0, 10 + umaddl x0, w22, w0, x1 + b .L227 +.L222: + cmp w1, 8 + bne .L223 + add x0, x19, 1260 + add w19, w22, w22, lsl 2 + add x19, x0, w19, sxtw + b .L221 +.L223: + and x0, x22, 255 + add x0, x0, 2 + add x0, x0, w23, uxtw 3 + add x19, x19, x0, lsl 3 + add x19, x19, 1236 + b .L221 +.L225: + ldrb w0, [x20, x26] + str w0, [x24, 2052] + mov x0, 1000 + bl __const_udelay + ldrsb w0, [x19, x26] + add x26, x26, 1 + str w0, [x24, 2048] + b .L224 + .size HynixSetRRPara, .-HynixSetRRPara + .align 2 + .global FlashSetReadRetryDefault + .type FlashSetReadRetryDefault, %function +FlashSetReadRetryDefault: + adrp x0, .LANCHOR0+104 + ldr x0, [x0, #:lo12:.LANCHOR0+104] + ldrb w0, [x0, 19] + sub w0, w0, #1 + and w0, w0, 255 + cmp w0, 7 + bhi .L235 + stp x29, x30, [sp, -48]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x20, .LANCHOR2 + add x20, x20, :lo12:.LANCHOR2 + stp x21, x22, [sp, 32] + adrp x21, IDByte + add x22, x20, 1236 + add x21, x21, :lo12:IDByte + mov x19, 0 +.L231: + lsl x1, x19, 3 + and w0, w19, 255 + ldrb w1, [x1, x21] + cmp w1, 173 + bne .L230 + ldrb w1, [x20, 1233] + mov w3, 0 + mov x2, x22 + bl HynixSetRRPara +.L230: + add x19, x19, 1 + cmp x19, 4 + bne .L231 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x29, x30, [sp], 48 + ret +.L235: + ret + .size FlashSetReadRetryDefault, .-FlashSetReadRetryDefault + .align 2 + .global FlashWaitCmdDone + .type FlashWaitCmdDone, %function +FlashWaitCmdDone: + and x5, x0, 255 + mov x0, 24 + stp x29, x30, [sp, -32]! + adrp x4, .LANCHOR0 + add x4, x4, :lo12:.LANCHOR0 + mul x0, x5, x0 + add x29, sp, 0 + add x1, x4, 3260 + stp x19, x20, [sp, 16] + add x19, x1, x0 + ldr x2, [x19, 8] + cbz x2, .L240 + ldrb w20, [x1, x0] + mov w0, w20 + bl NandcFlashCs + add x4, x4, 3228 + ldr w1, [x19, 4] + ldr w0, [x4, x5, lsl 2] + cmp w0, 0 + mov w0, w20 + cset w2, ne + bl FlashWaitReadyEN + mov w2, w0 + mov w0, w20 + bl NandcFlashDeCs + sbfx x0, x2, 0, 1 + ldr x1, [x19, 8] + str w0, [x1] + str xzr, [x19, 8] + ldr x1, [x19, 16] + cbz x1, .L240 + str w0, [x1] + str xzr, [x19, 16] +.L240: + mov w0, 0 + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 32 + ret + .size FlashWaitCmdDone, .-FlashWaitCmdDone + .align 2 + .global NandcDelayns + .type NandcDelayns, %function +NandcDelayns: + stp x29, x30, [sp, -16]! + uxtw x0, w0 + add x29, sp, 0 + bl __ndelay + mov w0, 0 + ldp x29, x30, [sp], 16 + ret + .size NandcDelayns, .-NandcDelayns + .align 2 + .global NandcWaitFlashReadyNoDelay + .type NandcWaitFlashReadyNoDelay, %function +NandcWaitFlashReadyNoDelay: + stp x29, x30, [sp, -48]! + ubfiz x0, x0, 4, 8 + adrp x1, .LANCHOR0 + add x1, x1, :lo12:.LANCHOR0 + add x29, sp, 0 + stp x19, x20, [sp, 16] + mov w19, 34464 + movk w19, 0x1, lsl 16 + ldr x20, [x1, x0] +.L250: + ldr w0, [x20] + str w0, [x29, 40] + ldr w0, [x29, 40] + tbnz x0, 9, .L251 + mov x0, 50 + bl __const_udelay + subs w19, w19, #1 + bne .L250 + mov w0, -1 +.L248: + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 48 + ret +.L251: + mov w0, 0 + b .L248 + .size NandcWaitFlashReadyNoDelay, .-NandcWaitFlashReadyNoDelay + .align 2 + .global NandcWaitFlashReady + .type NandcWaitFlashReady, %function +NandcWaitFlashReady: + stp x29, x30, [sp, -48]! + ubfiz x0, x0, 4, 8 + adrp x1, .LANCHOR0 + add x1, x1, :lo12:.LANCHOR0 + add x29, sp, 0 + stp x19, x20, [sp, 16] + mov w19, 34464 + movk w19, 0x1, lsl 16 + ldr x20, [x1, x0] + mov x0, 650 + bl __const_udelay +.L256: + ldr w0, [x20] + str w0, [x29, 40] + ldr w0, [x29, 40] + tbnz x0, 9, .L257 + mov x1, 2 + mov x0, 1 + bl usleep_range + subs w19, w19, #1 + bne .L256 + mov w0, -1 +.L254: + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 48 + ret +.L257: + mov w0, 0 + b .L254 + .size NandcWaitFlashReady, .-NandcWaitFlashReady + .align 2 + .global FlashReset + .type FlashReset, %function +FlashReset: + stp x29, x30, [sp, -32]! + add x29, sp, 0 + str x19, [sp, 16] + and w19, w0, 255 + sbfiz x1, x19, 4, 32 + adrp x0, .LANCHOR0 + add x0, x0, :lo12:.LANCHOR0 + add x2, x0, x1 + ldr x5, [x0, x1] + mov w0, w19 + ldrb w4, [x2, 8] + bl NandcFlashCs + add x4, x4, 8 + add x4, x5, x4, lsl 8 + mov w0, 255 + str w0, [x4, 8] + mov w0, w19 + bl NandcWaitFlashReady + mov w0, w19 + bl NandcFlashDeCs + ldr x19, [sp, 16] + ldp x29, x30, [sp], 32 + ret + .size FlashReset, .-FlashReset + .align 2 + .global flash_enter_slc_mode + .type flash_enter_slc_mode, %function +flash_enter_slc_mode: + stp x29, x30, [sp, -64]! + add x29, sp, 0 + stp x21, x22, [sp, 32] + and w22, w0, 255 + adrp x21, .LANCHOR2 + add x0, x21, :lo12:.LANCHOR2 + stp x19, x20, [sp, 16] + str x23, [sp, 48] + ldrb w0, [x0, 1220] + cbz w0, .L262 + mov w0, w22 + bl NandcFlashCs + sxtw x0, w22 + adrp x1, .LANCHOR0 + lsl x2, x0, 4 + add x1, x1, :lo12:.LANCHOR0 + add x3, x1, x2 + lsl x0, x0, 3 + ldr x23, [x1, x2] + adrp x1, IDByte + add x1, x1, :lo12:IDByte + ldrb w19, [x3, 8] + ldrb w0, [x1, x0] + cmp w0, 44 + bne .L264 + ubfiz x20, x19, 8, 8 + mov w0, 239 + add x20, x23, x20 + str w0, [x20, 2056] + mov w0, 145 + str w0, [x20, 2052] + mov x0, 250 + bl __const_udelay + str wzr, [x20, 2048] + mov w0, 1 + str w0, [x20, 2048] + str wzr, [x20, 2048] + mov x0, 500 + str wzr, [x20, 2048] + bl __const_udelay +.L264: + add x19, x19, 8 + mov w0, w22 + add x19, x23, x19, lsl 8 + bl NandcWaitFlashReadyNoDelay + mov w0, 218 + add x21, x21, :lo12:.LANCHOR2 + str w0, [x19, 8] + mov w0, w22 + bl NandcWaitFlashReady + mov w0, 2 + strb w0, [x21, 2092] +.L262: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldr x23, [sp, 48] + ldp x29, x30, [sp], 64 + ret + .size flash_enter_slc_mode, .-flash_enter_slc_mode + .align 2 + .global flash_exit_slc_mode + .type flash_exit_slc_mode, %function +flash_exit_slc_mode: + stp x29, x30, [sp, -64]! + add x29, sp, 0 + stp x21, x22, [sp, 32] + and w22, w0, 255 + adrp x21, .LANCHOR2 + add x0, x21, :lo12:.LANCHOR2 + stp x19, x20, [sp, 16] + str x23, [sp, 48] + ldrb w0, [x0, 1220] + cbz w0, .L269 + mov w0, w22 + bl NandcFlashCs + sxtw x0, w22 + adrp x1, .LANCHOR0 + lsl x2, x0, 4 + add x1, x1, :lo12:.LANCHOR0 + add x3, x1, x2 + lsl x0, x0, 3 + ldr x23, [x1, x2] + adrp x1, IDByte + add x1, x1, :lo12:IDByte + ldrb w19, [x3, 8] + ldrb w0, [x1, x0] + cmp w0, 44 + bne .L271 + ubfiz x20, x19, 8, 8 + mov w0, 239 + add x20, x23, x20 + str w0, [x20, 2056] + mov w0, 145 + str w0, [x20, 2052] + mov x0, 250 + bl __const_udelay + mov w0, 2 + str w0, [x20, 2048] + mov w0, 1 + str w0, [x20, 2048] + str wzr, [x20, 2048] + mov x0, 500 + str wzr, [x20, 2048] + bl __const_udelay +.L271: + add x19, x19, 8 + mov w0, w22 + add x19, x23, x19, lsl 8 + bl NandcWaitFlashReadyNoDelay + add x21, x21, :lo12:.LANCHOR2 + mov w0, 223 + str w0, [x19, 8] + mov w0, w22 + bl NandcWaitFlashReady + strb wzr, [x21, 2092] +.L269: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldr x23, [sp, 48] + ldp x29, x30, [sp], 64 + ret + .size flash_exit_slc_mode, .-flash_exit_slc_mode + .align 2 + .global FlashEraseBlock + .type FlashEraseBlock, %function +FlashEraseBlock: + stp x29, x30, [sp, -48]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + and w19, w0, 255 + mov w20, w1 + str x21, [sp, 32] + mov w0, w19 + mov w21, w2 + bl NandcWaitFlashReady + mov w0, w19 + bl NandcFlashCs + mov w2, w21 + mov w1, w20 + mov w0, w19 + bl FlashEraseCmd + mov w0, w19 + bl NandcWaitFlashReady + mov w1, w20 + mov w0, w19 + bl FlashReadStatus + mov w2, w0 + mov w0, w19 + bl NandcFlashDeCs + and w0, w2, 1 + ldp x19, x20, [sp, 16] + ldr x21, [sp, 32] + ldp x29, x30, [sp], 48 + ret + .size FlashEraseBlock, .-FlashEraseBlock + .align 2 + .global FlashSetInterfaceMode + .type FlashSetInterfaceMode, %function +FlashSetInterfaceMode: + stp x29, x30, [sp, -16]! + adrp x1, .LANCHOR2+2093 + adrp x2, .LANCHOR0 + add x2, x2, :lo12:.LANCHOR0 + add x29, sp, 0 + ldrb w1, [x1, #:lo12:.LANCHOR2+2093] + adrp x7, IDByte + add x2, x2, 8 + add x7, x7, :lo12:IDByte + and w11, w1, 4 + and w6, w1, 1 + mov x5, 0 + mov w12, 69 + mov w8, 239 + mov w9, 128 + mov w10, 1 + mov w13, 35 + mov w14, 32 + mov w15, 5 + mov w16, 44 +.L288: + ldrb w3, [x5, x7] + ldrb w4, [x2] + cmp w3, 152 + ccmp w3, w12, 4, ne + beq .L279 + cmp w3, 173 + ccmp w3, w16, 4, ne + bne .L280 +.L279: + cmp w0, 1 + ldr x1, [x2, -8] + bne .L281 + cbz w6, .L280 + ubfiz x4, x4, 8, 8 + cmp w3, 173 + add x1, x1, x4 + str w8, [x1, 2056] + bne .L282 + str w0, [x1, 2052] +.L300: + str wzr, [x1, 2048] + b .L286 +.L282: + cmp w3, 44 + bne .L284 + str w0, [x1, 2052] + str w15, [x1, 2048] +.L286: + str wzr, [x1, 2048] + str wzr, [x1, 2048] + str wzr, [x1, 2048] +.L280: + add x5, x5, 8 + add x2, x2, 16 + cmp x5, 32 + bne .L288 + mov w0, 0 + bl NandcWaitFlashReady + mov w0, 0 + ldp x29, x30, [sp], 16 + ret +.L284: + str w9, [x1, 2052] + str w0, [x1, 2048] + b .L286 +.L281: + cbz w11, .L280 + ubfiz x4, x4, 8, 8 + cmp w3, 173 + add x1, x1, x4 + str w8, [x1, 2056] + bne .L285 + str w10, [x1, 2052] + str w14, [x1, 2048] + b .L286 +.L285: + cmp w3, 44 + bne .L287 + str w10, [x1, 2052] + str w13, [x1, 2048] + b .L286 +.L287: + str w9, [x1, 2052] + b .L300 + .size FlashSetInterfaceMode, .-FlashSetInterfaceMode + .align 2 + .global FlashReadSpare + .type FlashReadSpare, %function +FlashReadSpare: + stp x29, x30, [sp, -32]! + and w0, w0, 255 + sbfiz x5, x0, 4, 32 + adrp x4, .LANCHOR0 + add x29, sp, 0 + stp x19, x20, [sp, 16] + mov x20, x2 + adrp x2, .LANCHOR1+481 + add x4, x4, :lo12:.LANCHOR0 + ldrb w3, [x2, #:lo12:.LANCHOR1+481] + add x2, x4, x5 + ldrb w19, [x2, 8] + lsl w3, w3, 9 + ldr x2, [x4, x5] + add x19, x2, x19, lsl 8 + and w2, w1, 255 + str wzr, [x19, 2056] + str w3, [x19, 2052] + lsr w3, w3, 8 + str w3, [x19, 2052] + str w2, [x19, 2052] + lsr w2, w1, 8 + str w2, [x19, 2052] + lsr w1, w1, 16 + str w1, [x19, 2052] + mov w1, 48 + str w1, [x19, 2056] + bl NandcWaitFlashReady + ldr w0, [x19, 2048] + strb w0, [x20] + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 32 + ret + .size FlashReadSpare, .-FlashReadSpare + .align 2 + .global SandiskProgTestBadBlock + .type SandiskProgTestBadBlock, %function +SandiskProgTestBadBlock: + stp x29, x30, [sp, -32]! + and w0, w0, 255 + sbfiz x3, x0, 4, 32 + adrp x2, .LANCHOR0 + add x2, x2, :lo12:.LANCHOR0 + add x29, sp, 0 + add x4, x2, x3 + str x19, [sp, 16] + ldr x2, [x2, x3] + ldrb w19, [x4, 8] + add x19, x2, x19, lsl 8 + mov w2, 162 + str w2, [x19, 2056] + mov w2, 128 + str w2, [x19, 2056] + and w2, w1, 255 + str wzr, [x19, 2052] + str wzr, [x19, 2052] + str w2, [x19, 2052] + lsr w2, w1, 8 + str w2, [x19, 2052] + lsr w1, w1, 16 + str w1, [x19, 2052] + mov w1, 16 + str w1, [x19, 2056] + bl NandcWaitFlashReady + mov w0, 112 + str w0, [x19, 2056] + mov x0, 400 + bl __const_udelay + ldr w0, [x19, 2048] + ldr x19, [sp, 16] + and w0, w0, 1 + ldp x29, x30, [sp], 32 + ret + .size SandiskProgTestBadBlock, .-SandiskProgTestBadBlock + .align 2 + .global SandiskSetRRPara + .type SandiskSetRRPara, %function +SandiskSetRRPara: + stp x29, x30, [sp, -32]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + mov x20, x0 + mov w0, 239 + and w19, w1, 255 + str w0, [x20, 8] + mov w0, 17 + str w0, [x20, 4] + mov x0, 1000 + bl __const_udelay + add w1, w19, 1 + mov w0, 5 + adrp x2, g_maxRegNum + adrp x4, g_retryMode + add x2, x2, :lo12:g_maxRegNum + add x4, x4, :lo12:g_retryMode + umull x1, w1, w0 + adrp x0, .LANCHOR1 + add x0, x0, :lo12:.LANCHOR1 + add x3, x0, 256 + add x0, x0, 352 + add x3, x3, x1 + add x0, x0, x1 + mov x1, 0 +.L306: + ldrb w5, [x2] + cmp w5, w1 + bhi .L309 + mov w0, 0 + bl NandcWaitFlashReady + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 32 + ret +.L309: + ldrb w5, [x4] + cmp w5, 67 + bne .L307 + ldrsb w5, [x0, x1] +.L311: + add x1, x1, 1 + str w5, [x20] + b .L306 +.L307: + ldrsb w5, [x3, x1] + b .L311 + .size SandiskSetRRPara, .-SandiskSetRRPara + .align 2 + .global micron_auto_read_calibration_config + .type micron_auto_read_calibration_config, %function +micron_auto_read_calibration_config: + stp x29, x30, [sp, -32]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + and w19, w0, 255 + mov w20, w1 + mov w0, w19 + bl NandcWaitFlashReady + sbfiz x0, x19, 4, 32 + adrp x2, .LANCHOR0 + add x2, x2, :lo12:.LANCHOR0 + add x1, x2, x0 + ldr x0, [x2, x0] + ldrb w19, [x1, 8] + add x19, x0, x19, lsl 8 + mov w0, 239 + str w0, [x19, 2056] + mov w0, 150 + str w0, [x19, 2052] + mov x0, 1000 + bl __const_udelay + str w20, [x19, 2048] + str wzr, [x19, 2048] + str wzr, [x19, 2048] + str wzr, [x19, 2048] + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 32 + ret + .size micron_auto_read_calibration_config, .-micron_auto_read_calibration_config + .align 2 + .global FlashEraseSLc2KBlocks + .type FlashEraseSLc2KBlocks, %function +FlashEraseSLc2KBlocks: + stp x29, x30, [sp, -80]! + add x29, sp, 0 + stp x23, x24, [sp, 48] + mov w23, 56 + stp x21, x22, [sp, 32] + adrp x21, .LANCHOR0 + umaddl x23, w1, w23, x0 + add x21, x21, :lo12:.LANCHOR0 + stp x19, x20, [sp, 16] + and w22, w1, 255 + mov x20, x0 + add x24, x21, 3072 +.L315: + cmp x20, x23 + bne .L320 + ldp x19, x20, [sp, 16] + mov w0, 0 + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x29, x30, [sp], 80 + ret +.L320: + mov w1, 0 + mov w4, w22 + add x3, x29, 76 + add x2, x29, 72 + mov x0, x20 + bl LogAddr2PhyAddr + ldrb w1, [x21, 3216] + ldr w0, [x29, 76] + cmp w1, w0 + bhi .L316 + mov w0, -1 + str w0, [x20] +.L317: + sub w22, w22, #1 + add x20, x20, 56 + and w22, w22, 255 + b .L315 +.L316: + uxtw x0, w0 + mov x2, 24 + add x1, x24, x0 + mul x0, x0, x2 + ldrb w19, [x1, 148] + add x1, x21, 3260 + strb w19, [x1, x0] + mov w0, w19 + bl NandcWaitFlashReady + mov w0, w19 + bl NandcFlashCs + ldr w1, [x29, 72] + mov w2, 0 + mov w0, w19 + bl FlashEraseCmd + mov w0, w19 + bl NandcWaitFlashReady + ldr w1, [x29, 72] + mov w0, w19 + bl FlashReadStatus + sbfx x0, x0, 0, 1 + str w0, [x20] + mov w2, 0 + ldr w1, [x29, 72] + ldr w0, [x21, 92] + add w1, w1, w0 + mov w0, w19 + bl FlashEraseCmd + mov w0, w19 + bl NandcWaitFlashReady + ldr w1, [x29, 72] + mov w0, w19 + bl FlashReadStatus + tbz x0, 0, .L318 + mov w0, -1 + str w0, [x20] +.L318: + ldr w0, [x20] + cmn w0, #1 + bne .L319 + ldr w1, [x29, 72] + adrp x0, .LC1 + add x0, x0, :lo12:.LC1 + bl printk +.L319: + mov w0, w19 + bl NandcFlashDeCs + b .L317 + .size FlashEraseSLc2KBlocks, .-FlashEraseSLc2KBlocks + .align 2 + .global FlashEraseBlocks + .type FlashEraseBlocks, %function +FlashEraseBlocks: + stp x29, x30, [sp, -112]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x19, .LANCHOR0 + stp x25, x26, [sp, 64] + mov w25, w1 + add x1, x19, :lo12:.LANCHOR0 + stp x23, x24, [sp, 48] + stp x21, x22, [sp, 32] + mov w23, w2 + str x27, [sp, 80] + ldrb w1, [x1, 88] + cbnz w1, .L326 + adrp x26, .LANCHOR2 + mov x20, x0 + add x27, x26, :lo12:.LANCHOR2 + mov w21, 0 +.L327: + cmp w21, w23 + bcc .L336 + add x19, x19, :lo12:.LANCHOR0 + adrp x22, .LANCHOR2 + add x24, x19, 3260 + add x22, x22, :lo12:.LANCHOR2 + mov x21, 0 + mov x26, 24 +.L337: + ldrb w0, [x19, 3216] + cmp w0, w21 + bhi .L339 + adrp x0, .LANCHOR2+2096 + ldr w0, [x0, #:lo12:.LANCHOR2+2096] + cbnz w0, .L340 +.L341: + mov w0, 0 + b .L325 +.L326: + mov w1, w2 + bl FlashEraseSLc2KBlocks +.L325: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldr x27, [sp, 80] + ldp x29, x30, [sp], 112 + ret +.L336: + mov w13, 56 + add x2, x29, 104 + mov w1, 0 + sub w4, w23, w21 + umull x13, w21, w13 + add x3, x29, 108 + add x22, x20, x13 + mov x0, x22 + bl LogAddr2PhyAddr + mov w24, w0 + add x1, x19, :lo12:.LANCHOR0 + ldr w0, [x29, 108] + ldrb w2, [x1, 3216] + cmp w2, w0 + bhi .L329 + mov w0, -1 + str w0, [x20, x13] +.L330: + add w21, w21, 1 + b .L327 +.L329: + add x2, x26, :lo12:.LANCHOR2 + mov x3, 24 + ldrb w2, [x2, 2094] + cmp w2, 0 + add x2, x1, 3260 + uxtw x1, w0 + csel w24, w24, wzr, ne + madd x1, x1, x3, x2 + ldr x1, [x1, 8] + cbz x1, .L332 + bl FlashWaitCmdDone +.L332: + add x0, x19, :lo12:.LANCHOR0 + ldr w1, [x29, 108] + add x2, x0, 3260 + mov x0, 24 + madd x0, x1, x0, x2 + ldr w2, [x29, 104] + str w2, [x0, 4] + stp x22, xzr, [x0, 8] + cbz w24, .L333 + add w2, w21, 1 + mov w3, 56 + umaddl x2, w2, w3, x20 + str x2, [x0, 16] +.L333: + add x0, x19, :lo12:.LANCHOR0 + add x2, x0, x1 + add x0, x0, 3260 + ldrb w22, [x2, 3220] + mov x2, 24 + mul x1, x1, x2 + strb w22, [x0, x1] + mov w0, w22 + bl NandcFlashCs + cmp w25, 1 + bne .L334 + ldrb w0, [x27, 1220] + cbz w0, .L334 + mov w0, w22 + bl flash_enter_slc_mode +.L335: + ldr w1, [x29, 108] + add x0, x19, :lo12:.LANCHOR0 + add x0, x0, 3228 + add w21, w21, w24 + ldr w0, [x0, x1, lsl 2] + ldr w1, [x29, 104] + cmp w0, 0 + mov w0, w22 + cset w2, ne + bl FlashWaitReadyEN + ldr w1, [x29, 104] + mov w2, w24 + mov w0, w22 + bl FlashEraseCmd + mov w0, w22 + bl NandcFlashDeCs + b .L330 +.L334: + mov w0, w22 + bl flash_exit_slc_mode + b .L335 +.L339: + mov w0, w21 + bl FlashWaitCmdDone + cmp w25, 1 + bne .L338 + ldrb w0, [x22, 1220] + cbz w0, .L338 + mul x0, x21, x26 + ldrb w0, [x0, x24] + bl flash_exit_slc_mode +.L338: + add x21, x21, 1 + b .L337 +.L340: + adrp x0, IDByte + ldrb w0, [x0, #:lo12:IDByte] + cmp w0, 69 + bne .L341 + mov w0, 56 + umaddl x23, w23, w0, x20 +.L342: + cmp x23, x20 + beq .L341 + str wzr, [x20], 56 + b .L342 + .size FlashEraseBlocks, .-FlashEraseBlocks + .align 2 + .global HynixGetReadRetryDefault + .type HynixGetReadRetryDefault, %function +HynixGetReadRetryDefault: + stp x29, x30, [sp, -128]! + mov w3, -83 + mov w2, -82 + add x29, sp, 0 + stp x21, x22, [sp, 32] + adrp x21, .LANCHOR2 + add x1, x21, :lo12:.LANCHOR2 + stp x19, x20, [sp, 16] + mov w20, w0 + add x0, x1, 1232 + stp x23, x24, [sp, 48] + cmp w20, 2 + stp x25, x26, [sp, 64] + stp x27, x28, [sp, 80] + strb w20, [x1, 1232] + mov w1, -84 + strb w3, [x0, 5] + strb w1, [x0, 4] + mov w1, -81 + strb w2, [x0, 6] + strb w1, [x0, 7] + bne .L358 + mov w1, -89 + strb w1, [x0, 4] + adrp x0, .LANCHOR1+3401 + mov w1, -9 + strb w1, [x0, #:lo12:.LANCHOR1+3401] +.L423: + mov w27, 7 + b .L467 +.L358: + cmp w20, 3 + bne .L360 + mov w1, -80 + strb w1, [x0, 4] + mov w1, -79 + strb w1, [x0, 5] + mov w1, -78 + strb w1, [x0, 6] + mov w1, -77 + strb w1, [x0, 7] + mov w1, -76 + strb w1, [x0, 8] + mov w1, -75 + strb w1, [x0, 9] + mov w1, -74 + strb w1, [x0, 10] + mov w1, -73 +.L466: + mov w27, 8 + mov w28, w27 + strb w1, [x0, 11] +.L359: + sub w0, w20, #1 + cmp w0, 1 + bhi .L365 + adrp x25, .LANCHOR0 + adrp x26, .LANCHOR1 + add x25, x25, :lo12:.LANCHOR0 + add x26, x26, :lo12:.LANCHOR1 + add x3, x25, 3072 + add x26, x26, 3384 + mov w24, 0 +.L366: + ldrb w0, [x25, 3216] + cmp w0, w24 + bhi .L372 +.L373: + add x21, x21, :lo12:.LANCHOR2 + ldp x19, x20, [sp, 16] + strb w28, [x21, 1233] + strb w27, [x21, 1234] + ldp x23, x24, [sp, 48] + ldp x21, x22, [sp, 32] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 128 + ret +.L360: + cmp w20, 4 + bne .L361 + mov w4, -52 + strb w4, [x0, 4] + mov w4, -65 + strb w4, [x0, 5] + mov w4, -86 + strb w4, [x0, 6] + mov w4, -85 + strb w3, [x0, 9] + strb w4, [x0, 7] + mov w4, -51 + strb w2, [x0, 10] + strb w4, [x0, 8] + b .L466 +.L361: + cmp w20, 5 + bne .L362 + mov w1, 56 + strb w1, [x0, 4] + mov w1, 57 + strb w1, [x0, 5] + mov w1, 58 + mov w27, 8 + strb w1, [x0, 6] + mov w1, 59 + strb w1, [x0, 7] +.L467: + mov w28, 4 + b .L359 +.L362: + cmp w20, 6 + bne .L363 + mov w1, 14 + strb w1, [x0, 4] + mov w1, 15 + strb w1, [x0, 5] + mov w1, 16 + mov w27, 12 + strb w1, [x0, 6] + mov w1, 17 + strb w1, [x0, 7] + b .L467 +.L363: + cmp w20, 7 + bne .L364 + mov w1, -80 + strb w1, [x0, 4] + mov w1, -79 + strb w1, [x0, 5] + mov w1, -78 + strb w1, [x0, 6] + mov w1, -77 + strb w1, [x0, 7] + mov w1, -76 + strb w1, [x0, 8] + mov w1, -75 + strb w1, [x0, 9] + mov w1, -74 + strb w1, [x0, 10] + mov w1, -73 + strb w1, [x0, 11] + mov w1, -44 + mov w27, 12 + strb w1, [x0, 12] + mov w28, 10 + mov w1, -43 + strb w1, [x0, 13] + b .L359 +.L364: + cmp w20, 8 + bne .L423 + mov w1, 6 + strb w1, [x0, 4] + mov w1, 7 + strb w1, [x0, 5] + mov w1, 9 + strb w20, [x0, 6] + strb w1, [x0, 7] + mov w27, 50 + mov w1, 10 + mov w28, 5 + strb w1, [x0, 8] + b .L359 +.L372: + add x0, x3, w24, sxtw + mov x22, 0 + ldrb w1, [x0, 148] + add x0, x21, :lo12:.LANCHOR2 + add x0, x0, 1232 + mov x20, x0 + ubfiz x19, x1, 6, 8 + sbfiz x1, x1, 4, 32 + add x2, x25, x1 + add x19, x19, 20 + add x19, x0, x19 + ldr x1, [x25, x1] + ldrb w23, [x2, 8] + add x23, x1, x23, lsl 8 + mov w1, 55 +.L367: + add x0, x20, x22 + str w1, [x23, 2056] + str x3, [x29, 112] + str w1, [x29, 124] + ldrb w0, [x0, 4] + str w0, [x23, 2052] + mov x0, 400 + bl __const_udelay + ldr w0, [x23, 2048] + strb w0, [x19, x22] + add x22, x22, 1 + cmp w28, w22, uxtb + ldr w1, [x29, 124] + ldr x3, [x29, 112] + bhi .L367 + mov x0, 0 +.L370: + add x1, x0, 4 + add x2, x0, 28 + add w5, w0, 8 + add x1, x26, x1 + add x2, x26, x2 +.L369: + ldrb w6, [x19, x0] + ldrb w7, [x1], 4 + add w6, w6, w7 + strb w6, [x19, w5, sxtw] + cmp x2, x1 + add w5, w5, 8 + bne .L369 + add x0, x0, 1 + cmp x0, 4 + bne .L370 + add w24, w24, 1 + strb wzr, [x19, 16] + strb wzr, [x19, 24] + and w24, w24, 255 + strb wzr, [x19, 32] + strb wzr, [x19, 40] + strb wzr, [x19, 48] + strb wzr, [x19, 41] + strb wzr, [x19, 49] + b .L366 +.L365: + sub w0, w20, #3 + cmp w0, 5 + bhi .L373 + mul w26, w28, w27 + sub w25, w28, #1 + adrp x24, .LANCHOR0 + and x25, x25, 255 + mov w22, 0 + lsl w0, w26, 4 + asr w23, w26, 1 + str w0, [x29, 112] + add x26, x24, :lo12:.LANCHOR0 + lsl w0, w23, 1 + str w0, [x29, 124] + add x0, x25, 1 + str x0, [x29, 104] +.L374: + ldrb w0, [x26, 3216] + cmp w0, w22 + bls .L373 + add x0, x26, w22, sxtw + ldrb w25, [x0, 3220] + sbfiz x0, x25, 4, 32 + add x1, x26, x0 + ldr x0, [x26, x0] + ldrb w19, [x1, 8] + add x19, x0, x19, lsl 8 + mov w0, 255 + str w0, [x19, 2056] + mov w0, w25 + bl NandcWaitFlashReady + cmp w20, 7 + sub w6, w20, #5 + bne .L375 + mov x1, 28 + mov w0, 160 + add x2, x21, :lo12:.LANCHOR2 + umaddl x0, w0, w25, x1 + add x2, x2, 1232 + add x2, x2, x0 +.L376: + mov w0, 54 + str w0, [x19, 2056] + cmp w20, 4 + bne .L378 + mov w0, 255 + str w0, [x19, 2052] + mov w0, 64 + str w0, [x19, 2048] + mov w0, 204 +.L468: + str w0, [x19, 2052] + mov w0, 77 + b .L469 +.L375: + cmp w20, 8 + beq .L377 + add x2, x21, :lo12:.LANCHOR2 + ubfiz x0, x25, 6, 8 + add x2, x2, x0 + add x2, x2, 1252 + b .L376 +.L378: + cmp w6, 1 + bhi .L380 + add x0, x21, :lo12:.LANCHOR2 + ldrb w0, [x0, 1236] + str w0, [x19, 2052] + mov w0, 82 +.L469: + str w0, [x19, 2048] +.L379: + mov w0, 22 + str w0, [x19, 2056] + mov w0, 23 + str w0, [x19, 2056] + mov w0, 4 + str w0, [x19, 2056] + mov w0, 25 + str w0, [x19, 2056] + str wzr, [x19, 2056] + cmp w20, 6 + str wzr, [x19, 2052] + str wzr, [x19, 2052] + bne .L381 + mov w0, 31 + str w0, [x19, 2052] +.L382: + mov w0, 2 + str w0, [x19, 2052] + str wzr, [x19, 2052] +.L422: + mov w0, 48 + str w0, [x19, 2056] + str x2, [x29, 96] + mov w0, w25 + str w6, [x29, 120] + bl NandcWaitFlashReady + ldr w6, [x29, 120] + ldr x2, [x29, 96] + cmp w6, 1 + ccmp w20, 8, 4, hi + beq .L424 + cmp w20, 7 + mov w0, 2 + mov w1, 32 + csel w1, w1, w0, eq +.L383: + add x0, x24, :lo12:.LANCHOR0 + mov x7, 0 + ldr x0, [x0, 64] +.L384: + ldr w8, [x19, 2048] + strb w8, [x0, x7] + add x7, x7, 1 + cmp w1, w7, uxtb + bhi .L384 + cmp w20, 8 + bne .L385 + mov w1, 0 +.L387: + ldrb w7, [x0] + cmp w7, 50 + beq .L386 + ldrb w7, [x0, 1] + cmp w7, 5 + beq .L386 + add w1, w1, 1 + add x0, x0, 4 + and w1, w1, 255 + cmp w1, 8 + bne .L387 +.L388: + adrp x0, .LC2 + mov w1, 0 + add x0, x0, :lo12:.LC2 + bl printk +.L390: + b .L390 +.L380: + cmp w20, 7 + bne .L379 + mov w0, 174 + str w0, [x19, 2052] + str wzr, [x19, 2048] + mov w0, 176 + b .L468 +.L381: + str wzr, [x19, 2052] + b .L382 +.L424: + mov w1, 16 + b .L383 +.L386: + cmp w1, 6 + bhi .L388 +.L389: + add x0, x24, :lo12:.LANCHOR0 + ldr x7, [x0, 64] + mov x0, 0 +.L399: + ldr w1, [x29, 112] + cmp w1, w0 + bgt .L400 + add x0, x24, :lo12:.LANCHOR0 + mov w9, w23 + mov w8, 8 + ldr x11, [x0, 64] +.L402: + mov w0, 0 +.L401: + add w1, w0, w9 + add w0, w0, 1 + sbfiz x1, x1, 1, 32 + cmp w23, w0 + ldrh w10, [x11, x1] + mvn w10, w10 + strh w10, [x11, x1] + bgt .L401 + ldr w0, [x29, 124] + subs w8, w8, #1 + add w9, w9, w0 + bne .L402 + mov x1, 0 + mov w14, 1 +.L408: + mov w0, 0 + mov w8, 0 +.L407: + mov w10, w1 + lsl w13, w14, w8 + mov w12, 16 + mov w9, 0 +.L405: + ldrh w15, [x11, w10, sxtw 1] + add w10, w10, w23 + bics wzr, w13, w15 + cinc w9, w9, eq + subs w12, w12, #1 + bne .L405 + cmp w9, 8 + bls .L406 + orr w0, w0, w13 + and w0, w0, 65535 +.L406: + add w8, w8, 1 + cmp w8, 16 + bne .L407 + strh w0, [x11, x1, lsl 1] + add x1, x1, 1 + cmp w23, w1 + bgt .L408 + add x0, x24, :lo12:.LANCHOR0 + mov w8, 0 + ldr x1, [x0, 64] + mov x0, 0 +.L411: + ldr w9, [x1, x0] + add x0, x0, 4 + cmp w9, 0 + cinc w8, w8, eq + cmp x0, 32 + bne .L411 + cmp w8, 7 + ble .L412 + mov w3, 1024 + mov w2, 1 + adrp x0, .LC3 + add x0, x0, :lo12:.LC3 + bl rknand_print_hex + adrp x0, .LC2 + mov w1, 0 + add x0, x0, :lo12:.LC2 + bl printk +.L413: + b .L413 +.L385: + cmp w20, 7 + bne .L391 + mov w1, 0 +.L393: + ldrb w7, [x0] + cmp w7, 12 + beq .L392 + ldrb w7, [x0, 1] + cmp w7, 10 + beq .L392 + add w1, w1, 1 + add x0, x0, 4 + and w1, w1, 255 + cmp w1, 8 + bne .L393 +.L394: + adrp x0, .LC2 + mov w1, 0 + add x0, x0, :lo12:.LC2 + bl printk +.L395: + b .L395 +.L392: + cmp w1, 6 + bls .L389 + b .L394 +.L391: + cmp w20, 6 + bne .L389 + mov x1, 0 +.L396: + ldrb w7, [x0, x1] + cmp w7, 12 + beq .L389 + add x7, x0, x1 + ldrb w7, [x7, 8] + cmp w7, 4 + beq .L389 + add x1, x1, 1 + cmp x1, 8 + bne .L396 + adrp x0, .LC2 + mov w1, 0 + add x0, x0, :lo12:.LC2 + bl printk +.L398: + b .L398 +.L400: + ldr w1, [x19, 2048] + strb w1, [x7, x0] + add x0, x0, 1 + b .L399 +.L412: + cmp w20, 6 + beq .L426 + cmp w20, 7 + beq .L427 + cmp w20, 8 + mov w0, 8 + mov w1, 5 + csel w1, w1, w0, eq +.L414: + mov w8, 0 +.L415: + mov x0, 0 +.L416: + add w9, w12, w0 + ldrb w10, [x7, x0] + add x0, x0, 1 + cmp w28, w0, uxtb + strb w10, [x2, w9, sxtw] + bhi .L416 + ldr x0, [x29, 104] + add w8, w8, 1 + add w12, w12, w1 + cmp w27, w8 + add x7, x7, x0 + bgt .L415 + mov w0, 255 + str w0, [x19, 2056] + str w6, [x29, 96] + mov w0, w25 + bl NandcWaitFlashReady + ldr w6, [x29, 96] + cmp w6, 1 + bhi .L418 + mov w0, 54 + str w0, [x19, 2056] + adrp x0, .LANCHOR2+1236 + mov w1, -1 + ldrb w0, [x0, #:lo12:.LANCHOR2+1236] + str w0, [x19, 2052] + str wzr, [x19, 2048] + mov w0, 22 + str w0, [x19, 2056] + mov w0, w22 + bl FlashReadCmd +.L419: + add w22, w22, 1 + mov w0, w25 + and w22, w22, 255 + bl NandcWaitFlashReady + b .L374 +.L426: + mov w1, 4 + b .L414 +.L427: + mov w1, 10 + b .L414 +.L418: + cmp w20, 8 + bne .L420 + mov w0, 190 +.L470: + str w0, [x19, 2056] + b .L419 +.L420: + mov w0, 56 + b .L470 +.L377: + mov w0, 120 + str w0, [x19, 2056] + str wzr, [x19, 2052] + mov w0, 23 + str wzr, [x19, 2052] + mov w1, 25 + str wzr, [x19, 2052] + add x2, x21, :lo12:.LANCHOR2 + str w0, [x19, 2056] + mov w0, 4 + str w0, [x19, 2056] + add x2, x2, 1260 + str w1, [x19, 2056] + mov w1, 218 + str w1, [x19, 2056] + mov w1, 21 + str wzr, [x19, 2056] + str wzr, [x19, 2052] + str wzr, [x19, 2052] + str w1, [x19, 2052] + str w0, [x19, 2052] + str wzr, [x19, 2052] + b .L422 + .size HynixGetReadRetryDefault, .-HynixGetReadRetryDefault + .align 2 + .global FlashGetReadRetryDefault + .type FlashGetReadRetryDefault, %function +FlashGetReadRetryDefault: + cbz w0, .L484 + stp x29, x30, [sp, -16]! + sub w2, w0, #1 + mov w1, w0 + cmp w2, 7 + add x29, sp, 0 + bhi .L473 + bl HynixGetReadRetryDefault +.L471: + ldp x29, x30, [sp], 16 + ret +.L473: + cmp w0, 49 + bne .L474 + adrp x0, .LANCHOR2 + add x0, x0, :lo12:.LANCHOR2 + mov w2, 64 + strb w1, [x0, 1232] + mov w1, 4 + strb w1, [x0, 1233] + mov w1, 15 + strb w1, [x0, 1234] + adrp x1, .LANCHOR1 + add x1, x1, :lo12:.LANCHOR1 + add x1, x1, 408 +.L487: + add x0, x0, 1236 + bl ftl_memcpy + b .L471 +.L474: + sub w0, w0, #65 + cmp w1, 33 + ccmp w0, 1, 0, ne + bhi .L475 + adrp x0, .LANCHOR2 + add x0, x0, :lo12:.LANCHOR2 + strb w1, [x0, 1232] + mov w1, 4 +.L488: + strb w1, [x0, 1233] + mov w1, 7 + strb w1, [x0, 1234] + adrp x1, .LANCHOR1 + add x1, x1, :lo12:.LANCHOR1 + mov w2, 45 + add x1, x1, 352 + b .L487 +.L475: + cmp w1, 34 + mov w0, 67 + ccmp w1, w0, 4, ne + bne .L476 + adrp x0, .LANCHOR2 + add x0, x0, :lo12:.LANCHOR2 + strb w1, [x0, 1232] + mov w1, 5 + b .L488 +.L476: + cmp w1, 35 + mov w0, 68 + ccmp w1, w0, 4, ne + bne .L471 + adrp x0, .LANCHOR2 + add x0, x0, :lo12:.LANCHOR2 + mov w2, 95 + strb w1, [x0, 1232] + mov w1, 5 + strb w1, [x0, 1233] + mov w1, 17 + strb w1, [x0, 1234] + adrp x1, .LANCHOR1 + add x1, x1, :lo12:.LANCHOR1 + add x1, x1, 256 + b .L487 +.L484: + ret + .size FlashGetReadRetryDefault, .-FlashGetReadRetryDefault + .align 2 + .global FlashReadDpCmd + .type FlashReadDpCmd, %function +FlashReadDpCmd: + stp x29, x30, [sp, -64]! + add x29, sp, 0 + stp x21, x22, [sp, 32] + and w22, w0, 255 + adrp x0, .LANCHOR0 + add x4, x0, :lo12:.LANCHOR0 + stp x23, x24, [sp, 48] + mov w21, w1 + stp x19, x20, [sp, 16] + sbfiz x1, x22, 4, 32 + and w24, w2, 255 + lsr w23, w2, 8 + lsr w20, w2, 16 + ldr x2, [x4, 104] + add x3, x4, x1 + ldr x5, [x4, x1] + ldrb w1, [x4, 128] + and w7, w21, 255 + lsr w6, w21, 8 + cmp w1, 1 + ldrb w19, [x3, 8] + lsr w1, w21, 16 + ldrb w2, [x2, 7] + bne .L490 + cmp w2, 1 + bne .L491 + sxtw x3, w19 + mov w2, 38 + add x3, x3, 8 + add x3, x5, x3, lsl 8 + str w2, [x3, 8] +.L491: + add x0, x0, :lo12:.LANCHOR0 + add x19, x5, x19, lsl 8 + add x0, x0, 112 + ldrb w2, [x0, 8] + str w2, [x19, 2056] + str wzr, [x19, 2052] + str wzr, [x19, 2052] + str w7, [x19, 2052] + str w6, [x19, 2052] + ldrb w0, [x0, 9] + str w1, [x19, 2052] + str w0, [x19, 2056] + mov w0, w22 + bl NandcWaitFlashReady + str wzr, [x19, 2056] + str wzr, [x19, 2052] + str wzr, [x19, 2052] +.L495: + str w24, [x19, 2052] + mov w0, 48 + str w23, [x19, 2052] + mov w1, w21 + str w20, [x19, 2052] + str w0, [x19, 2056] + mov w0, w22 + bl FlashSetRandomizer + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x29, x30, [sp], 64 + ret +.L490: + cmp w2, 1 + bne .L493 + sxtw x3, w19 + mov w2, 38 + add x3, x3, 8 + add x3, x5, x3, lsl 8 + str w2, [x3, 8] +.L493: + add x0, x0, :lo12:.LANCHOR0 + add x19, x5, x19, lsl 8 + add x0, x0, 112 + ldrb w2, [x0, 8] + str w2, [x19, 2056] + str w7, [x19, 2052] + str w6, [x19, 2052] + ldrb w0, [x0, 9] + str w1, [x19, 2052] + str w0, [x19, 2056] + b .L495 + .size FlashReadDpCmd, .-FlashReadDpCmd + .align 2 + .global ftl_flash_de_init + .type ftl_flash_de_init, %function +ftl_flash_de_init: + stp x29, x30, [sp, -32]! + mov w0, 0 + add x29, sp, 0 + str x19, [sp, 16] + bl NandcWaitFlashReady + bl FlashSetReadRetryDefault + adrp x19, .LANCHOR2 + add x0, x19, :lo12:.LANCHOR2 + ldr w0, [x0, 2100] + cbz w0, .L497 + mov w0, 0 + bl flash_enter_slc_mode +.L498: + add x19, x19, :lo12:.LANCHOR2 + ldrb w0, [x19, 2104] + cbz w0, .L499 + ldrb w0, [x19, 2093] + tbz x0, 0, .L499 + mov w0, 1 + bl FlashSetInterfaceMode + mov w0, 1 + bl NandcSetMode + strb wzr, [x19, 2104] +.L499: + adrp x0, .LANCHOR0 + ldr x0, [x0, #:lo12:.LANCHOR0] + str wzr, [x0, 336] + mov w0, 0 + ldr x19, [sp, 16] + ldp x29, x30, [sp], 32 + ret +.L497: + mov w0, 0 + bl flash_exit_slc_mode + b .L498 + .size ftl_flash_de_init, .-ftl_flash_de_init + .align 2 + .global NandcRandmzSel + .type NandcRandmzSel, %function +NandcRandmzSel: + ubfiz x0, x0, 4, 8 + adrp x2, .LANCHOR0 + add x2, x2, :lo12:.LANCHOR0 + ldr x0, [x2, x0] + str w1, [x0, 336] + ret + .size NandcRandmzSel, .-NandcRandmzSel + .align 2 + .global NandcTimeCfg + .type NandcTimeCfg, %function +NandcTimeCfg: + stp x29, x30, [sp, -32]! + add x29, sp, 0 + str x19, [sp, 16] + mov w19, w0 + mov w0, 0 + bl rknand_get_clk_rate + mov w1, 16960 + movk w1, 0xf, lsl 16 + sdiv w0, w0, w1 + adrp x1, .LANCHOR2 + add x1, x1, :lo12:.LANCHOR2 + cmp w0, 250 + ble .L509 + ldr x0, [x1, 1152] + mov w1, 8354 +.L517: + str w1, [x0, 4] + ldr x19, [sp, 16] + ldp x29, x30, [sp], 32 + ret +.L509: + cmp w0, 220 + ble .L511 + ldr x0, [x1, 1152] +.L518: + mov w1, 8322 + b .L517 +.L511: + cmp w0, 185 + ble .L512 + ldr x0, [x1, 1152] + mov w1, 4226 + b .L517 +.L512: + cmp w0, 160 + ldr x0, [x1, 1152] + ble .L513 + mov w1, 4194 + b .L517 +.L513: + cmp w19, 35 + bhi .L514 + mov w1, 4193 + b .L517 +.L514: + cmp w19, 99 + bhi .L518 + mov w1, 4225 + b .L517 + .size NandcTimeCfg, .-NandcTimeCfg + .align 2 + .global FlashTimingCfg + .type FlashTimingCfg, %function +FlashTimingCfg: + stp x29, x30, [sp, -16]! + mov w1, -4193 + add w2, w0, w1 + mov w3, -4225 + add x29, sp, 0 + add w1, w0, w3 + cmp w2, 1 + ccmp w1, 1, 0, hi + bls .L520 + mov w1, 8322 + cmp w0, w1 + bne .L521 +.L520: + adrp x1, .LANCHOR2+1152 + ldr x1, [x1, #:lo12:.LANCHOR2+1152] + str w0, [x1, 4] +.L521: + adrp x0, .LANCHOR1+493 + ldrb w0, [x0, #:lo12:.LANCHOR1+493] + bl NandcTimeCfg + ldp x29, x30, [sp], 16 + ret + .size FlashTimingCfg, .-FlashTimingCfg + .align 2 + .global NandcInit + .type NandcInit, %function +NandcInit: + stp x29, x30, [sp, -32]! + adrp x2, .LANCHOR0 + add x1, x2, :lo12:.LANCHOR0 + add x29, sp, 0 + str x19, [sp, 16] + adrp x19, .LANCHOR2 + str x0, [x2, #:lo12:.LANCHOR0] + mov w2, 1 + str w2, [x1, 24] + mov w2, 2 + str w2, [x1, 40] + mov w2, 3 + str w2, [x1, 56] + add x2, x19, :lo12:.LANCHOR2 + str wzr, [x1, 8] + str x0, [x1, 16] + str x0, [x1, 32] + str x0, [x1, 48] + str x0, [x2, 1152] + ldr w1, [x0] + ubfx x3, x1, 13, 1 + str w3, [x2, 2108] + ldr w3, [x0, 352] + and w1, w1, 245760 + orr w1, w1, 256 + ubfx x3, x3, 16, 4 + str w3, [x2, 2112] + ldr w3, [x0, 352] + str w3, [x2, 2116] + cmp w3, 2049 + bne .L524 + mov w3, 8 + str w3, [x2, 2112] +.L524: + add x19, x19, :lo12:.LANCHOR2 + str w1, [x0] + ldr x0, [x19, 1152] + str wzr, [x0, 336] + mov w0, 40 + bl NandcTimeCfg + ldr x0, [x19, 1152] + mov w1, 8322 + str w1, [x0, 344] + mov w1, 6145 + movk w1, 0x18, lsl 16 + str w1, [x0, 304] + mov w0, 36864 + bl ftl_dma32_malloc + str wzr, [x19, 2168] + str x0, [x19, 2120] + str x0, [x19, 2128] + add x0, x0, 32768 + str wzr, [x19, 2176] + str x0, [x19, 2136] + ldr x19, [sp, 16] + ldp x29, x30, [sp], 32 + ret + .size NandcInit, .-NandcInit + .align 2 + .global NandcGetTimeCfg + .type NandcGetTimeCfg, %function +NandcGetTimeCfg: + adrp x4, .LANCHOR2 + add x4, x4, :lo12:.LANCHOR2 + ldr x5, [x4, 1152] + ldr w5, [x5, 4] + str w5, [x0] + ldr x0, [x4, 1152] + ldr w0, [x0] + str w0, [x1] + ldr x0, [x4, 1152] + ldr w0, [x0, 304] + str w0, [x2] + ldr x0, [x4, 1152] + ldr w1, [x0, 308] + ldr w0, [x0, 344] + and w1, w1, 255 + orr w0, w1, w0, lsl 16 + str w0, [x3] + ret + .size NandcGetTimeCfg, .-NandcGetTimeCfg + .align 2 + .global NandcBchSel + .type NandcBchSel, %function +NandcBchSel: + adrp x1, .LANCHOR2 + add x1, x1, :lo12:.LANCHOR2 + and w0, w0, 255 + mov w3, 1 + cmp w0, 16 + ldr x2, [x1, 1152] + str w0, [x1, 2180] + mov w1, 4096 + str w3, [x2, 8] + bne .L528 +.L531: + and w1, w1, -17 +.L529: + orr w1, w1, 1 + str w1, [x2, 12] + ret +.L528: + cmp w0, 24 + bne .L530 + orr w1, w1, 16 + b .L529 +.L530: + orr w1, w1, 262144 + cmp w0, 40 + orr w1, w1, 16 + bne .L529 + b .L531 + .size NandcBchSel, .-NandcBchSel + .align 2 + .global FlashBchSel + .type FlashBchSel, %function +FlashBchSel: + stp x29, x30, [sp, -16]! + adrp x1, .LANCHOR2+1221 + and w0, w0, 255 + add x29, sp, 0 + strb w0, [x1, #:lo12:.LANCHOR2+1221] + bl NandcBchSel + ldp x29, x30, [sp], 16 + ret + .size FlashBchSel, .-FlashBchSel + .align 2 + .global ftl_flash_resume + .type ftl_flash_resume, %function +ftl_flash_resume: + stp x29, x30, [sp, -48]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x19, .LANCHOR2 + add x0, x19, :lo12:.LANCHOR2 + str x21, [sp, 32] + adrp x21, IDByte + add x21, x21, :lo12:IDByte + mov x20, 0 + ldr x1, [x0, 1152] + ldr w2, [x0, 1160] + str w2, [x1] + ldr w2, [x0, 1164] + ldr x1, [x0, 1152] + str w2, [x1, 4] + ldr w2, [x0, 1168] + ldr x1, [x0, 1152] + str w2, [x1, 8] + ldr w2, [x0, 1172] + str w2, [x1, 12] + ldr w2, [x0, 1176] + str w2, [x1, 304] + ldr w2, [x0, 1180] + str w2, [x1, 308] + ldr w2, [x0, 1184] + str w2, [x1, 336] + ldr w0, [x0, 1188] + str w0, [x1, 344] +.L539: + lsl x0, x20, 3 + ldrb w0, [x0, x21] + sub w0, w0, #1 + and w0, w0, 255 + cmp w0, 253 + bhi .L538 + mov w0, w20 + bl FlashReset +.L538: + add x20, x20, 1 + cmp x20, 4 + bne .L539 + add x19, x19, :lo12:.LANCHOR2 + ldrb w0, [x19, 2104] + cbz w0, .L540 + mov w0, 1 + bl NandcSetMode + ldrb w0, [x19, 2093] + bl FlashSetInterfaceMode + ldrb w0, [x19, 2093] + bl NandcSetMode + ldr w0, [x19, 1176] + lsr w0, w0, 8 + bl NandcSetDdrPara +.L540: + adrp x0, .LANCHOR0+104 + ldr x0, [x0, #:lo12:.LANCHOR0+104] + ldrb w0, [x0, 20] + bl FlashBchSel + ldr x21, [sp, 32] + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 48 + ret + .size ftl_flash_resume, .-ftl_flash_resume + .align 2 + .global ftl_nandc_get_irq_status + .type ftl_nandc_get_irq_status, %function +ftl_nandc_get_irq_status: + ldr w0, [x0, 372] + ret + .size ftl_nandc_get_irq_status, .-ftl_nandc_get_irq_status + .align 2 + .global NandcIqrWaitFlashReady + .type NandcIqrWaitFlashReady, %function +NandcIqrWaitFlashReady: + ret + .size NandcIqrWaitFlashReady, .-NandcIqrWaitFlashReady + .align 2 + .global NandcSendDumpDataStart + .type NandcSendDumpDataStart, %function +NandcSendDumpDataStart: + sub sp, sp, #16 + ldr w2, [x0, 16] + mov w1, 1066 + movk w1, 0x2020, lsl 16 + str w2, [sp, 8] + ldr w2, [sp, 8] + and w2, w2, -5 + str w2, [sp, 8] + ldr w2, [sp, 8] + str w2, [x0, 16] + str w1, [x0, 8] + orr w1, w1, 4 + str w1, [x0, 8] + add sp, sp, 16 + ret + .size NandcSendDumpDataStart, .-NandcSendDumpDataStart + .align 2 + .global NandcSendDumpDataDone + .type NandcSendDumpDataDone, %function +NandcSendDumpDataDone: + sub sp, sp, #16 +.L551: + ldr w1, [x0, 8] + str w1, [sp, 8] + ldr w1, [sp, 8] + tbz x1, 20, .L551 + add sp, sp, 16 + ret + .size NandcSendDumpDataDone, .-NandcSendDumpDataDone + .align 2 + .global NandcXferStart + .type NandcXferStart, %function +NandcXferStart: + stp x29, x30, [sp, -96]! + ubfiz x0, x0, 4, 8 + ubfx x3, x3, 1, 7 + add x29, sp, 0 + stp x23, x24, [sp, 48] + and w24, w1, 255 + adrp x1, .LANCHOR0 + add x1, x1, :lo12:.LANCHOR0 + stp x19, x20, [sp, 16] + add x6, x1, x0 + stp x21, x22, [sp, 32] + ubfiz w20, w24, 1, 1 + str x25, [sp, 64] + orr w20, w20, 8 + adrp x19, .LANCHOR2 + ldr x21, [x1, x0] + mov w1, 16 + ldrb w0, [x6, 8] + ldr w23, [x21, 12] + bfi w23, w1, 8, 8 + and w23, w23, -9 + bfi w23, w0, 5, 3 + mov w0, 1 + bfi w20, w0, 5, 2 + add x0, x19, :lo12:.LANCHOR2 + orr w20, w20, 536870912 + orr w20, w20, 1024 + ldr w1, [x0, 2112] + bfi w20, w3, 4, 1 + cmp w1, 3 + bls .L556 + ldr w1, [x21, 16] + cmp x5, 0 + str w1, [x29, 88] + ccmp x4, 0, 0, eq + ldr w1, [x29, 88] + and w1, w1, -5 + str w1, [x29, 88] + beq .L557 + and w2, w2, 255 + cbnz w24, .L558 +.L566: + add w2, w2, 1 + asr w2, w2, 1 + bfi w20, w2, 22, 6 + cbz x4, .L559 + mov x0, x4 +.L560: + add x19, x19, :lo12:.LANCHOR2 + ubfx x25, x20, 22, 5 + mov x22, x4 + mov w2, w24 + ldr x1, [x19, 2136] + str x1, [x19, 2152] + lsl w1, w25, 10 + str x0, [x19, 2144] + bl rknand_dma_map_single + str w0, [x19, 2160] + lsl w1, w25, 7 + ldr x0, [x19, 2152] + mov w2, w24 + bl rknand_dma_map_single + str w0, [x19, 2164] + mov w0, 1 + str w0, [x19, 2168] + ldr w0, [x19, 2160] + mov w1, 16 + str w0, [x21, 20] + tst x22, 3 + ldr w0, [x19, 2164] + str w0, [x21, 24] + str wzr, [x29, 88] + ldr w0, [x29, 88] + bfi w0, w1, 9, 5 + str w0, [x29, 88] + ldr w0, [x29, 88] + orr w0, w0, 448 + str w0, [x29, 88] + bne .L567 + ldr w0, [x29, 88] + mov w1, 2 + bfi w0, w1, 3, 3 + str w0, [x29, 88] +.L567: + ldr w0, [x29, 88] + cmp w24, 0 + cset w1, eq + orr w0, w0, 4 + str w0, [x29, 88] + ldr w0, [x29, 88] + bfi w0, w1, 1, 1 + str w0, [x29, 88] + ldr w0, [x29, 88] + orr w0, w0, 1 + str w0, [x29, 88] +.L557: + ldr w0, [x29, 88] + str w0, [x21, 16] +.L556: + str w23, [x21, 12] + str w20, [x21, 8] + orr w20, w20, 4 + str w20, [x21, 8] + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldr x25, [sp, 64] + ldp x29, x30, [sp], 96 + ret +.L558: + ldr w1, [x0, 2180] + mov w6, 64 + lsr w9, w2, 1 + mov x8, x5 + cmp w1, 25 + mov w1, 128 + csel w6, w6, w1, cc + mov w7, 0 + mov w3, 0 + mov w10, -1 +.L562: + cmp w3, w9 + bcs .L566 + lsr w1, w7, 2 + cbz x5, .L563 + ldr x11, [x0, 2136] + lsl w1, w1, 2 + ldr w12, [x8], 4 + str w12, [x11, x1] +.L564: + add w3, w3, 1 + add w7, w7, w6 + b .L562 +.L563: + ldr x11, [x0, 2136] + lsl w1, w1, 2 + str w10, [x11, x1] + b .L564 +.L559: + add x0, x19, :lo12:.LANCHOR2 + ldr x0, [x0, 2128] + b .L560 + .size NandcXferStart, .-NandcXferStart + .align 2 + .global NandcXferComp + .type NandcXferComp, %function +NandcXferComp: + stp x29, x30, [sp, -80]! + ubfiz x0, x0, 4, 8 + adrp x1, .LANCHOR0 + add x1, x1, :lo12:.LANCHOR0 + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x20, .LANCHOR2 + stp x21, x22, [sp, 32] + stp x23, x24, [sp, 48] + ldr x19, [x1, x0] + add x0, x20, :lo12:.LANCHOR2 + ldr w1, [x0, 2112] + cmp w1, 3 + bls .L604 + ldr w1, [x19, 16] + tbz x1, 2, .L604 + ldr w1, [x19, 16] + tbz x1, 1, .L575 + adrp x22, .LC4 + adrp x23, .LC5 + ldr w1, [x19, 8] + mov x24, x0 + add x22, x22, :lo12:.LC4 + add x23, x23, :lo12:.LC5 + mov w21, 0 + str w1, [x29, 64] +.L576: + ldr w1, [x19, 28] + ldr w0, [x29, 64] + ubfx x1, x1, 16, 5 + ubfx x0, x0, 22, 6 + cmp w1, w0 + bge .L584 + ldr w0, [x24, 2112] + cmp w0, 5 + bhi .L577 +.L580: + add w21, w21, 1 + tst x21, 16777215 + bne .L579 + ldr w2, [x19, 28] + mov w1, w21 + ldr w3, [x29, 64] + mov x0, x22 + ubfx x2, x2, 16, 5 + ubfx x3, x3, 22, 6 + bl printk + mov w3, 512 + mov w2, 4 + mov x1, x19 + mov x0, x23 + bl rknand_print_hex +.L579: + mov x1, 5 + mov x0, 1 + bl usleep_range + b .L576 +.L577: + ldr w0, [x19] + str w0, [x29, 72] + ldr w0, [x29, 72] + tbz x0, 13, .L580 + ldr w0, [x29, 72] + tbz x0, 17, .L580 +.L584: + add x19, x20, :lo12:.LANCHOR2 + add x19, x19, 2128 + ldr w0, [x19, 40] + cbz w0, .L585 + ldr w0, [x19, 32] + mov w2, 0 + ldr w1, [x29, 64] + ubfx x1, x1, 22, 5 + lsl w1, w1, 10 + bl rknand_dma_unmap_single + ldr w1, [x29, 64] + mov w2, 0 + ldr w0, [x19, 36] + ubfx x1, x1, 22, 5 + lsl w1, w1, 7 + bl rknand_dma_unmap_single +.L585: + add x20, x20, :lo12:.LANCHOR2 + str wzr, [x20, 2168] +.L573: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x29, x30, [sp], 80 + ret +.L575: + adrp x22, .LC6 + adrp x23, .LC5 + ldr w0, [x19, 8] + add x22, x22, :lo12:.LC6 + add x23, x23, :lo12:.LC5 + mov w21, 0 + str w0, [x29, 64] +.L586: + ldr w0, [x29, 64] + tbz x0, 20, .L588 + add x0, x20, :lo12:.LANCHOR2 + ldr w0, [x0, 2176] + cbz w0, .L589 + mov x0, x19 + bl NandcSendDumpDataStart +.L589: + add x21, x20, :lo12:.LANCHOR2 + add x21, x21, 2128 + ldr w0, [x21, 40] + cbz w0, .L590 + ldr w0, [x21, 32] + mov w2, 1 + ldr w1, [x29, 64] + ubfx x1, x1, 22, 5 + lsl w1, w1, 10 + bl rknand_dma_unmap_single + ldr w1, [x29, 64] + mov w2, 1 + ldr w0, [x21, 36] + ubfx x1, x1, 22, 5 + lsl w1, w1, 7 + bl rknand_dma_unmap_single +.L590: + add x0, x20, :lo12:.LANCHOR2 + ldr w0, [x0, 2176] + cbz w0, .L585 + mov x0, x19 + bl NandcSendDumpDataDone + b .L585 +.L588: + ldr w0, [x19, 8] + add w21, w21, 1 + str w0, [x29, 64] + tst x21, 16777215 + bne .L587 + ldr w2, [x29, 64] + mov w1, w21 + ldr w3, [x19, 28] + mov x0, x22 + ubfx x3, x3, 16, 5 + bl printk + mov w3, 512 + mov w2, 4 + mov x1, x19 + mov x0, x23 + bl rknand_print_hex +.L587: + mov x1, 5 + mov x0, 1 + bl usleep_range + b .L586 +.L604: + ldr w0, [x19, 8] + str w0, [x29, 64] + ldr w0, [x29, 64] + tbz x0, 20, .L604 + b .L573 + .size NandcXferComp, .-NandcXferComp + .align 2 + .global NandcCopy1KB + .type NandcCopy1KB, %function +NandcCopy1KB: + stp x29, x30, [sp, -48]! + and w1, w1, 255 + cmp w1, 1 + add x29, sp, 0 + stp x19, x20, [sp, 16] + and w19, w2, 255 + str x21, [sp, 32] + add x2, x0, 4096 + add x21, x0, 512 + ubfiz x0, x19, 9, 8 + mov x20, x4 + add x0, x2, x0 + bne .L614 + cbz x3, .L615 + mov w2, 1024 + mov x1, x3 + bl ftl_memcpy +.L615: + cbz x20, .L613 + lsr w19, w19, 1 + mov w1, 48 + ldr w0, [x20] + mul w19, w19, w1 + and x19, x19, 8176 + str w0, [x21, x19] +.L613: + ldp x19, x20, [sp, 16] + ldr x21, [sp, 32] + ldp x29, x30, [sp], 48 + ret +.L614: + cbz x3, .L618 + mov x1, x0 + mov w2, 1024 + mov x0, x3 + bl ftl_memcpy +.L618: + cbz x20, .L613 + lsr w19, w19, 1 + mov w0, 48 + mul w19, w19, w0 + and x19, x19, 8176 + ldr w0, [x21, x19] + strb w0, [x20] + lsr w1, w0, 8 + strb w1, [x20, 1] + lsr w1, w0, 16 + lsr w0, w0, 24 + strb w1, [x20, 2] + strb w0, [x20, 3] + b .L613 + .size NandcCopy1KB, .-NandcCopy1KB + .align 2 + .global NandcXferData + .type NandcXferData, %function +NandcXferData: + stp x29, x30, [sp, -192]! + tst x3, 63 + add x29, sp, 0 + stp x25, x26, [sp, 64] + and w25, w0, 255 + stp x19, x20, [sp, 16] + adrp x0, .LANCHOR0 + and w20, w1, 255 + add x0, x0, :lo12:.LANCHOR0 + sbfiz x1, x25, 4, 32 + stp x21, x22, [sp, 32] + stp x23, x24, [sp, 48] + mov x26, x3 + stp x27, x28, [sp, 80] + and w24, w2, 255 + mov x21, x4 + ldr x19, [x0, x1] + bne .L631 + cbnz x4, .L632 + add x21, x29, 128 + mov w2, 64 + mov w1, 255 + add x0, x29, 128 + bl ftl_memset +.L632: + mov x5, x21 + mov x4, x26 + mov w2, w24 + mov w3, 0 + mov w1, w20 + mov w0, w25 + bl NandcXferStart + mov w1, w20 + mov w0, w25 + bl NandcXferComp + cbnz w20, .L656 + adrp x0, .LANCHOR2 + add x2, x0, :lo12:.LANCHOR2 + ubfx x3, x24, 1, 7 + mov w4, 64 + add x3, x21, x3, lsl 2 + ldr w1, [x2, 2180] + cmp w1, 25 + mov w1, 128 + csel w4, w4, w1, cc + mov w1, 0 +.L635: + add w5, w4, w1 + cmp x21, x3 + bne .L636 + add x0, x0, :lo12:.LANCHOR2 + lsr w24, w24, 2 + mov w2, 0 + mov w22, 0 + ldr w4, [x0, 2112] + ldr w3, [x0, 2180] +.L637: + cmp w2, w24 + bcs .L633 + cbnz w3, .L643 +.L633: + str wzr, [x19, 16] +.L644: + adrp x0, .LANCHOR2+2112 + ldr w0, [x0, #:lo12:.LANCHOR2+2112] + cmp w0, 5 + bls .L630 + cbnz w20, .L630 + ldr w0, [x19] + mov w1, 8192 + movk w1, 0x2, lsl 16 + and w1, w0, w1 + cmp w1, 139264 + bne .L630 + orr w0, w0, 131072 + mov w22, -1 + str w0, [x19] +.L630: + mov w0, w22 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 192 + ret +.L636: + ldr x6, [x2, 2136] + and x1, x1, 4294967292 + add x21, x21, 4 + ldr w1, [x6, x1] + strb w1, [x21, -4] + lsr w6, w1, 8 + strb w6, [x21, -3] + lsr w6, w1, 16 + strb w6, [x21, -2] + lsr w1, w1, 24 + strb w1, [x21, -1] + mov w1, w5 + b .L635 +.L643: + uxtw x0, w2 + add x0, x0, 8 + ldr w0, [x19, x0, lsl 2] + str w0, [x29, 120] + ldr w0, [x29, 120] + tbnz x0, 2, .L659 + ldr w0, [x29, 120] + tbnz x0, 15, .L659 + cmp w4, 5 + bls .L639 + ldr w1, [x29, 120] + ubfx x6, x1, 3, 5 + ldr w1, [x29, 120] + ldr w0, [x29, 120] + ubfx x1, x1, 27, 1 + ubfx x5, x0, 16, 5 + ldr w0, [x29, 120] + orr w1, w6, w1, lsl 5 + ubfx x0, x0, 29, 1 + orr w0, w5, w0, lsl 5 + cmp w1, w0 + ldr w0, [x29, 120] + bls .L640 + ubfx x1, x0, 3, 5 + ldr w0, [x29, 120] + ubfx x0, x0, 27, 1 +.L665: + orr w0, w1, w0, lsl 5 +.L641: + cmp w22, w0 + csel w22, w22, w0, cs +.L638: + add w2, w2, 1 + b .L637 +.L640: + ubfx x1, x0, 16, 5 + ldr w0, [x29, 120] + ubfx x0, x0, 29, 1 + b .L665 +.L639: + cmp w4, 3 + bls .L660 + ldr w1, [x29, 120] + ubfx x6, x1, 3, 5 + ldr w1, [x29, 120] + ldr w0, [x29, 120] + ubfx x1, x1, 28, 1 + ubfx x5, x0, 16, 5 + ldr w0, [x29, 120] + orr w1, w6, w1, lsl 5 + ubfx x0, x0, 30, 1 + orr w0, w5, w0, lsl 5 + cmp w1, w0 + ldr w0, [x29, 120] + bls .L642 + ubfx x1, x0, 3, 5 + ldr w0, [x29, 120] + ubfx x0, x0, 28, 1 + b .L665 +.L642: + ubfx x1, x0, 16, 5 + ldr w0, [x29, 120] + ubfx x0, x0, 30, 1 + b .L665 +.L660: + mov w0, 0 + b .L641 +.L659: + mov w22, -1 + b .L638 +.L656: + mov w22, 0 + b .L633 +.L631: + cmp w20, 1 + bne .L645 + cmp x4, 0 + mov w23, 2 + csel w23, w23, wzr, ne + mov w27, 0 + lsl w23, w23, 1 + mov w22, 0 +.L646: + cmp w22, w24 + bcc .L648 + mov w22, 0 + b .L644 +.L648: + and w28, w22, 3 + cbz x26, .L661 + lsl w3, w22, 9 + add x3, x26, x3 +.L647: + add x4, x21, w27, uxtw + mov w2, w28 + mov w1, 1 + mov x0, x19 + bl NandcCopy1KB + add w22, w22, 2 + mov w3, w28 + mov x5, 0 + mov x4, 0 + mov w2, 2 + mov w1, 1 + mov w0, w25 + bl NandcXferStart + add w27, w27, w23 + mov w1, 1 + mov w0, w25 + bl NandcXferComp + b .L646 +.L661: + mov x3, 0 + b .L647 +.L645: + mov w0, w25 + mov x5, 0 + mov x4, 0 + mov w3, 0 + mov w2, 2 + mov w1, 0 + bl NandcXferStart + mov w27, 2 + cmp x21, 0 + mov w28, 0 + csel w27, w27, wzr, ne + mov w23, 0 + lsl w0, w27, 1 + mov w22, 0 + str w0, [x29, 108] +.L649: + cmp w24, w23 + bls .L644 + mov w0, w25 + mov w1, w20 + bl NandcXferComp + add w27, w23, 2 + ldr w0, [x19, 32] + cmp w24, w27 + str w0, [x29, 120] + bls .L650 + mov x5, 0 + mov x4, 0 + and w3, w27, 3 + mov w2, 2 + mov w1, 0 + mov w0, w25 + bl NandcXferStart +.L650: + ldr w0, [x29, 120] + tbnz x0, 2, .L662 + ldr w0, [x29, 120] + ubfx x1, x0, 3, 5 + ldr w0, [x29, 120] + ubfx x0, x0, 27, 1 + orr w0, w1, w0, lsl 5 + cmp w22, w0 + csel w22, w22, w0, cs +.L651: + and w2, w23, 3 + cbz x26, .L663 + lsl w3, w23, 9 + add x3, x26, x3 +.L652: + add x4, x21, w28, uxtw + mov x0, x19 + mov w1, 0 + bl NandcCopy1KB + ldr w0, [x29, 108] + mov w23, w27 + add w28, w28, w0 + b .L649 +.L662: + mov w22, -1 + b .L651 +.L663: + mov x3, 0 + b .L652 + .size NandcXferData, .-NandcXferData + .align 2 + .global FlashReadRawPage + .type FlashReadRawPage, %function +FlashReadRawPage: + stp x29, x30, [sp, -64]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + ands w19, w0, 255 + stp x21, x22, [sp, 32] + mov w21, w1 + str x23, [sp, 48] + adrp x1, .LANCHOR1+481 + mov x22, x2 + mov x23, x3 + ldrb w20, [x1, #:lo12:.LANCHOR1+481] + bne .L667 + adrp x0, .LANCHOR0 + add x0, x0, :lo12:.LANCHOR0 + ldrb w5, [x0, 89] + ldr w0, [x0, 92] + mul w0, w5, w0 + cmp w0, w21 + mov w0, 4 + csel w20, w20, w0, ls +.L667: + mov w0, w19 + bl NandcWaitFlashReady + mov w0, w19 + bl NandcFlashCs + mov w1, w21 + mov w0, w19 + bl FlashReadCmd + mov w0, w19 + bl NandcWaitFlashReady + mov w2, w20 + mov x4, x23 + mov x3, x22 + mov w1, 0 + mov w0, w19 + bl NandcXferData + mov w2, w0 + mov w0, w19 + bl NandcFlashDeCs + mov w0, w2 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldr x23, [sp, 48] + ldp x29, x30, [sp], 64 + ret + .size FlashReadRawPage, .-FlashReadRawPage + .align 2 + .global FlashDdrTunningRead + .type FlashDdrTunningRead, %function +FlashDdrTunningRead: + stp x29, x30, [sp, -112]! + add x29, sp, 0 + stp x21, x22, [sp, 32] + mov w22, 6 + stp x23, x24, [sp, 48] + and w23, w0, 255 + adrp x0, .LANCHOR2 + add x21, x0, :lo12:.LANCHOR2 + stp x25, x26, [sp, 64] + mov w26, w1 + stp x19, x20, [sp, 16] + mov x24, x2 + stp x27, x28, [sp, 80] + mov x19, x0 + mov x25, x3 + mov w0, 12 + ldr x1, [x21, 1152] + mov w27, w4 + ldr w1, [x1, 304] + str w1, [x29, 108] + ldr w1, [x21, 2112] + cmp w1, 8 + csel w22, w22, w0, cc + cbz w4, .L683 + mov w0, 1 + bl FlashSetInterfaceMode + mov w0, 1 + bl NandcSetMode + mov w0, w23 + bl FlashReset + mov x3, x25 + mov x2, x24 + mov w1, w26 + mov w0, w23 + bl FlashReadRawPage + mov w20, w0 + ldrb w0, [x21, 2093] + bl FlashSetInterfaceMode + ldrb w0, [x21, 2093] + bl NandcSetMode + cmn w20, #1 + bne .L672 +.L681: + mov w20, -1 +.L669: + mov w0, w20 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 112 + ret +.L672: + mov w2, w20 + mov w1, w26 + adrp x0, .LC7 + add x0, x0, :lo12:.LC7 + bl printk + cmp w20, 9 + bhi .L674 + sbfiz x0, x23, 4, 32 + adrp x1, .LANCHOR0 + add x1, x1, :lo12:.LANCHOR0 + ldr x0, [x1, x0] + ldr w1, [x0, 3840] + ldr w1, [x0] + orr w1, w1, 131072 + str w1, [x0] +.L674: + add x0, x19, :lo12:.LANCHOR2 + ldr w1, [x0, 2184] + add w1, w1, 1 + str w1, [x0, 2184] + cmp w1, 2047 + bls .L669 + mov x25, 0 + mov x24, 0 + str wzr, [x0, 2184] +.L671: + mov w5, 0 + mov w21, 0 + mov w6, 0 + mov w19, 0 + mov w28, -1 +.L679: + stp w5, w6, [x29, 100] + mov w0, w22 + bl NandcSetDdrPara + mov w1, w26 + mov x3, x25 + mov x2, x24 + mov w0, w23 + bl FlashReadRawPage + add w1, w20, 1 + cmp w0, w1 + ldp w5, w6, [x29, 100] + bhi .L675 + cmp w0, 2 + bhi .L685 + add w19, w19, 1 + cmp w19, 9 + bls .L685 + mov w1, w21 + mov w20, w0 + sub w21, w22, w19 + mov w28, 0 +.L677: + cmp w19, w6 + csel w21, w21, w1, hi +.L678: + cbz w21, .L680 + mov w1, w21 + adrp x0, .LC8 + add x0, x0, :lo12:.LC8 + bl printk + mov w0, w21 + bl NandcSetDdrPara +.L680: + cbz w28, .L669 + adrp x0, .LC9 + mov w2, w26 + mov w1, w23 + add x0, x0, :lo12:.LC9 + bl printk + cbz w27, .L681 + ldr w1, [x29, 108] + lsr w0, w1, 8 + bl NandcSetDdrPara + b .L669 +.L683: + mov w20, 1024 + b .L671 +.L675: + cmp w19, w6 + bls .L686 + sub w21, w5, w19 + cmp w19, 7 + bhi .L678 + mov w6, w19 +.L686: + mov w19, 0 + b .L676 +.L685: + mov w5, w22 + mov w20, w0 + mov w28, 0 + mov x25, 0 + mov x24, 0 +.L676: + add w22, w22, 2 + cmp w22, 69 + bls .L679 + mov w1, w21 + mov w21, w5 + b .L677 + .size FlashDdrTunningRead, .-FlashDdrTunningRead + .align 2 + .global FlashReadPage + .type FlashReadPage, %function +FlashReadPage: + stp x29, x30, [sp, -80]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + and w20, w0, 255 + stp x21, x22, [sp, 32] + mov w0, w20 + stp x23, x24, [sp, 48] + mov w22, w1 + stp x25, x26, [sp, 64] + mov x24, x2 + mov x25, x3 + adrp x21, .LANCHOR2 + bl FlashReadRawPage + mov w19, w0 + cmn w0, #1 + bne .L696 + adrp x23, .LANCHOR0 + add x23, x23, :lo12:.LANCHOR0 + ldrb w26, [x23, 96] + cbnz w26, .L697 +.L699: + add x23, x21, :lo12:.LANCHOR2 + ldrb w0, [x23, 2104] + cbz w0, .L696 + ldr x0, [x23, 1152] + mov w4, 1 + mov x3, x25 + mov x2, x24 + mov w1, w22 + ldr w26, [x0, 304] + mov w0, w20 + bl FlashDdrTunningRead + mov w19, w0 + cmn w0, #1 + beq .L700 + ldrb w0, [x23, 1221] + cmp w19, w0, lsr 1 + bls .L696 +.L700: + lsr w0, w26, 8 + bl NandcSetDdrPara + b .L696 +.L697: + strb wzr, [x23, 96] + mov x3, x25 + mov x2, x24 + mov w1, w22 + mov w0, w20 + bl FlashReadRawPage + strb w26, [x23, 96] + cmn w0, #1 + beq .L699 + mov w19, w0 +.L696: + add x21, x21, :lo12:.LANCHOR2 + ldr x4, [x21, 2192] + cbz x4, .L695 + cmn w19, #1 + bne .L695 + mov x3, x25 + mov x2, x24 + mov w1, w22 + mov w0, w20 + blr x4 + mov w19, w0 + mov w1, w0 + mov w3, w22 + mov w2, w20 + adrp x0, .LC10 + add x0, x0, :lo12:.LC10 + bl printk + cmn w19, #1 + bne .L695 + ldrb w0, [x21, 1220] + cbz w0, .L695 + mov w0, w20 + bl flash_enter_slc_mode + ldr x4, [x21, 2192] + mov x3, x25 + mov x2, x24 + mov w1, w22 + mov w0, w20 + blr x4 + mov w19, w0 + mov w0, w20 + bl flash_exit_slc_mode +.L695: + mov w0, w19 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x29, x30, [sp], 80 + ret + .size FlashReadPage, .-FlashReadPage + .align 2 + .global FlashDdrParaScan + .type FlashDdrParaScan, %function +FlashDdrParaScan: + stp x29, x30, [sp, -48]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x19, .LANCHOR2 + stp x21, x22, [sp, 32] + add x22, x19, :lo12:.LANCHOR2 + and w20, w0, 255 + mov w21, w1 + ldrb w0, [x22, 2093] + bl FlashSetInterfaceMode + ldrb w0, [x22, 2093] + bl NandcSetMode + mov w4, 0 + mov x3, 0 + mov x2, 0 + mov w1, w21 + mov w0, w20 + bl FlashDdrTunningRead + mov x3, 0 + mov w22, w0 + mov x2, 0 + mov w1, w21 + mov w0, w20 + bl FlashReadRawPage + cmn w0, #1 + beq .L716 + cmn w22, #1 + bne .L717 +.L716: + add x20, x19, :lo12:.LANCHOR2 + ldrb w0, [x20, 2093] + tbz x0, 0, .L717 + mov w0, 1 + bl FlashSetInterfaceMode + mov w0, 1 + bl NandcSetMode + strb wzr, [x20, 2104] +.L718: + mov w0, 0 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x29, x30, [sp], 48 + ret +.L717: + add x19, x19, :lo12:.LANCHOR2 + mov w0, 1 + strb w0, [x19, 2104] + b .L718 + .size FlashDdrParaScan, .-FlashDdrParaScan + .align 2 + .global FlashLoadPhyInfo + .type FlashLoadPhyInfo, %function +FlashLoadPhyInfo: + stp x29, x30, [sp, -128]! + mov w0, 60 + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x19, .LANCHOR0 + add x1, x19, :lo12:.LANCHOR0 + stp x21, x22, [sp, 32] + strb w0, [x29, 120] + mov w0, 40 + stp x23, x24, [sp, 48] + adrp x22, .LANCHOR2 + stp x27, x28, [sp, 80] + adrp x21, .LANCHOR1 + stp x25, x26, [sp, 64] + mov w27, 20036 + strb w0, [x29, 121] + mov w0, 24 + strb w0, [x29, 122] + mov w0, 16 + strb w0, [x29, 123] + add x21, x21, :lo12:.LANCHOR1 + ldr w0, [x1, 92] + mov w20, 0 + ldr x1, [x1, 64] + mov w24, 4 + str w0, [x29, 108] + add x0, x22, :lo12:.LANCHOR2 + mov w23, -1 + movk w27, 0x4e41, lsl 16 + add x21, x21, 472 + str x1, [x0, 2200] + str wzr, [x0, 2208] + mov w0, 0 + bl flash_enter_slc_mode +.L727: + add w28, w20, 1 + add x25, x19, :lo12:.LANCHOR0 + mov x26, 0 +.L729: + add x0, x29, 120 + ldrb w0, [x0, x26] + bl FlashBchSel + ldr x2, [x25, 64] + mov x3, 0 + mov w1, w20 + mov w0, 0 + bl FlashReadRawPage + cmn w0, #1 + bne .L728 + ldr x2, [x25, 64] + mov x3, 0 + mov w1, w28 + mov w0, 0 + bl FlashReadRawPage + cmn w0, #1 + bne .L728 + add x26, x26, 1 + cmp x26, 4 + bne .L729 +.L730: + ldr w0, [x29, 108] + subs w24, w24, #1 + add w20, w20, w0 + bne .L727 + b .L735 +.L731: + mov w1, 2036 + add x0, x6, 12 + bl js_hash + ldr w1, [x6, 8] + cmp w1, w0 + bne .L737 + add x1, x6, 160 + mov w2, 32 + mov x0, x21 + bl ftl_memcpy + ldr x1, [x25, 2200] + add x23, x19, :lo12:.LANCHOR0 + mov w2, 32 + add x0, x23, 112 + add x1, x1, 192 + bl ftl_memcpy + ldr x1, [x25, 2200] + mov w2, 852 + add x0, x25, 1232 + add x1, x1, 224 + bl ftl_memcpy + ldrh w0, [x21, 10] + bl FlashBlockAlignInit + str w20, [x25, 2208] + ldr x1, [x25, 2200] + ldr w0, [x1, 1076] + strb w0, [x25, 2104] + ldr w0, [x23, 92] + udiv w0, w20, w0 + add w0, w0, 1 + cmp w0, 1 + bls .L733 +.L740: + str w0, [x23, 72] + add x0, x22, :lo12:.LANCHOR2 + ldrh w1, [x1, 14] + mov w23, 0 + strb w1, [x0, 2212] + b .L730 +.L733: + mov w0, 2 + b .L740 +.L737: + mov w23, -1 + b .L730 +.L728: + add x25, x22, :lo12:.LANCHOR2 + ldr x6, [x25, 2200] + ldr w0, [x6] + cmp w0, w27 + bne .L730 + cbnz w23, .L731 + add x19, x19, :lo12:.LANCHOR0 + ldr w0, [x19, 92] + udiv w20, w20, w0 + add w20, w20, 1 + str w20, [x19, 72] +.L735: + mov w0, 0 + bl flash_exit_slc_mode + mov w0, w23 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 128 + ret + .size FlashLoadPhyInfo, .-FlashLoadPhyInfo + .align 2 + .global ToshibaReadRetrial + .type ToshibaReadRetrial, %function +ToshibaReadRetrial: + stp x29, x30, [sp, -128]! + add x29, sp, 0 + stp x21, x22, [sp, 32] + and w21, w0, 255 + stp x25, x26, [sp, 64] + mov w0, w21 + stp x19, x20, [sp, 16] + mov x25, x2 + stp x27, x28, [sp, 80] + mov x26, x3 + str w1, [x29, 120] + stp x23, x24, [sp, 48] + bl NandcWaitFlashReady + sbfiz x1, x21, 4, 32 + adrp x0, .LANCHOR0 + add x0, x0, :lo12:.LANCHOR0 + add x2, x0, x1 + ldr x22, [x0, x1] + adrp x1, g_retryMode + ldrb w27, [x2, 8] + ldrb w0, [x1, #:lo12:g_retryMode] + str x1, [x29, 112] + add x19, x27, 8 + sub w0, w0, #67 + str w27, [x29, 124] + and w0, w0, 255 + add x19, x22, x19, lsl 8 + cmp w0, 1 + bls .L758 + adrp x0, .LANCHOR2+2104 + ldrb w0, [x0, #:lo12:.LANCHOR2+2104] + cbz w0, .L759 + mov w23, 1 + mov w0, 0 + bl NandcSetDdrMode +.L743: + add x0, x22, x27, lsl 8 + mov w1, 92 + str w1, [x0, 2056] + mov w1, 197 + str w1, [x0, 2056] +.L742: + ldrsw x0, [x29, 124] + mov w20, 1 + mov w24, -1 + add x0, x0, 8 + add x0, x22, x0, lsl 8 + str x0, [x29, 104] +.L744: + adrp x0, g_maxRetryCount + ldrb w0, [x0, #:lo12:g_maxRetryCount] + add w0, w0, 1 + cmp w20, w0 + bcc .L753 + mov w28, w24 +.L752: + ldr x0, [x29, 112] + mov w1, 0 + ldrb w0, [x0, #:lo12:g_retryMode] + sub w0, w0, #67 + and w0, w0, 255 + cmp w0, 1 + mov x0, x19 + bhi .L754 + bl SandiskSetRRPara +.L755: + ldrsw x0, [x29, 124] + add x0, x0, 8 + add x22, x22, x0, lsl 8 + mov w0, 255 + str w0, [x22, 8] + adrp x0, .LANCHOR2+1221 + ldrb w0, [x0, #:lo12:.LANCHOR2+1221] + add w0, w0, w0, lsl 1 + cmp w28, w0, lsr 2 + bcc .L756 + cmn w28, #1 + mov w0, 256 + csel w28, w28, w0, eq +.L756: + mov w0, w21 + bl NandcWaitFlashReady + cbz w23, .L741 + mov w0, 4 + bl NandcSetDdrMode +.L741: + mov w0, w28 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 128 + ret +.L759: + mov w23, 0 + b .L743 +.L758: + mov w23, 0 + b .L742 +.L753: + ldr x0, [x29, 112] + mov w1, w20 + ldrb w0, [x0, #:lo12:g_retryMode] + sub w0, w0, #67 + and w0, w0, 255 + cmp w0, 1 + mov x0, x19 + bhi .L745 + bl SandiskSetRRPara +.L746: + ldr x0, [x29, 112] + ldrb w0, [x0, #:lo12:g_retryMode] + cmp w0, 34 + bne .L747 + adrp x0, g_maxRetryCount + ldrb w0, [x0, #:lo12:g_maxRetryCount] + sub w0, w0, #3 + cmp w20, w0 + bne .L747 + ldr x1, [x29, 104] + mov w0, 179 + str w0, [x1, 8] +.L747: + add x0, x22, x27, lsl 8 + mov w1, 38 + str w1, [x0, 2056] + mov w1, 93 + str w1, [x0, 2056] + cbz w23, .L748 + mov w0, 4 + bl NandcSetDdrMode + ldr w1, [x29, 120] + mov x3, x26 + mov x2, x25 + mov w0, w21 + bl FlashReadRawPage + mov w28, w0 + mov w0, 0 + bl NandcSetDdrMode +.L749: + cmn w28, #1 + beq .L750 + adrp x0, .LANCHOR2+1221 + cmn w24, #1 + csel w24, w24, w28, ne + ldrb w0, [x0, #:lo12:.LANCHOR2+1221] + add w0, w0, w0, lsl 1 + cmp w28, w0, lsr 2 + bcc .L752 + mov x26, 0 + mov x25, 0 +.L750: + add w20, w20, 1 + b .L744 +.L745: + bl ToshibaSetRRPara + b .L746 +.L748: + ldr w1, [x29, 120] + mov x3, x26 + mov x2, x25 + mov w0, w21 + bl FlashReadRawPage + mov w28, w0 + b .L749 +.L754: + bl ToshibaSetRRPara + b .L755 + .size ToshibaReadRetrial, .-ToshibaReadRetrial + .align 2 + .global SamsungReadRetrial + .type SamsungReadRetrial, %function +SamsungReadRetrial: + stp x29, x30, [sp, -96]! + add x29, sp, 0 + stp x21, x22, [sp, 32] + and w22, w0, 255 + stp x19, x20, [sp, 16] + mov w0, w22 + stp x23, x24, [sp, 48] + mov w23, w1 + stp x25, x26, [sp, 64] + mov x24, x2 + str x27, [sp, 80] + mov x25, x3 + bl NandcWaitFlashReady + adrp x26, g_maxRetryCount + sbfiz x1, x22, 4, 32 + adrp x0, .LANCHOR0 + add x0, x0, :lo12:.LANCHOR0 + adrp x27, .LANCHOR2 + add x2, x0, x1 + add x26, x26, :lo12:g_maxRetryCount + add x27, x27, :lo12:.LANCHOR2 + mov w21, 1 + ldr x0, [x0, x1] + mov w19, -1 + ldrb w20, [x2, 8] + add x20, x20, 8 + add x20, x0, x20, lsl 8 +.L770: + ldrb w0, [x26] + add w0, w0, 1 + cmp w21, w0 + bcc .L774 +.L773: + mov x0, x20 + mov w1, 0 + bl SamsungSetRRPara + adrp x0, .LANCHOR2+1221 + ldrb w0, [x0, #:lo12:.LANCHOR2+1221] + add w0, w0, w0, lsl 1 + cmp w19, w0, lsr 2 + bcc .L769 + cmn w19, #1 + mov w0, 256 + csel w19, w19, w0, eq +.L769: + mov w0, w19 + ldr x27, [sp, 80] + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x29, x30, [sp], 96 + ret +.L774: + mov w1, w21 + mov x0, x20 + bl SamsungSetRRPara + mov x3, x25 + mov x2, x24 + mov w1, w23 + mov w0, w22 + bl FlashReadRawPage + cmn w0, #1 + beq .L771 + ldrb w1, [x27, 1221] + cmn w19, #1 + csel w19, w19, w0, ne + add w1, w1, w1, lsl 1 + cmp w0, w1, lsr 2 + bcc .L776 + mov x25, 0 + mov x24, 0 +.L771: + add w21, w21, 1 + b .L770 +.L776: + mov w19, w0 + b .L773 + .size SamsungReadRetrial, .-SamsungReadRetrial + .align 2 + .global MicronReadRetrial + .type MicronReadRetrial, %function +MicronReadRetrial: + stp x29, x30, [sp, -144]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + and w20, w0, 255 + adrp x0, .LANCHOR2 + stp x23, x24, [sp, 48] + str w1, [x29, 140] + add x1, x0, :lo12:.LANCHOR2 + stp x25, x26, [sp, 64] + mov x24, x2 + stp x21, x22, [sp, 32] + mov x25, x3 + stp x27, x28, [sp, 80] + str x0, [x29, 128] + ldrb w19, [x1, 1221] + ldrb w1, [x1, 1220] + cbnz w1, .L784 + add w19, w19, w19, lsl 1 + asr w19, w19, 2 +.L785: + adrp x21, .LANCHOR0 + add x21, x21, :lo12:.LANCHOR0 + add x21, x21, w20, sxtw 4 + mov w23, 0 + mov w28, 137 +.L795: + mov w0, w20 + bl NandcWaitFlashReady + ldrb w4, [x21, 8] + adrp x7, g_maxRetryCount + ldr x8, [x21] + add x7, x7, :lo12:g_maxRetryCount + mov w22, 0 + mov w26, -1 + add x27, x8, x4, lsl 8 +.L786: + ldrb w0, [x7] + cmp w22, w0 + bcc .L790 +.L789: + add x4, x8, x4, lsl 8 + mov w0, 239 + str x4, [x29, 120] + str w0, [x4, 2056] + mov x0, 1000 + str w28, [x4, 2052] + bl __const_udelay + ldr x4, [x29, 120] + cmp w26, w19 + str wzr, [x4, 2048] + str wzr, [x4, 2048] + str wzr, [x4, 2048] + str wzr, [x4, 2048] + bcc .L791 + cmn w26, #1 + mov w0, 256 + csel w26, w26, w0, eq +.L791: + cmp w26, 256 + ccmn w26, #1, 4, ne + bne .L792 + ldr w2, [x29, 140] + adrp x0, .LC11 + mov w4, w26 + mov w3, w22 + mov w1, w22 + add x0, x0, :lo12:.LC11 + bl printk + cbnz w23, .L793 + ldr x0, [x29, 128] + add x0, x0, :lo12:.LANCHOR2 + ldrb w0, [x0, 1220] + cbz w0, .L783 + cmn w26, #1 + bne .L783 + mov w1, 3 + mov w0, w20 + mov w23, 1 + bl micron_auto_read_calibration_config + b .L795 +.L784: + mov w0, 3 + sdiv w19, w19, w0 + b .L785 +.L790: + mov w0, 239 + str w0, [x27, 2056] + str w28, [x27, 2052] + mov x0, 1000 + stp x4, x7, [x29, 96] + str x8, [x29, 112] + bl __const_udelay + add w9, w22, 1 + str w9, [x27, 2048] + str wzr, [x27, 2048] + mov x3, x25 + ldr w1, [x29, 140] + mov x2, x24 + str wzr, [x27, 2048] + mov w0, w20 + str wzr, [x27, 2048] + str w9, [x29, 120] + bl FlashReadRawPage + cmn w0, #1 + ldr w9, [x29, 120] + ldp x4, x7, [x29, 96] + ldr x8, [x29, 112] + beq .L787 + cmn w26, #1 + csel w26, w26, w0, ne + cmp w0, w19 + bcc .L797 + mov x25, 0 + mov x24, 0 +.L787: + mov w22, w9 + b .L786 +.L797: + mov w26, w0 + mov x25, 0 + mov x24, 0 + b .L789 +.L793: + mov w0, w20 + mov w1, 0 + bl micron_auto_read_calibration_config + cmn w26, #1 + mov w0, 256 + csel w26, w26, w0, eq +.L783: + mov w0, w26 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 144 + ret +.L792: + cbz w23, .L783 + mov w1, 0 + mov w0, w20 + mov w26, 256 + bl micron_auto_read_calibration_config + b .L783 + .size MicronReadRetrial, .-MicronReadRetrial + .align 2 + .global HynixReadRetrial + .type HynixReadRetrial, %function +HynixReadRetrial: + stp x29, x30, [sp, -128]! + add x29, sp, 0 + stp x21, x22, [sp, 32] + adrp x21, .LANCHOR2 + stp x27, x28, [sp, 80] + and x28, x0, 255 + add x0, x21, :lo12:.LANCHOR2 + stp x25, x26, [sp, 64] + add x0, x0, 1232 + stp x23, x24, [sp, 48] + stp x19, x20, [sp, 16] + mov w27, w1 + adrp x22, .LANCHOR0 + add x1, x0, x28 + ldrb w24, [x0, 2] + add x0, x22, :lo12:.LANCHOR0 + mov x23, x28 + mov x25, x2 + mov x26, x3 + ldrb w19, [x1, 12] + ldr x0, [x0, 104] + ldrb w0, [x0, 19] + sub w0, w0, #7 + and w0, w0, 255 + cmp w0, 1 + bhi .L809 + ldrb w19, [x1, 20] +.L809: + mov w0, w23 + bl NandcWaitFlashReady + add x5, x21, :lo12:.LANCHOR2 + mov w4, 0 + add x6, x5, 1236 + mov w20, -1 +.L810: + cmp w4, w24 + bcc .L815 +.L814: + add x22, x22, :lo12:.LANCHOR0 + ldr x0, [x22, 104] + ldrb w0, [x0, 19] + sub w0, w0, #7 + and w0, w0, 255 + cmp w0, 1 + add x0, x21, :lo12:.LANCHOR2 + add x0, x0, x28 + bhi .L816 + strb w19, [x0, 1252] +.L817: + add x21, x21, :lo12:.LANCHOR2 + ldrb w0, [x21, 1221] + add w0, w0, w0, lsl 1 + cmp w20, w0, lsr 2 + bcc .L808 + cmn w20, #1 + mov w0, 256 + csel w20, w20, w0, eq +.L808: + mov w0, w20 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 128 + ret +.L815: + add w19, w19, 1 + ldrb w1, [x5, 1233] + and w19, w19, 255 + mov x2, x6 + cmp w24, w19 + str w4, [x29, 108] + csel w19, w19, wzr, hi + stp x6, x5, [x29, 112] + mov w3, w19 + mov w0, w23 + bl HynixSetRRPara + mov x3, x26 + mov x2, x25 + mov w1, w27 + mov w0, w23 + bl FlashReadRawPage + cmn w0, #1 + ldr w4, [x29, 108] + ldp x6, x5, [x29, 112] + beq .L812 + ldrb w1, [x5, 1221] + cmn w20, #1 + csel w20, w20, w0, ne + add w1, w1, w1, lsl 1 + cmp w0, w1, lsr 2 + bcc .L819 + mov x26, 0 + mov x25, 0 +.L812: + add w4, w4, 1 + b .L810 +.L819: + mov w20, w0 + b .L814 +.L816: + strb w19, [x0, 1244] + b .L817 + .size HynixReadRetrial, .-HynixReadRetrial + .align 2 + .type samsung_read_retrial, %function +samsung_read_retrial: + stp x29, x30, [sp, -112]! + add x29, sp, 0 + stp x23, x24, [sp, 48] + and w23, w0, 255 + stp x21, x22, [sp, 32] + mov x24, x2 + stp x25, x26, [sp, 64] + mov w0, w23 + stp x19, x20, [sp, 16] + mov w26, w1 + mov x25, x3 + stp x27, x28, [sp, 80] + bl NandcWaitFlashReady + adrp x22, .LANCHOR2 + sbfiz x1, x23, 4, 32 + adrp x0, .LANCHOR0 + add x0, x0, :lo12:.LANCHOR0 + adrp x21, .LANCHOR3 + add x3, x0, x1 + ldr x1, [x0, x1] + add x0, x22, :lo12:.LANCHOR2 + ldrb w19, [x3, 8] + ldrb w2, [x0, 2092] + cbnz w2, .L827 + add x19, x1, x19, lsl 8 + add x21, x21, :lo12:.LANCHOR3 + mov x27, x0 + mov x4, 0 + mov w20, -1 + mov w6, 239 + mov w5, 141 +.L831: + str w6, [x19, 2056] + add x0, x21, x4 + str w5, [x19, 2052] + add w28, w4, 1 + stp w6, w5, [x29, 96] + mov x3, x25 + ldrsb w0, [x0, 1] + mov x2, x24 + str w0, [x19, 2048] + mov w1, w26 + str wzr, [x19, 2048] + mov w0, w23 + str wzr, [x19, 2048] + str wzr, [x19, 2048] + str x4, [x29, 104] + bl FlashReadRawPage + cmn w0, #1 + ldp w6, w5, [x29, 96] + ldr x4, [x29, 104] + beq .L828 + ldrb w1, [x27, 1221] + cmn w20, #1 + csel w20, w20, w0, ne + add w1, w1, w1, lsl 1 + cmp w0, w1, lsr 2 + bcc .L839 + mov x25, 0 + mov x24, 0 +.L828: + add x4, x4, 1 + cmp x4, 25 + bne .L831 + mov w28, 26 +.L830: + mov w0, 239 + str w0, [x19, 2056] + mov w0, 141 +.L855: + str w0, [x19, 2052] + add x22, x22, :lo12:.LANCHOR2 + str wzr, [x19, 2048] + str wzr, [x19, 2048] + str wzr, [x19, 2048] + str wzr, [x19, 2048] + ldrb w0, [x22, 1221] + add w0, w0, w0, lsl 1 + cmp w20, w0, lsr 2 + bcc .L837 + cmn w20, #1 + mov w0, 256 + csel w20, w20, w0, eq +.L837: + cmp w20, 256 + ccmn w20, #1, 4, ne + bne .L838 + adrp x0, .LC12 + mov w4, w20 + mov w3, w28 + mov w2, w26 + mov w1, w28 + add x0, x0, :lo12:.LC12 + bl printk +.L838: + mov w0, w23 + bl NandcWaitFlashReady + mov w0, w20 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 112 + ret +.L839: + mov w20, w0 + b .L830 +.L827: + add x21, x21, :lo12:.LANCHOR3 + add x19, x1, x19, lsl 8 + add x21, x21, 36 + mov x27, x0 + mov w20, -1 + mov w28, 1 + mov w5, 239 + mov w4, 137 +.L836: + str w5, [x19, 2056] + mov x3, x25 + str w4, [x19, 2052] + mov x2, x24 + stp w5, w4, [x29, 100] + mov w1, w26 + ldrb w0, [x21] + str w0, [x19, 2048] + ldrb w0, [x21, 1] + str w0, [x19, 2048] + ldrb w0, [x21, 2] + str w0, [x19, 2048] + ldrb w0, [x21, 3] + str w0, [x19, 2048] + mov w0, w23 + bl FlashReadRawPage + cmn w0, #1 + ldp w5, w4, [x29, 100] + beq .L833 + ldrb w1, [x27, 1221] + cmn w20, #1 + csel w20, w20, w0, ne + add w1, w1, w1, lsl 1 + cmp w0, w1, lsr 2 + bcc .L840 + mov x25, 0 + mov x24, 0 +.L833: + add w28, w28, 1 + add x21, x21, 4 + cmp w28, 26 + bne .L836 +.L835: + mov w0, 239 + str w0, [x19, 2056] + mov w0, 137 + b .L855 +.L840: + mov w20, w0 + b .L835 + .size samsung_read_retrial, .-samsung_read_retrial + .align 2 + .global FlashProgPage + .type FlashProgPage, %function +FlashProgPage: + stp x29, x30, [sp, -64]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + mov w20, w1 + stp x21, x22, [sp, 32] + adrp x1, .LANCHOR1+481 + str x23, [sp, 48] + mov x22, x2 + ldrb w21, [x1, #:lo12:.LANCHOR1+481] + ands w19, w0, 255 + mov x23, x3 + bne .L857 + adrp x0, .LANCHOR0 + add x0, x0, :lo12:.LANCHOR0 + ldrb w1, [x0, 89] + ldr w2, [x0, 92] + mul w1, w1, w2 + cmp w1, w20 + bls .L857 + ldrb w0, [x0, 88] + cmp w0, 0 + mov w0, 4 + csel w21, w21, w0, eq +.L857: + mov w0, w19 + bl NandcWaitFlashReady + mov w0, w19 + bl NandcFlashCs + mov w1, w20 + mov w0, w19 + bl FlashProgFirstCmd + mov x4, x23 + mov x3, x22 + mov w2, w21 + mov w1, 1 + mov w0, w19 + bl NandcXferData + mov w1, w20 + mov w0, w19 + bl FlashProgSecondCmd + mov w0, w19 + bl NandcWaitFlashReady + mov w1, w20 + mov w0, w19 + bl FlashReadStatus + mov w2, w0 + mov w0, w19 + bl NandcFlashDeCs + and w0, w2, 1 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldr x23, [sp, 48] + ldp x29, x30, [sp], 64 + ret + .size FlashProgPage, .-FlashProgPage + .align 2 + .global FlashSavePhyInfo + .type FlashSavePhyInfo, %function +FlashSavePhyInfo: + stp x29, x30, [sp, -64]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x19, .LANCHOR0 + add x19, x19, :lo12:.LANCHOR0 + adrp x20, .LANCHOR2 + add x20, x20, :lo12:.LANCHOR2 + stp x21, x22, [sp, 32] + stp x23, x24, [sp, 48] + mov w23, 20036 + ldr x0, [x19, 64] + movk w23, 0x4e41, lsl 16 + str x0, [x20, 2200] + mov w22, 0 + ldrb w0, [x20, 2213] + mov w21, 0 + bl FlashBchSel + ldr x0, [x19, 64] + mov w2, 2048 + mov w1, 0 + bl ftl_memset + ldr x0, [x20, 2200] + mov w2, 32 + str w23, [x0] + ldr x0, [x20, 2200] + ldrb w1, [x19, 3216] + add x0, x0, 16 + strh w1, [x0, -4] + ldrb w1, [x19, 89] + strh w1, [x0, -2] + ldrb w1, [x20, 2104] + str w1, [x0, 1060] + adrp x1, IDByte + add x1, x1, :lo12:IDByte + bl ftl_memcpy + ldr x0, [x20, 2200] + mov w2, 8 + add x1, x19, 3220 + add x0, x0, 80 + bl ftl_memcpy + ldr x0, [x20, 2200] + mov w2, 32 + add x1, x19, 3228 + add x0, x0, 96 + bl ftl_memcpy + ldr x0, [x20, 2200] + adrp x1, .LANCHOR1 + add x1, x1, :lo12:.LANCHOR1 + mov w2, 32 + add x1, x1, 472 + add x0, x0, 160 + bl ftl_memcpy + ldr x0, [x20, 2200] + mov w2, 32 + add x1, x19, 112 + add x0, x0, 192 + bl ftl_memcpy + ldr x0, [x20, 2200] + mov w2, 852 + add x1, x20, 1232 + add x0, x0, 224 + bl ftl_memcpy + ldr x6, [x20, 2200] + mov w1, 2036 + add x0, x6, 12 + bl js_hash + str w0, [x6, 8] + mov w0, 1592 + str w0, [x6, 4] + ldr x0, [x20, 2216] + str x0, [x20, 2200] + mov w0, 0 + bl flash_enter_slc_mode +.L866: + ldr w1, [x19, 92] + mov w2, 0 + mov w0, 0 + mul w1, w21, w1 + bl FlashEraseBlock + ldrb w0, [x20, 1220] + cbz w0, .L861 + mov w24, 0 +.L862: + ldr w1, [x19, 92] + mov x3, 0 + ldr x2, [x19, 64] + mov w0, 0 + madd w1, w21, w1, w24 + add w24, w24, 1 + bl FlashProgPage + cmp w24, 10 + bne .L862 +.L863: + ldr w1, [x19, 92] + mov x3, 0 + ldr x2, [x20, 2216] + mov w0, 0 + mul w1, w21, w1 + bl FlashReadRawPage + cmn w0, #1 + add w7, w21, 1 + beq .L864 + ldr x6, [x20, 2200] + ldr w0, [x6] + cmp w0, w23 + bne .L864 + mov w1, 2036 + add x0, x6, 12 + bl js_hash + ldr w1, [x6, 8] + cmp w1, w0 + bne .L864 + ldr w0, [x19, 92] + cmp w22, 1 + str w7, [x19, 72] + mul w21, w0, w21 + str w21, [x20, 2208] + beq .L867 + mov w22, 1 +.L864: + mov w21, w7 + cmp w7, 4 + bne .L866 +.L865: + mov w0, 0 + bl flash_exit_slc_mode + cmp w22, 0 + csetm w0, eq + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x29, x30, [sp], 64 + ret +.L861: + ldr w1, [x19, 92] + mov x3, 0 + ldr x2, [x19, 64] + mov w0, 0 + mul w1, w21, w1 + bl FlashProgPage + ldr w1, [x19, 92] + mov x3, 0 + ldr x2, [x19, 64] + mov w0, 0 + mul w1, w21, w1 + add w1, w1, 1 + bl FlashProgPage + b .L863 +.L867: + mov w22, 2 + b .L865 + .size FlashSavePhyInfo, .-FlashSavePhyInfo + .align 2 + .global FlashReadIdbDataRaw + .type FlashReadIdbDataRaw, %function +FlashReadIdbDataRaw: + stp x29, x30, [sp, -128]! + add x29, sp, 0 + stp x25, x26, [sp, 64] + mov x25, x0 + mov w0, 60 + stp x21, x22, [sp, 32] + strb w0, [x29, 120] + mov w0, 40 + strb w0, [x29, 121] + mov w0, 24 + strb w0, [x29, 122] + mov w0, 16 + adrp x21, .LANCHOR2 + strb w0, [x29, 123] + add x0, x21, :lo12:.LANCHOR2 + stp x19, x20, [sp, 16] + stp x23, x24, [sp, 48] + stp x27, x28, [sp, 80] + ldrb w26, [x0, 1221] + ldr w0, [x0, 2100] + cbz w0, .L875 + mov w0, 0 + bl flash_enter_slc_mode +.L875: + adrp x22, .LANCHOR0 + add x22, x22, :lo12:.LANCHOR0 + mov w28, 35899 + add x27, x29, 120 + mov x19, x22 + mov w24, -1 + mov w20, 2 + movk w28, 0xfcdc, lsl 16 + mov w2, 2048 + mov w1, 0 + mov x0, x25 + bl ftl_memset +.L876: + ldrb w0, [x22, 89] + cmp w20, w0 + bcc .L881 +.L880: + add x21, x21, :lo12:.LANCHOR2 + mov w0, w26 + bl FlashBchSel + ldr w0, [x21, 2100] + cbz w0, .L874 + mov w0, 0 + bl flash_exit_slc_mode +.L874: + mov w0, w24 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 128 + ret +.L881: + mov x23, 0 +.L878: + ldrb w4, [x23, x27] + str w4, [x29, 108] + mov w0, w4 + bl FlashBchSel + ldr w1, [x19, 92] + mov x3, 0 + ldr x2, [x19, 64] + mov w0, 0 + mul w1, w20, w1 + bl FlashReadRawPage + cmn w0, #1 + ldr w4, [x29, 108] + bne .L877 + add x23, x23, 1 + cmp x23, 4 + bne .L878 +.L879: + add w20, w20, 1 + b .L876 +.L884: + mov w24, 0 + b .L880 +.L877: + ldr x0, [x19, 64] + ldr w0, [x0] + cmp w0, w28 + bne .L879 + mov w1, w4 + adrp x0, .LC13 + add x0, x0, :lo12:.LC13 + bl printk + ldr x1, [x19, 64] + mov w2, 2048 + mov x0, x25 + bl ftl_memcpy + ldr x0, [x19, 64] + ldr w0, [x0, 512] + strb w0, [x19, 89] + ldr w0, [x19, 72] + cmp w20, w0 + bcs .L884 + mov w24, 0 + str w20, [x19, 72] + bl FlashSavePhyInfo + b .L879 + .size FlashReadIdbDataRaw, .-FlashReadIdbDataRaw + .align 2 + .global FlashInit + .type FlashInit, %function +FlashInit: + stp x29, x30, [sp, -112]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x20, .LANCHOR0 + stp x23, x24, [sp, 48] + add x23, x20, :lo12:.LANCHOR0 + stp x21, x22, [sp, 32] + adrp x19, .LANCHOR2 + add x21, x19, :lo12:.LANCHOR2 + mov x22, x0 + stp x25, x26, [sp, 64] + mov w0, 32768 + stp x27, x28, [sp, 80] + bl ftl_dma32_malloc + str x0, [x23, 64] + mov w0, 32768 + bl ftl_dma32_malloc + str x0, [x21, 2216] + mov w0, 4096 + bl ftl_dma32_malloc + str x0, [x21, 2224] + mov w0, 32768 + bl ftl_dma32_malloc + str x0, [x21, 2232] + mov w0, 4096 + bl ftl_dma32_malloc + str x0, [x21, 2240] + mov w0, 50 + strb w0, [x21, 2212] + adrp x25, .LC14 + strb w0, [x23, 89] + mov w0, 128 + str w0, [x23, 92] + mov w0, 60 + strb wzr, [x21, 2104] + add x25, x25, :lo12:.LC14 + strb w0, [x21, 2213] + mov x0, x22 + strb wzr, [x21, 2248] + adrp x22, IDByte + str wzr, [x21, 2184] + add x21, x22, :lo12:IDByte + mov w24, 0 + mov w28, 239 + strb wzr, [x23, 88] + str wzr, [x23, 72] + bl NandcInit +.L899: + ldrb w2, [x23, 8] + and w26, w24, 255 + str w2, [x29, 108] + mov w0, w26 + ldr x27, [x23] + bl FlashReset + mov w0, w26 + bl NandcFlashCs + ldr w2, [x29, 108] + mov w0, 144 + ubfiz x2, x2, 8, 8 + add x27, x27, x2 + str w0, [x27, 2056] + mov x0, 1000 + str wzr, [x27, 2052] + bl __const_udelay + ldr w0, [x27, 2048] + and w0, w0, 255 + strb w0, [x21] + cmp w0, 44 + ldr w2, [x27, 2048] + strb w2, [x21, 1] + ldr w2, [x27, 2048] + strb w2, [x21, 2] + ldr w2, [x27, 2048] + strb w2, [x21, 3] + ldr w2, [x27, 2048] + strb w2, [x21, 4] + ldr w2, [x27, 2048] + strb w2, [x21, 5] + bne .L894 + str w28, [x27, 2056] + mov w0, 1 + str w0, [x27, 2052] + mov x0, 1000 + bl __const_udelay + mov w0, 4 + str w0, [x27, 2048] + str wzr, [x27, 2048] + str wzr, [x27, 2048] + str wzr, [x27, 2048] +.L894: + mov w0, w26 + bl NandcFlashDeCs + ldrb w2, [x21] + sub w0, w2, #1 + and w0, w0, 255 + cmp w0, 253 + bhi .L895 + ldrb w7, [x21, 5] + add w1, w24, 1 + ldrb w6, [x21, 4] + mov x0, x25 + ldrb w5, [x21, 3] + ldrb w4, [x21, 2] + ldrb w3, [x21, 1] + bl printk +.L895: + cbnz w24, .L896 + ldrb w0, [x22, #:lo12:IDByte] + add x1, x22, :lo12:IDByte + sub w0, w0, #1 + and w0, w0, 255 + cmp w0, 253 + bhi .L947 + ldrb w0, [x1, 1] + cmp w0, 255 + beq .L947 + bl FlashCs123Init +.L896: + ldrb w0, [x21] + cmp w0, 181 + bne .L898 + mov w0, 44 + strb w0, [x21] +.L898: + add w24, w24, 1 + add x23, x23, 16 + add x21, x21, 8 + cmp w24, 4 + bne .L899 + ldrb w0, [x22, #:lo12:IDByte] + cmp w0, 173 + beq .L900 + add x0, x19, :lo12:.LANCHOR2 + ldr w0, [x0, 2108] + bl NandcSetDdrMode +.L900: + add x21, x19, :lo12:.LANCHOR2 + mov w2, 852 + mov w1, 0 + add x0, x21, 1232 + bl ftl_memset + add x2, x20, :lo12:.LANCHOR0 + adrp x0, .LANCHOR1 + add x1, x0, :lo12:.LANCHOR1 + ldr w4, [x21, 2116] + add x1, x1, 472 + strb wzr, [x2, 96] + str x1, [x2, 104] + mov w2, 12336 + movk w2, 0x5638, lsl 16 + cmp w4, w2 + bne .L901 + ldrb w1, [x1, 19] + cmp w1, 50 + beq .L901 + mov w1, 1 + str w1, [x21, 2100] +.L901: + add x1, x22, :lo12:IDByte + ldrb w2, [x1, 1] + add w1, w2, 95 + and w3, w1, 255 + mov x1, 1 + cmp w3, 57 + bhi .L902 + movk x1, 0x205, lsl 48 + lsr x1, x1, x3 + mvn x1, x1 +.L902: + and w1, w1, 1 + cmp w2, 241 + eor w1, w1, 1 + cset w3, eq + orr w1, w3, w1 + cbnz w1, .L903 + cmp w2, 220 + bne .L904 + add x1, x22, :lo12:IDByte + ldrb w1, [x1, 3] + cmp w1, 149 + bne .L904 +.L903: + add x1, x20, :lo12:.LANCHOR0 + add x3, x19, :lo12:.LANCHOR2 + mov w6, 16 + mov w5, 1 + add x7, x22, :lo12:IDByte + strb w6, [x1, 89] + strb w5, [x1, 88] + add x1, x0, :lo12:.LANCHOR1 + strb w6, [x3, 2213] + ldrb w6, [x22, #:lo12:IDByte] + strb w6, [x1, 3417] + strb w2, [x1, 3418] + cmp w6, 152 + bne .L906 + ldrsb w1, [x7, 4] + tbnz w1, #31, .L907 + mov w1, 24 + strb w1, [x3, 2213] +.L906: + cmp w4, 2049 + mov w1, 12336 + movk w1, 0x5638, lsl 16 + ccmp w4, w1, 4, ne + bne .L909 + add x1, x19, :lo12:.LANCHOR2 + mov w3, 16 + strb w3, [x1, 2213] +.L909: + cmp w2, 218 + bne .L910 + add x1, x0, :lo12:.LANCHOR1 + mov w2, 2048 + strh w2, [x1, 3430] + mov w2, -38 +.L993: + strb w2, [x1, 3418] +.L911: + add x21, x0, :lo12:.LANCHOR1 + add x0, x20, :lo12:.LANCHOR0 + mov w2, 32 + add x1, x21, 3288 + add x0, x0, 112 + bl ftl_memcpy + mov w2, 32 + add x1, x21, 3416 + add x0, x21, 472 + bl ftl_memcpy +.L904: + add x21, x20, :lo12:.LANCHOR0 + ldrb w0, [x21, 88] + cbnz w0, .L914 + bl FlashLoadPhyInfoInRam + cbnz w0, .L916 + ldr x0, [x21, 104] + add x21, x19, :lo12:.LANCHOR2 + ldrb w1, [x0, 17] + and w0, w1, 7 + strb w0, [x21, 2093] + tbnz x1, 0, .L916 + mov w1, 1 + strb w1, [x21, 2104] + bl FlashSetInterfaceMode + ldrb w0, [x21, 2093] + bl NandcSetMode +.L916: + add x0, x20, :lo12:.LANCHOR0 + add x21, x19, :lo12:.LANCHOR2 + ldr x0, [x0, 104] + ldrb w0, [x0, 26] + strb w0, [x21, 1220] + bl FlashLoadPhyInfo + cbz w0, .L914 + ldr w0, [x21, 2108] + cbz w0, .L919 + mov w0, 1 + bl FlashSetInterfaceMode + mov w0, 1 +.L988: + bl NandcSetMode + bl FlashLoadPhyInfo + cbz w0, .L914 + add x21, x20, :lo12:.LANCHOR0 + mov w0, 1 + bl FlashSetInterfaceMode + mov w0, 1 + bl NandcSetMode + ldr x0, [x21, 104] + ldrh w1, [x0, 14] + adrp x0, .LC15 + add x0, x0, :lo12:.LC15 + bl printk + bl FlashLoadPhyInfoInRam + cmn w0, #1 + beq .L893 + bl FlashDieInfoInit + ldr x0, [x21, 104] + ldrb w0, [x0, 19] + bl FlashGetReadRetryDefault + ldr x0, [x21, 104] + ldrh w1, [x21, 3452] + add w1, w1, 4095 + ldrb w2, [x0, 9] + cmp w2, w1, lsr 12 + blt .L921 + ldrh w1, [x0, 14] + add w1, w1, 255 + cmp w2, w1, lsr 8 + bge .L922 +.L921: + ldrh w1, [x0, 14] + and w1, w1, -256 + strh w1, [x0, 14] +.L922: + add x21, x19, :lo12:.LANCHOR2 + ldrb w0, [x21, 2093] + tst w0, 6 + beq .L923 + bl FlashSavePhyInfo + mov w0, 0 + bl flash_enter_slc_mode + ldr w1, [x21, 2208] + mov w0, 0 + bl FlashDdrParaScan + mov w0, 0 + bl flash_exit_slc_mode +.L923: + bl FlashSavePhyInfo +.L914: + add x23, x20, :lo12:.LANCHOR0 + add x21, x19, :lo12:.LANCHOR2 + ldr x2, [x23, 104] + str xzr, [x21, 2192] + ldrb w0, [x2, 26] + strb w0, [x21, 1220] + ldrh w0, [x2, 16] + ubfx x1, x0, 7, 1 + strb w1, [x23, 96] + ubfx x1, x0, 3, 1 + strb w1, [x21, 2249] + ubfx x1, x0, 4, 1 + ubfx x0, x0, 8, 3 + strb w1, [x21, 2094] + strb w0, [x21, 2093] + ldrh w1, [x2, 10] + ldrb w0, [x2, 12] + sdiv w1, w1, w0 + ldrb w0, [x2, 18] + bl BuildFlashLsbPageTable + bl FlashDieInfoInit + ldr x0, [x23, 104] + ldrh w1, [x0, 16] + tbz x1, 6, .L925 + adrp x1, g_retryMode + ldrb w0, [x0, 19] + adrp x2, g_maxRegNum + ldrb w3, [x21, 1234] + strb w0, [x1, #:lo12:g_retryMode] + mov x4, x2 + ldrb w1, [x21, 1233] + strb w1, [x2, #:lo12:g_maxRegNum] + adrp x1, g_maxRetryCount + strb w3, [x1, #:lo12:g_maxRetryCount] + sub w3, w0, #1 + and w3, w3, 255 + cmp w3, 7 + bhi .L926 + adrp x1, HynixReadRetrial + add x1, x1, :lo12:HynixReadRetrial + str x1, [x21, 2192] + sub w1, w0, #5 + and w1, w1, 255 + cmp w1, 1 + ccmp w0, 8, 4, hi + bne .L927 + mov w1, 1 + str w1, [x21, 2176] +.L927: + add x1, x19, :lo12:.LANCHOR2 + cmp w0, 7 + beq .L989 + cmp w0, 8 + bne .L950 +.L989: + add x1, x1, 1260 +.L928: + mov x2, 0 + mov w3, 0 +.L930: + ldrsb w4, [x1, x2] + add x2, x2, 1 + cmp w4, 0 + cinc w3, w3, eq + cmp x2, 32 + bne .L930 + cmp w3, 27 + bls .L925 + bl FlashGetReadRetryDefault + bl FlashSavePhyInfo +.L925: + add x0, x19, :lo12:.LANCHOR2 + mov w2, 12336 + movk w2, 0x5638, lsl 16 + ldr w1, [x0, 2116] + cmp w1, w2 + bne .L940 + ldrb w0, [x0, 1220] + cbz w0, .L940 + add x0, x20, :lo12:.LANCHOR0 + ldr x0, [x0, 104] + strb wzr, [x0, 18] +.L940: + ldrb w0, [x22, #:lo12:IDByte] + cmp w0, 44 + bne .L941 + add x0, x19, :lo12:.LANCHOR2 + ldrb w2, [x0, 2104] + cbz w2, .L941 + mov w2, 12336 + movk w2, 0x5638, lsl 16 + cmp w1, w2 + bne .L942 + ldrb w0, [x0, 1220] + cbnz w0, .L941 +.L942: + add x0, x19, :lo12:.LANCHOR2 + strb wzr, [x0, 2104] + mov w0, 1 + bl FlashSetInterfaceMode + mov w0, 1 + bl NandcSetMode +.L941: + add x1, x19, :lo12:.LANCHOR2 + ldrb w0, [x1, 2093] + tst w0, 6 + beq .L943 + ldrb w1, [x1, 2104] + cbnz w1, .L944 + tbnz x0, 0, .L943 +.L944: + mov w0, 0 + bl flash_enter_slc_mode + add x0, x19, :lo12:.LANCHOR2 + ldr w1, [x0, 2208] + mov w0, 0 + bl FlashDdrParaScan + mov w0, 0 + bl flash_exit_slc_mode +.L943: + add x20, x20, :lo12:.LANCHOR0 + mov w21, 16 + add x19, x19, :lo12:.LANCHOR2 + ldr x0, [x20, 104] + ldrb w0, [x0, 20] + bl FlashBchSel + add x0, x20, 3456 + bl FlashReadIdbDataRaw + mov w0, 18928 + strb w21, [x20, 89] + movk w0, 0x2, lsl 16 + bl FlashTimingCfg + ldr x1, [x20, 104] + ldrb w4, [x22, #:lo12:IDByte] + ldrb w2, [x1, 12] + strh w2, [x19, 1200] + ldrb w2, [x1, 7] + str w2, [x19, 1196] + add x2, x22, :lo12:IDByte + ldrb w3, [x2, 1] + ldrb w2, [x2, 3] + orr w2, w4, w2, lsl 24 + lsl w4, w3, w21 + orr w3, w4, w3, lsl 8 + ldrh w4, [x1, 14] + orr w2, w2, w3 + str w2, [x19, 1192] + ldrb w2, [x20, 3216] + strh w2, [x19, 1202] + ldrb w2, [x1, 13] + strh w2, [x19, 1204] + strh w4, [x19, 1206] + ldrh w2, [x1, 10] + strh w2, [x19, 1208] + ldrb w3, [x1, 12] + ldrh w2, [x1, 10] + sdiv w2, w2, w3 + strh w2, [x19, 1210] + ldrb w3, [x1, 9] + strh w3, [x19, 1212] + ldrh w5, [x1, 10] + ldrb w2, [x1, 9] + mul w2, w2, w5 + mov w5, 512 + strh w5, [x19, 1216] + ldrb w5, [x20, 89] + and w2, w2, 65535 + strh w5, [x19, 1218] + strh w2, [x19, 1214] + ldrb w5, [x20, 88] + cmp w5, 1 + bne .L945 + ubfiz w2, w2, 1, 15 + lsr w4, w4, 1 + ubfiz w3, w3, 1, 15 + strh w2, [x19, 1214] + strb w21, [x20, 89] + mov w2, 8 + strh w4, [x19, 1206] + strh w3, [x19, 1212] + strh w2, [x19, 1218] +.L945: + ldrb w0, [x1, 20] + bl FlashBchSel + bl ftl_flash_suspend + mov w0, 0 +.L893: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 112 + ret +.L910: + cmp w2, 220 + bne .L912 + add x1, x0, :lo12:.LANCHOR1 + mov w2, 4096 + strh w2, [x1, 3430] + mov w2, -36 + b .L993 +.L912: + cmp w2, 211 + bne .L911 + add x1, x0, :lo12:.LANCHOR1 + mov w2, 4096 + strh w2, [x1, 3430] + mov w2, 2 + strb w2, [x1, 3429] + b .L911 +.L919: + ldrb w0, [x21, 2093] + bl FlashSetInterfaceMode + ldrb w0, [x21, 2093] + b .L988 +.L950: + add x1, x1, 1252 + b .L928 +.L926: + sub w3, w0, #17 + and w3, w3, 255 + cmp w3, 2 + bhi .L932 + adrp x2, MicronReadRetrial + add x2, x2, :lo12:MicronReadRetrial + str x2, [x21, 2192] + cmp w0, 19 + beq .L933 +.L994: + mov w0, 7 + b .L991 +.L933: + mov w0, 15 +.L991: + strb w0, [x1, #:lo12:g_maxRetryCount] + b .L925 +.L932: + sub w3, w0, #65 + cmp w0, 33 + and w3, w3, 255 + ccmp w3, 1, 0, ne + bhi .L934 + adrp x0, ToshibaReadRetrial + add x0, x0, :lo12:ToshibaReadRetrial + str x0, [x21, 2192] + mov w0, 4 + strb w0, [x2, #:lo12:g_maxRegNum] + b .L994 +.L934: + sub w3, w0, #34 + sub w2, w0, #67 + and w3, w3, 255 + and w2, w2, 255 + cmp w3, 1 + ccmp w2, 1, 0, hi + bhi .L935 + adrp x3, ToshibaReadRetrial + add x3, x3, :lo12:ToshibaReadRetrial + str x3, [x21, 2192] + cmp w0, 35 + mov w3, 68 + ccmp w0, w3, 4, ne + beq .L936 + mov w0, 7 +.L990: + strb w0, [x1, #:lo12:g_maxRetryCount] + cmp w2, 1 + bhi .L938 + mov w0, 4 +.L992: + strb w0, [x4, #:lo12:g_maxRegNum] + b .L925 +.L936: + mov w0, 17 + b .L990 +.L938: + mov w0, 5 + b .L992 +.L935: + cmp w0, 49 + bne .L939 + adrp x0, SamsungReadRetrial + add x0, x0, :lo12:SamsungReadRetrial + str x0, [x21, 2192] + b .L925 +.L939: + cmp w0, 50 + bne .L925 + adrp x0, samsung_read_retrial + str wzr, [x21, 2100] + add x0, x0, :lo12:samsung_read_retrial + str x0, [x21, 2192] + b .L925 +.L947: + mov w0, -2 + b .L893 +.L907: + strb w5, [x3, 2248] + b .L906 + .size FlashInit, .-FlashInit + .align 2 + .global FlashPageProgMsbFFData + .type FlashPageProgMsbFFData, %function +FlashPageProgMsbFFData: + stp x29, x30, [sp, -80]! + add x29, sp, 0 + stp x21, x22, [sp, 32] + and w22, w0, 255 + adrp x21, .LANCHOR2 + add x0, x21, :lo12:.LANCHOR2 + stp x19, x20, [sp, 16] + and w19, w2, 65535 + stp x23, x24, [sp, 48] + str x25, [sp, 64] + ldrb w2, [x0, 1220] + cbz w2, .L996 + ldr w0, [x0, 2100] + cbnz w0, .L995 +.L996: + adrp x20, .LANCHOR0 + add x20, x20, :lo12:.LANCHOR0 + ldr x0, [x20, 104] + ldrb w0, [x0, 19] + sub w0, w0, #5 + and w3, w0, 255 + cmp w3, 63 + bhi .L995 + mov x2, 16391 + movk x2, 0x4000, lsl 16 + movk x2, 0x2000, lsl 32 + movk x2, 0x8000, lsl 48 + lsr x0, x2, x3 + tbz x0, 0, .L995 + mov w23, w1 + add x24, x20, 1168 + add x21, x21, :lo12:.LANCHOR2 + mov w25, 65535 +.L998: + ldr x0, [x20, 104] + ldrh w0, [x0, 10] + cmp w0, w19 + bhi .L999 +.L995: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldr x25, [sp, 64] + ldp x29, x30, [sp], 80 + ret +.L999: + ldrh w0, [x24, w19, sxtw 1] + cmp w0, w25 + bne .L995 + ldr x0, [x21, 2216] + mov w2, 32768 + mov w1, 255 + bl ftl_memset + ldr x3, [x21, 2216] + add w1, w19, w23 + add w19, w19, 1 + mov w0, w22 + and w19, w19, 65535 + mov x2, x3 + bl FlashProgPage + b .L998 + .size FlashPageProgMsbFFData, .-FlashPageProgMsbFFData + .align 2 + .global FlashReadSlc2KPages + .type FlashReadSlc2KPages, %function +FlashReadSlc2KPages: + stp x29, x30, [sp, -144]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + mov x19, x0 + mov w0, 56 + stp x21, x22, [sp, 32] + str w2, [x29, 120] + adrp x2, .LANCHOR1+481 + umaddl x0, w1, w0, x19 + stp x25, x26, [sp, 64] + str x0, [x29, 112] + and w22, w1, 255 + adrp x0, .LANCHOR0 + ldrb w2, [x2, #:lo12:.LANCHOR1+481] + add x26, x0, :lo12:.LANCHOR0 + stp x23, x24, [sp, 48] + add x0, x26, 3072 + stp x27, x28, [sp, 80] + str x0, [x29, 96] + str w2, [x29, 124] +.L1005: + ldr x0, [x29, 112] + cmp x19, x0 + bne .L1025 + ldp x19, x20, [sp, 16] + mov w0, 0 + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 144 + ret +.L1025: + ldr w1, [x29, 120] + mov w4, w22 + add x3, x29, 136 + add x2, x29, 140 + mov x0, x19 + bl LogAddr2PhyAddr + ldrb w1, [x26, 3216] + ldr w0, [x29, 136] + cmp w1, w0 + bhi .L1006 + mov w0, -1 + str w0, [x19] +.L1007: + sub w22, w22, #1 + add x19, x19, 56 + and w22, w22, 255 + b .L1005 +.L1006: + ldr x1, [x29, 96] + adrp x21, .LANCHOR2 + mov w25, 0 + add x23, x21, :lo12:.LANCHOR2 + mov w28, 256 + add x0, x1, w0, uxtw + ldrb w20, [x0, 148] + mov w0, w20 + bl NandcWaitFlashReady + mov w0, w20 + bl NandcFlashCs +.L1008: + ldr w1, [x29, 140] + mov w0, w20 + bl FlashReadCmd + mov w0, w20 + bl NandcWaitFlashReady + ldrb w2, [x29, 124] + mov w1, 0 + ldp x3, x4, [x19, 8] + mov w0, w20 + bl NandcXferData + mov w24, w0 + ldrb w0, [x23, 2248] + cbz w0, .L1009 + mov w0, w20 + bl flash_read_ecc + cmp w0, 5 + csel w24, w24, w28, ls +.L1009: + cmp w25, 9 + ccmn w24, #1, 0, ls + bne .L1010 + add w25, w25, 1 + b .L1008 +.L1010: + cmp w25, 0 + adrp x0, .LANCHOR0 + mov w23, 256 + csel w24, w24, w23, eq + add x28, x0, :lo12:.LANCHOR0 + mov w25, 0 + add x0, x21, :lo12:.LANCHOR2 + str x0, [x29, 104] +.L1012: + ldr w0, [x28, 92] + ldr w1, [x29, 140] + add w1, w1, w0 + mov w0, w20 + bl FlashReadCmd + mov w0, w20 + bl NandcWaitFlashReady + ldr x0, [x19, 8] + mov w1, 0 + ldrb w2, [x29, 124] + cmp x0, 0 + add x3, x0, 2048 + ldr x0, [x19, 16] + csel x3, x3, xzr, ne + cmp x0, 0 + add x4, x0, 8 + csel x4, x4, xzr, ne + mov w0, w20 + bl NandcXferData + mov w27, w0 + ldr x0, [x29, 104] + ldrb w0, [x0, 2248] + cbz w0, .L1015 + mov w0, w20 + bl flash_read_ecc + cmp w0, 5 + csel w27, w27, w23, ls +.L1015: + cmp w25, 9 + ccmn w27, #1, 0, ls + bne .L1016 + add w25, w25, 1 + b .L1012 +.L1016: + cmp w25, 0 + mov w2, 256 + mov w0, w20 + csel w27, w27, w2, eq + bl NandcFlashDeCs + add x0, x21, :lo12:.LANCHOR2 + cmp w24, w27 + csel w5, w24, w27, cs + ldrb w0, [x0, 1221] + add w0, w0, w0, lsl 1 + cmp w5, w0, lsr 2 + bls .L1018 + cmn w5, #1 + csel w5, w5, w2, eq +.L1018: + cmp w5, 256 + ldr x0, [x19, 16] + ccmn w5, #1, 4, ne + csel w5, w5, wzr, eq + str w5, [x19] + cbz x0, .L1021 + ldr w1, [x0, 12] + cmn w1, #1 + bne .L1021 + ldr w1, [x0, 8] + cmn w1, #1 + bne .L1021 + ldr w0, [x0] + cmn w0, #1 + beq .L1021 + str w1, [x19] +.L1021: + ldr w3, [x19] + cmn w3, #1 + bne .L1007 + add x21, x21, :lo12:.LANCHOR2 + ldr w1, [x19, 4] + adrp x0, .LC16 + add x0, x0, :lo12:.LC16 + ldrb w2, [x21, 1221] + bl printk + ldr x1, [x19, 8] + cbz x1, .L1023 + adrp x0, .LC17 + mov w3, 8 + mov w2, 4 + add x0, x0, :lo12:.LC17 + bl rknand_print_hex +.L1023: + ldr x1, [x19, 16] + cbz x1, .L1007 + mov w3, 4 + adrp x0, .LC18 + mov w2, w3 + add x0, x0, :lo12:.LC18 + bl rknand_print_hex + b .L1007 + .size FlashReadSlc2KPages, .-FlashReadSlc2KPages + .align 2 + .global FlashReadPages + .type FlashReadPages, %function +FlashReadPages: + stp x29, x30, [sp, -160]! + add x29, sp, 0 + stp x25, x26, [sp, 64] + adrp x25, .LANCHOR0 + add x3, x25, :lo12:.LANCHOR0 + stp x19, x20, [sp, 16] + stp x21, x22, [sp, 32] + stp x23, x24, [sp, 48] + stp x27, x28, [sp, 80] + stp w2, w1, [x29, 120] + ldrb w4, [x3, 88] + cbnz w4, .L1054 + mov x26, x0 + adrp x0, .LANCHOR1+481 + mov w24, 0 + mov w23, 0 + ldrb w0, [x0, #:lo12:.LANCHOR1+481] + str w0, [x29, 136] + ldrb w0, [x3, 96] + str w0, [x29, 108] + adrp x0, .LANCHOR2 + add x20, x0, :lo12:.LANCHOR2 + add x0, x20, 1236 + str x0, [x29, 112] +.L1055: + ldr w0, [x29, 124] + cmp w23, w0 + bcc .L1089 + mov w0, 0 + b .L1053 +.L1054: + bl FlashReadSlc2KPages +.L1053: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 160 + ret +.L1089: + mov w27, 56 + ldr w1, [x29, 120] + add x2, x29, 156 + add x3, x29, 152 + umull x0, w23, w27 + add x27, x25, :lo12:.LANCHOR0 + str x0, [x29, 128] + add x22, x26, x0 + ldr w0, [x29, 124] + sub w4, w0, w23 + mov x0, x22 + ldr w28, [x22, 4] + bl LogAddr2PhyAddr + ldrb w2, [x27, 3216] + mov w21, w0 + ldr w0, [x29, 152] + cmp w2, w0 + bhi .L1057 + ldr x1, [x29, 128] + mov w0, -1 + str w0, [x26, x1] +.L1058: + add w23, w23, 1 + b .L1055 +.L1057: + add x0, x27, w0, uxtw + ldrb w19, [x0, 3220] + adrp x0, .LANCHOR2 + add x0, x0, :lo12:.LANCHOR2 + ldrb w0, [x0, 2249] + cmp w0, 0 + mov w0, w19 + csel w21, w21, wzr, ne + bl NandcWaitFlashReady + ldr x0, [x27, 104] + ldrb w1, [x0, 19] + sub w0, w1, #1 + and w0, w0, 255 + cmp w0, 7 + bhi .L1060 + add x0, x20, 1232 + sxtw x2, w19 + add x0, x0, x2 + sub w1, w1, #7 + and w1, w1, 255 + cmp w1, 1 + ldrb w3, [x0, 12] + bhi .L1061 + ldrb w3, [x0, 20] +.L1061: + add x2, x20, x2 + ldrb w0, [x2, 2088] + cmp w0, w3 + beq .L1060 + ldrb w1, [x20, 1233] + mov w0, w19 + ldr x2, [x29, 112] + bl HynixSetRRPara +.L1060: + mov w0, w19 + bl NandcFlashCs + ldr w0, [x29, 120] + cmp w0, 1 + cset w0, eq + orr w0, w0, w28, lsr 31 + str w0, [x29, 140] + cbz w0, .L1062 + ldrb w0, [x20, 1220] + cbz w0, .L1062 + mov w0, w19 + bl flash_enter_slc_mode +.L1063: + add x28, x25, :lo12:.LANCHOR0 +.L1069: + ldr w1, [x29, 156] + cmn w1, #1 + bne .L1064 + cmp w19, 255 + beq .L1091 +.L1064: + cbz w21, .L1066 + ldr w2, [x28, 92] + mov w0, w19 + add w2, w1, w2 + bl FlashReadDpCmd +.L1067: + mov w0, w19 + bl NandcWaitFlashReady + cbz w21, .L1065 + ldr w1, [x29, 156] + mov w0, w19 + bl FlashReadDpDataOutCmd +.L1065: + ldrb w2, [x29, 136] + mov w1, 0 + ldp x3, x4, [x22, 8] + mov w0, w19 + bl NandcXferData + mov w27, w0 + ldrb w0, [x28, 96] + cbz w0, .L1068 + cmn w27, #1 + bne .L1068 + strb wzr, [x28, 96] + mov w21, 0 + b .L1069 +.L1062: + mov w0, w19 + bl flash_exit_slc_mode + b .L1063 +.L1066: + mov w0, w19 + bl FlashReadCmd + b .L1067 +.L1091: + mov w21, 0 + b .L1065 +.L1068: + cbz w21, .L1070 + add x0, x25, :lo12:.LANCHOR0 + ldr w1, [x29, 156] + ldr w0, [x0, 92] + add w1, w1, w0 + mov w0, w19 + bl FlashReadDpDataOutCmd + add w0, w23, 1 + mov w1, 56 + ldrb w2, [x29, 136] + nop // between mem op and mult-accumulate + umaddl x0, w0, w1, x26 + mov w1, 0 + ldp x3, x4, [x0, 8] + mov w0, w19 + bl NandcXferData + cmn w0, #1 + mov w24, w0 + csel w21, w21, wzr, ne +.L1070: + mov w0, w19 + bl NandcFlashDeCs + add x0, x25, :lo12:.LANCHOR0 + ldrb w1, [x29, 108] + cmn w27, #1 + strb w1, [x0, 96] + bne .L1071 + ldrb w0, [x20, 2104] + cbnz w0, .L1072 +.L1076: + ldr x4, [x20, 2192] + cbnz x4, .L1073 + ldr w1, [x29, 156] + mov w0, w19 + ldp x2, x3, [x22, 8] + bl FlashReadRawPage + b .L1128 +.L1072: + ldr x0, [x20, 1152] + mov w4, 1 + ldr w1, [x29, 156] + ldp x2, x3, [x22, 8] + ldr w21, [x0, 304] + mov w0, w19 + bl FlashDdrTunningRead + mov w27, w0 + cmn w0, #1 + beq .L1075 + ldrb w0, [x20, 1221] + cmp w27, w0, lsr 1 + bls .L1092 +.L1075: + lsr w0, w21, 8 + bl NandcSetDdrPara + cmn w27, #1 + beq .L1076 +.L1092: + mov w21, 0 +.L1071: + ldrb w0, [x20, 1221] + add w0, w0, w0, lsl 1 + cmp w27, w0, lsr 2 + bls .L1077 + ldr x0, [x20, 2192] + cmp x0, 0 + mov w0, 256 + csel w27, w27, w0, ne +.L1077: + ldr x0, [x29, 128] + cmp w27, 256 + ccmn w27, #1, 4, ne + csel w3, w27, wzr, eq + cmn w3, #1 + str w3, [x26, x0] + bne .L1084 + ldr w1, [x22, 4] + adrp x0, .LC16 + ldrb w2, [x20, 1221] + add x0, x0, :lo12:.LC16 + bl printk + ldr x1, [x22, 16] + cbz x1, .L1084 + mov w3, 4 + adrp x0, .LC18 + mov w2, w3 + add x0, x0, :lo12:.LC18 + bl rknand_print_hex +.L1084: + cbz w21, .L1086 + ldrb w0, [x20, 1221] + add w0, w0, w0, lsl 1 + cmp w24, w0, lsr 2 + bls .L1087 + ldr x0, [x20, 2192] + cmp x0, 0 + mov w0, 256 + csel w24, w24, w0, ne +.L1087: + add w0, w23, 1 + mov w1, 56 + cmp w24, 256 + ccmn w24, #1, 4, ne + umull x0, w0, w1 + csel w1, w24, wzr, eq + str w1, [x26, x0] +.L1086: + ldr w0, [x29, 140] + add w23, w23, w21 + cbz w0, .L1058 + ldrb w0, [x20, 1220] + cbz w0, .L1058 + mov w0, w19 + bl flash_exit_slc_mode + b .L1058 +.L1073: + ldr w1, [x29, 156] + mov w0, w19 + ldp x2, x3, [x22, 8] + mov w21, 0 + blr x4 + mov w27, w0 + cmn w0, #1 + bne .L1077 + add x0, x25, :lo12:.LANCHOR0 + ldr x0, [x0, 104] + ldrb w0, [x0, 19] + sub w0, w0, #1 + and w0, w0, 255 + cmp w0, 7 + bhi .L1078 + ldrb w1, [x20, 1233] + mov w3, 0 + ldr x2, [x29, 112] + mov w0, w19 + bl HynixSetRRPara +.L1078: + ldp x2, x3, [x22, 8] + mov w0, w19 + ldr w1, [x29, 156] + bl FlashReadRawPage + mov w27, w0 + ldrb w2, [x20, 1221] + mov w3, w0 + ldr w1, [x22, 4] + adrp x0, .LC19 + add x0, x0, :lo12:.LC19 + bl printk + cmn w27, #1 + bne .L1095 + ldrb w0, [x20, 1220] + cbz w0, .L1095 + ldr w0, [x29, 140] + cbz w0, .L1079 + mov w0, w19 + bl flash_enter_slc_mode +.L1080: + ldr w1, [x29, 156] + mov w0, w19 + ldr x4, [x20, 2192] + ldp x2, x3, [x22, 8] + blr x4 +.L1128: + mov w27, w0 +.L1095: + mov w21, 0 + b .L1077 +.L1079: + mov w0, w19 + bl flash_exit_slc_mode + b .L1080 + .size FlashReadPages, .-FlashReadPages + .align 2 + .global FlashLoadFactorBbt + .type FlashLoadFactorBbt, %function +FlashLoadFactorBbt: + stp x29, x30, [sp, -176]! + mov w2, 16 + mov w1, 0 + add x29, sp, 0 + stp x19, x20, [sp, 16] + stp x23, x24, [sp, 48] + adrp x23, .LANCHOR2 + add x19, x23, :lo12:.LANCHOR2 + stp x25, x26, [sp, 64] + stp x27, x28, [sp, 80] + mov w26, -1 + stp x21, x22, [sp, 32] + mov w27, 0 + ldrh w0, [x19, 1204] + ldrh w21, [x19, 1206] + mul w21, w21, w0 + add x0, x19, 2256 + bl ftl_memset + and w21, w21, 65535 + ldr x0, [x19, 2224] + add w25, w21, w26 + stp xzr, x0, [x29, 128] + and w25, w25, 65535 + sub w0, w21, #12 + mov w19, 0 + str w0, [x29, 108] +.L1130: + adrp x22, .LANCHOR0 + add x0, x22, :lo12:.LANCHOR0 + ldrb w0, [x0, 3216] + cmp w0, w19 + bhi .L1136 + mov w0, w26 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 176 + ret +.L1136: + mul w28, w21, w19 + mov w20, w25 + add x24, x23, :lo12:.LANCHOR2 + mov w3, 61664 +.L1131: + ldr w0, [x29, 108] + cmp w20, w0 + ble .L1133 + add w0, w20, w28 + mov w2, 1 + lsl w0, w0, 10 + str w3, [x29, 104] + str w0, [x29, 124] + mov w1, w2 + add x0, x29, 120 + bl FlashReadPages + ldr w0, [x29, 120] + ldr w3, [x29, 104] + cmn w0, #1 + beq .L1132 + ldr x0, [x24, 2224] + ldrh w0, [x0] + cmp w0, w3 + bne .L1132 + add x24, x24, w19, sxtw 1 + add w27, w27, 1 + and w27, w27, 65535 + mov w2, w20 + mov w1, w19 + adrp x0, .LC20 + add x0, x0, :lo12:.LC20 + bl printk + strh w20, [x24, 2256] +.L1133: + add x22, x22, :lo12:.LANCHOR0 + add w19, w19, 1 + and w19, w19, 255 + ldrb w0, [x22, 3216] + cmp w0, w27 + csel w26, w26, wzr, ne + b .L1130 +.L1132: + sub w20, w20, #1 + and w20, w20, 65535 + b .L1131 + .size FlashLoadFactorBbt, .-FlashLoadFactorBbt + .align 2 + .global FlashReadFacBbtData + .type FlashReadFacBbtData, %function +FlashReadFacBbtData: + stp x29, x30, [sp, -144]! + add x29, sp, 0 + stp x23, x24, [sp, 48] + mov w23, w1 + adrp x1, .LANCHOR2 + add x1, x1, :lo12:.LANCHOR2 + stp x19, x20, [sp, 16] + stp x21, x22, [sp, 32] + mov x22, x0 + stp x25, x26, [sp, 64] + mov w25, w2 + mov x21, x1 + mov w26, 61664 + ldrh w2, [x1, 1204] + ldrh w0, [x1, 1206] + mul w0, w0, w2 + adrp x2, .LANCHOR0+64 + and w0, w0, 65535 + ldr x2, [x2, #:lo12:.LANCHOR0+64] + sub w20, w0, #1 + str x2, [x29, 96] + and w20, w20, 65535 + ldr x2, [x1, 2224] + mul w24, w0, w23 + sub w19, w0, #16 + str x2, [x29, 104] +.L1142: + cmp w20, w19 + bgt .L1145 + mov w0, -1 + b .L1141 +.L1145: + add w0, w20, w24 + mov w2, 1 + lsl w0, w0, 10 + mov w1, w2 + str w0, [x29, 92] + add x0, x29, 88 + bl FlashReadPages + ldr w0, [x29, 88] + cmn w0, #1 + beq .L1143 + ldr x0, [x21, 2224] + ldrh w0, [x0] + cmp w0, w26 + bne .L1143 + cbz x22, .L1146 + mov w2, w25 + mov w1, w23 + mov x0, x22 + bl FlashReadFacBbtData.part.6 +.L1141: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x29, x30, [sp], 144 + ret +.L1143: + sub w20, w20, #1 + and w20, w20, 65535 + b .L1142 +.L1146: + mov w0, 0 + b .L1141 + .size FlashReadFacBbtData, .-FlashReadFacBbtData + .align 2 + .global FlashGetBadBlockList + .type FlashGetBadBlockList, %function +FlashGetBadBlockList: + stp x29, x30, [sp, -48]! + add x29, sp, 0 + str x21, [sp, 32] + mov x21, x0 + adrp x0, .LANCHOR0+104 + stp x19, x20, [sp, 16] + adrp x20, .LANCHOR2 + add x20, x20, :lo12:.LANCHOR2 + ldr x0, [x0, #:lo12:.LANCHOR0+104] + ldrb w2, [x0, 13] + ldrh w19, [x0, 14] + ldr x0, [x20, 2216] + mul w19, w19, w2 + and w19, w19, 65535 + add w2, w19, 7 + lsr w2, w2, 3 + bl FlashReadFacBbtData + cmn w0, #1 + bne .L1152 +.L1156: + mov w0, 0 +.L1153: + ubfiz x0, x0, 1, 16 + mov w1, -1 + strh w1, [x21, x0] + mov w0, 0 + ldp x19, x20, [sp, 16] + ldr x21, [sp, 32] + ldp x29, x30, [sp], 48 + ret +.L1152: + lsr w4, w19, 4 + sub w19, w19, #1 + mov w1, 0 + mov w0, 0 + mov w5, 1 +.L1154: + cmp w1, w19 + bge .L1153 + ldr x6, [x20, 2216] + ubfx x3, x1, 5, 11 + lsl w2, w5, w1 + ldr w3, [x6, x3, lsl 2] + tst w2, w3 + beq .L1155 + add w2, w0, 1 + ubfiz x0, x0, 1, 16 + strh w1, [x21, x0] + and w0, w2, 65535 +.L1155: + cmp w0, w4 + bcs .L1156 + add w1, w1, 1 + and w1, w1, 65535 + b .L1154 + .size FlashGetBadBlockList, .-FlashGetBadBlockList + .align 2 + .global FlashProgSlc2KPages + .type FlashProgSlc2KPages, %function +FlashProgSlc2KPages: + stp x29, x30, [sp, -176]! + add x29, sp, 0 + stp x23, x24, [sp, 48] + mov w24, w2 + adrp x2, .LANCHOR1+481 + stp x21, x22, [sp, 32] + stp x25, x26, [sp, 64] + and w21, w1, 255 + mov w23, 56 + ldrb w26, [x2, #:lo12:.LANCHOR1+481] + stp x27, x28, [sp, 80] + mov w22, w21 + adrp x27, .LANCHOR0 + add x25, x27, :lo12:.LANCHOR0 + stp x19, x20, [sp, 16] + mov x28, x0 + umaddl x23, w1, w23, x0 + mov x20, x0 + add x0, x25, 3072 + str x0, [x29, 104] +.L1163: + cmp x20, x23 + bne .L1169 + adrp x22, .LANCHOR2 + add x23, x22, :lo12:.LANCHOR2 +.L1170: + cmp x28, x20 + bne .L1177 + ldp x19, x20, [sp, 16] + mov w0, 0 + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 176 + ret +.L1169: + mov w1, w24 + mov w4, w22 + add x3, x29, 116 + add x2, x29, 112 + mov x0, x20 + bl LogAddr2PhyAddr + ldrb w1, [x25, 3216] + ldr w0, [x29, 116] + cmp w1, w0 + bhi .L1164 + mov w0, -1 + str w0, [x20] +.L1165: + sub w22, w22, #1 + add x20, x20, 56 + and w22, w22, 255 + b .L1163 +.L1164: + ldr x1, [x29, 104] + add x0, x1, w0, uxtw + ldrb w19, [x0, 148] + mov w0, w19 + bl NandcWaitFlashReady + mov w0, w19 + bl NandcFlashCs + ldr w1, [x29, 112] + mov w0, w19 + bl FlashProgFirstCmd + ldp x3, x4, [x20, 8] + mov w2, w26 + mov w1, 1 + mov w0, w19 + bl NandcXferData + ldr w1, [x29, 112] + mov w0, w19 + bl FlashProgSecondCmd + mov w0, w19 + bl NandcWaitFlashReady + ldr w1, [x29, 112] + mov w0, w19 + bl FlashReadStatus + sbfx x0, x0, 0, 1 + str w0, [x20] + ldr w1, [x29, 112] + ldr w0, [x25, 92] + add w1, w1, w0 + mov w0, w19 + bl FlashProgFirstCmd + ldr x0, [x20, 8] + mov w2, w26 + mov w1, 1 + cmp x0, 0 + add x3, x0, 2048 + ldr x0, [x20, 16] + csel x3, x3, xzr, ne + cmp x0, 0 + add x4, x0, 8 + csel x4, x4, xzr, ne + mov w0, w19 + bl NandcXferData + add x0, x27, :lo12:.LANCHOR0 + ldr w1, [x29, 112] + ldr w0, [x0, 92] + add w1, w1, w0 + mov w0, w19 + bl FlashProgSecondCmd + mov w0, w19 + bl NandcWaitFlashReady + ldr w1, [x29, 112] + mov w0, w19 + bl FlashReadStatus + tbz x0, 0, .L1168 + mov w0, -1 + str w0, [x20] +.L1168: + mov w0, w19 + bl NandcFlashDeCs + b .L1165 +.L1177: + ldr w0, [x28] + cmn w0, #1 + bne .L1171 + ldr w1, [x28, 4] + adrp x0, .LC21 + add x0, x0, :lo12:.LC21 + bl printk +.L1172: + sub w21, w21, #1 + add x28, x28, 56 + and w21, w21, 255 + b .L1170 +.L1171: + add x19, x22, :lo12:.LANCHOR2 + mov w4, w21 + add x3, x29, 116 + add x2, x29, 112 + mov w1, w24 + mov x0, x28 + bl LogAddr2PhyAddr + ldr x0, [x19, 2232] + mov x2, 56 + mov x1, x28 + str wzr, [x0] + ldr x0, [x19, 2240] + str wzr, [x0] + add x0, x29, 120 + bl memcpy + ldr x0, [x19, 2232] + mov w2, w24 + str x0, [x29, 128] + mov w1, 1 + ldr x0, [x19, 2240] + str x0, [x29, 136] + add x0, x29, 120 + bl FlashReadPages + ldr w19, [x29, 120] + cmn w19, #1 + bne .L1173 + ldr w1, [x28, 4] + adrp x0, .LC22 + add x0, x0, :lo12:.LC22 + bl printk + str w19, [x28] +.L1173: + ldr w19, [x29, 120] + cmp w19, 256 + bne .L1174 + ldr w1, [x28, 4] + adrp x0, .LC23 + add x0, x0, :lo12:.LC23 + bl printk + str w19, [x28] +.L1174: + ldr x0, [x28, 16] + cbz x0, .L1175 + ldr w2, [x0] + ldr x0, [x23, 2240] + ldr w3, [x0] + cmp w2, w3 + beq .L1175 + ldr w1, [x28, 4] + adrp x0, .LC24 + add x0, x0, :lo12:.LC24 + bl printk + mov w0, -1 + str w0, [x28] +.L1175: + ldr x0, [x28, 8] + cbz x0, .L1172 + ldr w2, [x0] + ldr x0, [x23, 2232] + ldr w3, [x0] + cmp w2, w3 + beq .L1172 + ldr w1, [x28, 4] + adrp x0, .LC25 + add x0, x0, :lo12:.LC25 + bl printk + mov w0, -1 + str w0, [x28] + b .L1172 + .size FlashProgSlc2KPages, .-FlashProgSlc2KPages + .align 2 + .global FlashProgPages + .type FlashProgPages, %function +FlashProgPages: + stp x29, x30, [sp, -192]! + add x29, sp, 0 + stp x21, x22, [sp, 32] + adrp x21, .LANCHOR0 + add x4, x21, :lo12:.LANCHOR0 + stp x19, x20, [sp, 16] + stp x23, x24, [sp, 48] + stp x25, x26, [sp, 64] + stp x27, x28, [sp, 80] + ldr x5, [x4, 104] + ldrb w4, [x4, 88] + ldrb w5, [x5, 19] + stp w3, w5, [x29, 116] + cbnz w4, .L1191 + mov x19, x0 + adrp x0, .LANCHOR1+481 + adrp x28, .LANCHOR2 + mov w25, w1 + ldrb w0, [x0, #:lo12:.LANCHOR1+481] + add x26, x28, :lo12:.LANCHOR2 + mov w23, w2 + str w0, [x29, 124] + mov w22, 0 + add x0, x26, 1236 + str x0, [x29, 104] +.L1192: + cmp w22, w25 + bcc .L1205 + add x21, x21, :lo12:.LANCHOR0 + adrp x22, .LANCHOR2 + add x24, x21, 3260 + add x22, x22, :lo12:.LANCHOR2 + mov x20, 0 + mov x26, 24 +.L1206: + ldrb w0, [x21, 3216] + cmp w0, w20 + bhi .L1208 + ldr w0, [x29, 116] + cbnz w0, .L1209 +.L1217: + mov w0, 0 + b .L1190 +.L1191: + bl FlashProgSlc2KPages +.L1190: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 192 + ret +.L1205: + mov w13, 56 + add x2, x29, 128 + mov w1, w23 + sub w4, w25, w22 + umull x13, w22, w13 + add x3, x29, 132 + add x27, x19, x13 + mov x0, x27 + bl LogAddr2PhyAddr + mov w24, w0 + add x1, x21, :lo12:.LANCHOR0 + ldr w0, [x29, 132] + ldrb w2, [x1, 3216] + cmp w2, w0 + bhi .L1194 + mov w0, -1 + str w0, [x19, x13] +.L1195: + add w22, w22, 1 + b .L1192 +.L1194: + add x2, x28, :lo12:.LANCHOR2 + mov x3, 24 + ldrb w2, [x2, 2094] + cmp w2, 0 + add x2, x1, 3260 + uxtw x1, w0 + csel w24, w24, wzr, ne + madd x1, x1, x3, x2 + ldr x1, [x1, 8] + cbz x1, .L1197 + bl FlashWaitCmdDone +.L1197: + add x0, x21, :lo12:.LANCHOR0 + ldr w1, [x29, 132] + add x2, x0, 3260 + mov x0, 24 + madd x0, x1, x0, x2 + ldr w2, [x29, 128] + str w2, [x0, 4] + stp x27, xzr, [x0, 8] + cbz w24, .L1198 + add w2, w22, 1 + mov w3, 56 + umaddl x2, w2, w3, x19 + str x2, [x0, 16] +.L1198: + add x4, x21, :lo12:.LANCHOR0 + mov x2, 24 + add x0, x4, x1 + mul x1, x1, x2 + ldrb w20, [x0, 3220] + add x0, x4, 3260 + strb w20, [x0, x1] + ldrb w0, [x4, 3216] + cmp w0, 1 + mov w0, w20 + bne .L1199 + bl NandcWaitFlashReady +.L1200: + ldr w0, [x29, 120] + sub w0, w0, #1 + cmp w0, 7 + bhi .L1201 + add x0, x26, w20, sxtw + ldrb w0, [x0, 2088] + cbz w0, .L1201 + ldrb w1, [x26, 1233] + mov w3, 0 + ldr x2, [x29, 104] + mov w0, w20 + bl HynixSetRRPara +.L1201: + mov w0, w20 + bl NandcFlashCs + cmp w23, 1 + bne .L1202 + ldrb w0, [x26, 1220] + cbz w0, .L1202 + mov w0, w20 + bl flash_enter_slc_mode +.L1203: + ldr w1, [x29, 128] + mov w0, w20 + bl FlashProgFirstCmd + ldrb w2, [x29, 124] + mov w1, 1 + ldp x3, x4, [x27, 8] + mov w0, w20 + bl NandcXferData + cbz w24, .L1204 + ldr w1, [x29, 128] + mov w0, w20 + add x27, x21, :lo12:.LANCHOR0 + bl FlashProgDpFirstCmd + ldr w1, [x29, 132] + add x0, x27, 3228 + ldr w0, [x0, x1, lsl 2] + ldr w1, [x29, 128] + cmp w0, 0 + mov w0, w20 + cset w2, ne + bl FlashWaitReadyEN + ldr w0, [x27, 92] + ldr w1, [x29, 128] + add w1, w1, w0 + mov w0, w20 + bl FlashProgDpSecondCmd + add w0, w22, 1 + mov w1, 56 + ldrb w2, [x29, 124] + nop // between mem op and mult-accumulate + umaddl x0, w0, w1, x19 + mov w1, 1 + ldp x3, x4, [x0, 8] + mov w0, w20 + bl NandcXferData +.L1204: + ldr w1, [x29, 128] + mov w0, w20 + add w22, w22, w24 + bl FlashProgSecondCmd + mov w0, w20 + bl NandcFlashDeCs + b .L1195 +.L1199: + bl NandcFlashCs + add x4, x4, 3228 + ldp w1, w0, [x29, 128] + ldr w0, [x4, x0, lsl 2] + cmp w0, 0 + mov w0, w20 + cset w2, ne + bl FlashWaitReadyEN + mov w0, w20 + bl NandcFlashDeCs + b .L1200 +.L1202: + mov w0, w20 + bl flash_exit_slc_mode + b .L1203 +.L1208: + mov w0, w20 + bl FlashWaitCmdDone + cmp w23, 1 + bne .L1207 + ldrb w0, [x22, 1220] + cbz w0, .L1207 + mul x0, x20, x26 + ldrb w0, [x0, x24] + bl flash_exit_slc_mode +.L1207: + add x20, x20, 1 + b .L1206 +.L1209: + mov w0, 56 + and w20, w25, 255 + adrp x22, .LANCHOR2 + add x24, x22, :lo12:.LANCHOR2 + umaddl x25, w25, w0, x19 +.L1210: + cmp x25, x19 + beq .L1217 + ldr w0, [x19] + cmn w0, #1 + bne .L1211 + ldr w1, [x19, 4] + adrp x0, .LC21 + add x0, x0, :lo12:.LC21 + bl printk +.L1212: + sub w20, w20, #1 + add x19, x19, 56 + and w20, w20, 255 + b .L1210 +.L1211: + add x21, x22, :lo12:.LANCHOR2 + mov w4, w20 + add x3, x29, 132 + add x2, x29, 128 + mov w1, w23 + mov x0, x19 + bl LogAddr2PhyAddr + ldr x0, [x21, 2232] + mov x2, 56 + mov x1, x19 + str wzr, [x0] + ldr x0, [x21, 2240] + str wzr, [x0] + add x0, x29, 136 + bl memcpy + ldr x0, [x21, 2232] + mov w2, w23 + str x0, [x29, 144] + mov w1, 1 + ldr x0, [x21, 2240] + str x0, [x29, 152] + add x0, x29, 136 + bl FlashReadPages + ldr w21, [x29, 136] + cmn w21, #1 + bne .L1213 + ldr w1, [x19, 4] + adrp x0, .LC22 + add x0, x0, :lo12:.LC22 + bl printk + str w21, [x19] +.L1213: + ldr x0, [x19, 16] + cbz x0, .L1214 + ldr w2, [x0] + ldr x0, [x24, 2240] + ldr w3, [x0] + cmp w2, w3 + beq .L1214 + ldr w1, [x19, 4] + adrp x0, .LC24 + add x0, x0, :lo12:.LC24 + bl printk + mov w0, -1 + str w0, [x19] +.L1214: + ldr x0, [x19, 8] + cbz x0, .L1212 + ldr w2, [x0] + ldr x0, [x24, 2232] + ldr w3, [x0] + cmp w2, w3 + beq .L1212 + ldr w1, [x19, 4] + adrp x0, .LC25 + add x0, x0, :lo12:.LC25 + bl printk + mov w0, -1 + str w0, [x19] + b .L1212 + .size FlashProgPages, .-FlashProgPages + .align 2 + .type FlashTestBlk.part.7, %function +FlashTestBlk.part.7: + stp x29, x30, [sp, -160]! + mov w2, 32 + mov w1, 165 + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x19, .LANCHOR2 + add x19, x19, :lo12:.LANCHOR2 + and w20, w0, 65535 + lsl w20, w20, 10 + ldr x0, [x19, 2216] + str x0, [x29, 48] + add x0, x29, 96 + str x0, [x29, 56] + bl ftl_memset + ldr x0, [x19, 2216] + mov w2, 8 + mov w1, 90 + bl ftl_memset + str w20, [x29, 44] + mov w2, 1 + add x0, x29, 40 + mov w1, w2 + bl FlashEraseBlocks + mov w3, 1 + add x0, x29, 40 + mov w2, w3 + mov w1, w3 + bl FlashProgPages + ldr w0, [x29, 40] + mov w2, 1 + mov w1, 0 + cmp w0, 0 + add x0, x29, 40 + csetm w19, ne + bl FlashEraseBlocks + mov w0, w19 + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 160 + ret + .size FlashTestBlk.part.7, .-FlashTestBlk.part.7 + .align 2 + .global FlashTestBlk + .type FlashTestBlk, %function +FlashTestBlk: + adrp x1, .LANCHOR0+72 + and w0, w0, 65535 + ldr w1, [x1, #:lo12:.LANCHOR0+72] + cmp w0, w1 + bcc .L1247 + stp x29, x30, [sp, -16]! + add x29, sp, 0 + bl FlashTestBlk.part.7 + ldp x29, x30, [sp], 16 + ret +.L1247: + mov w0, 0 + ret + .size FlashTestBlk, .-FlashTestBlk + .align 2 + .global FlashMakeFactorBbt + .type FlashMakeFactorBbt, %function +FlashMakeFactorBbt: + stp x29, x30, [sp, -240]! + add x29, sp, 0 + stp x21, x22, [sp, 32] + adrp x22, .LANCHOR2 + add x0, x22, :lo12:.LANCHOR2 + stp x19, x20, [sp, 16] + stp x23, x24, [sp, 48] + add x0, x0, 1192 + stp x25, x26, [sp, 64] + adrp x20, .LANCHOR0 + stp x27, x28, [sp, 80] + mov w19, 0 + ldr x1, [x0, 1032] + ldrh w21, [x0, 14] + ldrh w0, [x0, 12] + str x1, [x29, 136] + mul w21, w21, w0 + add x0, x20, :lo12:.LANCHOR0 + and w21, w21, 65535 + ldr x1, [x0, 104] + ldrh w2, [x0, 92] + ldrb w0, [x0, 88] + ldrb w1, [x1, 24] + cmp w0, 1 + str w1, [x29, 112] + mov x1, x2 + ubfiz w2, w2, 1, 15 + csel w0, w2, w1, eq + mov w1, 1 + str w0, [x29, 168] + adrp x0, .LC26 + add x0, x0, :lo12:.LC26 + bl printk + add x0, x22, :lo12:.LANCHOR2 + mov w2, 4096 + mov w1, 0 + ldr x0, [x0, 2224] + bl ftl_memset + lsr w0, w21, 4 + str w0, [x29, 132] + sub w0, w21, #1 + and w0, w0, 65535 + str w0, [x29, 128] + adrp x0, .LC29 + add x0, x0, :lo12:.LC29 + str x0, [x29, 104] +.L1254: + add x28, x20, :lo12:.LANCHOR0 + ldrb w0, [x28, 3216] + cmp w0, w19 + bhi .L1281 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 240 + ret +.L1281: + add x0, x22, :lo12:.LANCHOR2 + sxtw x24, w19 + add x1, x0, x24, lsl 1 + ldrh w1, [x1, 2256] + str w1, [x29, 172] + cbnz w1, .L1255 + ldrh w2, [x0, 1212] + mov x26, x28 + ldr x0, [x28, 64] + mov w23, 0 + mov w25, 0 + lsl w2, w2, 9 + bl ftl_memset + add x0, x28, x24 + add x28, x28, 3228 + ldrb w27, [x0, 3220] + ldr w0, [x29, 112] + and w0, w0, 1 + stp w0, wzr, [x29, 160] +.L1256: + ldrh w0, [x29, 164] + str w0, [x29, 144] + cmp w0, w21 + bcc .L1267 +.L1266: + mov w1, w19 + mov w2, w23 + adrp x0, .LC28 + add x0, x0, :lo12:.LC28 + bl printk + add x3, x20, :lo12:.LANCHOR0 + ldr w1, [x29, 132] + ldrb w0, [x3, 3216] + mul w0, w0, w1 + cmp w23, w0 + blt .L1268 + add x0, x22, :lo12:.LANCHOR2 + mov w1, 0 + ldrh w2, [x0, 1212] + ldr x0, [x3, 64] + lsl w2, w2, 9 + bl ftl_memset +.L1268: + cbnz w19, .L1270 + add x26, x20, :lo12:.LANCHOR0 + mov w23, 1 + ldrh w25, [x26, 72] +.L1271: + ldrb w0, [x26, 89] + cmp w0, w25 + bhi .L1273 + ldr w27, [x29, 128] + sub w26, w21, #50 + add x23, x20, :lo12:.LANCHOR0 + mov w25, 1 +.L1274: + cmp w27, w26 + bgt .L1276 + add x0, x20, :lo12:.LANCHOR0 + ldr w2, [x0, 72] + ldrb w1, [x0, 89] + sub w1, w1, w2 + ldr w2, [x29, 172] + cmp w2, w1 + bcc .L1270 + add x1, x22, :lo12:.LANCHOR2 + ldr x0, [x0, 64] + ldrh w2, [x1, 1212] + mov w1, 0 + lsl w2, w2, 9 + bl ftl_memset +.L1270: + add x28, x22, :lo12:.LANCHOR2 + mul w25, w19, w21 + add x0, x28, 2048 + ldr w26, [x29, 128] + adrp x23, .LC30 + add x27, x20, :lo12:.LANCHOR0 + add x23, x23, :lo12:.LC30 + add x24, x0, x24, lsl 1 +.L1278: + mov w1, w19 + mov w2, w26 + mov x0, x23 + bl printk + ldr x1, [x27, 64] +.L1279: + ubfx x0, x26, 5, 11 + ldr w0, [x1, x0, lsl 2] + lsr w0, w0, w26 + tbnz x0, 0, .L1280 + ldr x1, [x29, 136] + mov w0, -3872 + strh w26, [x24, 208] + mov w2, 1 + strh w0, [x1] + strh w26, [x1, 2] + strh wzr, [x1, 8] + mov w1, w2 + ldr x0, [x27, 64] + str x0, [x29, 192] + ldr x0, [x28, 2224] + str x0, [x29, 200] + add w0, w26, w25 + lsl w0, w0, 10 + str w0, [x29, 188] + add x0, x29, 184 + bl FlashEraseBlocks + mov w3, 1 + add x0, x29, 184 + mov w2, w3 + mov w1, w3 + bl FlashProgPages + ldr w0, [x29, 184] + cbz w0, .L1255 + sub w26, w26, #1 + and w26, w26, 65535 + b .L1278 +.L1267: + mov w0, -1 + strb w0, [x29, 182] + strb w0, [x29, 183] + ldr w0, [x29, 160] + cbz w0, .L1258 + ldr w4, [x28, x24, lsl 2] + mov w0, w27 + add x2, x29, 182 + add w4, w25, w4 + str w4, [x29, 100] + mov w1, w4 + bl FlashReadSpare + ldrb w0, [x26, 88] + ldr w4, [x29, 100] + cmp w0, 1 + bne .L1258 + ldr w1, [x26, 92] + mov w0, w27 + add x2, x29, 183 + add w1, w4, w1 + bl FlashReadSpare + ldrb w0, [x29, 182] + ldrb w1, [x29, 183] + and w0, w0, w1 + strb w0, [x29, 182] +.L1258: + ldr x0, [x29, 112] + tbz x0, 1, .L1260 + ldr x0, [x26, 104] + add x2, x29, 183 + ldrh w1, [x0, 10] + ldr w0, [x28, x24, lsl 2] + sub w1, w1, #1 + add w0, w25, w0 + add w1, w1, w0 + mov w0, w27 + bl FlashReadSpare +.L1260: + ldr x1, [x26, 104] + ldrb w0, [x1, 7] + cmp w0, 1 + ccmp w0, 8, 4, ne + ldrb w0, [x29, 182] + beq .L1261 + ldrb w1, [x1, 18] + cmp w1, 12 + bne .L1262 +.L1261: + cbz w0, .L1283 + ldrb w0, [x29, 183] + cmp w0, 0 + cset w0, eq +.L1263: + ldr x1, [x29, 112] + tbz x1, 2, .L1264 + ldr w1, [x28, x24, lsl 2] + mov w0, w27 + add w1, w25, w1 + bl SandiskProgTestBadBlock +.L1264: + cbz w0, .L1265 + ldr w2, [x29, 164] + mov w1, w19 + adrp x0, .LC27 + add x0, x0, :lo12:.LC27 + add w23, w23, 1 + and w23, w23, 65535 + bl printk + ldr x0, [x29, 144] + mov w1, 1 + ldr x4, [x26, 64] + ldrb w2, [x29, 144] + ubfx x0, x0, 5, 11 + lsl x0, x0, 2 + lsl w2, w1, w2 + ldr w1, [x4, x0] + orr w1, w1, w2 + str w1, [x4, x0] + ldr w1, [x29, 132] + ldrb w0, [x26, 3216] + mul w0, w0, w1 + cmp w23, w0 + bgt .L1266 +.L1265: + ldr w0, [x29, 164] + add w0, w0, 1 + str w0, [x29, 164] + ldr w0, [x29, 168] + add w25, w25, w0 + b .L1256 +.L1262: + cmp w0, 255 + bne .L1283 + ldrb w0, [x29, 183] + cmp w0, 255 + cset w0, ne + b .L1263 +.L1283: + mov w0, 1 + b .L1263 +.L1273: + mov w0, w25 + bl FlashTestBlk + cbz w0, .L1272 + ldr x0, [x29, 104] + mov w1, w25 + bl printk + ldr x3, [x26, 64] + ubfx x0, x25, 5, 11 + lsl x0, x0, 2 + lsl w1, w23, w25 + ldr w2, [x3, x0] + orr w1, w2, w1 + str w1, [x3, x0] + ldr w0, [x29, 172] + add w0, w0, 1 + and w0, w0, 65535 + str w0, [x29, 172] +.L1272: + add w25, w25, 1 + and w25, w25, 65535 + b .L1271 +.L1276: + mov w0, w27 + bl FlashTestBlk + cbz w0, .L1275 + ldr x0, [x29, 104] + mov w1, w27 + bl printk + ldr x3, [x23, 64] + ubfx x0, x27, 5, 11 + lsl x0, x0, 2 + lsl w1, w25, w27 + ldr w2, [x3, x0] + orr w1, w2, w1 + str w1, [x3, x0] +.L1275: + sub w27, w27, #1 + and w27, w27, 65535 + b .L1274 +.L1280: + sub w26, w26, #1 + and w26, w26, 65535 + b .L1279 +.L1255: + add w19, w19, 1 + and w19, w19, 255 + b .L1254 + .size FlashMakeFactorBbt, .-FlashMakeFactorBbt + .align 2 + .global Ftl_log2 + .type Ftl_log2, %function +Ftl_log2: + mov w2, 1 + mov w1, 0 +.L1304: + cmp w2, w0 + bls .L1305 + sub w0, w1, #1 + ret +.L1305: + add w1, w1, 1 + lsl w2, w2, 1 + and w1, w1, 65535 + b .L1304 + .size Ftl_log2, .-Ftl_log2 + .align 2 + .global FtlPrintInfo + .type FtlPrintInfo, %function +FtlPrintInfo: + ret + .size FtlPrintInfo, .-FtlPrintInfo + .align 2 + .global FtlSysBlkNumInit + .type FtlSysBlkNumInit, %function +FtlSysBlkNumInit: + and w0, w0, 65535 + mov w1, 24 + cmp w0, 24 + csel w0, w0, w1, cs + adrp x1, .LANCHOR2 + add x1, x1, :lo12:.LANCHOR2 + and w0, w0, 65535 + ldrh w2, [x1, 2276] + ldrh w3, [x1, 2286] + str w0, [x1, 2272] + mul w2, w2, w0 + sub w0, w3, w0 + strh w0, [x1, 2284] + ldr w0, [x1, 2292] + str w2, [x1, 2280] + sub w2, w0, w2 + mov w0, 0 + str w2, [x1, 2288] + ret + .size FtlSysBlkNumInit, .-FtlSysBlkNumInit + .align 2 + .global FtlConstantsInit + .type FtlConstantsInit, %function +FtlConstantsInit: + mov x7, x0 + stp x29, x30, [sp, -16]! + adrp x5, .LANCHOR2 + add x1, x5, :lo12:.LANCHOR2 + add x29, sp, 0 + ldrh w9, [x0, 8] + add x1, x1, 2304 + ldrh w2, [x0, 10] + mov x3, 0 + ldrh w0, [x0, 12] + ldrh w4, [x7, 14] + strh w9, [x1, -8] + strh w2, [x1, -6] + strh w0, [x1, -4] + strh w4, [x1, -18] +.L1309: + strb w3, [x3, x1] + add x3, x3, 1 + cmp x3, 32 + bne .L1309 + ldrh w3, [x7, 20] + ldrb w1, [x7, 15] + cmp w3, w1 + bcs .L1310 + and w11, w0, 255 + add x8, x5, :lo12:.LANCHOR2 + mul w13, w0, w2 + ubfiz w12, w11, 1, 7 + add x8, x8, 2304 + mov w3, 0 +.L1311: + cmp w3, w0 + bcs .L1313 + and w1, w3, 255 + mov w6, w3 + mov w10, 0 + b .L1314 +.L1312: + add w14, w13, w6 + strb w1, [x8, w6, uxtw] + add w15, w11, w1 + add w1, w12, w1 + add w10, w10, 1 + and w1, w1, 255 + add w6, w6, w0 + strb w15, [x8, x14] +.L1314: + cmp w10, w2 + bcc .L1312 + add w3, w3, 1 + b .L1311 +.L1313: + add x1, x5, :lo12:.LANCHOR2 + ubfiz w2, w2, 1, 15 + lsr w4, w4, 1 + strh w2, [x1, 2298] + strh w4, [x1, 2286] +.L1310: + add x1, x5, :lo12:.LANCHOR2 + mov w2, 5 + cmp w9, 1 + strh w2, [x1, 2336] + strh wzr, [x1, 2338] + bne .L1315 + strh w9, [x1, 2336] +.L1315: + add x1, x5, :lo12:.LANCHOR2 + mov w2, 4352 + strh w2, [x1, 2340] + adrp x2, .LANCHOR0+88 + ldrb w11, [x2, #:lo12:.LANCHOR0+88] + cbz w11, .L1316 + mov w2, 384 + strh w2, [x1, 2340] +.L1316: + add x4, x5, :lo12:.LANCHOR2 + ldrh w10, [x7, 16] + ldrh w8, [x7, 20] + ldrh w9, [x7, 18] + ldrh w6, [x4, 2298] + ldrh w3, [x4, 2286] + strh w10, [x4, 2344] + strh w9, [x4, 2346] + mul w6, w0, w6 + strh w8, [x4, 2350] + mul w0, w0, w3 + and w6, w6, 65535 + strh w0, [x4, 2342] + strh w6, [x4, 2276] + mul w0, w6, w10 + strh w0, [x4, 2348] + mov w0, w8 + bl Ftl_log2 + and w2, w0, 65535 + strh w0, [x4, 2352] + ubfiz w0, w8, 9, 7 + strh w0, [x4, 2354] + ubfx w0, w0, 8, 8 + strh w0, [x4, 2356] + cmp w3, 1024 + ldrh w0, [x7, 26] + strh w0, [x4, 2358] + mul w0, w6, w3 + str w0, [x4, 2292] + bls .L1317 + and w0, w3, 255 + strh w0, [x4, 2338] +.L1317: + add x1, x5, :lo12:.LANCHOR2 + ldrh w0, [x1, 2338] + sub w0, w3, w0 + mul w0, w0, w6 + mul w0, w0, w8 + mul w8, w9, w8 + mul w0, w0, w10 + asr w0, w0, 11 + str w0, [x1, 2360] + ldrh w0, [x1, 2340] + lsl w0, w0, 3 + sdiv w0, w0, w8 + and w0, w0, 65535 + cmp w0, 4 + bls .L1318 +.L1334: + strh w0, [x1, 2364] + cbz w11, .L1320 + add x0, x5, :lo12:.LANCHOR2 + mov w1, 640 + strh w1, [x0, 2340] +.L1320: + add x1, x5, :lo12:.LANCHOR2 + lsl w3, w3, 6 + cmp w6, 1 + ldrh w0, [x1, 2340] + asr w0, w0, w2 + add w2, w2, 9 + add w0, w0, 2 + strh w0, [x1, 2366] + asr w3, w3, w2 + strh w3, [x1, 2368] + and w3, w3, 65535 + mul w0, w6, w3 + add w3, w3, 8 + str w0, [x1, 2372] + ldrh w0, [x1, 2364] + udiv w0, w0, w6 + add w3, w0, w3 + beq .L1321 +.L1335: + add x4, x5, :lo12:.LANCHOR2 + str w3, [x1, 2272] + ldrh w0, [x4, 2272] + bl FtlSysBlkNumInit + ldr w0, [x4, 2272] + str w0, [x4, 2376] + ldr w0, [x4, 2288] + ldrh w1, [x4, 2344] + ldrh w3, [x4, 2350] + lsl w0, w0, 2 + ldrh w2, [x4, 2364] + ldrb w7, [x4, 1220] + str wzr, [x4, 1224] + mul w0, w0, w1 + ldrh w1, [x4, 2352] + add w1, w1, 9 + lsr w0, w0, w1 + mov w1, 2048 + add w0, w0, 2 + sdiv w1, w1, w3 + and w0, w0, 65535 + strh w0, [x4, 2380] + strh w1, [x4, 2382] + add w1, w2, 3 + strh w1, [x4, 2364] + ldr w1, [x4, 2372] + add w6, w1, 3 + str w6, [x4, 2372] + cbz w7, .L1323 + add w1, w1, 5 + add w2, w2, 4 + strh w2, [x4, 2364] +.L1336: + str w1, [x4, 2372] +.L1324: + add x5, x5, :lo12:.LANCHOR2 + ldrh w1, [x5, 2284] + strh wzr, [x5, 2384] + lsl w2, w1, 1 + lsr w1, w1, 3 + add w2, w2, 48 + add w1, w1, 4 + add w0, w2, w0, lsl 2 + add w0, w0, w1 + cmp w0, w3, lsl 9 + bcs .L1325 + mov w0, 1 + strh w0, [x5, 2384] +.L1325: + mov w0, 0 + ldp x29, x30, [sp], 16 + ret +.L1318: + mov w0, 4 + b .L1334 +.L1321: + add w3, w3, 4 + b .L1335 +.L1323: + cmp w6, 7 + bhi .L1324 + mov w1, 8 + b .L1336 + .size FtlConstantsInit, .-FtlConstantsInit + .align 2 + .global FtlMemInit + .type FtlMemInit, %function +FtlMemInit: + stp x29, x30, [sp, -64]! + mov w1, 65535 + mov w2, 1024 + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x20, .LANCHOR2 + add x0, x20, :lo12:.LANCHOR2 + stp x21, x22, [sp, 32] + add x3, x0, 2304 + str x23, [sp, 48] + add x4, x0, 2304 + add x5, x0, 2304 + strh wzr, [x0, 2386] + add x6, x0, 2304 + stp wzr, wzr, [x3, 84] + add x7, x0, 2304 + stp wzr, wzr, [x3, 92] + stp wzr, wzr, [x4, 100] + stp wzr, wzr, [x4, 108] + stp wzr, wzr, [x5, 116] + stp wzr, wzr, [x5, 124] + stp wzr, wzr, [x6, 132] + stp wzr, wzr, [x6, 140] + stp wzr, w1, [x7, 148] + mov w1, -1 + stp wzr, wzr, [x7, 156] + strh w1, [x0, 2472] + strh w1, [x0, 2474] + str wzr, [x0, 2468] + strh w1, [x0, 2476] + strh w1, [x0, 2478] + mov w1, 32 + strh w1, [x0, 2480] + mov w1, 128 + strh w1, [x0, 2482] + ldrh w1, [x0, 2350] + strh wzr, [x0, 2484] + strh wzr, [x0, 2486] + strh wzr, [x0, 2488] + sdiv w2, w2, w1 + ldrh w1, [x0, 2276] + strh wzr, [x0, 2490] + lsl w1, w1, 2 + str w2, [x0, 2492] + cmp w2, w1 + bls .L1338 + str w1, [x0, 2492] +.L1338: + add x19, x20, :lo12:.LANCHOR2 + mov w22, 56 + ldrh w0, [x19, 2348] + str wzr, [x19, 2496] + lsl w0, w0, 1 + bl ftl_malloc + ldrh w1, [x19, 2348] + str x0, [x19, 2504] + mov w0, 12 + mul w0, w1, w0 + bl ftl_malloc + ldrh w21, [x19, 2276] + str x0, [x19, 2512] + mul w21, w21, w22 + lsl w23, w21, 3 + mov w0, w23 + bl ftl_malloc + str x0, [x19, 2520] + mov w0, w21 + bl ftl_malloc + str x0, [x19, 2528] + mov w0, w23 + bl ftl_malloc + str x0, [x19, 2536] + mov w0, w21 + bl ftl_malloc + str x0, [x19, 2544] + mov w0, w21 + bl ftl_malloc + str x0, [x19, 2552] + ldr w0, [x19, 2492] + mul w0, w0, w22 + bl ftl_malloc + str x0, [x19, 2560] + ldrh w0, [x19, 2276] + ldrh w21, [x19, 2354] + lsl w0, w0, 1 + add w0, w0, 1 + str w0, [x19, 2568] + mov w0, w21 + bl ftl_malloc + str x0, [x19, 2576] + mov w0, w21 + bl ftl_malloc + str x0, [x19, 2584] + mov w0, w21 + bl ftl_malloc + str x0, [x19, 2592] + ldr w0, [x19, 2568] + mul w0, w21, w0 + bl ftl_malloc + str x0, [x19, 2600] + ldr w0, [x19, 2492] + mul w0, w21, w0 + bl ftl_malloc + str x0, [x19, 2608] + mov w0, w21 + bl ftl_malloc + str x0, [x19, 2616] + mov w0, w21 + bl ftl_malloc + str x0, [x19, 2624] + ldr w1, [x19, 2568] + mov w0, 24 + mul w0, w1, w0 + bl ftl_malloc + ldrh w21, [x19, 2356] + str x0, [x19, 2632] + ldrh w0, [x19, 2276] + mul w21, w21, w0 + mov w0, w21 + bl ftl_malloc + str x0, [x19, 2640] + lsl w0, w21, 3 + bl ftl_malloc + str x0, [x19, 2648] + ldrh w1, [x19, 2356] + ldr w0, [x19, 2568] + mul w0, w1, w0 + bl ftl_malloc + str x0, [x19, 2656] + ldrh w1, [x19, 2356] + ldr w0, [x19, 2492] + mul w0, w1, w0 + bl ftl_malloc + str x0, [x19, 2664] + ldrh w0, [x19, 2286] + ubfiz w0, w0, 1, 15 + strh w0, [x19, 2672] + and w0, w0, 65534 + bl ftl_malloc + str x0, [x19, 2680] + ldrh w0, [x19, 2672] + add x0, x0, 547 + lsr x0, x0, 9 + strh w0, [x19, 2672] + lsl w0, w0, 9 + bl ftl_malloc + ldrh w21, [x19, 2286] + str x0, [x19, 2688] + add x0, x0, 32 + str x0, [x19, 2696] + lsl w21, w21, 1 + mov w0, w21 + bl ftl_malloc + str x0, [x19, 2704] + mov w0, w21 + bl ftl_malloc + ldr w21, [x19, 2372] + str x0, [x19, 2712] + lsl w21, w21, 1 + mov w0, w21 + bl ftl_malloc + str x0, [x19, 2720] + mov w0, w21 + bl ftl_malloc + str x0, [x19, 2728] + ldrh w0, [x19, 2286] + lsr w0, w0, 3 + add w0, w0, 4 + bl ftl_malloc + adrp x1, .LANCHOR0+80 + str x0, [x1, #:lo12:.LANCHOR0+80] + ldrh w0, [x19, 2364] + lsl w0, w0, 1 + bl ftl_malloc + str x0, [x19, 2736] + ldrh w0, [x19, 2364] + lsl w0, w0, 1 + bl ftl_malloc + str x0, [x19, 2744] + ldrh w0, [x19, 2364] + lsl w0, w0, 2 + bl ftl_malloc + str x0, [x19, 2752] + ldrh w0, [x19, 2366] + lsl w0, w0, 2 + bl ftl_malloc + ldrh w2, [x19, 2366] + mov w1, 0 + str x0, [x19, 2760] + lsl w2, w2, 2 + bl ftl_memset + ldrh w21, [x19, 2380] + lsl w21, w21, 2 + mov w0, w21 + bl ftl_malloc + str x0, [x19, 2768] + mov w0, w21 + bl ftl_malloc + str x0, [x19, 2776] + ldr w0, [x19, 2372] + lsl w0, w0, 2 + bl ftl_malloc + str x0, [x19, 2784] + ldrh w0, [x19, 2382] + lsl w0, w0, 4 + bl ftl_malloc + ldrh w1, [x19, 2382] + str x0, [x19, 2792] + ldrh w0, [x19, 2354] + mul w0, w1, w0 + bl ftl_malloc + str x0, [x19, 2800] + ldrh w1, [x19, 2286] + mov w0, 6 + mul w0, w1, w0 + bl ftl_malloc + str x0, [x19, 2808] + ldrh w0, [x19, 2342] + ldrh w1, [x19, 2298] + add w0, w0, 31 + asr w0, w0, 5 + strh w0, [x19, 2816] + mul w0, w1, w0 + lsl w0, w0, 2 + bl ftl_malloc + ldrh w3, [x19, 2816] + add x4, x19, 2864 + ldrh w5, [x19, 2298] + mov w1, w3 + str x0, [x19, 2856] + mov x0, 1 +.L1339: + cmp w0, w5 + bcc .L1340 + mov w1, 8 + add x3, x20, :lo12:.LANCHOR2 + sub w1, w1, w0 + add x3, x3, 2824 + add x1, x1, 1 + mov x2, 0 +.L1341: + add x2, x2, 1 + cmp x2, x1 + bne .L1342 + add x0, x20, :lo12:.LANCHOR2 + ldr x1, [x0, 2720] + cbnz x1, .L1343 +.L1345: + adrp x1, .LANCHOR3 + add x1, x1, :lo12:.LANCHOR3 + add x1, x1, 136 + adrp x0, .LC31 + add x0, x0, :lo12:.LC31 + bl printk + mov w0, -1 +.L1337: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldr x23, [sp, 48] + ldp x29, x30, [sp], 64 + ret +.L1340: + ldr x2, [x19, 2856] + add w0, w0, 1 + add x2, x2, w1, uxtw 2 + add w1, w1, w3 + str x2, [x4], 8 + b .L1339 +.L1342: + add x4, x0, x2 + add x4, x3, x4, lsl 3 + str xzr, [x4, 24] + b .L1341 +.L1343: + ldr x1, [x0, 2728] + cbz x1, .L1345 + ldr x1, [x0, 2768] + cbz x1, .L1345 + ldr x1, [x0, 2784] + cbz x1, .L1345 + ldr x1, [x0, 2792] + cbz x1, .L1345 + ldr x1, [x0, 2800] + cbz x1, .L1345 + ldr x1, [x0, 2808] + cbz x1, .L1345 + ldr x1, [x0, 2856] + cbz x1, .L1345 + ldr x0, [x0, 2712] + cbz x0, .L1345 + add x0, x20, :lo12:.LANCHOR2 + ldr x1, [x0, 2504] + cbz x1, .L1345 + ldr x1, [x0, 2512] + cbz x1, .L1345 + ldr x1, [x0, 2520] + cbz x1, .L1345 + ldr x1, [x0, 2536] + cbz x1, .L1345 + ldr x1, [x0, 2544] + cbz x1, .L1345 + ldr x1, [x0, 2552] + cbz x1, .L1345 + ldr x1, [x0, 2528] + cbz x1, .L1345 + ldr x1, [x0, 2576] + cbz x1, .L1345 + ldr x1, [x0, 2584] + cbz x1, .L1345 + ldr x0, [x0, 2592] + cbz x0, .L1345 + add x0, x20, :lo12:.LANCHOR2 + ldr x1, [x0, 2600] + cbz x1, .L1345 + ldr x1, [x0, 2616] + cbz x1, .L1345 + ldr x1, [x0, 2624] + cbz x1, .L1345 + ldr x1, [x0, 2632] + cbz x1, .L1345 + ldr x1, [x0, 2640] + cbz x1, .L1345 + ldr x1, [x0, 2648] + cbz x1, .L1345 + ldr x1, [x0, 2656] + cbz x1, .L1345 + ldr x1, [x0, 2696] + cbz x1, .L1345 + ldr x1, [x0, 2680] + cbz x1, .L1345 + ldr x0, [x0, 2736] + cbz x0, .L1345 + adrp x0, .LANCHOR2 + add x0, x0, :lo12:.LANCHOR2 + ldr x1, [x0, 2744] + cbz x1, .L1345 + ldr x1, [x0, 2752] + cbz x1, .L1345 + ldr x0, [x0, 2760] + cbz x0, .L1345 + mov w0, 0 + b .L1337 + .size FtlMemInit, .-FtlMemInit + .align 2 + .global IsBlkInVendorPart + .type IsBlkInVendorPart, %function +IsBlkInVendorPart: + adrp x1, .LANCHOR2 + add x1, x1, :lo12:.LANCHOR2 + and w0, w0, 65535 + ldrh w2, [x1, 2920] + cbz w2, .L1444 + ldrh w2, [x1, 2364] + ldr x3, [x1, 2736] + mov x1, 0 +.L1442: + cmp w2, w1, uxth + bhi .L1443 +.L1444: + mov w0, 0 + ret +.L1443: + add x1, x1, 1 + add x4, x3, x1, lsl 1 + ldrh w4, [x4, -2] + cmp w4, w0 + bne .L1442 + mov w0, 1 + ret + .size IsBlkInVendorPart, .-IsBlkInVendorPart + .align 2 + .global FtlCacheMetchLpa + .type FtlCacheMetchLpa, %function +FtlCacheMetchLpa: + adrp x2, .LANCHOR2 + add x2, x2, :lo12:.LANCHOR2 + ldr w4, [x2, 2496] + cbz w4, .L1451 + mov x5, 24 + mov w6, 56 + ldr x2, [x2, 2560] + nop // between mem op and mult-accumulate + umaddl x4, w4, w6, x5 + add x3, x2, 24 + add x2, x2, x4 +.L1448: + cmp x3, x2 + bne .L1450 +.L1451: + mov w0, 0 + ret +.L1450: + ldr w4, [x3] + cmp w4, w0 + bcc .L1449 + cmp w4, w1 + bls .L1452 +.L1449: + add x3, x3, 56 + b .L1448 +.L1452: + mov w0, 1 + ret + .size FtlCacheMetchLpa, .-FtlCacheMetchLpa + .align 2 + .global FtlGetCap + .type FtlGetCap, %function +FtlGetCap: + adrp x0, .LANCHOR2+1224 + ldr w0, [x0, #:lo12:.LANCHOR2+1224] + ret + .size FtlGetCap, .-FtlGetCap + .align 2 + .global FtlGetCapacity + .type FtlGetCapacity, %function +FtlGetCapacity: + adrp x0, .LANCHOR2+1224 + ldr w0, [x0, #:lo12:.LANCHOR2+1224] + ret + .size FtlGetCapacity, .-FtlGetCapacity + .align 2 + .global ftl_get_density + .type ftl_get_density, %function +ftl_get_density: + adrp x0, .LANCHOR2+1224 + ldr w0, [x0, #:lo12:.LANCHOR2+1224] + ret + .size ftl_get_density, .-ftl_get_density + .align 2 + .global FtlGetLpn + .type FtlGetLpn, %function +FtlGetLpn: + adrp x0, .LANCHOR2+2924 + ldr w0, [x0, #:lo12:.LANCHOR2+2924] + ret + .size FtlGetLpn, .-FtlGetLpn + .align 2 + .global FtlBbmMapBadBlock + .type FtlBbmMapBadBlock, %function +FtlBbmMapBadBlock: + stp x29, x30, [sp, -32]! + and w1, w0, 65535 + mov w4, 1 + add x29, sp, 0 + str x19, [sp, 16] + adrp x19, .LANCHOR2 + add x19, x19, :lo12:.LANCHOR2 + ldrh w0, [x19, 2342] + add x19, x19, 2824 + udiv w3, w1, w0 + and w2, w3, 65535 + msub w3, w3, w0, w1 + add x0, x19, w2, uxth 3 + and w3, w3, 65535 + ldr x0, [x0, 32] + ubfx x5, x3, 5, 11 + lsl x5, x5, 2 + lsl w4, w4, w3 + ldr w6, [x0, x5] + orr w4, w4, w6 + str w4, [x0, x5] + adrp x0, .LC32 + add x0, x0, :lo12:.LC32 + bl printk + ldrh w0, [x19, 6] + add w0, w0, 1 + strh w0, [x19, 6] + mov w0, 0 + ldr x19, [sp, 16] + ldp x29, x30, [sp], 32 + ret + .size FtlBbmMapBadBlock, .-FtlBbmMapBadBlock + .align 2 + .global FtlBbmIsBadBlock + .type FtlBbmIsBadBlock, %function +FtlBbmIsBadBlock: + adrp x2, .LANCHOR2 + add x3, x2, :lo12:.LANCHOR2 + and w0, w0, 65535 + ldrh w1, [x3, 2342] + udiv w2, w0, w1 + msub w0, w2, w1, w0 + add x2, x3, w2, uxth 3 + and w0, w0, 65535 + ldr x1, [x2, 2856] + ubfx x3, x0, 5, 11 + ldr w1, [x1, x3, lsl 2] + lsr w0, w1, w0 + and w0, w0, 1 + ret + .size FtlBbmIsBadBlock, .-FtlBbmIsBadBlock + .align 2 + .global FtlBbtInfoPrint + .type FtlBbtInfoPrint, %function +FtlBbtInfoPrint: + ret + .size FtlBbtInfoPrint, .-FtlBbtInfoPrint + .align 2 + .global FtlBbt2Bitmap + .type FtlBbt2Bitmap, %function +FtlBbt2Bitmap: + stp x29, x30, [sp, -48]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x19, .LANCHOR2 + add x19, x19, :lo12:.LANCHOR2 + mov x20, x1 + str x21, [sp, 32] + mov w1, 0 + mov x21, x0 + mov x0, x20 + ldrh w2, [x19, 2816] + lsl w2, w2, 2 + bl ftl_memset + mov x1, 0 + mov w5, 65535 + mov w4, 1 +.L1463: + ldrh w0, [x21, x1] + cmp w0, w5 + beq .L1461 + ubfx x2, x0, 5, 11 + lsl w0, w4, w0 + lsl x2, x2, 2 + add x1, x1, 2 + cmp x1, 1024 + ldr w3, [x20, x2] + orr w0, w3, w0 + str w0, [x20, x2] + ldrh w0, [x19, 2830] + add w0, w0, 1 + strh w0, [x19, 2830] + bne .L1463 +.L1461: + ldp x19, x20, [sp, 16] + ldr x21, [sp, 32] + ldp x29, x30, [sp], 48 + ret + .size FtlBbt2Bitmap, .-FtlBbt2Bitmap + .align 2 + .global FtlBbmTblFlush + .type FtlBbmTblFlush, %function +FtlBbmTblFlush: + stp x29, x30, [sp, -80]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + stp x25, x26, [sp, 64] + adrp x25, .LANCHOR2 + add x19, x25, :lo12:.LANCHOR2 + stp x21, x22, [sp, 32] + stp x23, x24, [sp, 48] + ldr w0, [x19, 2928] + cbnz w0, .L1469 + ldr x2, [x19, 2640] + mov w1, 0 + ldr x0, [x19, 2576] + add x21, x19, 2856 + str x2, [x19, 2952] + mov w20, 0 + ldrh w2, [x19, 2354] + str x0, [x19, 2944] + bl ftl_memset +.L1470: + ldrh w0, [x19, 2298] + add x1, x19, 2936 + cmp w20, w0 + blt .L1471 + ldr x26, [x1, 16] + mov w2, 16 + mov w1, 255 + adrp x23, .LC33 + mov x0, x26 + bl ftl_memset + mov w0, -3887 + add x25, x25, :lo12:.LANCHOR2 + strh w0, [x26] + add x0, x19, 2824 + add x23, x23, :lo12:.LC33 + mov w21, 0 + ldr w1, [x19, 2832] + mov w22, 0 + str w1, [x26, 4] + adrp x24, .LC34 + ldrh w1, [x19, 2824] + strh w1, [x26, 2] + ldrh w1, [x19, 2828] + strh w1, [x26, 8] + ldrh w1, [x19, 2830] + strh w1, [x26, 10] + ldr w1, [x19, 2272] + mov x19, x0 + strh w1, [x26, 12] +.L1472: + ldr x0, [x25, 2576] + str x0, [x25, 2944] + ldr x0, [x25, 2640] + str x0, [x25, 2952] + ldrh w1, [x19] + ldrh w2, [x19, 2] + ldrh w3, [x19, 4] + ldrh w4, [x26, 10] + orr w0, w2, w1, lsl 10 + str wzr, [x25, 2936] + str w0, [x25, 2940] + mov x0, x23 + bl printk + ldrh w0, [x25, 2346] + ldrh w1, [x19, 2] + sub w0, w0, #1 + cmp w1, w0 + blt .L1473 + ldr w0, [x19, 8] + mov w2, 1 + ldrh w1, [x19] + add w0, w0, 1 + str w0, [x19, 8] + str w0, [x26, 4] + strh w1, [x26, 8] + ldrh w0, [x19, 4] + strh w1, [x19, 4] + ldr x1, [x25, 2544] + strh w0, [x19] + lsl w0, w0, 10 + str w0, [x25, 2940] + strh wzr, [x19, 2] + str w0, [x1, 4] + mov w1, w2 + ldr x0, [x25, 2544] + bl FlashEraseBlocks +.L1473: + add x20, x25, 2936 + mov w3, 1 + mov x0, x20 + mov w2, w3 + mov w1, w3 + bl FlashProgPages + ldrh w0, [x19, 2] + add w0, w0, 1 + strh w0, [x19, 2] + ldr w0, [x25, 2936] + cmn w0, #1 + bne .L1474 + ldr w1, [x25, 2940] + add w21, w21, 1 + add x0, x24, :lo12:.LC34 + and w21, w21, 65535 + bl printk + cmp w21, 3 + bls .L1472 + ldr w1, [x25, 2940] + mov w2, w21 + adrp x0, .LC35 + add x0, x0, :lo12:.LC35 + bl printk + mov w0, 1 + str w0, [x25, 2928] +.L1469: + mov w0, 0 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x29, x30, [sp], 80 + ret +.L1471: + ldrh w2, [x19, 2816] + ldr x0, [x1, 8] + ldr x1, [x21], 8 + mul w3, w2, w20 + lsl w2, w2, 2 + add w20, w20, 1 + add x0, x0, w3, sxtw 2 + bl ftl_memcpy + b .L1470 +.L1477: + mov w22, 1 + b .L1472 +.L1474: + add w22, w22, 1 + cmp w22, 1 + ble .L1477 + cmp w0, 256 + bne .L1469 + b .L1472 + .size FtlBbmTblFlush, .-FtlBbmTblFlush + .align 2 + .global FtlLoadFactoryBbt + .type FtlLoadFactoryBbt, %function +FtlLoadFactoryBbt: + stp x29, x30, [sp, -80]! + adrp x0, .LANCHOR2 + add x0, x0, :lo12:.LANCHOR2 + add x29, sp, 0 + stp x21, x22, [sp, 32] + add x22, x0, 2836 + stp x25, x26, [sp, 64] + mov w21, 0 + stp x19, x20, [sp, 16] + mov x19, x0 + stp x23, x24, [sp, 48] + add x23, x0, 2936 + mov x25, x23 + mov w26, 61664 + ldr x1, [x0, 2576] + ldr x24, [x0, 2640] + stp x1, x24, [x23, 8] +.L1483: + ldrh w0, [x19, 2298] + cmp w21, w0 + bcc .L1488 + mov w0, 0 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x29, x30, [sp], 80 + ret +.L1488: + ldrh w20, [x19, 2342] + mov w0, -1 + strh w0, [x22] +.L1485: + ldrh w0, [x19, 2342] + sub w20, w20, #1 + and w20, w20, 65535 + sub w1, w0, #16 + cmp w20, w1 + ble .L1486 + madd w0, w0, w21, w20 + mov w2, 1 + mov w1, w2 + lsl w0, w0, 10 + str w0, [x25, 4] + mov x0, x23 + bl FlashReadPages + ldr w0, [x25] + cmn w0, #1 + beq .L1485 + ldrh w0, [x24] + cmp w0, w26 + bne .L1485 + strh w20, [x22] +.L1486: + add w21, w21, 1 + add x22, x22, 2 + b .L1483 + .size FtlLoadFactoryBbt, .-FtlLoadFactoryBbt + .align 2 + .global FtlBbtMemInit + .type FtlBbtMemInit, %function +FtlBbtMemInit: + stp x29, x30, [sp, -16]! + adrp x0, .LANCHOR2 + add x0, x0, :lo12:.LANCHOR2 + mov w1, -1 + add x29, sp, 0 + mov w2, 16 + add x0, x0, 2836 + strh w1, [x0, -12] + mov w1, 255 + strh wzr, [x0, -6] + bl ftl_memset + ldp x29, x30, [sp], 16 + ret + .size FtlBbtMemInit, .-FtlBbtMemInit + .align 2 + .global FtlBbtCalcTotleCnt + .type FtlBbtCalcTotleCnt, %function +FtlBbtCalcTotleCnt: + adrp x0, .LANCHOR2 + add x0, x0, :lo12:.LANCHOR2 + mov w4, 0 + mov w5, 0 + ldrh w6, [x0, 2342] + ldrh w0, [x0, 2298] + mul w6, w6, w0 + cmp w4, w6 + blt .L1505 + mov w0, w5 + ret +.L1505: + stp x29, x30, [sp, -16]! + add x29, sp, 0 +.L1498: + mov w0, w4 + bl FtlBbmIsBadBlock + cbz w0, .L1497 + add w5, w5, 1 + and w5, w5, 65535 +.L1497: + add w4, w4, 1 + and w4, w4, 65535 + cmp w4, w6 + blt .L1498 + mov w0, w5 + ldp x29, x30, [sp], 16 + ret + .size FtlBbtCalcTotleCnt, .-FtlBbtCalcTotleCnt + .align 2 + .global FtlMakeBbt + .type FtlMakeBbt, %function +FtlMakeBbt: + stp x29, x30, [sp, -96]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x19, .LANCHOR2 + add x20, x19, :lo12:.LANCHOR2 + stp x21, x22, [sp, 32] + stp x23, x24, [sp, 48] + stp x25, x26, [sp, 64] + stp x27, x28, [sp, 80] + ldr w24, [x20, 2928] + cbnz w24, .L1507 + mov x21, x19 + add x26, x20, 2856 + add x25, x20, 2836 + mov x19, x20 + add x20, x20, 2936 + mov w28, -3872 + bl FtlBbtMemInit + bl FtlLoadFactoryBbt +.L1508: + ldrh w0, [x19, 2298] + cmp w24, w0 + bcc .L1514 + add x20, x21, :lo12:.LANCHOR2 + mov w19, 0 +.L1515: + ldrh w0, [x20, 2358] + cmp w0, w19 + bhi .L1516 + add x20, x20, 2824 + ldrh w19, [x20, 12] + mov w22, 65535 + sub w19, w19, #1 + and w19, w19, 65535 +.L1517: + ldrh w0, [x20, 12] + sub w0, w0, #48 + cmp w19, w0 + ble .L1521 + mov w0, w19 + bl FtlBbmIsBadBlock + cmp w0, 1 + beq .L1518 + mov w0, w19 + bl FlashTestBlk + cbz w0, .L1519 + mov w0, w19 + bl FtlBbmMapBadBlock +.L1518: + sub w19, w19, #1 + and w19, w19, 65535 + b .L1517 +.L1514: + ldr x0, [x19, 2576] + mov w2, 65535 + ldr x27, [x19, 2640] + ldrh w1, [x25] + stp x0, x27, [x20, 8] + cmp w1, w2 + beq .L1509 + ldrh w23, [x19, 2342] + mov w2, 1 + madd w23, w23, w24, w1 + mov w1, w2 + lsl w0, w23, 10 + str w0, [x20, 4] + mov x0, x20 + bl FlashReadPages + ldr x1, [x20, 8] + ldr x0, [x26] + ldrh w2, [x19, 2342] + add w2, w2, 7 + lsr w2, w2, 3 + bl ftl_memcpy +.L1510: + mov w0, w23 + add w24, w24, 1 + bl FtlBbmMapBadBlock + add x26, x26, 8 + add x25, x25, 2 + b .L1508 +.L1509: + mov w1, w24 + bl FlashGetBadBlockList + ldr x0, [x20, 8] + ldr x1, [x26] + bl FtlBbt2Bitmap + ldrh w22, [x19, 2342] +.L1512: + sub w22, w22, #1 + and w22, w22, 65535 +.L1511: + ldrh w0, [x19, 2342] + madd w0, w24, w0, w22 + bl FtlBbmIsBadBlock + cmp w0, 1 + beq .L1512 + ldr x0, [x19, 2640] + mov w2, 16 + strh w22, [x25] + mov w1, 0 + bl ftl_memset + strh w28, [x27] + str wzr, [x27, 4] + ldrh w23, [x19, 2342] + ldrh w0, [x25] + strh w0, [x27, 2] + ldrh w2, [x19, 2816] + ldrh w0, [x25] + ldr x1, [x26] + lsl w2, w2, 2 + madd w23, w23, w24, w0 + lsl w0, w23, 10 + str w0, [x20, 4] + ldr x0, [x20, 8] + bl ftl_memcpy + mov w2, 1 + mov x0, x20 + mov w1, w2 + bl FlashEraseBlocks + mov w3, 1 + mov x0, x20 + mov w2, w3 + mov w1, w3 + bl FlashProgPages + ldr w0, [x20] + cmn w0, #1 + bne .L1510 + mov w0, w23 + bl FtlBbmMapBadBlock + b .L1511 +.L1516: + mov w0, w19 + add w19, w19, 1 + bl FtlBbmMapBadBlock + and w19, w19, 65535 + b .L1515 +.L1519: + ldrh w0, [x20] + cmp w0, w22 + bne .L1520 + strh w19, [x20] + b .L1518 +.L1520: + strh w19, [x20, 4] +.L1521: + add x21, x21, :lo12:.LANCHOR2 + mov w2, 2 + ldr x1, [x21, 2544] + ldrh w0, [x21, 2824] + str wzr, [x21, 2832] + strh wzr, [x21, 2826] + lsl w0, w0, 10 + str w0, [x1, 4] + ldr x0, [x21, 2544] + ldrh w1, [x21, 2828] + lsl w1, w1, 10 + str w1, [x0, 60] + mov w1, 1 + bl FlashEraseBlocks + ldrh w0, [x21, 2824] + bl FtlBbmMapBadBlock + ldrh w0, [x21, 2828] + bl FtlBbmMapBadBlock + bl FtlBbmTblFlush + strh wzr, [x21, 2826] + ldr w0, [x21, 2832] + ldrh w1, [x21, 2828] + add w0, w0, 1 + str w0, [x21, 2832] + ldrh w0, [x21, 2824] + strh w0, [x21, 2828] + strh w1, [x21, 2824] + bl FtlBbmTblFlush +.L1507: + mov w0, 0 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 96 + ret + .size FtlMakeBbt, .-FtlMakeBbt + .align 2 + .global V2P_block + .type V2P_block, %function +V2P_block: + adrp x4, .LANCHOR2 + add x4, x4, :lo12:.LANCHOR2 + and w0, w0, 65535 + and w1, w1, 65535 + ldrh w2, [x4, 2300] + ldrh w4, [x4, 2342] + udiv w3, w0, w2 + msub w0, w3, w2, w0 + madd w2, w2, w1, w0 + madd w0, w3, w4, w2 + ret + .size V2P_block, .-V2P_block + .align 2 + .global P2V_plane + .type P2V_plane, %function +P2V_plane: + adrp x2, .LANCHOR2 + add x2, x2, :lo12:.LANCHOR2 + and w3, w0, 65535 + ldrh w1, [x2, 2300] + ldrh w2, [x2, 2342] + udiv w0, w3, w1 + udiv w2, w3, w2 + msub w0, w0, w1, w3 + madd w0, w1, w2, w0 + ret + .size P2V_plane, .-P2V_plane + .align 2 + .global P2V_block_in_plane + .type P2V_block_in_plane, %function +P2V_block_in_plane: + adrp x1, .LANCHOR2 + add x1, x1, :lo12:.LANCHOR2 + and w3, w0, 65535 + ldrh w2, [x1, 2342] + ldrh w1, [x1, 2300] + udiv w0, w3, w2 + msub w0, w0, w2, w3 + and w0, w0, 65535 + udiv w0, w0, w1 + ret + .size P2V_block_in_plane, .-P2V_block_in_plane + .align 2 + .global ftl_cmp_data_ver + .type ftl_cmp_data_ver, %function +ftl_cmp_data_ver: + cmp w0, w1 + mov w2, -2147483648 + bls .L1531 + sub w1, w0, w1 + cmp w1, w2 + cset w0, ls + ret +.L1531: + sub w1, w1, w0 + cmp w1, w2 + cset w0, hi + ret + .size ftl_cmp_data_ver, .-ftl_cmp_data_ver + .align 2 + .global FtlGetLastWrittenPage + .type FtlGetLastWrittenPage, %function +FtlGetLastWrittenPage: + stp x29, x30, [sp, -192]! + cmp w1, 1 + add x29, sp, 0 + stp x23, x24, [sp, 48] + mov w23, w1 + stp x19, x20, [sp, 16] + adrp x1, .LANCHOR2 + stp x21, x22, [sp, 32] + add x1, x1, :lo12:.LANCHOR2 + bne .L1534 + ldrh w19, [x1, 2346] +.L1535: + sub w19, w19, #1 + lsl w21, w0, 10 + sxth w19, w19 + add x1, x29, 128 + orr w0, w19, w21 + stp xzr, x1, [x29, 80] + str w0, [x29, 76] + mov w2, w23 + mov w1, 1 + add x0, x29, 72 + bl FlashReadPages + ldr w0, [x29, 128] + cmn w0, #1 + bne .L1536 + mov w22, 0 + mov w24, 2 +.L1537: + cmp w22, w19 + ble .L1540 +.L1536: + mov w0, w19 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x29, x30, [sp], 192 + ret +.L1534: + ldrh w19, [x1, 2344] + b .L1535 +.L1540: + add w20, w22, w19 + mov w2, w23 + mov w1, 1 + sdiv w20, w20, w24 + sxth w0, w20 + orr w0, w0, w21 + str w0, [x29, 76] + add x0, x29, 72 + bl FlashReadPages + ldr w0, [x29, 128] + cmn w0, #1 + bne .L1538 + ldr w0, [x29, 132] + cmn w0, #1 + bne .L1538 + ldr w0, [x29, 72] + cmn w0, #1 + beq .L1538 + sub w19, w20, #1 + sxth w19, w19 + b .L1537 +.L1538: + add w20, w20, 1 + sxth w22, w20 + b .L1537 + .size FtlGetLastWrittenPage, .-FtlGetLastWrittenPage + .align 2 + .global FtlLoadBbt + .type FtlLoadBbt, %function +FtlLoadBbt: + stp x29, x30, [sp, -64]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x19, .LANCHOR2 + stp x23, x24, [sp, 48] + add x23, x19, :lo12:.LANCHOR2 + stp x21, x22, [sp, 32] + add x21, x23, 2936 + mov w24, 61649 + ldr x0, [x23, 2576] + ldr x22, [x23, 2640] + stp x0, x22, [x21, 8] + bl FtlBbtMemInit + ldrh w20, [x23, 2342] + sub w20, w20, #1 + and w20, w20, 65535 +.L1546: + ldrh w0, [x23, 2342] + sub w0, w0, #48 + cmp w20, w0 + ble .L1549 + lsl w0, w20, 10 + mov w2, 1 + str w0, [x21, 4] + mov w1, w2 + mov x0, x21 + bl FlashReadPages + ldr w0, [x21] + cmn w0, #1 + bne .L1547 + ldr w0, [x21, 4] + mov w2, 1 + mov w1, w2 + add w0, w0, 1 + str w0, [x21, 4] + mov x0, x21 + bl FlashReadPages +.L1547: + ldr w0, [x21] + cmn w0, #1 + beq .L1548 + ldrh w0, [x22] + cmp w0, w24 + bne .L1548 + ldr w1, [x22, 4] + str w1, [x23, 2832] + strh w20, [x23, 2824] + ldrh w1, [x22, 8] + strh w1, [x23, 2828] +.L1549: + add x21, x19, :lo12:.LANCHOR2 + mov w0, 65535 + ldrh w1, [x21, 2824] + cmp w1, w0 + beq .L1563 + ldrh w1, [x21, 2828] + cmp w1, w0 + beq .L1553 + add x0, x21, 2936 + lsl w1, w1, 10 + mov w2, 1 + str w1, [x0, 4] + mov w1, w2 + bl FlashReadPages + ldr w0, [x21, 2936] + cmn w0, #1 + beq .L1553 + ldrh w1, [x22] + mov w0, 61649 + cmp w1, w0 + bne .L1553 + ldr w1, [x21, 2832] + ldr w0, [x22, 4] + cmp w0, w1 + bls .L1553 + str w0, [x21, 2832] + ldrh w1, [x21, 2828] + ldrh w0, [x22, 8] + strh w1, [x21, 2824] + strh w0, [x21, 2828] +.L1553: + add x20, x19, :lo12:.LANCHOR2 + mov w1, 1 + add x23, x20, 2936 + mov w24, 61649 + ldrh w0, [x20, 2824] + bl FtlGetLastWrittenPage + sxth w21, w0 + add w0, w0, 1 + strh w0, [x20, 2826] +.L1555: + tbnz w21, #31, .L1560 + ldrh w0, [x20, 2824] + mov w2, 1 + mov w1, w2 + orr w0, w21, w0, lsl 10 + str w0, [x23, 4] + ldr x0, [x20, 2576] + str x0, [x23, 8] + mov x0, x23 + bl FlashReadPages + ldr w0, [x23] + cmn w0, #1 + beq .L1556 + ldrh w0, [x22] + cmp w0, w24 + bne .L1556 +.L1560: + add x1, x19, :lo12:.LANCHOR2 + ldrh w0, [x22, 10] + mov w2, 65535 + strh w0, [x1, 2830] + ldrh w0, [x22, 12] + cmp w0, w2 + bne .L1557 +.L1558: + add x19, x19, :lo12:.LANCHOR2 + mov w20, 0 + add x21, x19, 2856 +.L1561: + ldrh w0, [x19, 2298] + cmp w20, w0 + bcc .L1562 + mov w0, 0 +.L1545: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x29, x30, [sp], 64 + ret +.L1548: + sub w20, w20, #1 + and w20, w20, 65535 + b .L1546 +.L1556: + sub w21, w21, #1 + sxth w21, w21 + b .L1555 +.L1557: + ldr w2, [x1, 2272] + cmp w0, w2 + beq .L1558 + ldrh w1, [x1, 2286] + lsr w1, w1, 2 + cmp w2, w1 + bcs .L1558 + cmp w0, w1 + bcs .L1558 + bl FtlSysBlkNumInit + b .L1558 +.L1562: + ldrh w2, [x19, 2816] + ldr x0, [x19, 2944] + mul w1, w2, w20 + lsl w2, w2, 2 + add w20, w20, 1 + add x1, x0, x1, lsl 2 + ldr x0, [x21], 8 + bl ftl_memcpy + b .L1561 +.L1563: + mov w0, -1 + b .L1545 + .size FtlLoadBbt, .-FtlLoadBbt + .align 2 + .global FtlFreeSysBlkQueueInit + .type FtlFreeSysBlkQueueInit, %function +FtlFreeSysBlkQueueInit: + stp x29, x30, [sp, -16]! + adrp x3, .LANCHOR2 + add x3, x3, :lo12:.LANCHOR2 + mov w2, 2048 + add x29, sp, 0 + mov w1, 0 + strh w0, [x3, 2992] + add x0, x3, 3000 + strh wzr, [x3, 2994] + strh wzr, [x3, 2996] + strh wzr, [x3, 2998] + bl ftl_memset + mov w0, 0 + ldp x29, x30, [sp], 16 + ret + .size FtlFreeSysBlkQueueInit, .-FtlFreeSysBlkQueueInit + .align 2 + .global FtlFreeSysBlkQueueEmpty + .type FtlFreeSysBlkQueueEmpty, %function +FtlFreeSysBlkQueueEmpty: + adrp x0, .LANCHOR2+2998 + ldrh w0, [x0, #:lo12:.LANCHOR2+2998] + cmp w0, 0 + cset w0, eq + ret + .size FtlFreeSysBlkQueueEmpty, .-FtlFreeSysBlkQueueEmpty + .align 2 + .global FtlFreeSysBlkQueueFull + .type FtlFreeSysBlkQueueFull, %function +FtlFreeSysBlkQueueFull: + adrp x0, .LANCHOR2+2998 + ldrh w0, [x0, #:lo12:.LANCHOR2+2998] + cmp w0, 1024 + cset w0, eq + ret + .size FtlFreeSysBlkQueueFull, .-FtlFreeSysBlkQueueFull + .align 2 + .global FtlFreeSysBlkQueueIn + .type FtlFreeSysBlkQueueIn, %function +FtlFreeSysBlkQueueIn: + stp x29, x30, [sp, -48]! + add x29, sp, 0 + stp x21, x22, [sp, 32] + and w21, w0, 65535 + stp x19, x20, [sp, 16] + sub w2, w21, #1 + mov w0, 65533 + cmp w0, w2, uxth + bcc .L1578 + adrp x0, .LANCHOR2 + add x20, x0, :lo12:.LANCHOR2 + mov x19, x0 + ldrh w2, [x20, 2998] + cmp w2, 1024 + beq .L1578 + and w1, w1, 65535 + cbz w1, .L1580 + ldr w0, [x20, 2928] + cbnz w0, .L1580 + mov w0, w21 + bl P2V_block_in_plane + and w22, w0, 65535 + ldr x0, [x20, 2544] + lsl w1, w21, 10 + mov w2, 1 + str w1, [x0, 4] + mov w1, w2 + ldr x0, [x20, 2544] + bl FlashEraseBlocks + ldr x2, [x20, 2696] + ubfiz x0, x22, 1, 16 + ldrh w1, [x2, x0] + add w1, w1, 1 + strh w1, [x2, x0] + ldr w0, [x20, 2436] + add w0, w0, 1 + str w0, [x20, 2436] +.L1580: + add x0, x19, :lo12:.LANCHOR2 + add x0, x0, 2992 + ldrh w1, [x0, 6] + add w1, w1, 1 + strh w1, [x0, 6] + ldrh w1, [x0, 4] + add x2, x0, w1, sxtw 1 + add w1, w1, 1 + and w1, w1, 1023 + strh w1, [x0, 4] + strh w21, [x2, 8] +.L1578: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x29, x30, [sp], 48 + ret + .size FtlFreeSysBlkQueueIn, .-FtlFreeSysBlkQueueIn + .align 2 + .global FtlLowFormatEraseBlock + .type FtlLowFormatEraseBlock, %function +FtlLowFormatEraseBlock: + stp x29, x30, [sp, -144]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x20, .LANCHOR2 + stp x21, x22, [sp, 32] + add x21, x20, :lo12:.LANCHOR2 + stp x25, x26, [sp, 64] + and w25, w0, 65535 + stp x23, x24, [sp, 48] + stp x27, x28, [sp, 80] + ldr w0, [x21, 2928] + cbnz w0, .L1611 + ldrb w8, [x21, 1220] + and w24, w1, 255 + ldrb w0, [x21, 2094] + add x9, x21, 2304 + mov w5, 0 + mov w23, 0 + mov w19, 0 + mov w7, 56 + mov w10, 4 + str w25, [x21, 2468] + str w0, [x29, 132] +.L1590: + ldrh w0, [x21, 2276] + cmp w0, w5 + bhi .L1594 + cbz w23, .L1588 + ldr x0, [x21, 2544] + cmp w8, 0 + cset w22, ne + strb wzr, [x21, 2094] + mov w2, w23 + mov w1, w22 + add x26, x20, :lo12:.LANCHOR2 + bl FlashEraseBlocks + ldrb w0, [x29, 132] + strb w0, [x21, 2094] + mov w21, 56 + umull x21, w23, w21 + mov x23, 0 +.L1597: + ldr x0, [x26, 2544] + add x1, x0, x23 + ldr w0, [x0, x23] + cmn w0, #1 + bne .L1596 + ldr w0, [x1, 4] + add w19, w19, 1 + and w19, w19, 65535 + lsr w0, w0, 10 + bl FtlBbmMapBadBlock +.L1596: + add x23, x23, 56 + cmp x21, x23 + bne .L1597 + cbnz w24, .L1598 + and w22, w22, 65535 + mov w0, 1 + mov w27, 6 + str w0, [x29, 136] +.L1599: + add x26, x20, :lo12:.LANCHOR2 + mov w23, 0 + add x0, x26, 2304 + mov w28, 56 + str x0, [x29, 120] +.L1607: + mov w5, 0 + mov w21, 0 + mov w7, 4 +.L1600: + ldrh w0, [x26, 2276] + cmp w0, w5 + bhi .L1603 + cbz w21, .L1588 + ldr x0, [x26, 2544] + mov w2, w22 + mov w1, w21 + strb wzr, [x26, 2094] + mov w3, 1 + bl FlashProgPages + umull x1, w21, w28 + ldrb w0, [x29, 132] + strb w0, [x26, 2094] + mov x2, 0 +.L1606: + ldr x0, [x26, 2544] + add x3, x0, x2 + ldr w0, [x0, x2] + cbz w0, .L1605 + ldr w0, [x3, 4] + add w19, w19, 1 + stp x2, x1, [x29, 104] + and w19, w19, 65535 + lsr w0, w0, 10 + bl FtlBbmMapBadBlock + ldp x2, x1, [x29, 104] +.L1605: + add x2, x2, 56 + cmp x1, x2 + bne .L1606 + add w23, w23, w27 + ldr w0, [x29, 136] + and w23, w23, 65535 + cmp w0, w23 + bhi .L1607 + add x26, x20, :lo12:.LANCHOR2 + mov x23, 0 +.L1609: + cbz w24, .L1608 + ldr x0, [x26, 2544] + add x1, x0, x23 + ldr w0, [x0, x23] + cbnz w0, .L1608 + ldr w0, [x1, 4] + mov w1, 1 + str x2, [x29, 136] + lsr w0, w0, 10 + bl FtlFreeSysBlkQueueIn + ldr x2, [x29, 136] +.L1608: + add x23, x23, 56 + cmp x23, x2 + bne .L1609 + cmp w25, 63 + ccmp w24, 0, 0, hi + beq .L1588 + add x20, x20, :lo12:.LANCHOR2 + mov w2, w21 + mov w1, w22 + ldr x0, [x20, 2544] + bl FlashEraseBlocks +.L1588: + mov w0, w19 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 144 + ret +.L1594: + umull x0, w5, w7 + ldr x1, [x21, 2544] + str wzr, [x1, x0] + mov w1, w25 + ldrb w0, [x9, w5, sxtw] + bl V2P_block + and w6, w0, 65535 + mov w11, w6 + cbz w24, .L1591 + bl IsBlkInVendorPart + cbnz w0, .L1592 +.L1591: + mov w0, w11 + bl FtlBbmIsBadBlock + cbnz w0, .L1593 + umull x2, w23, w7 + ldr x0, [x21, 2544] + lsl w6, w6, 10 + add x0, x0, x2 + str w6, [x0, 4] + ldrh w0, [x21, 2356] + ldr x1, [x21, 2544] + add x1, x1, x2 + ldr x2, [x21, 2648] + mul w0, w0, w23 + add w23, w23, 1 + and w23, w23, 65535 + sdiv w0, w0, w10 + add x0, x2, w0, sxtw 2 + stp xzr, x0, [x1, 8] +.L1592: + add w5, w5, 1 + and w5, w5, 65535 + b .L1590 +.L1593: + add w19, w19, 1 + and w19, w19, 65535 + b .L1592 +.L1598: + add x0, x20, :lo12:.LANCHOR2 + ldrh w1, [x0, 2346] + ldrb w0, [x0, 1220] + str w1, [x29, 136] + cbnz w0, .L1612 + uxtw x0, w1 + mov w22, 1 + lsr w27, w0, 2 + b .L1599 +.L1612: + mov w22, 1 + mov w27, w22 + b .L1599 +.L1603: + umull x0, w5, w28 + ldr x1, [x26, 2544] + str wzr, [x1, x0] + mov w1, w25 + ldr x0, [x29, 120] + ldrb w0, [x0, w5, sxtw] + bl V2P_block + and w6, w0, 65535 + mov w8, w6 + cbz w24, .L1601 + bl IsBlkInVendorPart + cbnz w0, .L1602 +.L1601: + mov w0, w8 + bl FtlBbmIsBadBlock + cbnz w0, .L1602 + umull x2, w21, w28 + ldr x0, [x26, 2544] + add w6, w23, w6, lsl 10 + add x0, x0, x2 + str w6, [x0, 4] + ldr x1, [x26, 2544] + ldr x0, [x26, 2616] + add x1, x1, x2 + ldr x2, [x26, 2624] + str x0, [x1, 8] + ldrh w0, [x26, 2356] + mul w0, w0, w21 + add w21, w21, 1 + and w21, w21, 65535 + sdiv w0, w0, w7 + add x0, x2, w0, sxtw 2 + str x0, [x1, 16] +.L1602: + add w5, w5, 1 + and w5, w5, 65535 + b .L1600 +.L1611: + mov w19, 0 + b .L1588 + .size FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock + .align 2 + .global FtlFreeSysBLkSort + .type FtlFreeSysBLkSort, %function +FtlFreeSysBLkSort: + adrp x0, .LANCHOR2 + add x1, x0, :lo12:.LANCHOR2 + add x1, x1, 2992 + ldrh w2, [x1, 6] + cbz w2, .L1633 + adrp x2, .LANCHOR4+724 + ldrh w3, [x1, 2] + mov w6, 0 + mov w4, 0 + ldrh w5, [x2, #:lo12:.LANCHOR4+724] + ldrh w2, [x1, 4] + and w5, w5, 31 +.L1635: + cmp w5, w4 + bgt .L1636 + cbz w6, .L1633 + add x0, x0, :lo12:.LANCHOR2 + strh w3, [x0, 2994] + strh w2, [x0, 2996] +.L1633: + ret +.L1636: + add x6, x1, w3, sxtw 1 + add w4, w4, 1 + add w3, w3, 1 + and w4, w4, 65535 + and w3, w3, 1023 + ldrh w7, [x6, 8] + add x6, x1, w2, sxtw 1 + strh w7, [x6, 8] + mov w6, 1 + add w2, w2, w6 + and w2, w2, 1023 + b .L1635 + .size FtlFreeSysBLkSort, .-FtlFreeSysBLkSort + .align 2 + .global FtlFreeSysBlkQueueOut + .type FtlFreeSysBlkQueueOut, %function +FtlFreeSysBlkQueueOut: + stp x29, x30, [sp, -64]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x19, .LANCHOR2 + add x19, x19, :lo12:.LANCHOR2 + stp x21, x22, [sp, 32] + str x23, [sp, 48] + mov x21, x19 + add x23, x19, 2992 +.L1643: + ldrh w2, [x19, 2998] + add x1, x19, 2992 + cbz w2, .L1644 + ldrh w0, [x19, 2994] + sub w2, w2, #1 + strh w2, [x19, 2998] + add x3, x1, w0, sxtw 1 + add w0, w0, 1 + and w0, w0, 1023 + strh w0, [x19, 2994] + ldr w0, [x19, 2928] + ldrh w20, [x3, 8] + cbnz w0, .L1645 + mov w0, w20 + bl P2V_block_in_plane + and w22, w0, 65535 + ldr x0, [x19, 2544] + lsl w1, w20, 10 + str w1, [x0, 4] + ldrb w0, [x19, 1220] + cbz w0, .L1646 + ldr x0, [x19, 2544] + mov w2, 1 + mov w1, 0 + bl FlashEraseBlocks +.L1646: + ldr x0, [x21, 2544] + mov w2, 1 + mov w1, w2 + bl FlashEraseBlocks + ldr x2, [x21, 2696] + ubfiz x0, x22, 1, 16 + ldrh w1, [x2, x0] + add w1, w1, 1 + strh w1, [x2, x0] + ldr w0, [x21, 2436] + add w0, w0, 1 + str w0, [x21, 2436] +.L1645: + sub w0, w20, #1 + mov w1, 65533 + cmp w1, w0, uxth + bcs .L1648 + ldrh w2, [x23, 6] + mov w1, w20 + adrp x0, .LC37 + add x0, x0, :lo12:.LC37 + bl printk + b .L1643 +.L1644: + adrp x0, .LC36 + mov w1, 0 + add x0, x0, :lo12:.LC36 + bl printk +.L1647: + b .L1647 +.L1648: + mov w0, w20 + ldr x23, [sp, 48] + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x29, x30, [sp], 64 + ret + .size FtlFreeSysBlkQueueOut, .-FtlFreeSysBlkQueueOut + .align 2 + .global test_node_in_list + .type test_node_in_list, %function +test_node_in_list: + ldr x2, [x0] + adrp x0, .LANCHOR2+2808 + mov x4, -6148914691236517206 + and w1, w1, 65535 + ldr x3, [x0, #:lo12:.LANCHOR2+2808] + movk x4, 0xaaab, lsl 0 + mov w5, 65535 + sub x0, x2, x3 + asr x0, x0, 1 + mul x0, x0, x4 + mov w4, 6 + and w0, w0, 65535 +.L1655: + cmp w0, w1 + beq .L1656 + ldrh w0, [x2] + cmp w0, w5 + beq .L1657 + umaddl x2, w0, w4, x3 + b .L1655 +.L1656: + mov w0, 1 + ret +.L1657: + mov w0, 0 + ret + .size test_node_in_list, .-test_node_in_list + .align 2 + .global insert_data_list + .type insert_data_list, %function +insert_data_list: + adrp x11, .LANCHOR2 + add x3, x11, :lo12:.LANCHOR2 + and w0, w0, 65535 + ldrh w1, [x3, 2284] + cmp w1, w0 + bls .L1674 + mov w8, 6 + ldr x13, [x3, 2808] + mov w1, -1 + adrp x2, .LANCHOR4 + umull x12, w0, w8 + add x4, x2, :lo12:.LANCHOR4 + mov x5, x2 + add x6, x13, x12 + strh w1, [x6, 2] + strh w1, [x13, x12] + ldr x1, [x4, 744] + cbnz x1, .L1661 + str x6, [x4, 744] +.L1674: + mov w0, 0 + ret +.L1661: + stp x29, x30, [sp, -32]! + ubfiz x9, x0, 1, 16 + mov w10, -1 + add x29, sp, 0 + str x19, [sp, 16] + mov w19, 65535 + ldr x15, [x3, 2712] + ldrh w2, [x6, 4] + ldr x14, [x3, 2808] + cmp w2, 0 + ldr x16, [x3, 2696] + ldrh w7, [x15, x9] + sub x4, x1, x14 + asr x4, x4, 1 + add x9, x16, x9 + ldrh w30, [x3, 2284] + mov w3, 0 + mul w7, w7, w2 + mov x2, -6148914691236517206 + movk x2, 0xaaab, lsl 0 + csel w7, w7, w10, ne + mul x4, x4, x2 + and w2, w4, 65535 +.L1669: + add w3, w3, 1 + and w3, w3, 65535 + cmp w3, w30 + bhi .L1660 + cmp w0, w2 + beq .L1660 + ubfiz x17, x2, 1, 16 + ldrh w18, [x1, 4] + cmp w18, 0 + ldrh w4, [x15, x17] + mul w4, w4, w18 + csel w4, w4, w10, ne + cmp w7, w4 + bne .L1665 + ldrh w17, [x16, x17] + ldrh w4, [x9] + cmp w17, w4 + bcc .L1667 +.L1666: + strh w2, [x13, x12] + ldrh w2, [x1, 2] + strh w2, [x6, 2] + add x2, x5, :lo12:.LANCHOR4 + ldr x3, [x2, 744] + cmp x1, x3 + bne .L1670 + strh w0, [x1, 2] + str x6, [x2, 744] + b .L1660 +.L1665: + bcc .L1666 +.L1667: + ldrh w4, [x1] + cmp w4, w19 + bne .L1668 + strh w2, [x6, 2] + add x2, x5, :lo12:.LANCHOR4 + strh w0, [x1] + str x6, [x2, 752] +.L1660: + mov w0, 0 + ldr x19, [sp, 16] + ldp x29, x30, [sp], 32 + ret +.L1668: + umaddl x1, w4, w8, x14 + mov w2, w4 + b .L1669 +.L1670: + ldrh w2, [x1, 2] + add x3, x11, :lo12:.LANCHOR2 + mov w4, 6 + ldr x3, [x3, 2808] + umull x2, w2, w4 + strh w0, [x3, x2] + strh w0, [x1, 2] + b .L1660 + .size insert_data_list, .-insert_data_list + .align 2 + .global INSERT_DATA_LIST + .type INSERT_DATA_LIST, %function +INSERT_DATA_LIST: + stp x29, x30, [sp, -16]! + add x29, sp, 0 + bl insert_data_list + adrp x0, .LANCHOR4 + add x0, x0, :lo12:.LANCHOR4 + ldrh w1, [x0, 760] + add w1, w1, 1 + strh w1, [x0, 760] + ldp x29, x30, [sp], 16 + ret + .size INSERT_DATA_LIST, .-INSERT_DATA_LIST + .align 2 + .global insert_free_list + .type insert_free_list, %function +insert_free_list: + and w0, w0, 65535 + mov w7, 65535 + cmp w0, w7 + beq .L1679 + adrp x3, .LANCHOR2 + add x10, x3, :lo12:.LANCHOR2 + mov w6, 6 + mov w1, -1 + adrp x2, .LANCHOR4 + add x11, x2, :lo12:.LANCHOR4 + ldr x9, [x10, 2808] + umull x8, w0, w6 + mov x4, x3 + mov x3, x2 + add x5, x9, x8 + strh w1, [x5, 2] + strh w1, [x9, x8] + ldr x1, [x11, 768] + cbnz x1, .L1680 + str x5, [x11, 768] +.L1679: + mov w0, 0 + ret +.L1680: + ldr x12, [x10, 2696] + ubfiz x2, x0, 1, 16 + ldr x11, [x10, 2808] + mov x10, -6148914691236517206 + movk x10, 0xaaab, lsl 0 + ldrh w13, [x12, x2] + sub x2, x1, x11 + asr x2, x2, 1 + mul x2, x2, x10 + and w2, w2, 65535 +.L1683: + ubfiz x10, x2, 1, 16 + ldrh w10, [x12, x10] + cmp w10, w13 + bcs .L1681 + ldrh w10, [x1] + cmp w10, w7 + bne .L1682 + strh w2, [x5, 2] + strh w0, [x1] + b .L1679 +.L1682: + umaddl x1, w10, w6, x11 + mov w2, w10 + b .L1683 +.L1681: + ldrh w6, [x1, 2] + strh w6, [x5, 2] + strh w2, [x9, x8] + add x2, x3, :lo12:.LANCHOR4 + ldr x3, [x2, 768] + cmp x1, x3 + bne .L1684 + strh w0, [x1, 2] + str x5, [x2, 768] + b .L1679 +.L1684: + ldrh w2, [x1, 2] + add x3, x4, :lo12:.LANCHOR2 + mov w4, 6 + ldr x3, [x3, 2808] + umull x2, w2, w4 + strh w0, [x3, x2] + strh w0, [x1, 2] + b .L1679 + .size insert_free_list, .-insert_free_list + .align 2 + .global INSERT_FREE_LIST + .type INSERT_FREE_LIST, %function +INSERT_FREE_LIST: + stp x29, x30, [sp, -16]! + add x29, sp, 0 + bl insert_free_list + adrp x0, .LANCHOR4 + add x0, x0, :lo12:.LANCHOR4 + ldrh w1, [x0, 776] + add w1, w1, 1 + strh w1, [x0, 776] + ldp x29, x30, [sp], 16 + ret + .size INSERT_FREE_LIST, .-INSERT_FREE_LIST + .align 2 + .global List_remove_node + .type List_remove_node, %function +List_remove_node: + and w1, w1, 65535 + adrp x6, .LANCHOR2 + add x6, x6, :lo12:.LANCHOR2 + mov w4, 6 + ldr x2, [x0] + mov w7, 65535 + umull x1, w1, w4 + ldr x3, [x6, 2808] + add x5, x3, x1 + cmp x5, x2 + ldrh w2, [x3, x1] + bne .L1688 + cmp w2, w7 + bne .L1689 + str xzr, [x0] +.L1690: + mov w0, -1 + strh w0, [x3, x1] + strh w0, [x5, 2] + mov w0, 0 + ret +.L1689: + umaddl x2, w2, w4, x3 + str x2, [x0] + mov w0, -1 + strh w0, [x2, 2] + b .L1690 +.L1688: + cmp w2, w7 + ldrh w0, [x5, 2] + bne .L1691 + cmp w0, w2 + beq .L1690 + umull x2, w0, w4 + mov w0, -1 + strh w0, [x3, x2] + b .L1690 +.L1691: + umaddl x2, w2, w4, x3 + strh w0, [x2, 2] + ldrh w2, [x5, 2] + ldr x0, [x6, 2808] + ldrh w7, [x3, x1] + umull x2, w2, w4 + strh w7, [x0, x2] + b .L1690 + .size List_remove_node, .-List_remove_node + .align 2 + .global List_pop_index_node + .type List_pop_index_node, %function +List_pop_index_node: + ldr x2, [x0] + cbz x2, .L1698 + stp x29, x30, [sp, -16]! + adrp x3, .LANCHOR2+2808 + and w1, w1, 65535 + mov w4, 65535 + add x29, sp, 0 + ldr x8, [x3, #:lo12:.LANCHOR2+2808] + mov w5, 6 +.L1694: + cbnz w1, .L1695 +.L1697: + sub x8, x2, x8 + mov x2, -6148914691236517206 + asr x8, x8, 1 + movk x2, 0xaaab, lsl 0 + mul x8, x8, x2 + and w8, w8, 65535 + mov w1, w8 + bl List_remove_node + mov w0, w8 + ldp x29, x30, [sp], 16 + ret +.L1695: + ldrh w3, [x2] + cmp w3, w4 + beq .L1697 + sub w1, w1, #1 + umaddl x2, w3, w5, x8 + and w1, w1, 65535 + b .L1694 +.L1698: + mov w0, 65535 + ret + .size List_pop_index_node, .-List_pop_index_node + .align 2 + .global List_get_gc_head_node + .type List_get_gc_head_node, %function +List_get_gc_head_node: + and w2, w0, 65535 + adrp x0, .LANCHOR4+744 + ldr x1, [x0, #:lo12:.LANCHOR4+744] + cbz x1, .L1708 + adrp x0, .LANCHOR2+2808 + mov w4, 6 + ldr x3, [x0, #:lo12:.LANCHOR2+2808] + mov w0, 65535 +.L1705: + cbz w2, .L1706 + ldrh w1, [x1] + cmp w1, w0 + bne .L1707 + ret +.L1707: + sub w2, w2, #1 + umaddl x1, w1, w4, x3 + and w2, w2, 65535 + b .L1705 +.L1708: + mov w0, 65535 + ret +.L1706: + sub x0, x1, x3 + mov x1, -6148914691236517206 + asr x0, x0, 1 + movk x1, 0xaaab, lsl 0 + mul x0, x0, x1 + and w0, w0, 65535 + ret + .size List_get_gc_head_node, .-List_get_gc_head_node + .align 2 + .global List_update_data_list + .type List_update_data_list, %function +List_update_data_list: + adrp x8, .LANCHOR4 + add x2, x8, :lo12:.LANCHOR4 + and w9, w0, 65535 + ldrh w0, [x2, 784] + cmp w0, w9 + beq .L1717 + ldrh w0, [x2, 832] + cmp w0, w9 + beq .L1717 + ldrh w0, [x2, 880] + cmp w0, w9 + beq .L1717 + adrp x0, .LANCHOR2 + add x0, x0, :lo12:.LANCHOR2 + mov w1, 6 + ldr x2, [x2, 744] + umull x1, w9, w1 + ldr x3, [x0, 2808] + add x4, x3, x1 + cmp x4, x2 + beq .L1717 + ldr x5, [x0, 2712] + ubfiz x0, x9, 1, 16 + ldrh w2, [x5, x0] + ldrh w0, [x4, 4] + cmp w0, 0 + mul w2, w2, w0 + ldrh w0, [x4, 2] + mov w4, 65535 + csinv w2, w2, wzr, ne + cmp w0, w4 + bne .L1712 + ldrh w1, [x3, x1] + cmp w1, w0 + beq .L1717 +.L1712: + mov w1, 6 + mov x4, -6148914691236517206 + movk x4, 0xaaab, lsl 0 + umull x0, w0, w1 + asr x1, x0, 1 + add x0, x3, x0 + mul x1, x1, x4 + ldrh w3, [x0, 4] + cmp w3, 0 + ldrh w1, [x5, x1, lsl 1] + mul w0, w1, w3 + csinv w0, w0, wzr, ne + cmp w2, w0 + bcs .L1717 + add x8, x8, :lo12:.LANCHOR4 + stp x29, x30, [sp, -16]! + mov w1, w9 + add x0, x8, 744 + add x29, sp, 0 + bl List_remove_node + ldrh w0, [x8, 760] + sub w0, w0, #1 + strh w0, [x8, 760] + mov w0, w9 + bl INSERT_DATA_LIST + mov w0, 0 + ldp x29, x30, [sp], 16 + ret +.L1717: + mov w0, 0 + ret + .size List_update_data_list, .-List_update_data_list + .align 2 + .global ftl_free_no_use_map_blk + .type ftl_free_no_use_map_blk, %function +ftl_free_no_use_map_blk: + stp x29, x30, [sp, -80]! + mov w1, 0 + add x29, sp, 0 + stp x19, x20, [sp, 16] + mov x19, x0 + stp x21, x22, [sp, 32] + stp x23, x24, [sp, 48] + str x25, [sp, 64] + ldrh w2, [x0, 10] + ldp x21, x20, [x0, 32] + ldr x22, [x0, 16] + lsl w2, w2, 1 + mov x0, x21 + bl ftl_memset + mov w0, 0 +.L1721: + ldrh w1, [x19, 6] + cmp w1, w0 + bhi .L1725 + adrp x0, .LANCHOR2+2346 + mov w23, 0 + mov w20, 0 + ldrh w1, [x0, #:lo12:.LANCHOR2+2346] + ldrh w0, [x19] + strh w1, [x21, x0, lsl 1] + ldrh w24, [x21] +.L1726: + ldrh w0, [x19, 10] + cmp w0, w20 + bhi .L1730 + mov w0, w23 + ldr x25, [sp, 64] + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x29, x30, [sp], 80 + ret +.L1725: + ubfiz x1, x0, 2, 16 + ldr w2, [x20, x1] + mov w1, 0 + ubfx x2, x2, 10, 16 +.L1722: + ldrh w3, [x19, 10] + cmp w3, w1 + bhi .L1724 + add w0, w0, 1 + and w0, w0, 65535 + b .L1721 +.L1724: + ubfiz x3, x1, 1, 16 + ldrh w4, [x22, x3] + cmp w4, w2 + bne .L1723 + cbz w2, .L1723 + ldrh w4, [x21, x3] + add w4, w4, 1 + strh w4, [x21, x3] +.L1723: + add w1, w1, 1 + and w1, w1, 65535 + b .L1722 +.L1730: + ubfiz x0, x20, 1, 16 + ldrh w1, [x21, x0] + cmp w24, w1 + bls .L1727 + add x25, x22, x0 + ldrh w0, [x22, x0] + cbnz w0, .L1728 +.L1729: + add w20, w20, 1 + and w20, w20, 65535 + b .L1726 +.L1727: + cbnz w1, .L1729 + add x25, x22, x0 + ldrh w0, [x22, x0] + cbz w0, .L1729 +.L1731: + mov w1, 1 + bl FtlFreeSysBlkQueueIn + strh wzr, [x25] + ldrh w0, [x19, 8] + sub w0, w0, #1 + strh w0, [x19, 8] + b .L1729 +.L1732: + mov w24, 0 + b .L1731 +.L1728: + mov w23, w20 + cbz w1, .L1732 + mov w24, w1 + b .L1729 + .size ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk + .align 2 + .global ftl_map_blk_alloc_new_blk + .type ftl_map_blk_alloc_new_blk, %function +ftl_map_blk_alloc_new_blk: + stp x29, x30, [sp, -48]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + mov w20, 0 + str x21, [sp, 32] + ldrh w2, [x0, 10] + ldr x1, [x0, 16] +.L1742: + cmp w20, w2 + beq .L1746 + mov x21, x1 + ldrh w3, [x1], 2 + cbnz w3, .L1743 + mov x19, x0 + bl FtlFreeSysBlkQueueOut + and w1, w0, 65535 + strh w0, [x21] + sub w2, w1, #1 + mov w0, 65533 + cmp w0, w2, uxth + bcs .L1744 + adrp x0, .LANCHOR2+2998 + ldrh w2, [x0, #:lo12:.LANCHOR2+2998] + adrp x0, .LC38 + add x0, x0, :lo12:.LC38 + bl printk +.L1745: + b .L1745 +.L1744: + ldr w0, [x19, 48] + strh wzr, [x19, 2] + add w0, w0, 1 + str w0, [x19, 48] + ldrh w0, [x19, 8] + strh w20, [x19] + add w0, w0, 1 + strh w0, [x19, 8] +.L1746: + mov w0, 0 + ldr x21, [sp, 32] + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 48 + ret +.L1743: + add w20, w20, 1 + and w20, w20, 65535 + b .L1742 + .size ftl_map_blk_alloc_new_blk, .-ftl_map_blk_alloc_new_blk + .align 2 + .global FtlMapWritePage + .type FtlMapWritePage, %function +FtlMapWritePage: + stp x29, x30, [sp, -96]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + mov x19, x0 + stp x21, x22, [sp, 32] + mov w22, 0 + stp x23, x24, [sp, 48] + adrp x23, .LANCHOR2 + stp x25, x26, [sp, 64] + adrp x24, .LANCHOR0 + stp x27, x28, [sp, 80] + mov w26, w1 + mov x27, x2 + mov x21, x23 + add x20, x23, :lo12:.LANCHOR2 + add x24, x24, :lo12:.LANCHOR0 +.L1750: + add x0, x23, :lo12:.LANCHOR2 + ldr w1, [x0, 2420] + add w1, w1, 1 + str w1, [x0, 2420] + ldrh w0, [x0, 2346] + ldrh w1, [x19, 2] + sub w0, w0, #1 + cmp w1, w0 + bge .L1751 + ldrh w1, [x19] + mov w0, 65535 + cmp w1, w0 + bne .L1752 +.L1751: + mov x0, x19 + bl Ftl_write_map_blk_to_last_page +.L1752: + ldr w0, [x20, 2928] + cbnz w0, .L1765 + ldrh w1, [x19] + mov w2, 16 + ldr x0, [x19, 16] + ldrh w25, [x0, x1, lsl 1] + mov w1, 0 + ldrh w0, [x19, 2] + str x27, [x20, 2944] + orr w0, w0, w25, lsl 10 + str w0, [x20, 2940] + ldr x0, [x20, 2640] + str x0, [x20, 2952] + bl ftl_memset + ldr x6, [x20, 2952] + ldr w0, [x19, 48] + str w0, [x6, 4] + strh w26, [x6, 8] + ldrh w0, [x19, 4] + strh w0, [x6] + strh w25, [x6, 2] + ldrb w0, [x24, 88] + cbz w0, .L1754 + ldr x0, [x20, 2944] + ldrh w1, [x20, 2354] + bl js_hash + str w0, [x6, 12] +.L1754: + add x28, x20, 2936 + mov w3, 1 + mov x0, x28 + mov w1, w3 + mov w2, w3 + bl FlashProgPages + ldrh w0, [x19, 2] + add w0, w0, 1 + and w0, w0, 65535 + strh w0, [x19, 2] + ldr w1, [x20, 2936] + cmn w1, #1 + bne .L1755 + ldr w1, [x20, 2940] + adrp x0, .LC39 + add x0, x0, :lo12:.LC39 + add w22, w22, 1 + and w22, w22, 65535 + bl printk + ldrh w0, [x19, 2] + cmp w0, 2 + bhi .L1756 + ldrh w0, [x20, 2346] + sub w0, w0, #1 + strh w0, [x19, 2] +.L1756: + cmp w22, 3 + bls .L1750 + add x21, x21, :lo12:.LANCHOR2 + mov w2, w22 + adrp x0, .LC40 + add x0, x0, :lo12:.LC40 + ldr w1, [x21, 2940] + bl printk + mov w0, 1 + str w0, [x21, 2928] +.L1765: + mov w0, 0 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 96 + ret +.L1755: + cbz w1, .L1758 + strh w25, [x19, 60] + cmp w0, 1 + bne .L1759 +.L1760: + str wzr, [x19, 56] + b .L1750 +.L1759: + cmp w1, 256 +.L1773: + beq .L1760 + ldr w0, [x19, 56] + cbnz w0, .L1760 + add x21, x21, :lo12:.LANCHOR2 + ldr x0, [x19, 40] + ldr w1, [x21, 2940] + str w1, [x0, w26, uxtw 2] + b .L1765 +.L1758: + cmp w0, 1 + b .L1773 + .size FtlMapWritePage, .-FtlMapWritePage + .align 2 + .global ftl_map_blk_gc + .type ftl_map_blk_gc, %function +ftl_map_blk_gc: + stp x29, x30, [sp, -96]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + mov x19, x0 + stp x21, x22, [sp, 32] + adrp x20, .LANCHOR2 + stp x23, x24, [sp, 48] + stp x25, x26, [sp, 64] + str x27, [sp, 80] + ldr x21, [x0, 16] + ldr x25, [x0, 40] + bl ftl_free_no_use_map_blk + ldrh w1, [x19, 10] + ldrh w2, [x19, 8] + sub w1, w1, #4 + cmp w2, w1 + blt .L1775 + ubfiz x0, x0, 1, 16 + ldrh w24, [x21, x0] + cbz w24, .L1775 + ldr w1, [x19, 52] + cbnz w1, .L1775 + mov w1, 1 + str w1, [x19, 52] + strh wzr, [x21, x0] + ldrh w0, [x19, 8] + ldrh w1, [x19, 2] + sub w0, w0, #1 + strh w0, [x19, 8] + add x0, x20, :lo12:.LANCHOR2 + ldrh w0, [x0, 2346] + cmp w1, w0 + bcc .L1776 + mov x0, x19 + bl ftl_map_blk_alloc_new_blk +.L1776: + add x26, x20, :lo12:.LANCHOR2 + mov w21, 0 + add x22, x26, 2936 +.L1777: + ldrh w0, [x19, 6] + cmp w0, w21 + bhi .L1782 + mov w1, 1 + mov w0, w24 + bl FtlFreeSysBlkQueueIn + str wzr, [x19, 52] +.L1775: + add x20, x20, :lo12:.LANCHOR2 + ldrh w1, [x19, 2] + ldrh w0, [x20, 2346] + cmp w1, w0 + bcc .L1780 + mov x0, x19 + bl ftl_map_blk_alloc_new_blk + b .L1780 +.L1782: + ubfiz x0, x21, 2, 16 + add x27, x25, x0 + ldr w1, [x25, x0] + cmp w24, w1, lsr 10 + bne .L1778 + ldr x1, [x26, 2584] + mov w2, 1 + ldr x23, [x26, 2640] + stp x1, x23, [x22, 8] + mov w1, w2 + ldr w0, [x25, x0] + str w0, [x22, 4] + mov x0, x22 + bl FlashReadPages + ldr w0, [x22] + cmn w0, #1 + bne .L1779 +.L1781: + add x20, x20, :lo12:.LANCHOR2 + str wzr, [x27] + adrp x0, .LC41 + add x0, x0, :lo12:.LC41 + ldrh w2, [x23, 8] + ldr w1, [x20, 2940] + bl printk + mov w0, 1 + str w0, [x20, 2928] +.L1780: + mov w0, 0 + ldr x27, [sp, 80] + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x29, x30, [sp], 96 + ret +.L1779: + ldrh w0, [x23, 8] + cmp w0, w21 + bne .L1781 + ldrh w1, [x23] + ldrh w0, [x19, 4] + cmp w1, w0 + bne .L1781 + ldr x2, [x22, 8] + mov w1, w21 + mov x0, x19 + bl FtlMapWritePage +.L1778: + add w21, w21, 1 + and w21, w21, 65535 + b .L1777 + .size ftl_map_blk_gc, .-ftl_map_blk_gc + .align 2 + .global Ftl_write_map_blk_to_last_page + .type Ftl_write_map_blk_to_last_page, %function +Ftl_write_map_blk_to_last_page: + stp x29, x30, [sp, -64]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + stp x21, x22, [sp, 32] + adrp x21, .LANCHOR2 + add x20, x21, :lo12:.LANCHOR2 + stp x23, x24, [sp, 48] + ldr w1, [x20, 2928] + cbnz w1, .L1788 + mov x19, x0 + ldrh w0, [x0] + mov w1, 65535 + cmp w0, w1 + ldr x22, [x19, 16] + bne .L1789 + ldrh w0, [x19, 8] + add w0, w0, 1 + strh w0, [x19, 8] + bl FtlFreeSysBlkQueueOut + strh w0, [x22] + strh wzr, [x19, 2] + ldr w0, [x19, 48] + strh wzr, [x19] + add w0, w0, 1 + str w0, [x19, 48] +.L1788: + mov w0, 0 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x29, x30, [sp], 64 + ret +.L1789: + ubfiz x0, x0, 1, 16 + ldrh w1, [x19, 2] + ldr x24, [x19, 40] + ldrh w23, [x22, x0] + ldr x22, [x20, 2640] + ldr w0, [x19, 48] + orr w1, w1, w23, lsl 10 + str w1, [x20, 2940] + ldr x1, [x20, 2576] + str x1, [x20, 2944] + str x22, [x20, 2952] + mov w1, 255 + str w0, [x22, 4] + mov w0, -1291 + strh w0, [x22, 8] + ldrh w0, [x19, 4] + strh w0, [x22] + strh w23, [x22, 2] + ldrh w2, [x20, 2346] + ldr x0, [x20, 2576] + lsl w2, w2, 3 + bl ftl_memset + mov w1, 0 + mov w0, 0 +.L1790: + ldrh w2, [x19, 6] + cmp w2, w0 + bhi .L1792 + adrp x0, .LANCHOR0+88 + ldrb w0, [x0, #:lo12:.LANCHOR0+88] + cbz w0, .L1793 + add x0, x21, :lo12:.LANCHOR2 + ldrh w1, [x0, 2354] + ldr x0, [x0, 2944] + bl js_hash + str w0, [x22, 12] +.L1793: + add x0, x21, :lo12:.LANCHOR2 + mov w2, 1 + mov w3, 0 + mov w1, w2 + add x0, x0, 2936 + bl FlashProgPages + ldrh w0, [x19, 2] + add w0, w0, 1 + strh w0, [x19, 2] + mov x0, x19 + bl ftl_map_blk_gc + b .L1788 +.L1792: + ubfiz x2, x0, 2, 16 + ldr w3, [x24, x2] + cmp w23, w3, lsr 10 + bne .L1791 + add w1, w1, 1 + ldr x4, [x20, 2576] + and w1, w1, 65535 + ubfiz x3, x1, 3, 16 + str w0, [x4, x3] + ldr w4, [x24, x2] + ldr x2, [x20, 2576] + add x2, x2, x3 + str w4, [x2, 4] +.L1791: + add w0, w0, 1 + and w0, w0, 65535 + b .L1790 + .size Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page + .align 2 + .global flush_l2p_region + .type flush_l2p_region, %function +flush_l2p_region: + stp x29, x30, [sp, -32]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x19, .LANCHOR2 + add x19, x19, :lo12:.LANCHOR2 + ubfiz x20, x0, 4, 16 + ldr x0, [x19, 2792] + add x1, x0, x20 + ldr x2, [x1, 8] + ldrh w1, [x0, x20] + adrp x0, .LANCHOR4 + add x0, x0, :lo12:.LANCHOR4 + add x0, x0, 928 + bl FtlMapWritePage + ldr x0, [x19, 2792] + add x0, x0, x20 + ldr w1, [x0, 4] + and w1, w1, 2147483647 + str w1, [x0, 4] + mov w0, 0 + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 32 + ret + .size flush_l2p_region, .-flush_l2p_region + .align 2 + .global select_l2p_ram_region + .type select_l2p_ram_region, %function +select_l2p_ram_region: + adrp x0, .LANCHOR2 + add x0, x0, :lo12:.LANCHOR2 + mov x3, 0 + mov w4, 65535 + ldrh w2, [x0, 2382] + ldr x1, [x0, 2792] +.L1801: + and w0, w3, 65535 + cmp w0, w2 + bcc .L1803 + add x4, x1, 4 + mov w0, w2 + mov w6, -2147483648 + mov w3, 0 +.L1804: + cmp w3, w2 + bne .L1806 + cmp w0, w2 + bcc .L1802 + adrp x0, .LANCHOR4+992 + mov w4, -1 + mov w3, 0 + ldrh w5, [x0, #:lo12:.LANCHOR4+992] + mov w0, w2 +.L1807: + cmp w3, w2 + beq .L1802 + ldr w7, [x1, 4] + cmp w4, w7 + bls .L1808 + ldrh w6, [x1] + cmp w6, w5 + csel w4, w4, w7, eq + csel w0, w0, w3, eq +.L1808: + add w3, w3, 1 + add x1, x1, 16 + and w3, w3, 65535 + b .L1807 +.L1803: + add x3, x3, 1 + add x5, x1, x3, lsl 4 + ldrh w5, [x5, -16] + cmp w5, w4 + bne .L1801 +.L1802: + ret +.L1806: + ldr w5, [x4] + tbnz w5, #31, .L1805 + cmp w6, w5 + bls .L1805 + mov w6, w5 + mov w0, w3 +.L1805: + add w3, w3, 1 + add x4, x4, 16 + and w3, w3, 65535 + b .L1804 + .size select_l2p_ram_region, .-select_l2p_ram_region + .align 2 + .global log2phys + .type log2phys, %function +log2phys: + stp x29, x30, [sp, -112]! + add x29, sp, 0 + stp x21, x22, [sp, 32] + adrp x21, .LANCHOR2 + add x3, x21, :lo12:.LANCHOR2 + stp x19, x20, [sp, 16] + stp x23, x24, [sp, 48] + stp x25, x26, [sp, 64] + stp x27, x28, [sp, 80] + ldr w4, [x3, 2924] + cmp w0, w4 + bcs .L1811 + mov w25, w0 + ldrh w0, [x3, 2352] + mov x23, x1 + ldr x8, [x3, 2792] + add w27, w0, 7 + ldrh w1, [x3, 2382] + mov x0, 0 + str w2, [x29, 108] + lsr w28, w25, w27 + and w22, w28, 65535 +.L1812: + and x20, x0, 65535 + cmp w20, w1 + bcc .L1817 + bl select_l2p_ram_region + and x20, x0, 65535 + ubfiz x26, x20, 4, 16 + mov w2, 65535 + add x1, x8, x26 + ldrh w3, [x8, x26] + cmp w3, w2 + beq .L1818 + ldr w1, [x1, 4] + tbz w1, #31, .L1818 + bl flush_l2p_region +.L1818: + add x19, x21, :lo12:.LANCHOR2 + ubfiz x0, x22, 2, 16 + ldr x1, [x19, 2768] + ldr w3, [x1, x0] + cbnz w3, .L1819 + ldr x0, [x19, 2792] + mov w1, 255 + ldrh w2, [x19, 2354] + add x0, x0, x26 + ldr x0, [x0, 8] + bl ftl_memset + ldr x0, [x19, 2792] + strh w22, [x0, x26] + ldr x0, [x19, 2792] + add x26, x0, x26 + str wzr, [x26, 4] + b .L1814 +.L1811: + mov w0, -1 + cbnz w2, .L1810 + str w0, [x1] +.L1810: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 112 + ret +.L1817: + add x0, x0, 1 + add x2, x8, x0, lsl 4 + ldrh w2, [x2, -16] + cmp w2, w22 + bne .L1812 +.L1814: + ldr w1, [x29, 108] + mov x0, 1 + lsl x0, x0, x27 + sub w0, w0, #1 + and w0, w0, w25 + and x0, x0, 65535 + cbnz w1, .L1815 + add x1, x21, :lo12:.LANCHOR2 + ldr x1, [x1, 2792] + add x1, x1, x20, lsl 4 + ldr x1, [x1, 8] + ldr w0, [x1, x0, lsl 2] + str w0, [x23] +.L1816: + add x21, x21, :lo12:.LANCHOR2 + ldr x0, [x21, 2792] + add x20, x0, x20, lsl 4 + ldr w0, [x20, 4] + cmn w0, #1 + beq .L1823 + add w0, w0, 1 + str w0, [x20, 4] +.L1823: + mov w0, 0 + b .L1810 +.L1815: + add x3, x21, :lo12:.LANCHOR2 + lsl x1, x20, 4 + ldr w4, [x23] + ldr x2, [x3, 2792] + add x2, x2, x1 + ldr x2, [x2, 8] + str w4, [x2, x0, lsl 2] + ldr x0, [x3, 2792] + add x0, x0, x1 + ldr w1, [x0, 4] + orr w1, w1, -2147483648 + str w1, [x0, 4] + adrp x0, .LANCHOR4+992 + strh w22, [x0, #:lo12:.LANCHOR4+992] + b .L1816 +.L1819: + ldr x0, [x19, 2792] + add x24, x19, 2936 + mov w2, 1 + str w3, [x19, 2940] + add x0, x0, x26 + str w3, [x29, 104] + mov w1, w2 + ldr x0, [x0, 8] + str x0, [x19, 2944] + ldr x0, [x19, 2640] + str x0, [x19, 2952] + mov x0, x24 + bl FlashReadPages + ldr x0, [x19, 2952] + ldr w3, [x29, 104] + ldrh w0, [x0, 8] + cmp w0, w22 + beq .L1820 + mov w2, w3 + and w1, w28, 65535 + adrp x0, .LC42 + add x0, x0, :lo12:.LC42 + bl printk + ldr x1, [x19, 2952] + mov w3, 4 + adrp x0, .LC18 + mov w2, w3 + add x0, x0, :lo12:.LC18 + bl rknand_print_hex + ldrh w3, [x19, 2380] + mov w2, 4 + ldr x1, [x19, 2768] + adrp x0, .LC43 + add x0, x0, :lo12:.LC43 + bl rknand_print_hex + mov w0, 1 + str w0, [x19, 2928] +.L1821: + add x1, x21, :lo12:.LANCHOR2 + ldr x0, [x1, 2792] + add x0, x0, x26 + str wzr, [x0, 4] + ldr x0, [x1, 2792] + strh w22, [x0, x26] + b .L1814 +.L1820: + ldr w0, [x19, 2936] + cmp w0, 256 + bne .L1821 + and w28, w28, 65535 + mov w2, w3 + mov w1, w28 + adrp x0, .LC44 + add x0, x0, :lo12:.LC44 + bl printk + ldr x0, [x19, 2792] + mov w1, w28 + add x0, x0, x26 + ldr x2, [x0, 8] + adrp x0, .LANCHOR4 + add x0, x0, :lo12:.LANCHOR4 + add x0, x0, 928 + bl FtlMapWritePage + b .L1821 + .size log2phys, .-log2phys + .align 2 + .global FtlVendorPartWrite + .type FtlVendorPartWrite, %function +FtlVendorPartWrite: + stp x29, x30, [sp, -160]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x19, .LANCHOR2 + add x19, x19, :lo12:.LANCHOR2 + stp x21, x22, [sp, 32] + stp x23, x24, [sp, 48] + mov w22, w1 + mov w24, w0 + add w1, w0, w1 + stp x25, x26, [sp, 64] + ldrh w0, [x19, 2340] + stp x27, x28, [sp, 80] + cmp w1, w0 + bhi .L1834 + ldrh w23, [x19, 2352] + adrp x27, .LANCHOR4 + add x27, x27, :lo12:.LANCHOR4 + mov x25, x2 + add x27, x27, 1000 + mov w26, 0 + lsr w23, w24, w23 +.L1828: + cbnz w22, .L1833 +.L1826: + mov w0, w26 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 160 + ret +.L1833: + ldrh w1, [x19, 2350] + ldr x0, [x19, 2760] + udiv w21, w24, w1 + ldr w2, [x0, w23, uxtw 2] + and w0, w22, 65535 + msub w21, w21, w1, w24 + sub w20, w1, w21 + and w20, w20, 65535 + cmp w22, w20 + csel w20, w0, w20, cc + cbz w2, .L1830 + cmp w20, w1 + beq .L1830 + ldr x0, [x19, 2592] + str w2, [x29, 108] + mov w2, 1 + stp x0, xzr, [x29, 112] + mov w1, w2 + add x0, x29, 104 + bl FlashReadPages +.L1831: + ldr x0, [x19, 2592] + lsl w21, w21, 9 + lsl w28, w20, 9 + asr w21, w21, 2 + mov x1, x25 + mov w2, w28 + add x0, x0, w21, sxtw 2 + bl ftl_memcpy + ldr x2, [x19, 2592] + mov w1, w23 + mov x0, x27 + sub w22, w22, w20 + add w24, w24, w20 + add x25, x25, w28, sxtw + add w23, w23, 1 + bl FtlMapWritePage + cmn w0, #1 + csinv w26, w26, wzr, ne + b .L1828 +.L1830: + ldrh w2, [x19, 2354] + mov w1, 0 + ldr x0, [x19, 2592] + bl ftl_memset + b .L1831 +.L1834: + mov w26, -1 + b .L1826 + .size FtlVendorPartWrite, .-FtlVendorPartWrite + .align 2 + .global FtlVendorPartRead + .type FtlVendorPartRead, %function +FtlVendorPartRead: + stp x29, x30, [sp, -176]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x19, .LANCHOR2 + add x19, x19, :lo12:.LANCHOR2 + stp x23, x24, [sp, 48] + stp x21, x22, [sp, 32] + mov w24, w0 + mov w23, w1 + stp x25, x26, [sp, 64] + add w1, w0, w1 + stp x27, x28, [sp, 80] + ldrh w0, [x19, 2340] + cmp w1, w0 + bhi .L1848 + ldrh w22, [x19, 2352] + adrp x25, .LANCHOR4 + add x25, x25, :lo12:.LANCHOR4 + mov x27, x2 + add x25, x25, 1000 + mov w26, 0 + lsr w22, w24, w22 +.L1841: + cbnz w23, .L1847 +.L1839: + mov w0, w26 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 176 + ret +.L1847: + ldrh w20, [x19, 2350] + ldr x0, [x19, 2760] + udiv w21, w24, w20 + ldr w3, [x0, w22, uxtw 2] + and w0, w23, 65535 + msub w21, w21, w20, w24 + sub w20, w20, w21 + and w20, w20, 65535 + cmp w23, w20 + csel w20, w0, w20, cc + lsl w28, w20, 9 + cbz w3, .L1843 + ldr x0, [x19, 2592] + mov w2, 1 + str w3, [x29, 108] + mov w1, w2 + str w3, [x29, 124] + stp x0, xzr, [x29, 128] + add x0, x29, 120 + bl FlashReadPages + ldr w0, [x29, 120] + ldr w3, [x29, 108] + cmn w0, #1 + ldr w0, [x19, 2936] + csinv w26, w26, wzr, ne + cmp w0, 256 + bne .L1845 + mov w2, w3 + mov w1, w22 + adrp x0, .LC45 + add x0, x0, :lo12:.LC45 + bl printk + ldr x2, [x19, 2592] + mov w1, w22 + mov x0, x25 + bl FtlMapWritePage +.L1845: + ldr x1, [x19, 2592] + lsl w21, w21, 9 + asr w21, w21, 2 + mov w2, w28 + mov x0, x27 + add x1, x1, w21, sxtw 2 + bl ftl_memcpy +.L1846: + add w22, w22, 1 + sub w23, w23, w20 + add w24, w24, w20 + add x27, x27, w28, sxtw + b .L1841 +.L1843: + mov w2, w28 + mov w1, 0 + mov x0, x27 + bl ftl_memset + b .L1846 +.L1848: + mov w26, -1 + b .L1839 + .size FtlVendorPartRead, .-FtlVendorPartRead + .align 2 + .global FtlUpdateVaildLpn + .type FtlUpdateVaildLpn, %function +FtlUpdateVaildLpn: + adrp x1, .LANCHOR4 + add x3, x1, :lo12:.LANCHOR4 + ldrh w2, [x3, 1064] + cmp w2, 4 + bhi .L1851 + cbnz w0, .L1851 + add w2, w2, 1 + strh w2, [x3, 1064] + ret +.L1851: + add x0, x1, :lo12:.LANCHOR4 + adrp x1, .LANCHOR2 + add x1, x1, :lo12:.LANCHOR2 + mov w6, 65535 + strh wzr, [x0, 1064] + ldrh w4, [x1, 2284] + ldr x5, [x1, 2712] + mov x1, 0 + str wzr, [x0, 1068] +.L1852: + cmp w4, w1, uxth + bhi .L1854 + ret +.L1854: + ldrh w3, [x5, x1, lsl 1] + cmp w3, w6 + beq .L1853 + ldr w2, [x0, 1068] + add w2, w2, w3 + str w2, [x0, 1068] +.L1853: + add x1, x1, 1 + b .L1852 + .size FtlUpdateVaildLpn, .-FtlUpdateVaildLpn + .align 2 + .global FtlMapBlkWriteDumpData + .type FtlMapBlkWriteDumpData, %function +FtlMapBlkWriteDumpData: + ldr w1, [x0, 56] + cbz w1, .L1863 + stp x29, x30, [sp, -48]! + adrp x2, .LANCHOR2 + add x1, x2, :lo12:.LANCHOR2 + add x29, sp, 0 + str x21, [sp, 32] + mov x21, x2 + stp x19, x20, [sp, 16] + str wzr, [x0, 56] + ldr w3, [x1, 2928] + ldrh w19, [x0, 6] + ldr x4, [x0, 40] + cbnz w3, .L1856 + mov x20, x0 + add x0, x1, 2936 + sub w19, w19, #1 + ldr x2, [x1, 2640] + and w19, w19, 65535 + ldr x3, [x1, 2584] + stp x3, x2, [x0, 8] + ubfiz x2, x19, 2, 16 + ldr w2, [x4, x2] + str w2, [x0, 4] + cbz w2, .L1860 + mov w2, 1 + mov w1, w2 + bl FlashReadPages +.L1861: + add x0, x21, :lo12:.LANCHOR2 + mov w1, w19 + ldr x2, [x0, 2944] + mov x0, x20 + bl FtlMapWritePage +.L1856: + ldp x19, x20, [sp, 16] + ldr x21, [sp, 32] + ldp x29, x30, [sp], 48 + ret +.L1860: + ldrh w2, [x1, 2354] + mov x0, x3 + mov w1, 255 + bl ftl_memset + b .L1861 +.L1863: + ret + .size FtlMapBlkWriteDumpData, .-FtlMapBlkWriteDumpData + .align 2 + .global FtlVpcTblFlush + .type FtlVpcTblFlush, %function +FtlVpcTblFlush: + stp x29, x30, [sp, -80]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + stp x21, x22, [sp, 32] + adrp x22, .LANCHOR2 + add x19, x22, :lo12:.LANCHOR2 + stp x23, x24, [sp, 48] + stp x25, x26, [sp, 64] + ldr w0, [x19, 2928] + cbnz w0, .L1868 + ldr x0, [x19, 2576] + adrp x25, .LANCHOR4 + str x0, [x19, 2944] + add x0, x25, :lo12:.LANCHOR4 + ldr x21, [x19, 2640] + add x20, x0, 696 + str x21, [x19, 2952] + adrp x23, .LANCHOR0 + ldrh w2, [x0, 1072] + strh w2, [x21, 2] + mov w2, -3932 + strh w2, [x21] + str wzr, [x21, 12] + ldr w2, [x0, 1080] + stp w2, wzr, [x21, 4] + mov w2, 19539 + movk w2, 0x4654, lsl 16 + str w2, [x0, 696] + mov w2, 99 + ldrb w3, [x0, 790] + movk w2, 0x5000, lsl 16 + str w2, [x20, 4] + ldrh w2, [x0, 784] + strh w2, [x20, 14] + ldrh w2, [x0, 786] + ldrh w1, [x0, 1078] + strh w1, [x20, 8] + orr w2, w3, w2, lsl 6 + ldrh w1, [x19, 2298] + strb w1, [x20, 10] + strh w2, [x20, 16] + ldrb w1, [x0, 792] + ldrh w2, [x0, 832] + ldrb w3, [x0, 838] + strb w1, [x20, 11] + strh w2, [x20, 18] + ldrb w1, [x0, 840] + ldrh w2, [x0, 834] + strb w1, [x20, 12] + add x1, x0, 880 + ldrh w0, [x0, 880] + orr w2, w3, w2, lsl 6 + strh w2, [x20, 20] + strh w0, [x20, 22] + ldrb w2, [x1, 6] + ldrh w0, [x1, 2] + orr w0, w2, w0, lsl 6 + strh w0, [x20, 24] + ldrb w0, [x1, 8] + mov w1, 255 + strb w0, [x20, 13] + ldr w0, [x19, 2428] + str w0, [x20, 32] + ldr w0, [x19, 2396] + str w0, [x20, 40] + ldr w0, [x19, 2400] + str w0, [x20, 36] + ldrh w0, [x19, 2472] + strh w0, [x20, 44] + ldrh w0, [x19, 2474] + strh w0, [x20, 46] + ldrh w2, [x19, 2354] + ldr x0, [x19, 2944] + bl ftl_memset + ldr x0, [x19, 2944] + mov x1, x20 + mov w2, 48 + mov x20, x25 + bl ftl_memcpy + ldr x1, [x19, 2712] + ldrh w2, [x19, 2284] + ldr x0, [x19, 2944] + lsl w2, w2, 1 + add x0, x0, 48 + bl ftl_memcpy + add x1, x23, :lo12:.LANCHOR0 + ldrh w0, [x19, 2284] + ldr x3, [x19, 2944] + ldr x1, [x1, 80] + lsr w2, w0, 3 + ubfiz x0, x0, 1, 16 + add w2, w2, 4 + add x0, x0, 51 + and x0, x0, -4 + add x0, x3, x0 + bl ftl_memcpy + ldrh w0, [x19, 2384] + cbz w0, .L1869 + ldrh w0, [x19, 2284] + ldr x3, [x19, 2944] + ldrh w2, [x19, 2380] + lsr w1, w0, 3 + add w0, w1, w0, lsl 1 + ldr x1, [x19, 2768] + add w0, w0, 52 + lsl w2, w2, 2 + and x0, x0, 65532 + add x0, x3, x0 + bl ftl_memcpy +.L1869: + add x19, x20, :lo12:.LANCHOR4 + add x26, x22, :lo12:.LANCHOR2 + add x19, x19, 1072 + add x23, x23, :lo12:.LANCHOR0 + mov w24, 0 + mov w25, 65535 + mov w0, 0 + bl FtlUpdateVaildLpn +.L1870: + ldrh w2, [x19, 2] + ldrh w1, [x19] + ldr x0, [x26, 2576] + str x0, [x26, 2944] + ldr x0, [x26, 2640] + str x0, [x26, 2952] + orr w0, w2, w1, lsl 10 + str w0, [x26, 2940] + ldrh w0, [x26, 2346] + sub w0, w0, #1 + cmp w2, w0 + blt .L1871 + ldrh w25, [x19, 4] + strh wzr, [x19, 2] + strh w1, [x19, 4] + bl FtlFreeSysBlkQueueOut + ldr w1, [x26, 2396] + str w1, [x19, 8] + add w2, w1, 1 + str w2, [x26, 2396] + ubfiz w2, w0, 10, 16 + str w2, [x26, 2940] + strh w0, [x19] + strh w0, [x21, 2] + str w1, [x21, 4] +.L1871: + ldrb w0, [x23, 88] + cbz w0, .L1872 + ldrh w1, [x26, 2354] + ldr x0, [x26, 2576] + bl js_hash + str w0, [x21, 12] +.L1872: + mov w3, 1 + add x0, x26, 2936 + mov w1, w3 + mov w2, w3 + bl FlashProgPages + ldrh w0, [x19, 2] + ldr w1, [x26, 2936] + add w0, w0, 1 + and w0, w0, 65535 + strh w0, [x19, 2] + cmn w1, #1 + bne .L1873 + cmp w0, 1 + bne .L1874 + ldrh w0, [x26, 2346] + sub w0, w0, #1 + strh w0, [x19, 2] +.L1874: + add w24, w24, 1 + and w24, w24, 65535 + cmp w24, 3 + bls .L1870 + add x22, x22, :lo12:.LANCHOR2 + mov w2, w24 + adrp x0, .LC46 + add x0, x0, :lo12:.LC46 + ldr w1, [x22, 2940] + bl printk + mov w0, 1 + str w0, [x22, 2928] +.L1868: + mov w0, 0 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x29, x30, [sp], 80 + ret +.L1873: + cmp w0, 1 + beq .L1870 + cmp w1, 256 + beq .L1870 + mov w0, 65535 + cmp w25, w0 + beq .L1868 + mov w1, 1 + mov w0, w25 + bl FtlFreeSysBlkQueueIn + b .L1868 + .size FtlVpcTblFlush, .-FtlVpcTblFlush + .align 2 + .global FtlScanSysBlk + .type FtlScanSysBlk, %function +FtlScanSysBlk: + stp x29, x30, [sp, -128]! + mov w1, 0 + add x29, sp, 0 + stp x19, x20, [sp, 16] + stp x21, x22, [sp, 32] + adrp x21, .LANCHOR2 + add x19, x21, :lo12:.LANCHOR2 + adrp x22, .LANCHOR4 + add x20, x22, :lo12:.LANCHOR4 + stp x23, x24, [sp, 48] + stp x25, x26, [sp, 64] + mov w25, 56 + ldr x0, [x19, 2784] + ldr w2, [x19, 2372] + stp x27, x28, [sp, 80] + strh wzr, [x20, 1088] + lsl w2, w2, 2 + strh wzr, [x19, 2920] + bl ftl_memset + ldr x0, [x19, 2720] + mov w1, 0 + ldr w2, [x19, 2372] + lsl w2, w2, 1 + bl ftl_memset + ldr x0, [x19, 2752] + mov w1, 0 + ldrh w2, [x19, 2364] + lsl w2, w2, 2 + bl ftl_memset + ldr x0, [x19, 2736] + mov w1, 0 + ldrh w2, [x19, 2364] + lsl w2, w2, 1 + bl ftl_memset + mov w2, 16 + mov w1, 255 + add x0, x20, 1072 + bl ftl_memset + ldrh w23, [x19, 2284] + add x0, x19, 2304 + str x0, [x29, 112] +.L1891: + ldrh w0, [x19, 2286] + cmp w0, w23 + bls .L1930 + ldrh w8, [x19, 2276] + mov x5, 0 + ldrh w7, [x19, 2356] + mov w20, 0 + mov w6, 4 + b .L1931 +.L1893: + ldr x0, [x29, 112] + mov w1, w23 + ldrb w0, [x0, x5] + bl V2P_block + and w4, w0, 65535 + bl FtlBbmIsBadBlock + cbnz w0, .L1892 + umull x2, w20, w25 + ldr x0, [x19, 2520] + lsl w4, w4, 10 + add x0, x0, x2 + str w4, [x0, 4] + ldr x1, [x19, 2520] + ldr x0, [x19, 2600] + add x1, x1, x2 + ldr x2, [x19, 2656] + str x0, [x1, 8] + mul w0, w20, w7 + add w20, w20, 1 + and w20, w20, 65535 + sdiv w0, w0, w6 + add x0, x2, w0, sxtw 2 + str x0, [x1, 16] +.L1892: + add x5, x5, 1 +.L1931: + cmp w8, w5, uxth + bhi .L1893 + cbnz w20, .L1894 +.L1929: + add w23, w23, 1 + and w23, w23, 65535 + b .L1891 +.L1894: + ldr x0, [x19, 2520] + mov w2, 1 + mov w1, w20 + add x24, x22, :lo12:.LANCHOR4 + add x27, x24, 1072 + mov x26, 0 + bl FlashReadPages + umull x0, w20, w25 + str x0, [x29, 120] +.L1928: + ldr x0, [x19, 2520] + add x1, x0, x26 + ldr w0, [x0, x26] + ldr w28, [x1, 4] + cmn w0, #1 + ldr x20, [x1, 16] + ubfx x28, x28, 10, 16 + bne .L1897 + mov w6, 16 + mov w7, 65535 +.L1899: + ldr x0, [x19, 2520] + mov w2, 1 + stp w7, w6, [x29, 104] + add x0, x0, x26 + ldr w1, [x0, 4] + add w1, w1, 1 + str w1, [x0, 4] + mov w1, w2 + ldr x0, [x19, 2520] + add x0, x0, x26 + bl FlashReadPages + ldp w7, w6, [x29, 104] + ldrh w0, [x20] + cmp w0, w7 + ldr x0, [x19, 2520] + bne .L1896 + mov w1, -1 + str w1, [x0, x26] + ldr x0, [x19, 2520] + ldr w0, [x0, x26] + cmp w0, w1 + beq .L1965 +.L1897: + ldr w0, [x19, 2396] + ldr w10, [x20, 4] + cmn w0, #1 + beq .L1900 + cmp w0, w10 + bhi .L1901 +.L1900: + cmn w10, #1 + beq .L1901 + add w0, w10, 1 + str w0, [x19, 2396] +.L1901: + ldrh w0, [x20] + mov w1, 61604 + cmp w0, w1 + beq .L1903 + bhi .L1904 + mov w1, 61574 + cmp w0, w1 + beq .L1905 +.L1902: + ldr x0, [x29, 120] + add x26, x26, 56 + cmp x26, x0 + bne .L1928 + b .L1929 +.L1896: + ldr w0, [x0, x26] + cmn w0, #1 + bne .L1897 + sub w6, w6, #1 + ands w6, w6, 65535 + bne .L1899 +.L1965: + mov w1, 0 + mov w0, w28 + bl FtlFreeSysBlkQueueIn + b .L1902 +.L1904: + mov w1, 61634 + cmp w0, w1 + beq .L1906 + mov w1, 65535 + cmp w0, w1 + beq .L1965 + b .L1902 +.L1906: + ldr w6, [x19, 2372] + ldrh w1, [x24, 1088] + and w2, w6, 65535 + ldr x7, [x19, 2784] + sub w0, w2, #1 + sub w2, w2, w1 + sub w2, w2, #1 + sxth x0, w0 + sxth w2, w2 +.L1908: + cmp w0, w2 + bgt .L1914 + tbz w0, #31, .L1946 + b .L1902 +.L1914: + sxtw x8, w0 + lsl x9, x8, 2 + ldr w11, [x7, x9] + cmp w10, w11 + bls .L1909 + ldr w2, [x7] + cbnz w2, .L1910 + cmp w6, w1 + beq .L1910 + add w1, w1, 1 + strh w1, [x24, 1088] +.L1910: + mov w1, 0 +.L1911: + cmp w1, w0 + bne .L1912 + ldr x1, [x19, 2784] + ldr w2, [x20, 4] + str w2, [x1, x9] + ldr x1, [x19, 2720] + strh w28, [x1, x8, lsl 1] + tbnz w0, #31, .L1902 + ldrh w1, [x24, 1088] + ldr w2, [x19, 2372] + sub w2, w2, w1 + sub w2, w2, #1 + cmp w0, w2, sxth + bgt .L1902 +.L1946: + add w1, w1, 1 + strh w1, [x24, 1088] + ldr x1, [x19, 2784] + ldr w2, [x20, 4] + str w2, [x1, x0, lsl 2] + ldr x1, [x19, 2720] +.L1964: + strh w28, [x1, x0, lsl 1] + b .L1902 +.L1912: + ldr x7, [x19, 2784] + sxtw x2, w1 + lsl x6, x2, 2 + lsl x2, x2, 1 + add x10, x7, x6 + add w1, w1, 1 + sxth w1, w1 + ldr w10, [x10, 4] + str w10, [x7, x6] + ldr x6, [x19, 2720] + add x7, x6, x2 + ldrh w7, [x7, 2] + strh w7, [x6, x2] + b .L1911 +.L1909: + sub w0, w0, #1 + sxth x0, w0 + b .L1908 +.L1905: + ldrh w6, [x19, 2364] + ldrh w1, [x19, 2920] + sub w2, w6, #1 + ldr x7, [x19, 2752] + sxth x0, w2 + sub w2, w2, w1 +.L1917: + cmp w0, w2 + ble .L1922 + sxtw x8, w0 + lsl x9, x8, 2 + ldr w11, [x7, x9] + cmp w10, w11 + bls .L1918 + ldr w2, [x7] + cbnz w2, .L1919 + cmp w6, w1 + beq .L1919 + add w1, w1, 1 + strh w1, [x19, 2920] +.L1919: + mov w1, 0 +.L1920: + cmp w1, w0 + bne .L1921 + ldr x1, [x19, 2752] + ldr w2, [x20, 4] + str w2, [x1, x9] + ldr x1, [x19, 2736] + strh w28, [x1, x8, lsl 1] +.L1922: + tbnz w0, #31, .L1902 + ldrh w1, [x19, 2364] + ldrh w2, [x19, 2920] + sub w1, w1, #1 + sub w1, w1, w2 + cmp w0, w1, sxth + bgt .L1902 + ldr x1, [x19, 2752] + add w2, w2, 1 + strh w2, [x19, 2920] + ldr w2, [x20, 4] + str w2, [x1, x0, lsl 2] + ldr x1, [x19, 2736] + b .L1964 +.L1921: + ldr x7, [x19, 2752] + sxtw x2, w1 + lsl x6, x2, 2 + lsl x2, x2, 1 + add x10, x7, x6 + add w1, w1, 1 + sxth w1, w1 + ldr w10, [x10, 4] + str w10, [x7, x6] + ldr x6, [x19, 2736] + add x7, x6, x2 + ldrh w7, [x7, 2] + strh w7, [x6, x2] + b .L1920 +.L1918: + sub w0, w0, #1 + sxth x0, w0 + b .L1917 +.L1903: + ldrh w0, [x27] + mov w1, 65535 + cmp w0, w1 + bne .L1924 + strh w28, [x27] + str w10, [x27, 8] + b .L1902 +.L1924: + ldrh w0, [x27, 4] + cmp w0, w1 + beq .L1925 + mov w1, 1 + bl FtlFreeSysBlkQueueIn +.L1925: + ldr w0, [x20, 4] + ldr w1, [x27, 8] + cmp w1, w0 + bcs .L1926 + ldrh w0, [x27] + strh w0, [x27, 4] + strh w28, [x27] + ldr w0, [x20, 4] + str w0, [x27, 8] + b .L1902 +.L1926: + strh w28, [x27, 4] + b .L1902 +.L1930: + ldr x1, [x19, 2720] + ldrh w0, [x1] + cbz w0, .L1932 +.L1935: + add x0, x21, :lo12:.LANCHOR2 + ldr x1, [x0, 2736] + ldrh w2, [x1] + cbz w2, .L1933 +.L1951: + ldp x19, x20, [sp, 16] + mov w0, 0 + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 128 + ret +.L1932: + add x22, x22, :lo12:.LANCHOR4 + ldrh w0, [x22, 1088] + cbz w0, .L1935 + ldr w2, [x19, 2372] + mov w0, 0 +.L1936: + cmp w0, w2 + bcs .L1935 + ldrh w3, [x1, w0, sxtw 1] + cbz w3, .L1937 + mov w1, w0 + add x2, x21, :lo12:.LANCHOR2 +.L1938: + ldr w3, [x2, 2372] + cmp w1, w3 + bcs .L1935 + ldr x5, [x2, 2720] + sxtw x6, w1 + lsl x4, x6, 1 + sub w3, w1, w0 + sxtw x3, w3 + add w1, w1, 1 + sxth w1, w1 + ldrh w7, [x5, x4] + strh w7, [x5, x3, lsl 1] + ldr x5, [x2, 2784] + ldr w6, [x5, x6, lsl 2] + str w6, [x5, x3, lsl 2] + ldr x3, [x2, 2720] + strh wzr, [x3, x4] + b .L1938 +.L1937: + add w0, w0, 1 + sxth w0, w0 + b .L1936 +.L1933: + ldrh w2, [x0, 2920] + cbz w2, .L1951 + ldrh w2, [x0, 2364] + mov w0, 0 +.L1941: + mov w5, w0 + cmp w0, w2 + bge .L1951 + ldrh w3, [x1, w0, sxtw 1] + cbz w3, .L1942 + add x21, x21, :lo12:.LANCHOR2 +.L1943: + ldrh w1, [x21, 2364] + cmp w0, w1 + bge .L1951 + ldr x3, [x21, 2736] + sxtw x4, w0 + lsl x2, x4, 1 + sub w1, w0, w5 + sxtw x1, w1 + add w0, w0, 1 + sxth w0, w0 + ldrh w6, [x3, x2] + strh w6, [x3, x1, lsl 1] + ldr x3, [x21, 2752] + ldr w4, [x3, x4, lsl 2] + str w4, [x3, x1, lsl 2] + ldr x1, [x21, 2736] + strh wzr, [x1, x2] + b .L1943 +.L1942: + add w0, w0, 1 + sxth w0, w0 + b .L1941 + .size FtlScanSysBlk, .-FtlScanSysBlk + .align 2 + .global FtlLoadEctTbl + .type FtlLoadEctTbl, %function +FtlLoadEctTbl: + stp x29, x30, [sp, -32]! + mov w0, 64 + add x29, sp, 0 + str x19, [sp, 16] + adrp x19, .LANCHOR2 + add x19, x19, :lo12:.LANCHOR2 + ldrh w1, [x19, 2672] + ldr x2, [x19, 2688] + bl FtlVendorPartRead + ldr x0, [x19, 2688] + ldr w1, [x0] + mov w0, 17221 + movk w0, 0x4254, lsl 16 + cmp w1, w0 + beq .L1967 + adrp x1, .LC47 + adrp x0, .LC48 + add x1, x1, :lo12:.LC47 + add x0, x0, :lo12:.LC48 + bl printk + ldr x0, [x19, 2688] + mov w1, 0 + ldrh w2, [x19, 2672] + lsl w2, w2, 9 + bl ftl_memset +.L1967: + mov w0, 0 + ldr x19, [sp, 16] + ldp x29, x30, [sp], 32 + ret + .size FtlLoadEctTbl, .-FtlLoadEctTbl + .align 2 + .global ftl_set_blk_mode + .type ftl_set_blk_mode, %function +ftl_set_blk_mode: + and w0, w0, 65535 + cbz w1, .L1970 + stp x29, x30, [sp, -16]! + add x29, sp, 0 + bl ftl_set_blk_mode.part.17 + ldp x29, x30, [sp], 16 + ret +.L1970: + adrp x1, .LANCHOR0+80 + ubfx x2, x0, 5, 11 + lsl x2, x2, 2 + ldr x3, [x1, #:lo12:.LANCHOR0+80] + mov w1, 1 + lsl w0, w1, w0 + ldr w1, [x3, x2] + bic w0, w1, w0 + str w0, [x3, x2] + ret + .size ftl_set_blk_mode, .-ftl_set_blk_mode + .align 2 + .global ftl_get_blk_mode + .type ftl_get_blk_mode, %function +ftl_get_blk_mode: + and w1, w0, 65535 + adrp x0, .LANCHOR0+80 + ldr x0, [x0, #:lo12:.LANCHOR0+80] + ubfx x2, x1, 5, 11 + ldr w0, [x0, x2, lsl 2] + lsr w0, w0, w1 + and w0, w0, 1 + ret + .size ftl_get_blk_mode, .-ftl_get_blk_mode + .align 2 + .global FtlCheckVpc + .type FtlCheckVpc, %function +FtlCheckVpc: + stp x29, x30, [sp, -112]! + adrp x1, .LANCHOR3 + add x1, x1, :lo12:.LANCHOR3 + adrp x0, .LC49 + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x20, .LANCHOR2 + stp x23, x24, [sp, 48] + add x23, x20, :lo12:.LANCHOR2 + stp x21, x22, [sp, 32] + mov w22, 0 + add x1, x1, 152 + stp x25, x26, [sp, 64] + stp x27, x28, [sp, 80] + add x0, x0, :lo12:.LC49 + adrp x21, check_valid_page_count_table + bl printk + add x19, x21, :lo12:check_valid_page_count_table + mov x2, 8192 + mov w1, 0 + mov x0, x19 + bl memset +.L1978: + ldr w0, [x23, 2924] + cmp w22, w0 + bcc .L1980 + adrp x24, .LC50 + add x22, x20, :lo12:.LANCHOR2 + add x25, x21, :lo12:check_valid_page_count_table + add x24, x24, :lo12:.LC50 + mov w23, 0 + mov w19, 0 + mov w28, 65535 +.L1981: + ldrh w0, [x22, 2284] + cmp w0, w19 + bhi .L1983 + adrp x0, .LANCHOR4 + add x0, x0, :lo12:.LANCHOR4 + ldr x19, [x0, 768] + cbz x19, .L1984 + ldrh w25, [x0, 776] + adrp x24, .LC51 + ldr x0, [x22, 2808] + add x20, x20, :lo12:.LANCHOR2 + add x21, x21, :lo12:check_valid_page_count_table + add x24, x24, :lo12:.LC51 + sub x19, x19, x0 + mov x0, -6148914691236517206 + asr x19, x19, 1 + movk x0, 0xaaab, lsl 0 + mov w26, 6 + mov w22, 0 + mul x19, x19, x0 + and w19, w19, 65535 +.L1985: + cmp w22, w25 + bne .L1987 +.L1984: + mov w1, w23 + adrp x0, .LC52 + add x0, x0, :lo12:.LC52 + bl printk + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 112 + ret +.L1980: + mov w2, 0 + add x1, x29, 108 + mov w0, w22 + bl log2phys + ldr w0, [x29, 108] + cmn w0, #1 + beq .L1979 + lsr w0, w0, 10 + bl P2V_block_in_plane + and x0, x0, 65535 + ldrh w1, [x19, x0, lsl 1] + add w1, w1, 1 + strh w1, [x19, x0, lsl 1] +.L1979: + add w22, w22, 1 + b .L1978 +.L1983: + ldr x0, [x22, 2712] + ubfiz x27, x19, 1, 16 + sxtw x26, w19 + ldrh w2, [x0, x27] + ldrh w3, [x25, x26, lsl 1] + cmp w2, w3 + beq .L1982 + mov w1, w19 + mov x0, x24 + bl printk + ldr x0, [x22, 2712] + ldrh w0, [x0, x27] + cmp w0, w28 + beq .L1982 + ldrh w1, [x25, x26, lsl 1] + cmp w1, w0 + csinc w23, w23, wzr, ls +.L1982: + add w19, w19, 1 + and w19, w19, 65535 + b .L1981 +.L1987: + ldr x1, [x20, 2712] + ubfiz x0, x19, 1, 16 + ldrh w2, [x1, x0] + cbz w2, .L1986 + ldrh w3, [x21, w19, sxtw 1] + mov w23, 1 + mov w1, w19 + mov x0, x24 + bl printk +.L1986: + ldr x0, [x20, 2808] + umull x19, w19, w26 + ldrh w19, [x0, x19] + mov w0, 65535 + cmp w19, w0 + beq .L1984 + add w22, w22, 1 + and w22, w22, 65535 + b .L1985 + .size FtlCheckVpc, .-FtlCheckVpc + .align 2 + .global FtlDumpSysBlock + .type FtlDumpSysBlock, %function +FtlDumpSysBlock: + sub sp, sp, #80 + stp x29, x30, [sp, 16] + add x29, sp, 16 + stp x23, x24, [sp, 64] + and w23, w0, 65535 + adrp x0, .LANCHOR2 + add x0, x0, :lo12:.LANCHOR2 + stp x19, x20, [sp, 32] + add x19, x0, 2936 + stp x21, x22, [sp, 48] + lsl w24, w23, 10 + adrp x22, .LC53 + mov x21, x0 + ldr x1, [x0, 2576] + add x22, x22, :lo12:.LC53 + str x1, [x19, 8] + mov w20, 0 + ldr x1, [x0, 2640] + str x1, [x19, 16] +.L1999: + ldrh w0, [x21, 2346] + cmp w20, w0 + blt .L2001 + ldp x19, x20, [sp, 32] + ldp x21, x22, [sp, 48] + ldp x23, x24, [sp, 64] + ldp x29, x30, [sp, 16] + add sp, sp, 80 + ret +.L2001: + orr w0, w20, w24 + mov w2, 1 + str w0, [x19, 4] + mov w1, w2 + mov x0, x19 + bl FlashReadPages + ldp x1, x0, [x19, 8] + ldr w1, [x1] + str w1, [sp] + mov w1, w23 + ldp w4, w5, [x0] + ldp w6, w7, [x0, 8] + mov x0, x22 + ldp w2, w3, [x19] + bl printk + ldr x0, [x19, 16] + ldr w0, [x0] + cmn w0, #1 + beq .L2000 + ldr x1, [x21, 2576] + adrp x0, .LC54 + mov w3, 768 + mov w2, 4 + add x0, x0, :lo12:.LC54 + bl rknand_print_hex +.L2000: + add w20, w20, 1 + sxth w20, w20 + b .L1999 + .size FtlDumpSysBlock, .-FtlDumpSysBlock + .align 2 + .global Ftlscanalldata + .type Ftlscanalldata, %function +Ftlscanalldata: + sub sp, sp, #96 + adrp x0, .LC55 + mov w1, 0 + add x0, x0, :lo12:.LC55 + stp x29, x30, [sp, 16] + add x29, sp, 16 + stp x21, x22, [sp, 48] + adrp x22, .LANCHOR2 + add x21, x22, :lo12:.LANCHOR2 + stp x19, x20, [sp, 32] + str x23, [sp, 64] + mov w20, 0 + add x19, x21, 2936 + bl printk +.L2007: + add x0, x22, :lo12:.LANCHOR2 + ldr w0, [x0, 2924] + cmp w20, w0 + bcc .L2013 + ldp x19, x20, [sp, 32] + ldp x21, x22, [sp, 48] + ldp x29, x30, [sp, 16] + ldr x23, [sp, 64] + add sp, sp, 96 + ret +.L2013: + mov w2, 0 + add x1, x29, 76 + mov w0, w20 + bl log2phys + tst x20, 2047 + bne .L2008 + ldr w2, [x29, 76] + adrp x0, .LC56 + mov w1, w20 + add x0, x0, :lo12:.LC56 + bl printk +.L2008: + ldr w0, [x29, 76] + cmn w0, #1 + beq .L2010 + ldr x23, [x21, 2640] + mov w2, 0 + stp wzr, w0, [x19] + mov w1, 1 + ldr x0, [x21, 2576] + str x0, [x19, 8] + mov x0, x19 + str x23, [x19, 16] + str w20, [x19, 24] + bl FlashReadPages + ldr w0, [x19] + cmp w0, 256 + ccmn w0, #1, 4, ne + beq .L2011 + ldr w0, [x23, 8] + cmp w20, w0 + beq .L2010 +.L2011: + ldp x1, x0, [x19, 8] + ldr w2, [x1, 4] + str w2, [sp] + ldp w3, w4, [x0] + ldp w5, w6, [x0, 8] + adrp x0, .LC57 + ldr w7, [x1] + add x0, x0, :lo12:.LC57 + ldr w2, [x19, 4] + mov w1, w20 + bl printk +.L2010: + add w20, w20, 1 + b .L2007 + .size Ftlscanalldata, .-Ftlscanalldata + .align 2 + .global dump_map_info + .type dump_map_info, %function +dump_map_info: + sub sp, sp, #96 + stp x29, x30, [sp, 16] + add x29, sp, 16 + stp x19, x20, [sp, 32] + adrp x19, .LANCHOR2 + add x0, x19, :lo12:.LANCHOR2 + stp x23, x24, [sp, 64] + stp x21, x22, [sp, 48] + add x24, x0, 2304 + stp x25, x26, [sp, 80] + mov x21, x19 + mov x19, x0 + mov w23, 56 + ldrh w22, [x0, 2284] +.L2016: + ldrh w0, [x19, 2286] + cmp w0, w22 + bhi .L2022 + add x25, x21, :lo12:.LANCHOR2 + adrp x26, .LANCHOR4 + add x24, x25, 2936 + add x26, x26, :lo12:.LANCHOR4 + mov w20, 0 +.L2023: + ldrh w0, [x26, 1088] + cmp w20, w0 + bge .L2026 + adrp x0, .LC59 + sbfiz x22, x20, 1, 32 + mov w19, 0 + add x23, x0, :lo12:.LC59 + b .L2027 +.L2018: + ldrb w0, [x24, x5] + mov w1, w22 + bl V2P_block + and w4, w0, 65535 + bl FtlBbmIsBadBlock + cbnz w0, .L2017 + umull x2, w20, w23 + ldr x0, [x19, 2520] + lsl w4, w4, 10 + add x0, x0, x2 + str w4, [x0, 4] + ldr x1, [x19, 2520] + ldr x0, [x19, 2600] + add x1, x1, x2 + ldr x2, [x19, 2656] + str x0, [x1, 8] + mul w0, w20, w7 + add w20, w20, 1 + and w20, w20, 65535 + sdiv w0, w0, w6 + add x0, x2, w0, sxtw 2 + str x0, [x1, 16] +.L2017: + add x5, x5, 1 +.L2024: + cmp w8, w5, uxth + bhi .L2018 + cbnz w20, .L2019 +.L2021: + add w22, w22, 1 + and w22, w22, 65535 + b .L2016 +.L2019: + ldr x0, [x19, 2520] + mov w1, w20 + adrp x26, .LC58 + mov w2, 1 + umull x20, w20, w23 + mov x25, 0 + add x26, x26, :lo12:.LC58 + bl FlashReadPages +.L2020: + ldr x0, [x19, 2520] + add x0, x0, x25 + add x25, x25, 56 + ldr x1, [x0, 16] + ldr w2, [x0, 4] + ldr x0, [x0, 8] + ldr w3, [x0, 4] + str w3, [sp] + ldr w7, [x0] + mov x0, x26 + ldp w3, w4, [x1] + ldp w5, w6, [x1, 8] + ubfx x1, x2, 10, 16 + bl printk + cmp x25, x20 + beq .L2021 + b .L2020 +.L2022: + ldrh w8, [x19, 2276] + mov x5, 0 + ldrh w7, [x19, 2356] + mov w20, 0 + mov w6, 4 + b .L2024 +.L2025: + ldr x0, [x25, 2720] + mov w2, 1 + mov w1, w2 + ldrh w0, [x0, x22] + orr w0, w19, w0, lsl 10 + str w0, [x24, 4] + mov x0, x24 + bl FlashReadPages + ldp x2, x0, [x24, 8] + add w19, w19, 1 + ldr x1, [x25, 2720] + sxth w19, w19 + ldr w3, [x2, 4] + ldrh w1, [x1, x22] + str w3, [sp, 8] + ldr w2, [x2] + str w2, [sp] + ldp w4, w5, [x0] + ldp w6, w7, [x0, 8] + mov x0, x23 + ldp w2, w3, [x24] + bl printk +.L2027: + ldrh w0, [x25, 2346] + cmp w19, w0 + blt .L2025 + add w20, w20, 1 + sxth w20, w20 + b .L2023 +.L2026: + add x21, x21, :lo12:.LANCHOR2 + mov w2, 2 + adrp x0, .LC60 + add x0, x0, :lo12:.LC60 + ldr w3, [x21, 2372] + ldr x1, [x21, 2720] + bl rknand_print_hex + ldrh w3, [x21, 2380] + mov w2, 4 + ldr x1, [x21, 2768] + adrp x0, .LC61 + add x0, x0, :lo12:.LC61 + bl rknand_print_hex + ldrh w3, [x21, 2380] + mov w2, 4 + ldr x1, [x21, 2776] + adrp x0, .LC62 + add x0, x0, :lo12:.LC62 + bl rknand_print_hex + ldp x19, x20, [sp, 32] + ldp x21, x22, [sp, 48] + ldp x23, x24, [sp, 64] + ldp x25, x26, [sp, 80] + ldp x29, x30, [sp, 16] + add sp, sp, 96 + ret + .size dump_map_info, .-dump_map_info + .align 2 + .global FtlMapTblRecovery + .type FtlMapTblRecovery, %function +FtlMapTblRecovery: + stp x29, x30, [sp, -128]! + mov w1, 0 + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x20, .LANCHOR2 + stp x21, x22, [sp, 32] + mov x22, x0 + stp x25, x26, [sp, 64] + mov w19, 0 + stp x23, x24, [sp, 48] + adrp x25, .LANCHOR0 + stp x27, x28, [sp, 80] + ldrh w24, [x0, 6] + ldr x0, [x0, 40] + str x0, [x29, 120] + ldrh w0, [x22, 8] + lsl w2, w24, 2 + str w0, [x29, 116] + ldr x0, [x29, 120] + ldp x23, x27, [x22, 16] + bl ftl_memset + stp wzr, wzr, [x22, 48] + add x4, x20, :lo12:.LANCHOR2 + mov w0, -1 + mov x26, x4 + ldr x1, [x4, 2576] + ldr x21, [x4, 2640] + str x1, [x4, 2944] + str x21, [x4, 2952] + strh w0, [x22] + strh w0, [x22, 2] + mov w0, 1 + str w0, [x22, 56] + ldr w0, [x29, 116] + sub w0, w0, #1 + str w0, [x29, 112] + add x0, x25, :lo12:.LANCHOR0 + str x0, [x29, 96] +.L2031: + ldr w0, [x29, 116] + cmp w19, w0 + bge .L2050 + ldr w0, [x29, 112] + sxtw x28, w19 + cmp w19, w0 + bne .L2032 + lsl x0, x28, 1 + mov w1, 1 + add x25, x23, x0 + adrp x26, .LANCHOR0 + add x26, x26, :lo12:.LANCHOR0 + ldrh w0, [x23, x0] + bl FtlGetLastWrittenPage + strh w19, [x22] + sxth w23, w0 + add w0, w0, 1 + strh w0, [x22, 2] + add w23, w23, 1 + ldr w0, [x27, x28, lsl 2] + add x27, x20, :lo12:.LANCHOR2 + add x19, x27, 2936 + mov w28, 0 + str w0, [x22, 48] +.L2033: + cmp w28, w23 + blt .L2036 +.L2050: + add x20, x20, :lo12:.LANCHOR2 + mov x0, x22 + bl ftl_free_no_use_map_blk + ldrh w1, [x22, 2] + ldrh w0, [x20, 2346] + cmp w1, w0 + bne .L2038 + mov x0, x22 + bl ftl_map_blk_alloc_new_blk +.L2038: + mov x0, x22 + bl ftl_map_blk_gc + mov x0, x22 + bl ftl_map_blk_gc + mov w0, 0 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 128 + ret +.L2036: + ldrh w0, [x25] + mov w2, 1 + mov w1, w2 + orr w0, w28, w0, lsl 10 + str w0, [x19, 4] + mov x0, x19 + bl FlashReadPages + ldrb w0, [x26, 88] + cbz w0, .L2034 + ldr x0, [x19, 16] + ldr w6, [x0, 12] + cbz w6, .L2034 + ldrh w1, [x27, 2354] + ldr x0, [x19, 8] + bl js_hash + cmp w6, w0 + beq .L2034 + mov w0, -1 + str w0, [x19] +.L2034: + ldr w0, [x19] + cmn w0, #1 + beq .L2035 + ldrh w0, [x21, 8] + cmp w24, w0 + bls .L2035 + ldrh w2, [x21] + ldrh w1, [x22, 4] + cmp w2, w1 + bne .L2035 + ldr x2, [x29, 120] + ubfiz x0, x0, 2, 16 + ldr w1, [x19, 4] + str w1, [x2, x0] +.L2035: + add w28, w28, 1 + sxth w28, w28 + b .L2033 +.L2032: + add x0, x26, 2936 + ldr x1, [x26, 2576] + str x1, [x0, 8] + lsl x1, x28, 1 + add x2, x23, x1 + str x2, [x29, 104] + ldrh w2, [x26, 2346] + ldrh w1, [x23, x1] + sub w2, w2, #1 + orr w1, w2, w1, lsl 10 + mov w2, 1 + str w1, [x0, 4] + mov w1, w2 + bl FlashReadPages + ldr w0, [x26, 2936] + cmn w0, #1 + beq .L2052 + ldrh w1, [x21] + ldrh w0, [x22, 4] + cmp w1, w0 + bne .L2052 + ldrh w1, [x21, 8] + mov w0, 64245 + cmp w1, w0 + beq .L2040 +.L2052: + add x25, x26, 2936 + mov w28, 0 +.L2041: + ldrh w0, [x26, 2346] + cmp w28, w0 + bge .L2048 + ldr x0, [x29, 104] + mov w2, 1 + mov w1, w2 + ldrh w0, [x0] + orr w0, w28, w0, lsl 10 + str w0, [x25, 4] + mov x0, x25 + bl FlashReadPages + ldr x0, [x29, 96] + ldrb w0, [x0, 88] + cbz w0, .L2045 + ldr x0, [x25, 16] + ldr w6, [x0, 12] + cbz w6, .L2045 + ldrh w1, [x26, 2354] + ldr x0, [x25, 8] + bl js_hash + cmp w6, w0 + beq .L2045 + mov w0, -1 + str w0, [x25] +.L2045: + ldr w0, [x25] + cmn w0, #1 + beq .L2046 + ldrh w0, [x21, 8] + cmp w24, w0 + bls .L2046 + ldrh w2, [x21] + ldrh w1, [x22, 4] + cmp w2, w1 + bne .L2046 + ldr x2, [x29, 120] + ubfiz x0, x0, 2, 16 + ldr w1, [x25, 4] + str w1, [x2, x0] +.L2046: + add w5, w28, 1 + sxth w28, w5 + b .L2041 +.L2040: + mov w0, 0 +.L2042: + ldrh w1, [x26, 2346] + sub w1, w1, #1 + cmp w0, w1 + blt .L2044 +.L2048: + add w19, w19, 1 + sxth w19, w19 + b .L2031 +.L2044: + ldr x2, [x26, 2576] + sbfiz x5, x0, 3, 32 + ldrh w1, [x2, x5] + cmp w24, w1 + bls .L2043 + add x2, x2, x5 + ldr x3, [x29, 120] + ubfiz x1, x1, 2, 16 + ldr w2, [x2, 4] + str w2, [x3, x1] +.L2043: + add w0, w0, 1 + sxth w0, w0 + b .L2042 + .size FtlMapTblRecovery, .-FtlMapTblRecovery + .align 2 + .global FtlLoadVonderInfo + .type FtlLoadVonderInfo, %function +FtlLoadVonderInfo: + adrp x1, .LANCHOR2 + add x1, x1, :lo12:.LANCHOR2 + stp x29, x30, [sp, -16]! + adrp x0, .LANCHOR4 + add x0, x0, :lo12:.LANCHOR4 + add x0, x0, 1000 + add x29, sp, 0 + ldrh w2, [x1, 2364] + strh w2, [x0, 10] + mov w2, -3962 + strh w2, [x0, 4] + ldrh w2, [x1, 2920] + strh w2, [x0, 8] + ldrh w2, [x1, 2366] + strh w2, [x0, 6] + ldr x2, [x1, 2736] + str x2, [x0, 16] + ldr x2, [x1, 2752] + str x2, [x0, 24] + ldr x2, [x1, 2744] + ldr x1, [x1, 2760] + stp x2, x1, [x0, 32] + bl FtlMapTblRecovery + mov w0, 0 + ldp x29, x30, [sp], 16 + ret + .size FtlLoadVonderInfo, .-FtlLoadVonderInfo + .align 2 + .global FtlL2PDataInit + .type FtlL2PDataInit, %function +FtlL2PDataInit: + stp x29, x30, [sp, -32]! + adrp x0, .LANCHOR2 + mov w1, 0 + add x29, sp, 0 + str x19, [sp, 16] + add x19, x0, :lo12:.LANCHOR2 + ldr x0, [x19, 2728] + ldr w2, [x19, 2372] + lsl w2, w2, 1 + bl ftl_memset + ldrh w0, [x19, 2382] + mov w1, 255 + ldrh w2, [x19, 2354] + mul w2, w2, w0 + ldr x0, [x19, 2800] + bl ftl_memset + mov x0, x19 + mov w1, 0 + mov w5, -1 +.L2075: + ldrh w2, [x0, 2382] + cmp w2, w1 + bhi .L2076 + adrp x2, .LANCHOR4 + add x2, x2, :lo12:.LANCHOR4 + mov w3, -1 + add x1, x2, 928 + strh w3, [x2, 930] + strh w3, [x2, 928] + ldr w3, [x0, 2372] + strh w3, [x2, 938] + mov w3, -3902 + strh w3, [x2, 932] + ldrh w2, [x2, 1088] + strh w2, [x1, 8] + ldrh w2, [x0, 2380] + strh w2, [x1, 6] + ldr x2, [x0, 2720] + str x2, [x1, 16] + ldr x2, [x0, 2784] + str x2, [x1, 24] + ldr x2, [x0, 2728] + ldr x0, [x0, 2768] + stp x2, x0, [x1, 32] + ldr x19, [sp, 16] + ldp x29, x30, [sp], 32 + ret +.L2076: + ldr x3, [x0, 2792] + ubfiz x2, x1, 4, 16 + add x3, x3, x2 + str wzr, [x3, 4] + ldr x3, [x0, 2792] + strh w5, [x3, x2] + ldr x3, [x0, 2792] + ldr x4, [x0, 2800] + add x3, x3, x2 + ldrh w2, [x0, 2354] + mul w2, w2, w1 + add w1, w1, 1 + and w1, w1, 65535 + sxtw x2, w2 + and x2, x2, -4 + add x2, x4, x2 + str x2, [x3, 8] + b .L2075 + .size FtlL2PDataInit, .-FtlL2PDataInit + .align 2 + .global FtlLoadMapInfo + .type FtlLoadMapInfo, %function +FtlLoadMapInfo: + stp x29, x30, [sp, -16]! + add x29, sp, 0 + bl FtlL2PDataInit + adrp x0, .LANCHOR4 + add x0, x0, :lo12:.LANCHOR4 + add x0, x0, 928 + bl FtlMapTblRecovery + mov w0, 0 + ldp x29, x30, [sp], 16 + ret + .size FtlLoadMapInfo, .-FtlLoadMapInfo + .align 2 + .global ftl_sb_update_avl_pages + .type ftl_sb_update_avl_pages, %function +ftl_sb_update_avl_pages: + and w6, w1, 65535 + adrp x4, .LANCHOR2 + add x1, x4, :lo12:.LANCHOR2 + and w2, w2, 65535 + strh wzr, [x0, 4] + ldrh w3, [x1, 2276] + mov w1, 65535 +.L2081: + cmp w3, w2, uxth + bhi .L2083 + add x4, x4, :lo12:.LANCHOR2 + ubfiz x3, x3, 1, 16 + add x3, x3, 16 + add x2, x0, 16 + add x3, x0, x3 + mov w5, 65535 + ldrh w1, [x4, 2344] + sub w1, w1, #1 + and w1, w1, 65535 + sub w1, w1, w6 +.L2084: + cmp x2, x3 + bne .L2086 + ret +.L2083: + add x5, x0, w2, sxtw 1 + ldrh w5, [x5, 16] + cmp w5, w1 + beq .L2082 + ldrh w5, [x0, 4] + add w5, w5, 1 + strh w5, [x0, 4] +.L2082: + add w2, w2, 1 + b .L2081 +.L2086: + ldrh w4, [x2] + cmp w4, w5 + beq .L2085 + ldrh w4, [x0, 4] + add w4, w1, w4 + strh w4, [x0, 4] +.L2085: + add x2, x2, 2 + b .L2084 + .size ftl_sb_update_avl_pages, .-ftl_sb_update_avl_pages + .align 2 + .global FtlReUsePrevPpa + .type FtlReUsePrevPpa, %function +FtlReUsePrevPpa: + stp x29, x30, [sp, -64]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + mov w19, w0 + str x21, [sp, 32] + lsr w0, w1, 10 + str w1, [x29, 60] + bl P2V_block_in_plane + adrp x2, .LANCHOR2 + add x4, x2, :lo12:.LANCHOR2 + and w0, w0, 65535 + ubfiz x21, x0, 1, 16 + ldr x3, [x4, 2712] + ldrh w1, [x3, x21] + cbnz w1, .L2088 + mov x20, x2 + adrp x9, .LANCHOR4 + add x2, x9, :lo12:.LANCHOR4 + ldr x8, [x2, 768] + cbz x8, .L2089 + ldrh w3, [x2, 776] + mov w5, 65535 + ldr x2, [x4, 2808] + mov x4, -6148914691236517206 + movk x4, 0xaaab, lsl 0 + sub x8, x8, x2 + asr x8, x8, 1 + mul x8, x8, x4 + mov w4, 6 + and w8, w8, 65535 +.L2090: + cmp w1, w3 + beq .L2089 + cmp w8, w0 + bne .L2091 + add x9, x9, :lo12:.LANCHOR4 + mov w1, w8 + add x0, x9, 768 + bl List_remove_node + ldrh w0, [x9, 776] + sub w0, w0, #1 + strh w0, [x9, 776] + mov w0, w8 + bl INSERT_DATA_LIST + add x2, x20, :lo12:.LANCHOR2 + ldr x1, [x2, 2712] + ldrh w0, [x1, x21] + add w0, w0, 1 + strh w0, [x1, x21] +.L2089: + add x1, x29, 60 + mov w2, 1 + mov w0, w19 + bl log2phys + ldp x19, x20, [sp, 16] + ldr x21, [sp, 32] + ldp x29, x30, [sp], 64 + ret +.L2091: + umull x8, w8, w4 + ldrh w8, [x2, x8] + cmp w8, w5 + beq .L2089 + add w1, w1, 1 + and w1, w1, 65535 + b .L2090 +.L2088: + add w1, w1, 1 + strh w1, [x3, x21] + b .L2089 + .size FtlReUsePrevPpa, .-FtlReUsePrevPpa + .align 2 + .global make_superblock + .type make_superblock, %function +make_superblock: + mov x5, x0 + strh wzr, [x0, 4] + strb wzr, [x0, 7] + adrp x0, .LANCHOR2 + add x1, x0, :lo12:.LANCHOR2 + mov x7, 0 + add x8, x5, 16 + mov x6, x0 + add x9, x1, 2304 + mov w11, -1 + ldrh w10, [x1, 2276] + cmp w10, w7, uxth + bhi .L2117 + add x0, x0, :lo12:.LANCHOR2 + ldrb w1, [x5, 7] + strb wzr, [x5, 9] + ldrh w2, [x0, 2344] + mul w1, w1, w2 + strh w1, [x5, 4] + ldr w1, [x0, 2096] + cbz w1, .L2113 + ldrh w1, [x5] + ldr x0, [x0, 2696] + ldrh w0, [x0, x1, lsl 1] + cmp w0, 79 + bhi .L2113 + mov w0, 1 + strb w0, [x5, 9] +.L2113: + adrp x0, .LANCHOR0+88 + ldrb w0, [x0, #:lo12:.LANCHOR0+88] + cbz w0, .L2116 + mov w0, 1 + strb w0, [x5, 9] +.L2116: + mov w0, 0 + ret +.L2117: + stp x29, x30, [sp, -16]! + add x29, sp, 0 +.L2100: + ldrh w1, [x5] + ldrb w0, [x9, x7] + bl V2P_block + mov w4, w0 + strh w11, [x8] + bl FtlBbmIsBadBlock + cbnz w0, .L2099 + strh w4, [x8] + ldrb w0, [x5, 7] + add w0, w0, 1 + strb w0, [x5, 7] +.L2099: + add x7, x7, 1 + add x8, x8, 2 + cmp w10, w7, uxth + bhi .L2100 + add x0, x6, :lo12:.LANCHOR2 + ldrb w1, [x5, 7] + strb wzr, [x5, 9] + ldrh w2, [x0, 2344] + mul w1, w1, w2 + strh w1, [x5, 4] + ldr w1, [x0, 2096] + cbz w1, .L2101 + ldrh w1, [x5] + ldr x0, [x0, 2696] + ldrh w0, [x0, x1, lsl 1] + cmp w0, 79 + bhi .L2101 + mov w0, 1 + strb w0, [x5, 9] +.L2101: + adrp x0, .LANCHOR0+88 + ldrb w0, [x0, #:lo12:.LANCHOR0+88] + cbz w0, .L2102 + mov w0, 1 + strb w0, [x5, 9] +.L2102: + mov w0, 0 + ldp x29, x30, [sp], 16 + ret + .size make_superblock, .-make_superblock + .align 2 + .global FtlLoadSysInfo + .type FtlLoadSysInfo, %function +FtlLoadSysInfo: + sub sp, sp, #112 + mov w1, 0 + stp x29, x30, [sp, 16] + add x29, sp, 16 + stp x23, x24, [sp, 64] + stp x21, x22, [sp, 48] + adrp x22, .LANCHOR2 + add x24, x22, :lo12:.LANCHOR2 + stp x19, x20, [sp, 32] + add x20, x24, 2936 + stp x25, x26, [sp, 80] + stp x27, x28, [sp, 96] + adrp x19, .LANCHOR4 + ldr x0, [x24, 2576] + add x23, x19, :lo12:.LANCHOR4 + str x0, [x20, 8] + ldr x0, [x24, 2640] + str x0, [x20, 16] + ldr x0, [x24, 2712] + ldrh w2, [x24, 2284] + lsl w2, w2, 1 + bl ftl_memset + ldrh w0, [x23, 1072] + mov w1, 65535 + cmp w0, w1 + bne .L2119 +.L2130: + mov w0, -1 +.L2118: + ldp x19, x20, [sp, 32] + ldp x21, x22, [sp, 48] + ldp x23, x24, [sp, 64] + ldp x25, x26, [sp, 80] + ldp x27, x28, [sp, 96] + ldp x29, x30, [sp, 16] + add sp, sp, 112 + ret +.L2119: + add x25, x23, 1072 + mov w1, 1 + mov w26, 19539 + bl FtlGetLastWrittenPage + ldrsh w28, [x23, 1072] + sxth w21, w0 + adrp x23, .LANCHOR0 + add w0, w0, 1 + strh w0, [x25, 2] + add x25, x23, :lo12:.LANCHOR0 + movk w26, 0x4654, lsl 16 +.L2121: + tbnz w21, #31, .L2129 + orr w0, w21, w28, lsl 10 + str w0, [x20, 4] + ldr x0, [x24, 2576] + mov w2, 1 + str x0, [x20, 8] + mov w1, w2 + mov x0, x20 + bl FlashReadPages + ldrb w0, [x25, 88] + cbz w0, .L2122 + ldr x8, [x20, 16] + ldr w7, [x8, 12] + cbz w7, .L2122 + ldr x6, [x20, 8] + ldrh w1, [x24, 2354] + mov x0, x6 + bl js_hash + cmp w7, w0 + beq .L2122 + cbnz w21, .L2123 + add x0, x19, :lo12:.LANCHOR4 + add x27, x0, 1072 + ldrh w1, [x0, 1076] + cmp w28, w1 + beq .L2123 + ldrh w1, [x0, 1072] + ldr w0, [x6] + str w0, [sp] + adrp x0, .LC63 + add x0, x0, :lo12:.LC63 + ldp w4, w5, [x8] + ldr w6, [x8, 8] + ldp w2, w3, [x20] + bl printk + ldrsh w28, [x27, 4] + ldrh w21, [x24, 2346] +.L2125: + sub w21, w21, #1 + sxth w21, w21 + b .L2121 +.L2123: + mov w0, -1 + str w0, [x20] +.L2122: + ldr w0, [x20] + cmn w0, #1 + beq .L2125 + ldr x0, [x24, 2576] + ldr w0, [x0] + cmp w0, w26 + bne .L2125 + ldr x0, [x24, 2640] + ldrh w1, [x0] + mov w0, 61604 + cmp w1, w0 + bne .L2125 +.L2129: + add x20, x22, :lo12:.LANCHOR2 + add x0, x19, :lo12:.LANCHOR4 + add x21, x20, 2936 + mov w2, 48 + add x0, x0, 696 + add x23, x23, :lo12:.LANCHOR0 + ldr x1, [x21, 8] + bl ftl_memcpy + ldr x0, [x20, 2712] + ldrh w2, [x20, 2284] + ldr x1, [x21, 8] + lsl w2, w2, 1 + add x1, x1, 48 + bl ftl_memcpy + ldrh w1, [x20, 2284] + ldr x0, [x21, 8] + lsr w2, w1, 3 + ubfiz x1, x1, 1, 16 + add x1, x1, 51 + add w2, w2, 4 + and x1, x1, -4 + add x1, x0, x1 + ldr x0, [x23, 80] + bl ftl_memcpy + ldrh w0, [x20, 2384] + cbz w0, .L2127 + ldrh w1, [x20, 2284] + ldrh w2, [x20, 2380] + lsr w0, w1, 3 + add w1, w0, w1, lsl 1 + ldr x0, [x21, 8] + add w1, w1, 52 + lsl w2, w2, 2 + and x1, x1, 65532 + add x1, x0, x1 + ldr x0, [x20, 2776] + bl ftl_memcpy +.L2127: + add x2, x19, :lo12:.LANCHOR4 + mov w0, 19539 + movk w0, 0x4654, lsl 16 + add x1, x2, 696 + ldr w3, [x2, 696] + cmp w3, w0 + bne .L2130 + add x0, x22, :lo12:.LANCHOR2 + ldrh w4, [x2, 704] + ldrb w5, [x2, 706] + strh w4, [x2, 1078] + ldrh w3, [x0, 2298] + cmp w5, w3 + bne .L2130 + ldrh w3, [x0, 2344] + ldrh w5, [x0, 2350] + str w4, [x2, 1092] + strh wzr, [x2, 1106] + mul w3, w3, w4 + strb wzr, [x2, 1110] + str w3, [x0, 2924] + strb wzr, [x2, 1112] + mul w3, w5, w3 + ldrh w5, [x0, 2830] + str w3, [x0, 1224] + ldr w3, [x0, 2288] + sub w3, w3, w5 + ldrh w5, [x2, 710] + sub w3, w3, w4 + ldrh w4, [x0, 2276] + strh w5, [x2, 784] + udiv w3, w3, w4 + mov w4, -1 + strh w4, [x2, 1104] + ldrh w4, [x2, 718] + strh w4, [x2, 880] + strh w3, [x2, 1096] + ldrh w3, [x2, 712] + lsr w6, w3, 6 + and w3, w3, 63 + strb w3, [x2, 790] + ldrb w3, [x2, 707] + strb w3, [x2, 792] + ldrh w3, [x2, 714] + strh w3, [x2, 832] + ldrh w3, [x2, 716] + strh w6, [x2, 786] + lsr w6, w3, 6 + and w3, w3, 63 + strb w3, [x2, 838] + ldrb w3, [x2, 708] + strb w3, [x2, 840] + add x3, x2, 880 + strh w6, [x2, 834] + ldrh w2, [x2, 720] + lsr w4, w2, 6 + and w2, w2, 63 + strh w4, [x3, 2] + strb w2, [x3, 6] + ldrb w2, [x1, 13] + strb w2, [x3, 8] + add x3, x0, 2304 + ldr w2, [x1, 32] + str wzr, [x0, 2404] + str wzr, [x0, 2408] + ldr w1, [x1, 40] + stp wzr, wzr, [x3, 112] + stp wzr, w2, [x3, 120] + str wzr, [x0, 2432] + ldr w2, [x0, 2396] + str wzr, [x0, 2440] + cmp w1, w2 + bls .L2131 + str w1, [x0, 2396] +.L2131: + add x0, x19, :lo12:.LANCHOR4 + add x22, x22, :lo12:.LANCHOR2 + ldr w0, [x0, 732] + ldr w1, [x22, 2400] + cmp w0, w1 + bls .L2132 + str w0, [x22, 2400] +.L2132: + mov w0, 65535 + cmp w5, w0 + beq .L2133 + add x0, x19, :lo12:.LANCHOR4 + add x0, x0, 784 + bl make_superblock +.L2133: + add x1, x19, :lo12:.LANCHOR4 + add x0, x1, 832 + ldrh w2, [x1, 832] + mov w1, 65535 + cmp w2, w1 + beq .L2134 + bl make_superblock +.L2134: + add x1, x19, :lo12:.LANCHOR4 + add x0, x1, 880 + ldrh w2, [x1, 880] + mov w1, 65535 + cmp w2, w1 + beq .L2135 + bl make_superblock +.L2135: + add x19, x19, :lo12:.LANCHOR4 + mov w1, 65535 + add x0, x19, 1104 + ldrh w2, [x19, 1104] + cmp w2, w1 + beq .L2136 + bl make_superblock +.L2136: + mov w0, 0 + b .L2118 + .size FtlLoadSysInfo, .-FtlLoadSysInfo + .align 2 + .global FtlDumpBlockInfo + .type FtlDumpBlockInfo, %function +FtlDumpBlockInfo: + sub sp, sp, #160 + lsr w0, w0, 10 + stp x29, x30, [sp, 16] + add x29, sp, 16 + stp x19, x20, [sp, 32] + adrp x19, .LANCHOR2 + add x20, x19, :lo12:.LANCHOR2 + stp x21, x22, [sp, 48] + stp x23, x24, [sp, 64] + add x23, x29, 144 + stp x25, x26, [sp, 80] + and w25, w1, 255 + str x27, [sp, 96] + bl P2V_block_in_plane + adrp x1, .LANCHOR3 + add x1, x1, :lo12:.LANCHOR3 + and w22, w0, 65535 + add x1, x1, 168 + ldrh w24, [x20, 2344] + adrp x0, .LC49 + add x0, x0, :lo12:.LC49 + bl printk + ldr x1, [x20, 2712] + ubfiz x0, x22, 1, 16 + ldrh w2, [x1, x0] + mov w1, w22 + adrp x0, .LC64 + add x0, x0, :lo12:.LC64 + bl printk + strh w22, [x23, -48]! + mov x0, x23 + bl make_superblock + ldrb w0, [x20, 1220] + cbz w0, .L2157 + cbnz w25, .L2157 + mov w0, w22 + bl ftl_get_blk_mode + mov w22, w0 + cmp w0, 1 + bne .L2148 + ldrh w24, [x20, 2346] +.L2148: + add x19, x19, :lo12:.LANCHOR2 + mov w21, 0 + mov w26, 56 + mov w2, w24 + mov w1, w22 + adrp x0, .LC65 + ldrh w3, [x19, 2344] + add x0, x0, :lo12:.LC65 + bl printk +.L2149: + ldrh w7, [x19, 2276] + add x3, x23, 16 + ldrh w8, [x19, 2354] + mov w20, 0 + ldrh w9, [x19, 2356] + mov w0, 0 + mov w10, 65535 + mov w5, 4 +.L2150: + cmp w0, w7 + bne .L2152 + ldr x0, [x19, 2520] + mov w1, w20 + adrp x27, .LC59 + mov w2, w22 + umull x20, w20, w26 + mov x25, 0 + add x27, x27, :lo12:.LC59 + bl FlashReadPages +.L2153: + cmp x25, x20 + bne .L2154 + add w21, w21, 1 + and w21, w21, 65535 + cmp w24, w21 + bne .L2149 +.L2155: + ldp x19, x20, [sp, 32] + mov w0, 0 + ldp x21, x22, [sp, 48] + ldp x23, x24, [sp, 64] + ldp x25, x26, [sp, 80] + ldp x29, x30, [sp, 16] + ldr x27, [sp, 96] + add sp, sp, 160 + ret +.L2157: + mov w22, 0 + b .L2148 +.L2152: + ldrh w1, [x3] + cmp w1, w10 + beq .L2151 + umull x6, w20, w26 + ldr x4, [x19, 2520] + orr w1, w21, w1, lsl 10 + add x4, x4, x6 + str w1, [x4, 4] + mul w1, w20, w8 + ldr x2, [x19, 2520] + ldr x4, [x19, 2600] + sdiv w1, w1, w5 + add x2, x2, x6 + add x1, x4, w1, sxtw 2 + str x1, [x2, 8] + mul w1, w20, w9 + ldr x4, [x19, 2656] + add w20, w20, 1 + and w20, w20, 65535 + sdiv w1, w1, w5 + add x1, x4, w1, sxtw 2 + str x1, [x2, 16] +.L2151: + add w0, w0, 1 + add x3, x3, 2 + and w0, w0, 65535 + b .L2150 +.L2154: + ldr x8, [x19, 2520] + ldrh w1, [x29, 96] + add x2, x8, x25 + ldp x3, x0, [x2, 8] + ldr w4, [x3, 4] + str w4, [sp, 8] + ldr w3, [x3] + str w3, [sp] + ldp w4, w5, [x0] + ldp w6, w7, [x0, 8] + mov x0, x27 + ldr w3, [x2, 4] + ldr w2, [x8, x25] + add x25, x25, 56 + bl printk + b .L2153 + .size FtlDumpBlockInfo, .-FtlDumpBlockInfo + .align 2 + .global FtlScanAllBlock + .type FtlScanAllBlock, %function +FtlScanAllBlock: + sub sp, sp, #144 + adrp x1, .LANCHOR3 + add x1, x1, :lo12:.LANCHOR3 + adrp x0, .LC49 + add x1, x1, 192 + add x0, x0, :lo12:.LC49 + stp x29, x30, [sp, 16] + add x29, sp, 16 + stp x19, x20, [sp, 32] + mov w20, 0 + stp x21, x22, [sp, 48] + stp x23, x24, [sp, 64] + adrp x23, .LANCHOR2 + str x25, [sp, 80] + add x21, x23, :lo12:.LANCHOR2 + bl printk +.L2161: + add x19, x23, :lo12:.LANCHOR2 + ldrh w0, [x19, 2286] + cmp w0, w20 + bhi .L2169 + ldp x19, x20, [sp, 32] + mov w0, 0 + ldp x21, x22, [sp, 48] + ldp x23, x24, [sp, 64] + ldp x29, x30, [sp, 16] + ldr x25, [sp, 80] + add sp, sp, 144 + ret +.L2169: + strh w20, [x29, 80] + mov w0, w20 + bl ftl_get_blk_mode + mov w3, w0 + ldr x2, [x19, 2712] + ubfiz x1, x20, 1, 16 + adrp x0, .LC66 + add x0, x0, :lo12:.LC66 + ldrh w2, [x2, x1] + mov w1, w20 + bl printk + add x0, x29, 80 + bl make_superblock + add x3, x29, 96 + ldrh w7, [x19, 2276] + ldrh w8, [x19, 2354] + mov w0, 0 + ldrh w9, [x19, 2356] + mov w10, 65535 + mov w19, 0 + mov w11, 56 + mov w5, 4 +.L2162: + cmp w0, w7 + bne .L2164 + ldr x0, [x21, 2520] + mov w24, 56 + adrp x25, .LC67 + mov w2, 0 + mov w1, w19 + umull x24, w19, w24 + mov x22, 0 + add x25, x25, :lo12:.LC67 + bl FlashReadPages +.L2165: + cmp x22, x24 + bne .L2166 + ldr x0, [x21, 2520] + mov w1, w19 + adrp x24, .LC68 + mov w2, 1 + mov x19, 0 + add x24, x24, :lo12:.LC68 + bl FlashReadPages +.L2167: + cmp x22, x19 + bne .L2168 + add w20, w20, 1 + and w20, w20, 65535 + b .L2161 +.L2164: + ldrh w1, [x3] + cmp w1, w10 + beq .L2163 + umull x6, w19, w11 + ldr x4, [x21, 2520] + lsl w1, w1, 10 + add x4, x4, x6 + str w1, [x4, 4] + mul w1, w19, w8 + ldr x2, [x21, 2520] + ldr x4, [x21, 2600] + sdiv w1, w1, w5 + add x2, x2, x6 + add x1, x4, w1, sxtw 2 + str x1, [x2, 8] + mul w1, w19, w9 + ldr x4, [x21, 2656] + add w19, w19, 1 + and w19, w19, 65535 + sdiv w1, w1, w5 + add x1, x4, w1, sxtw 2 + str x1, [x2, 16] +.L2163: + add w0, w0, 1 + add x3, x3, 2 + and w0, w0, 65535 + b .L2162 +.L2166: + ldr x8, [x21, 2520] + ldrh w1, [x29, 80] + add x2, x8, x22 + ldp x3, x0, [x2, 8] + ldr w4, [x3, 4] + str w4, [sp, 8] + ldr w3, [x3] + str w3, [sp] + ldp w4, w5, [x0] + ldp w6, w7, [x0, 8] + mov x0, x25 + ldr w3, [x2, 4] + ldr w2, [x8, x22] + add x22, x22, 56 + bl printk + b .L2165 +.L2168: + ldr x8, [x21, 2520] + ldrh w1, [x29, 80] + add x2, x8, x19 + ldp x3, x0, [x2, 8] + ldr w4, [x3, 4] + str w4, [sp, 8] + ldr w3, [x3] + str w3, [sp] + ldp w4, w5, [x0] + ldp w6, w7, [x0, 8] + mov x0, x24 + ldr w3, [x2, 4] + ldr w2, [x8, x19] + add x19, x19, 56 + bl printk + b .L2167 + .size FtlScanAllBlock, .-FtlScanAllBlock + .align 2 + .global SupperBlkListInit + .type SupperBlkListInit, %function +SupperBlkListInit: + stp x29, x30, [sp, -64]! + mov w0, 6 + mov w1, 0 + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x19, .LANCHOR2 + add x19, x19, :lo12:.LANCHOR2 + stp x21, x22, [sp, 32] + stp x23, x24, [sp, 48] + adrp x20, .LANCHOR4 + add x23, x19, 2304 + mov w21, 0 + ldrh w2, [x19, 2286] + mov w22, 0 + mov w24, 0 + mul w2, w2, w0 + ldr x0, [x19, 2808] + bl ftl_memset + strh wzr, [x19, 2386] + add x0, x20, :lo12:.LANCHOR4 + strh wzr, [x0, 760] + strh wzr, [x0, 776] + str xzr, [x0, 744] + str xzr, [x0, 752] + str xzr, [x0, 768] +.L2172: + ldrh w0, [x19, 2284] + cmp w24, w0 + bge .L2179 + ldrh w8, [x19, 2276] + mov w5, 0 + ldrh w7, [x19, 2344] + mov w6, 0 + b .L2180 +.L2174: + ldrb w0, [x23, w6, sxtw] + mov w1, w24 + bl V2P_block + bl FtlBbmIsBadBlock + cbnz w0, .L2173 + add w5, w7, w5 + sxth w5, w5 +.L2173: + add w6, w6, 1 + sxth w6, w6 +.L2180: + cmp w6, w8 + blt .L2174 + cbz w5, .L2175 + mov w0, 32768 + sdiv w5, w0, w5 + sxth w5, w5 +.L2176: + ldr x1, [x19, 2808] + mov w0, 6 + smaddl x0, w24, w0, x1 + strh w5, [x0, 4] + add x0, x20, :lo12:.LANCHOR4 + ldrh w1, [x0, 784] + cmp w24, w1 + beq .L2177 + ldrh w1, [x0, 832] + cmp w24, w1 + beq .L2177 + ldrh w0, [x0, 880] + cmp w24, w0 + beq .L2177 + ldr x0, [x19, 2712] + ldrh w0, [x0, w24, sxtw 1] + cbnz w0, .L2178 + add w21, w21, 1 + mov w0, w24 + and w21, w21, 65535 + bl INSERT_FREE_LIST +.L2177: + add w24, w24, 1 + sxth w24, w24 + b .L2172 +.L2175: + ldr x0, [x19, 2712] + mov w1, -1 + strh w1, [x0, w24, sxtw 1] + b .L2176 +.L2178: + add w22, w22, 1 + mov w0, w24 + and w22, w22, 65535 + bl INSERT_DATA_LIST + b .L2177 +.L2179: + add x20, x20, :lo12:.LANCHOR4 + mov w0, 0 + ldp x23, x24, [sp, 48] + strh w22, [x20, 760] + strh w21, [x20, 776] + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x29, x30, [sp], 64 + ret + .size SupperBlkListInit, .-SupperBlkListInit + .align 2 + .global Ftl_save_ext_data + .type Ftl_save_ext_data, %function +Ftl_save_ext_data: + adrp x0, .LANCHOR4 + add x0, x0, :lo12:.LANCHOR4 + mov w1, 19539 + movk w1, 0x4654, lsl 16 + ldr w3, [x0, 1152] + cmp w3, w1 + bne .L2185 + stp x29, x30, [sp, -16]! + add x2, x0, 1152 + mov w1, 99 + add x29, sp, 0 + movk w1, 0x5000, lsl 16 + str w1, [x2, 4] + ldr w1, [x0, 1664] + ldr w0, [x0, 1668] + stp w1, w0, [x2, 88] + adrp x0, .LANCHOR2 + add x0, x0, :lo12:.LANCHOR2 + ldr w1, [x0, 2404] + str w1, [x2, 8] + ldr w1, [x0, 2408] + str w1, [x2, 12] + ldr w1, [x0, 2424] + str w1, [x2, 16] + ldr w1, [x0, 2420] + str w1, [x2, 20] + ldr w1, [x0, 2432] + str w1, [x2, 28] + ldr w1, [x0, 2436] + str w1, [x2, 32] + ldr w1, [x0, 2412] + str w1, [x2, 36] + ldr w1, [x0, 2416] + str w1, [x2, 40] + ldr w1, [x0, 2440] + str w1, [x2, 44] + ldr w1, [x0, 2444] + str w1, [x2, 48] + ldr w1, [x0, 2392] + ldr w0, [x0, 2388] + stp w1, w0, [x2, 60] + mov w1, 1 + mov w0, 0 + bl FtlVendorPartWrite + ldp x29, x30, [sp], 16 + ret +.L2185: + ret + .size Ftl_save_ext_data, .-Ftl_save_ext_data + .align 2 + .global FtlEctTblFlush + .type FtlEctTblFlush, %function +FtlEctTblFlush: + adrp x1, .LANCHOR2 + add x2, x1, :lo12:.LANCHOR2 + ldr w3, [x2, 2096] + cbz w3, .L2193 + ldr w2, [x2, 2444] + mov w3, 4 + cmp w2, 39 + mov w2, 32 + csel w2, w2, w3, hi +.L2189: + adrp x3, .LANCHOR4 + add x3, x3, :lo12:.LANCHOR4 + ldrh w4, [x3, 1672] + cmp w4, 31 + bhi .L2190 + add w4, w4, 1 + mov w2, 1 + strh w4, [x3, 1672] +.L2190: + cbnz w0, .L2191 + add x0, x1, :lo12:.LANCHOR2 + ldr x0, [x0, 2688] + ldr w3, [x0, 20] + ldr w0, [x0, 16] + add w2, w2, w3 + cmp w0, w2 + bcc .L2196 +.L2191: + add x0, x1, :lo12:.LANCHOR2 + stp x29, x30, [sp, -16]! + add x29, sp, 0 + ldr x1, [x0, 2688] + ldr w2, [x1, 16] + str w2, [x1, 20] + mov w2, 17221 + movk w2, 0x4254, lsl 16 + str w2, [x1] + ldr x2, [x0, 2688] + ldrh w1, [x0, 2672] + lsl w3, w1, 9 + str wzr, [x2, 4] + str w3, [x2, 12] + ldr w3, [x2, 8] + add w3, w3, 1 + str w3, [x2, 8] + ldr x2, [x0, 2688] + mov w0, 64 + bl FtlVendorPartWrite + bl Ftl_save_ext_data + mov w0, 0 + ldp x29, x30, [sp], 16 + ret +.L2193: + mov w2, 32 + b .L2189 +.L2196: + mov w0, 0 + ret + .size FtlEctTblFlush, .-FtlEctTblFlush + .align 2 + .global Ftl_load_ext_data + .type Ftl_load_ext_data, %function +Ftl_load_ext_data: + stp x29, x30, [sp, -48]! + mov w1, 1 + mov w0, 0 + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x19, .LANCHOR4 + add x20, x19, :lo12:.LANCHOR4 + stp x21, x22, [sp, 32] + add x22, x20, 1152 + mov w21, 19539 + mov x2, x22 + bl FtlVendorPartRead + ldr w0, [x20, 1152] + movk w21, 0x4654, lsl 16 + cmp w0, w21 + beq .L2199 + mov w2, 512 + mov w1, 0 + mov x0, x22 + bl ftl_memset + str w21, [x20, 1152] +.L2199: + add x1, x19, :lo12:.LANCHOR4 + mov w2, 19539 + movk w2, 0x4654, lsl 16 + add x0, x1, 1152 + adrp x20, .LANCHOR2 + ldr w3, [x1, 1152] + cmp w3, w2 + bne .L2200 + ldr w2, [x1, 1240] + str w2, [x1, 1664] + ldr w2, [x1, 1244] + str w2, [x1, 1668] + add x1, x20, :lo12:.LANCHOR2 + ldr w2, [x0, 8] + str w2, [x1, 2404] + ldr w2, [x0, 12] + str w2, [x1, 2408] + ldr w2, [x0, 16] + str w2, [x1, 2424] + ldr w2, [x0, 20] + str w2, [x1, 2420] + ldr w2, [x0, 28] + str w2, [x1, 2432] + ldr w2, [x0, 32] + str w2, [x1, 2436] + ldr w2, [x0, 36] + str w2, [x1, 2412] + ldr w2, [x0, 40] + str w2, [x1, 2416] + ldr w2, [x0, 44] + str w2, [x1, 2440] + ldr w2, [x0, 48] + ldr w0, [x0, 60] + str w0, [x1, 2392] + str w2, [x1, 2444] +.L2200: + add x0, x19, :lo12:.LANCHOR4 + add x1, x20, :lo12:.LANCHOR2 + mov w2, 34661 + add x0, x0, 1152 + movk w2, 0x1234, lsl 16 + ldr w3, [x0, 68] + str wzr, [x1, 2388] + cmp w3, w2 + bne .L2201 + ldrb w2, [x1, 1220] + cbz w2, .L2202 + str wzr, [x0, 68] + bl Ftl_save_ext_data +.L2201: + add x0, x20, :lo12:.LANCHOR2 + add x19, x19, :lo12:.LANCHOR4 + ldp x21, x22, [sp, 32] + ldrh w1, [x0, 2336] + ldr w3, [x0, 2428] + ldr w2, [x0, 2432] + ldrh w0, [x0, 2284] + madd w1, w1, w3, w2 + udiv w0, w1, w0 + str w0, [x19, 1676] + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 48 + ret +.L2202: + mov w0, 1 + str w0, [x1, 2096] + adrp x1, .LC69 + adrp x0, .LC48 + add x1, x1, :lo12:.LC69 + add x0, x0, :lo12:.LC48 + bl printk + b .L2201 + .size Ftl_load_ext_data, .-Ftl_load_ext_data + .align 2 + .global ftl_scan_all_ppa + .type ftl_scan_all_ppa, %function +ftl_scan_all_ppa: + sub sp, sp, #112 + stp x29, x30, [sp, 16] + add x29, sp, 16 + stp x19, x20, [sp, 32] + adrp x19, .LANCHOR2 + add x19, x19, :lo12:.LANCHOR2 + stp x23, x24, [sp, 64] + stp x25, x26, [sp, 80] + add x20, x19, 2936 + adrp x26, .LC70 + add x26, x26, :lo12:.LC70 + ldrh w23, [x19, 2342] + stp x21, x22, [sp, 48] + sub w23, w23, #16 + str x27, [sp, 96] + lsl w25, w23, 10 +.L2205: + ldrh w0, [x19, 2342] + cmp w23, w0 + blt .L2213 + adrp x1, .LANCHOR3 + add x1, x1, :lo12:.LANCHOR3 + add x1, x1, 208 + adrp x0, .LC73 + add x0, x0, :lo12:.LC73 + bl printk + ldp x19, x20, [sp, 32] + ldp x21, x22, [sp, 48] + ldp x23, x24, [sp, 64] + ldp x25, x26, [sp, 80] + ldp x29, x30, [sp, 16] + ldr x27, [sp, 96] + add sp, sp, 112 + ret +.L2213: + and w22, w23, 65535 + mov w0, w22 + bl ftl_get_blk_mode + ldrb w1, [x19, 1220] + cbz w1, .L2206 + ldrh w1, [x19, 2284] + cmp w23, w1 + bge .L2207 + ldrh w1, [x19, 2358] + cmp w23, w1 + blt .L2207 +.L2206: + cmp w0, 1 + bne .L2208 +.L2207: + ldrh w24, [x19, 2346] + mov w21, -2147483648 +.L2209: + mov w3, w21 + mov w2, w24 + mov w1, w23 + mov x0, x26 + bl printk + mov w0, w22 + bl FtlBbmIsBadBlock + cbz w0, .L2210 + adrp x0, .LC71 + mov w3, w21 + mov w2, w24 + mov w1, w23 + add x0, x0, :lo12:.LC71 + bl printk +.L2210: + adrp x27, .LC72 + add w21, w21, w25 + add x27, x27, :lo12:.LC72 + mov w22, 0 +.L2211: + cmp w22, w24 + bne .L2212 + add w23, w23, 1 + add w25, w25, 1024 + b .L2205 +.L2208: + ldrh w24, [x19, 2344] + mov w21, 0 + b .L2209 +.L2212: + add w0, w21, w22 + stp wzr, w0, [x20] + ldr x0, [x19, 2576] + mov w2, 0 + str x0, [x20, 8] + mov w1, 1 + ldr x0, [x19, 2640] + add w22, w22, 1 + str x0, [x20, 16] + mov x0, x20 + bl FlashReadPages + ldp x1, x0, [x20, 8] + ldr w2, [x1, 4] + str w2, [sp] + ldp w3, w4, [x0] + ldp w5, w6, [x0, 8] + mov x0, x27 + ldr w7, [x1] + ldp w2, w1, [x20] + bl printk + b .L2211 + .size ftl_scan_all_ppa, .-ftl_scan_all_ppa + .align 2 + .global update_multiplier_value + .type update_multiplier_value, %function +update_multiplier_value: + and w8, w0, 65535 + adrp x0, .LANCHOR2 + add x1, x0, :lo12:.LANCHOR2 + mov x9, 0 + mov w6, 0 + mov x5, x0 + add x7, x1, 2304 + ldrh w10, [x1, 2276] + ldrh w11, [x1, 2344] + cmp w10, w9, uxth + bhi .L2233 + cbz w6, .L2231 + mov w0, 32768 + sdiv w6, w0, w6 +.L2232: + add x0, x5, :lo12:.LANCHOR2 + mov w1, 6 + ldr x0, [x0, 2808] + umaddl x8, w8, w1, x0 + mov w0, 0 + strh w6, [x8, 4] + ret +.L2226: + mov w6, 0 + b .L2225 +.L2231: + mov w6, 0 + b .L2232 +.L2233: + stp x29, x30, [sp, -16]! + add x29, sp, 0 +.L2224: + ldrb w0, [x7, x9] + mov w1, w8 + bl V2P_block + bl FtlBbmIsBadBlock + cbnz w0, .L2223 + add w6, w6, w11 + and w6, w6, 65535 +.L2223: + add x9, x9, 1 + cmp w10, w9, uxth + bhi .L2224 + cbz w6, .L2226 + mov w0, 32768 + sdiv w6, w0, w6 +.L2225: + add x0, x5, :lo12:.LANCHOR2 + mov w1, 6 + ldr x0, [x0, 2808] + umaddl x8, w8, w1, x0 + mov w0, 0 + strh w6, [x8, 4] + ldp x29, x30, [sp], 16 + ret + .size update_multiplier_value, .-update_multiplier_value + .align 2 + .global GetFreeBlockMinEraseCount + .type GetFreeBlockMinEraseCount, %function +GetFreeBlockMinEraseCount: + adrp x0, .LANCHOR4+768 + ldr x0, [x0, #:lo12:.LANCHOR4+768] + cbz x0, .L2236 + adrp x1, .LANCHOR2 + add x1, x1, :lo12:.LANCHOR2 + ldr x2, [x1, 2808] + ldr x1, [x1, 2696] + sub x0, x0, x2 + mov x2, -6148914691236517206 + asr x0, x0, 1 + movk x2, 0xaaab, lsl 0 + mul x0, x0, x2 + and x0, x0, 65535 + ldrh w0, [x1, x0, lsl 1] + ret +.L2236: + mov w0, 0 + ret + .size GetFreeBlockMinEraseCount, .-GetFreeBlockMinEraseCount + .align 2 + .global GetFreeBlockMaxEraseCount + .type GetFreeBlockMaxEraseCount, %function +GetFreeBlockMaxEraseCount: + adrp x2, .LANCHOR4 + add x2, x2, :lo12:.LANCHOR4 + and w0, w0, 65535 + ldr x1, [x2, 768] + cbz x1, .L2244 + ldrh w2, [x2, 776] + mov w3, 7 + mov w6, 6 + mov w7, 65535 + mul w2, w2, w3 + asr w2, w2, 3 + cmp w0, w2 + csel w0, w2, w0, gt + adrp x2, .LANCHOR2 + add x3, x2, :lo12:.LANCHOR2 + ldr x4, [x3, 2808] + mov x3, -6148914691236517206 + movk x3, 0xaaab, lsl 0 + sub x1, x1, x4 + asr x1, x1, 1 + mul x1, x1, x3 + mov w3, 0 + and w1, w1, 65535 +.L2240: + cmp w0, w3 + beq .L2243 + umull x5, w1, w6 + ldrh w5, [x4, x5] + cmp w5, w7 + bne .L2241 +.L2243: + add x2, x2, :lo12:.LANCHOR2 + ubfiz x1, x1, 1, 16 + ldr x0, [x2, 2696] + ldrh w0, [x0, x1] + ret +.L2241: + add w3, w3, 1 + mov w1, w5 + and w3, w3, 65535 + b .L2240 +.L2244: + mov w0, 0 + ret + .size GetFreeBlockMaxEraseCount, .-GetFreeBlockMaxEraseCount + .align 2 + .global FtlPrintInfo2buf + .type FtlPrintInfo2buf, %function +FtlPrintInfo2buf: + stp x29, x30, [sp, -112]! + adrp x1, .LC74 + add x1, x1, :lo12:.LC74 + add x29, sp, 0 + stp x23, x24, [sp, 48] + adrp x23, .LANCHOR2 + stp x21, x22, [sp, 32] + add x22, x23, :lo12:.LANCHOR2 + stp x19, x20, [sp, 16] + mov x24, x0 + stp x25, x26, [sp, 64] + add x20, x24, 12 + stp x27, x28, [sp, 80] + bl strcpy + ldr w2, [x22, 1192] + mov x0, x20 + adrp x1, .LC75 + add x1, x1, :lo12:.LC75 + bl sprintf + add x20, x20, w0, sxtw + ldr w2, [x22, 2360] + mov x0, x20 + adrp x1, .LC76 + add x1, x1, :lo12:.LC76 + bl sprintf + add x20, x20, w0, sxtw + adrp x0, .LANCHOR1+3448 + ldr w0, [x0, #:lo12:.LANCHOR1+3448] + cmp w0, 1 + beq .L2246 + sub w0, w20, w24 +.L2245: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 112 + ret +.L2246: + add x3, x29, 108 + add x2, x29, 104 + add x1, x29, 100 + add x0, x29, 96 + bl NandcGetTimeCfg + adrp x26, .LANCHOR4 + ldp w4, w5, [x29, 104] + adrp x1, .LC77 + ldp w2, w3, [x29, 96] + add x1, x1, :lo12:.LC77 + mov x0, x20 + add x25, x26, :lo12:.LANCHOR4 + bl sprintf + add x21, x20, w0, sxtw + mov x0, x21 + adrp x1, .LC78 + add x1, x1, :lo12:.LC78 + bl strcpy + ldr w2, [x22, 2924] + add x21, x21, 10 + mov x0, x21 + adrp x1, .LC79 + add x1, x1, :lo12:.LC79 + bl sprintf + add x21, x21, w0, sxtw + ldr w2, [x25, 1068] + mov x0, x21 + adrp x1, .LC80 + add x1, x1, :lo12:.LC80 + bl sprintf + add x21, x21, w0, sxtw + ldr w2, [x22, 2424] + mov x0, x21 + adrp x1, .LC81 + add x1, x1, :lo12:.LC81 + bl sprintf + add x21, x21, w0, sxtw + ldr w2, [x22, 2412] + mov x0, x21 + adrp x1, .LC82 + add x1, x1, :lo12:.LC82 + bl sprintf + add x21, x21, w0, sxtw + ldr w2, [x22, 2408] + mov x0, x21 + adrp x1, .LC83 + add x1, x1, :lo12:.LC83 + bl sprintf + add x21, x21, w0, sxtw + ldr w2, [x22, 2416] + mov x0, x21 + adrp x1, .LC84 + add x1, x1, :lo12:.LC84 + bl sprintf + add x21, x21, w0, sxtw + ldr w2, [x22, 2420] + mov x0, x21 + adrp x1, .LC85 + add x1, x1, :lo12:.LC85 + bl sprintf + add x21, x21, w0, sxtw + ldr w2, [x22, 2404] + mov x0, x21 + adrp x1, .LC86 + add x1, x1, :lo12:.LC86 + bl sprintf + add x21, x21, w0, sxtw + ldr w2, [x25, 1664] + mov x0, x21 + adrp x1, .LC87 + add x1, x1, :lo12:.LC87 + lsr w2, w2, 11 + bl sprintf + ldr w2, [x25, 1668] + add x21, x21, w0, sxtw + mov x0, x21 + adrp x1, .LC88 + add x1, x1, :lo12:.LC88 + lsr w2, w2, 11 + bl sprintf + ldr w2, [x22, 2396] + add x21, x21, w0, sxtw + mov x0, x21 + adrp x1, .LC89 + add x1, x1, :lo12:.LC89 + bl sprintf + add x21, x21, w0, sxtw + ldr w2, [x22, 2400] + adrp x1, .LC90 + add x1, x1, :lo12:.LC90 + mov x0, x21 + bl sprintf + add x21, x21, w0, sxtw + bl FtlBbtCalcTotleCnt + and w3, w0, 65535 + ldrh w2, [x22, 2830] + mov x0, x21 + adrp x1, .LC91 + add x1, x1, :lo12:.LC91 + bl sprintf + add x21, x21, w0, sxtw + ldrh w2, [x25, 776] + mov x0, x21 + adrp x1, .LC92 + add x1, x1, :lo12:.LC92 + bl sprintf + add x21, x21, w0, sxtw + ldr w2, [x22, 2428] + mov x0, x21 + adrp x1, .LC93 + add x1, x1, :lo12:.LC93 + bl sprintf + add x21, x21, w0, sxtw + ldr w2, [x22, 2432] + mov x0, x21 + adrp x1, .LC94 + add x1, x1, :lo12:.LC94 + bl sprintf + add x21, x21, w0, sxtw + ldr w2, [x25, 1676] + mov x0, x21 + adrp x1, .LC95 + add x1, x1, :lo12:.LC95 + bl sprintf + add x21, x21, w0, sxtw + ldr w2, [x22, 2436] + mov x0, x21 + adrp x1, .LC96 + add x1, x1, :lo12:.LC96 + bl sprintf + add x21, x21, w0, sxtw + ldr w2, [x22, 2440] + mov x0, x21 + adrp x1, .LC97 + add x1, x1, :lo12:.LC97 + bl sprintf + add x21, x21, w0, sxtw + ldr w2, [x22, 2444] + mov x0, x21 + adrp x1, .LC98 + add x1, x1, :lo12:.LC98 + bl sprintf + add x21, x21, w0, sxtw + ldrh w2, [x25, 726] + mov x0, x21 + adrp x1, .LC99 + add x1, x1, :lo12:.LC99 + bl sprintf + add x21, x21, w0, sxtw + ldrh w2, [x25, 724] + mov x0, x21 + adrp x1, .LC100 + add x1, x1, :lo12:.LC100 + bl sprintf + add x21, x21, w0, sxtw + ldr w2, [x22, 1224] + mov x0, x21 + adrp x1, .LC101 + add x1, x1, :lo12:.LC101 + bl sprintf + add x21, x21, w0, sxtw + ldr w2, [x22, 2376] + mov x0, x21 + adrp x1, .LC102 + add x1, x1, :lo12:.LC102 + bl sprintf + add x21, x21, w0, sxtw + ldr w2, [x22, 2272] + mov x0, x21 + adrp x1, .LC103 + add x1, x1, :lo12:.LC103 + bl sprintf + add x21, x21, w0, sxtw + ldrh w2, [x22, 2998] + mov x0, x21 + adrp x1, .LC104 + add x1, x1, :lo12:.LC104 + bl sprintf + add x21, x21, w0, sxtw + ldrh w2, [x22, 2284] + mov x0, x21 + adrp x1, .LC105 + add x1, x1, :lo12:.LC105 + bl sprintf + add x21, x21, w0, sxtw + ldrh w2, [x25, 1096] + mov x0, x21 + adrp x1, .LC106 + add x1, x1, :lo12:.LC106 + bl sprintf + add x21, x21, w0, sxtw + ldr w2, [x22, 2288] + mov x0, x21 + adrp x1, .LC107 + add x1, x1, :lo12:.LC107 + bl sprintf + add x21, x21, w0, sxtw + ldrh w2, [x25, 1072] + mov x0, x21 + adrp x1, .LC108 + add x1, x1, :lo12:.LC108 + bl sprintf + add x21, x21, w0, sxtw + ldrh w2, [x22, 2824] + mov x0, x21 + adrp x1, .LC109 + add x1, x1, :lo12:.LC109 + bl sprintf + add x21, x21, w0, sxtw + ldrh w2, [x25, 786] + mov x0, x21 + adrp x1, .LC110 + add x1, x1, :lo12:.LC110 + bl sprintf + add x21, x21, w0, sxtw + ldrb w2, [x25, 790] + mov x0, x21 + adrp x1, .LC111 + add x1, x1, :lo12:.LC111 + bl sprintf + add x21, x21, w0, sxtw + ldrh w2, [x25, 784] + mov x0, x21 + adrp x1, .LC112 + add x1, x1, :lo12:.LC112 + bl sprintf + add x21, x21, w0, sxtw + ldrb w2, [x25, 792] + mov x0, x21 + adrp x1, .LC113 + add x1, x1, :lo12:.LC113 + bl sprintf + add x21, x21, w0, sxtw + ldrh w2, [x25, 788] + mov x0, x21 + adrp x1, .LC114 + add x1, x1, :lo12:.LC114 + bl sprintf + add x21, x21, w0, sxtw + ldrh w1, [x25, 784] + ldr x0, [x22, 2712] + ldrh w2, [x0, x1, lsl 1] + mov x0, x21 + adrp x1, .LC115 + add x1, x1, :lo12:.LC115 + bl sprintf + add x21, x21, w0, sxtw + ldrh w2, [x25, 834] + mov x0, x21 + adrp x1, .LC116 + add x1, x1, :lo12:.LC116 + bl sprintf + add x21, x21, w0, sxtw + ldrb w2, [x25, 838] + mov x0, x21 + adrp x1, .LC117 + add x1, x1, :lo12:.LC117 + bl sprintf + add x21, x21, w0, sxtw + ldrh w2, [x25, 832] + mov x0, x21 + adrp x1, .LC118 + add x1, x1, :lo12:.LC118 + bl sprintf + add x21, x21, w0, sxtw + ldrb w2, [x25, 840] + mov x0, x21 + adrp x1, .LC119 + add x1, x1, :lo12:.LC119 + bl sprintf + add x21, x21, w0, sxtw + ldrh w2, [x25, 836] + mov x0, x21 + adrp x1, .LC120 + add x1, x1, :lo12:.LC120 + bl sprintf + add x21, x21, w0, sxtw + ldrh w1, [x25, 832] + ldr x0, [x22, 2712] + ldrh w2, [x0, x1, lsl 1] + mov x0, x21 + adrp x1, .LC121 + add x1, x1, :lo12:.LC121 + bl sprintf + add x21, x21, w0, sxtw + ldrh w2, [x25, 882] + mov x0, x21 + adrp x1, .LC122 + add x1, x1, :lo12:.LC122 + bl sprintf + add x21, x21, w0, sxtw + ldrb w2, [x25, 886] + mov x0, x21 + adrp x1, .LC123 + add x1, x1, :lo12:.LC123 + bl sprintf + add x21, x21, w0, sxtw + ldrh w2, [x25, 880] + mov x0, x21 + adrp x1, .LC124 + add x1, x1, :lo12:.LC124 + bl sprintf + add x21, x21, w0, sxtw + ldrb w2, [x25, 888] + mov x0, x21 + adrp x1, .LC125 + add x1, x1, :lo12:.LC125 + bl sprintf + add x21, x21, w0, sxtw + ldrh w2, [x25, 884] + mov x0, x21 + adrp x1, .LC126 + add x1, x1, :lo12:.LC126 + bl sprintf + add x21, x21, w0, sxtw + ldrh w2, [x25, 1106] + mov x0, x21 + adrp x1, .LC127 + add x1, x1, :lo12:.LC127 + bl sprintf + add x21, x21, w0, sxtw + ldrb w2, [x25, 1110] + mov x0, x21 + adrp x1, .LC128 + add x1, x1, :lo12:.LC128 + bl sprintf + add x21, x21, w0, sxtw + ldrh w2, [x25, 1104] + mov x0, x21 + adrp x1, .LC129 + add x1, x1, :lo12:.LC129 + bl sprintf + add x21, x21, w0, sxtw + ldrb w2, [x25, 1112] + mov x0, x21 + adrp x1, .LC130 + add x1, x1, :lo12:.LC130 + bl sprintf + add x21, x21, w0, sxtw + ldrh w2, [x25, 1108] + mov x0, x21 + adrp x1, .LC131 + add x1, x1, :lo12:.LC131 + bl sprintf + add x21, x21, w0, sxtw + ldr w5, [x25, 1228] + adrp x1, .LC132 + ldr w3, [x25, 1232] + add x1, x1, :lo12:.LC132 + ldr w4, [x25, 1236] + ldr w0, [x22, 2096] + ldr w2, [x22, 2392] + orr w2, w0, w2, lsl 8 + mov x0, x21 + bl sprintf + add x19, x21, w0, sxtw + ldr w2, [x25, 1224] + mov x0, x19 + adrp x1, .LC133 + add x1, x1, :lo12:.LC133 + bl sprintf + add x19, x19, w0, sxtw + ldr w2, [x25, 1248] + mov x0, x19 + adrp x1, .LC134 + add x1, x1, :lo12:.LC134 + bl sprintf + add x19, x19, w0, sxtw + ldrh w2, [x22, 2480] + mov x0, x19 + adrp x1, .LC135 + add x1, x1, :lo12:.LC135 + bl sprintf + add x19, x19, w0, sxtw + ldrh w2, [x22, 2482] + mov x0, x19 + adrp x1, .LC136 + add x1, x1, :lo12:.LC136 + bl sprintf + add x19, x19, w0, sxtw + ldr w2, [x22, 2464] + mov x0, x19 + adrp x1, .LC137 + add x1, x1, :lo12:.LC137 + bl sprintf + add x19, x19, w0, sxtw + ldrh w2, [x22, 2484] + adrp x1, .LC138 + add x1, x1, :lo12:.LC138 + mov x0, x19 + bl sprintf + add x19, x19, w0, sxtw + bl GetFreeBlockMinEraseCount + and w2, w0, 65535 + adrp x1, .LC139 + mov x0, x19 + add x1, x1, :lo12:.LC139 + bl sprintf + add x19, x19, w0, sxtw + ldrh w0, [x25, 776] + bl GetFreeBlockMaxEraseCount + and w2, w0, 65535 + adrp x1, .LC140 + mov x0, x19 + add x1, x1, :lo12:.LC140 + bl sprintf + add x19, x19, w0, sxtw + ldrh w0, [x25, 1104] + mov w1, 65535 + cmp w0, w1 + beq .L2248 + ldr x1, [x22, 2712] + ubfiz x0, x0, 1, 16 + ldrh w2, [x1, x0] + mov x0, x19 + adrp x1, .LC141 + add x1, x1, :lo12:.LC141 + bl sprintf + add x19, x19, w0, sxtw +.L2248: + mov w0, 0 + adrp x22, .LC142 + bl List_get_gc_head_node + add x21, x23, :lo12:.LANCHOR2 + and w3, w0, 65535 + add x22, x22, :lo12:.LC142 + mov w20, 0 + mov w28, 65535 + mov w27, 6 +.L2250: + cmp w3, w28 + beq .L2249 + umull x25, w3, w27 + ldr x0, [x21, 2808] + ldr x4, [x21, 2696] + ubfiz x1, x3, 1, 16 + ldr x2, [x21, 2712] + add x0, x0, x25 + ldrh w6, [x4, x1] + ldrh w5, [x0, 4] + mov x0, x19 + ldrh w4, [x2, x1] + mov w2, w20 + mov x1, x22 + add w20, w20, 1 + bl sprintf + add x19, x19, w0, sxtw + ldr x0, [x21, 2808] + cmp w20, 16 + ldrh w3, [x0, x25] + bne .L2250 +.L2249: + add x26, x26, :lo12:.LANCHOR4 + add x23, x23, :lo12:.LANCHOR2 + adrp x21, .LC143 + add x21, x21, :lo12:.LC143 + mov w20, 0 + mov w25, 65535 + ldr x0, [x23, 2808] + ldr x3, [x26, 768] + mov w26, 6 + sub x3, x3, x0 + mov x0, -6148914691236517206 + asr x3, x3, 1 + movk x0, 0xaaab, lsl 0 + mul x3, x3, x0 + and w3, w3, 65535 +.L2252: + cmp w3, w25 + beq .L2251 + umull x22, w3, w26 + ldr x0, [x23, 2808] + ldr x2, [x23, 2696] + ubfiz x1, x3, 1, 16 + add x0, x0, x22 + ldrh w5, [x2, x1] + mov w2, w20 + ldrh w4, [x0, 4] + mov x1, x21 + mov x0, x19 + add w20, w20, 1 + bl sprintf + add x19, x19, w0, sxtw + cmp w20, 4 + beq .L2251 + ldr x0, [x23, 2808] + ldrh w3, [x0, x22] + b .L2252 +.L2251: + sub w0, w19, w24 + b .L2245 + .size FtlPrintInfo2buf, .-FtlPrintInfo2buf + .align 2 + .global ftl_proc_ftl_read + .type ftl_proc_ftl_read, %function +ftl_proc_ftl_read: + stp x29, x30, [sp, -32]! + adrp x2, .LC144 + adrp x1, .LC48 + add x2, x2, :lo12:.LC144 + add x29, sp, 0 + add x1, x1, :lo12:.LC48 + stp x19, x20, [sp, 16] + mov x20, x0 + bl sprintf + add x19, x20, w0, sxtw + mov x0, x19 + bl FtlPrintInfo2buf + add x0, x19, w0, sxtw + sub w0, w0, w20 + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 32 + ret + .size ftl_proc_ftl_read, .-ftl_proc_ftl_read + .align 2 + .global GetSwlReplaceBlock + .type GetSwlReplaceBlock, %function +GetSwlReplaceBlock: + stp x29, x30, [sp, -32]! + adrp x9, .LANCHOR4 + add x0, x9, :lo12:.LANCHOR4 + adrp x8, .LANCHOR2 + add x29, sp, 0 + stp x19, x20, [sp, 16] + ldr w2, [x0, 1676] + add x0, x8, :lo12:.LANCHOR2 + ldr w1, [x0, 2444] + cmp w2, w1 + bcs .L2261 + ldrh w2, [x0, 2284] + mov x1, 0 + ldr x4, [x0, 2696] + str wzr, [x0, 2428] +.L2262: + cmp w2, w1 + bhi .L2263 + add x1, x8, :lo12:.LANCHOR2 + add x3, x9, :lo12:.LANCHOR4 + ldr w0, [x1, 2428] + udiv w2, w0, w2 + str w2, [x3, 1676] + ldr w2, [x1, 2432] + sub w0, w0, w2 + ldrh w2, [x1, 2336] + udiv w0, w0, w2 + str w0, [x1, 2428] +.L2264: + add x0, x8, :lo12:.LANCHOR2 + add x1, x9, :lo12:.LANCHOR4 + ldr w10, [x0, 2444] + ldr w11, [x1, 1676] + add w1, w10, 256 + cmp w1, w11 + bls .L2269 + ldr w2, [x0, 2440] + add w1, w10, 768 + cmp w1, w2 + bls .L2269 + ldr w0, [x0, 2096] + cbnz w0, .L2270 +.L2272: + mov w20, 65535 +.L2271: + mov w0, w20 + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 32 + ret +.L2263: + ldrh w3, [x4, x1, lsl 1] + add x1, x1, 1 + ldr w5, [x0, 2428] + add w3, w3, w5 + str w3, [x0, 2428] + b .L2262 +.L2261: + ldr w1, [x0, 2440] + cmp w2, w1 + bls .L2264 + add w1, w1, 1 + str w1, [x0, 2440] + mov w1, 0 +.L2266: + ldrh w2, [x0, 2284] + cmp w1, w2 + bcs .L2264 + ldr x4, [x0, 2696] + ubfiz x3, x1, 1, 32 + add w1, w1, 1 + ldrh w2, [x4, x3] + add w2, w2, 1 + strh w2, [x4, x3] + b .L2266 +.L2270: + cmp w10, 40 + bhi .L2272 +.L2269: + add x0, x9, :lo12:.LANCHOR4 + ldrh w0, [x0, 776] + add w0, w0, w0, lsl 1 + lsr w0, w0, 2 + bl GetFreeBlockMaxEraseCount + and w6, w0, 65535 + add w0, w10, 64 + cmp w6, w0 + bcs .L2273 + cmp w10, 40 + bhi .L2272 +.L2273: + add x9, x9, :lo12:.LANCHOR4 + ldr x0, [x9, 744] + cbz x0, .L2272 + add x1, x8, :lo12:.LANCHOR2 + mov w4, 65535 + mov x13, -6148914691236517206 + mov w2, w4 + mov w9, w4 + movk x13, 0xaaab, lsl 0 + ldrh w12, [x1, 2284] + mov w14, 6 + ldr x5, [x1, 2696] + ldr x7, [x1, 2808] + mov w1, 0 +.L2274: + ldrh w3, [x0] + cmp w3, w9 + bne .L2277 + mov w20, w2 +.L2276: + mov w0, 65535 + cmp w20, w0 + beq .L2272 + ubfiz x7, x20, 1, 32 + ldrh w3, [x5, x7] + cmp w10, w3 + bcs .L2278 + bl GetFreeBlockMinEraseCount + cmp w10, w0, uxth + bcs .L2278 + add x0, x8, :lo12:.LANCHOR2 + str w4, [x0, 2444] +.L2278: + cmp w11, w3 + bls .L2272 + add w0, w3, 128 + cmp w6, w0 + ble .L2272 + add w0, w3, 256 + cmp w11, w0 + bhi .L2279 + add x0, x8, :lo12:.LANCHOR2 + add w3, w3, 768 + ldr w0, [x0, 2440] + cmp w3, w0 + bcs .L2272 +.L2279: + add x19, x8, :lo12:.LANCHOR2 + ldrh w5, [x5, x7] + mov w2, w11 + mov w1, w20 + ldr x0, [x19, 2712] + ldr w3, [x19, 2440] + ldrh w4, [x0, x7] + adrp x0, .LC145 + add x0, x0, :lo12:.LC145 + bl printk + mov w0, 1 + str w0, [x19, 2452] + b .L2271 +.L2277: + add w1, w1, 1 + and w1, w1, 65535 + cmp w1, w12 + bhi .L2272 + ldrh w15, [x0, 4] + cbz w15, .L2275 + sub x0, x0, x7 + asr x0, x0, 1 + mul x0, x0, x13 + and w20, w0, 65535 + and x0, x0, 65535 + ldrh w0, [x5, x0, lsl 1] + cmp w10, w0 + bcs .L2276 + cmp w4, w0 + bls .L2275 + mov w4, w0 + mov w2, w20 +.L2275: + umaddl x0, w3, w14, x7 + b .L2274 + .size GetSwlReplaceBlock, .-GetSwlReplaceBlock + .align 2 + .global free_data_superblock + .type free_data_superblock, %function +free_data_superblock: + and w0, w0, 65535 + mov w1, 65535 + cmp w0, w1 + beq .L2290 + stp x29, x30, [sp, -16]! + adrp x2, .LANCHOR2+2712 + ubfiz x1, x0, 1, 16 + add x29, sp, 0 + ldr x2, [x2, #:lo12:.LANCHOR2+2712] + strh wzr, [x2, x1] + bl INSERT_FREE_LIST + mov w0, 0 + ldp x29, x30, [sp], 16 + ret +.L2290: + mov w0, 0 + ret + .size free_data_superblock, .-free_data_superblock + .align 2 + .global allocate_data_superblock + .type allocate_data_superblock, %function +allocate_data_superblock: + stp x29, x30, [sp, -128]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + stp x21, x22, [sp, 32] + adrp x21, .LANCHOR2 + add x19, x21, :lo12:.LANCHOR2 + stp x23, x24, [sp, 48] + stp x25, x26, [sp, 64] + stp x27, x28, [sp, 80] + ldr w1, [x19, 2928] + cbnz w1, .L2294 + adrp x23, .LANCHOR4 + add x22, x23, :lo12:.LANCHOR4 + mov x20, x0 + add x24, x22, 768 +.L2295: + add x0, x23, :lo12:.LANCHOR4 + add x1, x0, 880 + cmp x20, x1 + bne .L2296 + ldrh w2, [x0, 776] + ldr w3, [x19, 2452] + lsr w0, w2, 1 + add w4, w0, 1 + mul w1, w2, w3 + add w1, w4, w1, lsr 2 + ldr w4, [x19, 2096] + and w1, w1, 65535 + cbz w4, .L2297 + ldr w4, [x19, 2444] + cmp w4, 39 + bhi .L2297 + cmp w4, 2 + bls .L2324 + tbz x2, 0, .L2320 + cbz w3, .L2324 +.L2320: + mov w1, w0 + b .L2297 +.L2296: + ldrb w1, [x20, 8] + cmp w1, 1 + bne .L2324 + ldrh w1, [x19, 2296] + cmp w1, 1 + beq .L2324 + ldrb w1, [x19, 1220] + cbnz w1, .L2324 + ldr w2, [x19, 2096] + ldrh w0, [x0, 776] + lsr w1, w0, 3 + cbz w2, .L2297 + ldr w2, [x19, 2444] + cmp w2, 1 + bhi .L2297 + mov w1, 7 + mul w1, w0, w1 + lsr w1, w1, 3 +.L2297: + cbz w1, .L2298 + sub w1, w1, #1 + and w1, w1, 65535 +.L2298: + ldrb w2, [x20, 8] + mov x0, x24 + bl List_pop_index_node + and w27, w0, 65535 + ldrh w0, [x22, 776] + sub w0, w0, #1 + strh w0, [x22, 776] + ldrh w0, [x19, 2284] + cmp w0, w27 + bls .L2295 + ldr x0, [x19, 2712] + ubfiz x26, x27, 1, 16 + ldrh w25, [x0, x26] + cbnz w25, .L2295 + strh w27, [x20] + mov x0, x20 + bl make_superblock + ldrb w0, [x20, 7] + cbz w0, .L2341 + add x28, x20, 16 + ldrh w5, [x19, 2276] + mov x3, x28 + mov x0, 0 + mov x4, 56 + mov w6, 65535 +.L2301: + cmp w5, w0, uxth + bhi .L2303 + ldr w0, [x19, 2096] + cbz w0, .L2304 + add x0, x22, 784 + cmp x20, x0 + bne .L2304 + ldr x0, [x19, 2696] + ldrh w0, [x0, x26] + cmp w0, 40 + bls .L2304 + strb wzr, [x20, 8] +.L2304: + ldrb w0, [x20, 8] + ldr x1, [x19, 2696] + cbnz w0, .L2305 + ldrh w0, [x1, x26] + cbz w0, .L2306 + ldrh w2, [x19, 2336] + add w0, w0, w2 +.L2342: + strh w0, [x1, x26] + mov w1, 0 + ldr w0, [x19, 2428] + add w0, w0, 1 + str w0, [x19, 2428] + mov w0, w27 + bl ftl_set_blk_mode +.L2308: + ldr x0, [x19, 2696] + ldr w1, [x19, 2440] + ldrh w0, [x0, x26] + cmp w0, w1 + bls .L2309 + str w0, [x19, 2440] +.L2309: + ldr w2, [x19, 2428] + ldr w1, [x19, 2432] + ldrh w0, [x19, 2336] + madd w0, w0, w2, w1 + ldrh w1, [x19, 2284] + mov w2, 56 + umull x2, w25, w2 + udiv w0, w0, w1 + ldr x1, [x19, 2688] + str w0, [x22, 1676] + ldr w0, [x1, 16] + add w0, w0, 1 + str w0, [x1, 16] + mov x0, 0 +.L2310: + cmp x2, x0 + bne .L2311 + ldrb w0, [x19, 1220] + cbz w0, .L2312 + ldrb w0, [x20, 8] + mov w2, w25 + cmp w0, 1 + bne .L2313 + mov w1, 0 +.L2343: + ldr x0, [x19, 2544] + bl FlashEraseBlocks +.L2312: + ldrb w1, [x20, 8] + mov w2, w25 + ldr x0, [x19, 2544] + bl FlashEraseBlocks + mov x1, 0 + mov w2, 0 + mov x4, 56 +.L2314: + cmp w25, w1, uxth + bhi .L2316 + cmp w2, 0 + ble .L2317 + mov w0, w27 + bl update_multiplier_value + bl FtlBbmTblFlush +.L2317: + ldrb w0, [x20, 7] + cbnz w0, .L2318 +.L2341: + ldr x0, [x19, 2712] + mov w1, -1 + strh w1, [x0, x26] + b .L2295 +.L2324: + mov w1, 0 + b .L2298 +.L2303: + ldr x1, [x19, 2544] + madd x2, x0, x4, x1 + stp xzr, xzr, [x2, 8] + ldrh w2, [x3] + cmp w2, w6 + beq .L2302 + umull x7, w25, w4 + add w25, w25, 1 + and w25, w25, 65535 + lsl w2, w2, 10 + add x1, x1, x7 + str w2, [x1, 4] +.L2302: + add x0, x0, 1 + add x3, x3, 2 + b .L2301 +.L2306: + mov w0, 2 + b .L2342 +.L2305: + ldrh w0, [x1, x26] + add w0, w0, 1 + strh w0, [x1, x26] + ldr w0, [x19, 2432] + add w0, w0, 1 + str w0, [x19, 2432] + mov w0, w27 + bl ftl_set_blk_mode.part.17 + b .L2308 +.L2311: + ldr x1, [x19, 2544] + add x1, x1, x0 + add x0, x0, 56 + ldr w3, [x1, 4] + and w3, w3, -1024 + str w3, [x1, 4] + b .L2310 +.L2313: + mov w1, 1 + b .L2343 +.L2316: + mul x0, x1, x4 + ldr x3, [x19, 2544] + add x5, x3, x0 + ldr w3, [x3, x0] + cmn w3, #1 + bne .L2315 + add w2, w2, 1 + ldr w0, [x5, 4] + stp x4, x1, [x29, 104] + stp w3, w2, [x29, 120] + lsr w0, w0, 10 + bl FtlBbmMapBadBlock + ldp w3, w2, [x29, 120] + strh w3, [x28] + ldp x4, x1, [x29, 104] + ldrb w0, [x20, 7] + sub w0, w0, #1 + strb w0, [x20, 7] +.L2315: + add x1, x1, 1 + add x28, x28, 2 + b .L2314 +.L2318: + add x21, x21, :lo12:.LANCHOR2 + strh wzr, [x20, 2] + strb wzr, [x20, 6] + ldrh w1, [x21, 2344] + strh w27, [x20] + mul w0, w0, w1 + ldr w1, [x21, 2396] + str w1, [x20, 12] + and w0, w0, 65535 + add w1, w1, 1 + strh w0, [x20, 4] + str w1, [x21, 2396] + ldr x1, [x21, 2712] + ldrh w2, [x20] + strh w0, [x1, x2, lsl 1] +.L2294: + ldp x19, x20, [sp, 16] + mov w0, 0 + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 128 + ret + .size allocate_data_superblock, .-allocate_data_superblock + .align 2 + .global FtlGcBufInit + .type FtlGcBufInit, %function +FtlGcBufInit: + adrp x0, .LANCHOR4+1680 + mov w2, 0 + mov w8, 24 + mov w9, 1 + str wzr, [x0, #:lo12:.LANCHOR4+1680] + adrp x0, .LANCHOR2 + add x3, x0, :lo12:.LANCHOR2 + mov w5, 4 + mov w10, 56 +.L2345: + ldrh w1, [x3, 2276] + cmp w2, w1 + bcc .L2346 + add x0, x0, :lo12:.LANCHOR2 + mov w6, 24 + mov w5, 4 +.L2347: + ldr w2, [x0, 2568] + cmp w1, w2 + bcc .L2348 + ret +.L2346: + umull x4, w2, w8 + ldr x6, [x3, 2632] + ldr x7, [x3, 2600] + add x1, x6, x4 + str w9, [x1, 16] + ldrh w1, [x3, 2354] + mul w1, w1, w2 + sdiv w1, w1, w5 + add x1, x7, w1, sxtw 2 + str x1, [x6, x4] + ldrh w1, [x3, 2356] + ldr x7, [x3, 2632] + ldr x11, [x3, 2656] + add x6, x7, x4 + mul w1, w1, w2 + sdiv w1, w1, w5 + add x1, x11, w1, sxtw 2 + str x1, [x6, 8] + ldr x1, [x3, 2552] + ldr x4, [x7, x4] + nop // between mem op and mult-accumulate + umaddl x1, w2, w10, x1 + add w2, w2, 1 + and w2, w2, 65535 + str x4, [x1, 8] + ldr x4, [x6, 8] + str x4, [x1, 16] + b .L2345 +.L2348: + umull x4, w1, w6 + ldr x3, [x0, 2632] + ldr x7, [x0, 2600] + add x2, x3, x4 + str wzr, [x2, 16] + ldrh w2, [x0, 2354] + mul w2, w2, w1 + sdiv w2, w2, w5 + add x2, x7, w2, sxtw 2 + str x2, [x3, x4] + ldrh w2, [x0, 2356] + ldr x3, [x0, 2632] + add x3, x3, x4 + ldr x4, [x0, 2656] + mul w2, w2, w1 + add w1, w1, 1 + and w1, w1, 65535 + sdiv w2, w2, w5 + add x2, x4, w2, sxtw 2 + str x2, [x3, 8] + b .L2347 + .size FtlGcBufInit, .-FtlGcBufInit + .align 2 + .global FtlVariablesInit + .type FtlVariablesInit, %function +FtlVariablesInit: + stp x29, x30, [sp, -32]! + mov w0, -1 + mov w1, 0 + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x20, .LANCHOR4 + add x20, x20, :lo12:.LANCHOR4 + adrp x19, .LANCHOR2 + add x19, x19, :lo12:.LANCHOR2 + strh w0, [x20, 1696] + mov w0, -1 + str w0, [x20, 1708] + ldr x0, [x19, 2736] + ldrh w2, [x19, 2364] + strh wzr, [x19, 2920] + str wzr, [x19, 2096] + lsl w2, w2, 1 + str xzr, [x20, 1688] + str wzr, [x20, 1700] + str wzr, [x20, 1704] + bl ftl_memset + ldr x0, [x19, 2696] + mov w1, 0 + ldrh w2, [x19, 2286] + lsl w2, w2, 1 + bl ftl_memset + ldr x0, [x19, 2680] + mov w1, 0 + ldrh w2, [x19, 2286] + lsl w2, w2, 1 + bl ftl_memset + mov w2, 48 + mov w1, 0 + add x0, x20, 696 + bl ftl_memset + mov w2, 512 + mov w1, 0 + add x0, x20, 1152 + bl ftl_memset + bl FtlGcBufInit + bl FtlL2PDataInit + mov w0, 0 + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 32 + ret + .size FtlVariablesInit, .-FtlVariablesInit + .align 2 + .global FtlGcBufFree + .type FtlGcBufFree, %function +FtlGcBufFree: + adrp x2, .LANCHOR2 + add x2, x2, :lo12:.LANCHOR2 + mov w3, 0 + mov w7, 56 + mov w9, 24 + ldr w8, [x2, 2568] + ldr x4, [x2, 2632] +.L2352: + cmp w3, w1 + bcs .L2351 + umaddl x6, w3, w7, x0 + mov w2, 0 + b .L2357 +.L2353: + add w2, w2, 1 + and w2, w2, 65535 +.L2357: + cmp w2, w8 + bcs .L2354 + umull x5, w2, w9 + add x10, x4, x5 + ldr x11, [x4, x5] + ldr x5, [x6, 8] + cmp x11, x5 + bne .L2353 + str wzr, [x10, 16] +.L2354: + add w3, w3, 1 + and w3, w3, 65535 + b .L2352 +.L2351: + ret + .size FtlGcBufFree, .-FtlGcBufFree + .align 2 + .global FtlGcBufAlloc + .type FtlGcBufAlloc, %function +FtlGcBufAlloc: + adrp x2, .LANCHOR2 + add x2, x2, :lo12:.LANCHOR2 + mov w3, 0 + mov w7, 24 + mov w8, 1 + mov w9, 56 + ldr w5, [x2, 2568] + ldr x6, [x2, 2632] +.L2359: + cmp w3, w1 + bcs .L2358 + mov w2, 0 + b .L2364 +.L2360: + add w2, w2, 1 + and w2, w2, 65535 +.L2364: + cmp w2, w5 + bcs .L2361 + umaddl x4, w2, w7, x6 + ldr w10, [x4, 16] + cbnz w10, .L2360 + umaddl x2, w3, w9, x0 + ldr x10, [x4] + str w8, [x4, 16] + str x10, [x2, 8] + ldr x4, [x4, 8] + str x4, [x2, 16] +.L2361: + add w3, w3, 1 + and w3, w3, 65535 + b .L2359 +.L2358: + ret + .size FtlGcBufAlloc, .-FtlGcBufAlloc + .align 2 + .global IsBlkInGcList + .type IsBlkInGcList, %function +IsBlkInGcList: + adrp x1, .LANCHOR4+1712 + and w0, w0, 65535 + ldrh w2, [x1, #:lo12:.LANCHOR4+1712] + adrp x1, .LANCHOR2+2504 + ldr x3, [x1, #:lo12:.LANCHOR2+2504] + mov x1, 0 +.L2366: + cmp w2, w1, uxth + bhi .L2368 + mov w0, 0 + ret +.L2368: + add x1, x1, 1 + add x4, x3, x1, lsl 1 + ldrh w4, [x4, -2] + cmp w4, w0 + bne .L2366 + mov w0, 1 + ret + .size IsBlkInGcList, .-IsBlkInGcList + .align 2 + .global FtlGcUpdatePage + .type FtlGcUpdatePage, %function +FtlGcUpdatePage: + mov w6, w0 + mov w9, w1 + mov w8, w2 + stp x29, x30, [sp, -16]! + lsr w0, w0, 10 + add x29, sp, 0 + bl P2V_block_in_plane + and w10, w0, 65535 + adrp x3, .LANCHOR4 + adrp x4, .LANCHOR2 + add x1, x3, :lo12:.LANCHOR4 + add x2, x4, :lo12:.LANCHOR2 + mov x5, 0 + ldrh w1, [x1, 1712] + ldr x7, [x2, 2504] +.L2371: + and w2, w5, 65535 + cmp w2, w1 + bcc .L2373 + bne .L2372 + and x5, x5, 65535 + strh w0, [x7, x5, lsl 1] + add x5, x3, :lo12:.LANCHOR4 + ldrh w0, [x5, 1712] + add w0, w0, 1 + strh w0, [x5, 1712] + b .L2372 +.L2373: + add x5, x5, 1 + add x2, x7, x5, lsl 1 + ldrh w2, [x2, -2] + cmp w2, w10 + bne .L2371 +.L2372: + add x0, x3, :lo12:.LANCHOR4 + add x3, x4, :lo12:.LANCHOR2 + mov w1, 12 + ldrh w5, [x0, 1714] + ldr x4, [x3, 2512] + umull x5, w5, w1 + add x4, x4, x5 + str w9, [x4, 4] + ldr x1, [x3, 2512] + add x3, x1, x5 + str w8, [x3, 8] + str w6, [x1, x5] + ldrh w1, [x0, 1714] + add w1, w1, 1 + strh w1, [x0, 1714] + ldp x29, x30, [sp], 16 + ret + .size FtlGcUpdatePage, .-FtlGcUpdatePage + .align 2 + .global FtlGcPageVarInit + .type FtlGcPageVarInit, %function +FtlGcPageVarInit: + stp x29, x30, [sp, -32]! + adrp x0, .LANCHOR4 + add x0, x0, :lo12:.LANCHOR4 + mov w1, 255 + add x29, sp, 0 + str x19, [sp, 16] + adrp x19, .LANCHOR2 + add x19, x19, :lo12:.LANCHOR2 + strh wzr, [x0, 1712] + strh wzr, [x0, 1714] + ldr x0, [x19, 2504] + ldrh w2, [x19, 2348] + lsl w2, w2, 1 + bl ftl_memset + ldrh w2, [x19, 2348] + mov w0, 12 + mov w1, 255 + mul w2, w2, w0 + ldr x0, [x19, 2512] + bl ftl_memset + bl FtlGcBufInit + ldr x19, [sp, 16] + ldp x29, x30, [sp], 32 + ret + .size FtlGcPageVarInit, .-FtlGcPageVarInit + .align 2 + .global FtlGcScanTempBlk + .type FtlGcScanTempBlk, %function +FtlGcScanTempBlk: + stp x29, x30, [sp, -176]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + mov x19, x0 + stp x21, x22, [sp, 32] + adrp x22, .LANCHOR1 + add x0, x22, :lo12:.LANCHOR1 + stp x23, x24, [sp, 48] + stp x25, x26, [sp, 64] + stp x27, x28, [sp, 80] + str w1, [x29, 104] + ldrh w26, [x0, 3452] + mov w0, 65535 + cmp w26, w0 + beq .L2408 + cbnz w26, .L2378 +.L2379: + bl FtlGcPageVarInit + b .L2380 +.L2408: + mov w26, 0 +.L2378: + adrp x0, .LANCHOR2+2344 + ldr w1, [x29, 104] + ldrh w0, [x0, #:lo12:.LANCHOR2+2344] + cmp w0, w1 + beq .L2379 +.L2380: + adrp x28, .LANCHOR2 + add x27, x28, :lo12:.LANCHOR2 + mov w0, -1 + mov w23, 0 + str w0, [x29, 108] +.L2381: + ldrh w1, [x19] + mov w0, 65535 + strb wzr, [x19, 8] + cmp w1, w0 + beq .L2409 +.L2405: + add x0, x28, :lo12:.LANCHOR2 + add x6, x19, 16 + mov w20, 0 + mov w11, 65535 + mov w12, 56 + mov w7, 4 + ldrh w9, [x0, 2354] + ldrh w10, [x0, 2356] + ldrh w0, [x0, 2276] + add x0, x0, 8 + add x0, x19, x0, lsl 1 +.L2383: + cmp x6, x0 + bne .L2385 + ldr x0, [x27, 2520] + mov w2, 0 + mov w1, w20 + adrp x24, .LANCHOR0 + add x24, x24, :lo12:.LANCHOR0 + mov x21, 0 + bl FlashReadPages + mov w0, 56 + umull x0, w20, w0 + str x0, [x29, 96] +.L2386: + ldr x0, [x29, 96] + cmp x0, x21 + bne .L2403 + ldr w0, [x29, 104] + add w4, w26, 1 + add w23, w23, 1 + and w26, w4, 65535 + cmp w0, w23 + bls .L2404 +.L2406: + ldrh w0, [x27, 2344] + cmp w0, w26 + bhi .L2405 +.L2409: + mov w2, 0 + b .L2382 +.L2385: + ldrh w1, [x6] + cmp w1, w11 + beq .L2384 + umull x8, w20, w12 + ldr x5, [x27, 2520] + orr w1, w26, w1, lsl 10 + add x5, x5, x8 + str w1, [x5, 4] + mul w1, w20, w9 + ldr x2, [x27, 2520] + ldr x5, [x27, 2600] + sdiv w1, w1, w7 + add x2, x2, x8 + add x1, x5, w1, sxtw 2 + str x1, [x2, 8] + mul w1, w20, w10 + ldr x5, [x27, 2656] + add w20, w20, 1 + and w20, w20, 65535 + sdiv w1, w1, w7 + add x1, x5, w1, sxtw 2 + str x1, [x2, 16] +.L2384: + add x6, x6, 2 + b .L2383 +.L2403: + ldr x6, [x27, 2520] + add x5, x6, x21 + ldr w25, [x5, 4] + lsr w0, w25, 10 + bl P2V_plane + and w2, w0, 65535 + ldr w0, [x6, x21] + ldr x20, [x5, 16] + cbnz w0, .L2387 + ldrh w1, [x20] + mov w0, 65535 + cmp w1, w0 + bne .L2388 +.L2391: + ldrb w0, [x27, 1220] + adrp x14, .LANCHOR4 + cbz w0, .L2421 + add x14, x14, :lo12:.LANCHOR4 + mov w0, 1 + str w0, [x14, 1704] +.L2382: + add x22, x22, :lo12:.LANCHOR1 + strh w26, [x19, 2] + strb w2, [x19, 6] + mov w0, -1 + mov w1, w26 + strh w0, [x22, 3452] + mov x0, x19 + bl ftl_sb_update_avl_pages + b .L2377 +.L2388: + ldr w0, [x20, 8] + ldr w1, [x27, 2924] + cmp w0, w1 + bhi .L2391 + ldrb w1, [x24, 88] + cbnz w1, .L2394 +.L2395: + ldp w2, w0, [x20, 8] + mov w1, w25 + add x21, x21, 56 + bl FtlGcUpdatePage + b .L2386 +.L2421: + ldr x0, [x27, 2712] + ldrh w1, [x19] + strh wzr, [x0, x1, lsl 1] + ldrh w0, [x19] + bl INSERT_FREE_LIST + add x14, x14, :lo12:.LANCHOR4 + mov w0, -1 + strh w0, [x19] + strh w0, [x14, 1104] +.L2424: + bl FtlGcPageVarInit + mov w26, 0 + b .L2381 +.L2394: + add x1, x29, 116 + mov w2, 0 + bl log2phys + ldr w0, [x20, 12] + ldr w1, [x29, 116] + cmp w0, w1 + bne .L2395 + cmn w0, #1 + beq .L2395 + str w0, [x29, 124] + mov w2, 0 + ldr x0, [x27, 2624] + mov w1, 1 + str x0, [x29, 128] + ldr x0, [x27, 2648] + str x0, [x29, 136] + add x0, x29, 120 + bl FlashReadPages + ldrh w1, [x27, 2350] + mov x0, 0 + ldr x2, [x27, 2520] + ldr x6, [x29, 128] + ubfiz x1, x1, 9, 16 + add x2, x2, x21 +.L2396: + cmp x0, x1 + beq .L2395 + ldr x7, [x2, 8] + ldr w8, [x7, x0] + add x0, x0, 4 + add x7, x6, x0 + ldr w7, [x7, -4] + cmp w8, w7 + beq .L2396 + ldrh w1, [x19] + adrp x0, .LC146 + ldr w2, [x29, 124] + add x0, x0, :lo12:.LC146 + bl printk + ldrh w1, [x19] + ldr x0, [x27, 2712] + strh wzr, [x0, x1, lsl 1] + ldrh w0, [x19] + bl INSERT_FREE_LIST + adrp x1, .LANCHOR4+1104 + mov w0, -1 + strh w0, [x19] + strh w0, [x1, #:lo12:.LANCHOR4+1104] + b .L2424 +.L2387: + ldrh w1, [x19] + mov w2, w25 + adrp x0, .LC147 + add x0, x0, :lo12:.LC147 + bl printk + ldr w1, [x27, 2096] + ldrh w0, [x19] + cbnz w1, .L2399 + ldrb w1, [x27, 1220] + cbz w1, .L2400 +.L2399: + ldr x2, [x27, 2696] + ubfiz x1, x0, 1, 16 + ldrh w1, [x2, x1] + cmp w1, 159 + bls .L2401 +.L2400: + ldr x1, [x27, 2520] + ldr w1, [x1, x21] + cmn w1, #1 + bne .L2402 +.L2401: + ldr x1, [x27, 2520] + add x21, x1, x21 + ldr w1, [x21, 4] + str w1, [x29, 108] +.L2402: + ldr x1, [x27, 2712] + ubfiz x0, x0, 1, 16 + strh wzr, [x1, x0] + ldrh w0, [x19] + bl INSERT_FREE_LIST + mov w0, -1 + strh w0, [x19] + b .L2424 +.L2404: + add x1, x22, :lo12:.LANCHOR1 + mov w2, 65535 + ldrh w0, [x1, 3452] + cmp w0, w2 + beq .L2406 + add w0, w0, w23 + strh w0, [x1, 3452] + ldrh w0, [x27, 2344] + cmp w0, w26 + bls .L2406 +.L2377: + ldr w0, [x29, 108] + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 176 + ret + .size FtlGcScanTempBlk, .-FtlGcScanTempBlk + .align 2 + .global FtlGcRefreshOpenBlock + .type FtlGcRefreshOpenBlock, %function +FtlGcRefreshOpenBlock: + stp x29, x30, [sp, -32]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x19, .LANCHOR2 + add x19, x19, :lo12:.LANCHOR2 + and w20, w0, 65535 + ldrh w0, [x19, 2472] + cmp w0, w20 + beq .L2427 + ldrh w0, [x19, 2474] + cmp w0, w20 + beq .L2427 + ldrh w0, [x19, 2476] + cmp w0, w20 + beq .L2427 + ldrh w0, [x19, 2478] + cmp w0, w20 + beq .L2427 + mov w1, w20 + adrp x0, .LC148 + add x0, x0, :lo12:.LC148 + bl printk + ldrh w1, [x19, 2472] + mov w0, 65535 + cmp w1, w0 + bne .L2429 + strh w20, [x19, 2472] +.L2427: + mov w0, 0 + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 32 + ret +.L2429: + ldrh w1, [x19, 2474] + cmp w1, w0 + bne .L2430 + strh w20, [x19, 2474] + b .L2427 +.L2430: + ldrh w1, [x19, 2476] + cmp w1, w0 + bne .L2431 + strh w20, [x19, 2476] + b .L2427 +.L2431: + ldrh w1, [x19, 2478] + cmp w1, w0 + bne .L2427 + strh w20, [x19, 2478] + b .L2427 + .size FtlGcRefreshOpenBlock, .-FtlGcRefreshOpenBlock + .align 2 + .global FtlGcRefreshBlock + .type FtlGcRefreshBlock, %function +FtlGcRefreshBlock: + stp x29, x30, [sp, -48]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x19, .LANCHOR2 + add x19, x19, :lo12:.LANCHOR2 + and w20, w0, 65535 + str x21, [sp, 32] + ldrh w0, [x19, 2472] + cmp w0, w20 + beq .L2440 + ldrh w0, [x19, 2474] + cmp w0, w20 + beq .L2440 + ldrh w0, [x19, 2476] + cmp w0, w20 + beq .L2440 + ldrh w0, [x19, 2478] + mov w21, 0 + cmp w0, w20 + beq .L2433 + mov w1, w20 + adrp x0, .LC148 + add x0, x0, :lo12:.LC148 + bl printk + ldrh w1, [x19, 2472] + mov w0, 65535 + cmp w1, w0 + bne .L2435 + strh w20, [x19, 2472] +.L2433: + mov w0, w21 + ldr x21, [sp, 32] + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 48 + ret +.L2435: + ldrh w1, [x19, 2474] + cmp w1, w0 + bne .L2436 + strh w20, [x19, 2474] + b .L2433 +.L2436: + ldrh w1, [x19, 2476] + cmp w1, w0 + bne .L2437 + strh w20, [x19, 2476] + b .L2433 +.L2437: + ldrh w1, [x19, 2478] + cmp w1, w0 + bne .L2442 + strh w20, [x19, 2478] + b .L2433 +.L2440: + mov w21, 0 + b .L2433 +.L2442: + mov w21, -1 + b .L2433 + .size FtlGcRefreshBlock, .-FtlGcRefreshBlock + .align 2 + .global FtlGcMarkBadPhyBlk + .type FtlGcMarkBadPhyBlk, %function +FtlGcMarkBadPhyBlk: + stp x29, x30, [sp, -64]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x19, .LANCHOR2 + stp x21, x22, [sp, 32] + add x22, x19, :lo12:.LANCHOR2 + and w20, w0, 65535 + str x23, [sp, 48] + mov w0, w20 + bl P2V_block_in_plane + ldrh w1, [x22, 2486] + mov w2, w20 + and w21, w0, 65535 + adrp x0, .LC149 + add x0, x0, :lo12:.LC149 + bl printk + mov w0, w21 + bl FtlGcRefreshBlock + ldr w0, [x22, 2096] + cbz w0, .L2445 + ldr x2, [x22, 2696] + ubfiz x0, x21, 1, 16 + ldrh w1, [x2, x0] + cmp w1, 39 + bls .L2445 + sub w1, w1, #40 + strh w1, [x2, x0] +.L2445: + add x0, x19, :lo12:.LANCHOR2 + mov x2, 0 + ldrh w1, [x0, 2486] + adrp x0, .LANCHOR4 + add x0, x0, :lo12:.LANCHOR4 + add x0, x0, 1720 +.L2446: + cmp w1, w2, uxth + bhi .L2448 + cmp w1, 15 + bhi .L2447 + add x19, x19, :lo12:.LANCHOR2 + add w0, w1, 1 + strh w0, [x19, 2486] + adrp x0, .LANCHOR4 + add x0, x0, :lo12:.LANCHOR4 + add x0, x0, 1720 + strh w20, [x0, w1, sxtw 1] + b .L2447 +.L2448: + add x2, x2, 1 + add x3, x0, x2, lsl 1 + ldrh w3, [x3, -2] + cmp w3, w20 + bne .L2446 +.L2447: + mov w0, 0 + ldr x23, [sp, 48] + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x29, x30, [sp], 64 + ret + .size FtlGcMarkBadPhyBlk, .-FtlGcMarkBadPhyBlk + .align 2 + .global FtlGcReFreshBadBlk + .type FtlGcReFreshBadBlk, %function +FtlGcReFreshBadBlk: + stp x29, x30, [sp, -32]! + add x29, sp, 0 + str x19, [sp, 16] + adrp x19, .LANCHOR2 + add x0, x19, :lo12:.LANCHOR2 + ldrh w1, [x0, 2486] + cbz w1, .L2454 + ldrh w3, [x0, 2472] + mov w2, 65535 + cmp w3, w2 + bne .L2454 + ldrh w2, [x0, 2490] + cmp w2, w1 + bcc .L2455 + strh wzr, [x0, 2490] +.L2455: + add x19, x19, :lo12:.LANCHOR2 + adrp x0, .LANCHOR4 + add x0, x0, :lo12:.LANCHOR4 + add x0, x0, 1720 + ldrh w1, [x19, 2490] + ldrh w0, [x0, x1, lsl 1] + bl P2V_block_in_plane + bl FtlGcRefreshBlock + ldrh w0, [x19, 2490] + add w0, w0, 1 + strh w0, [x19, 2490] +.L2454: + mov w0, 0 + ldr x19, [sp, 16] + ldp x29, x30, [sp], 32 + ret + .size FtlGcReFreshBadBlk, .-FtlGcReFreshBadBlk + .align 2 + .global FtlGcFreeBadSuperBlk + .type FtlGcFreeBadSuperBlk, %function +FtlGcFreeBadSuperBlk: + stp x29, x30, [sp, -96]! + add x29, sp, 0 + stp x23, x24, [sp, 48] + and w23, w0, 65535 + adrp x0, .LANCHOR2 + add x1, x0, :lo12:.LANCHOR2 + stp x19, x20, [sp, 16] + stp x21, x22, [sp, 32] + stp x25, x26, [sp, 64] + str x27, [sp, 80] + ldrh w1, [x1, 2486] + cbz w1, .L2461 + adrp x22, .LANCHOR4 + add x21, x22, :lo12:.LANCHOR4 + mov x27, x0 + add x21, x21, 1720 + mov w20, 0 +.L2462: + add x0, x27, :lo12:.LANCHOR2 + ldrh w1, [x0, 2276] + cmp w1, w20 + bhi .L2468 + bl FtlGcReFreshBadBlk +.L2461: + mov w0, 0 + ldr x27, [sp, 80] + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x29, x30, [sp], 96 + ret +.L2468: + add x0, x0, 2304 + mov w1, w23 + mov w19, 0 + ldrb w0, [x0, w20, sxtw] + bl V2P_block + and w24, w0, 65535 +.L2463: + add x25, x27, :lo12:.LANCHOR2 + ldrh w0, [x25, 2486] + cmp w0, w19 + bhi .L2467 + add w20, w20, 1 + and w20, w20, 65535 + b .L2462 +.L2467: + add x0, x22, :lo12:.LANCHOR4 + add w26, w19, 1 + add x0, x0, 1720 + ldrh w0, [x0, w19, sxtw 1] + cmp w0, w24 + bne .L2464 + mov w1, w24 + adrp x0, .LC150 + add x0, x0, :lo12:.LC150 + bl printk + mov w0, w24 + bl FtlBbmMapBadBlock + bl FtlBbmTblFlush + ldrh w0, [x25, 2486] + mov w1, w26 +.L2465: + cmp w19, w0 + bcc .L2466 + add x1, x27, :lo12:.LANCHOR2 + sub w0, w0, #1 + strh w0, [x1, 2486] +.L2464: + and w19, w26, 65535 + b .L2463 +.L2466: + sub w2, w1, #1 + ldrh w3, [x21, w1, sxtw 1] + add w19, w19, 1 + add w1, w1, 1 + and w19, w19, 65535 + strh w3, [x21, w2, sxtw 1] + b .L2465 + .size FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk + .align 2 + .global update_vpc_list + .type update_vpc_list, %function +update_vpc_list: + stp x29, x30, [sp, -16]! + adrp x1, .LANCHOR2+2712 + and w14, w0, 65535 + add x29, sp, 0 + ldr x1, [x1, #:lo12:.LANCHOR2+2712] + ubfiz x0, x14, 1, 16 + ldrh w0, [x1, x0] + cbnz w0, .L2474 + adrp x8, .LANCHOR4 + add x0, x8, :lo12:.LANCHOR4 + ldrh w1, [x0, 1104] + cmp w1, w14 + bne .L2475 + mov w1, -1 + strh w1, [x0, 1104] +.L2476: + add x8, x8, :lo12:.LANCHOR4 + mov w1, w14 + add x0, x8, 744 + bl List_remove_node + ldrh w0, [x8, 760] + sub w0, w0, #1 + strh w0, [x8, 760] + mov w0, w14 + bl free_data_superblock + mov w0, w14 + bl FtlGcFreeBadSuperBlk + mov w0, 1 +.L2473: + ldp x29, x30, [sp], 16 + ret +.L2475: + ldrh w1, [x0, 784] + cmp w1, w14 + beq .L2480 + ldrh w1, [x0, 832] + cmp w1, w14 + beq .L2480 + ldrh w0, [x0, 880] + cmp w0, w14 + bne .L2476 +.L2480: + mov w0, 0 + b .L2473 +.L2474: + mov w0, w14 + bl List_update_data_list + b .L2480 + .size update_vpc_list, .-update_vpc_list + .align 2 + .global decrement_vpc_count + .type decrement_vpc_count, %function +decrement_vpc_count: + stp x29, x30, [sp, -48]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + and w19, w0, 65535 + stp x21, x22, [sp, 32] + mov w0, 65535 + adrp x20, .LANCHOR4 + cmp w19, w0 + beq .L2483 + adrp x21, .LANCHOR2 + add x21, x21, :lo12:.LANCHOR2 + ubfiz x22, x19, 1, 16 + ldr x1, [x21, 2712] + ldrh w0, [x1, x22] + cbnz w0, .L2484 + mov w1, w19 + mov w2, 0 + adrp x0, .LC151 + add x0, x0, :lo12:.LC151 + bl printk + add x20, x20, :lo12:.LANCHOR4 + ldr x0, [x21, 2712] + add x6, x20, 768 + mov w1, 32 + strh w1, [x0, x22] + mov w1, w19 + mov x0, x6 + bl test_node_in_list + cbz w0, .L2485 + mov w1, w19 + mov x0, x6 + bl List_remove_node + ldrh w0, [x20, 776] + sub w0, w0, #1 + strh w0, [x20, 776] + mov w0, w19 + bl INSERT_DATA_LIST + ldr x0, [x21, 2712] + mov w1, w19 + ldrh w2, [x0, x22] + adrp x0, .LC152 + add x0, x0, :lo12:.LC152 + bl printk +.L2485: + mov w0, w19 + bl FtlGcRefreshBlock +.L2488: + mov w0, 0 + b .L2482 +.L2484: + sub w0, w0, #1 + strh w0, [x1, x22] +.L2483: + add x20, x20, :lo12:.LANCHOR4 + mov w1, 65535 + ldrh w0, [x20, 1696] + cmp w0, w1 + bne .L2487 + strh w19, [x20, 1696] + b .L2488 +.L2487: + cmp w19, w0 + beq .L2488 + bl update_vpc_list + cmp w0, 0 + cset w0, ne + strh w19, [x20, 1696] +.L2482: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x29, x30, [sp], 48 + ret + .size decrement_vpc_count, .-decrement_vpc_count + .align 2 + .global FtlRecoverySuperblock + .type FtlRecoverySuperblock, %function +FtlRecoverySuperblock: + stp x29, x30, [sp, -176]! + mov w2, 65535 + add x29, sp, 0 + stp x19, x20, [sp, 16] + mov x19, x0 + stp x21, x22, [sp, 32] + stp x23, x24, [sp, 48] + stp x25, x26, [sp, 64] + stp x27, x28, [sp, 80] + ldrh w0, [x0] + cmp w0, w2 + beq .L2639 + ldrh w0, [x19, 2] + adrp x20, .LANCHOR2 + str w0, [x29, 156] + add x0, x20, :lo12:.LANCHOR2 + ldr w1, [x29, 156] + ldrh w0, [x0, 2344] + cmp w0, w1 + bne .L2496 + strh wzr, [x19, 4] +.L2646: + strb wzr, [x19, 6] +.L2639: + ldp x19, x20, [sp, 16] + mov w0, 0 + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 176 + ret +.L2496: + ldrh w0, [x19, 16] + mov w1, 0 +.L2497: + cmp w0, w2 + beq .L2498 + ldrb w1, [x19, 6] + str w1, [x29, 140] + ldrb w1, [x19, 8] + cmp w1, 1 + bne .L2499 + bl FtlGetLastWrittenPage + mov w21, w0 + cmn w0, #1 + beq .L2500 + add x0, x20, :lo12:.LANCHOR2 + ldrb w0, [x0, 1220] + cbnz w0, .L2572 + adrp x0, .LANCHOR0 + add x0, x0, :lo12:.LANCHOR0 + add x0, x0, 144 + ldrh w23, [x0, w21, sxtw 1] +.L2501: + add x0, x20, :lo12:.LANCHOR2 + add x1, x19, 16 + str x1, [x29, 144] + add x3, x19, 16 + mov w28, 0 + mov w8, 65535 + ldrh w1, [x0, 2276] + mov w9, 56 + ldrh w7, [x0, 2356] + mov w10, 4 + add x1, x1, 8 + add x1, x19, x1, lsl 1 +.L2502: + cmp x3, x1 + bne .L2504 + ldrb w0, [x19, 8] + cmp w0, 1 + bne .L2573 + add x0, x20, :lo12:.LANCHOR2 + ldrb w0, [x0, 1220] + cmp w0, 0 + cset w0, ne + str w0, [x29, 152] +.L2505: + add x24, x20, :lo12:.LANCHOR2 + ldr w2, [x29, 152] + mov w1, w28 + adrp x25, .LC153 + adrp x26, .LANCHOR4 + add x25, x25, :lo12:.LC153 + ldr x0, [x24, 2520] + add x26, x26, :lo12:.LANCHOR4 + mov x27, 0 + bl FlashReadPages + ldr w22, [x24, 2400] + mov w4, 65535 + sub w22, w22, #1 +.L2506: + and w0, w27, 65535 + cmp w28, w0 + bhi .L2511 + bne .L2509 + add x0, x20, :lo12:.LANCHOR2 + add w21, w21, 1 + and w21, w21, 65535 + ldr x0, [x0, 2520] + ldr w0, [x0, 4] +.L2641: + lsr w0, w0, 10 + bl P2V_plane + ldrb w1, [x19, 8] + and w28, w0, 65535 + cmp w1, 1 + bne .L2513 + add x0, x20, :lo12:.LANCHOR2 + ldrb w0, [x0, 1220] + cbnz w0, .L2513 + adrp x0, .LANCHOR0 + add x0, x0, :lo12:.LANCHOR0 + add x0, x0, 144 + ldrh w21, [x0, w21, sxtw 1] +.L2513: + add x0, x20, :lo12:.LANCHOR2 + ldrh w0, [x0, 2344] + cmp w0, w21 + bne .L2514 + strh w21, [x19, 2] + strb wzr, [x19, 6] + strh wzr, [x19, 4] +.L2514: + ldrh w0, [x29, 140] + str w0, [x29, 140] + ldr w0, [x29, 156] + cmp w21, w0 + ldr w0, [x29, 140] + ccmp w28, w0, 0, eq + bne .L2515 +.L2647: + mov w2, w28 + mov w1, w21 + mov x0, x19 + bl ftl_sb_update_avl_pages + b .L2639 +.L2498: + add w1, w1, 1 + and w1, w1, 65535 + add x0, x19, w1, sxtw 1 + ldrh w0, [x0, 16] + b .L2497 +.L2499: + mov w1, 0 + bl FtlGetLastWrittenPage + mov w21, w0 + cmn w0, #1 + beq .L2500 +.L2572: + mov w23, w21 + b .L2501 +.L2500: + strh wzr, [x19, 2] + b .L2646 +.L2504: + ldrh w2, [x3] + cmp w2, w8 + beq .L2503 + umull x6, w28, w9 + ldr x5, [x0, 2520] + orr w2, w23, w2, lsl 10 + add x5, x5, x6 + str w2, [x5, 4] + mul w2, w28, w7 + add w28, w28, 1 + ldr x4, [x0, 2520] + and w28, w28, 65535 + ldr x5, [x0, 2656] + sdiv w2, w2, w10 + add x4, x4, x6 + add x2, x5, w2, sxtw 2 + stp xzr, x2, [x4, 8] +.L2503: + add x3, x3, 2 + b .L2502 +.L2573: + str wzr, [x29, 152] + b .L2505 +.L2511: + mov x0, 56 + ldr x3, [x24, 2520] + mul x0, x27, x0 + add x1, x3, x0 + ldr w0, [x3, x0] + cbnz w0, .L2507 + ldr x5, [x1, 16] + ldr w3, [x5, 4] + cmn w3, #1 + beq .L2508 + ldr w1, [x24, 2400] + mov w0, w3 + bl ftl_cmp_data_ver + cbz w0, .L2508 + add w3, w3, 1 + str w3, [x24, 2400] +.L2508: + ldr w0, [x5] + cmn w0, #1 + bne .L2510 +.L2509: + add x0, x20, :lo12:.LANCHOR2 + and x27, x27, 65535 + mov x1, 56 + and w21, w21, 65535 + ldr x0, [x0, 2520] + madd x27, x27, x1, x0 + ldr w0, [x27, 4] + b .L2641 +.L2507: + ldr w1, [x1, 4] + mov x0, x25 + bl printk + ldrh w0, [x19] + and w4, w23, 65535 + strh w0, [x26, 1754] +.L2510: + add x27, x27, 1 + b .L2506 +.L2515: + mov w0, 65535 + adrp x27, .LANCHOR4 + cmp w4, w0 + bne .L2516 + cbnz w1, .L2517 +.L2516: + add x0, x27, :lo12:.LANCHOR4 + and w6, w23, 65535 + ldr w1, [x0, 1708] + cmn w1, #1 + bne .L2518 + str w22, [x0, 1708] +.L2518: + add x0, x27, :lo12:.LANCHOR4 + ldr w5, [x0, 1708] + ldr w0, [x29, 156] + add w0, w0, 7 + cmp w0, w23, uxth + bge .L2574 + sub w23, w6, #7 + and w23, w23, 65535 +.L2519: + adrp x4, .LANCHOR0 + add x4, x4, :lo12:.LANCHOR0 + mov w26, -1 + add x3, x20, :lo12:.LANCHOR2 + mov w25, w26 + add x4, x4, 1168 +.L2520: + cmp w23, w6 + bhi .L2533 + ldrh w0, [x3, 2276] + mov w24, 0 + mov w9, 65535 + mov w8, 56 + add x0, x0, 8 + ldr x1, [x29, 144] + add x0, x19, x0, lsl 1 + b .L2534 +.L2574: + ldr w23, [x29, 156] + b .L2519 +.L2522: + ldrh w2, [x1] + cmp w2, w9 + beq .L2521 + ldr x7, [x3, 2520] + orr w2, w23, w2, lsl 10 + umaddl x7, w24, w8, x7 + add w24, w24, 1 + and w24, w24, 65535 + str w2, [x7, 4] +.L2521: + add x1, x1, 2 +.L2534: + cmp x0, x1 + bne .L2522 + ldr w2, [x29, 152] + mov w1, w24 + ldr x0, [x3, 2520] + str x4, [x29, 104] + str w5, [x29, 112] + str w6, [x29, 120] + str x3, [x29, 128] + bl FlashReadPages + ldr x3, [x29, 128] + mov w1, 56 + ldr w5, [x29, 112] + add x2, x27, :lo12:.LANCHOR4 + ldr w6, [x29, 120] + sxtw x9, w23 + ldr x4, [x29, 104] + ldr x0, [x3, 2520] + ldrb w8, [x3, 1220] + nop // between mem op and mult-accumulate + umaddl x24, w24, w1, x0 + mov w1, 65535 +.L2523: + cmp x24, x0 + bne .L2532 + add w23, w23, 1 + and w23, w23, 65535 + b .L2520 +.L2532: + ldr w7, [x0] + cbnz w7, .L2524 + ldr x7, [x0, 16] + ldrh w10, [x7] + cmp w10, w1 + beq .L2525 + ldr w7, [x7, 4] + cmn w7, #1 + beq .L2525 + ldr w25, [x2, 1708] + cmn w26, #1 + str w7, [x2, 1708] + bne .L2525 + ldrh w7, [x4, x9, lsl 1] + cmp w7, w1 + bne .L2526 + cbz w8, .L2525 +.L2526: + cmp w22, w25 + csel w26, w26, w25, eq +.L2525: + add x0, x0, 56 + b .L2523 +.L2524: + add x0, x27, :lo12:.LANCHOR4 + ldrh w1, [x19] + strh w1, [x0, 1754] + ldrb w1, [x19, 8] + cbnz w1, .L2517 + adrp x1, .LANCHOR0 + add x1, x1, :lo12:.LANCHOR0 + add x1, x1, 1168 + ldrh w2, [x1, w23, sxtw 1] + mov w1, 65535 + cmp w2, w1 + bne .L2528 + cmn w26, #1 + beq .L2529 + str w26, [x0, 1708] +.L2517: + add x0, x27, :lo12:.LANCHOR4 + ldr w24, [x29, 156] + add x20, x20, :lo12:.LANCHOR2 + mov w1, 1 + strh w1, [x0, 1756] +.L2535: + ldrh w0, [x20, 2276] + mov w23, 0 + ldrb w6, [x20, 1220] + mov w7, 65535 + add x0, x0, 8 + ldr x1, [x29, 144] + add x0, x19, x0, lsl 1 +.L2536: + cmp x0, x1 + bne .L2539 + ldr w2, [x29, 152] + mov w1, w23 + ldr x0, [x20, 2520] + mov x25, 0 + bl FlashReadPages + mov w0, 56 + umull x0, w23, w0 + add x23, x27, :lo12:.LANCHOR4 + str x0, [x29, 120] + adrp x0, .LC155 + add x0, x0, :lo12:.LC155 + str x0, [x29, 112] + add x0, x23, 1768 + str x0, [x29, 104] +.L2540: + ldr x0, [x29, 120] + cmp x0, x25 + bne .L2565 + ldrb w0, [x19, 8] + add w24, w24, 1 + and w24, w24, 65535 + cmp w0, 1 + bne .L2566 + ldrb w0, [x20, 1220] + cbz w0, .L2566 + ldrh w0, [x20, 2346] + cmp w0, w24 + bne .L2566 + cmp w21, w24 + beq .L2542 +.L2566: + ldrh w0, [x20, 2344] + cmp w0, w24 + bne .L2535 + ldrh w1, [x20, 2276] + mov w0, 0 + strh w24, [x19, 2] + mov w2, 65535 + strh wzr, [x19, 4] +.L2567: + cmp w0, w1 + beq .L2639 + ldr x4, [x29, 144] + ldrh w3, [x4], 2 + str x4, [x29, 144] + cmp w3, w2 + beq .L2568 + strb w0, [x19, 6] + b .L2639 +.L2529: + cmp w22, w5 + beq .L2530 + str w5, [x0, 1708] + b .L2517 +.L2530: + ldr w1, [x0, 1708] +.L2648: + sub w1, w1, #1 +.L2642: + str w1, [x0, 1708] + b .L2517 +.L2528: + cmp w25, w22 + beq .L2531 + cmn w25, #1 + beq .L2517 + str w25, [x0, 1708] + b .L2517 +.L2531: + ldr w1, [x0, 1708] + cmp w22, w1 + bne .L2648 + b .L2517 +.L2533: + add x0, x27, :lo12:.LANCHOR4 + mov w1, -1 + b .L2642 +.L2539: + ldrh w3, [x1] + cmp w3, w7 + beq .L2537 + mov w2, 56 + ldr x4, [x20, 2520] + orr w3, w24, w3, lsl 10 + umull x5, w23, w2 + add x4, x4, x5 + str w3, [x4, 4] + ldrb w2, [x19, 8] + cmp w2, 1 + bne .L2538 + cbz w6, .L2538 + ldr x2, [x20, 2520] + add x2, x2, x5 + ldr w3, [x2, 4] + orr w3, w3, -2147483648 + str w3, [x2, 4] +.L2538: + add w23, w23, 1 + and w23, w23, 65535 +.L2537: + add x1, x1, 2 + b .L2536 +.L2565: + ldr x4, [x20, 2520] + add x4, x4, x25 + ldr w5, [x4, 4] + str w5, [x29, 172] + lsr w0, w5, 10 + bl P2V_plane + and w0, w0, 65535 + ldr w1, [x29, 156] + cmp w24, w1 + bcc .L2541 + ldr w1, [x29, 140] + ccmp w1, w0, 0, eq + bhi .L2541 + cmp w24, w21 + ccmp w28, w0, 0, eq + beq .L2542 + ldr w0, [x4] + cmn w0, #1 + beq .L2543 + ldr x3, [x4, 16] + mov w0, 61589 + ldrh w1, [x3] + cmp w1, w0 + beq .L2544 + ldrh w0, [x19] +.L2644: + bl decrement_vpc_count + b .L2541 +.L2544: + ldr w22, [x3, 4] + cmn w22, #1 + beq .L2545 + ldr w1, [x20, 2400] + mov w0, w22 + bl ftl_cmp_data_ver + cbz w0, .L2545 + add w0, w22, 1 + str w0, [x20, 2400] +.L2545: + ldp w26, w0, [x3, 8] + add x1, x29, 168 + str w0, [x29, 164] + mov w2, 0 + mov w0, w26 + bl log2phys + ldr w1, [x23, 1708] + ldr w3, [x29, 164] + cmn w1, #1 + beq .L2546 + mov w0, w22 + bl ftl_cmp_data_ver + cbz w0, .L2546 + cmn w3, #1 + beq .L2547 + ldr x0, [x20, 2520] + mov w2, 0 + mov w1, 1 + add x0, x0, x25 + ldr x4, [x0, 16] + str w3, [x0, 4] + str x4, [x29, 128] + ldr x0, [x20, 2520] + add x0, x0, x25 + bl FlashReadPages + ldr x0, [x20, 2520] + ldr x4, [x29, 128] + add x3, x0, x25 + ldr w0, [x0, x25] + cmn w0, #1 + bne .L2548 +.L2549: + mov w0, -1 + str w0, [x29, 164] +.L2556: + ldr w4, [x29, 164] + cmn w4, #1 + beq .L2541 +.L2571: + lsr w0, w4, 10 + bl P2V_block_in_plane + ldr x3, [x20, 2712] + and w1, w0, 65535 + ubfiz x2, x1, 1, 16 + ldrh w2, [x3, x2] + cbnz w2, .L2644 + adrp x0, .LC154 + add x0, x0, :lo12:.LC154 + bl printk + b .L2541 +.L2547: + ldp w1, w0, [x29, 168] + cmp w1, w0 + bne .L2541 + mov w2, 1 + add x1, x29, 164 + mov w0, w26 + bl log2phys +.L2541: + add x25, x25, 56 + b .L2540 +.L2548: + ldr w0, [x4, 8] + cmp w26, w0 + bne .L2549 + ldr w0, [x4, 4] + str w0, [x29, 128] + str x4, [x29, 96] + uxtw x1, w0 + ldr w0, [x23, 1708] + bl ftl_cmp_data_ver + cbz w0, .L2549 + ldp w0, w1, [x29, 168] + ldr x4, [x29, 96] + cmp w0, w1 + ldr w1, [x29, 164] + bne .L2551 +.L2643: + mov w0, w26 + bl FtlReUsePrevPpa + b .L2549 +.L2551: + cmp w0, w1 + beq .L2549 + cmn w0, #1 + beq .L2552 + ldr x4, [x3, 16] + mov w2, 0 + str w0, [x3, 4] + mov w1, 1 + str x4, [x29, 96] + ldr x0, [x20, 2520] + add x0, x0, x25 + bl FlashReadPages + ldr x4, [x29, 96] +.L2553: + adrp x0, .LANCHOR2+2520 + ldr x0, [x0, #:lo12:.LANCHOR2+2520] + ldr w0, [x0, x25] + cmn w0, #1 + beq .L2554 + ldr w3, [x4, 4] + ldr w0, [x23, 1708] + mov w1, w3 + bl ftl_cmp_data_ver + cbz w0, .L2554 + ldr w0, [x29, 128] + mov w1, w3 + bl ftl_cmp_data_ver + cbz w0, .L2549 +.L2554: + ldr w1, [x29, 164] + b .L2643 +.L2552: + str w0, [x3] + b .L2553 +.L2546: + ldp w1, w0, [x29, 168] + cmp w1, w0 + beq .L2556 + cmn w3, #1 + beq .L2558 + ldr w0, [x20, 2292] + ubfx x3, x3, 10, 21 + cmp w3, w0 + bcs .L2541 +.L2558: + mov w2, 1 + add x1, x29, 172 + mov w0, w26 + bl log2phys + ldr w4, [x29, 168] + cmn w4, #1 + beq .L2556 + ldr w0, [x29, 164] + cmp w4, w0 + beq .L2571 + lsr w0, w4, 10 + bl P2V_block_in_plane + ldrh w1, [x23, 784] + and w0, w0, 65535 + cmp w1, w0 + beq .L2561 + ldrh w1, [x23, 832] + cmp w1, w0 + beq .L2561 + ldrh w1, [x23, 880] + cmp w1, w0 + bne .L2556 +.L2561: + ldr x0, [x20, 2520] + mov w2, 0 + mov w1, 1 + str w4, [x0, 4] + ldr x3, [x0, 16] + ldr x0, [x20, 2520] + str x3, [x29, 128] + bl FlashReadPages + ldr x0, [x20, 2520] + ldr w0, [x0] + cmn w0, #1 + beq .L2556 + ldr x3, [x29, 128] + mov w0, w22 + ldr w1, [x3, 4] + bl ftl_cmp_data_ver + cbnz w0, .L2556 + mov w2, 1 + add x1, x29, 168 + mov w0, w26 + bl log2phys + b .L2556 +.L2543: + ldrh w0, [x19] + mov w2, w22 + strh w0, [x23, 1754] + mov w1, w5 + ldr x0, [x29, 112] + bl printk + ldr w0, [x23, 1760] + cmp w0, 31 + bhi .L2563 + ldr x2, [x29, 104] + ldr w1, [x29, 172] + str w1, [x2, w0, uxtw 2] + add w0, w0, 1 + str w0, [x23, 1760] +.L2563: + ldrh w0, [x19] + bl decrement_vpc_count + ldr w0, [x23, 1708] + cmn w0, #1 + bne .L2564 +.L2645: + str w22, [x23, 1708] + b .L2541 +.L2564: + cmp w22, w0 + bcs .L2541 + b .L2645 +.L2568: + add w0, w0, 1 + and w0, w0, 65535 + b .L2567 +.L2542: + strb w28, [x19, 6] + strh w21, [x19, 2] + b .L2647 + .size FtlRecoverySuperblock, .-FtlRecoverySuperblock + .align 2 + .global FtlSlcSuperblockCheck + .type FtlSlcSuperblockCheck, %function +FtlSlcSuperblockCheck: + ldrh w1, [x0, 4] + cbz w1, .L2661 + ldrh w2, [x0] + mov w1, 65535 + cmp w2, w1 + beq .L2661 + stp x29, x30, [sp, -48]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + mov x19, x0 + stp x21, x22, [sp, 32] + adrp x21, .LANCHOR0 + add x21, x21, :lo12:.LANCHOR0 + adrp x20, .LANCHOR2 + ldrb w0, [x0, 6] + add x22, x20, :lo12:.LANCHOR2 + add x21, x21, 1168 + add x0, x0, 8 + ldrh w1, [x19, x0, lsl 1] +.L2653: + mov w0, 65535 + cmp w1, w0 + beq .L2655 + ldrb w1, [x19, 8] + cmp w1, 1 + bne .L2656 + ldrb w2, [x22, 1220] + cbnz w2, .L2656 + ldrh w2, [x19, 2] + ldrh w2, [x21, x2, lsl 1] + cmp w2, w0 + bne .L2656 + ldrh w0, [x19, 4] + sub w0, w0, #1 + strh w0, [x19, 4] + ldrh w0, [x19] + bl decrement_vpc_count + ldrh w0, [x19, 4] + cbnz w0, .L2655 + ldrh w0, [x19, 2] + add w0, w0, 1 +.L2664: + strh w0, [x19, 2] + strb wzr, [x19, 6] +.L2649: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x29, x30, [sp], 48 + ret +.L2655: + ldrb w0, [x19, 6] + ldrh w1, [x22, 2276] + add w0, w0, 1 + and w0, w0, 255 + strb w0, [x19, 6] + cmp w1, w0 + bne .L2654 + ldrh w0, [x19, 2] + strb wzr, [x19, 6] + add w0, w0, 1 + strh w0, [x19, 2] +.L2654: + ldrb w0, [x19, 6] + add x0, x0, 8 + ldrh w1, [x19, x0, lsl 1] + b .L2653 +.L2656: + add x0, x20, :lo12:.LANCHOR2 + ldrb w2, [x0, 1220] + cbz w2, .L2649 + cmp w1, 1 + bne .L2649 + ldrh w2, [x19, 2] + ldrh w1, [x0, 2346] + cmp w2, w1 + bcc .L2649 + ldrh w1, [x19] + ldr x3, [x0, 2712] + ldrh w4, [x19, 4] + lsl x1, x1, 1 + ldrh w2, [x3, x1] + sub w2, w2, w4 + strh w2, [x3, x1] + strh wzr, [x19, 4] + ldrh w0, [x0, 2344] + b .L2664 +.L2661: + ret + .size FtlSlcSuperblockCheck, .-FtlSlcSuperblockCheck + .align 2 + .global get_new_active_ppa + .type get_new_active_ppa, %function +get_new_active_ppa: + stp x29, x30, [sp, -64]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + mov x19, x0 + stp x21, x22, [sp, 32] + adrp x21, .LANCHOR0 + str x23, [sp, 48] + add x21, x21, :lo12:.LANCHOR0 + strb wzr, [x0, 10] + adrp x20, .LANCHOR2 + ldrb w0, [x0, 6] + add x21, x21, 1168 + add x23, x20, :lo12:.LANCHOR2 + add x0, x0, 8 + ldrh w0, [x19, x0, lsl 1] +.L2666: + mov w2, 65535 + cmp w0, w2 + beq .L2667 + ldrb w1, [x19, 8] + ldrh w22, [x19, 2] + cmp w1, 1 + ldrh w1, [x19, 4] + bne .L2669 + ldrb w3, [x23, 1220] + cbnz w3, .L2669 + ldrh w3, [x21, w22, sxtw 1] + cmp w3, w2 + bne .L2669 + ldrh w0, [x19] + sub w1, w1, #1 + strh w1, [x19, 4] + bl decrement_vpc_count +.L2667: + ldrb w0, [x19, 6] + ldrh w1, [x23, 2276] + add w0, w0, 1 + and w0, w0, 255 + strb w0, [x19, 6] + cmp w1, w0 + bne .L2668 + ldrh w0, [x19, 2] + strb wzr, [x19, 6] + add w0, w0, 1 + strh w0, [x19, 2] +.L2668: + ldrb w0, [x19, 6] + add x0, x0, 8 + ldrh w0, [x19, x0, lsl 1] + b .L2666 +.L2669: + adrp x21, .LANCHOR0 + add x21, x21, :lo12:.LANCHOR0 + orr w22, w22, w0, lsl 10 + add x20, x20, :lo12:.LANCHOR2 + add x21, x21, 1168 + sub w1, w1, #1 + strh w1, [x19, 4] +.L2670: + ldrb w0, [x19, 6] + mov w1, 65535 + ldrh w3, [x20, 2276] +.L2672: + add w0, w0, 1 + and w0, w0, 255 + cmp w0, w3 + bne .L2671 + ldrh w0, [x19, 2] + add w0, w0, 1 + strh w0, [x19, 2] + mov w0, 0 +.L2671: + add x2, x19, w0, sxtw 1 + ldrh w2, [x2, 16] + cmp w2, w1 + beq .L2672 + strb w0, [x19, 6] + ldrb w0, [x19, 8] + cmp w0, 1 + bne .L2665 + ldrb w2, [x20, 1220] + ldrh w0, [x19, 2] + cbnz w2, .L2674 + ldrh w0, [x21, w0, sxtw 1] + cmp w0, w1 + bne .L2665 + ldrh w0, [x19, 4] + cbz w0, .L2665 + sub w0, w0, #1 + strh w0, [x19, 4] + ldrh w0, [x19] + bl decrement_vpc_count + b .L2670 +.L2674: + ldrh w1, [x20, 2346] + cmp w0, w1 + bcc .L2665 + ldrh w0, [x19] + ldr x2, [x20, 2712] + ldrh w3, [x19, 4] + lsl x0, x0, 1 + ldrh w1, [x2, x0] + sub w1, w1, w3 + strh w1, [x2, x0] + strh wzr, [x19, 4] + ldrh w0, [x20, 2344] + strh w0, [x19, 2] + strb wzr, [x19, 6] +.L2665: + mov w0, w22 + ldr x23, [sp, 48] + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x29, x30, [sp], 64 + ret + .size get_new_active_ppa, .-get_new_active_ppa + .align 2 + .global FtlWriteDumpData + .type FtlWriteDumpData, %function +FtlWriteDumpData: + stp x29, x30, [sp, -144]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + stp x21, x22, [sp, 32] + adrp x22, .LANCHOR2 + add x20, x22, :lo12:.LANCHOR2 + stp x23, x24, [sp, 48] + str x25, [sp, 64] + ldr w0, [x20, 2928] + cbnz w0, .L2681 + adrp x19, .LANCHOR4 + add x0, x19, :lo12:.LANCHOR4 + add x0, x0, 784 + ldrh w2, [x0, 4] + cbz w2, .L2683 + ldrb w1, [x0, 8] + cbnz w1, .L2683 + ldrb w1, [x0, 7] + ldrh w3, [x20, 2344] + mul w1, w1, w3 + cmp w2, w1 + beq .L2683 + ldrb w0, [x0, 10] + cbnz w0, .L2681 + ldr w23, [x20, 2924] + add x1, x29, 84 + ldrh w25, [x20, 2276] + mov w2, 0 + sub w23, w23, #1 + mov w0, w23 + bl log2phys + ldr x21, [x20, 2640] + ldr w0, [x29, 84] + ldr x1, [x20, 2576] + str w0, [x29, 92] + cmn w0, #1 + stp x1, x21, [x29, 96] + str w23, [x29, 112] + str wzr, [x21, 4] + beq .L2685 + mov w2, 0 + mov w1, 1 + add x0, x29, 88 + bl FlashReadPages +.L2686: + add x20, x19, :lo12:.LANCHOR4 + lsl w25, w25, 2 + add x20, x20, 784 + add x22, x22, :lo12:.LANCHOR2 + mov w0, -3947 + mov w24, 0 + strh w0, [x21] +.L2687: + cmp w25, w24 + bne .L2691 +.L2688: + add x19, x19, :lo12:.LANCHOR4 + mov w0, 1 + strb w0, [x19, 794] +.L2681: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldr x25, [sp, 64] + ldp x29, x30, [sp], 144 + ret +.L2685: + ldrh w2, [x20, 2354] + mov w1, 255 + ldr x0, [x20, 2576] + bl ftl_memset + b .L2686 +.L2691: + ldrh w0, [x20, 4] + cbz w0, .L2688 + ldr w0, [x29, 92] + add w24, w24, 1 + stp w23, w0, [x21, 8] + ldrh w0, [x20] + strh w0, [x21, 2] + mov x0, x20 + bl get_new_active_ppa + str w0, [x29, 92] + ldr w0, [x22, 2400] + mov w3, 0 + str w0, [x21, 4] + mov w2, 0 + add w0, w0, 1 + mov w1, 1 + cmn w0, #1 + csel w0, w0, wzr, ne + str w0, [x22, 2400] + add x0, x29, 88 + bl FlashProgPages + ldrh w0, [x20] + bl decrement_vpc_count + b .L2687 +.L2683: + add x19, x19, :lo12:.LANCHOR4 + strb wzr, [x19, 794] + b .L2681 + .size FtlWriteDumpData, .-FtlWriteDumpData + .align 2 + .global l2p_flush + .type l2p_flush, %function +l2p_flush: + stp x29, x30, [sp, -32]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x20, .LANCHOR2 + add x20, x20, :lo12:.LANCHOR2 + mov w19, 0 + bl FtlWriteDumpData +.L2700: + ldrh w0, [x20, 2382] + cmp w0, w19 + bhi .L2702 + mov w0, 0 + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 32 + ret +.L2702: + ldr x1, [x20, 2792] + ubfiz x0, x19, 4, 16 + add x0, x1, x0 + ldr w0, [x0, 4] + tbz w0, #31, .L2701 + mov w0, w19 + bl flush_l2p_region +.L2701: + add w19, w19, 1 + and w19, w19, 65535 + b .L2700 + .size l2p_flush, .-l2p_flush + .align 2 + .global FtlSuperblockPowerLostFix + .type FtlSuperblockPowerLostFix, %function +FtlSuperblockPowerLostFix: + stp x29, x30, [sp, -128]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x20, .LANCHOR2 + add x1, x20, :lo12:.LANCHOR2 + stp x21, x22, [sp, 32] + stp x23, x24, [sp, 48] + ldr w24, [x1, 2928] + cbnz w24, .L2704 + ldrb w1, [x1, 1220] + cbz w1, .L2715 + ldrb w1, [x0, 8] + cmp w1, 1 + bne .L2715 + ldrh w23, [x0, 4] + mov w24, w1 +.L2706: + mov x19, x0 + mov w0, -1 + str w0, [x29, 96] + add x0, x20, :lo12:.LANCHOR2 + mov w2, 61589 + mov x21, x0 + ldr x22, [x0, 2640] + ldr x1, [x0, 2576] + stp x1, x22, [x29, 80] + mov w1, -3 + str w1, [x22, 8] + mov w1, -2 + str w1, [x22, 12] + ldrh w1, [x19] + strh w1, [x22, 2] + strh wzr, [x22] + ldr x1, [x0, 2576] + str w2, [x1] + mov w2, 22136 + movk w2, 0x1234, lsl 16 + ldr x1, [x0, 2576] + str w2, [x1, 4] +.L2707: + sub w23, w23, #1 + cmn w23, #1 + beq .L2710 + ldrh w0, [x19, 4] + cbnz w0, .L2708 +.L2710: + add x20, x20, :lo12:.LANCHOR2 + ldrh w0, [x19] + ldrh w3, [x19, 4] + ldr x2, [x20, 2712] + lsl x0, x0, 1 + ldrh w1, [x2, x0] + sub w1, w1, w3 + strh w1, [x2, x0] + strb wzr, [x19, 6] + ldrh w0, [x20, 2344] + strh w0, [x19, 2] + strh wzr, [x19, 4] +.L2704: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x29, x30, [sp], 128 + ret +.L2715: + mov w23, 12 + b .L2706 +.L2708: + mov x0, x19 + bl get_new_active_ppa + str w0, [x29, 76] + cmn w0, #1 + beq .L2710 + ldr w0, [x21, 2400] + mov w3, 0 + str w0, [x22, 4] + mov w2, w24 + add w0, w0, 1 + mov w1, 1 + cmn w0, #1 + csel w0, w0, wzr, ne + str w0, [x21, 2400] + add x0, x29, 72 + bl FlashProgPages + ldrh w0, [x19] + bl decrement_vpc_count + b .L2707 + .size FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix + .align 2 + .global FtlVpcCheckAndModify + .type FtlVpcCheckAndModify, %function +FtlVpcCheckAndModify: + stp x29, x30, [sp, -80]! + adrp x1, .LANCHOR3 + add x1, x1, :lo12:.LANCHOR3 + adrp x0, .LC49 + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x20, .LANCHOR2 + add x19, x20, :lo12:.LANCHOR2 + stp x21, x22, [sp, 32] + add x1, x1, 232 + add x0, x0, :lo12:.LC49 + str x23, [sp, 48] + bl printk + ldr x0, [x19, 2704] + mov w21, 0 + ldrh w2, [x19, 2286] + mov w1, 0 + lsl w2, w2, 1 + bl ftl_memset +.L2721: + ldr w0, [x19, 2924] + cmp w21, w0 + bcc .L2723 + adrp x22, .LANCHOR4 + adrp x23, .LC156 + add x20, x20, :lo12:.LANCHOR2 + add x22, x22, :lo12:.LANCHOR4 + add x23, x23, :lo12:.LC156 + mov w19, 0 +.L2724: + ldrh w0, [x20, 2284] + cmp w0, w19 + bhi .L2727 + bl l2p_flush + bl FtlVpcTblFlush + ldr x23, [sp, 48] + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x29, x30, [sp], 80 + ret +.L2723: + mov w2, 0 + add x1, x29, 76 + mov w0, w21 + bl log2phys + ldr w0, [x29, 76] + cmn w0, #1 + beq .L2722 + lsr w0, w0, 10 + bl P2V_block_in_plane + ldr x2, [x19, 2704] + ubfiz x0, x0, 1, 16 + ldrh w1, [x2, x0] + add w1, w1, 1 + strh w1, [x2, x0] +.L2722: + add w21, w21, 1 + b .L2721 +.L2727: + ldr x0, [x20, 2712] + ubfiz x21, x19, 1, 16 + ldrh w2, [x0, x21] + ldr x0, [x20, 2704] + ldrh w3, [x0, x21] + cmp w2, w3 + beq .L2725 + mov w0, 65535 + cmp w2, w0 + beq .L2725 + ldrh w0, [x22, 784] + cmp w0, w19 + beq .L2725 + ldrh w0, [x22, 880] + cmp w0, w19 + beq .L2725 + ldrh w0, [x22, 832] + cmp w0, w19 + beq .L2725 + mov w1, w19 + mov x0, x23 + bl printk + ldr x0, [x20, 2712] + ldrh w1, [x0, x21] + cbnz w1, .L2726 + ldr x1, [x20, 2704] + ldrh w1, [x1, x21] + strh w1, [x0, x21] +.L2725: + add w19, w19, 1 + and w19, w19, 65535 + b .L2724 +.L2726: + ldr x1, [x20, 2704] + ldrh w1, [x1, x21] + strh w1, [x0, x21] + mov w0, w19 + bl update_vpc_list + b .L2725 + .size FtlVpcCheckAndModify, .-FtlVpcCheckAndModify + .align 2 + .global allocate_new_data_superblock + .type allocate_new_data_superblock, %function +allocate_new_data_superblock: + stp x29, x30, [sp, -48]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x20, .LANCHOR2 + add x2, x20, :lo12:.LANCHOR2 + stp x21, x22, [sp, 32] + ldr w1, [x2, 2928] + cbnz w1, .L2733 + ldrh w21, [x0] + mov x22, x0 + mov w0, 65535 + cmp w21, w0 + beq .L2734 + ldr x0, [x2, 2712] + ubfiz x1, x21, 1, 16 + ldrh w0, [x0, x1] + cbz w0, .L2735 + mov w0, w21 + bl INSERT_DATA_LIST +.L2734: + adrp x19, .LANCHOR4 + strb wzr, [x22, 8] + add x1, x19, :lo12:.LANCHOR4 + add x0, x1, 832 + cmp x22, x0 + beq .L2736 + add x2, x20, :lo12:.LANCHOR2 + ldrh w3, [x2, 2296] + cmp w3, 1 + beq .L2736 + ldrb w0, [x2, 1220] + cbz w0, .L2737 +.L2736: + mov w0, 1 + strb w0, [x22, 8] +.L2738: + add x0, x19, :lo12:.LANCHOR4 + mov w1, 65535 + ldrh w0, [x0, 1696] + cmp w0, w1 + beq .L2743 + cmp w21, w0 + bne .L2744 + add x20, x20, :lo12:.LANCHOR2 + ubfiz x1, x0, 1, 16 + ldr x2, [x20, 2712] + ldrh w1, [x2, x1] + cbz w1, .L2745 +.L2744: + bl update_vpc_list +.L2745: + add x19, x19, :lo12:.LANCHOR4 + mov w0, -1 + strh w0, [x19, 1696] +.L2743: + mov x0, x22 + bl allocate_data_superblock + bl l2p_flush + mov w0, 0 + bl FtlEctTblFlush + bl FtlVpcTblFlush +.L2733: + mov w0, 0 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x29, x30, [sp], 48 + ret +.L2735: + mov w0, w21 + bl INSERT_FREE_LIST + b .L2734 +.L2737: + add x1, x1, 784 + cmp x22, x1 + bne .L2738 + cmp w3, 3 + beq .L2740 + ldr w0, [x2, 2392] + cmp w0, 1 + bne .L2741 +.L2740: + add x1, x19, :lo12:.LANCHOR4 + mov w0, 1 + strb w0, [x1, 792] +.L2741: + add x1, x20, :lo12:.LANCHOR2 + ldr w0, [x1, 2096] + cbz w0, .L2738 + ldr w0, [x1, 2444] + cmp w0, 39 + bhi .L2738 + add x1, x19, :lo12:.LANCHOR4 + mov w0, 1 + strb w0, [x1, 792] + b .L2738 + .size allocate_new_data_superblock, .-allocate_new_data_superblock + .align 2 + .global FtlReadRefresh + .type FtlReadRefresh, %function +FtlReadRefresh: + adrp x0, .LANCHOR4 + add x4, x0, :lo12:.LANCHOR4 + add x2, x4, 1152 + mov x1, x0 + adrp x0, .LANCHOR2 + add x0, x0, :lo12:.LANCHOR2 + ldr w3, [x2, 80] + cbz w3, .L2760 + ldr w1, [x0, 2924] + ldr w3, [x2, 84] + cmp w3, w1 + bcs .L2761 + stp x29, x30, [sp, -112]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + mov x20, x4 + mov x19, x0 + stp x21, x22, [sp, 32] + mov w21, 2048 +.L2766: + add x22, x20, 1152 + ldr w1, [x19, 2924] + ldr w0, [x22, 84] + cmp w0, w1 + bcc .L2762 +.L2765: + ldp x19, x20, [sp, 16] + mov w0, -1 + ldp x21, x22, [sp, 32] + ldp x29, x30, [sp], 112 + ret +.L2762: + add x1, x29, 52 + mov w2, 0 + bl log2phys + ldr w0, [x22, 84] + ldr w1, [x29, 52] + add w0, w0, 1 + str w0, [x22, 84] + cmn w1, #1 + beq .L2764 + str w0, [x29, 80] + add x0, x29, 112 + str w1, [x29, 60] + mov w2, 0 + stp xzr, xzr, [x29, 64] + mov w1, 1 + str wzr, [x0, -56]! + bl FlashReadPages + ldr w0, [x29, 56] + cmp w0, 256 + bne .L2765 + ldr w0, [x29, 52] + lsr w0, w0, 10 + bl P2V_block_in_plane + bl FtlGcRefreshBlock + b .L2765 +.L2764: + subs w21, w21, #1 + bne .L2766 + b .L2765 +.L2761: + ldr w0, [x0, 2424] + stp w0, wzr, [x2, 76] + str wzr, [x2, 84] +.L2773: + mov w0, 0 + ret +.L2760: + ldr w3, [x0, 2440] + mov w5, 10000 + mov w6, 31 + ldr w7, [x2, 76] + cmp w3, w5 + mov w5, 63 + csel w6, w6, w5, hi + ldr w5, [x0, 2424] + add w8, w5, 1048576 + cmp w7, w8 + bhi .L2770 + ldr w0, [x0, 2924] + mov w8, 1000 + lsr w3, w3, 10 + add w3, w3, 1 + mul w0, w0, w8 + udiv w0, w0, w3 + add w0, w0, w7 + cmp w5, w0 + bhi .L2770 + ldrh w0, [x4, 724] + tst w6, w0 + bne .L2773 + ldr w2, [x2, 100] + cmp w0, w2 + beq .L2773 +.L2770: + add x0, x1, :lo12:.LANCHOR4 + add x1, x0, 1152 + ldrh w0, [x0, 724] + str w0, [x1, 100] + str w5, [x1, 76] + mov w0, 1 + str wzr, [x1, 84] + str w0, [x1, 80] + b .L2773 + .size FtlReadRefresh, .-FtlReadRefresh + .align 2 + .global ftl_do_gc + .type ftl_do_gc, %function +ftl_do_gc: + stp x29, x30, [sp, -144]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x19, .LANCHOR2 + add x3, x19, :lo12:.LANCHOR2 + stp x21, x22, [sp, 32] + stp x23, x24, [sp, 48] + stp x25, x26, [sp, 64] + stp x27, x28, [sp, 80] + ldr w2, [x3, 2928] + cbnz w2, .L2878 + adrp x2, .LANCHOR1 + add x2, x2, :lo12:.LANCHOR1 + ldr w21, [x2, 3448] + cmp w21, 1 + bne .L2878 + ldr w3, [x3, 2448] + cbnz w3, .L2878 + adrp x20, .LANCHOR4 + add x3, x20, :lo12:.LANCHOR4 + ldrh w4, [x3, 760] + cmp w4, 47 + bls .L2878 + mov w23, w1 + str w0, [x29, 124] + ldrh w1, [x2, 3452] + mov w0, 65535 + cmp w1, w0 + bne .L2781 +.L2784: + add x0, x19, :lo12:.LANCHOR2 + mov w2, 65535 + ldrh w4, [x0, 2474] + cmp w4, w2 + bne .L2782 +.L2783: + add x1, x19, :lo12:.LANCHOR2 + ldr w2, [x29, 124] + cmp w2, 1 + ldr w0, [x1, 2464] + add w0, w0, 1 + add w0, w0, w2, lsl 7 + str w0, [x1, 2464] + bne .L2785 + ldr w2, [x1, 2096] + cbnz w2, .L2786 + ldrb w1, [x1, 1220] + cbz w1, .L2785 +.L2786: + add x22, x19, :lo12:.LANCHOR2 + ldr w1, [x22, 2444] + cmp w1, 39 + bhi .L2785 + add x25, x20, :lo12:.LANCHOR4 + mov w21, 65535 + ldrh w1, [x25, 1896] + add w0, w1, w0 + str w0, [x22, 2464] + bl FtlGcReFreshBadBlk + ldrh w0, [x25, 1104] + cmp w0, w21 + bne .L2787 + ldrh w1, [x22, 2472] + cmp w1, w0 + bne .L2874 + ldr w0, [x22, 2464] + cmp w0, 1024 + bhi .L2789 + ldrh w0, [x25, 776] + cmp w0, 63 + bhi .L2874 +.L2789: + add x1, x19, :lo12:.LANCHOR2 + add x0, x20, :lo12:.LANCHOR4 + ldrh w2, [x1, 2482] + ldrh w3, [x0, 776] + strh wzr, [x0, 1896] + add w2, w2, 64 + cmp w3, w2 + bgt .L2874 + str wzr, [x1, 2464] + ldr w1, [x1, 2444] + cbnz w1, .L2790 + mov w1, 6 +.L2927: + strh w1, [x0, 1896] +.L2791: + mov w0, 32 + bl List_get_gc_head_node + and w5, w0, 65535 + mov w8, 65535 + cmp w5, w8 + beq .L2795 + add x22, x19, :lo12:.LANCHOR2 + ldrh w0, [x22, 2484] + cbz w0, .L2793 + ldrh w1, [x22, 2346] + ubfiz x5, x5, 1, 16 + ldrh w3, [x22, 2276] + ldr x7, [x22, 2712] + mul w1, w1, w3 + ldrh w2, [x7, x5] + add w1, w1, 1 + cmp w2, w1 + bgt .L2795 + add w6, w0, 1 + str wzr, [x22, 2452] + and w6, w6, 65535 + strh w6, [x22, 2484] + bl List_get_gc_head_node + and w21, w0, 65535 + cmp w21, w8 + beq .L2795 + ubfiz x25, x21, 1, 16 + ldrh w4, [x7, x5] + mov w2, w21 + mov w1, w6 + adrp x0, .LC157 + add x0, x0, :lo12:.LC157 + ldrh w3, [x7, x25] + bl printk + ldrh w0, [x22, 2484] + cmp w0, 40 + bls .L2794 + ldr x0, [x22, 2712] + ldrh w0, [x0, x25] + cmp w0, 32 + bls .L2794 + strh wzr, [x22, 2484] +.L2794: + add x0, x20, :lo12:.LANCHOR4 + mov w1, 6 + strh w1, [x0, 1896] +.L2787: + ldr w1, [x29, 124] + mov w0, 65535 + cmp w1, 0 + ccmp w21, w0, 0, eq + bne .L2809 + add x0, x20, :lo12:.LANCHOR4 + ldrh w0, [x0, 776] + cmp w0, 24 + bhi .L2886 + add x1, x19, :lo12:.LANCHOR2 + cmp w0, 16 + ldrh w22, [x1, 2344] + bls .L2811 + lsr w22, w22, 5 +.L2810: + add x1, x19, :lo12:.LANCHOR2 + ldrh w2, [x1, 2480] + cmp w2, w0 + bcs .L2814 + add x3, x20, :lo12:.LANCHOR4 + mov w2, 65535 + ldrh w0, [x3, 880] + cmp w0, w2 + bne .L2815 + ldrh w2, [x1, 2472] + cmp w2, w0 + bne .L2815 + ldrh w0, [x3, 1896] + cbnz w0, .L2816 + ldr w2, [x1, 2924] + ldr w3, [x3, 1068] + add w2, w2, w2, lsl 1 + cmp w3, w2, lsr 2 + bcs .L2817 +.L2816: + add x20, x20, :lo12:.LANCHOR4 + add x2, x19, :lo12:.LANCHOR2 + ldrh w1, [x20, 1096] + add w1, w1, w1, lsl 1 + asr w1, w1, 2 + strh w1, [x2, 2480] +.L2818: + add x19, x19, :lo12:.LANCHOR2 + str wzr, [x19, 2452] +.L2779: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 144 + ret +.L2781: + ldrh w1, [x3, 880] + cmp w1, w0 + beq .L2784 + mov w0, w21 + bl FtlGcFreeTempBlock + cbz w0, .L2784 + mov w0, w21 + b .L2779 +.L2782: + ldrh w1, [x0, 2472] + cmp w1, w2 + bne .L2783 + ldrh w3, [x0, 2476] + cmp w3, w1 + beq .L2783 + ldrh w2, [x0, 2478] + cmp w2, w1 + beq .L2783 + mov w1, -1 + strh w4, [x0, 2472] + strh w3, [x0, 2474] + strh w2, [x0, 2476] + strh w1, [x0, 2478] + b .L2783 +.L2790: + cmp w1, 5 + bhi .L2791 + mov w1, 18 + b .L2927 +.L2793: + mov w0, 1 + strh w0, [x22, 2484] +.L2795: + bl GetSwlReplaceBlock + and w21, w0, 65535 + mov w0, 65535 + cmp w21, w0 + bne .L2787 + add x0, x20, :lo12:.LANCHOR4 + strh wzr, [x0, 1896] +.L2785: + add x0, x20, :lo12:.LANCHOR4 + mov w21, 65535 + ldrh w0, [x0, 1104] + cmp w0, w21 + bne .L2787 +.L2874: + add x25, x20, :lo12:.LANCHOR4 + mov w0, 65535 + ldrh w21, [x25, 880] + cmp w21, w0 + bne .L2881 + add x26, x19, :lo12:.LANCHOR2 + ldrh w27, [x26, 2472] + cmp w27, w21 + bne .L2787 + ldrh w0, [x25, 776] + mov w1, 1024 + cmp w0, 24 + mov w0, 5120 + csel w0, w0, w1, cc + ldr w1, [x26, 2464] + cmp w1, w0 + bls .L2787 + strh wzr, [x25, 1896] + str wzr, [x26, 2464] + bl GetSwlReplaceBlock + and w21, w0, 65535 + cmp w21, w27 + bne .L2884 + ldrh w1, [x25, 776] + ldrh w0, [x26, 2482] + cmp w1, w0 + bcs .L2798 + mov w0, 64 + bl List_get_gc_head_node + and x0, x0, 65535 + cmp w0, w21 + beq .L2800 + ldr w1, [x26, 2388] + cbnz w1, .L2801 + ldrh w1, [x26, 2296] + cmp w1, 3 + beq .L2801 + ldr w1, [x26, 2392] + cbnz w1, .L2801 + ldr w1, [x26, 2096] + cbnz w1, .L2801 + ldrb w1, [x26, 1220] + cbz w1, .L2802 +.L2801: + add x1, x19, :lo12:.LANCHOR2 + ldr x2, [x1, 2712] + ldrh w3, [x2, x0, lsl 1] + ldrh w0, [x1, 2346] + ldrh w2, [x1, 2276] + ldrh w1, [x1, 2296] + cmp w1, 3 + mul w2, w2, w0 + lsr w0, w0, 1 + csel w0, w0, wzr, eq + add w0, w0, w2 + cmp w3, w0 + bgt .L2804 + mov w0, 0 + bl List_get_gc_head_node + add x1, x19, :lo12:.LANCHOR2 + add x2, x20, :lo12:.LANCHOR4 + and w22, w0, 65535 + ldr w0, [x1, 2924] + ldr w2, [x2, 1068] + add w0, w0, w0, lsl 1 + cmp w2, w0, lsr 2 + bls .L2805 + mov w0, 128 +.L2928: + strh w0, [x1, 2482] +.L2806: + mov w0, 65535 + cmp w22, w0 + beq .L2800 +.L2797: + add x1, x19, :lo12:.LANCHOR2 + ubfiz x2, x22, 1, 32 + add x0, x20, :lo12:.LANCHOR4 + mov w21, w22 + ldr x4, [x1, 2696] + ldr x3, [x1, 2712] + ldrh w5, [x1, 2480] + mov w1, w22 + ldrh w4, [x4, x2] + ldrh w3, [x3, x2] + ldrh w2, [x0, 776] + adrp x0, .LC158 + add x0, x0, :lo12:.LC158 + bl printk + b .L2800 +.L2805: + mov w0, 160 + b .L2928 +.L2804: + add x0, x19, :lo12:.LANCHOR2 + mov w1, 128 +.L2929: + strh w1, [x0, 2482] +.L2800: + bl FtlGcReFreshBadBlk + b .L2787 +.L2802: + ldr x1, [x26, 2712] + ldrh w0, [x1, x0, lsl 1] + cmp w0, 7 + bhi .L2807 + mov w0, 0 + bl List_get_gc_head_node + and w22, w0, 65535 + add x0, x19, :lo12:.LANCHOR2 + mov w1, 128 + strh w1, [x0, 2482] + b .L2806 +.L2807: + add x0, x19, :lo12:.LANCHOR2 + mov w1, 64 + b .L2929 +.L2798: + mov w0, 80 + strh w0, [x26, 2482] + b .L2800 +.L2884: + mov w22, w21 + b .L2797 +.L2881: + mov w21, w0 + b .L2787 +.L2811: + cmp w0, 12 + bls .L2812 + lsr w22, w22, 4 + b .L2810 +.L2812: + cmp w0, 8 + bls .L2810 + lsr w22, w22, 2 + b .L2810 +.L2886: + mov w22, 1 + b .L2810 +.L2817: + mov w2, 18 + strh w2, [x1, 2480] + b .L2818 +.L2815: + add x0, x20, :lo12:.LANCHOR4 + add x1, x19, :lo12:.LANCHOR2 + ldrh w0, [x0, 1096] + add w0, w0, w0, lsl 1 + asr w0, w0, 2 + strh w0, [x1, 2480] +.L2814: + add x0, x19, :lo12:.LANCHOR2 + ldr w0, [x0, 2096] + cbz w0, .L2888 + cmp w23, 2 + bhi .L2888 + add w22, w22, 1 + and w22, w22, 65535 +.L2888: + mov w21, 65535 + b .L2820 +.L2809: + add x1, x20, :lo12:.LANCHOR4 + ldrh w3, [x1, 880] + cmp w3, w0 + bne .L2821 + add x0, x19, :lo12:.LANCHOR2 + ldrh w2, [x0, 2472] + cmp w2, w3 + bne .L2821 + cmp w21, w2 + bne .L2821 + ldrh w2, [x1, 1104] + cmp w2, w21 + bne .L2821 + ldrh w3, [x1, 776] + ldrh w2, [x0, 2480] + str wzr, [x0, 2452] + cmp w3, w2 + bls .L2823 + ldrh w2, [x1, 1896] + cbnz w2, .L2824 + ldr w2, [x0, 2924] + ldr w1, [x1, 1068] + add w2, w2, w2, lsl 1 + cmp w1, w2, lsr 2 + bcs .L2825 +.L2824: + add x0, x20, :lo12:.LANCHOR4 + add x1, x19, :lo12:.LANCHOR2 + ldrh w0, [x0, 1096] + add w0, w0, w0, lsl 1 + asr w0, w0, 2 + strh w0, [x1, 2480] +.L2826: + bl FtlReadRefresh + mov w0, 0 + bl List_get_gc_head_node + add x1, x19, :lo12:.LANCHOR2 + ubfiz x0, x0, 1, 16 + ldr x1, [x1, 2712] + ldrh w0, [x1, x0] + cmp w0, 4 + bls .L2823 + add x20, x20, :lo12:.LANCHOR4 +.L2930: + ldrh w0, [x20, 1896] + b .L2779 +.L2825: + mov w1, 18 + strh w1, [x0, 2480] + b .L2826 +.L2823: + add x22, x20, :lo12:.LANCHOR4 + ldrh w0, [x22, 1896] + cbnz w0, .L2821 + ldrh w5, [x22, 1096] + add x6, x19, :lo12:.LANCHOR2 + add w0, w5, w5, lsl 1 + asr w0, w0, 2 + strh w0, [x6, 2480] + mov w0, 0 + bl List_get_gc_head_node + ldr x1, [x6, 2712] + ubfiz x0, x0, 1, 16 + ldrh w2, [x6, 2276] + ldrh w1, [x1, x0] + ldrh w0, [x6, 2346] + mul w0, w0, w2 + mov w2, 2 + sdiv w0, w0, w2 + cmp w1, w0 + ble .L2828 + ldrh w0, [x22, 776] + sub w5, w5, #1 + cmp w0, w5 + blt .L2828 + bl FtlReadRefresh + ldrh w0, [x22, 1896] + b .L2779 +.L2828: + cbnz w1, .L2821 + add x20, x20, :lo12:.LANCHOR4 + mov w0, -1 + bl decrement_vpc_count + ldrh w0, [x20, 776] + add w0, w0, 1 + b .L2779 +.L2821: + add x0, x19, :lo12:.LANCHOR2 + ldr w0, [x0, 2096] + cmp w0, 0 + cset w22, ne + add w22, w22, 1 +.L2820: + add x0, x20, :lo12:.LANCHOR4 + mov w2, 65535 + ldrh w1, [x0, 1104] + cmp w1, w2 + bne .L2830 + cmp w21, w1 + beq .L2831 + strh w21, [x0, 1104] +.L2832: + add x5, x20, :lo12:.LANCHOR4 + mov w1, 65535 + ldrh w0, [x5, 1104] + strb wzr, [x5, 1112] + cmp w0, w1 + beq .L2830 + bl IsBlkInGcList + cbz w0, .L2835 + mov w0, -1 + strh w0, [x5, 1104] +.L2835: + add x0, x19, :lo12:.LANCHOR2 + ldrb w0, [x0, 1220] + cbz w0, .L2836 + add x0, x20, :lo12:.LANCHOR4 + add x3, x0, 1104 + ldrh w0, [x0, 1104] + bl ftl_get_blk_mode + strb w0, [x3, 8] +.L2836: + add x12, x20, :lo12:.LANCHOR4 + mov w0, 65535 + add x13, x12, 1104 + ldrh w1, [x12, 1104] + cmp w1, w0 + beq .L2830 + mov x0, x13 + bl make_superblock + add x0, x19, :lo12:.LANCHOR2 + ldrh w1, [x12, 1104] + strh wzr, [x12, 1106] + strb wzr, [x12, 1110] + ldr x0, [x0, 2712] + strh wzr, [x12, 1898] + ldrh w0, [x0, x1, lsl 1] + strh w0, [x12, 1900] +.L2830: + add x0, x20, :lo12:.LANCHOR4 + ldrh w1, [x0, 1104] + ldrh w2, [x0, 784] + cmp w2, w1 + beq .L2837 + ldrh w2, [x0, 832] + cmp w2, w1 + beq .L2837 + ldrh w0, [x0, 880] + cmp w0, w1 + bne .L2871 +.L2837: + add x0, x20, :lo12:.LANCHOR4 + mov w1, -1 + strh w1, [x0, 1104] +.L2871: + add x25, x20, :lo12:.LANCHOR4 + mov w0, 65535 + ldrh w26, [x25, 1104] + cmp w26, w0 + bne .L2839 + add x23, x19, :lo12:.LANCHOR2 + mov w27, 2 + str wzr, [x23, 2452] +.L2840: + ldrh w5, [x23, 2484] + mov w0, w5 + bl List_get_gc_head_node + and w6, w0, 65535 + strh w6, [x25, 1104] + cmp w6, w26 + bne .L2841 + strh wzr, [x23, 2484] + mov w0, 8 + b .L2779 +.L2831: + add x1, x19, :lo12:.LANCHOR2 + ldrh w0, [x1, 2472] + cmp w0, w21 + beq .L2832 + ldr x2, [x1, 2712] + ubfiz x0, x0, 1, 16 + ldrh w0, [x2, x0] + cbnz w0, .L2833 + mov w0, -1 + strh w0, [x1, 2472] +.L2833: + add x1, x19, :lo12:.LANCHOR2 + add x0, x20, :lo12:.LANCHOR4 + ldrh w2, [x1, 2472] + strh w2, [x0, 1104] + mov w0, -1 + strh w0, [x1, 2472] + b .L2832 +.L2841: + mov w0, w6 + bl IsBlkInGcList + add w5, w5, 1 + cbz w0, .L2842 + strh w5, [x23, 2484] + b .L2840 +.L2842: + ldrh w4, [x23, 2276] + ubfiz x1, x6, 1, 16 + ldrh w0, [x23, 2344] + and w5, w5, 65535 + ldr x2, [x23, 2712] + strh w5, [x23, 2484] + mul w0, w0, w4 + ldrh w3, [x2, x1] + sdiv w4, w0, w27 + cmp w3, w4 + bgt .L2844 + cmp w5, 48 + bls .L2845 + cmp w3, 8 + bls .L2845 + ldrh w3, [x25, 1712] + cmp w3, 35 + bhi .L2845 +.L2844: + strh wzr, [x23, 2484] +.L2845: + ldrh w1, [x2, x1] + cmp w0, w1 + bgt .L2846 + cmp w21, w26 + bne .L2846 + ldrh w0, [x23, 2484] + cmp w0, 3 + bhi .L2846 + add x20, x20, :lo12:.LANCHOR4 + mov w0, -1 + strh wzr, [x23, 2484] + strh w0, [x20, 1104] + b .L2930 +.L2846: + cbnz w1, .L2847 + mov w0, -1 + bl decrement_vpc_count + ldrh w0, [x23, 2484] + add w0, w0, 1 + strh w0, [x23, 2484] + b .L2840 +.L2847: + add x0, x19, :lo12:.LANCHOR2 + add x3, x20, :lo12:.LANCHOR4 + add x3, x3, 1104 + ldrb w0, [x0, 1220] + strb wzr, [x3, 8] + cbz w0, .L2848 + mov w0, w6 + bl ftl_get_blk_mode + strb w0, [x3, 8] +.L2848: + add x12, x20, :lo12:.LANCHOR4 + add x13, x12, 1104 + mov x0, x13 + bl make_superblock + ldrh w1, [x12, 1104] + add x0, x19, :lo12:.LANCHOR2 + strh wzr, [x12, 1898] + ldr x0, [x0, 2712] + ldrh w0, [x0, x1, lsl 1] + strh w0, [x12, 1900] + strh wzr, [x12, 1106] + strb wzr, [x12, 1110] +.L2839: + ldr w0, [x29, 124] + cmp w0, 1 + bne .L2849 + bl FtlReadRefresh +.L2849: + add x0, x19, :lo12:.LANCHOR2 + mov w1, 1 + str w1, [x0, 2448] + ldrb w1, [x0, 1220] + ldrh w25, [x0, 2344] + cbz w1, .L2850 + add x1, x20, :lo12:.LANCHOR4 + ldrb w1, [x1, 1112] + cmp w1, 1 + bne .L2850 + ldrh w25, [x0, 2346] +.L2850: + add x0, x20, :lo12:.LANCHOR4 + ldrh w0, [x0, 1106] + add w1, w0, w22 + cmp w1, w25 + ble .L2851 + sub w22, w25, w0 + and w22, w22, 65535 +.L2851: + add x24, x20, :lo12:.LANCHOR4 + mov w26, 0 + add x27, x24, 880 +.L2852: + cmp w22, w26, uxth + bls .L2859 + add x1, x19, :lo12:.LANCHOR2 + ldrh w5, [x24, 1106] + add x3, x24, 1120 + mov w23, 0 + add w5, w5, w26 + mov w0, 0 + ldrh w9, [x1, 2276] + mov w8, 65535 + mov w7, 56 + b .L2860 +.L2854: + ldrh w2, [x3] + cmp w2, w8 + beq .L2853 + ldr x6, [x1, 2552] + orr w2, w5, w2, lsl 10 + umaddl x6, w23, w7, x6 + add w23, w23, 1 + and w23, w23, 65535 + str w2, [x6, 4] +.L2853: + add w0, w0, 1 + add x3, x3, 2 + and w0, w0, 65535 +.L2860: + cmp w0, w9 + bne .L2854 + add x3, x19, :lo12:.LANCHOR2 + ldrb w2, [x24, 1112] + mov w1, w23 + mov x28, x3 + ldr x0, [x3, 2552] + bl FlashReadPages + mov w0, 56 + umull x0, w23, w0 + mov x23, 0 + str x0, [x29, 112] +.L2855: + ldr x0, [x29, 112] + cmp x0, x23 + bne .L2858 + add w26, w26, 1 + b .L2852 +.L2858: + ldr x0, [x28, 2552] + add x1, x0, x23 + ldr w0, [x0, x23] + cmn w0, #1 + beq .L2856 + ldr x5, [x1, 16] + mov w1, 61589 + ldrh w0, [x5] + cmp w0, w1 + bne .L2856 + ldr w0, [x5, 8] + mov w2, 0 + add x1, x29, 136 + str x5, [x29, 104] + bl log2phys + ldr x0, [x28, 2552] + ldr w1, [x29, 136] + add x0, x0, x23 + ldr x5, [x29, 104] + and w1, w1, 2147483647 + ldr w2, [x0, 4] + cmp w1, w2 + bne .L2856 + ldrh w1, [x24, 1898] + mov w2, 56 + ldr x7, [x28, 2528] + add w1, w1, 1 + strh w1, [x24, 1898] + ldr w1, [x24, 1680] + ldr w0, [x0, 24] + str w2, [x29, 120] + nop // between mem op and mult-accumulate + umaddl x1, w1, w2, x7 + stp x5, x1, [x29, 96] + str w0, [x1, 24] + bl Ftl_get_new_temp_ppa + ldp x5, x1, [x29, 96] + ldr w2, [x29, 120] + str w0, [x1, 4] + ldr w0, [x24, 1680] + ldr x1, [x28, 2528] + umaddl x0, w0, w2, x1 + ldr x1, [x28, 2552] + add x1, x1, x23 + ldr x2, [x1, 8] + str x2, [x0, 8] + ldr x1, [x1, 16] + str x1, [x0, 16] + ldr w0, [x29, 136] + mov w1, 1 + str w0, [x5, 12] + ldrh w0, [x27] + strh w0, [x5, 2] + ldr w0, [x28, 2400] + str w0, [x5, 4] + ldr w0, [x24, 1680] + add w0, w0, 1 + str w0, [x24, 1680] + ldr x0, [x28, 2552] + add x0, x0, x23 + bl FtlGcBufAlloc + ldrb w0, [x28, 1220] + cbnz w0, .L2857 + ldrb w1, [x27, 7] + ldr w0, [x24, 1680] + cmp w1, w0 + beq .L2857 + ldrh w0, [x27, 4] + cbnz w0, .L2856 +.L2857: + bl Ftl_gc_temp_data_write_back + cbz w0, .L2856 + add x20, x20, :lo12:.LANCHOR4 + add x19, x19, :lo12:.LANCHOR2 + mov w0, -1 + strh wzr, [x20, 1106] + strh w0, [x20, 1104] + str wzr, [x19, 2448] + b .L2930 +.L2856: + add x23, x23, 56 + b .L2855 +.L2859: + add x23, x20, :lo12:.LANCHOR4 + ldrh w0, [x23, 1106] + add w22, w22, w0 + and w22, w22, 65535 + strh w22, [x23, 1106] + cmp w25, w22 + bhi .L2861 + ldr w0, [x23, 1680] + cbz w0, .L2862 + bl Ftl_gc_temp_data_write_back + cbz w0, .L2862 + add x19, x19, :lo12:.LANCHOR2 + ldrh w0, [x23, 1896] + str wzr, [x19, 2448] + b .L2779 +.L2862: + add x0, x20, :lo12:.LANCHOR4 + ldrh w1, [x0, 1898] + cbnz w1, .L2863 + add x1, x19, :lo12:.LANCHOR2 + ldrh w3, [x0, 1104] + ldr x2, [x1, 2712] + ldrh w2, [x2, x3, lsl 1] + cbz w2, .L2863 + mov x25, x1 + mov x23, x0 + mov w22, 0 +.L2864: + ldr w0, [x25, 2924] + cmp w22, w0 + bcs .L2869 + mov w2, 0 + add x1, x29, 140 + mov w0, w22 + bl log2phys + ldr w0, [x29, 140] + cmn w0, #1 + beq .L2865 + lsr w0, w0, 10 + bl P2V_block_in_plane + ldrh w1, [x23, 1104] + cmp w1, w0, uxth + bne .L2865 +.L2869: + add x1, x19, :lo12:.LANCHOR2 + ldr w0, [x1, 2924] + cmp w22, w0 + bcc .L2863 + add x0, x20, :lo12:.LANCHOR4 + ldr x1, [x1, 2712] + ldrh w2, [x0, 1104] + strh wzr, [x1, x2, lsl 1] + ldrh w0, [x0, 1104] + bl update_vpc_list + bl FtlCacheWriteBack + bl l2p_flush + bl FtlVpcTblFlush +.L2863: + add x0, x20, :lo12:.LANCHOR4 + mov w1, -1 + strh w1, [x0, 1104] +.L2861: + add x0, x20, :lo12:.LANCHOR4 + ldrh w1, [x0, 776] + cmp w1, 2 + bhi .L2870 + add x0, x19, :lo12:.LANCHOR2 + ldrh w22, [x0, 2344] + b .L2871 +.L2865: + add w22, w22, 1 + b .L2864 +.L2870: + ldrh w0, [x0, 1896] + add x19, x19, :lo12:.LANCHOR2 + cmp w0, 0 + csinc w0, w0, w1, ne + str wzr, [x19, 2448] + b .L2779 +.L2878: + mov w0, 0 + b .L2779 + .size ftl_do_gc, .-ftl_do_gc + .align 2 + .global FtlCacheWriteBack + .type FtlCacheWriteBack, %function +FtlCacheWriteBack: + stp x29, x30, [sp, -112]! + add x29, sp, 0 + stp x21, x22, [sp, 32] + adrp x22, .LANCHOR2 + add x0, x22, :lo12:.LANCHOR2 + stp x19, x20, [sp, 16] + stp x23, x24, [sp, 48] + stp x25, x26, [sp, 64] + stp x27, x28, [sp, 80] + ldr w24, [x0, 2928] + cbnz w24, .L2933 + ldr w1, [x0, 2496] + cbz w1, .L2933 + ldrb w0, [x0, 1220] + adrp x23, .LANCHOR4 + add x2, x23, :lo12:.LANCHOR4 + ldr x20, [x2, 1904] + cbz w0, .L2958 + ldrb w0, [x20, 8] + cmp w0, 1 + cset w25, eq +.L2935: + add x19, x22, :lo12:.LANCHOR2 + ldrb w3, [x20, 9] + adrp x26, .LC159 + mov w2, w25 + mov w21, 0 + mov w27, 56 + ldr x0, [x19, 2560] + add x26, x26, :lo12:.LC159 + bl FlashProgPages +.L2936: + ldr w0, [x19, 2496] + cmp w21, w0 + bcc .L2943 +.L2955: + add x22, x22, :lo12:.LANCHOR2 + str wzr, [x22, 2496] +.L2933: + ldp x19, x20, [sp, 16] + mov w0, 0 + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 112 + ret +.L2958: + mov w25, 0 + b .L2935 +.L2943: + umull x28, w21, w27 + ldr x0, [x19, 2560] + add x3, x0, x28 + ldr w0, [x0, x28] + cmn w0, #1 + bne .L2937 + add x19, x22, :lo12:.LANCHOR2 + add x23, x23, :lo12:.LANCHOR4 +.L2938: + ldr w0, [x19, 2496] + cmp w24, w0 + bcc .L2953 + add x20, x22, :lo12:.LANCHOR2 + mov w19, 16386 +.L2956: + ldrh w0, [x20, 2486] + cbz w0, .L2955 + mov w1, 1 + mov w0, w1 + bl ftl_do_gc + subs w19, w19, #1 + bne .L2956 + b .L2955 +.L2937: + ldr w0, [x3, 4] + cbnz w25, .L2939 +.L2972: + str w0, [x29, 108] + mov w2, 1 + ldr w0, [x3, 24] + add x1, x29, 108 + bl log2phys + ldr x0, [x19, 2560] + add x0, x0, x28 + ldr x0, [x0, 16] + ldr w0, [x0, 12] + cmn w0, #1 + beq .L2941 + lsr w0, w0, 10 + bl P2V_block_in_plane + ldr x2, [x19, 2712] + and w1, w0, 65535 + ubfiz x0, x1, 1, 16 + mov w28, w1 + ldrh w0, [x2, x0] + cbnz w0, .L2942 + mov w2, 0 + mov x0, x26 + bl printk +.L2942: + mov w0, w28 + bl decrement_vpc_count +.L2941: + add w21, w21, 1 + b .L2936 +.L2939: + orr w0, w0, -2147483648 + b .L2972 +.L2953: + mov w21, 56 + ldr x0, [x19, 2560] + mov w1, -1 + mov w26, 1 + umull x21, w24, w21 + str w1, [x0, x21] +.L2944: + ldr x0, [x19, 2560] + add x3, x0, x21 + ldr w0, [x0, x21] + cmn w0, #1 + ldr w0, [x3, 4] + beq .L2948 + cbnz w25, .L2949 +.L2973: + str w0, [x29, 108] + mov w2, 1 + ldr w0, [x3, 24] + add x1, x29, 108 + bl log2phys + ldr x0, [x19, 2560] + add x21, x0, x21 + ldr x0, [x21, 16] + ldr w0, [x0, 12] + cmn w0, #1 + beq .L2951 + lsr w0, w0, 10 + bl P2V_block_in_plane + ldr x2, [x19, 2712] + and w1, w0, 65535 + ubfiz x0, x1, 1, 16 + mov w21, w1 + ldrh w0, [x2, x0] + cbnz w0, .L2952 + adrp x0, .LC159 + mov w2, 0 + add x0, x0, :lo12:.LC159 + bl printk +.L2952: + mov w0, w21 + bl decrement_vpc_count +.L2951: + add w24, w24, 1 + b .L2938 +.L2948: + lsr w0, w0, 10 + bl P2V_block_in_plane + ldrh w1, [x20] + cmp w1, w0, uxth + bne .L2945 + ldr x2, [x19, 2712] + ubfiz x1, x1, 1, 16 + ldrh w3, [x20, 4] + ldrh w0, [x2, x1] + sub w0, w0, w3 + strh w0, [x2, x1] + strb wzr, [x20, 6] + ldrh w0, [x19, 2344] + strh w0, [x20, 2] + strh wzr, [x20, 4] +.L2945: + ldrh w0, [x20, 4] + cbnz w0, .L2946 + mov x0, x20 + bl allocate_new_data_superblock +.L2946: + ldr w0, [x23, 1248] + add w0, w0, 1 + str w0, [x23, 1248] + ldr x0, [x19, 2560] + add x0, x0, x21 + ldr w0, [x0, 4] + lsr w0, w0, 10 + bl FtlGcMarkBadPhyBlk + mov x0, x20 + bl get_new_active_ppa + ldr x1, [x19, 2560] + mov w2, w25 + str w0, [x29, 108] + add x1, x1, x21 + str w0, [x1, 4] + mov w1, 1 + ldrb w3, [x20, 9] + ldr x0, [x19, 2560] + add x0, x0, x21 + bl FlashProgPages + ldr x0, [x19, 2560] + ldr w0, [x0, x21] + cmn w0, #1 + bne .L2947 + str w26, [x19, 2928] +.L2947: + ldr w0, [x19, 2928] + cbz w0, .L2944 + b .L2933 +.L2949: + orr w0, w0, -2147483648 + b .L2973 + .size FtlCacheWriteBack, .-FtlCacheWriteBack + .align 2 + .global FtlSysFlush + .type FtlSysFlush, %function +FtlSysFlush: + adrp x0, .LANCHOR2+2928 + ldr w0, [x0, #:lo12:.LANCHOR2+2928] + cbnz w0, .L2977 + stp x29, x30, [sp, -32]! + adrp x0, .LANCHOR1+3448 + add x29, sp, 0 + str x19, [sp, 16] + ldr w19, [x0, #:lo12:.LANCHOR1+3448] + cmp w19, 1 + bne .L2975 + bl FtlCacheWriteBack + bl l2p_flush + mov w0, w19 + bl FtlEctTblFlush + bl FtlVpcTblFlush +.L2975: + mov w0, 0 + ldr x19, [sp, 16] + ldp x29, x30, [sp], 32 + ret +.L2977: + mov w0, 0 + ret + .size FtlSysFlush, .-FtlSysFlush + .align 2 + .global FtlDeInit + .type FtlDeInit, %function +FtlDeInit: + adrp x0, .LANCHOR1+3448 + ldr w0, [x0, #:lo12:.LANCHOR1+3448] + cmp w0, 1 + bne .L2983 + stp x29, x30, [sp, -16]! + add x29, sp, 0 + bl FtlSysFlush + mov w0, 0 + ldp x29, x30, [sp], 16 + ret +.L2983: + mov w0, 0 + ret + .size FtlDeInit, .-FtlDeInit + .align 2 + .global ftl_deinit + .type ftl_deinit, %function +ftl_deinit: + stp x29, x30, [sp, -16]! + add x29, sp, 0 + bl ftl_flash_de_init + bl FtlDeInit + bl ftl_flash_de_init + ldp x29, x30, [sp], 16 + ret + .size ftl_deinit, .-ftl_deinit + .align 2 + .global ftl_cache_flush + .type ftl_cache_flush, %function +ftl_cache_flush: + stp x29, x30, [sp, -16]! + add x29, sp, 0 + bl FtlCacheWriteBack + ldp x29, x30, [sp], 16 + ret + .size ftl_cache_flush, .-ftl_cache_flush + .align 2 + .global ftl_discard + .type ftl_discard, %function +ftl_discard: + stp x29, x30, [sp, -64]! + add x29, sp, 0 + stp x21, x22, [sp, 32] + mov w21, w0 + stp x19, x20, [sp, 16] + adrp x20, .LANCHOR2 + add x22, x20, :lo12:.LANCHOR2 + ldr w0, [x22, 1224] + cmp w0, w21 + bls .L3000 + mov w19, w1 + cmp w0, w1 + bcc .L3000 + add w1, w21, w1 + cmp w0, w1 + bcc .L3000 + cmp w19, 31 + bhi .L2992 +.L3008: + mov w0, 0 +.L2990: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x29, x30, [sp], 64 + ret +.L2992: + ldr w0, [x22, 2928] + cbnz w0, .L3008 + bl FtlCacheWriteBack + ldrh w0, [x22, 2350] + udiv w22, w21, w0 + msub w21, w0, w22, w21 + ands w21, w21, 65535 + beq .L2994 + sub w21, w0, w21 + add w22, w22, 1 + cmp w21, w19 + csel w21, w21, w19, ls + sub w19, w19, w21, uxth +.L2994: + adrp x21, .LANCHOR4 + add x20, x20, :lo12:.LANCHOR2 + add x21, x21, :lo12:.LANCHOR4 + mov w0, -1 + str w0, [x29, 60] +.L2995: + ldrh w0, [x20, 2350] + cmp w19, w0 + bcs .L2997 + adrp x0, .LANCHOR4 + add x0, x0, :lo12:.LANCHOR4 + ldr w1, [x0, 1912] + cmp w1, 32 + bls .L3008 + str wzr, [x0, 1912] + bl l2p_flush + bl FtlVpcTblFlush + b .L3008 +.L2997: + mov w2, 0 + add x1, x29, 56 + mov w0, w22 + bl log2phys + ldr w0, [x29, 56] + cmn w0, #1 + beq .L2996 + ldr w0, [x21, 1912] + mov w2, 1 + add x1, x29, 60 + add w0, w0, 1 + str w0, [x21, 1912] + ldr w0, [x20, 2412] + add w0, w0, 1 + str w0, [x20, 2412] + mov w0, w22 + bl log2phys + ldr w0, [x29, 56] + lsr w0, w0, 10 + bl P2V_block_in_plane + bl decrement_vpc_count +.L2996: + ldrh w0, [x20, 2350] + add w22, w22, 1 + sub w19, w19, w0 + b .L2995 +.L3000: + mov w0, -1 + b .L2990 + .size ftl_discard, .-ftl_discard + .align 2 + .global FtlGcFreeTempBlock + .type FtlGcFreeTempBlock, %function +FtlGcFreeTempBlock: + stp x29, x30, [sp, -112]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x19, .LANCHOR2 + add x2, x19, :lo12:.LANCHOR2 + stp x21, x22, [sp, 32] + stp x23, x24, [sp, 48] + stp x25, x26, [sp, 64] + str x27, [sp, 80] + ldrh w1, [x2, 2344] + ldr w2, [x2, 2928] + cbz w2, .L3010 +.L3047: + mov w0, 0 +.L3009: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldr x27, [sp, 80] + ldp x29, x30, [sp], 112 + ret +.L3010: + adrp x20, .LANCHOR4 + add x2, x20, :lo12:.LANCHOR4 + mov w3, 65535 + ldrh w21, [x2, 880] + cmp w21, w3 + bne .L3012 +.L3021: + add x21, x20, :lo12:.LANCHOR4 + mov w0, 65535 + add x22, x21, 880 + ldrh w1, [x21, 880] + str wzr, [x21, 1704] + cmp w1, w0 + beq .L3047 + bl FtlCacheWriteBack + mov w23, 0 + add x0, x19, :lo12:.LANCHOR2 + ldrb w1, [x22, 7] + ldrh w3, [x21, 880] + mov x22, x0 + mov w26, 12 + ldrh w4, [x0, 2344] + ldr x2, [x0, 2712] + mul w1, w1, w4 + strh w1, [x2, x3, lsl 1] + ldr w2, [x0, 2404] + ldrh w1, [x21, 1714] + add w1, w1, w2 + str w1, [x0, 2404] +.L3022: + ldrh w0, [x21, 1714] + cmp w0, w23 + bhi .L3026 + mov w0, -1 + bl decrement_vpc_count + add x0, x19, :lo12:.LANCHOR2 + ldrb w0, [x0, 1220] + cbz w0, .L3027 + ldrh w1, [x21, 880] + adrp x0, .LC160 + add x0, x0, :lo12:.LC160 + bl printk +.L3027: + add x0, x20, :lo12:.LANCHOR4 + add x1, x19, :lo12:.LANCHOR2 + ldrh w0, [x0, 880] + ldr x1, [x1, 2712] + ubfiz x2, x0, 1, 16 + ldrh w1, [x1, x2] + cbz w1, .L3028 + bl INSERT_DATA_LIST +.L3029: + add x21, x20, :lo12:.LANCHOR4 + mov w22, -1 + strh wzr, [x21, 1714] + strh w22, [x21, 880] + strh wzr, [x21, 1712] + bl l2p_flush + bl FtlVpcTblFlush + strh w22, [x21, 1104] + add x1, x19, :lo12:.LANCHOR2 + ldr w0, [x1, 2096] + cbz w0, .L3030 + ldr w0, [x1, 2444] + cmp w0, 39 + bhi .L3030 + ldrh w0, [x21, 1096] + ldrh w2, [x21, 776] + cmp w2, w0 + bcs .L3047 + ubfiz w0, w0, 1, 15 + strh w0, [x1, 2480] + b .L3047 +.L3012: + cbz w0, .L3015 + adrp x0, .LANCHOR1 + add x0, x0, :lo12:.LANCHOR1 + ldrh w4, [x0, 3452] + cmp w4, w3 + beq .L3016 +.L3017: + mov w1, 2 +.L3015: + add x0, x20, :lo12:.LANCHOR4 + add x0, x0, 880 + bl FtlGcScanTempBlk + str w0, [x29, 108] + cmn w0, #1 + beq .L3018 + add x19, x19, :lo12:.LANCHOR2 + ubfiz x21, x21, 1, 16 + ldr x1, [x19, 2696] + ldrh w0, [x1, x21] + cmp w0, 4 + bls .L3019 + sub w0, w0, #5 + strh w0, [x1, x21] + mov w0, 1 + bl FtlEctTblFlush +.L3019: + add x0, x20, :lo12:.LANCHOR4 + ldr w1, [x0, 1704] + cbnz w1, .L3020 + ldr w1, [x0, 1248] + add w1, w1, 1 + str w1, [x0, 1248] + ldr w0, [x29, 108] + lsr w0, w0, 10 + bl FtlBbmMapBadBlock + bl FtlBbmTblFlush +.L3020: + add x20, x20, :lo12:.LANCHOR4 + str wzr, [x20, 1704] +.L3032: + mov w0, 1 + b .L3009 +.L3016: + strh wzr, [x0, 3452] + ldrh w0, [x2, 776] + cmp w0, 17 + bhi .L3017 + b .L3015 +.L3018: + adrp x0, .LANCHOR1+3452 + ldrh w1, [x0, #:lo12:.LANCHOR1+3452] + mov w0, 65535 + cmp w1, w0 + bne .L3032 + b .L3021 +.L3026: + umull x25, w23, w26 + ldr x27, [x22, 2512] + ldr w1, [x22, 2924] + add x24, x27, x25 + ldr w0, [x24, 8] + cmp w0, w1 + bcc .L3023 +.L3044: + ldrh w0, [x21, 880] + b .L3045 +.L3023: + add x1, x29, 108 + mov w2, 0 + bl log2phys + ldr w0, [x27, x25] + ldr w1, [x29, 108] + cmp w0, w1 + bne .L3025 + lsr w0, w0, 10 + bl P2V_block_in_plane + mov w25, w0 + ldr w0, [x24, 8] + mov w2, 1 + add x1, x24, 4 + bl log2phys + mov w0, w25 +.L3045: + bl decrement_vpc_count + b .L3024 +.L3025: + ldr w0, [x24, 4] + cmp w1, w0 + bne .L3044 +.L3024: + add w23, w23, 1 + and w23, w23, 65535 + b .L3022 +.L3028: + bl INSERT_FREE_LIST + b .L3029 +.L3030: + add x20, x20, :lo12:.LANCHOR4 + ldrh w0, [x20, 1096] + ldrh w1, [x20, 776] + add w2, w0, w0, lsl 1 + cmp w1, w2, lsr 2 + ble .L3047 + add x19, x19, :lo12:.LANCHOR2 + ldrb w1, [x19, 1220] + cbz w1, .L3031 + sub w0, w0, #2 +.L3046: + strh w0, [x19, 2480] + b .L3047 +.L3031: + mov w0, 20 + b .L3046 + .size FtlGcFreeTempBlock, .-FtlGcFreeTempBlock + .align 2 + .global FtlGcPageRecovery + .type FtlGcPageRecovery, %function +FtlGcPageRecovery: + stp x29, x30, [sp, -48]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x20, .LANCHOR2 + add x20, x20, :lo12:.LANCHOR2 + adrp x19, .LANCHOR4 + add x19, x19, :lo12:.LANCHOR4 + str x21, [sp, 32] + add x21, x19, 880 + ldrh w1, [x20, 2344] + mov x0, x21 + bl FtlGcScanTempBlk + ldrh w1, [x19, 882] + ldrh w0, [x20, 2344] + cmp w1, w0 + bcc .L3048 + add x0, x19, 928 + bl FtlMapBlkWriteDumpData + mov w0, 0 + bl FtlGcFreeTempBlock + str wzr, [x19, 1704] +.L3048: + ldp x19, x20, [sp, 16] + ldr x21, [sp, 32] + ldp x29, x30, [sp], 48 + ret + .size FtlGcPageRecovery, .-FtlGcPageRecovery + .align 2 + .global FtlPowerLostRecovery + .type FtlPowerLostRecovery, %function +FtlPowerLostRecovery: + stp x29, x30, [sp, -32]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x19, .LANCHOR4 + add x19, x19, :lo12:.LANCHOR4 + add x20, x19, 784 + add x19, x19, 832 + mov x0, x20 + str wzr, [x19, 928] + bl FtlRecoverySuperblock + mov x0, x20 + bl FtlSlcSuperblockCheck + mov x0, x19 + bl FtlRecoverySuperblock + mov x0, x19 + bl FtlSlcSuperblockCheck + bl FtlGcPageRecovery + mov w0, -1 + bl decrement_vpc_count + mov w0, 0 + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 32 + ret + .size FtlPowerLostRecovery, .-FtlPowerLostRecovery + .align 2 + .global FtlSysBlkInit + .type FtlSysBlkInit, %function +FtlSysBlkInit: + stp x29, x30, [sp, -64]! + mov w0, -1 + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x19, .LANCHOR4 + stp x21, x22, [sp, 32] + adrp x20, .LANCHOR2 + add x21, x19, :lo12:.LANCHOR4 + add x22, x20, :lo12:.LANCHOR2 + str x23, [sp, 48] + strh w0, [x21, 1754] + ldrh w0, [x22, 2280] + strh wzr, [x21, 1756] + bl FtlFreeSysBlkQueueInit + bl FtlScanSysBlk + ldrh w1, [x21, 1072] + mov w0, 65535 + cmp w1, w0 + bne .L3054 +.L3056: + mov w21, -1 +.L3053: + mov w0, w21 + ldr x23, [sp, 48] + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x29, x30, [sp], 64 + ret +.L3054: + bl FtlLoadSysInfo + mov w21, w0 + cbnz w0, .L3056 + bl FtlLoadMapInfo + bl FtlLoadVonderInfo + bl Ftl_load_ext_data + bl FtlLoadEctTbl + bl FtlFreeSysBLkSort + bl SupperBlkListInit + bl FtlPowerLostRecovery + mov w0, 1 + bl FtlUpdateVaildLpn + ldr x1, [x22, 2792] + mov w0, 0 + ldrh w3, [x22, 2382] + add x1, x1, 4 +.L3057: + cmp w0, w3 + bge .L3062 + ldr w2, [x1], 16 + tbz w2, #31, .L3058 +.L3062: + add x2, x19, :lo12:.LANCHOR4 + cmp w0, w3 + ldrh w1, [x2, 724] + add w1, w1, 1 + strh w1, [x2, 724] + bge .L3069 +.L3059: + add x0, x19, :lo12:.LANCHOR4 + add x1, x20, :lo12:.LANCHOR2 + ldrh w3, [x0, 784] + ldr x5, [x1, 2712] + ldrh w6, [x0, 788] + lsl x3, x3, 1 + ldrh w4, [x5, x3] + sub w4, w4, w6 + strh w4, [x5, x3] + strb wzr, [x0, 790] + ldrh w3, [x1, 2344] + strh w3, [x0, 786] + ldrh w3, [x0, 832] + ldr x5, [x1, 2712] + strh wzr, [x0, 788] + lsl x3, x3, 1 + ldrh w6, [x0, 836] + ldrh w4, [x5, x3] + sub w4, w4, w6 + strh w4, [x5, x3] + strb wzr, [x0, 838] + ldrh w1, [x1, 2344] + strh w1, [x0, 834] + ldrh w1, [x0, 726] + strh wzr, [x0, 836] + add w1, w1, 1 + strh w1, [x0, 726] + bl l2p_flush + bl FtlVpcTblFlush + bl FtlVpcTblFlush + b .L3063 +.L3058: + add w0, w0, 1 + b .L3057 +.L3069: + ldrh w0, [x2, 1756] + cbnz w0, .L3059 +.L3063: + add x20, x19, :lo12:.LANCHOR4 + mov w1, 65535 + add x23, x20, 784 + ldrh w0, [x20, 784] + cmp w0, w1 + beq .L3064 + ldrh w1, [x20, 788] + cbnz w1, .L3064 + ldrh w1, [x20, 836] + add x22, x20, 832 + cbnz w1, .L3064 + bl FtlGcRefreshOpenBlock + ldrh w0, [x20, 832] + bl FtlGcRefreshOpenBlock + bl FtlVpcTblFlush + mov x0, x23 + bl allocate_new_data_superblock + mov x0, x22 + bl allocate_new_data_superblock +.L3064: + adrp x0, .LANCHOR0+88 + ldrb w0, [x0, #:lo12:.LANCHOR0+88] + cbnz w0, .L3065 + add x19, x19, :lo12:.LANCHOR4 + ldrh w0, [x19, 724] + tst x0, 31 + bne .L3053 +.L3065: + bl FtlVpcCheckAndModify + b .L3053 + .size FtlSysBlkInit, .-FtlSysBlkInit + .align 2 + .global FtlLowFormat + .type FtlLowFormat, %function +FtlLowFormat: + stp x29, x30, [sp, -64]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x19, .LANCHOR2 + add x20, x19, :lo12:.LANCHOR2 + stp x21, x22, [sp, 32] + stp x23, x24, [sp, 48] + ldr w0, [x20, 2928] + cbnz w0, .L3073 + ldr x0, [x20, 2776] + mov w1, 0 + ldrh w2, [x20, 2380] + lsl w2, w2, 2 + bl ftl_memset + ldr x0, [x20, 2768] + mov w1, 0 + ldrh w2, [x20, 2380] + lsl w2, w2, 2 + bl ftl_memset + ldrh w0, [x20, 2280] + str wzr, [x20, 2396] + str wzr, [x20, 2400] + bl FtlFreeSysBlkQueueInit + bl FtlLoadBbt + cbz w0, .L3074 + bl FtlMakeBbt +.L3074: + mov w4, 23752 + add x1, x19, :lo12:.LANCHOR2 + mov w0, 0 + movk w4, 0xa0f, lsl 16 +.L3075: + ldrh w2, [x1, 2350] + cmp w0, w2, lsl 7 + blt .L3076 + ldrh w21, [x1, 2284] + add x22, x19, :lo12:.LANCHOR2 + mov w20, 0 +.L3077: + ldrh w0, [x22, 2286] + cmp w0, w21 + bhi .L3078 + ldrh w0, [x22, 2276] + sub w1, w20, #3 + cmp w1, w0, lsl 1 + blt .L3079 + udiv w0, w20, w0 + ldr w20, [x22, 2376] + add w0, w0, w20 + bl FtlSysBlkNumInit + ldrh w0, [x22, 2280] + mov w20, 0 + bl FtlFreeSysBlkQueueInit + ldrh w21, [x22, 2284] + add x22, x19, :lo12:.LANCHOR2 +.L3080: + ldrh w0, [x22, 2286] + cmp w0, w21 + bhi .L3081 +.L3079: + add x23, x19, :lo12:.LANCHOR2 + mov w22, 0 + mov w21, 0 +.L3082: + ldrh w0, [x23, 2284] + cmp w0, w21 + bhi .L3083 + ldrh w0, [x23, 2286] + adrp x21, .LANCHOR4 + ldr w2, [x23, 2288] + add x5, x21, :lo12:.LANCHOR4 + str w0, [x23, 2468] + ldrh w0, [x23, 2276] + udiv w4, w2, w0 + ubfx x3, x4, 5, 16 + str w4, [x23, 2924] + add w1, w3, 36 + strh w1, [x5, 1096] + mov w1, 24 + mul w1, w0, w1 + cmp w22, w1 + ble .L3084 + sub w2, w2, w22 + udiv w2, w2, w0 + str w2, [x23, 2924] + lsr w2, w2, 5 + add w2, w2, 24 + strh w2, [x5, 1096] +.L3084: + add x1, x19, :lo12:.LANCHOR2 + ldr w1, [x1, 2096] + cmp w1, 1 + bne .L3085 + udiv w2, w22, w0 + add x1, x21, :lo12:.LANCHOR4 + ldrh w5, [x1, 1096] + add w2, w2, w5 + add w2, w5, w2, asr 2 + strh w2, [x1, 1096] +.L3085: + add x1, x19, :lo12:.LANCHOR2 + ldrb w1, [x1, 1220] + cbz w1, .L3086 + udiv w2, w22, w0 + add x1, x21, :lo12:.LANCHOR4 + ldrh w5, [x1, 1096] + add w2, w2, w5 + add w2, w5, w2, asr 2 + strh w2, [x1, 1096] +.L3086: + add x6, x19, :lo12:.LANCHOR2 + ldrh w1, [x6, 2338] + cbz w1, .L3088 + add x2, x21, :lo12:.LANCHOR4 + ldrh w5, [x2, 1096] + add w5, w5, w1, lsr 1 + strh w5, [x2, 1096] + mul w5, w1, w0 + cmp w22, w5 + bge .L3088 + add w1, w1, 32 + str w4, [x6, 2924] + add w1, w3, w1 + strh w1, [x2, 1096] +.L3088: + add x23, x19, :lo12:.LANCHOR2 + add x2, x21, :lo12:.LANCHOR4 + ldr w1, [x23, 2924] + ldrh w3, [x2, 1096] + sub w1, w1, w3 + mul w0, w1, w0 + ldrh w1, [x23, 2344] + str w0, [x2, 1092] + mul w0, w1, w0 + ldrh w1, [x23, 2350] + str w0, [x23, 2924] + mul w0, w1, w0 + str w0, [x23, 1224] + bl FtlBbmTblFlush + ldrh w0, [x23, 2358] + add w1, w20, w22 + ldr w2, [x23, 2292] + add w0, w0, w2, lsr 3 + cmp w1, w0 + bls .L3090 + adrp x0, .LC161 + lsr w2, w2, 5 + add x0, x0, :lo12:.LC161 + bl printk +.L3090: + add x23, x19, :lo12:.LANCHOR2 + add x22, x21, :lo12:.LANCHOR4 + add x20, x22, 784 + mov w1, 0 + mov w24, -1 + ldr x0, [x23, 2712] + ldrh w2, [x23, 2286] + lsl w2, w2, 1 + bl ftl_memset + mov w0, 1 + strb w0, [x20, 8] + adrp x0, .LANCHOR0+80 + ldrh w2, [x23, 2284] + strh w24, [x22, 1104] + mov w1, 255 + ldr x0, [x0, #:lo12:.LANCHOR0+80] + strh wzr, [x22, 1106] + lsr w2, w2, 3 + strb wzr, [x22, 1110] + strb wzr, [x22, 1112] + strh wzr, [x20, 2] + strb wzr, [x20, 6] + strh wzr, [x22, 784] + str wzr, [x22, 1068] + bl ftl_memset +.L3091: + mov x0, x20 + bl make_superblock + ldrb w1, [x20, 7] + ldrh w0, [x20] + cbnz w1, .L3092 + ldr x1, [x23, 2712] + ubfiz x0, x0, 1, 16 + strh w24, [x1, x0] + ldrh w0, [x20] + add w0, w0, 1 + strh w0, [x20] + b .L3091 +.L3076: + ldr x5, [x1, 2616] + ubfiz x3, x0, 2, 16 + mvn w2, w0 + orr w2, w0, w2, lsl 16 + add w0, w0, 1 + and w0, w0, 65535 + str w2, [x5, x3] + ldr x2, [x1, 2624] + str w4, [x2, x3] + b .L3075 +.L3078: + mov w0, w21 + mov w1, 1 + add w21, w21, 1 + bl FtlLowFormatEraseBlock + add w20, w20, w0 + and w21, w21, 65535 + and w20, w20, 65535 + b .L3077 +.L3081: + mov w0, w21 + mov w1, 1 + add w21, w21, 1 + bl FtlLowFormatEraseBlock + add w20, w20, w0 + and w21, w21, 65535 + and w20, w20, 65535 + b .L3080 +.L3083: + mov w0, w21 + mov w1, 0 + add w21, w21, 1 + bl FtlLowFormatEraseBlock + add w22, w22, w0 + and w21, w21, 65535 + and w22, w22, 65535 + b .L3082 +.L3092: + add x1, x19, :lo12:.LANCHOR2 + ubfiz x0, x0, 1, 16 + ldrh w3, [x20, 4] + mov x13, x1 + mov w14, -1 + ldr w2, [x1, 2396] + str w2, [x20, 12] + add w2, w2, 1 + str w2, [x1, 2396] + ldr x2, [x1, 2712] + strh w3, [x2, x0] + add x0, x22, 832 + mov x12, x0 + strh wzr, [x22, 834] + ldrh w2, [x20] + add x20, x21, :lo12:.LANCHOR4 + strb wzr, [x22, 838] + add w2, w2, 1 + strh w2, [x22, 832] + mov w2, 1 + strb w2, [x22, 840] +.L3093: + mov x0, x12 + bl make_superblock + ldrb w1, [x12, 7] + ldrh w0, [x12] + cbnz w1, .L3094 + ldr x1, [x13, 2712] + ubfiz x0, x0, 1, 16 + strh w14, [x1, x0] + ldrh w0, [x12] + add w0, w0, 1 + strh w0, [x12] + b .L3093 +.L3094: + add x19, x19, :lo12:.LANCHOR2 + ubfiz x0, x0, 1, 16 + ldrh w2, [x12, 4] + mov w21, -1 + ldr w1, [x19, 2396] + str w1, [x12, 12] + add w1, w1, 1 + str w1, [x19, 2396] + ldr x1, [x19, 2712] + strh w2, [x1, x0] + strh w21, [x20, 880] + bl FtlFreeSysBlkQueueOut + strh w0, [x20, 1072] + ldr w0, [x20, 1092] + strh w0, [x20, 1078] + ldr w0, [x19, 2396] + str w0, [x20, 1080] + add w0, w0, 1 + strh wzr, [x20, 1074] + strh w21, [x20, 1076] + str w0, [x19, 2396] + bl FtlVpcTblFlush + bl FtlSysBlkInit + cbnz w0, .L3073 + adrp x0, .LANCHOR1+3448 + mov w1, 1 + str w1, [x0, #:lo12:.LANCHOR1+3448] +.L3073: + mov w0, 0 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x29, x30, [sp], 64 + ret + .size FtlLowFormat, .-FtlLowFormat + .align 2 + .global FtlReInitForSDUpdata + .type FtlReInitForSDUpdata, %function +FtlReInitForSDUpdata: + stp x29, x30, [sp, -48]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x19, .LANCHOR2 + add x0, x19, :lo12:.LANCHOR2 + ldrb w0, [x0, 1220] + cbz w0, .L3104 +.L3106: + mov w20, 0 +.L3103: + mov w0, w20 + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 48 + ret +.L3104: + adrp x0, RK29_NANDC_REG_BASE + ldr x0, [x0, #:lo12:RK29_NANDC_REG_BASE] + bl FlashInit + mov w20, w0 + cbnz w0, .L3106 + bl FlashLoadFactorBbt + cbz w0, .L3107 + bl FlashMakeFactorBbt +.L3107: + add x0, x19, :lo12:.LANCHOR2 + ldr x0, [x0, 2216] + bl FlashReadIdbDataRaw + cbz w0, .L3108 + mov w2, 16 + mov w1, 0 + add x0, x29, 32 + bl FlashReadFacBbtData + ldr w2, [x29, 32] + mov w0, 0 + mov w1, 0 + mov w4, 1 +.L3110: + lsl w3, w4, w1 + add w1, w1, 1 + tst w3, w2 + cinc w0, w0, ne + cmp w1, 16 + bne .L3110 + cmp w0, 6 + bhi .L3111 + adrp x0, .LANCHOR0+89 + strb w1, [x0, #:lo12:.LANCHOR0+89] +.L3112: + add x0, x19, :lo12:.LANCHOR2 + adrp x1, .LANCHOR0+89 + ldrb w1, [x1, #:lo12:.LANCHOR0+89] + strh w1, [x0, 1218] +.L3108: + adrp x1, .LC144 + add x1, x1, :lo12:.LC144 + add x19, x19, :lo12:.LANCHOR2 + adrp x0, .LC48 + add x0, x0, :lo12:.LC48 + bl printk + add x0, x19, 1192 + bl FtlConstantsInit + bl FtlVariablesInit + ldrh w0, [x19, 2280] + mov w19, 1 + bl FtlFreeSysBlkQueueInit +.L3116: + bl FtlLoadBbt + cbz w0, .L3117 +.L3136: + bl FtlLowFormat + cmp w19, 3 + bls .L3118 + mov w20, -1 + b .L3103 +.L3111: + mov w1, 0 + mov w4, 1 +.L3114: + lsl w3, w4, w1 + add w1, w1, 1 + tst w3, w2 + cinc w0, w0, ne + cmp w1, 24 + bne .L3114 + cmp w0, 17 + adrp x0, .LANCHOR0 + add x0, x0, :lo12:.LANCHOR0 + bhi .L3115 +.L3134: + strb w1, [x0, 89] + b .L3112 +.L3115: + mov w1, 36 + b .L3134 +.L3118: + add w19, w19, 1 + b .L3116 +.L3117: + bl FtlSysBlkInit + cbnz w0, .L3136 + adrp x0, .LANCHOR1+3448 + mov w1, 1 + str w1, [x0, #:lo12:.LANCHOR1+3448] + b .L3103 + .size FtlReInitForSDUpdata, .-FtlReInitForSDUpdata + .align 2 + .global Ftl_gc_temp_data_write_back + .type Ftl_gc_temp_data_write_back, %function +Ftl_gc_temp_data_write_back: + stp x29, x30, [sp, -48]! + add x29, sp, 0 + str x21, [sp, 32] + adrp x21, .LANCHOR2 + add x0, x21, :lo12:.LANCHOR2 + stp x19, x20, [sp, 16] + ldr w1, [x0, 2928] + cbz w1, .L3138 +.L3141: + mov w0, 0 +.L3137: + ldp x19, x20, [sp, 16] + ldr x21, [sp, 32] + ldp x29, x30, [sp], 48 + ret +.L3138: + ldrb w0, [x0, 1220] + adrp x12, .LANCHOR4 + cbz w0, .L3140 + add x0, x12, :lo12:.LANCHOR4 + ldr w1, [x0, 1680] + tbz x1, 0, .L3140 + ldrh w0, [x0, 884] + cbnz w0, .L3141 +.L3140: + add x11, x21, :lo12:.LANCHOR2 + add x19, x12, :lo12:.LANCHOR4 + mov w3, 0 + mov w2, 0 + mov x20, x11 + ldr w1, [x19, 1680] + ldr x0, [x11, 2528] + bl FlashProgPages + mov w13, 0 + mov w14, 56 +.L3142: + ldr w1, [x19, 1680] + cmp w13, w1 + bcc .L3144 + add x21, x21, :lo12:.LANCHOR2 + ldr x0, [x21, 2528] + bl FtlGcBufFree + str wzr, [x19, 1680] + ldrh w0, [x19, 884] + cbnz w0, .L3141 + mov w0, 1 + bl FtlGcFreeTempBlock + b .L3152 +.L3144: + umull x1, w13, w14 + ldr x2, [x20, 2528] + add x3, x2, x1 + ldr w2, [x2, x1] + ldr x0, [x3, 16] + cmn w2, #1 + bne .L3143 + ldrh w3, [x19, 880] + ldr x0, [x20, 2712] + strh wzr, [x0, x3, lsl 1] + strh w2, [x19, 880] + ldr w0, [x19, 1248] + add w0, w0, 1 + str w0, [x19, 1248] + ldr x0, [x20, 2528] + add x0, x0, x1 + ldr w0, [x0, 4] + lsr w0, w0, 10 + bl FtlBbmMapBadBlock + bl FtlBbmTblFlush + bl FtlGcPageVarInit +.L3152: + mov w0, 1 + b .L3137 +.L3143: + ldp w2, w0, [x0, 8] + ldr w1, [x3, 4] + bl FtlGcUpdatePage + add w13, w13, 1 + and w13, w13, 65535 + b .L3142 + .size Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back + .align 2 + .global Ftl_get_new_temp_ppa + .type Ftl_get_new_temp_ppa, %function +Ftl_get_new_temp_ppa: + stp x29, x30, [sp, -32]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x19, .LANCHOR4 + add x0, x19, :lo12:.LANCHOR4 + add x1, x0, 880 + ldrh w2, [x0, 880] + mov w0, 65535 + cmp w2, w0 + beq .L3154 + ldrh w0, [x1, 4] + cbnz w0, .L3155 +.L3154: + bl FtlCacheWriteBack + add x20, x19, :lo12:.LANCHOR4 + mov w0, 0 + bl FtlGcFreeTempBlock + add x0, x20, 880 + strb wzr, [x0, 8] + bl allocate_data_superblock + strh wzr, [x20, 1712] + strh wzr, [x20, 1714] + bl l2p_flush + mov w0, 0 + bl FtlEctTblFlush + bl FtlVpcTblFlush +.L3155: + add x0, x19, :lo12:.LANCHOR4 + add x0, x0, 880 + bl get_new_active_ppa + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 32 + ret + .size Ftl_get_new_temp_ppa, .-Ftl_get_new_temp_ppa + .align 2 + .global ftl_read + .type ftl_read, %function +ftl_read: + sub sp, sp, #208 + adrp x4, .LANCHOR1+3448 + stp x29, x30, [sp, 16] + add x29, sp, 16 + stp x21, x22, [sp, 48] + stp x19, x20, [sp, 32] + ldr w21, [x4, #:lo12:.LANCHOR1+3448] + stp x23, x24, [sp, 64] + stp x25, x26, [sp, 80] + cmp w21, 1 + stp x27, x28, [sp, 96] + bne .L3182 + mov x23, x3 + mov w24, w2 + mov w19, w1 + cmp w0, 16 + bne .L3159 + mov x2, x3 + mov w1, w24 + add w0, w19, 256 + bl FtlVendorPartRead + mov w25, w0 +.L3157: + mov w0, w25 + ldp x19, x20, [sp, 32] + ldp x21, x22, [sp, 48] + ldp x23, x24, [sp, 64] + ldp x25, x26, [sp, 80] + ldp x27, x28, [sp, 96] + ldp x29, x30, [sp, 16] + add sp, sp, 208 + ret +.L3159: + adrp x20, .LANCHOR2 + add x0, x20, :lo12:.LANCHOR2 + ldr w1, [x0, 1224] + cmp w19, w1 + bcs .L3182 + cmp w2, w1 + bhi .L3182 + add w2, w19, w2 + str w2, [x29, 156] + cmp w1, w2 + bcc .L3182 + ldrh w1, [x0, 2350] + sub w26, w2, #1 + adrp x7, .LANCHOR4 + add x2, x7, :lo12:.LANCHOR4 + udiv w27, w19, w1 + udiv w26, w26, w1 + sub w21, w21, w27 + add w1, w21, w26 + str w1, [x29, 172] + ldr w1, [x2, 1668] + add w1, w1, w24 + str w1, [x2, 1668] + ldr w2, [x29, 172] + ldr w1, [x0, 2424] + add w1, w1, w2 + str w1, [x0, 2424] + mov w1, w26 + mov w0, w27 + bl FtlCacheMetchLpa + str x7, [x29, 112] + cbz w0, .L3160 + bl FtlCacheWriteBack +.L3160: + mov w22, w27 + adrp x0, .LC57 + mov w28, 0 + add x0, x0, :lo12:.LC57 + mov w25, 0 + str x0, [x29, 104] + stp wzr, wzr, [x29, 164] +.L3161: + ldr w0, [x29, 172] + cbnz w0, .L3178 + add x20, x20, :lo12:.LANCHOR2 + ldrh w0, [x20, 2486] + cbz w0, .L3157 + mov w1, 1 + mov w0, 0 + bl ftl_do_gc + b .L3157 +.L3178: + mov w2, 0 + add x1, x29, 188 + mov w0, w22 + bl log2phys + ldr w4, [x29, 188] + cmn w4, #1 + bne .L3162 + add x5, x20, :lo12:.LANCHOR2 + mov w21, 0 +.L3163: + ldrh w0, [x5, 2350] + cmp w21, w0 + bcc .L3165 +.L3166: + ldr w0, [x29, 172] + add w22, w22, 1 + subs w0, w0, #1 + str w0, [x29, 172] + beq .L3170 + add x0, x20, :lo12:.LANCHOR2 + ldrh w0, [x0, 2276] + cmp w28, w0, lsl 3 + bne .L3161 +.L3170: + cbz w28, .L3161 + add x8, x20, :lo12:.LANCHOR2 + mov w1, w28 + mov w2, 0 + mov x21, x8 + ldr x0, [x8, 2520] + bl FlashReadPages + ldr w0, [x29, 164] + lsl w0, w0, 9 + str w0, [x29, 132] + ldr w0, [x29, 160] + lsl w0, w0, 9 + str x0, [x29, 136] + ldr w0, [x29, 168] + lsl w0, w0, 9 + str w0, [x29, 152] + mov w0, 56 + umull x0, w28, w0 + mov x28, 0 + str x0, [x29, 120] + ldr x0, [x29, 112] + add x0, x0, :lo12:.LANCHOR4 + str x0, [x29, 144] +.L3177: + ldr x0, [x21, 2520] + add x0, x0, x28 + ldr w1, [x0, 24] + cmp w27, w1 + bne .L3172 + ldr x1, [x0, 8] + ldr x0, [x21, 2616] + cmp x1, x0 + bne .L3173 + ldr x0, [x29, 136] + ldr w2, [x29, 152] + add x1, x1, x0 + mov x0, x23 +.L3197: + bl ftl_memcpy +.L3173: + ldr x1, [x21, 2520] + add x0, x1, x28 + ldr w2, [x1, x28] + cmn w2, #1 + bne .L3174 + ldr x1, [x29, 144] + mov w25, w2 + add x3, x1, 1152 + ldr w1, [x1, 1224] + add w1, w1, 1 + str w1, [x3, 72] +.L3174: + ldr x1, [x0, 16] + ldr w2, [x0, 24] + ldr w1, [x1, 8] + cmp w2, w1 + beq .L3175 + ldr x1, [x29, 144] + add x2, x1, 1152 + ldr w1, [x1, 1224] + add w1, w1, 1 + str w1, [x2, 72] + ldp x2, x1, [x0, 8] + ldr w3, [x2, 4] + str w3, [sp] + ldp w3, w4, [x1] + ldp w5, w6, [x1, 8] + ldr w7, [x2] + ldr w1, [x0, 24] + ldr w2, [x0, 4] + ldr x0, [x29, 104] + bl printk +.L3175: + ldr x0, [x21, 2520] + add x1, x0, x28 + ldr w0, [x0, x28] + cmp w0, 256 + bne .L3176 + ldr w0, [x1, 4] + lsr w0, w0, 10 + bl P2V_block_in_plane + bl FtlGcRefreshBlock +.L3176: + ldr x0, [x29, 120] + add x28, x28, 56 + cmp x0, x28 + bne .L3177 + mov w28, 0 + b .L3161 +.L3165: + madd w0, w22, w0, w21 + cmp w19, w0 + bhi .L3164 + ldr w1, [x29, 156] + cmp w1, w0 + bls .L3164 + sub w0, w0, w19 + str x5, [x29, 144] + lsl w0, w0, 9 + mov w2, 512 + mov w1, 0 + add x0, x23, x0 + bl ftl_memset + ldr x5, [x29, 144] +.L3164: + add w21, w21, 1 + b .L3163 +.L3162: + add x1, x20, :lo12:.LANCHOR2 + mov w0, 56 + cmp w22, w27 + umull x2, w28, w0 + ldr x0, [x1, 2520] + add x0, x0, x2 + str w4, [x0, 4] + ldrh w0, [x1, 2350] + bne .L3167 + ldr x4, [x1, 2520] + ldr x1, [x1, 2616] + add x4, x4, x2 + str x1, [x4, 8] + udiv w1, w19, w0 + msub w1, w1, w0, w19 + str w1, [x29, 160] + sub w1, w0, w1 + cmp w24, w1 + csel w1, w24, w1, ls + str w1, [x29, 168] + cmp w1, w0 + bne .L3168 + str x23, [x4, 8] +.L3168: + add x1, x20, :lo12:.LANCHOR2 + ldr x0, [x1, 2520] + add x2, x0, x2 + ldrh w0, [x1, 2356] + ldr x1, [x1, 2648] + str w22, [x2, 24] + mul w0, w0, w28 + add w28, w28, 1 + and x0, x0, 4294967292 + add x0, x1, x0 + str x0, [x2, 16] + b .L3166 +.L3167: + cmp w22, w26 + bne .L3169 + ldr x4, [x1, 2520] + ldr x1, [x1, 2624] + add x4, x4, x2 + ldr w3, [x29, 156] + str x1, [x4, 8] + mul w1, w22, w0 + sub w3, w3, w1 + str w3, [x29, 164] + cmp w0, w3 + bne .L3168 + sub w1, w1, w19 + lsl w1, w1, 9 + add x1, x23, x1 + str x1, [x4, 8] + b .L3168 +.L3169: + ldr x1, [x1, 2520] + mul w0, w0, w22 + add x1, x1, x2 + sub w0, w0, w19 + lsl w0, w0, 9 + add x0, x23, x0 + str x0, [x1, 8] + b .L3168 +.L3172: + cmp w26, w1 + bne .L3173 + ldr x1, [x0, 8] + ldr x0, [x21, 2624] + cmp x1, x0 + bne .L3173 + ldrh w0, [x21, 2350] + ldr w2, [x29, 132] + mul w0, w0, w26 + sub w0, w0, w19 + lsl w0, w0, 9 + add x0, x23, x0 + b .L3197 +.L3182: + mov w25, -1 + b .L3157 + .size ftl_read, .-ftl_read + .align 2 + .global ftl_vendor_read + .type ftl_vendor_read, %function +ftl_vendor_read: + stp x29, x30, [sp, -16]! + mov x3, x2 + mov w2, w1 + mov w1, w0 + add x29, sp, 0 + mov w0, 16 + bl ftl_read + ldp x29, x30, [sp], 16 + ret + .size ftl_vendor_read, .-ftl_vendor_read + .align 2 + .global ftl_sys_read + .type ftl_sys_read, %function +ftl_sys_read: + stp x29, x30, [sp, -16]! + mov x3, x2 + mov w2, w1 + add w1, w0, 256 + add x29, sp, 0 + mov w0, 16 + bl ftl_read + ldp x29, x30, [sp], 16 + ret + .size ftl_sys_read, .-ftl_sys_read + .align 2 + .global FtlInit + .type FtlInit, %function +FtlInit: + stp x29, x30, [sp, -64]! + adrp x1, .LC144 + add x1, x1, :lo12:.LC144 + mov w0, -1 + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x20, .LANCHOR4 + stp x21, x22, [sp, 32] + add x20, x20, :lo12:.LANCHOR4 + adrp x21, .LANCHOR1 + adrp x19, .LANCHOR2 + add x21, x21, :lo12:.LANCHOR1 + add x19, x19, :lo12:.LANCHOR2 + str x23, [sp, 48] + str wzr, [x20, 1916] + str w0, [x21, 3448] + adrp x0, .LC48 + str wzr, [x19, 2928] + add x0, x0, :lo12:.LC48 + bl printk + add x0, x19, 1192 + bl FtlConstantsInit + bl FtlMemInit + bl FtlVariablesInit + ldrh w0, [x19, 2280] + bl FtlFreeSysBlkQueueInit + bl FtlLoadBbt + cbz w0, .L3203 + adrp x1, .LANCHOR3 + add x1, x1, :lo12:.LANCHOR3 + adrp x0, .LC162 + add x1, x1, 256 + add x0, x0, :lo12:.LC162 +.L3218: + bl printk +.L3204: + mov w0, 0 + ldr x23, [sp, 48] + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x29, x30, [sp], 64 + ret +.L3203: + bl FtlSysBlkInit + cbz w0, .L3205 + adrp x1, .LANCHOR3 + add x1, x1, :lo12:.LANCHOR3 + adrp x0, .LC163 + add x1, x1, 256 + add x0, x0, :lo12:.LC163 + b .L3218 +.L3205: + mov w1, 1 + str w1, [x21, 3448] + bl ftl_do_gc + ldrh w0, [x20, 776] + cmp w0, 15 + bhi .L3206 + add w22, w0, 2 + mov w21, 0 + mov w23, 65535 +.L3209: + ldrh w0, [x20, 1104] + cmp w0, w23 + bne .L3207 + ldrh w0, [x19, 2472] + cmp w0, w23 + bne .L3207 + and w0, w21, 63 + bl List_get_gc_head_node + bl FtlGcRefreshBlock +.L3207: + mov w1, 1 + mov w0, w1 + bl ftl_do_gc + mov w1, 1 + mov w0, 0 + bl ftl_do_gc + ldrh w0, [x20, 776] + cmp w0, w22 + bhi .L3204 + add w21, w21, 1 + cmp w21, 4096 + bne .L3209 + b .L3204 +.L3206: + ldrb w0, [x19, 1220] + cbz w0, .L3204 + mov w19, 128 +.L3211: + mov w1, 1 + mov w0, w1 + bl ftl_do_gc + subs w19, w19, #1 + bne .L3211 + b .L3204 + .size FtlInit, .-FtlInit + .align 2 + .global ftl_write + .type ftl_write, %function +ftl_write: + stp x29, x30, [sp, -256]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x20, .LANCHOR2 + stp x25, x26, [sp, 64] + mov w25, w2 + add x2, x20, :lo12:.LANCHOR2 + stp x23, x24, [sp, 48] + stp x21, x22, [sp, 32] + mov w23, w1 + stp x27, x28, [sp, 80] + ldr w1, [x2, 2928] + cbnz w1, .L3261 + adrp x1, .LANCHOR1 + mov x24, x3 + add x3, x1, :lo12:.LANCHOR1 + str x1, [x29, 144] + ldr w3, [x3, 3448] + cmp w3, 1 + bne .L3261 + cmp w0, 16 + bne .L3221 + mov x2, x24 + mov w1, w25 + add w0, w23, 256 + bl FtlVendorPartWrite +.L3219: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 256 + ret +.L3221: + ldr w1, [x2, 1224] + cmp w23, w1 + bcs .L3264 + cmp w25, w1 + bhi .L3264 + add w0, w23, w25 + cmp w1, w0 + bcc .L3264 + adrp x3, .LANCHOR4 + add x21, x3, :lo12:.LANCHOR4 + mov w1, 2048 + sub w0, w0, #1 + ldr w4, [x2, 2496] + str w1, [x21, 1920] + ldrh w1, [x2, 2350] + str x3, [x29, 152] + cmp w25, w1, lsl 1 + udiv w0, w0, w1 + udiv w27, w23, w1 + str w0, [x29, 172] + sub w28, w0, w27 + ldr w0, [x2, 2408] + add w26, w28, 1 + add w0, w0, w26 + str w0, [x2, 2408] + ldr w0, [x21, 1664] + add w0, w0, w25 + str w0, [x21, 1664] + cset w0, cs + str w0, [x29, 188] + cbz w4, .L3223 + ldr x0, [x2, 2560] + sub w4, w4, #1 + mov w3, 56 + umaddl x4, w4, w3, x0 + ldr w0, [x4, 24] + cmp w27, w0 + bne .L3224 + ldr w0, [x2, 2416] + ldr x3, [x4, 8] + add w0, w0, 1 + str w0, [x2, 2416] + ldr w0, [x21, 1924] + add w0, w0, 1 + str w0, [x21, 1924] + msub w0, w27, w1, w23 + sub w1, w1, w0 + cmp w25, w1 + lsl w0, w0, 9 + csel w19, w25, w1, ls + add x0, x3, x0 + lsl w22, w19, 9 + mov x1, x24 + mov w2, w22 + bl ftl_memcpy + cbnz w28, .L3225 + ldr w0, [x21, 1924] + cmp w0, 2 + bgt .L3225 +.L3261: + mov w0, 0 + b .L3219 +.L3225: + sub w25, w25, w19 + add w23, w23, w19 + add x24, x24, x22 + add w27, w27, 1 + mov w26, w28 +.L3224: + ldr x0, [x29, 152] + add x0, x0, :lo12:.LANCHOR4 + str wzr, [x0, 1924] +.L3223: + ldr w1, [x29, 172] + mov w0, w27 + bl FtlCacheMetchLpa + cbz w0, .L3226 + bl FtlCacheWriteBack +.L3226: + ldr x0, [x29, 152] + mov w21, w27 + add x0, x0, :lo12:.LANCHOR4 + str x0, [x29, 176] + add x1, x0, 784 + str x1, [x29, 160] + mov x22, x1 + str x1, [x29, 120] + str x1, [x0, 1904] +.L3227: + cbnz w26, .L3255 + ldr w0, [x29, 172] + sub w1, w0, w27 + mov w0, 0 + bl ftl_do_gc + ldr x0, [x29, 152] + add x0, x0, :lo12:.LANCHOR4 + ldrh w0, [x0, 776] + cmp w0, 5 + bls .L3256 + cmp w0, 31 + bhi .L3261 + adrp x0, .LANCHOR0+88 + ldrb w0, [x0, #:lo12:.LANCHOR0+88] + cbnz w0, .L3261 +.L3256: + ldr x0, [x29, 152] + add x20, x20, :lo12:.LANCHOR2 + mov w19, 65535 + mov w22, 128 + add x21, x0, :lo12:.LANCHOR4 +.L3259: + ldrh w0, [x21, 1104] + cmp w0, w19 + bne .L3258 + ldrh w0, [x20, 2472] + cmp w0, w19 + bne .L3258 + ldrh w0, [x20, 2474] + cmp w0, w19 + bne .L3258 + and w0, w26, 7 + bl List_get_gc_head_node + bl FtlGcRefreshBlock +.L3258: + mov w1, 1 + strh w22, [x20, 2482] + mov w0, w1 + strh w22, [x20, 2480] + bl ftl_do_gc + mov w1, 1 + mov w0, 0 + bl ftl_do_gc + ldr w0, [x20, 2928] + cbnz w0, .L3261 + ldrh w0, [x21, 776] + cmp w0, 2 + bhi .L3261 + add w26, w26, 1 + cmp w26, 256 + bne .L3259 + b .L3261 +.L3255: + ldrh w0, [x22, 4] + cbnz w0, .L3228 + ldr x0, [x29, 120] + cmp x22, x0 + bne .L3229 + ldr x0, [x29, 176] + add x0, x0, 832 + ldrh w1, [x0, 4] + cbnz w1, .L3230 + bl allocate_new_data_superblock + ldr x0, [x29, 144] + add x0, x0, :lo12:.LANCHOR1 + str wzr, [x0, 3456] +.L3230: + ldr x0, [x29, 160] + bl allocate_new_data_superblock + ldr x0, [x29, 144] + ldr x1, [x29, 176] + add x0, x0, :lo12:.LANCHOR1 + add x22, x1, 832 + ldr w0, [x0, 3456] + cmp w0, 0 + ldr x0, [x29, 160] + csel x22, x22, x0, ne +.L3231: + ldrh w0, [x22, 4] + cbnz w0, .L3232 + mov x0, x22 + bl allocate_new_data_superblock +.L3232: + ldr x0, [x29, 176] + str x22, [x0, 1904] +.L3228: + add x1, x20, :lo12:.LANCHOR2 + str wzr, [x29, 184] + ldr w0, [x1, 2492] + ldr w1, [x1, 2496] + sub w0, w0, w1 + ldrh w1, [x22, 4] + cmp w0, w26 + csel w0, w0, w26, ls + cmp w1, w0 + csel w0, w1, w0, ls + str w0, [x29, 116] + ldr w0, [x29, 188] + and w0, w0, 1 + str w0, [x29, 112] + adrp x0, .LC164 + add x0, x0, :lo12:.LC164 + str x0, [x29, 104] +.L3233: + ldr w1, [x29, 116] + ldr w0, [x29, 184] + cmp w0, w1 + bne .L3251 +.L3234: + ldr w0, [x29, 184] + sub w26, w26, w0 + add x0, x20, :lo12:.LANCHOR2 + ldr w1, [x0, 2496] + ldr w0, [x0, 2492] + cmp w1, w0 + bcs .L3252 + ldr w0, [x29, 188] + cbnz w0, .L3252 + ldrh w0, [x22, 4] + cbz w0, .L3252 +.L3254: + str wzr, [x29, 188] + b .L3227 +.L3229: + ldr x0, [x29, 144] + add x0, x0, :lo12:.LANCHOR1 + str wzr, [x0, 3456] + ldr x0, [x29, 120] + ldrh w0, [x0, 4] + cbnz w0, .L3268 + mov x0, x22 + bl allocate_new_data_superblock + b .L3231 +.L3268: + ldr x22, [x29, 160] + b .L3232 +.L3251: + ldrh w0, [x22, 4] + cbz w0, .L3234 + ldr w0, [x29, 172] + cmp w0, w21 + ldr w0, [x29, 112] + cset w3, eq + tst w3, w0 + beq .L3235 + ldr w0, [x29, 184] + cbz w0, .L3235 + add x0, x20, :lo12:.LANCHOR2 + ldrh w1, [x0, 2350] + add w0, w23, w25 + msub w0, w21, w1, w0 + cmp w1, w0 + bne .L3234 +.L3235: + add x1, x29, 196 + add x19, x20, :lo12:.LANCHOR2 + mov w2, 0 + str w3, [x29, 100] + mov w0, w21 + bl log2phys + mov x0, x22 + bl get_new_active_ppa + ldr w5, [x19, 2496] + mov w4, 56 + ldr x1, [x19, 2560] + str w4, [x29, 168] + umull x2, w5, w4 + add x1, x1, x2 + str w0, [x1, 4] + ldr x0, [x19, 2560] + add x0, x0, x2 + ldrh w2, [x19, 2356] + str w21, [x0, 24] + mul w1, w5, w2 + and x1, x1, 4294967292 + str x1, [x29, 136] + ldr x1, [x19, 2664] + ldr x3, [x29, 136] + str x1, [x29, 128] + add x28, x1, x3 + ldrh w1, [x19, 2354] + str x28, [x0, 16] + mul w1, w1, w5 + ldr x5, [x19, 2608] + and x1, x1, 4294967292 + add x1, x5, x1 + str x1, [x0, 8] + mov w1, 0 + mov x0, x28 + bl ftl_memset + cmp w27, w21 + ldr w3, [x29, 100] + cset w0, eq + ldr w4, [x29, 168] + orr w3, w3, w0 + cbz w3, .L3236 + bne .L3237 + ldrh w19, [x19, 2350] + udiv w0, w23, w19 + msub w0, w0, w19, w23 + str w0, [x29, 168] + sub w19, w19, w0 + cmp w19, w25 + csel w19, w19, w25, ls +.L3238: + add x0, x20, :lo12:.LANCHOR2 + ldrh w1, [x0, 2350] + cmp w1, w19 + bne .L3239 + cmp w27, w21 + beq .L3269 + mul w1, w21, w19 + sub w1, w1, w23 + lsl w1, w1, 9 + add x1, x24, x1 +.L3240: + ldr w0, [x29, 188] + add x2, x20, :lo12:.LANCHOR2 + cbz w0, .L3241 + ldr w0, [x2, 2496] + mov w3, 56 + ldr x2, [x2, 2560] + umaddl x0, w0, w3, x2 +.L3287: + str x1, [x0, 8] +.L3242: + ldp x1, x2, [x29, 128] + mov w0, -3947 + strh w0, [x1, x2] + add x1, x20, :lo12:.LANCHOR2 + ldr w0, [x1, 2400] + stp w0, w21, [x28, 4] + add w21, w21, 1 + add w0, w0, 1 + cmn w0, #1 + csel w0, w0, wzr, ne + str w0, [x1, 2400] + ldr w0, [x29, 196] + str w0, [x28, 12] + ldrh w0, [x22] + strh w0, [x28, 2] + ldr w0, [x1, 2496] + add w0, w0, 1 + str w0, [x1, 2496] + ldr w0, [x29, 184] + add w0, w0, 1 + str w0, [x29, 184] + b .L3233 +.L3237: + ldrh w0, [x19, 2350] + add w2, w23, w25 + str wzr, [x29, 168] + msub w19, w21, w0, w2 + and w19, w19, 65535 + b .L3238 +.L3269: + mov x1, x24 + b .L3240 +.L3241: + ldr w0, [x2, 2496] + mov w4, 56 + ldr x3, [x2, 2560] + ldrh w2, [x2, 2354] + nop // between mem op and mult-accumulate + umaddl x0, w0, w4, x3 +.L3288: + ldr x0, [x0, 8] + b .L3290 +.L3239: + ldr w1, [x29, 196] + mov w2, 56 + cmn w1, #1 + beq .L3243 + str w1, [x29, 204] + ldr w1, [x0, 2496] + ldr x0, [x0, 2560] + str w21, [x29, 224] + nop // between mem op and mult-accumulate + umaddl x0, w1, w2, x0 + mov w2, 0 + ldp x1, x0, [x0, 8] + stp x1, x0, [x29, 208] + mov w1, 1 + add x0, x29, 200 + bl FlashReadPages + ldr w0, [x29, 200] + cmn w0, #1 + bne .L3244 + ldr x0, [x29, 176] + add x1, x0, 1152 + ldr w0, [x0, 1224] + add w0, w0, 1 + str w0, [x1, 72] +.L3246: + cmp w27, w21 + lsl w2, w19, 9 + bne .L3247 + add x0, x20, :lo12:.LANCHOR2 + mov w3, 56 + ldr w1, [x0, 2496] + ldr x0, [x0, 2560] + umaddl x1, w1, w3, x0 + ldr w0, [x29, 168] + lsl w0, w0, 9 + ldr x3, [x1, 8] + mov x1, x24 + add x0, x3, x0 +.L3290: + bl ftl_memcpy + b .L3242 +.L3244: + ldr w0, [x28, 8] + cmp w21, w0 + beq .L3246 + ldr x0, [x29, 176] + mov w2, w21 + add x1, x0, 1152 + ldr w0, [x0, 1224] + add w0, w0, 1 + str w0, [x1, 72] + ldr x0, [x29, 104] + ldr w1, [x28, 8] + bl printk + b .L3246 +.L3243: + ldr x1, [x0, 2560] + ldr w3, [x0, 2496] + umaddl x3, w3, w2, x1 + ldrh w2, [x0, 2354] + mov w1, 0 + ldr x0, [x3, 8] + bl ftl_memset + b .L3246 +.L3247: + add x3, x20, :lo12:.LANCHOR2 + mov w4, 56 + ldrh w1, [x3, 2350] + ldr w0, [x3, 2496] + ldr x3, [x3, 2560] + mul w1, w1, w21 + umaddl x0, w0, w4, x3 + sub w1, w1, w23 + lsl w1, w1, 9 +.L3289: + add x1, x24, x1 + b .L3288 +.L3236: + ldr w0, [x29, 188] + ldrh w1, [x19, 2350] + cbz w0, .L3248 + mul w1, w1, w21 + ldr w0, [x19, 2496] + ldr x2, [x19, 2560] + sub w1, w1, w23 + lsl w1, w1, 9 + add x1, x24, x1 + umaddl x0, w0, w4, x2 + b .L3287 +.L3248: + ldr x2, [x19, 2560] + mul w1, w1, w21 + ldr w0, [x19, 2496] + sub w1, w1, w23 + lsl w1, w1, 9 + umaddl x0, w0, w4, x2 + ldrh w2, [x19, 2354] + b .L3289 +.L3252: + bl FtlCacheWriteBack + add x0, x20, :lo12:.LANCHOR2 + cmp w26, 1 + str wzr, [x0, 2496] + bhi .L3227 + b .L3254 +.L3264: + mov w0, -1 + b .L3219 + .size ftl_write, .-ftl_write + .align 2 + .global ftl_vendor_write + .type ftl_vendor_write, %function +ftl_vendor_write: + stp x29, x30, [sp, -16]! + mov x3, x2 + mov w2, w1 + mov w1, w0 + add x29, sp, 0 + mov w0, 16 + bl ftl_write + ldp x29, x30, [sp], 16 + ret + .size ftl_vendor_write, .-ftl_vendor_write + .align 2 + .global ftl_sys_write + .type ftl_sys_write, %function +ftl_sys_write: + stp x29, x30, [sp, -16]! + mov x3, x2 + mov w2, w1 + add w1, w0, 256 + add x29, sp, 0 + mov w0, 16 + bl ftl_write + ldp x29, x30, [sp], 16 + ret + .size ftl_sys_write, .-ftl_sys_write + .align 2 + .global ftl_fix_nand_power_lost_error + .type ftl_fix_nand_power_lost_error, %function +ftl_fix_nand_power_lost_error: + stp x29, x30, [sp, -144]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x20, .LANCHOR2 + add x19, x20, :lo12:.LANCHOR2 + stp x21, x22, [sp, 32] + stp x23, x24, [sp, 48] + stp x25, x26, [sp, 64] + str x27, [sp, 80] + ldrb w0, [x19, 1220] + cbz w0, .L3295 + mov x24, x20 + adrp x21, .LANCHOR4 + add x20, x21, :lo12:.LANCHOR4 + ldr x0, [x19, 2712] + adrp x25, .LC165 + add x27, x20, 784 + add x26, x20, 832 + ldrh w22, [x20, 1754] + mov w1, w22 + ubfiz x23, x22, 1, 16 + ldrh w2, [x0, x23] + add x0, x25, :lo12:.LC165 + bl printk + ldrh w0, [x20, 784] + bl FtlGcRefreshOpenBlock + ldrh w0, [x20, 832] + mov w20, 4097 + bl FtlGcRefreshOpenBlock + mov x0, x27 + bl allocate_new_data_superblock + mov x0, x26 + bl allocate_new_data_superblock +.L3297: + subs w20, w20, #1 + beq .L3301 + mov w1, 1 + mov w0, w1 + bl ftl_do_gc + ldr x0, [x19, 2712] + ldrh w0, [x0, x23] + cbnz w0, .L3297 +.L3301: + add x20, x24, :lo12:.LANCHOR2 + mov w1, w22 + ldr x0, [x20, 2712] + ldrh w2, [x0, x23] + add x0, x25, :lo12:.LC165 + bl printk + ldr x0, [x20, 2712] + ldrh w19, [x0, x23] + cbnz w19, .L3299 + add x12, x29, 144 + strh w22, [x12, -48]! + mov x0, x12 + bl make_superblock + ldrh w5, [x20, 2276] + add x12, x12, 16 + mov w0, 0 + mov w6, 65535 + mov w7, 56 +.L3302: + cmp w0, w5 + bne .L3304 + add x24, x24, :lo12:.LANCHOR2 + mov w1, w22 + ldr x0, [x24, 2712] + ldrh w2, [x0, x23] + adrp x0, .LC166 + add x0, x0, :lo12:.LC166 + bl printk + ldr x0, [x24, 2544] + mov w2, w19 + mov w1, 0 + bl FlashEraseBlocks + ldr x0, [x24, 2544] + mov w2, w19 + mov w1, 1 + bl FlashEraseBlocks +.L3299: + add x21, x21, :lo12:.LANCHOR4 + mov w0, -1 + strh w0, [x21, 1754] +.L3295: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldr x27, [sp, 80] + ldp x29, x30, [sp], 144 + ret +.L3304: + ldrh w2, [x12] + cmp w2, w6 + beq .L3303 + umull x4, w19, w7 + ldr x3, [x20, 2544] + lsl w2, w2, 10 + add w19, w19, 1 + add x3, x3, x4 + and w19, w19, 65535 + str w2, [x3, 4] + ldr x1, [x20, 2544] + add x1, x1, x4 + stp xzr, xzr, [x1, 8] +.L3303: + add w0, w0, 1 + add x12, x12, 2 + and w0, w0, 65535 + b .L3302 + .size ftl_fix_nand_power_lost_error, .-ftl_fix_nand_power_lost_error + .global gc_ink_free_return_value + .global check_valid_page_count_table + .global FtlUpdateVaildLpnCount + .global g_ect_tbl_power_up_flush + .global last_cache_match_count + .global power_up_flag + .global g_LowFormat + .global gFtlInitStatus + .global DeviceCapacity + .global ToshibaRefValue + .global Toshiba15RefValue + .global ToshibaA19RefValue + .global SamsungRefValue + .global refValueDefault + .global FbbtBlk + .global random_seed + .global gSlcNandParaInfo + .global gNandParaInfo + .global g_page_map_check_enable + .global g_power_lost_ecc_error_blk + .global g_power_lost_recovery_flag + .global c_mlc_erase_count_value + .global g_recovery_ppa_tbl + .global g_recovery_page_min_ver + .global g_recovery_page_num + .global g_cur_erase_blk + .global g_gc_skip_write_count + .global g_gc_head_data_block_count + .global g_gc_head_data_block + .global g_ftl_nand_free_count + .global g_in_swl_replace + .global g_in_gc_progress + .global g_all_blk_used_slc_mode + .global g_max_erase_count + .global g_totle_sys_slc_erase_count + .global g_totle_slc_erase_count + .global g_min_erase_count + .global g_totle_avg_erase_count + .global g_totle_mlc_erase_count + .global g_totle_l2p_write_count + .global g_totle_cache_write_count + .global g_tmp_data_superblock_id + .global g_totle_read_page_count + .global g_totle_discard_page_count + .global g_totle_read_sector + .global g_totle_write_sector + .global g_totle_write_page_count + .global g_totle_gc_page_count + .global g_gc_blk_index + .global g_gc_merge_free_blk_threshold + .global g_gc_free_blk_threshold + .global g_gc_refresh_block_temp_tbl + .global g_free_slc_blk_num + .global g_gc_refresh_block_temp_num + .global g_gc_bad_block_temp_tbl + .global g_gc_bad_block_gc_index + .global g_gc_bad_block_temp_num + .global g_gc_next_blk_3 + .global g_gc_next_blk_2 + .global g_gc_next_blk_1 + .global g_gc_next_blk + .global g_gc_cur_blk_max_valid_pages + .global g_gc_cur_blk_valid_pages + .global g_gc_page_offset + .global g_gc_blk_num + .global p_gc_blk_tbl + .global p_gc_page_info + .global g_sys_ext_data + .global g_sys_save_data + .global gp_last_act_superblock + .global g_gc_superblock + .global g_gc_temp_superblock + .global g_buffer_superblock + .global g_active_superblock + .global g_num_data_superblocks + .global g_num_free_superblocks + .global p_data_block_list_tail + .global p_data_block_list_head + .global p_free_data_block_list_head + .global p_data_block_list_table + .global g_l2p_last_update_region_id + .global p_l2p_map_buf + .global p_l2p_ram_map + .global g_totle_vendor_block + .global p_vendor_region_ppn_table + .global p_vendor_block_ver_table + .global p_vendor_block_valid_page_count + .global p_vendor_block_table + .global g_totle_map_block + .global p_map_region_ppn_check_table + .global p_map_region_ppn_table + .global p_map_block_ver_table + .global p_map_block_valid_page_count + .global p_map_block_table + .global p_blk_mode_table + .global p_valid_page_count_check_table + .global p_valid_page_count_table + .global g_totle_swl_count + .global p_swl_mul_table + .global p_erase_count_table + .global g_ect_tbl_info_size + .global gp_ect_tbl_info + .global g_gc_num_req + .global c_gc_page_buf_num + .global gp_gc_page_buf_info + .global p_gc_data_buf + .global p_gc_spare_buf + .global p_io_spare_buf + .global p_io_data_buf_1 + .global p_io_data_buf_0 + .global p_sys_spare_buf + .global p_vendor_data_buf + .global p_sys_data_buf_1 + .global p_sys_data_buf + .global g_wr_page_num + .global req_wr_io + .global c_wr_page_buf_num + .global p_wr_io_data_buf + .global p_wr_io_spare_buf + .global p_plane_order_table + .global g_req_cache + .global req_gc_dst + .global req_gc + .global req_erase + .global req_prgm + .global req_read + .global req_sys + .global gVendorBlkInfo + .global gL2pMapInfo + .global gSysFreeQueue + .global gSysInfo + .global gBbtInfo + .global g_flash_read_only_en + .global g_inkDie_check_enable + .global g_SlcPartLbaEndSector + .global g_MaxLbn + .global g_VaildLpn + .global g_MaxLpn + .global g_MaxLbaSector + .global g_GlobalDataVersion + .global g_GlobalSysVersion + .global ftl_gc_temp_power_lost_recovery_flag + .global c_ftl_nand_max_data_blks + .global c_ftl_nand_data_op_blks_per_plane + .global c_ftl_nand_data_blks_per_plane + .global c_ftl_nand_max_sys_blks + .global c_ftl_nand_init_sys_blks_per_plane + .global c_ftl_nand_sys_blks_per_plane + .global c_ftl_vendor_part_size + .global c_ftl_nand_max_vendor_blks + .global c_ftl_nand_max_map_blks + .global c_ftl_nand_map_blks_per_plane + .global c_ftl_nand_vendor_region_num + .global c_ftl_nand_l2pmap_ram_region_num + .global c_ftl_nand_map_region_num + .global c_ftl_nand_totle_phy_blks + .global c_ftl_nand_reserved_blks + .global c_ftl_nand_byte_pre_oob + .global c_ftl_nand_byte_pre_page + .global c_ftl_nand_sec_pre_page_shift + .global c_ftl_nand_sec_pre_page + .global c_ftl_nand_page_pre_super_blk + .global c_ftl_nand_page_pre_slc_blk + .global c_ftl_nand_page_pre_blk + .global c_ftl_nand_bbm_buf_size + .global c_ftl_nand_ext_blk_pre_plane + .global c_ftl_nand_blk_pre_plane + .global c_ftl_nand_planes_num + .global c_ftl_nand_blks_per_die + .global c_ftl_nand_planes_per_die + .global c_ftl_nand_die_num + .global c_ftl_nand_type + .global gMasterTempBuf + .global gMasterInfo + .global gNandcDumpWriteEn + .global gToggleModeClkDiv + .global gBootDdrMode + .global gNandcEccBits + .global gpNandc1 + .global gpNandc + .global g_nandc_version_data + .global gNandcVer + .global gNandChipMap + .global gNandIDataBuf + .global idb_flash_slc_mode + .global FlashDdrTunningReadCount + .global FlashWaitBusyScheduleEn + .global gNandPhyInfo + .global gFlashProgCheckSpareBuffer + .global gFlashProgCheckBuffer + .global gFlashSpareBuffer + .global gFlashPageBuffer1 + .global gFlashPageBuffer0 + .global gpFlashSaveInfo + .global gReadRetryInfo + .global gpNandParaInfo + .global gNandOptPara + .global g_nand_ecc_en + .global g_slc2KBNand + .global gNandIDBResBlkNumSaveInFlash + .global gNandIDBResBlkNum + .global gNandFlashResEndPageAddr + .global gNandFlashInfoBlockAddr + .global gNandFlashIdbBlockAddr + .global gNandFlashInfoBlockEcc + .global gNandFlashIDBEccBits + .global gNandFlashEccBits + .global gNandRandomizer + .global gBlockPageAlignSize + .global gTotleBlock + .global gNandMaxChip + .global gNandMaxDie + .global gFlashInterfaceMode + .global gFlashCurMode + .global gFlashSlcMode + .global gFlashOnfiModeEn + .global gFlashToggleModeEn + .global gFlashSdrModeEn + .global gMultiPageProgEn + .global gMultiPageReadEn + .global gpReadRetrial + .global mlcPageToSlcPageTbl + .global slcPageToMlcPageTbl + .global DieAddrs + .global gDieOp + .global DieCsIndex + .global read_retry_cur_offset + .section .rodata + .align 3 + .set .LANCHOR3,. + 0 + .type samsung_14nm_slc_rr, %object + .size samsung_14nm_slc_rr, 26 +samsung_14nm_slc_rr: + .byte 0 + .byte 10 + .byte -10 + .byte 20 + .byte -20 + .byte 30 + .byte -30 + .byte 40 + .byte -40 + .byte 50 + .byte -50 + .byte 60 + .byte -60 + .byte -70 + .byte -80 + .byte -90 + .byte -100 + .byte -110 + .byte -120 + .byte -9 + .byte 70 + .byte 80 + .byte 90 + .byte -125 + .byte -115 + .byte 100 + .zero 6 + .type samsung_14nm_mlc_rr, %object + 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.byte 63 + .byte 0 + .byte 49 + .byte -128 + .byte 21 + .byte 96 + .byte 96 + .byte 17 + .byte -127 + .byte 112 + .byte -15 + .byte -14 + .byte 0 + .byte 0 + .byte 0 + .zero 14 + .byte 4 + .byte 0 + .byte 49 + .byte 63 + .byte 0 + .byte 49 + .byte -128 + .byte 21 + .byte 96 + .byte 96 + .byte 17 + .byte -127 + .byte 112 + .byte 112 + .byte 112 + .byte 0 + .byte 0 + .byte 0 + .zero 14 + .type refValueDefault, %object + .size refValueDefault, 28 +refValueDefault: + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 6 + .byte 10 + .byte 6 + .byte 0 + .byte -3 + .byte -7 + .byte -8 + .byte 0 + .byte -6 + .byte -13 + .byte -15 + .byte 0 + .byte -11 + .byte -20 + .byte -23 + .byte 0 + .byte 0 + .byte -26 + .byte -30 + .byte 0 + .byte 0 + .byte -32 + .byte -37 + .zero 4 + .type gSlcNandParaInfo, %object + .size gSlcNandParaInfo, 32 +gSlcNandParaInfo: + .byte 2 + .byte -104 + .byte -15 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 1 + .byte 1 + .byte 4 + .hword 64 + .byte 1 + .byte 1 + .hword 1024 + .hword 256 + .byte 0 + .byte 0 + .byte 16 + .byte 40 + .byte 1 + .byte 0 + .byte 1 + .byte 0 + .byte 0 + .byte 0 + .zero 4 + .type gFtlInitStatus, %object + .size gFtlInitStatus, 4 +gFtlInitStatus: + .word -1 + .type ftl_gc_temp_block_bops_scan_page_addr, %object + .size ftl_gc_temp_block_bops_scan_page_addr, 2 +ftl_gc_temp_block_bops_scan_page_addr: + .hword -1 + .zero 2 + .type power_up_flag, %object + .size power_up_flag, 4 +power_up_flag: + .word 1 + .bss + .align 3 + .set .LANCHOR0,. + 0 + .set .LANCHOR2,. + 4352 + .set .LANCHOR4,. + 8704 + .type gNandChipMap, %object + .size gNandChipMap, 64 +gNandChipMap: + .zero 64 + .type gFlashPageBuffer0, %object + .size gFlashPageBuffer0, 8 +gFlashPageBuffer0: + .zero 8 + .type gNandFlashIdbBlockAddr, %object + .size gNandFlashIdbBlockAddr, 4 +gNandFlashIdbBlockAddr: + .zero 4 + .zero 4 + .type p_blk_mode_table, %object + .size p_blk_mode_table, 8 +p_blk_mode_table: + .zero 8 + .type g_slc2KBNand, %object + .size g_slc2KBNand, 1 +g_slc2KBNand: + .zero 1 + .type gNandIDBResBlkNum, %object + .size gNandIDBResBlkNum, 1 +gNandIDBResBlkNum: + .zero 1 + .zero 2 + .type gBlockPageAlignSize, %object + .size gBlockPageAlignSize, 4 +gBlockPageAlignSize: + .zero 4 + .type gNandRandomizer, %object + .size gNandRandomizer, 1 +gNandRandomizer: + .zero 1 + .zero 7 + .type gpNandParaInfo, %object + .size gpNandParaInfo, 8 +gpNandParaInfo: + .zero 8 + .type gNandOptPara, %object + .size gNandOptPara, 32 +gNandOptPara: + .zero 32 + .type slcPageToMlcPageTbl, %object + .size slcPageToMlcPageTbl, 1024 +slcPageToMlcPageTbl: + .zero 1024 + .type mlcPageToSlcPageTbl, %object + .size mlcPageToSlcPageTbl, 2048 +mlcPageToSlcPageTbl: + .zero 2048 + .type gNandMaxDie, %object + .size gNandMaxDie, 1 +gNandMaxDie: + .zero 1 + .type gNandMaxChip, %object + .size gNandMaxChip, 1 +gNandMaxChip: + .zero 1 + .zero 2 + .type DieCsIndex, %object + .size DieCsIndex, 8 +DieCsIndex: + .zero 8 + .type DieAddrs, %object + .size DieAddrs, 32 +DieAddrs: + .zero 32 + .type gDieOp, %object + .size gDieOp, 192 +gDieOp: + .zero 192 + .type gTotleBlock, %object + .size gTotleBlock, 2 +gTotleBlock: + .zero 2 + .zero 2 + .type gNandIDataBuf, %object + .size gNandIDataBuf, 2048 +gNandIDataBuf: + .zero 2048 + .type gpNandc, %object + .size gpNandc, 8 +gpNandc: + .zero 8 + .type NANDC_FMCTL, %object + .size NANDC_FMCTL, 4 +NANDC_FMCTL: + .zero 4 + .type NANDC_FMWAIT, %object + .size NANDC_FMWAIT, 4 +NANDC_FMWAIT: + .zero 4 + .type NANDC_FLCTL, %object + .size NANDC_FLCTL, 4 +NANDC_FLCTL: + .zero 4 + .type NANDC_BCHCTL, %object + .size NANDC_BCHCTL, 4 +NANDC_BCHCTL: + .zero 4 + .type NANDC_DLL_CTL_REG0, %object + .size NANDC_DLL_CTL_REG0, 4 +NANDC_DLL_CTL_REG0: + .zero 4 + .type NANDC_DLL_CTL_REG1, %object + .size NANDC_DLL_CTL_REG1, 4 +NANDC_DLL_CTL_REG1: + .zero 4 + .type NANDC_RANDMZ_CFG, %object + .size NANDC_RANDMZ_CFG, 4 +NANDC_RANDMZ_CFG: + .zero 4 + .type NANDC_FMWAIT_SYN, %object + .size NANDC_FMWAIT_SYN, 4 +NANDC_FMWAIT_SYN: + .zero 4 + .type gNandPhyInfo, %object + .size gNandPhyInfo, 28 +gNandPhyInfo: + .zero 28 + .type gFlashSlcMode, %object + .size gFlashSlcMode, 1 +gFlashSlcMode: + .zero 1 + .type gNandFlashEccBits, %object + .size gNandFlashEccBits, 1 +gNandFlashEccBits: + .zero 1 + .zero 2 + .type g_MaxLbaSector, %object + .size g_MaxLbaSector, 4 +g_MaxLbaSector: + .zero 4 + .type FlashWaitBusyScheduleEn, %object + .size FlashWaitBusyScheduleEn, 4 +FlashWaitBusyScheduleEn: + .zero 4 + .type gReadRetryInfo, %object + .size gReadRetryInfo, 852 +gReadRetryInfo: + .zero 852 + .zero 4 + .type read_retry_cur_offset, %object + .size read_retry_cur_offset, 4 +read_retry_cur_offset: + .zero 4 + .type gFlashCurMode, %object + .size gFlashCurMode, 1 +gFlashCurMode: + .zero 1 + .type gFlashInterfaceMode, %object + .size gFlashInterfaceMode, 1 +gFlashInterfaceMode: + .zero 1 + .type gMultiPageProgEn, %object + .size gMultiPageProgEn, 1 +gMultiPageProgEn: + .zero 1 + .zero 1 + .type g_inkDie_check_enable, %object + .size g_inkDie_check_enable, 4 +g_inkDie_check_enable: + .zero 4 + .type idb_flash_slc_mode, %object + .size idb_flash_slc_mode, 4 +idb_flash_slc_mode: + .zero 4 + .type gFlashToggleModeEn, %object + .size gFlashToggleModeEn, 1 +gFlashToggleModeEn: + .zero 1 + .zero 3 + .type gBootDdrMode, %object + .size gBootDdrMode, 4 +gBootDdrMode: + .zero 4 + .type gNandcVer, %object + .size gNandcVer, 4 +gNandcVer: + .zero 4 + .type g_nandc_version_data, %object + .size g_nandc_version_data, 4 +g_nandc_version_data: + .zero 4 + .type gMasterTempBuf, %object + .size gMasterTempBuf, 8 +gMasterTempBuf: + .zero 8 + .type gMasterInfo, %object + .size gMasterInfo, 48 +gMasterInfo: + .zero 48 + .type gNandcDumpWriteEn, %object + .size gNandcDumpWriteEn, 4 +gNandcDumpWriteEn: + .zero 4 + .type gNandcEccBits, %object + .size gNandcEccBits, 4 +gNandcEccBits: + .zero 4 + .type FlashDdrTunningReadCount, %object + .size FlashDdrTunningReadCount, 4 +FlashDdrTunningReadCount: + .zero 4 + .zero 4 + .type gpReadRetrial, %object + .size gpReadRetrial, 8 +gpReadRetrial: + .zero 8 + .type gpFlashSaveInfo, %object + .size gpFlashSaveInfo, 8 +gpFlashSaveInfo: + .zero 8 + .type gNandFlashInfoBlockAddr, %object + .size gNandFlashInfoBlockAddr, 4 +gNandFlashInfoBlockAddr: + .zero 4 + .type gNandIDBResBlkNumSaveInFlash, %object + .size gNandIDBResBlkNumSaveInFlash, 1 +gNandIDBResBlkNumSaveInFlash: + .zero 1 + .type gNandFlashIDBEccBits, %object + .size gNandFlashIDBEccBits, 1 +gNandFlashIDBEccBits: + .zero 1 + .zero 2 + .type gFlashPageBuffer1, %object + .size gFlashPageBuffer1, 8 +gFlashPageBuffer1: + .zero 8 + .type gFlashSpareBuffer, %object + .size gFlashSpareBuffer, 8 +gFlashSpareBuffer: + .zero 8 + .type gFlashProgCheckBuffer, %object + .size gFlashProgCheckBuffer, 8 +gFlashProgCheckBuffer: + .zero 8 + .type gFlashProgCheckSpareBuffer, %object + .size gFlashProgCheckSpareBuffer, 8 +gFlashProgCheckSpareBuffer: + .zero 8 + .type g_nand_ecc_en, %object + .size g_nand_ecc_en, 1 +g_nand_ecc_en: + .zero 1 + .type gMultiPageReadEn, %object + .size gMultiPageReadEn, 1 +gMultiPageReadEn: + .zero 1 + .zero 6 + .type FbbtBlk, %object + .size FbbtBlk, 16 +FbbtBlk: + .zero 16 + .type c_ftl_nand_sys_blks_per_plane, %object + .size c_ftl_nand_sys_blks_per_plane, 4 +c_ftl_nand_sys_blks_per_plane: + .zero 4 + .type c_ftl_nand_planes_num, %object + .size c_ftl_nand_planes_num, 2 +c_ftl_nand_planes_num: + .zero 2 + .zero 2 + .type c_ftl_nand_max_sys_blks, %object + .size c_ftl_nand_max_sys_blks, 4 +c_ftl_nand_max_sys_blks: + .zero 4 + .type c_ftl_nand_data_blks_per_plane, %object + .size c_ftl_nand_data_blks_per_plane, 2 +c_ftl_nand_data_blks_per_plane: + .zero 2 + .type c_ftl_nand_blk_pre_plane, %object + .size c_ftl_nand_blk_pre_plane, 2 +c_ftl_nand_blk_pre_plane: + .zero 2 + .type c_ftl_nand_max_data_blks, %object + .size c_ftl_nand_max_data_blks, 4 +c_ftl_nand_max_data_blks: + .zero 4 + .type c_ftl_nand_totle_phy_blks, %object + .size c_ftl_nand_totle_phy_blks, 4 +c_ftl_nand_totle_phy_blks: + .zero 4 + .type c_ftl_nand_type, %object + .size c_ftl_nand_type, 2 +c_ftl_nand_type: + .zero 2 + .type c_ftl_nand_die_num, %object + .size c_ftl_nand_die_num, 2 +c_ftl_nand_die_num: + .zero 2 + .type c_ftl_nand_planes_per_die, %object + .size c_ftl_nand_planes_per_die, 2 +c_ftl_nand_planes_per_die: + .zero 2 + .zero 2 + .type p_plane_order_table, %object + .size p_plane_order_table, 32 +p_plane_order_table: + .zero 32 + .type c_mlc_erase_count_value, %object + .size c_mlc_erase_count_value, 2 +c_mlc_erase_count_value: + .zero 2 + .type c_ftl_nand_ext_blk_pre_plane, %object + .size c_ftl_nand_ext_blk_pre_plane, 2 +c_ftl_nand_ext_blk_pre_plane: + .zero 2 + .type c_ftl_vendor_part_size, %object + .size c_ftl_vendor_part_size, 2 +c_ftl_vendor_part_size: + .zero 2 + .type c_ftl_nand_blks_per_die, %object + .size c_ftl_nand_blks_per_die, 2 +c_ftl_nand_blks_per_die: + .zero 2 + .type c_ftl_nand_page_pre_blk, %object + .size c_ftl_nand_page_pre_blk, 2 +c_ftl_nand_page_pre_blk: + .zero 2 + .type c_ftl_nand_page_pre_slc_blk, %object + .size c_ftl_nand_page_pre_slc_blk, 2 +c_ftl_nand_page_pre_slc_blk: + .zero 2 + .type c_ftl_nand_page_pre_super_blk, %object + .size c_ftl_nand_page_pre_super_blk, 2 +c_ftl_nand_page_pre_super_blk: + .zero 2 + .type c_ftl_nand_sec_pre_page, %object + .size c_ftl_nand_sec_pre_page, 2 +c_ftl_nand_sec_pre_page: + .zero 2 + .type c_ftl_nand_sec_pre_page_shift, %object + .size c_ftl_nand_sec_pre_page_shift, 2 +c_ftl_nand_sec_pre_page_shift: + .zero 2 + .type c_ftl_nand_byte_pre_page, %object + .size c_ftl_nand_byte_pre_page, 2 +c_ftl_nand_byte_pre_page: + .zero 2 + .type c_ftl_nand_byte_pre_oob, %object + .size c_ftl_nand_byte_pre_oob, 2 +c_ftl_nand_byte_pre_oob: + .zero 2 + .type c_ftl_nand_reserved_blks, %object + .size c_ftl_nand_reserved_blks, 2 +c_ftl_nand_reserved_blks: + .zero 2 + .type DeviceCapacity, %object + .size DeviceCapacity, 4 +DeviceCapacity: + .zero 4 + .type c_ftl_nand_max_vendor_blks, %object + .size c_ftl_nand_max_vendor_blks, 2 +c_ftl_nand_max_vendor_blks: + .zero 2 + .type c_ftl_nand_vendor_region_num, %object + .size c_ftl_nand_vendor_region_num, 2 +c_ftl_nand_vendor_region_num: + .zero 2 + .type c_ftl_nand_map_blks_per_plane, %object + .size c_ftl_nand_map_blks_per_plane, 2 +c_ftl_nand_map_blks_per_plane: + .zero 2 + .zero 2 + .type c_ftl_nand_max_map_blks, %object + .size c_ftl_nand_max_map_blks, 4 +c_ftl_nand_max_map_blks: + .zero 4 + .type c_ftl_nand_init_sys_blks_per_plane, %object + .size c_ftl_nand_init_sys_blks_per_plane, 4 +c_ftl_nand_init_sys_blks_per_plane: + .zero 4 + .type c_ftl_nand_map_region_num, %object + .size c_ftl_nand_map_region_num, 2 +c_ftl_nand_map_region_num: + .zero 2 + .type c_ftl_nand_l2pmap_ram_region_num, %object + .size c_ftl_nand_l2pmap_ram_region_num, 2 +c_ftl_nand_l2pmap_ram_region_num: + .zero 2 + .type g_page_map_check_enable, %object + .size g_page_map_check_enable, 2 +g_page_map_check_enable: + .zero 2 + .type g_free_slc_blk_num, %object + .size g_free_slc_blk_num, 2 +g_free_slc_blk_num: + .zero 2 + .type g_SlcPartLbaEndSector, %object + .size g_SlcPartLbaEndSector, 4 +g_SlcPartLbaEndSector: + .zero 4 + .type g_all_blk_used_slc_mode, %object + .size g_all_blk_used_slc_mode, 4 +g_all_blk_used_slc_mode: + .zero 4 + .type g_GlobalSysVersion, %object + .size g_GlobalSysVersion, 4 +g_GlobalSysVersion: + .zero 4 + .type g_GlobalDataVersion, %object + .size g_GlobalDataVersion, 4 +g_GlobalDataVersion: + .zero 4 + .type g_totle_gc_page_count, %object + .size g_totle_gc_page_count, 4 +g_totle_gc_page_count: + .zero 4 + .type g_totle_write_page_count, %object + .size g_totle_write_page_count, 4 +g_totle_write_page_count: + .zero 4 + .type g_totle_discard_page_count, %object + .size g_totle_discard_page_count, 4 +g_totle_discard_page_count: + .zero 4 + .type g_totle_cache_write_count, %object + .size g_totle_cache_write_count, 4 +g_totle_cache_write_count: + .zero 4 + .type g_totle_l2p_write_count, %object + .size g_totle_l2p_write_count, 4 +g_totle_l2p_write_count: + .zero 4 + .type g_totle_read_page_count, %object + .size g_totle_read_page_count, 4 +g_totle_read_page_count: + .zero 4 + .type g_totle_mlc_erase_count, %object + .size g_totle_mlc_erase_count, 4 +g_totle_mlc_erase_count: + .zero 4 + .type g_totle_slc_erase_count, %object + .size g_totle_slc_erase_count, 4 +g_totle_slc_erase_count: + .zero 4 + .type g_totle_sys_slc_erase_count, %object + .size g_totle_sys_slc_erase_count, 4 +g_totle_sys_slc_erase_count: + .zero 4 + .type g_max_erase_count, %object + .size g_max_erase_count, 4 +g_max_erase_count: + .zero 4 + .type g_min_erase_count, %object + .size g_min_erase_count, 4 +g_min_erase_count: + .zero 4 + .type g_in_gc_progress, %object + .size g_in_gc_progress, 4 +g_in_gc_progress: + .zero 4 + .type g_in_swl_replace, %object + .size g_in_swl_replace, 4 +g_in_swl_replace: + .zero 4 + .type g_gc_head_data_block, %object + .size g_gc_head_data_block, 4 +g_gc_head_data_block: + .zero 4 + .type g_gc_head_data_block_count, %object + .size g_gc_head_data_block_count, 4 +g_gc_head_data_block_count: + .zero 4 + .type g_gc_skip_write_count, %object + .size g_gc_skip_write_count, 4 +g_gc_skip_write_count: + .zero 4 + .type g_cur_erase_blk, %object + .size g_cur_erase_blk, 4 +g_cur_erase_blk: + .zero 4 + .type g_gc_next_blk, %object + .size g_gc_next_blk, 2 +g_gc_next_blk: + .zero 2 + .type g_gc_next_blk_1, %object + .size g_gc_next_blk_1, 2 +g_gc_next_blk_1: + .zero 2 + .type g_gc_next_blk_2, %object + .size g_gc_next_blk_2, 2 +g_gc_next_blk_2: + .zero 2 + .type g_gc_next_blk_3, %object + .size g_gc_next_blk_3, 2 +g_gc_next_blk_3: + .zero 2 + .type g_gc_free_blk_threshold, %object + .size g_gc_free_blk_threshold, 2 +g_gc_free_blk_threshold: + .zero 2 + .type g_gc_merge_free_blk_threshold, %object + .size g_gc_merge_free_blk_threshold, 2 +g_gc_merge_free_blk_threshold: + .zero 2 + .type g_gc_blk_index, %object + .size g_gc_blk_index, 2 +g_gc_blk_index: + .zero 2 + .type g_gc_bad_block_temp_num, %object + .size g_gc_bad_block_temp_num, 2 +g_gc_bad_block_temp_num: + .zero 2 + .type g_gc_refresh_block_temp_num, %object + .size g_gc_refresh_block_temp_num, 2 +g_gc_refresh_block_temp_num: + .zero 2 + .type g_gc_bad_block_gc_index, %object + .size g_gc_bad_block_gc_index, 2 +g_gc_bad_block_gc_index: + .zero 2 + .type c_wr_page_buf_num, %object + .size c_wr_page_buf_num, 4 +c_wr_page_buf_num: + .zero 4 + .type g_wr_page_num, %object + .size g_wr_page_num, 4 +g_wr_page_num: + .zero 4 + .zero 4 + .type p_gc_blk_tbl, %object + .size p_gc_blk_tbl, 8 +p_gc_blk_tbl: + .zero 8 + .type p_gc_page_info, %object + .size p_gc_page_info, 8 +p_gc_page_info: + .zero 8 + .type req_read, %object + .size req_read, 8 +req_read: + .zero 8 + .type req_gc_dst, %object + .size req_gc_dst, 8 +req_gc_dst: + .zero 8 + .type req_prgm, %object + .size req_prgm, 8 +req_prgm: + .zero 8 + .type req_erase, %object + .size req_erase, 8 +req_erase: + .zero 8 + .type req_gc, %object + .size req_gc, 8 +req_gc: + .zero 8 + .type req_wr_io, %object + .size req_wr_io, 8 +req_wr_io: + .zero 8 + .type c_gc_page_buf_num, %object + .size c_gc_page_buf_num, 4 +c_gc_page_buf_num: + .zero 4 + .zero 4 + .type p_sys_data_buf, %object + .size p_sys_data_buf, 8 +p_sys_data_buf: + .zero 8 + .type p_sys_data_buf_1, %object + .size p_sys_data_buf_1, 8 +p_sys_data_buf_1: + .zero 8 + .type p_vendor_data_buf, %object + .size p_vendor_data_buf, 8 +p_vendor_data_buf: + .zero 8 + .type p_gc_data_buf, %object + .size p_gc_data_buf, 8 +p_gc_data_buf: + .zero 8 + .type p_wr_io_data_buf, %object + .size p_wr_io_data_buf, 8 +p_wr_io_data_buf: + .zero 8 + .type p_io_data_buf_0, %object + .size p_io_data_buf_0, 8 +p_io_data_buf_0: + .zero 8 + .type p_io_data_buf_1, %object + .size p_io_data_buf_1, 8 +p_io_data_buf_1: + .zero 8 + .type gp_gc_page_buf_info, %object + .size gp_gc_page_buf_info, 8 +gp_gc_page_buf_info: + .zero 8 + .type p_sys_spare_buf, %object + .size p_sys_spare_buf, 8 +p_sys_spare_buf: + .zero 8 + .type p_io_spare_buf, %object + .size p_io_spare_buf, 8 +p_io_spare_buf: + .zero 8 + .type p_gc_spare_buf, %object + .size p_gc_spare_buf, 8 +p_gc_spare_buf: + .zero 8 + .type p_wr_io_spare_buf, %object + .size p_wr_io_spare_buf, 8 +p_wr_io_spare_buf: + .zero 8 + .type g_ect_tbl_info_size, %object + .size g_ect_tbl_info_size, 2 +g_ect_tbl_info_size: + .zero 2 + .zero 6 + .type p_swl_mul_table, %object + .size p_swl_mul_table, 8 +p_swl_mul_table: + .zero 8 + .type gp_ect_tbl_info, %object + .size gp_ect_tbl_info, 8 +gp_ect_tbl_info: + .zero 8 + .type p_erase_count_table, %object + .size p_erase_count_table, 8 +p_erase_count_table: + .zero 8 + .type p_valid_page_count_check_table, %object + .size p_valid_page_count_check_table, 8 +p_valid_page_count_check_table: + .zero 8 + .type p_valid_page_count_table, %object + .size p_valid_page_count_table, 8 +p_valid_page_count_table: + .zero 8 + .type p_map_block_table, %object + .size p_map_block_table, 8 +p_map_block_table: + .zero 8 + .type p_map_block_valid_page_count, %object + .size p_map_block_valid_page_count, 8 +p_map_block_valid_page_count: + .zero 8 + .type p_vendor_block_table, %object + .size p_vendor_block_table, 8 +p_vendor_block_table: + .zero 8 + .type p_vendor_block_valid_page_count, %object + .size p_vendor_block_valid_page_count, 8 +p_vendor_block_valid_page_count: + .zero 8 + .type p_vendor_block_ver_table, %object + .size p_vendor_block_ver_table, 8 +p_vendor_block_ver_table: + .zero 8 + .type p_vendor_region_ppn_table, %object + .size p_vendor_region_ppn_table, 8 +p_vendor_region_ppn_table: + .zero 8 + .type p_map_region_ppn_table, %object + .size p_map_region_ppn_table, 8 +p_map_region_ppn_table: + .zero 8 + .type p_map_region_ppn_check_table, %object + .size p_map_region_ppn_check_table, 8 +p_map_region_ppn_check_table: + .zero 8 + .type p_map_block_ver_table, %object + .size p_map_block_ver_table, 8 +p_map_block_ver_table: + .zero 8 + .type p_l2p_ram_map, %object + .size p_l2p_ram_map, 8 +p_l2p_ram_map: + .zero 8 + .type p_l2p_map_buf, %object + .size p_l2p_map_buf, 8 +p_l2p_map_buf: + .zero 8 + .type p_data_block_list_table, %object + .size p_data_block_list_table, 8 +p_data_block_list_table: + .zero 8 + .type c_ftl_nand_bbm_buf_size, %object + .size c_ftl_nand_bbm_buf_size, 2 +c_ftl_nand_bbm_buf_size: + .zero 2 + .zero 6 + .type gBbtInfo, %object + .size gBbtInfo, 96 +gBbtInfo: + .zero 96 + .type g_totle_vendor_block, %object + .size g_totle_vendor_block, 2 +g_totle_vendor_block: + .zero 2 + .zero 2 + .type g_MaxLpn, %object + .size g_MaxLpn, 4 +g_MaxLpn: + .zero 4 + .type g_flash_read_only_en, %object + .size g_flash_read_only_en, 4 +g_flash_read_only_en: + .zero 4 + .zero 4 + .type req_sys, %object + .size req_sys, 56 +req_sys: + .zero 56 + .type gSysFreeQueue, %object + .size gSysFreeQueue, 2056 +gSysFreeQueue: + .zero 2056 + .type g_sys_save_data, %object + .size g_sys_save_data, 48 +g_sys_save_data: + .zero 48 + .type p_data_block_list_head, %object + .size p_data_block_list_head, 8 +p_data_block_list_head: + .zero 8 + .type p_data_block_list_tail, %object + .size p_data_block_list_tail, 8 +p_data_block_list_tail: + .zero 8 + .type g_num_data_superblocks, %object + .size g_num_data_superblocks, 2 +g_num_data_superblocks: + .zero 2 + .zero 6 + .type p_free_data_block_list_head, %object + .size p_free_data_block_list_head, 8 +p_free_data_block_list_head: + .zero 8 + .type g_num_free_superblocks, %object + .size g_num_free_superblocks, 2 +g_num_free_superblocks: + .zero 2 + .zero 6 + .type g_active_superblock, %object + .size g_active_superblock, 48 +g_active_superblock: + .zero 48 + .type g_buffer_superblock, %object + .size g_buffer_superblock, 48 +g_buffer_superblock: + .zero 48 + .type g_gc_temp_superblock, %object + .size g_gc_temp_superblock, 48 +g_gc_temp_superblock: + .zero 48 + .type gL2pMapInfo, %object + .size gL2pMapInfo, 64 +gL2pMapInfo: + .zero 64 + .type g_l2p_last_update_region_id, %object + .size g_l2p_last_update_region_id, 2 +g_l2p_last_update_region_id: + .zero 2 + .zero 6 + .type gVendorBlkInfo, %object + .size gVendorBlkInfo, 64 +gVendorBlkInfo: + .zero 64 + .type FtlUpdateVaildLpnCount, %object + .size FtlUpdateVaildLpnCount, 2 +FtlUpdateVaildLpnCount: + .zero 2 + .zero 2 + .type g_VaildLpn, %object + .size g_VaildLpn, 4 +g_VaildLpn: + .zero 4 + .type gSysInfo, %object + .size gSysInfo, 16 +gSysInfo: + .zero 16 + .type g_totle_map_block, %object + .size g_totle_map_block, 2 +g_totle_map_block: + .zero 2 + .zero 2 + .type g_MaxLbn, %object + .size g_MaxLbn, 4 +g_MaxLbn: + .zero 4 + .type c_ftl_nand_data_op_blks_per_plane, %object + .size c_ftl_nand_data_op_blks_per_plane, 2 +c_ftl_nand_data_op_blks_per_plane: + .zero 2 + .zero 6 + .type g_gc_superblock, %object + .size g_gc_superblock, 48 +g_gc_superblock: + .zero 48 + .type g_sys_ext_data, %object + .size g_sys_ext_data, 512 +g_sys_ext_data: + .zero 512 + .type g_totle_write_sector, %object + .size g_totle_write_sector, 4 +g_totle_write_sector: + .zero 4 + .type g_totle_read_sector, %object + .size g_totle_read_sector, 4 +g_totle_read_sector: + .zero 4 + .type g_ect_tbl_power_up_flush, %object + .size g_ect_tbl_power_up_flush, 2 +g_ect_tbl_power_up_flush: + .zero 2 + .zero 2 + .type g_totle_avg_erase_count, %object + .size g_totle_avg_erase_count, 4 +g_totle_avg_erase_count: + .zero 4 + .type g_gc_num_req, %object + .size g_gc_num_req, 4 +g_gc_num_req: + .zero 4 + .zero 4 + .type g_req_cache, %object + .size g_req_cache, 8 +g_req_cache: + .zero 8 + .type g_tmp_data_superblock_id, %object + .size g_tmp_data_superblock_id, 2 +g_tmp_data_superblock_id: + .zero 2 + .zero 2 + .type g_totle_swl_count, %object + .size g_totle_swl_count, 4 +g_totle_swl_count: + .zero 4 + .type ftl_gc_temp_power_lost_recovery_flag, %object + .size ftl_gc_temp_power_lost_recovery_flag, 4 +ftl_gc_temp_power_lost_recovery_flag: + .zero 4 + .type g_recovery_page_min_ver, %object + .size g_recovery_page_min_ver, 4 +g_recovery_page_min_ver: + .zero 4 + .type g_gc_blk_num, %object + .size g_gc_blk_num, 2 +g_gc_blk_num: + .zero 2 + .type g_gc_page_offset, %object + .size g_gc_page_offset, 2 +g_gc_page_offset: + .zero 2 + .zero 4 + .type g_gc_bad_block_temp_tbl, %object + .size g_gc_bad_block_temp_tbl, 34 +g_gc_bad_block_temp_tbl: + .zero 34 + .type g_power_lost_ecc_error_blk, %object + .size g_power_lost_ecc_error_blk, 2 +g_power_lost_ecc_error_blk: + .zero 2 + .type g_power_lost_recovery_flag, %object + .size g_power_lost_recovery_flag, 2 +g_power_lost_recovery_flag: + .zero 2 + .zero 2 + .type g_recovery_page_num, %object + .size g_recovery_page_num, 4 +g_recovery_page_num: + .zero 4 + .zero 4 + .type g_recovery_ppa_tbl, %object + .size g_recovery_ppa_tbl, 128 +g_recovery_ppa_tbl: + .zero 128 + .type gc_ink_free_return_value, %object + .size gc_ink_free_return_value, 2 +gc_ink_free_return_value: + .zero 2 + .type g_gc_cur_blk_valid_pages, %object + .size g_gc_cur_blk_valid_pages, 2 +g_gc_cur_blk_valid_pages: + .zero 2 + .type g_gc_cur_blk_max_valid_pages, %object + .size g_gc_cur_blk_max_valid_pages, 2 +g_gc_cur_blk_max_valid_pages: + .zero 2 + .zero 2 + .type gp_last_act_superblock, %object + .size gp_last_act_superblock, 8 +gp_last_act_superblock: + .zero 8 + .type gc_discard_updated, %object + .size gc_discard_updated, 4 +gc_discard_updated: + .zero 4 + .type g_LowFormat, %object + .size g_LowFormat, 4 +g_LowFormat: + .zero 4 + .type g_ftl_nand_free_count, %object + .size g_ftl_nand_free_count, 4 +g_ftl_nand_free_count: + .zero 4 + .type last_cache_match_count, %object + .size last_cache_match_count, 4 +last_cache_match_count: + .zero 4 + .type check_valid_page_count_table, %object + .size check_valid_page_count_table, 8192 +check_valid_page_count_table: + .zero 8192 + .type g_gc_refresh_block_temp_tbl, %object + .size g_gc_refresh_block_temp_tbl, 34 +g_gc_refresh_block_temp_tbl: + .zero 34 + .zero 2 + .type gToggleModeClkDiv, %object + .size gToggleModeClkDiv, 4 +gToggleModeClkDiv: + .zero 4 + .type gpNandc1, %object + .size gpNandc1, 8 +gpNandc1: + .zero 8 + .type gNandFlashResEndPageAddr, %object + .size gNandFlashResEndPageAddr, 4 +gNandFlashResEndPageAddr: + .zero 4 + .type gNandFlashInfoBlockEcc, %object + .size gNandFlashInfoBlockEcc, 1 +gNandFlashInfoBlockEcc: + .zero 1 + .type gFlashOnfiModeEn, %object + .size gFlashOnfiModeEn, 1 +gFlashOnfiModeEn: + .zero 1 + .type gFlashSdrModeEn, %object + .size gFlashSdrModeEn, 1 +gFlashSdrModeEn: + .zero 1 + .section .rodata.str1.1,"aMS",@progbits,1 +.LC0: + .string "BBT:" +.LC1: + .string "FlashEraseBlocks pageAddr error %x\n" +.LC2: + .string "otp error! %d" +.LC3: + .string "rr" +.LC4: + .string "%d statReg->V6.mtrans_cnt=%d flReg.V6.page_num=%d\n" +.LC5: + .string "nandc:" +.LC6: + .string "%d flReg.d32=%x %x\n" +.LC7: + .string "sdr read ok %x ecc=%d\n" +.LC8: + .string "sync para %d\n" +.LC9: + .string "TOG mode Read error %x %x\n" +.LC10: + .string "read retry status %x %x %x\n" +.LC11: + .string "micron RR %d row=%x,count %d,status=%d\n" +.LC12: + .string "samsung RR %d row=%x,count %d,status=%d\n" +.LC13: + .string "ECC:%d\n" +.LC14: + .string "No.%d FLASH ID:%x %x %x %x %x %x\n" +.LC15: + .string "FlashLoadPhyInfo fail %x!!\n" +.LC16: + .string "Read pageadd=%x ecc=%x err=%x\n" +.LC17: + .string "data:" +.LC18: + .string "spare:" +.LC19: + .string "ReadRetry pageadd=%x ecc=%x err=%x\n" +.LC20: + .string "FLFB:%d %d\n" +.LC21: + .string "prog error: = %x\n" +.LC22: + .string "prog read error: = %x\n" +.LC23: + .string "prog read REFRESH: = %x\n" +.LC24: + .string "prog read s error: = %x %x %x\n" +.LC25: + .string "prog read d error: = %x %x %x\n" +.LC26: + .string "FlashMakeFactorBbt %d\n" +.LC27: + .string "bad block:%d %d\n" +.LC28: + .string "FMFB:%d %d\n" +.LC29: + .string "E:bad block:%d\n" +.LC30: + .string "FMFB:Save %d %d\n" +.LC31: + .string "%s error allocating memory. return -1\n" +.LC32: + .string "phyBlk = 0x%x die = %d block_in_die = 0x%x 0x%8x\n" +.LC33: + .string "FtlBbmTblFlush id=%x,page=%x,previd=%x cnt=%d\n" +.LC34: + .string "FtlBbmTblFlush error:%x\n" +.LC35: + .string "FtlBbmTblFlush error = %x error count = %d\n" +.LC36: + .string "FtlFreeSysBlkQueueOut free count = %d\n" +.LC37: + .string "FtlFreeSysBlkQueueOut = %x, free count = %d, error\n" +.LC38: + .string "FtlFreeSysBlkQueueOut = %x, free count = %d\n" +.LC39: + .string "FtlMapWritePage error = %x\n" +.LC40: + .string "FtlMapWritePage error = %x error count = %d\n" +.LC41: + .string "page map lost: %x %x\n" +.LC42: + .string "region_id = %x phyAddr = %x\n" +.LC43: + .string "map_ppn:" +.LC44: + .string "load_l2p_region refresh = %x phyAddr = %x\n" +.LC45: + .string "FtlVendorPartRead refresh = %x phyAddr = %x\n" +.LC46: + .string "FtlVpcTblFlush error = %x error count = %d\n" +.LC47: + .string "no ect" +.LC48: + .string "%s\n" +.LC49: + .string "...%s enter...\n" +.LC50: + .string "FtlCheckVpc2 %x = %x %x\n" +.LC51: + .string "free blk vpc error %x = %x %x\n" +.LC52: + .string "error_flag %x\n" +.LC53: + .string "id = %x,%x addr= %x,spare= %x %x %x %x data = %x\n" +.LC54: + .string ":" +.LC55: + .string "Ftlscanalldata = %x\n" +.LC56: + .string "scan lpa = %x ppa= %x\n" +.LC57: + .string "lba = %x,addr= %x,spare= %x %x %x %x data=%x %x\n" +.LC58: + .string "phyBlk = %x,addr= %x,spare= %x %x %x %x data=%x %x\n" +.LC59: + .string "id = %x,%x addr= %x,spare= %x %x %x %x data=%x %x\n" +.LC60: + .string "Mblk:" +.LC61: + .string "L2P:" +.LC62: + .string "L2PC:" +.LC63: + .string "id = %x,%x addr= %x,spare= %x %x %x %x data= %x\n" +.LC64: + .string "superBlkID = %x vpc=%x\n" +.LC65: + .string "flashmode = %x pagenum = %x %x\n" +.LC66: + .string "blk = %x vpc=%x mode = %x\n" +.LC67: + .string "mlc id = %x,%x addr= %x,spare= %x %x %x %x data=%x %x\n" +.LC68: + .string "slc id = %x,%x addr= %x,spare= %x %x %x %x data=%x %x\n" +.LC69: + .string "slc mode" +.LC70: + .string "ftl_scan_all_ppa blk %x page %x flag: %x\n" +.LC71: + .string "ftl_scan_all_ppa blk %x page %x flag: %x ............... is bad block\n" +.LC72: + .string "addr= %x, status= %d,spare= %x %x %x %x data=%x %x\n" +.LC73: + .string "%s finished\n" +.LC74: + .string "FLASH INFO:\n" +.LC75: + .string "FLASH ID: %x\n" +.LC76: + .string "Device Capacity: %d MB\n" +.LC77: + .string "FMWAIT: %x %x %x %x\n" +.LC78: + .string "FTL INFO:\n" +.LC79: + .string "g_MaxLpn = 0x%x\n" +.LC80: + .string "g_VaildLpn = 0x%x\n" +.LC81: + .string "read_page_count = 0x%x\n" +.LC82: + .string "discard_page_count = 0x%x\n" +.LC83: + .string "write_page_count = 0x%x\n" +.LC84: + .string "cache_write_count = 0x%x\n" +.LC85: + .string "l2p_write_count = 0x%x\n" +.LC86: + .string "gc_page_count = 0x%x\n" +.LC87: + .string "totle_write = %d MB\n" +.LC88: + .string "totle_read = %d MB\n" +.LC89: + .string "GSV = 0x%x\n" +.LC90: + .string "GDV = 0x%x\n" +.LC91: + .string "bad blk num = %d %d\n" +.LC92: + .string "free_superblocks = 0x%x\n" +.LC93: + .string "mlc_EC = 0x%x\n" +.LC94: + .string "slc_EC = 0x%x\n" +.LC95: + .string "avg_EC = 0x%x\n" +.LC96: + .string "sys_EC = 0x%x\n" +.LC97: + .string "max_EC = 0x%x\n" +.LC98: + .string "min_EC = 0x%x\n" +.LC99: + .string "PLT = 0x%x\n" +.LC100: + .string "POT = 0x%x\n" +.LC101: + .string "MaxSector = 0x%x\n" +.LC102: + .string "init_sys_blks_pp = 0x%x\n" +.LC103: + .string "sys_blks_pp = 0x%x\n" +.LC104: + .string "free sysblock = 0x%x\n" +.LC105: + .string "data_blks_pp = 0x%x\n" +.LC106: + .string "data_op_blks_pp = 0x%x\n" +.LC107: + .string "max_data_blks = 0x%x\n" +.LC108: + .string "Sys.id = 0x%x\n" +.LC109: + .string "Bbt.id = 0x%x\n" +.LC110: + .string "ACT.page = 0x%x\n" +.LC111: + .string "ACT.plane = 0x%x\n" +.LC112: + .string "ACT.id = 0x%x\n" +.LC113: + .string "ACT.mode = 0x%x\n" +.LC114: + .string "ACT.a_pages = 0x%x\n" +.LC115: + .string "ACT VPC = 0x%x\n" +.LC116: + .string "BUF.page = 0x%x\n" +.LC117: + .string "BUF.plane = 0x%x\n" +.LC118: + .string "BUF.id = 0x%x\n" +.LC119: + .string "BUF.mode = 0x%x\n" +.LC120: + .string "BUF.a_pages = 0x%x\n" +.LC121: + .string "BUF VPC = 0x%x\n" +.LC122: + .string "TMP.page = 0x%x\n" +.LC123: + .string "TMP.plane = 0x%x\n" +.LC124: + .string "TMP.id = 0x%x\n" +.LC125: + .string "TMP.mode = 0x%x\n" +.LC126: + .string "TMP.a_pages = 0x%x\n" +.LC127: + .string "GC.page = 0x%x\n" +.LC128: + .string "GC.plane = 0x%x\n" +.LC129: + .string "GC.id = 0x%x\n" +.LC130: + .string "GC.mode = 0x%x\n" +.LC131: + .string "GC.a_pages = 0x%x\n" +.LC132: + .string "WR_CHK = 0x%x %x %x %x\n" +.LC133: + .string "Read Err = 0x%x\n" +.LC134: + .string "Prog Err = 0x%x\n" +.LC135: + .string "gc_free_blk_th= 0x%x\n" +.LC136: + .string "gc_merge_free_blk_th= 0x%x\n" +.LC137: + .string "gc_skip_write_count= 0x%x\n" +.LC138: + .string "gc_blk_index= 0x%x\n" +.LC139: + .string "free min EC= 0x%x\n" +.LC140: + .string "free max EC= 0x%x\n" +.LC141: + .string "GC__SB VPC = 0x%x\n" +.LC142: + .string "%d. [0x%x]=0x%x 0x%x 0x%x\n" +.LC143: + .string "free %d. [0x%x] 0x%x 0x%x\n" +.LC144: + .string "FTL version: 5.0.63 20210616" +.LC145: + .string "swblk %x ,avg = %x max= %x vpc= %x,ec=%x ,max ec=%x\n" +.LC146: + .string "FtlGcScanTempBlk Error ID %x %x!!!!!!! \n" +.LC147: + .string "FtlGcScanTempBlkError ID %x %x!!!!!!!\n" +.LC148: + .string "FtlGcRefreshBlock 0x%x\n" +.LC149: + .string "FtlGcMarkBadPhyBlk %d 0x%x\n" +.LC150: + .string "FtlGcFreeBadSuperBlk 0x%x\n" +.LC151: + .string "decrement_vpc_count %x = %d\n" +.LC152: + .string "decrement_vpc_count %x = %d in free list\n" +.LC153: + .string "RSB refresh addr %x\n" +.LC154: + .string "spuer block %x vpn is 0\n " +.LC155: + .string "g_recovery_ppa %x ver %x\n " +.LC156: + .string "FtlCheckVpc %x = %x %x\n" +.LC157: + .string "%d GC datablk = %x vpc %x %x\n" +.LC158: + .string "SWL %x, FSB = %x vpc= %x,ec=%x th=%x\n" +.LC159: + .string "Ftlwrite decrement_vpc_count %x = %d\n" +.LC160: + .string "GC des block %x done\n" +.LC161: + .string "too many bad block = %d %d\n" +.LC162: + .string "...%s: no bad block mapping table, format device\n" +.LC163: + .string "...%s FtlSysBlkInit error ,format device!\n" +.LC164: + .string "FtlWrite: lpa error:%x %x\n" +.LC165: + .string "fix power lost blk = %x vpc=%x\n" +.LC166: + .string "erase power lost blk = %x vpc=%x\n" diff --git a/drivers/rk_nand/rk_helpers.S b/drivers/rk_nand/rk_helpers.S new file mode 100644 index 00000000000..df2d9a59e22 --- /dev/null +++ b/drivers/rk_nand/rk_helpers.S @@ -0,0 +1,54 @@ + .arch armv7-a + .eabi_attribute 20, 1 + .eabi_attribute 21, 1 + .eabi_attribute 23, 3 + .eabi_attribute 24, 1 + .eabi_attribute 25, 1 + .eabi_attribute 26, 2 + .eabi_attribute 30, 2 + .eabi_attribute 34, 1 + .eabi_attribute 18, 2 + .file "rk_helpers.c" + .text + .syntax divided + .syntax unified + .arm + .syntax unified + .align 2 + .global rk_printk + .syntax unified + .arm + .fpu softvfp + .type rk_printk, %function +rk_printk: + @ args = 4, pretend = 16, frame = 0 + @ frame_needed = 1, uses_anonymous_args = 1 + mov ip, sp + push {r0, r1, r2, r3} + push {fp, ip, lr, pc} + sub fp, ip, #20 + push {lr} + bl __gnu_mcount_nc + sub sp, fp, #12 + ldmfd sp, {fp, sp, pc} + .size rk_printk, .-rk_printk + .align 2 + .global rk_usleep_range + .syntax unified + .arm + .fpu softvfp + .type rk_usleep_range, %function +rk_usleep_range: + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 1, uses_anonymous_args = 0 + mov ip, sp + push {fp, ip, lr, pc} + sub fp, ip, #4 + push {lr} + bl __gnu_mcount_nc + mov r2, #2 + bl usleep_range_state + ldmfd sp, {fp, sp, pc} + .size rk_usleep_range, .-rk_usleep_range + .ident "GCC: (GNU Toolchain for the A-profile Architecture 8.3-2019.03 (arm-rel-8.36)) 8.3.0" + .section .note.GNU-stack,"",%progbits diff --git a/drivers/rk_nand/rk_helpers.c b/drivers/rk_nand/rk_helpers.c new file mode 100644 index 00000000000..1b7a32ef273 --- /dev/null +++ b/drivers/rk_nand/rk_helpers.c @@ -0,0 +1,26 @@ +#include +#include +#include + +int rk_printk(const char *format, ...) { + + char buffer[80]; + va_list va_args; + int ret; + + va_start(va_args, format); + ret = vsnprintf(buffer, sizeof(buffer), format, va_args); + va_end(va_args); + + printk(buffer); + + return ret; + +} + +void rk_usleep_range(unsigned long min, unsigned long max) { + +// usleep_range(min, max); + udelay(min); + +} diff --git a/drivers/rk_nand/rk_nand_base.c b/drivers/rk_nand/rk_nand_base.c new file mode 100644 index 00000000000..9d5e2fb02ba --- /dev/null +++ b/drivers/rk_nand/rk_nand_base.c @@ -0,0 +1,456 @@ +/* + * Copyright (c) 2016, Fuzhou Rockchip Electronics Co., Ltd + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#ifdef CONFIG_OF +#include +#endif +#include +#include +#include +#include +#include + +#include "rk_nand_blk.h" +#include "rk_ftl_api.h" +#include "rk_nand_base.h" + +#define RKNAND_VERSION_AND_DATE "rknandbase v1.2 2021-01-07" + +static struct rk_nandc_info g_nandc_info[2]; +struct device *g_nand_device; +static char nand_idb_data[2048]; +static int rk_nand_wait_busy_schedule; +static int rk_nand_suspend_state; +static int rk_nand_shutdown_state; +/*1:flash 2:emmc 4:sdcard0 8:sdcard1*/ +static int rknand_boot_media = 2; +static DECLARE_WAIT_QUEUE_HEAD(rk29_nandc_wait); +static void rk_nand_iqr_timeout_hack(struct timer_list *unused); +static DEFINE_TIMER(rk_nand_iqr_timeout, rk_nand_iqr_timeout_hack); +static int nandc0_xfer_completed_flag; +static int nandc0_ready_completed_flag; +static int nandc1_xfer_completed_flag; +static int nandc1_ready_completed_flag; +static int rk_timer_add; + +void *ftl_malloc(int size) +{ + return kmalloc(size, GFP_KERNEL | GFP_DMA); +} + +void ftl_free(void *buf) +{ + kfree(buf); +} + +int rknand_get_clk_rate(int nandc_id) +{ + return g_nandc_info[nandc_id].clk_rate; +} +EXPORT_SYMBOL(rknand_get_clk_rate); + +unsigned long rknand_dma_map_single(unsigned long ptr, int size, int dir) +{ + return dma_map_single(g_nand_device, (void *)ptr, size + , dir ? DMA_TO_DEVICE : DMA_FROM_DEVICE); +} +EXPORT_SYMBOL(rknand_dma_map_single); + +void rknand_dma_unmap_single(unsigned long ptr, int size, int dir) +{ + dma_unmap_single(g_nand_device, (dma_addr_t)ptr, size + , dir ? DMA_TO_DEVICE : DMA_FROM_DEVICE); +} +EXPORT_SYMBOL(rknand_dma_unmap_single); + +int rknand_flash_cs_init(int id) +{ + return 0; +} +EXPORT_SYMBOL(rknand_flash_cs_init); + +int rknand_get_reg_addr(unsigned long *p_nandc0, unsigned long *p_nandc1) +{ + *p_nandc0 = (unsigned long)g_nandc_info[0].reg_base; + *p_nandc1 = (unsigned long)g_nandc_info[1].reg_base; + return 0; +} +EXPORT_SYMBOL(rknand_get_reg_addr); + +int rknand_get_boot_media(void) +{ + return rknand_boot_media; +} +EXPORT_SYMBOL(rknand_get_boot_media); + +unsigned long rk_copy_from_user(void *to, const void __user *from, + unsigned long n) +{ + return copy_from_user(to, from, n); +} + +unsigned long rk_copy_to_user(void __user *to, const void *from, + unsigned long n) +{ + return copy_to_user(to, from, n); +} + +static const struct file_operations rknand_sys_storage_fops = { + .compat_ioctl = rknand_sys_storage_ioctl, + .unlocked_ioctl = rknand_sys_storage_ioctl, +}; + +static struct miscdevice rknand_sys_storage_dev = { + .minor = MISC_DYNAMIC_MINOR, + .name = "rknand_sys_storage", + .fops = &rknand_sys_storage_fops, +}; + +int rknand_sys_storage_init(void) +{ + return misc_register(&rknand_sys_storage_dev); +} + +static const struct file_operations rknand_vendor_storage_fops = { + .compat_ioctl = rk_ftl_vendor_storage_ioctl, + .unlocked_ioctl = rk_ftl_vendor_storage_ioctl, +}; + +static struct miscdevice rknand_vender_storage_dev = { + .minor = MISC_DYNAMIC_MINOR, + .name = "vendor_storage", + .fops = &rknand_vendor_storage_fops, +}; + +int rknand_vendor_storage_init(void) +{ + return misc_register(&rknand_vender_storage_dev); +} + +int rk_nand_schedule_enable_config(int en) +{ + int tmp = rk_nand_wait_busy_schedule; + + rk_nand_wait_busy_schedule = en; + return tmp; +} + +static void rk_nand_iqr_timeout_hack(struct timer_list *unused) +{ + del_timer(&rk_nand_iqr_timeout); + rk_timer_add = 0; + nandc0_xfer_completed_flag = 1; + nandc0_ready_completed_flag = 1; + nandc1_xfer_completed_flag = 1; + nandc1_ready_completed_flag = 1; + wake_up(&rk29_nandc_wait); +} + +static void rk_add_timer(void) +{ + if (rk_timer_add == 0) { + rk_timer_add = 1; + rk_nand_iqr_timeout.expires = jiffies + HZ / 50; + add_timer(&rk_nand_iqr_timeout); + } +} + +static void rk_del_timer(void) +{ + if (rk_timer_add) + del_timer(&rk_nand_iqr_timeout); + rk_timer_add = 0; +} + +static irqreturn_t rk_nandc_interrupt(int irq, void *dev_id) +{ + unsigned int irq_status = rk_nandc_get_irq_status(dev_id); + + if (irq_status & (1 << 0)) { + rk_nandc_flash_xfer_completed(dev_id); + if (dev_id == g_nandc_info[0].reg_base) + nandc0_xfer_completed_flag = 1; + else + nandc1_xfer_completed_flag = 1; + } + + if (irq_status & (1 << 1)) { + rk_nandc_flash_ready(dev_id); + if (dev_id == g_nandc_info[0].reg_base) + nandc0_ready_completed_flag = 1; + else + nandc1_ready_completed_flag = 1; + } + + wake_up(&rk29_nandc_wait); + return IRQ_HANDLED; +} + +void rk_nandc_xfer_irq_flag_init(void *nandc_reg) +{ + if (nandc_reg == g_nandc_info[0].reg_base) + nandc0_xfer_completed_flag = 0; + else + nandc1_xfer_completed_flag = 0; +} + +void rk_nandc_rb_irq_flag_init(void *nandc_reg) +{ + if (nandc_reg == g_nandc_info[0].reg_base) + nandc0_ready_completed_flag = 0; + else + nandc1_ready_completed_flag = 0; +} + +void wait_for_nandc_xfer_completed(void *nandc_reg) +{ + if (rk_nand_wait_busy_schedule) { + rk_add_timer(); + if (nandc_reg == g_nandc_info[0].reg_base) + wait_event(rk29_nandc_wait, nandc0_xfer_completed_flag); + else + wait_event(rk29_nandc_wait, nandc1_xfer_completed_flag); + rk_del_timer(); + } + if (nandc_reg == g_nandc_info[0].reg_base) + nandc0_xfer_completed_flag = 0; + else + nandc1_xfer_completed_flag = 0; +} + +void wait_for_nand_flash_ready(void *nandc_reg) +{ + if (rk_nand_wait_busy_schedule) { + rk_add_timer(); + if (nandc_reg == g_nandc_info[0].reg_base) + wait_event(rk29_nandc_wait + , nandc0_ready_completed_flag); + else + wait_event(rk29_nandc_wait + , nandc1_ready_completed_flag); + rk_del_timer(); + } + if (nandc_reg == g_nandc_info[0].reg_base) + nandc0_ready_completed_flag = 0; + else + nandc1_ready_completed_flag = 0; +} + +static int rk_nandc_irq_config(int id, int mode, void *pfun) +{ + int ret = 0; + int irq = g_nandc_info[id].irq; + + if (mode) + ret = request_irq(irq, pfun, 0, "nandc" + , g_nandc_info[id].reg_base); + else + free_irq(irq, NULL); + return ret; +} + +int rk_nandc_irq_init(void) +{ + int ret = 0; + + rk_timer_add = 0; + nandc0_ready_completed_flag = 0; + nandc0_xfer_completed_flag = 0; + ret = rk_nandc_irq_config(0, 1, rk_nandc_interrupt); + + if (!g_nandc_info[1].reg_base) { + nandc1_ready_completed_flag = 0; + nandc1_xfer_completed_flag = 0; + rk_nandc_irq_config(1, 1, rk_nandc_interrupt); + } + return ret; +} + +int rk_nandc_irq_deinit(void) +{ + rk_nandc_irq_config(0, 0, rk_nandc_interrupt); + if (!g_nandc_info[1].reg_base) + rk_nandc_irq_config(1, 0, rk_nandc_interrupt); + return 0; +} + +static int rknand_probe(struct platform_device *pdev) +{ + unsigned int id = 0; + int irq; + struct resource *mem; + void __iomem *membase; + + g_nand_device = &pdev->dev; + mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); + membase = devm_ioremap_resource(&pdev->dev, mem); + if (!membase) { + dev_err(&pdev->dev, "no reg resource?\n"); + return -1; + } + + #ifdef CONFIG_OF + of_property_read_u32(pdev->dev.of_node, "nandc_id", &id); + pdev->id = id; + #endif + + if (id == 0) { + memcpy(nand_idb_data, membase + 0x1000, 0x800); + if (*(int *)(&nand_idb_data[0]) == 0x44535953) { + rknand_boot_media = *(int *)(&nand_idb_data[8]); + if (rknand_boot_media == 2) /*boot from emmc*/ + return -1; + } + } + + irq = platform_get_irq(pdev, 0); + if (irq < 0) { + dev_err(&pdev->dev, "no irq resource?\n"); + return irq; + } + + g_nandc_info[id].id = id; + g_nandc_info[id].irq = irq; + g_nandc_info[id].reg_base = membase; + + g_nandc_info[id].hclk = devm_clk_get(&pdev->dev, "hclk_nandc"); + g_nandc_info[id].clk = devm_clk_get(&pdev->dev, "clk_nandc"); + g_nandc_info[id].gclk = devm_clk_get(&pdev->dev, "g_clk_nandc"); + + if (unlikely(IS_ERR(g_nandc_info[id].hclk))) { + dev_err(&pdev->dev, "rknand_probe get hclk error\n"); + return PTR_ERR(g_nandc_info[id].hclk); + } + + if (!(IS_ERR(g_nandc_info[id].clk))) { + clk_set_rate(g_nandc_info[id].clk, 150 * 1000 * 1000); + g_nandc_info[id].clk_rate = clk_get_rate(g_nandc_info[id].clk); + clk_prepare_enable(g_nandc_info[id].clk); + dev_info(&pdev->dev, + "rknand_probe clk rate = %d\n", + g_nandc_info[id].clk_rate); + } + + clk_prepare_enable(g_nandc_info[id].hclk); + if (!(IS_ERR(g_nandc_info[id].gclk))) + clk_prepare_enable(g_nandc_info[id].gclk); + + pm_runtime_enable(&pdev->dev); + pm_runtime_get_sync(&pdev->dev); + + return dma_set_mask(g_nand_device, DMA_BIT_MASK(32)); +} + +static int rknand_suspend(struct platform_device *pdev, pm_message_t state) +{ + if (rk_nand_suspend_state == 0) { + rk_nand_suspend_state = 1; + rknand_dev_suspend(); + } + return 0; +} + +static int rknand_resume(struct platform_device *pdev) +{ + if (rk_nand_suspend_state == 1) { + rk_nand_suspend_state = 0; + rknand_dev_resume(); + } + return 0; +} + +static void rknand_shutdown(struct platform_device *pdev) +{ + if (rk_nand_shutdown_state == 0) { + rk_nand_shutdown_state = 1; + rknand_dev_shutdown(); + } +} + +void rknand_dev_cache_flush(void) +{ + rknand_dev_flush(); +} + +static int rknand_pm_suspend(struct device *dev) +{ + if (rk_nand_suspend_state == 0) { + rk_nand_suspend_state = 1; + rknand_dev_suspend(); + pm_runtime_put(dev); + } + return 0; +} + +static int rknand_pm_resume(struct device *dev) +{ + if (rk_nand_suspend_state == 1) { + rk_nand_suspend_state = 0; + pm_runtime_get_sync(dev); + rknand_dev_resume(); + } + return 0; +} + +static const struct dev_pm_ops rknand_dev_pm_ops = { + SET_SYSTEM_SLEEP_PM_OPS(rknand_pm_suspend, rknand_pm_resume) +}; + +#ifdef CONFIG_OF +static const struct of_device_id of_rk_nandc_match[] = { + {.compatible = "rockchip,rk-nandc"}, + {.compatible = "rockchip,rk-nandc-v9"}, + {} +}; +#endif + +static struct platform_driver rknand_driver = { + .probe = rknand_probe, + .suspend = rknand_suspend, + .resume = rknand_resume, + .shutdown = rknand_shutdown, + .driver = { + .name = "rknand", +#ifdef CONFIG_OF + .of_match_table = of_rk_nandc_match, +#endif + .pm = &rknand_dev_pm_ops, + }, +}; + +static void __exit rknand_driver_exit(void) +{ + rknand_dev_exit(); + platform_driver_unregister(&rknand_driver); +} + +static int __init rknand_driver_init(void) +{ + int ret = 0; + + pr_err("%s\n", RKNAND_VERSION_AND_DATE); + ret = platform_driver_register(&rknand_driver); + if (ret == 0) + ret = rknand_dev_init(); + return ret; +} + +module_init(rknand_driver_init); +module_exit(rknand_driver_exit); +MODULE_ALIAS("rknand"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/rk_nand/rk_nand_base.h b/drivers/rk_nand/rk_nand_base.h new file mode 100644 index 00000000000..023e58d5fc5 --- /dev/null +++ b/drivers/rk_nand/rk_nand_base.h @@ -0,0 +1,46 @@ +/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ + +/* + * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd + */ + +#ifndef __RK_NAND_BASE_H +#define __RK_NAND_BASE_H + +struct rk_nandc_info { + int id; + void __iomem *reg_base; + int irq; + int clk_rate; + struct clk *clk; /* flash clk*/ + struct clk *hclk; /* nandc clk*/ + struct clk *gclk; /* flash clk gate*/ +}; + +void *ftl_malloc(int size); +void ftl_free(void *buf); +char rknand_get_sn(char *pbuf); +char rknand_get_vendor0(char *pbuf); +char *rknand_get_idb_data(void); +int rknand_get_clk_rate(int nandc_id); +unsigned long rknand_dma_flush_dcache(unsigned long ptr, int size, int dir); +unsigned long rknand_dma_map_single(unsigned long ptr, int size, int dir); +void rknand_dma_unmap_single(unsigned long ptr, int size, int dir); +int rknand_flash_cs_init(int id); +int rknand_get_reg_addr(unsigned long *p_nandc0, unsigned long *p_nandc1); +int rknand_get_boot_media(void); +unsigned long rk_copy_from_user(void *to, const void __user *from, + unsigned long n); +unsigned long rk_copy_to_user(void __user *to, const void *from, + unsigned long n); +int rknand_sys_storage_init(void); +int rknand_vendor_storage_init(void); +int rk_nand_schedule_enable_config(int en); +void rk_nandc_xfer_irq_flag_init(void *nandc_reg); +void rk_nandc_rb_irq_flag_init(void *nandc_reg); +void wait_for_nandc_xfer_completed(void *nandc_reg); +void wait_for_nand_flash_ready(void *nandc_reg); +int rk_nandc_irq_init(void); +int rk_nandc_irq_deinit(void); +void rknand_dev_cache_flush(void); +#endif diff --git a/drivers/rk_nand/rk_nand_blk.c b/drivers/rk_nand/rk_nand_blk.c new file mode 100644 index 00000000000..5d18f18f4ed --- /dev/null +++ b/drivers/rk_nand/rk_nand_blk.c @@ -0,0 +1,626 @@ +/* + * Copyright (c) 2016, Fuzhou Rockchip Electronics Co., Ltd + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#define pr_fmt(fmt) "rk_nand: " fmt + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "rk_nand_blk.h" +#include "rk_ftl_api.h" + +#define PART_READONLY 0x85 +#define PART_WRITEONLY 0x86 +#define PART_NO_ACCESS 0x87 + +static unsigned long totle_read_data; +static unsigned long totle_write_data; +static unsigned long totle_read_count; +static unsigned long totle_write_count; +static int rk_nand_dev_initialised; +static unsigned long rk_ftl_gc_do; +static DECLARE_WAIT_QUEUE_HEAD(rknand_thread_wait); +static unsigned long rk_ftl_gc_jiffies; + +static char *mtd_read_temp_buffer; +#define MTD_RW_SECTORS (512) + +#define DISABLE_WRITE _IO('V', 0) +#define ENABLE_WRITE _IO('V', 1) +#define DISABLE_READ _IO('V', 2) +#define ENABLE_READ _IO('V', 3) +static int rknand_proc_show(struct seq_file *m, void *v) +{ + m->count = rknand_proc_ftlread(m->buf); + seq_printf(m, "Totle Read %ld KB\n", totle_read_data >> 1); + seq_printf(m, "Totle Write %ld KB\n", totle_write_data >> 1); + seq_printf(m, "totle_write_count %ld\n", totle_write_count); + seq_printf(m, "totle_read_count %ld\n", totle_read_count); + return 0; +} + +static int rknand_proc_open(struct inode *inode, struct file *file) +{ + return single_open(file, rknand_proc_show, PDE_DATA(inode)); +} + +static const struct proc_ops rknand_proc_fops = { + .proc_open = rknand_proc_open, + .proc_read = seq_read, + .proc_lseek = seq_lseek, + .proc_release = single_release, +}; + +static int rknand_create_procfs(void) +{ + struct proc_dir_entry *ent; + + ent = proc_create_data("rknand", 0444, NULL, &rknand_proc_fops, + (void *)0); + if (!ent) + return -1; + + return 0; +} + +static struct mutex g_rk_nand_ops_mutex; + +static void rknand_device_lock_init(void) +{ + mutex_init(&g_rk_nand_ops_mutex); +} + +void rknand_device_lock(void) +{ + mutex_lock(&g_rk_nand_ops_mutex); +} + +int rknand_device_trylock(void) +{ + return mutex_trylock(&g_rk_nand_ops_mutex); +} + +void rknand_device_unlock(void) +{ + mutex_unlock(&g_rk_nand_ops_mutex); +} + +static int nand_dev_transfer(struct nand_blk_dev *dev, + unsigned long start, + unsigned long nsector, char *buf, int cmd) +{ + int ret; + + if (dev->disable_access || + ((cmd == WRITE) && dev->readonly) || + ((cmd == READ) && dev->writeonly)) { + return BLK_STS_IOERR; + } + + start += dev->off_size; + + switch (cmd) { + case READ: + totle_read_data += nsector; + totle_read_count++; + ret = FtlRead(0, start, nsector, buf); + if (ret) + ret = BLK_STS_IOERR; + break; + + case WRITE: + totle_write_data += nsector; + totle_write_count++; + ret = FtlWrite(0, start, nsector, buf); + if (ret) + ret = BLK_STS_IOERR; + break; + + default: + ret = BLK_STS_IOERR; + break; + } + + return ret; +} + +int req_empty_times = 0; + +static blk_status_t do_blktrans_all_request(struct nand_blk_dev *dev, + struct request *req) +{ + unsigned long block, nsect; + char *buf = NULL; + struct req_iterator rq_iter; + struct bio_vec bvec; + int ret = BLK_STS_IOERR; + unsigned long totle_nsect; + unsigned long rq_len = 0; + + block = blk_rq_pos(req); + nsect = blk_rq_cur_bytes(req) >> 9; + totle_nsect = (req->__data_len) >> 9; + + if (blk_rq_pos(req) + blk_rq_cur_sectors(req) > + get_capacity(req->rq_disk)) + return BLK_STS_IOERR; + + switch (req_op(req)) { + case REQ_OP_FLUSH: + rk_ftl_cache_write_back(); + return BLK_STS_OK; + case REQ_OP_DISCARD: + if (FtlDiscard(block + dev->off_size, nsect)) + return BLK_STS_IOERR; + return BLK_STS_OK; + case REQ_OP_READ: + buf = mtd_read_temp_buffer; + rq_for_each_segment(bvec, req, rq_iter) { + buf = (kmap_atomic(bvec.bv_page) + bvec.bv_offset); + rq_len = bvec.bv_len; + if (rq_len) { + ret = nand_dev_transfer(dev, + block, + rq_len >> 9, + buf, REQ_OP_READ); + block += rq_len >> 9; + } + kunmap_atomic(buf); + } + + if (ret) + return BLK_STS_IOERR; + else + return BLK_STS_OK; + case REQ_OP_WRITE: + rq_for_each_segment(bvec, req, rq_iter) { + buf = (kmap_atomic(bvec.bv_page) + bvec.bv_offset); + rq_len = bvec.bv_len; + if (rq_len) { + ret = nand_dev_transfer(dev, + block, + rq_len >> 9, + buf, REQ_OP_WRITE); + block += rq_len >> 9; + } + kunmap_atomic(buf); + } + if (ret) + return BLK_STS_IOERR; + else + return BLK_STS_OK; + + default: + return BLK_STS_IOERR; + } +} + +static blk_status_t rk_nand_queue_rq(struct blk_mq_hw_ctx *hctx, + const struct blk_mq_queue_data *bd) +{ + struct nand_blk_dev *dev; + blk_status_t res; + + dev = hctx->queue->queuedata; + if (!dev) { + return BLK_STS_IOERR; + } + + rk_ftl_gc_do = 0; + + blk_mq_start_request(bd->rq); + rknand_device_lock(); + res = do_blktrans_all_request(dev, bd->rq); + rknand_device_unlock(); + if (!blk_update_request(bd->rq, res, bd->rq->__data_len)) { + __blk_mq_end_request(bd->rq, res); + } + + /* wake up gc thread */ + rk_ftl_gc_do = 1; + wake_up(&dev->nand_ops->thread_wq); + + return res; +} + +static const struct blk_mq_ops rk_nand_mq_ops = { + .queue_rq = rk_nand_queue_rq, +}; + +static int nand_gc_thread(void *arg) +{ + struct nand_blk_ops *nand_ops = arg; + int ftl_gc_status = 0; + int gc_done_times = 0; + + rk_ftl_gc_jiffies = HZ / 10; + rk_ftl_gc_do = 1; + + while (!nand_ops->quit) { + DECLARE_WAITQUEUE(wait, current); + + add_wait_queue(&nand_ops->thread_wq, &wait); + set_current_state(TASK_INTERRUPTIBLE); + + pr_info("garbage collection cycle\n"); + + if (rk_ftl_gc_do) { + /* do garbage collect at idle state */ + if (rknand_device_trylock()) { + pr_info("doing garbage collection\n"); + ftl_gc_status = rk_ftl_garbage_collect(1, 0); + rknand_device_unlock(); + rk_ftl_gc_jiffies = HZ / 50; + if (ftl_gc_status == 0) { + gc_done_times++; + if (gc_done_times > 10) { + rk_ftl_gc_jiffies = 10 * HZ; + } else + rk_ftl_gc_jiffies = 1 * HZ; + } else { + gc_done_times = 0; + } + } else { + rk_ftl_gc_jiffies = 1 * HZ; + } + req_empty_times++; + if (req_empty_times < 10) + rk_ftl_gc_jiffies = HZ / 50; + /* cache write back after 100ms */ + if (req_empty_times >= 5 && req_empty_times < 7) { + rknand_device_lock(); + pr_info("cache write back"); + rk_ftl_cache_write_back(); + rknand_device_unlock(); + } + } else { + req_empty_times = 0; + rk_ftl_gc_jiffies = 1 * HZ; + } + wait_event_timeout(nand_ops->thread_wq, nand_ops->quit, + rk_ftl_gc_jiffies); + remove_wait_queue(&nand_ops->thread_wq, &wait); + continue; + } + pr_info("nand gc quited\n"); + nand_ops->nand_th_quited = 1; + complete_and_exit(&nand_ops->thread_exit, 0); + return 0; +} + +static int rknand_open(struct block_device *bdev, fmode_t mode) +{ + return 0; +} + +static void rknand_release(struct gendisk *disk, fmode_t mode) +{ +}; + +static int rknand_ioctl(struct block_device *bdev, fmode_t mode, + unsigned int cmd, unsigned long arg) +{ + struct nand_blk_dev *dev = bdev->bd_disk->private_data; + + switch (cmd) { + case ENABLE_WRITE: + dev->disable_access = 0; + dev->readonly = 0; + set_disk_ro(dev->blkcore_priv, 0); + return 0; + + case DISABLE_WRITE: + dev->readonly = 1; + set_disk_ro(dev->blkcore_priv, 1); + return 0; + + case ENABLE_READ: + dev->disable_access = 0; + dev->writeonly = 0; + return 0; + + case DISABLE_READ: + dev->writeonly = 1; + return 0; + default: + return -ENOTTY; + } +} + +const struct block_device_operations nand_blktrans_ops = { + .owner = THIS_MODULE, + .open = rknand_open, + .release = rknand_release, + .ioctl = rknand_ioctl, +}; + +static struct nand_blk_ops mytr = { + .name = "rknand", + .major = 31, + .minorbits = 0, + .owner = THIS_MODULE, +}; + +static int nand_add_dev(struct nand_blk_ops *nand_ops, struct nand_part *part) +{ + struct nand_blk_dev *dev; + struct gendisk *gd; + + if (part->size == 0) + return -1; + + dev = kzalloc(sizeof(*dev), GFP_KERNEL); + if (!dev) + return -ENOMEM; + + gd = blk_mq_alloc_disk(nand_ops->tag_set, NULL); + if (!gd) { + kfree(dev); + return -ENOMEM; + } + + nand_ops->rq = gd->queue; + nand_ops->rq->queuedata = dev; + + blk_queue_max_hw_sectors(nand_ops->rq, MTD_RW_SECTORS); + blk_queue_max_segments(nand_ops->rq, MTD_RW_SECTORS); + + blk_queue_flag_set(QUEUE_FLAG_DISCARD, nand_ops->rq); + blk_queue_max_discard_sectors(nand_ops->rq, UINT_MAX >> 9); + /* discard_granularity config to one nand page size 32KB */ + nand_ops->rq->limits.discard_granularity = 64 << 9; + + dev->nand_ops = nand_ops; + dev->size = part->size; + dev->off_size = part->offset; + dev->devnum = nand_ops->last_dev_index; + list_add_tail(&dev->list, &nand_ops->devs); + nand_ops->last_dev_index++; + + gd->major = nand_ops->major; + gd->first_minor = (dev->devnum) << nand_ops->minorbits; + gd->minors = 1 << nand_ops->minorbits; + + gd->fops = &nand_blktrans_ops; + + gd->flags = GENHD_FL_EXT_DEVT; + gd->minors = 255; + snprintf(gd->disk_name, + sizeof(gd->disk_name), "%s%d", nand_ops->name, dev->devnum); + + set_capacity(gd, dev->size); + + gd->private_data = dev; + dev->blkcore_priv = gd; + + if (part->type == PART_NO_ACCESS) + dev->disable_access = 1; + + if (part->type == PART_READONLY) + dev->readonly = 1; + + if (part->type == PART_WRITEONLY) + dev->writeonly = 1; + + if (dev->readonly) + set_disk_ro(gd, 1); + + device_add_disk(g_nand_device, gd, NULL); + + return 0; +} + +static int nand_remove_dev(struct nand_blk_dev *dev) +{ + struct gendisk *gd; + + gd = dev->blkcore_priv; + list_del(&dev->list); + gd->queue = NULL; + del_gendisk(gd); + put_disk(gd); + kfree(dev); + + return 0; +} + +static int nand_blk_register(struct nand_blk_ops *nand_ops) +{ + struct nand_part part; + int ret; + + rk_nand_schedule_enable_config(1); + nand_ops->quit = 0; + nand_ops->nand_th_quited = 0; + + mtd_read_temp_buffer = kmalloc(MTD_RW_SECTORS * 512, + GFP_KERNEL | GFP_DMA); + + ret = register_blkdev(nand_ops->major, nand_ops->name); + if (ret) + return -1; + + init_completion(&nand_ops->thread_exit); + init_waitqueue_head(&nand_ops->thread_wq); + rknand_device_lock_init(); + + /* Create the request queue */ +// spin_lock_init(&nand_ops->queue_lock); +// INIT_LIST_HEAD(&nand_ops->rq_list); + + nand_ops->tag_set = kzalloc(sizeof(*nand_ops->tag_set), GFP_KERNEL); + if (!nand_ops->tag_set) + goto tag_set_error; + + ret = + blk_mq_alloc_sq_tag_set(nand_ops->tag_set, &rk_nand_mq_ops, 1, + BLK_MQ_F_SHOULD_MERGE | BLK_MQ_F_BLOCKING); + if (ret) + goto rq_init_error; + + INIT_LIST_HEAD(&nand_ops->devs); + kthread_run(nand_gc_thread, (void *)nand_ops, "rknand_gc"); + + nand_ops->last_dev_index = 0; + part.offset = 0; + part.size = rk_ftl_get_capacity(); + part.type = 0; + part.name[0] = 0; + nand_add_dev(nand_ops, &part); + + rknand_create_procfs(); + rk_ftl_storage_sys_init(); + + ret = rk_ftl_vendor_storage_init(); + if (!ret) { + rk_vendor_register(rk_ftl_vendor_read, rk_ftl_vendor_write); + rknand_vendor_storage_init(); + pr_info("rknand vendor storage init ok !\n"); + } else { + pr_info("rknand vendor storage init failed !\n"); + } + + return 0; + + rq_init_error: + kfree(nand_ops->tag_set); + tag_set_error: + unregister_blkdev(nand_ops->major, nand_ops->name); + + return ret; +} + +static void nand_blk_unregister(struct nand_blk_ops *nand_ops) +{ + struct list_head *this, *next; + + if (!rk_nand_dev_initialised) + return; + nand_ops->quit = 1; + wake_up(&nand_ops->thread_wq); + wait_for_completion(&nand_ops->thread_exit); + list_for_each_safe(this, next, &nand_ops->devs) { + struct nand_blk_dev *dev + = list_entry(this, struct nand_blk_dev, list); + + nand_remove_dev(dev); + } + blk_cleanup_queue(nand_ops->rq); + unregister_blkdev(nand_ops->major, nand_ops->name); +} + +void rknand_dev_flush(void) +{ + if (!rk_nand_dev_initialised) + return; + rknand_device_lock(); + rk_ftl_cache_write_back(); + rknand_device_unlock(); + pr_info("Nand flash flush ok!\n"); +} + +int __init rknand_dev_init(void) +{ + int ret; + void __iomem *nandc0; + void __iomem *nandc1; + + rknand_get_reg_addr((unsigned long *)&nandc0, (unsigned long *)&nandc1); + if (!nandc0) + return -1; + + ret = rk_ftl_init(); + if (ret) { + pr_err("rk_ftl_init fail\n"); + return -1; + } + + ret = nand_blk_register(&mytr); + if (ret) { + pr_err("nand_blk_register fail\n"); + return -1; + } + + rk_nand_dev_initialised = 1; + return ret; +} + +int rknand_dev_exit(void) +{ + if (!rk_nand_dev_initialised) + return -1; + rk_nand_dev_initialised = 0; + if (rknand_device_trylock()) { + rk_ftl_cache_write_back(); + rknand_device_unlock(); + } + nand_blk_unregister(&mytr); + rk_ftl_de_init(); + pr_info("nand_blk_dev_exit:OK\n"); + return 0; +} + +void rknand_dev_suspend(void) +{ + if (!rk_nand_dev_initialised) + return; + pr_info("rk_nand_suspend\n"); + rk_nand_schedule_enable_config(0); + rknand_device_lock(); + rk_nand_suspend(); +} + +void rknand_dev_resume(void) +{ + if (!rk_nand_dev_initialised) + return; + pr_info("rk_nand_resume\n"); + rk_nand_resume(); + rknand_device_unlock(); + rk_nand_schedule_enable_config(1); +} + +void rknand_dev_shutdown(void) +{ + pr_info("rknand_shutdown...\n"); + if (!rk_nand_dev_initialised) + return; + if (mytr.quit == 0) { + mytr.quit = 1; + wake_up(&mytr.thread_wq); + wait_for_completion(&mytr.thread_exit); + rk_ftl_de_init(); + } + pr_info("rknand_shutdown:OK\n"); +} diff --git a/drivers/rk_nand/rk_nand_blk.h b/drivers/rk_nand/rk_nand_blk.h new file mode 100644 index 00000000000..6807e401405 --- /dev/null +++ b/drivers/rk_nand/rk_nand_blk.h @@ -0,0 +1,67 @@ +/* + * Copyright (c) 2016, Fuzhou Rockchip Electronics Co., Ltd + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef __RKNAND_BLK_H +#define __RKNAND_BLK_H + +#include + +#define MAX_PART_COUNT 32 + +struct nand_part { + unsigned char name[32]; + unsigned long offset; + unsigned long size; + unsigned char type; +}; + +struct nand_blk_dev { + struct nand_blk_ops *nand_ops; + struct list_head list; + int devnum; + unsigned long size; + unsigned long off_size; + int readonly; + int writeonly; + int disable_access; + void *blkcore_priv; +}; + +struct nand_blk_ops { + char *name; + int major; + int minorbits; + int last_dev_index; + struct completion thread_exit; + int quit; + int nand_th_quited; + wait_queue_head_t thread_wq; /* thread wait queue */ + struct request_queue *rq; +// spinlock_t queue_lock; /* queue lock */ + + /* block-mq */ +// struct list_head rq_list; + struct blk_mq_tag_set *tag_set; + + struct list_head devs; + struct module *owner; +}; + +extern struct device *g_nand_device; +void rknand_dev_suspend(void); +void rknand_dev_resume(void); +void rknand_dev_shutdown(void); +void rknand_dev_flush(void); +int __init rknand_dev_init(void); +int rknand_dev_exit(void); +void rknand_device_lock(void); +int rknand_device_trylock(void); +void rknand_device_unlock(void); +int nand_blk_add_whole_disk(void); +#endif diff --git a/drivers/rk_nand/rk_zftl_arm32.S b/drivers/rk_nand/rk_zftl_arm32.S new file mode 100644 index 00000000000..850a5f04636 --- /dev/null +++ b/drivers/rk_nand/rk_zftl_arm32.S @@ -0,0 +1,37095 @@ +/* + * Copyright (c) 2016-2017, Fuzhou Rockchip Electronics Co., Ltd + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * date: 2021-07-26 + * function: rk ftl v6 for rockchip soc base on arm v7 to support 3D/2D + * TLC and MLC. + */ + .arch armv7-a + .eabi_attribute 20, 1 + .eabi_attribute 21, 1 + .eabi_attribute 23, 3 + .eabi_attribute 24, 1 + .eabi_attribute 25, 1 + .eabi_attribute 26, 2 + .eabi_attribute 30, 4 + .eabi_attribute 34, 1 + .eabi_attribute 18, 2 + .file "rk_zftl_arm_v7.c" + .syntax unified + .text + .align 2 + .fpu softvfp + .type flash_mem_cmp8, %function +flash_mem_cmp8: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + mov r3, #0 + cmp r3, r2 + bne .L10 + mov r0, #0 + bx lr +.L2: + cmp r3, r2 + bne .L5 + mov r0, #0 + ldr pc, [sp], #4 +.L10: + str lr, [sp, #-4]! + .save {lr} +.L5: + ldrb lr, [r0, r3] @ zero_extendqisi2 + ldrb ip, [r1, r3] @ zero_extendqisi2 + add r3, r3, #1 + cmp lr, ip + beq .L2 + mov r0, r3 + ldr pc, [sp], #4 + .fnend + .size flash_mem_cmp8, .-flash_mem_cmp8 + .global __aeabi_uidiv + .global __aeabi_uidivmod + .align 2 + .syntax unified + .arm + .fpu softvfp + .type slc_phy_page_address_calc, %function +slc_phy_page_address_calc: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + mov r4, r0 + ldr r5, .L22 + ldrb r3, [r5] @ zero_extendqisi2 + cmp r3, #0 + beq .L12 + ldrb r3, [r5, #1] @ zero_extendqisi2 + cmp r3, #0 + beq .L13 +.L12: + ldrh r6, [r5, #2] + mov r0, r4 + mov r1, r6 + bl __aeabi_uidiv + mov r1, r6 + mul r7, r6, r0 + mov r0, r4 + bl __aeabi_uidivmod + ldrb r3, [r5, #1] @ zero_extendqisi2 + lsl r1, r1, #1 + cmp r3, #0 + addeq r1, r5, r1 + addne r4, r1, r7 + ldrheq r4, [r1, #4] + addeq r4, r4, r7 +.L13: + mov r0, r4 + pop {r4, r5, r6, r7, r8, pc} +.L23: + .align 2 +.L22: + .word .LANCHOR0 + .fnend + .size slc_phy_page_address_calc, .-slc_phy_page_address_calc + .align 2 + .global zftl_nandc_get_irq_status + .syntax unified + .arm + .fpu softvfp + .type zftl_nandc_get_irq_status, %function +zftl_nandc_get_irq_status: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L27 + ldrb r3, [r3, #1028] @ zero_extendqisi2 + cmp r3, #9 + ldreq r0, [r0, #296] + ldrne r0, [r0, #372] + bx lr +.L28: + .align 2 +.L27: + .word .LANCHOR0 + .fnend + .size zftl_nandc_get_irq_status, .-zftl_nandc_get_irq_status + .section .text.unlikely,"ax",%progbits + .align 2 + .syntax unified + .arm + .fpu softvfp + .type isxdigit, %function +isxdigit: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + bic r3, r0, #32 + sub r3, r3, #65 + cmp r3, #25 + bls .L31 + sub r0, r0, #48 + cmp r0, #9 + movhi r0, #0 + movls r0, #1 + bx lr +.L31: + mov r0, #1 + bx lr + .fnend + .size isxdigit, .-isxdigit + .text + .align 2 + .global zftl_get_density + .syntax unified + .arm + .fpu softvfp + .type zftl_get_density, %function +zftl_get_density: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + cmp r0, #0 + bne .L33 + ldr r3, .L36 + ldr r0, [r3, #1032] + bx lr +.L33: + cmp r0, #4 + movcc r0, #8192 + movcs r0, #0 + bx lr +.L37: + .align 2 +.L36: + .word .LANCHOR0 + .fnend + .size zftl_get_density, .-zftl_get_density + .align 2 + .syntax unified + .arm + .fpu softvfp + .type _list_remove_node, %function +_list_remove_node: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + mov r5, #6 + ldr r6, .L47 + mul r5, r5, r1 + movw r3, #65535 + ldr r8, [r6, #1036] + ldrh ip, [r8, r5] + add r4, r8, r5 + ldrh r1, [r4, #2] + cmp ip, r3 + ldr r3, [r0] + bne .L39 + cmp r1, ip + bne .L39 + cmp r4, r3 + popne {r4, r5, r6, r7, r8, r9, r10, pc} +.L39: + mov r9, r2 + movw r2, #65535 + cmp r1, r2 + mov r7, r0 + bne .L41 + cmp r4, r3 + beq .L41 + mov r2, #202 + ldr r1, .L47+4 + ldr r0, .L47+8 + bl rk_printk + bl dump_stack +.L41: + ldr r3, [r7] + movw r2, #65535 + cmp r4, r3 + ldrh r3, [r8, r5] + bne .L42 + cmp r3, r2 + ldrne r2, [r6, #1036] + movne r1, #6 + moveq r3, #0 + streq r3, [r7] + mlane r3, r1, r3, r2 + mvnne r2, #0 + strne r3, [r7] + strhne r2, [r3, #2] @ movhi +.L44: + mvn r3, #0 + strh r3, [r8, r5] @ movhi + strh r3, [r4, #2] @ movhi + ldrh r3, [r9] + sub r3, r3, #1 + strh r3, [r9] @ movhi + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L42: + cmp r3, r2 + ldrh r1, [r4, #2] + bne .L45 + cmp r1, r3 + movne r3, #6 + ldrne r2, [r6, #1036] + mulne r1, r3, r1 + mvnne r3, #0 + strhne r3, [r2, r1] @ movhi + b .L44 +.L45: + ldr r0, [r6, #1036] + mov r2, #6 + mla r3, r2, r3, r0 + strh r1, [r3, #2] @ movhi + ldrh r0, [r4, #2] + ldrh r1, [r8, r5] + ldr r3, [r6, #1036] + mul r2, r2, r0 + strh r1, [r3, r2] @ movhi + b .L44 +.L48: + .align 2 +.L47: + .word .LANCHOR0 + .word .LANCHOR1 + .word .LC0 + .fnend + .size _list_remove_node, .-_list_remove_node + .align 2 + .syntax unified + .arm + .fpu softvfp + .type ndelay, %function +ndelay: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L50 + add r0, r0, #996 + add r0, r0, #3 + umull r0, r1, r0, r3 + ldr r3, .L50+4 + ldr r3, [r3, #8] + lsr r0, r1, #6 + bx r3 @ indirect register sibling call +.L51: + .align 2 +.L50: + .word 274877907 + .word arm_delay_ops + .fnend + .size ndelay, .-ndelay + .align 2 + .syntax unified + .arm + .fpu softvfp + .type hynix_set_rr_para, %function +hynix_set_rr_para: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r2, .L58 + push {r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + lsl r9, r0, #8 + ldr r3, [r2, #1040] + ldr r6, [r2, #1044] + ldrb ip, [r3, #113] @ zero_extendqisi2 + add r4, r3, #112 + ldrb r2, [r3, #112] @ zero_extendqisi2 + add r5, r6, r9 + add r7, r3, #128 + add r8, r3, #127 + mul r1, r1, ip + cmp r2, #8 + movne r2, #160 + add r1, r1, #32 + smlabbne r1, r2, r0, r1 + mov r2, #54 + str r2, [r5, #2056] + sub r2, ip, #1 + add r4, r4, r1 + add r7, r7, r2 + sub r4, r4, #1 +.L55: + cmp r8, r7 + bne .L56 + add r6, r6, r9 + mov r3, #22 + str r3, [r6, #2056] + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L56: + ldrb r3, [r8, #1]! @ zero_extendqisi2 + mov r0, #120 + str r3, [r5, #2052] + bl ndelay + ldrsb r3, [r4, #1]! + str r3, [r5, #2048] + b .L55 +.L59: + .align 2 +.L58: + .word .LANCHOR0 + .fnend + .size hynix_set_rr_para, .-hynix_set_rr_para + .align 2 + .syntax unified + .arm + .fpu softvfp + .type zftl_debug_proc_open, %function +zftl_debug_proc_open: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, lr} + .save {r4, lr} + mov r4, r1 + bl PDE_DATA + mov r2, r0 + mov r0, r4 + ldr r1, .L62 + pop {r4, lr} + b single_open +.L63: + .align 2 +.L62: + .word zftl_debug_proc_show + .fnend + .size zftl_debug_proc_open, .-zftl_debug_proc_open + .align 2 + .syntax unified + .arm + .fpu softvfp + .type zftl_debug_proc_show, %function +zftl_debug_proc_show: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, lr} + .save {r4, lr} + mov r4, r0 + ldr r2, .L66 + ldr r1, .L66+4 + bl seq_printf + ldr r3, .L66+8 + mov r0, r4 + ldr r1, .L66+12 + ldr r2, [r3] + bl seq_printf + mov r0, #0 + pop {r4, pc} +.L67: + .align 2 +.L66: + .word .LC1 + .word .LC2 + .word .LANCHOR2 + .word .LC3 + .fnend + .size zftl_debug_proc_show, .-zftl_debug_proc_show + .align 2 + .global zftl_flash_suspend + .syntax unified + .arm + .fpu softvfp + .type zftl_flash_suspend, %function +zftl_flash_suspend: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L72 + ldrb r2, [r3, #1028] @ zero_extendqisi2 + cmp r2, #9 + ldr r2, [r3, #1044] + ldr r1, [r2] + str r1, [r3, #1048] + ldr r1, [r2, #4] + str r1, [r3, #1052] + bne .L69 + ldr r1, [r2, #16] + str r1, [r3, #1056] + ldr r1, [r2, #32] + str r1, [r3, #1060] + ldr r1, [r2, #80] + str r1, [r3, #1064] + ldr r1, [r2, #84] + str r1, [r3, #1068] + ldr r1, [r2, #520] + ldr r2, [r2, #8] + str r1, [r3, #1072] +.L71: + str r2, [r3, #1076] + bx lr +.L69: + ldr r1, [r2, #8] + str r1, [r3, #1056] + ldr r1, [r2, #12] + str r1, [r3, #1060] + ldr r1, [r2, #304] + str r1, [r3, #1064] + ldr r1, [r2, #308] + str r1, [r3, #1068] + ldr r1, [r2, #336] + ldr r2, [r2, #344] + str r1, [r3, #1072] + b .L71 +.L73: + .align 2 +.L72: + .word .LANCHOR0 + .fnend + .size zftl_flash_suspend, .-zftl_flash_suspend + .align 2 + .syntax unified + .arm + .fpu softvfp + .type nandc_irq_disable, %function +nandc_irq_disable: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L77 + ldrb r3, [r3, #1028] @ zero_extendqisi2 + cmp r3, #9 + mov r3, #1 + bne .L75 + ldr r2, [r0, #292] + lsl r1, r3, r1 + orr r3, r2, r1 + str r3, [r0, #292] + ldr r3, [r0, #288] + bic r1, r3, r1 + str r1, [r0, #288] + bx lr +.L75: + ldr r2, [r0, #368] + lsl r1, r3, r1 + orr r3, r2, r1 + str r3, [r0, #368] + ldr r3, [r0, #364] + bic r1, r3, r1 + str r1, [r0, #364] + bx lr +.L78: + .align 2 +.L77: + .word .LANCHOR0 + .fnend + .size nandc_irq_disable, .-nandc_irq_disable + .align 2 + .syntax unified + .arm + .fpu softvfp + .type _insert_free_list, %function +_insert_free_list: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L91 + movw ip, #1080 + ldrh ip, [r3, ip] + cmp ip, r1 + bxls lr + push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #12 + mov r4, r3 + ldrh ip, [r2] + add ip, ip, #1 + strh ip, [r2] @ movhi + mov ip, #6 + mul r6, ip, r1 + ldr r7, [r3, #1036] + mvn r3, #0 + add lr, r7, r6 + strh r3, [lr, #2] @ movhi + strh r3, [r7, r6] @ movhi + ldr r3, [r0] + cmp r3, #0 + bne .L81 +.L90: + str lr, [r0] + b .L79 +.L81: + ldr r5, [r4, #1084] + add r2, r4, #1088 + ldrh r10, [r2] + lsl r8, r1, #2 + ldr r9, [r4, #1036] + movw fp, #65535 + ldr r2, [r5, r1, lsl #2] + ldrh r8, [r5, r8] + str ip, [sp, #4] + ubfx r2, r2, #11, #8 + smulbb r2, r2, r10 + ubfx r8, r8, #0, #11 + add r2, r2, r8 + uxth r2, r2 + str r2, [sp] + sub r2, r3, r9 + asr r8, r2, #1 + ldr r2, .L91+4 + mul r2, r2, r8 + uxth r2, r2 +.L84: + ldr ip, [r5, r2, lsl #2] + lsl r8, r2, #2 + ldrh r8, [r5, r8] + ubfx ip, ip, #11, #8 + smulbb ip, ip, r10 + ubfx r8, r8, #0, #11 + add ip, ip, r8 + ldr r8, [sp] + uxth ip, ip + cmp r8, ip + bls .L82 + ldrh ip, [r3] + cmp ip, fp + bne .L83 + strh r2, [lr, #2] @ movhi + strh r1, [r3] @ movhi +.L79: + add sp, sp, #12 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L83: + ldr r3, [sp, #4] + mov r2, ip + mla r3, r3, ip, r9 + b .L84 +.L82: + ldrh ip, [r3, #2] + strh ip, [lr, #2] @ movhi + strh r2, [r7, r6] @ movhi + ldr r2, [r0] + cmp r3, r2 + strheq r1, [r3, #2] @ movhi + beq .L90 +.L85: + ldrh ip, [r3, #2] + mov r2, #6 + ldr r0, [r4, #1036] + mul r2, r2, ip + strh r1, [r0, r2] @ movhi + strh r1, [r3, #2] @ movhi + b .L79 +.L92: + .align 2 +.L91: + .word .LANCHOR0 + .word -1431655765 + .fnend + .size _insert_free_list, .-_insert_free_list + .align 2 + .syntax unified + .arm + .fpu softvfp + .type _insert_data_list, %function +_insert_data_list: + .fnstart + @ args = 0, pretend = 0, frame = 24 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L116 + movw ip, #1080 + ldrh ip, [r3, ip] + cmp ip, r1 + bxls lr + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r5, #6 + ldrh ip, [r2] + mul r5, r5, r1 + mov r4, r3 + .pad #28 + sub sp, sp, #28 + add ip, ip, #1 + strh ip, [r2] @ movhi + ldr r10, [r3, #1036] + mvn r3, #0 + add lr, r10, r5 + strh r3, [lr, #2] @ movhi + strh r3, [r10, r5] @ movhi + ldr r3, [r0] + cmp r3, #0 + bne .L96 +.L115: + str lr, [r0] + b .L93 +.L96: + ldr r2, [r4, #1092] + add r8, r4, #1088 + ldr r9, [r4, #1084] + ldrh r8, [r8] + str r2, [sp, #4] + lsl r2, r1, #1 + ldr ip, [sp, #4] + ldrh r6, [lr, #4] + ldr r7, [r9, r1, lsl #2] + ldrh ip, [ip, r2] + muls ip, r6, ip + str r8, [sp, #8] + lsl r2, r1, #2 + ldrhne r8, [sp, #8] + ubfx r7, r7, #11, #8 + ldrh r2, [r9, r2] + smulbbne r7, r7, r8 + ubfx r2, r2, #0, #11 + addne r2, r2, r7 + uxtahne ip, ip, r2 + ldr r2, [r4, #1036] + cmp r6, #0 + mvneq ip, #0 + str r2, [sp, #12] + sub r2, r3, r2 + asr r6, r2, #1 + ldr r2, .L116+4 + mul r2, r2, r6 + movw r6, #1080 + ldrh r4, [r4, r6] + mov r6, #0 + uxth r2, r2 + str r4, [sp, #16] +.L103: + sub r4, r1, r2 + ldr r7, [sp, #16] + add r6, r6, #1 + clz r4, r4 + uxth r6, r6 + lsr r4, r4, #5 + cmp r6, r7 + orrhi r4, r4, #1 + cmp r4, #0 + bne .L93 + ldr r7, [sp, #4] + lsl r4, r2, #1 + ldrh fp, [r3, #4] + ldr r8, [r9, r2, lsl #2] + ldrh r4, [r7, r4] + lsl r7, r2, #2 + muls r4, fp, r4 + ldrh r7, [r9, r7] + ubfx r8, r8, #11, #8 + ubfx r7, r7, #0, #11 + str r7, [sp, #20] + ldrhne r7, [sp, #8] + smulbbne r8, r8, r7 + ldrne r7, [sp, #20] + addne r7, r7, r8 + uxtahne r4, r4, r7 + cmp fp, #0 + cmpne ip, r4 + bls .L101 + ldrh r4, [r3] + movw r7, #65535 + cmp r4, r7 + bne .L102 + strh r2, [lr, #2] @ movhi + strh r1, [r3] @ movhi +.L93: + add sp, sp, #28 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L102: + ldr r2, [sp, #12] + mov r3, #6 + mla r3, r3, r4, r2 + mov r2, r4 + b .L103 +.L101: + ldrh ip, [r3, #2] + strh ip, [lr, #2] @ movhi + strh r2, [r10, r5] @ movhi + ldr r2, [r0] + cmp r3, r2 + strheq r1, [r3, #2] @ movhi + beq .L115 +.L104: + ldrh ip, [r3, #2] + ldr r2, .L116 + ldr r0, [r2, #1036] + mov r2, #6 + mul r2, r2, ip + strh r1, [r0, r2] @ movhi + strh r1, [r3, #2] @ movhi + b .L93 +.L117: + .align 2 +.L116: + .word .LANCHOR0 + .word -1431655765 + .fnend + .size _insert_data_list, .-_insert_data_list + .align 2 + .syntax unified + .arm + .fpu softvfp + .type _list_update_data_list, %function +_list_update_data_list: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + ldr r5, .L129 + ldr r3, [r5, #1096] + ldrh ip, [r3, #16] + cmp ip, r1 + popeq {r4, r5, r6, r7, r8, r9, r10, pc} + ldrh ip, [r3, #48] + cmp ip, r1 + popeq {r4, r5, r6, r7, r8, r9, r10, pc} + ldrh r3, [r3, #80] + cmp r3, r1 + popeq {r4, r5, r6, r7, r8, r9, r10, pc} + mov r8, #6 + ldr r10, [r5, #1036] + mul r8, r8, r1 + ldr r3, [r0] + add r9, r10, r8 + cmp r9, r3 + popeq {r4, r5, r6, r7, r8, r9, r10, pc} + ldrh r3, [r9, #2] + mov r7, r2 + movw r2, #65535 + mov r4, r1 + mov r6, r0 + cmp r3, r2 + bne .L122 + ldrh r2, [r10, r8] + cmp r2, r3 + bne .L122 + movw r2, #273 + ldr r1, .L129+4 + ldr r0, .L129+8 + bl rk_printk + bl dump_stack +.L122: + ldrh r3, [r9, #2] + movw r2, #65535 + cmp r3, r2 + bne .L123 + ldrh r2, [r10, r8] + cmp r2, r3 + popeq {r4, r5, r6, r7, r8, r9, r10, pc} +.L123: + ldr r0, [r5, #1092] + lsl r2, r4, #1 + ldrh r1, [r9, #4] + ldrh r2, [r0, r2] + cmp r1, #0 + mvneq r1, #0 + mulne r1, r1, r2 + mov r2, #6 + mul r2, r2, r3 + ldr r3, .L129+12 + asr ip, r2, #1 + mul r3, r3, ip + lsl r3, r3, #1 + ldrh ip, [r0, r3] + ldr r0, [r5, #1036] + add r2, r0, r2 + ldrh r3, [r2, #4] + cmp r3, #0 + mulne r3, r3, ip + mvneq r3, #0 + cmp r1, r3 + popcs {r4, r5, r6, r7, r8, r9, r10, pc} + mov r2, r7 + mov r1, r4 + mov r0, r6 + bl _list_remove_node + mov r2, r7 + mov r1, r4 + mov r0, r6 + pop {r4, r5, r6, r7, r8, r9, r10, lr} + b _insert_data_list +.L130: + .align 2 +.L129: + .word .LANCHOR0 + .word .LANCHOR1+18 + .word .LC0 + .word -1431655765 + .fnend + .size _list_update_data_list, .-_list_update_data_list + .section .text.unlikely + .align 2 + .syntax unified + .arm + .fpu softvfp + .type rk_simple_strtoull.constprop.33, %function +rk_simple_strtoull.constprop.33: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + mov r4, r0 + ldrb r3, [r0] @ zero_extendqisi2 + cmp r3, #48 + movne r2, r0 + movne r5, #10 + bne .L132 + ldrb r3, [r0, #1] @ zero_extendqisi2 + add r2, r0, #1 + orr r3, r3, #32 + cmp r3, #120 + bne .L144 + ldrb r0, [r0, #2] @ zero_extendqisi2 + bl isxdigit + cmp r0, #0 + addne r2, r4, #2 + movne r5, #16 + bne .L132 +.L144: + mov r5, #8 +.L132: + mov r6, #0 +.L133: + mov r7, r2 + ldrb r4, [r2], #1 @ zero_extendqisi2 + mov r0, r4 + bl isxdigit + cmp r0, #0 + bne .L134 +.L140: + cmp r1, #0 + mov r0, r6 + strne r7, [r1] + pop {r4, r5, r6, r7, r8, pc} +.L134: + sub r0, r4, #48 + cmp r0, #9 + orrhi r0, r4, #32 + subhi r0, r0, #87 + cmp r0, r5 + bcs .L140 + mla r6, r5, r6, r0 + b .L133 + .fnend + .size rk_simple_strtoull.constprop.33, .-rk_simple_strtoull.constprop.33 + .text + .align 2 + .syntax unified + .arm + .fpu softvfp + .type nandc_de_cs.constprop.35, %function +nandc_de_cs.constprop.35: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L148 + ldr r2, [r3, #1044] + ldr r3, [r2] + bfc r3, #0, #8 + bfc r3, #17, #1 + str r3, [r2] + bx lr +.L149: + .align 2 +.L148: + .word .LANCHOR0 + .fnend + .size nandc_de_cs.constprop.35, .-nandc_de_cs.constprop.35 + .align 2 + .global flash_read_status + .syntax unified + .arm + .fpu softvfp + .type flash_read_status, %function +flash_read_status: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + mov r3, #112 + push {r4, lr} + .save {r4, lr} + mov r4, r0 + str r3, [r0, #8] + mov r0, #120 + bl ndelay + ldr r0, [r4] + uxtb r0, r0 + pop {r4, pc} + .fnend + .size flash_read_status, .-flash_read_status + .align 2 + .global toshiba_set_rr_para + .syntax unified + .arm + .fpu softvfp + .type toshiba_set_rr_para, %function +toshiba_set_rr_para: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + add r8, r1, r1, lsl #2 + ldr r9, .L161 + mov r5, r0 + mov r6, r1 + mov r4, #0 + ldr r7, .L161+4 + add r10, r9, #41 +.L153: + ldrb r3, [r7, #1101] @ zero_extendqisi2 + cmp r4, r3 + bcc .L157 + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L157: + mov r3, #85 + mov r0, #200 + str r3, [r5, #8] + ldrsb r3, [r4, r10] + str r3, [r5, #4] + bl ndelay + ldrb r3, [r7, #1100] @ zero_extendqisi2 + cmp r3, #34 + addeq r3, r4, r8 + addeq r3, r10, r3 + beq .L160 + cmp r3, #35 + addne r3, r9, r6 + ldrsbne r3, [r3, #181] + bne .L159 + ldr r2, .L161+8 + add r3, r4, r8 + add r3, r2, r3 +.L160: + ldrsb r3, [r3, #5] +.L159: + str r3, [r5] + add r4, r4, #1 + b .L153 +.L162: + .align 2 +.L161: + .word .LANCHOR1 + .word .LANCHOR0 + .word .LANCHOR1+86 + .fnend + .size toshiba_set_rr_para, .-toshiba_set_rr_para + .align 2 + .global hynix_reconfig_rr_para + .syntax unified + .arm + .fpu softvfp + .type hynix_reconfig_rr_para, %function +hynix_reconfig_rr_para: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + ldr r5, .L169 + ldrb r2, [r5, #1100] @ zero_extendqisi2 + sub r2, r2, #1 + cmp r2, #7 + pophi {r4, r5, r6, pc} + ldr r2, [r5, #1040] + mov r4, r0 + add r2, r2, r0 + ldrb r2, [r2, #120] @ zero_extendqisi2 + cmp r2, #0 + popeq {r4, r5, r6, pc} + mov r1, #0 + bl hynix_set_rr_para + ldr r3, [r5, #1040] + mov r2, #0 + add r3, r3, r4 + strb r2, [r3, #120] + pop {r4, r5, r6, pc} +.L170: + .align 2 +.L169: + .word .LANCHOR0 + .fnend + .size hynix_reconfig_rr_para, .-hynix_reconfig_rr_para + .align 2 + .global nand_flash_print_info + .syntax unified + .arm + .fpu softvfp + .type nand_flash_print_info, %function +nand_flash_print_info: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r3, r4, lr} + .save {r4, lr} + .pad #16 + ldr r4, .L290 + ldr r3, [r4] + tst r3, #4096 + beq .L172 + ldr r1, .L290+4 + ldr r0, .L290+8 + bl rk_printk +.L172: + ldr r3, [r4] + tst r3, #4096 + beq .L173 + ldr r3, .L290+12 + ldr r0, [r3, #1104] + ldrb ip, [r0, #6] @ zero_extendqisi2 + ldrb r3, [r0, #3] @ zero_extendqisi2 + ldrb r2, [r0, #2] @ zero_extendqisi2 + ldrb r1, [r0, #1] @ zero_extendqisi2 + str ip, [sp, #8] + ldrb ip, [r0, #5] @ zero_extendqisi2 + str ip, [sp, #4] + ldrb r0, [r0, #4] @ zero_extendqisi2 + str r0, [sp] + ldr r0, .L290+16 + bl rk_printk +.L173: + ldr r3, [r4] + tst r3, #4096 + beq .L174 + ldr r3, .L290+12 + ldr r0, .L290+20 + ldr r3, [r3, #1104] + ldrb r1, [r3, #8] @ zero_extendqisi2 + bl rk_printk +.L174: + ldr r3, [r4] + tst r3, #4096 + beq .L175 + ldr r3, .L290+12 + ldr r0, .L290+24 + ldr r3, [r3, #1104] + ldrb r1, [r3, #9] @ zero_extendqisi2 + bl rk_printk +.L175: + ldr r3, [r4] + tst r3, #4096 + beq .L176 + ldr r3, .L290+12 + ldr r0, .L290+28 + ldr r3, [r3, #1104] + ldrh r1, [r3, #10] + bl rk_printk +.L176: + ldr r3, [r4] + tst r3, #4096 + beq .L177 + ldr r3, .L290+12 + ldr r0, .L290+32 + ldr r3, [r3, #1104] + ldrb r1, [r3, #12] @ zero_extendqisi2 + bl rk_printk +.L177: + ldr r3, [r4] + tst r3, #4096 + beq .L178 + ldr r3, .L290+12 + ldr r0, .L290+36 + ldr r3, [r3, #1104] + ldrb r1, [r3, #13] @ zero_extendqisi2 + bl rk_printk +.L178: + ldr r3, [r4] + tst r3, #4096 + beq .L179 + ldr r3, .L290+12 + ldr r0, .L290+40 + ldr r3, [r3, #1104] + ldrh r1, [r3, #14] + bl rk_printk +.L179: + ldr r3, [r4] + tst r3, #4096 + beq .L180 + ldr r3, .L290+12 + ldr r0, .L290+44 + ldr r3, [r3, #1104] + ldrb r1, [r3, #23] @ zero_extendqisi2 + bl rk_printk +.L180: + ldr r3, [r4] + tst r3, #4096 + beq .L181 + ldr r3, .L290+12 + ldr r0, .L290+48 + ldr r3, [r3, #1104] + ldrb r1, [r3, #18] @ zero_extendqisi2 + bl rk_printk +.L181: + ldr r3, [r4] + tst r3, #4096 + beq .L182 + ldr r3, .L290+12 + ldr r0, .L290+52 + ldr r3, [r3, #1104] + ldrb r1, [r3, #19] @ zero_extendqisi2 + bl rk_printk +.L182: + ldr r3, [r4] + tst r3, #4096 + beq .L183 + ldr r3, .L290+12 + ldr r0, .L290+56 + ldr r3, [r3, #1104] + ldrb r1, [r3, #20] @ zero_extendqisi2 + bl rk_printk +.L183: + ldr r3, [r4] + tst r3, #4096 + beq .L184 + ldr r3, .L290+12 + ldr r0, .L290+60 + ldrb r1, [r3, #1108] @ zero_extendqisi2 + bl rk_printk +.L184: + ldr r3, [r4] + tst r3, #4096 + beq .L185 + ldr r3, .L290+12 + ldr r0, .L290+64 + ldr r3, [r3, #1104] + ldrb r1, [r3, #22] @ zero_extendqisi2 + bl rk_printk +.L185: + ldr r3, [r4] + tst r3, #4096 + beq .L186 + ldr r3, .L290+12 + ldr r0, .L290+68 + ldrb r1, [r3, #1109] @ zero_extendqisi2 + bl rk_printk +.L186: + ldr r3, [r4] + tst r3, #4096 + beq .L187 + ldr r3, .L290+12 + ldr r0, .L290+72 + ldr r3, [r3, #1104] + ldrh r1, [r3, #16] + and r1, r1, #1 + bl rk_printk +.L187: + ldr r3, [r4] + tst r3, #4096 + beq .L188 + ldr r3, .L290+12 + ldr r0, .L290+76 + ldr r3, [r3, #1104] + ldrh r1, [r3, #16] + ubfx r1, r1, #1, #1 + bl rk_printk +.L188: + ldr r3, [r4] + tst r3, #4096 + beq .L189 + ldr r3, .L290+12 + ldr r0, .L290+80 + ldr r3, [r3, #1104] + ldrh r1, [r3, #16] + ubfx r1, r1, #2, #1 + bl rk_printk +.L189: + ldr r3, [r4] + tst r3, #4096 + beq .L190 + ldr r3, .L290+12 + ldr r0, .L290+84 + ldr r3, [r3, #1104] + ldrh r1, [r3, #16] + ubfx r1, r1, #3, #1 + bl rk_printk +.L190: + ldr r3, [r4] + tst r3, #4096 + beq .L191 + ldr r3, .L290+12 + ldr r0, .L290+88 + ldr r3, [r3, #1104] + ldrh r1, [r3, #16] + ubfx r1, r1, #4, #1 + bl rk_printk +.L191: + ldr r3, [r4] + tst r3, #4096 + beq .L192 + ldr r3, .L290+12 + ldr r0, .L290+92 + ldr r3, [r3, #1104] + ldrh r1, [r3, #16] + ubfx r1, r1, #5, #1 + bl rk_printk +.L192: + ldr r3, [r4] + tst r3, #4096 + beq .L193 + ldr r3, .L290+12 + ldr r0, .L290+96 + ldr r3, [r3, #1104] + ldrh r1, [r3, #16] + ubfx r1, r1, #6, #1 + bl rk_printk +.L193: + ldr r3, [r4] + tst r3, #4096 + beq .L194 + ldr r3, .L290+12 + ldr r0, .L290+100 + ldr r3, [r3, #1104] + ldrh r1, [r3, #16] + ubfx r1, r1, #7, #1 + bl rk_printk +.L194: + ldr r3, [r4] + tst r3, #4096 + beq .L195 + ldr r3, .L290+12 + ldr r0, .L290+104 + ldr r3, [r3, #1104] + ldrh r1, [r3, #16] + ubfx r1, r1, #8, #1 + bl rk_printk +.L195: + ldr r3, [r4] + tst r3, #4096 + beq .L196 + ldr r3, .L290+12 + ldr r0, .L290+108 + ldr r3, [r3, #1104] + ldrh r1, [r3, #16] + ubfx r1, r1, #9, #1 + bl rk_printk +.L196: + ldr r3, [r4] + tst r3, #4096 + beq .L197 + ldr r3, .L290+12 + ldr r0, .L290+112 + ldr r3, [r3, #1104] + ldrh r1, [r3, #16] + ubfx r1, r1, #10, #1 + bl rk_printk +.L197: + ldr r3, [r4] + tst r3, #4096 + beq .L198 + ldr r3, .L290+12 + ldr r0, .L290+116 + ldrb r2, [r3, #1110] @ zero_extendqisi2 + ldrb r1, [r3] @ zero_extendqisi2 + bl rk_printk +.L198: + ldr r3, [r4] + tst r3, #4096 + beq .L199 + ldr r3, .L290+12 + ldr r0, .L290+120 + ldrb r2, [r3, #1122] @ zero_extendqisi2 + ldrb r1, [r3, #1121] @ zero_extendqisi2 + bl rk_printk +.L199: + ldr r3, [r4] + tst r3, #4096 + beq .L200 + ldr r3, .L290+12 + ldr r0, .L290+124 + ldrb r2, [r3, #1120] @ zero_extendqisi2 + ldrb r1, [r3, #1119] @ zero_extendqisi2 + bl rk_printk +.L200: + ldr r3, [r4] + tst r3, #4096 + beq .L171 + ldr r3, .L290+12 + ldr r0, .L290+128 + ldrb r1, [r3, #1143] @ zero_extendqisi2 + add sp, sp, #16 + @ sp needed + pop {r4, lr} + b rk_printk +.L171: + add sp, sp, #16 + @ sp needed + pop {r4, pc} +.L291: + .align 2 +.L290: + .word .LANCHOR2 + .word .LANCHOR1+189 + .word .LC4 + .word .LANCHOR0 + .word .LC5 + .word .LC6 + .word .LC7 + .word .LC8 + .word .LC9 + .word .LC10 + .word .LC11 + .word .LC12 + .word .LC13 + .word .LC14 + .word .LC15 + .word .LC16 + .word .LC17 + .word .LC18 + .word .LC19 + .word .LC20 + .word .LC21 + .word .LC22 + .word .LC23 + .word .LC24 + .word .LC25 + .word .LC26 + .word .LC27 + .word .LC28 + .word .LC29 + .word .LC30 + .word .LC31 + .word .LC32 + .word .LC33 + .fnend + .size nand_flash_print_info, .-nand_flash_print_info + .align 2 + .global timer_delay_ns + .syntax unified + .arm + .fpu softvfp + .type timer_delay_ns, %function +timer_delay_ns: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + b ndelay + .fnend + .size timer_delay_ns, .-timer_delay_ns + .align 2 + .global nandc_set_ddr_para + .syntax unified + .arm + .fpu softvfp + .type nandc_set_ddr_para, %function +nandc_set_ddr_para: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r2, .L296 + ldrb r3, [r2, #1028] @ zero_extendqisi2 + ldr r2, [r2, #1044] + cmp r3, #9 + lsl r3, r0, #16 + lsl r0, r0, #8 + orr r3, r3, r0 + orr r3, r3, #3 + streq r3, [r2, #80] + strne r3, [r2, #304] + bx lr +.L297: + .align 2 +.L296: + .word .LANCHOR0 + .fnend + .size nandc_set_ddr_para, .-nandc_set_ddr_para + .align 2 + .global nandc_get_ddr_para + .syntax unified + .arm + .fpu softvfp + .type nandc_get_ddr_para, %function +nandc_get_ddr_para: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L302 + ldrb r2, [r3, #1028] @ zero_extendqisi2 + ldr r3, [r3, #1044] + cmp r2, #9 + ldreq r0, [r3, #80] + ldrne r0, [r3, #304] + ubfx r0, r0, #8, #8 + bx lr +.L303: + .align 2 +.L302: + .word .LANCHOR0 + .fnend + .size nandc_get_ddr_para, .-nandc_get_ddr_para + .align 2 + .global nandc_set_if_mode + .syntax unified + .arm + .fpu softvfp + .type nandc_set_if_mode, %function +nandc_set_if_mode: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r1, .L312 + ands ip, r0, #6 + ldr r3, [r1, #1044] + ldr r2, [r3] + bfieq r2, ip, #13, #1 + beq .L308 + ldrb r1, [r1, #1028] @ zero_extendqisi2 + orr r2, r2, #24576 + bfc r2, #15, #1 + tst r0, #4 + orr r2, r2, #196608 + movw r0, #8321 + orrne r2, r2, #32768 + cmp r1, #9 + ldr r1, .L312+4 + streq r0, [r3, #8] + strne r0, [r3, #344] + streq r1, [r3, #80] + moveq r1, #38 + strne r1, [r3, #304] + movne r1, #38 + streq r1, [r3, #84] + moveq r1, #39 + strne r1, [r3, #308] + movne r1, #39 + streq r1, [r3, #84] + strne r1, [r3, #308] +.L308: + str r2, [r3] + bx lr +.L313: + .align 2 +.L312: + .word .LANCHOR0 + .word 1052675 + .fnend + .size nandc_set_if_mode, .-nandc_set_if_mode + .align 2 + .global nandc_cs + .syntax unified + .arm + .fpu softvfp + .type nandc_cs, %function +nandc_cs: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L315 + mov r2, #1 + lsl r0, r2, r0 + ldr r1, [r3, #1044] + ldr r3, [r1] + bfi r3, r0, #0, #8 + str r3, [r1] + bx lr +.L316: + .align 2 +.L315: + .word .LANCHOR0 + .fnend + .size nandc_cs, .-nandc_cs + .align 2 + .global flash_wait_device_ready_raw + .syntax unified + .arm + .fpu softvfp + .type flash_wait_device_ready_raw, %function +flash_wait_device_ready_raw: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #12 + mov r6, r0 + ldr r4, .L326 + mov r5, r1 + str r2, [sp, #4] + ldrb r3, [r4, #1109] @ zero_extendqisi2 + cmp r3, r0 + bhi .L318 + mov r2, #812 + ldr r1, .L326+4 + ldr r0, .L326+8 + bl rk_printk + bl dump_stack +.L318: + add r6, r4, r6 + ldr r3, [r4, #1044] + ldrb r6, [r6, #1144] @ zero_extendqisi2 + lsr r8, r5, #8 + lsr r9, r5, #16 + lsr r10, r5, #24 + mov fp, #120 + add r7, r3, r6, lsl #8 +.L320: + mov r0, r6 + bl nandc_cs + uxtb r2, r5 + str fp, [r7, #2056] + mov r0, #120 + str r2, [r7, #2052] + ldrb r2, [r4, #1152] @ zero_extendqisi2 + str r8, [r7, #2052] + str r9, [r7, #2052] + cmp r2, #0 + strne r10, [r7, #2052] + bl ndelay + ldr r0, [r7, #2048] + uxtb r0, r0 + bl nandc_de_cs.constprop.35 + ldr r3, [sp, #4] + bics r3, r3, r0 + movne r2, #1 + moveq r2, #0 + cmp r0, #255 + orreq r2, r2, #1 + cmp r2, #0 + bne .L320 + add sp, sp, #12 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L327: + .align 2 +.L326: + .word .LANCHOR0 + .word .LANCHOR1+211 + .word .LC0 + .fnend + .size flash_wait_device_ready_raw, .-flash_wait_device_ready_raw + .align 2 + .global flash_wait_device_ready + .syntax unified + .arm + .fpu softvfp + .type flash_wait_device_ready, %function +flash_wait_device_ready: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + mov r3, #1 + ldr r5, .L339 + tst r0, #50331648 + mov r7, r1 + ldrb r6, [r5, #1153] @ zero_extendqisi2 + rsb r2, r6, #24 + lsl r6, r3, r6 + lsl r4, r3, r2 + sub r6, r6, #1 + sub r4, r4, #1 + and r6, r6, r0, asr r2 + and r4, r4, r0 + uxtb r6, r6 + bne .L329 + ldrb r3, [r5] @ zero_extendqisi2 + cmp r3, #0 + beq .L330 + ldrb r3, [r5, #1] @ zero_extendqisi2 + cmp r3, #0 + beq .L329 +.L330: + ldrh r8, [r5, #2] + mov r0, r4 + mov r1, r8 + bl __aeabi_uidiv + mov r1, r8 + mul r9, r8, r0 + mov r0, r4 + bl __aeabi_uidivmod + ldrb r3, [r5, #1] @ zero_extendqisi2 + lsl r1, r1, #1 + cmp r3, #0 + addeq r5, r5, r1 + addne r4, r1, r9 + ldrheq r4, [r5, #4] + addeq r4, r4, r9 +.L329: + mov r2, r7 + mov r1, r4 + mov r0, r6 + pop {r4, r5, r6, r7, r8, r9, r10, lr} + b flash_wait_device_ready_raw +.L340: + .align 2 +.L339: + .word .LANCHOR0 + .fnend + .size flash_wait_device_ready, .-flash_wait_device_ready + .align 2 + .global nandc_de_cs + .syntax unified + .arm + .fpu softvfp + .type nandc_de_cs, %function +nandc_de_cs: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L342 + ldr r2, [r3, #1044] + ldr r3, [r2] + bfc r3, #0, #8 + bfc r3, #17, #1 + str r3, [r2] + bx lr +.L343: + .align 2 +.L342: + .word .LANCHOR0 + .fnend + .size nandc_de_cs, .-nandc_de_cs + .align 2 + .global nandc_wait_flash_ready_no_delay + .syntax unified + .arm + .fpu softvfp + .type nandc_wait_flash_ready_no_delay, %function +nandc_wait_flash_ready_no_delay: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r4, r5, lr} + .save {r4, r5, lr} + .pad #12 + ldr r4, .L350 + ldr r5, .L350+4 +.L346: + ldr r3, [r5, #1044] + ldr r3, [r3] + str r3, [sp, #4] + ldr r3, [sp, #4] + tst r3, #512 + bne .L347 + mov r0, #10 + bl ndelay + subs r4, r4, #1 + bne .L346 + mvn r0, #0 +.L344: + add sp, sp, #12 + @ sp needed + pop {r4, r5, pc} +.L347: + mov r0, #0 + b .L344 +.L351: + .align 2 +.L350: + .word 100000 + .word .LANCHOR0 + .fnend + .size nandc_wait_flash_ready_no_delay, .-nandc_wait_flash_ready_no_delay + .align 2 + .global zftl_flash_enter_slc_mode + .syntax unified + .arm + .fpu softvfp + .type zftl_flash_enter_slc_mode, %function +zftl_flash_enter_slc_mode: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L375 + ldrb r2, [r3] @ zero_extendqisi2 + cmp r2, #0 + bxeq lr + cmp r2, #1 + push {r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + ldr r5, [r3, #1044] + bne .L355 + ldr r3, .L375+4 + ldrb r3, [r3, #33] @ zero_extendqisi2 + cmp r3, #0 + addne r4, r5, r0, lsl #8 + bne .L374 + pop {r4, r5, r6, r7, r8, pc} +.L355: + cmp r2, #2 + mov r4, r0 + bne .L357 + add r3, r3, r0 + ldrb r2, [r3, #1154] @ zero_extendqisi2 + cmp r2, #0 + popeq {r4, r5, r6, r7, r8, pc} + ldr r6, .L375+4 + mov r2, #0 + strb r2, [r3, #1154] + ldrb r3, [r6, #33] @ zero_extendqisi2 + cmp r3, r2 + popeq {r4, r5, r6, r7, r8, pc} + bl nandc_wait_flash_ready_no_delay + ldrb r3, [r6, #33] @ zero_extendqisi2 + add r4, r5, r4, lsl #8 +.L374: + str r3, [r4, #2056] + pop {r4, r5, r6, r7, r8, pc} +.L357: + cmp r2, #3 + popne {r4, r5, r6, r7, r8, pc} + add r6, r3, r0 + ldrb r3, [r6, #1154] @ zero_extendqisi2 + cmp r3, #0 + popeq {r4, r5, r6, r7, r8, pc} + add r4, r5, r4, lsl #8 + mov r7, #0 + bl nandc_wait_flash_ready_no_delay + mov r3, #239 + mov r0, #100 + str r3, [r4, #2056] + mov r3, #145 + str r3, [r4, #2052] + strb r7, [r6, #1154] + bl ndelay + mov r3, #1 + str r7, [r4, #2048] + mov r0, #150 + str r3, [r4, #2048] + str r7, [r4, #2048] + str r7, [r4, #2048] + bl ndelay + bl nandc_wait_flash_ready_no_delay + mov r3, #218 + mov r0, #50 + str r3, [r4, #2056] + pop {r4, r5, r6, r7, r8, lr} + b ndelay +.L376: + .align 2 +.L375: + .word .LANCHOR0 + .word .LANCHOR2 + .fnend + .size zftl_flash_enter_slc_mode, .-zftl_flash_enter_slc_mode + .align 2 + .global zftl_flash_exit_slc_mode + .syntax unified + .arm + .fpu softvfp + .type zftl_flash_exit_slc_mode, %function +zftl_flash_exit_slc_mode: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L402 + ldrb r2, [r3] @ zero_extendqisi2 + cmp r2, #0 + bxeq lr + cmp r2, #1 + push {r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + ldr r7, [r3, #1044] + bne .L380 + ldr r3, .L402+4 + ldrb r3, [r3, #34] @ zero_extendqisi2 + cmp r3, #0 + addne r4, r7, r0, lsl #8 + bne .L401 + pop {r4, r5, r6, r7, r8, pc} +.L380: + cmp r2, #2 + mov r4, r0 + bne .L382 + add r3, r3, r0 + ldrb r2, [r3, #1154] @ zero_extendqisi2 + cmp r2, #0 + popne {r4, r5, r6, r7, r8, pc} + ldr r5, .L402+4 + ldrb r2, [r5, #16] @ zero_extendqisi2 + cmp r2, #2 + movne r2, #4 + strb r2, [r3, #1154] + ldrb r3, [r5, #34] @ zero_extendqisi2 + cmp r3, #0 + popeq {r4, r5, r6, r7, r8, pc} + bl nandc_wait_flash_ready_no_delay + ldrb r3, [r5, #34] @ zero_extendqisi2 + add r4, r7, r4, lsl #8 +.L401: + str r3, [r4, #2056] + pop {r4, r5, r6, r7, r8, pc} +.L382: + cmp r2, #3 + popne {r4, r5, r6, r7, r8, pc} + add r6, r3, r0 + ldrb r3, [r6, #1154] @ zero_extendqisi2 + cmp r3, #0 + popne {r4, r5, r6, r7, r8, pc} + ldr r8, .L402+4 + lsl r4, r4, #8 + bl nandc_wait_flash_ready_no_delay + ldrb r3, [r8, #16] @ zero_extendqisi2 + add r5, r7, r4 + mov r0, #100 + add r4, r7, r4 + cmp r3, #2 + movne r3, #4 + strb r3, [r6, #1154] + mov r3, #239 + str r3, [r5, #2056] + mov r3, #145 + str r3, [r5, #2052] + bl ndelay + ldrb r3, [r8, #11] @ zero_extendqisi2 + mov r0, #150 + cmp r3, #9 + mov r3, #1 + ldrbne r2, [r6, #1154] @ zero_extendqisi2 + streq r3, [r5, #2048] + strne r2, [r5, #2048] + str r3, [r5, #2048] + mov r3, #0 + str r3, [r5, #2048] + str r3, [r5, #2048] + bl ndelay + bl nandc_wait_flash_ready_no_delay + mov r3, #223 + mov r0, #50 + str r3, [r4, #2056] + pop {r4, r5, r6, r7, r8, lr} + b ndelay +.L403: + .align 2 +.L402: + .word .LANCHOR0 + .word .LANCHOR2 + .fnend + .size zftl_flash_exit_slc_mode, .-zftl_flash_exit_slc_mode + .align 2 + .global flash_start_page_read + .syntax unified + .arm + .fpu softvfp + .type flash_start_page_read, %function +flash_start_page_read: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + mvn r2, #0 + ldr r4, .L419 + mov r7, r0 + mov r10, r1 + ldrb r3, [r4, #1153] @ zero_extendqisi2 + rsb r5, r3, #24 + lsr r6, r1, r5 + bic r6, r6, r2, lsl r3 + ldrb r3, [r4, #1109] @ zero_extendqisi2 + uxtb r6, r6 + cmp r3, r6 + bhi .L405 + movw r2, #1013 + ldr r1, .L419+4 + ldr r0, .L419+8 + bl rk_printk + bl dump_stack +.L405: + ldrb r3, [r4, #1109] @ zero_extendqisi2 + cmp r3, r6 + popls {r4, r5, r6, r7, r8, r9, r10, pc} + add r6, r4, r6 + mvn r3, #0 + ldrb r9, [r6, #1144] @ zero_extendqisi2 + bic r5, r10, r3, lsl r5 + ubfx r10, r10, #24, #2 + ldr r6, [r4, #1044] + mov r0, r9 + bl nandc_cs + cmp r10, #0 + lsl r8, r9, #8 + bne .L407 + mov r0, r5 + bl slc_phy_page_address_calc + ldrb r3, [r4] @ zero_extendqisi2 + mov r5, r0 + cmp r3, #0 + beq .L408 + mov r0, r9 + bl zftl_flash_enter_slc_mode +.L408: + ldr r3, [r4, #1104] + ldrb r2, [r3, #7] @ zero_extendqisi2 + cmp r2, #1 + bne .L410 + ldrb r3, [r3, #12] @ zero_extendqisi2 + cmp r3, #2 + addeq r3, r6, r8 + moveq r2, #38 + streq r2, [r3, #2056] +.L410: + add r3, r6, r8 + mov r2, #0 + str r2, [r3, #2056] + str r2, [r3, #2052] + str r2, [r3, #2052] + uxtb r2, r5 + str r2, [r3, #2052] + lsr r2, r5, #8 + str r2, [r3, #2052] + lsr r2, r5, #16 + str r2, [r3, #2052] + ldrb r2, [r4, #1152] @ zero_extendqisi2 + cmp r2, #0 + lsrne r5, r5, #24 + strne r5, [r3, #2052] + add r3, r6, r8 + str r7, [r3, #2056] + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L407: + ldr r3, [r4, #1104] + ldrb r3, [r3, #12] @ zero_extendqisi2 + cmp r3, #3 + bne .L409 + ldrb r3, [r4, #1158] @ zero_extendqisi2 + cmp r3, #0 + bne .L409 + ldrb r3, [r4, #1159] @ zero_extendqisi2 + cmp r3, #0 + addeq r3, r6, r8 + streq r10, [r3, #2056] + beq .L408 +.L409: + mov r0, r9 + bl zftl_flash_exit_slc_mode + b .L408 +.L420: + .align 2 +.L419: + .word .LANCHOR0 + .word .LANCHOR1+239 + .word .LC0 + .fnend + .size flash_start_page_read, .-flash_start_page_read + .align 2 + .global nandc_wait_flash_ready + .syntax unified + .arm + .fpu softvfp + .type nandc_wait_flash_ready, %function +nandc_wait_flash_ready: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r4, r5, lr} + .save {r4, r5, lr} + .pad #12 + mov r0, #150 + ldr r4, .L427 + ldr r5, .L427+4 + bl ndelay +.L423: + ldr r3, [r5, #1044] + ldr r3, [r3] + str r3, [sp, #4] + ldr r3, [sp, #4] + tst r3, #512 + bne .L424 + mov r0, #10 + bl ndelay + subs r4, r4, #1 + bne .L423 + mvn r0, #0 +.L421: + add sp, sp, #12 + @ sp needed + pop {r4, r5, pc} +.L424: + mov r0, #0 + b .L421 +.L428: + .align 2 +.L427: + .word 100000 + .word .LANCHOR0 + .fnend + .size nandc_wait_flash_ready, .-nandc_wait_flash_ready + .align 2 + .global sandisk_set_rr_para + .syntax unified + .arm + .fpu softvfp + .type sandisk_set_rr_para, %function +sandisk_set_rr_para: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + mov r3, #239 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + str r3, [r0, #8] + mov r3, #17 + mov r5, r0 + mov r4, r1 + str r3, [r0, #4] + mov r0, #200 + bl ndelay + ldr r0, .L436 + add r4, r4, r4, lsl #2 + ldr r1, .L436+4 + mov r2, #0 + sub ip, r0, #45 +.L430: + ldrb r3, [r1, #1101] @ zero_extendqisi2 + cmp r2, r3 + bcc .L433 + pop {r4, r5, r6, lr} + b nandc_wait_flash_ready +.L433: + ldrb r3, [r1, #1100] @ zero_extendqisi2 + cmp r3, #67 + add r3, r2, r4 + addeq r3, ip, r3 + addne r3, r0, r3 + ldrsb r3, [r3, #5] + add r2, r2, #1 + str r3, [r5] + b .L430 +.L437: + .align 2 +.L436: + .word .LANCHOR1+86 + .word .LANCHOR0 + .fnend + .size sandisk_set_rr_para, .-sandisk_set_rr_para + .align 2 + .global toshiba_3d_set_tlc_rr_para + .syntax unified + .arm + .fpu softvfp + .type toshiba_3d_set_tlc_rr_para, %function +toshiba_3d_set_tlc_rr_para: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + add r1, r1, #1 + ldr r5, .L440 + rsb r1, r1, r1, lsl #3 + mov r6, #0 + mov r7, #213 + mvn r3, #118 + add r5, r5, r1 + str r7, [r0, #8] + str r6, [r0, #4] + mov r4, r0 + str r3, [r0, #4] + movw r3, #261 + ldrsb r3, [r5, r3] + str r3, [r0] + movw r3, #262 + ldrsb r3, [r5, r3] + str r3, [r0] + movw r3, #263 + ldrsb r3, [r5, r3] + str r3, [r0] + add r3, r5, #264 + ldrsb r3, [r3] + str r3, [r0] + bl nandc_wait_flash_ready + mvn r3, #117 + str r7, [r4, #8] + str r6, [r4, #4] + str r3, [r4, #4] + movw r3, #265 + ldrsb r3, [r5, r3] + str r3, [r4] + movw r3, #266 + ldrsb r3, [r5, r3] + str r3, [r4] + movw r3, #267 + ldrsb r3, [r5, r3] + str r3, [r4] + str r6, [r4] + pop {r4, r5, r6, r7, r8, lr} + b nandc_wait_flash_ready +.L441: + .align 2 +.L440: + .word .LANCHOR1 + .fnend + .size toshiba_3d_set_tlc_rr_para, .-toshiba_3d_set_tlc_rr_para + .align 2 + .global toshiba_3d_set_slc_rr_para + .syntax unified + .arm + .fpu softvfp + .type toshiba_3d_set_slc_rr_para, %function +toshiba_3d_set_slc_rr_para: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + mov r3, #213 + mvn r2, #116 + str r3, [r0, #8] + mov r3, #0 + str r3, [r0, #4] + str r2, [r0, #4] + ldr r2, .L443 + add r1, r2, r1 + movw r2, #661 + ldrsb r2, [r1, r2] + str r2, [r0] + str r3, [r0] + str r3, [r0] + str r3, [r0] + b nandc_wait_flash_ready +.L444: + .align 2 +.L443: + .word .LANCHOR1 + .fnend + .size toshiba_3d_set_slc_rr_para, .-toshiba_3d_set_slc_rr_para + .align 2 + .global toshiba_tlc_set_rr_para + .syntax unified + .arm + .fpu softvfp + .type toshiba_tlc_set_rr_para, %function +toshiba_tlc_set_rr_para: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + cmp r2, #0 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + ldr r3, .L449 + mov r6, #239 + beq .L446 + rsb r5, r1, r1, lsl #3 + mov r2, #18 + str r6, [r0, #8] + mov r4, r0 + add r5, r3, r5 + str r2, [r0, #4] + ldrb r3, [r5, #36] @ zero_extendqisi2 + str r3, [r0] + ldrb r3, [r5, #37] @ zero_extendqisi2 + str r3, [r0] + ldrb r3, [r5, #38] @ zero_extendqisi2 + str r3, [r0] + ldrb r3, [r5, #39] @ zero_extendqisi2 + str r3, [r0] + bl nandc_wait_flash_ready + mov r3, #19 + str r6, [r4, #8] + str r3, [r4, #4] + ldrb r3, [r5, #40] @ zero_extendqisi2 + str r3, [r4] + ldrb r3, [r5, #41] @ zero_extendqisi2 + str r3, [r4] + ldrb r3, [r5, #42] @ zero_extendqisi2 + str r3, [r4] + mov r3, #0 + str r3, [r4] +.L447: + pop {r4, r5, r6, lr} + b nandc_wait_flash_ready +.L446: + mov ip, #20 + add r5, r3, r1 + str r6, [r0, #8] + str ip, [r0, #4] + ldrb r3, [r5, #365] @ zero_extendqisi2 + str r3, [r0] + str r2, [r0] + str r2, [r0] + str r2, [r0] + b .L447 +.L450: + .align 2 +.L449: + .word .LANCHOR2 + .fnend + .size toshiba_tlc_set_rr_para, .-toshiba_tlc_set_rr_para + .align 2 + .global ymtc_3d_set_tlc_rr_para + .syntax unified + .arm + .fpu softvfp + .type ymtc_3d_set_tlc_rr_para, %function +ymtc_3d_set_tlc_rr_para: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + rsb r1, r1, r1, lsl #3 + ldr r5, .L453 + mov r7, #239 + mov r3, #160 + mov r6, #0 + str r7, [r0, #8] + mov r4, r0 + add r5, r5, r1 + str r3, [r0, #4] + movw r3, #671 + ldrsb r3, [r5, r3] + str r3, [r0] + movw r3, #675 + ldrsb r3, [r5, r3] + str r3, [r0] + str r6, [r0] + str r6, [r0] + bl nandc_wait_flash_ready + mov r3, #161 + str r7, [r4, #8] + str r3, [r4, #4] + add r3, r5, #672 + ldrsb r3, [r3] + str r3, [r4] + movw r3, #674 + ldrsb r3, [r5, r3] + str r3, [r4] + add r3, r5, #676 + ldrsb r3, [r3] + str r3, [r4] + str r6, [r4] + bl nandc_wait_flash_ready + mov r3, #162 + str r7, [r4, #8] + str r3, [r4, #4] + movw r3, #673 + ldrsb r3, [r5, r3] + str r3, [r4] + movw r3, #677 + ldrsb r3, [r5, r3] + str r3, [r4] + str r6, [r4] + str r6, [r4] + pop {r4, r5, r6, r7, r8, lr} + b nandc_wait_flash_ready +.L454: + .align 2 +.L453: + .word .LANCHOR1 + .fnend + .size ymtc_3d_set_tlc_rr_para, .-ymtc_3d_set_tlc_rr_para + .align 2 + .global ymtc_3d_set_slc_rr_para + .syntax unified + .arm + .fpu softvfp + .type ymtc_3d_set_slc_rr_para, %function +ymtc_3d_set_slc_rr_para: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + mov r3, #239 + str r3, [r0, #8] + mov r3, #163 + str r3, [r0, #4] + ldr r3, .L456 + add r1, r3, r1 + movw r3, #1028 + ldrsb r3, [r1, r3] + str r3, [r0] + mov r3, #0 + str r3, [r0] + str r3, [r0] + str r3, [r0] + b nandc_wait_flash_ready +.L457: + .align 2 +.L456: + .word .LANCHOR1 + .fnend + .size ymtc_3d_set_slc_rr_para, .-ymtc_3d_set_slc_rr_para + .align 2 + .global flash_start_plane_read + .syntax unified + .arm + .fpu softvfp + .type flash_start_plane_read, %function +flash_start_plane_read: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + mov r3, #1 + ldr r4, .L487 + ubfx r9, r0, #24, #2 + ldrb r6, [r4, #1153] @ zero_extendqisi2 + rsb r2, r6, #24 + lsl r6, r3, r6 + lsl r5, r3, r2 + ldrb r3, [r4, #1109] @ zero_extendqisi2 + sub r6, r6, #1 + sub r5, r5, #1 + and r6, r6, r0, lsr r2 + and r7, r5, r0 + and r5, r5, r1 + uxtb r6, r6 + cmp r3, r6 + bhi .L459 + movw r2, #1148 + ldr r1, .L487+4 + ldr r0, .L487+8 + bl rk_printk + bl dump_stack +.L459: + add r6, r4, r6 + ldr r8, [r4, #1044] + ldrb r6, [r6, #1144] @ zero_extendqisi2 + mov r0, r6 + bl nandc_cs + cmp r9, #0 + lsl r10, r6, #8 + bne .L460 + mov r0, r7 + bl slc_phy_page_address_calc + mov r7, r0 + mov r0, r5 + bl slc_phy_page_address_calc + ldrb r3, [r4] @ zero_extendqisi2 + mov r5, r0 + cmp r3, #0 + beq .L461 + mov r0, r6 + bl zftl_flash_enter_slc_mode +.L461: + ldrb r3, [r4, #1127] @ zero_extendqisi2 + uxtb ip, r7 + lsr r0, r7, #8 + lsr r1, r7, #16 + cmp r3, #1 + bne .L463 + ldrb r3, [r4, #1119] @ zero_extendqisi2 + add r6, r8, r10 + str r3, [r6, #2056] + mov r3, #0 + str r3, [r6, #2052] + str r3, [r6, #2052] + ldrb r3, [r4, #1152] @ zero_extendqisi2 + str ip, [r6, #2052] + str r0, [r6, #2052] + cmp r3, #0 + ldrb r3, [r4, #1120] @ zero_extendqisi2 + lsrne r7, r7, #24 + str r1, [r6, #2052] + strne r7, [r6, #2052] + add r7, r8, r10 + str r3, [r7, #2056] + bl nandc_wait_flash_ready + ldr r3, [r4, #1104] + cmp r9, #0 + add r2, r8, r10 + add r8, r8, r10 + ldrb r3, [r3, #12] @ zero_extendqisi2 + sub r3, r3, #3 + clz r3, r3 + lsr r3, r3, #5 + moveq r3, #0 + cmp r3, #0 + mov r3, #0 + strne r9, [r7, #2056] + str r3, [r2, #2056] + str r3, [r6, #2052] + str r3, [r6, #2052] + uxtb r3, r5 + str r3, [r6, #2052] + lsr r3, r5, #8 + str r3, [r6, #2052] + lsr r3, r5, #16 + str r3, [r6, #2052] + ldrb r3, [r4, #1152] @ zero_extendqisi2 + cmp r3, #0 + lsrne r5, r5, #24 + strne r5, [r6, #2052] +.L486: + mov r3, #48 + str r3, [r8, #2056] + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L460: + ldr r3, [r4, #1104] + ldrb r3, [r3, #12] @ zero_extendqisi2 + cmp r3, #3 + bne .L462 + ldrb r3, [r4, #1158] @ zero_extendqisi2 + cmp r3, #0 + bne .L462 + ldrb r3, [r4, #1159] @ zero_extendqisi2 + cmp r3, #0 + addeq r3, r8, r10 + streq r9, [r3, #2056] + beq .L461 +.L462: + mov r0, r6 + bl zftl_flash_exit_slc_mode + b .L461 +.L463: + ldr r2, [r4, #1104] + ldrb r3, [r2, #7] @ zero_extendqisi2 + cmp r3, #1 + bne .L468 + ldrb r3, [r2, #12] @ zero_extendqisi2 + cmp r3, #2 + addeq r3, r8, r10 + moveq lr, #38 + streq lr, [r3, #2056] +.L468: + ldrb lr, [r4, #1119] @ zero_extendqisi2 + add r3, r8, r10 + cmp r9, #0 + add r8, r8, r10 + str lr, [r3, #2056] + str ip, [r3, #2052] + str r0, [r3, #2052] + str r1, [r3, #2052] + ldrb r2, [r2, #12] @ zero_extendqisi2 + sub r2, r2, #3 + clz r2, r2 + lsr r2, r2, #5 + moveq r2, #0 + cmp r2, #0 + ldrb r2, [r4, #1120] @ zero_extendqisi2 + strne r9, [r3, #2056] + str r2, [r8, #2056] + uxtb r2, r5 + str r2, [r3, #2052] + lsr r2, r5, #8 + lsr r5, r5, #16 + str r2, [r3, #2052] + str r5, [r3, #2052] + b .L486 +.L488: + .align 2 +.L487: + .word .LANCHOR0 + .word .LANCHOR1+1038 + .word .LC0 + .fnend + .size flash_start_plane_read, .-flash_start_plane_read + .align 2 + .global flash_set_interface_mode + .syntax unified + .arm + .fpu softvfp + .type flash_set_interface_mode, %function +flash_set_interface_mode: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + mov r8, r0 + ldr r6, .L528 + mov r10, #0 + ldr r9, .L528+4 + mov r7, r6 +.L502: + ldrb r4, [r9, r10, lsl #3] @ zero_extendqisi2 + ldr r5, [r6, #1044] + cmp r4, #69 + beq .L490 + add r3, r4, #119 + sub r1, r4, #44 + uxtb r2, r3 + clz r1, r1 + lsr r1, r1, #5 + cmp r2, #18 + ldrls r3, .L528+8 + movhi r3, #1 + mvnls r3, r3, lsr r2 + and r3, r3, #1 + eor r3, r3, #1 + orrs r3, r1, r3 + beq .L492 +.L490: + cmp r8, #1 + ldrb r1, [r7, #1192] @ zero_extendqisi2 + bne .L493 + tst r1, #1 + beq .L492 + ldr r3, .L528+12 + ldr r3, [r3] + tst r3, #4096 + beq .L494 + ldr r0, .L528+16 + bl rk_printk +.L494: + lsl r2, r10, #8 + cmp r4, #137 + cmpne r4, #44 + mov r1, #239 + add r3, r5, r2 + str r1, [r3, #2056] + bne .L495 +.L527: + mov r1, #1 + str r1, [r3, #2052] + mov r1, #5 + b .L525 +.L495: + cmp r4, #155 + movne r1, #128 + strne r1, [r3, #2052] + movne r1, #1 + beq .L527 +.L525: + str r1, [r3, #2048] + add r5, r5, r2 + mov r3, #0 + str r3, [r5, #2048] + str r3, [r5, #2048] + str r3, [r5, #2048] +.L492: + add r10, r10, #1 + cmp r10, #4 + bne .L502 + bl nandc_wait_flash_ready + mov r0, #0 + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L493: + tst r1, #4 + beq .L492 + ldr r3, .L528+12 + ldr r3, [r3] + tst r3, #4096 + beq .L498 + ldr r0, .L528+20 + bl rk_printk +.L498: + lsl r2, r10, #8 + mov r1, #239 + cmp r4, #137 + cmpne r4, #44 + add r3, r5, r2 + str r1, [r3, #2056] + moveq r1, #1 + moveq r1, #1 + movne r1, #0 + streq r1, [r3, #2052] + moveq r1, #35 + beq .L525 + cmp r4, #155 + moveq r1, #1 + movne r0, #128 + streq r1, [r3, #2052] + moveq r1, #37 + strne r0, [r3, #2052] + b .L525 +.L529: + .align 2 +.L528: + .word .LANCHOR0 + .word .LANCHOR0+1160 + .word 294913 + .word .LANCHOR2 + .word .LC34 + .word .LC35 + .fnend + .size flash_set_interface_mode, .-flash_set_interface_mode + .align 2 + .syntax unified + .arm + .fpu softvfp + .type mt_auto_read_calibration_config, %function +mt_auto_read_calibration_config: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + mov r5, r1 + mov r6, r0 + bl nandc_wait_flash_ready + ldr r3, .L532 + mov r0, #200 + ldr r4, [r3, #1044] + mov r3, #239 + add r4, r4, r6, lsl #8 + str r3, [r4, #2056] + mov r3, #150 + str r3, [r4, #2052] + bl ndelay + mov r3, #0 + str r5, [r4, #2048] + str r3, [r4, #2048] + str r3, [r4, #2048] + str r3, [r4, #2048] + pop {r4, r5, r6, pc} +.L533: + .align 2 +.L532: + .word .LANCHOR0 + .fnend + .size mt_auto_read_calibration_config, .-mt_auto_read_calibration_config + .align 2 + .global flash_reset + .syntax unified + .arm + .fpu softvfp + .type flash_reset, %function +flash_reset: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L535 + ldr r3, [r3, #1044] + add r0, r3, r0, lsl #8 + mov r3, #255 + str r3, [r0, #2056] + b nandc_wait_flash_ready +.L536: + .align 2 +.L535: + .word .LANCHOR0 + .fnend + .size flash_reset, .-flash_reset + .align 2 + .global flash_read_id + .syntax unified + .arm + .fpu softvfp + .type flash_read_id, %function +flash_read_id: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r3, r4, r5, r6, lr} + .save {r4, r5, r6, lr} + .pad #16 + mov r6, r0 + ldr r3, .L540 + mov r4, r1 + ldr r5, [r3, #1044] + bl flash_reset + mov r0, r6 + bl nandc_cs + add r5, r5, r6, lsl #8 + mov r3, #144 + mov r0, #200 + str r3, [r5, #2056] + mov r3, #0 + str r3, [r5, #2052] + bl ndelay + ldr r3, [r5, #2048] + strb r3, [r4] + ldr r3, [r5, #2048] + strb r3, [r4, #1] + ldr r3, [r5, #2048] + strb r3, [r4, #2] + ldr r3, [r5, #2048] + strb r3, [r4, #3] + ldr r3, [r5, #2048] + strb r3, [r4, #4] + ldr r3, [r5, #2048] + strb r3, [r4, #5] + ldr r3, [r5, #2048] + strb r3, [r4, #6] + ldr r3, [r5, #2048] + strb r3, [r4, #7] + bl nandc_de_cs.constprop.35 + ldrb r2, [r4] @ zero_extendqisi2 + sub r3, r2, #1 + uxtb r3, r3 + cmp r3, #253 + bhi .L537 + ldrb r1, [r4, #5] @ zero_extendqisi2 + ldrb r3, [r4, #1] @ zero_extendqisi2 + ldr r0, .L540+4 + str r1, [sp, #12] + ldrb r1, [r4, #4] @ zero_extendqisi2 + str r1, [sp, #8] + ldrb r1, [r4, #3] @ zero_extendqisi2 + str r1, [sp, #4] + ldrb r1, [r4, #2] @ zero_extendqisi2 + str r1, [sp] + add r1, r6, #1 + bl rk_printk +.L537: + add sp, sp, #16 + @ sp needed + pop {r4, r5, r6, pc} +.L541: + .align 2 +.L540: + .word .LANCHOR0 + .word .LC36 + .fnend + .size flash_read_id, .-flash_read_id + .align 2 + .global flash_read_spare + .syntax unified + .arm + .fpu softvfp + .type flash_read_spare, %function +flash_read_spare: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + mov r5, r2 + ldr r3, .L544 + ldr r2, .L544+4 + ldrb r3, [r3, #13] @ zero_extendqisi2 + ldr r4, [r2, #1044] + mov r2, #0 + lsl r3, r3, #9 + add r4, r4, r0, lsl #8 + str r2, [r4, #2056] + str r3, [r4, #2052] + lsr r3, r3, #8 + str r3, [r4, #2052] + uxtb r3, r1 + str r3, [r4, #2052] + lsr r3, r1, #8 + lsr r1, r1, #16 + str r3, [r4, #2052] + mov r3, #48 + str r1, [r4, #2052] + str r3, [r4, #2056] + bl nandc_wait_flash_ready + ldr r3, [r4, #2048] + strb r3, [r5] + pop {r4, r5, r6, pc} +.L545: + .align 2 +.L544: + .word .LANCHOR2 + .word .LANCHOR0 + .fnend + .size flash_read_spare, .-flash_read_spare + .align 2 + .global flash_read_otp_data + .syntax unified + .arm + .fpu softvfp + .type flash_read_otp_data, %function +flash_read_otp_data: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L550 + push {r0, r1, r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + .pad #8 + mov r9, r0 + lsl r9, r9, #8 + mov r6, r1 + mov r5, r2 + ldr r8, [r3, #1044] + mov r10, #144 + bl nandc_cs + mov r3, #239 + mov r0, #50 + add r4, r8, r9 + mov r7, #0 + str r3, [r4, #2056] + str r10, [r4, #2052] + bl ndelay + mov r3, #1 + str r3, [r4, #2048] + str r7, [r4, #2048] + str r7, [r4, #2048] + str r7, [r4, #2048] + bl nandc_wait_flash_ready + mov r3, #238 + ldr r0, .L550+4 + str r3, [r4, #2056] + str r10, [r4, #2052] + ldr r2, [r4, #2048] + ldr r3, [r4, #2048] + ldr r1, [r4, #2048] + str r1, [sp] + mov r1, r6 + bl rk_printk + bl nandc_wait_flash_ready + uxtb r3, r6 + str r7, [r4, #2056] + str r7, [r4, #2052] + str r7, [r4, #2052] + str r3, [r4, #2052] + lsr r3, r6, #8 + lsr r6, r6, #16 + str r3, [r4, #2052] + mov r3, #48 + str r6, [r4, #2052] + str r3, [r4, #2056] + bl nandc_wait_flash_ready + add r3, r5, #16384 + mov r2, r5 +.L547: + ldr r1, [r4, #2048] + strb r1, [r2], #1 + cmp r2, r3 + bne .L547 + add r8, r8, r9 + mov r3, #239 + str r3, [r8, #2056] + mov r3, #144 + str r3, [r4, #2052] + mov r0, #50 + bl ndelay + mov r3, #0 + str r3, [r4, #2048] + str r3, [r4, #2048] + str r3, [r4, #2048] + str r3, [r4, #2048] + add sp, sp, #8 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, lr} + b nandc_de_cs.constprop.35 +.L551: + .align 2 +.L550: + .word .LANCHOR0 + .word .LC37 + .fnend + .size flash_read_otp_data, .-flash_read_otp_data + .align 2 + .global sandisk_prog_test_bad_block + .syntax unified + .arm + .fpu softvfp + .type sandisk_prog_test_bad_block, %function +sandisk_prog_test_bad_block: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + lsl r7, r0, #8 + ldr r3, .L568 + mov r8, r1 + ldr r6, .L568+4 + ldr r5, [r3, #1044] + ldrb r3, [r6, #33] @ zero_extendqisi2 + add r4, r5, r7 + cmp r3, #0 + addne r2, r5, r7 + addeq r3, r5, r7 + moveq r2, #162 + strne r3, [r2, #2056] + streq r2, [r3, #2056] + mov r3, #128 + str r3, [r4, #2056] + mov r3, #0 + str r3, [r4, #2052] + str r3, [r4, #2052] + uxtb r3, r1 + str r3, [r4, #2052] + lsr r3, r1, #8 + str r3, [r4, #2052] + lsr r3, r1, #16 + str r3, [r4, #2052] + mov r3, #16 + str r3, [r4, #2056] + bl nandc_wait_flash_ready + mov r3, #112 + mov r0, #200 + str r3, [r4, #2056] + bl ndelay + ldr r2, [r4, #2048] + cmp r2, #255 + ldreq r2, [r4, #2048] + ands r4, r2, #5 + beq .L556 + ldr r3, [r6] + tst r3, #4096 + beq .L556 + mov r1, r8 + ldr r0, .L568+8 + bl rk_printk +.L556: + ldrb r3, [r6, #34] @ zero_extendqisi2 + mov r0, r4 + cmp r3, #0 + addne r5, r5, r7 + strne r3, [r5, #2056] + pop {r4, r5, r6, r7, r8, pc} +.L569: + .align 2 +.L568: + .word .LANCHOR0 + .word .LANCHOR2 + .word .LC38 + .fnend + .size sandisk_prog_test_bad_block, .-sandisk_prog_test_bad_block + .align 2 + .global nandc_rdy_status + .syntax unified + .arm + .fpu softvfp + .type nandc_rdy_status, %function +nandc_rdy_status: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L572 + .pad #8 + sub sp, sp, #8 + ldr r3, [r3, #1044] + ldr r3, [r3] + str r3, [sp, #4] + ldr r0, [sp, #4] + ubfx r0, r0, #9, #1 + add sp, sp, #8 + @ sp needed + bx lr +.L573: + .align 2 +.L572: + .word .LANCHOR0 + .fnend + .size nandc_rdy_status, .-nandc_rdy_status + .align 2 + .global nandc_bch_sel + .syntax unified + .arm + .fpu softvfp + .type nandc_bch_sel, %function +nandc_bch_sel: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + .pad #8 + sub sp, sp, #8 + mov r3, #0 + str r3, [sp, #4] + ldr r2, [sp, #4] + orr r2, r2, #1 + str r2, [sp, #4] + ldr r2, .L586 + ldrb r1, [r2, #1028] @ zero_extendqisi2 + strb r0, [r2, #1193] + cmp r1, #9 + bne .L575 + ldr r2, [r2, #1044] + cmp r0, #70 + ldr r1, [sp, #4] + str r1, [r2, #16] + beq .L576 + cmp r0, #60 + moveq r3, #3 + beq .L576 + cmp r0, #40 + moveq r3, #2 + movne r3, #1 +.L576: + mov r1, #0 + str r1, [sp] + ldr r1, [sp] + bfi r1, r3, #25, #3 + str r1, [sp] + ldr r3, [sp] + orr r3, r3, #1 + str r3, [sp] + ldr r3, [sp] + str r3, [r2, #32] +.L574: + add sp, sp, #8 + @ sp needed + bx lr +.L575: + ldr r1, [r2, #1044] + mov ip, #16 + ldr r2, [sp, #4] + cmp r0, ip + str r2, [r1, #8] + str r3, [sp] + ldr r2, [sp] + bfi r2, ip, #8, #8 + str r2, [sp] + ldr r2, [sp] + bfi r2, r3, #18, #1 + str r2, [sp] + bne .L578 +.L585: + ldr r2, [sp] + bfi r2, r3, #4, #1 + str r2, [sp] + b .L579 +.L578: + cmp r0, #24 + ldreq r3, [sp] + orreq r3, r3, #16 + streq r3, [sp] + beq .L579 + ldr r2, [sp] + cmp r0, #40 + orr r2, r2, #262144 + str r2, [sp] + ldr r2, [sp] + orr r2, r2, #16 + str r2, [sp] + beq .L585 +.L579: + ldr r3, [sp] + orr r3, r3, #1 + str r3, [sp] + ldr r3, [sp] + str r3, [r1, #12] + b .L574 +.L587: + .align 2 +.L586: + .word .LANCHOR0 + .fnend + .size nandc_bch_sel, .-nandc_bch_sel + .align 2 + .global zftl_flash_resume + .syntax unified + .arm + .fpu softvfp + .type zftl_flash_resume, %function +zftl_flash_resume: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + ldr r4, .L599 + ldrb r3, [r4, #1028] @ zero_extendqisi2 + ldr r2, [r4, #1048] + cmp r3, #9 + ldr r3, [r4, #1044] + str r2, [r3] + ldr r2, [r4, #1052] + ldr r3, [r4, #1044] + str r2, [r3, #4] + ldr r2, [r4, #1056] + bne .L589 + str r2, [r3, #16] + ldr r2, [r4, #1060] + str r2, [r3, #32] + ldr r2, [r4, #1064] + str r2, [r3, #80] + ldr r2, [r4, #1068] + str r2, [r3, #84] + ldr r2, [r4, #1072] + str r2, [r3, #520] + ldr r2, [r4, #1076] + str r2, [r3, #8] +.L591: + ldr r6, .L599+4 + mov r5, #0 + mov r8, #2 + sub r7, r6, #6 +.L590: + ldrb r3, [r6, r5, lsl #3] @ zero_extendqisi2 + sub r3, r3, #1 + uxtb r3, r3 + cmp r3, #253 + bhi .L592 + uxtb r9, r5 + mov r0, r9 + bl flash_reset + strb r8, [r5, r7] + mov r0, r9 + bl zftl_flash_enter_slc_mode +.L592: + add r5, r5, #1 + cmp r5, #4 + bne .L590 + ldrb r3, [r4, #1143] @ zero_extendqisi2 + cmp r3, #0 + beq .L593 + mov r0, #1 + bl nandc_set_if_mode + mov r0, r5 + bl flash_set_interface_mode + mov r0, r5 + bl nandc_set_if_mode + ldrb r0, [r4, #1065] @ zero_extendqisi2 + bl nandc_set_ddr_para +.L593: + ldr r3, .L599+8 + pop {r4, r5, r6, r7, r8, r9, r10, lr} + ldrb r0, [r3, #24] @ zero_extendqisi2 + b nandc_bch_sel +.L589: + str r2, [r3, #8] + ldr r2, [r4, #1060] + str r2, [r3, #12] + ldr r2, [r4, #1064] + str r2, [r3, #304] + ldr r2, [r4, #1068] + str r2, [r3, #308] + ldr r2, [r4, #1072] + str r2, [r3, #336] + ldr r2, [r4, #1076] + str r2, [r3, #344] + b .L591 +.L600: + .align 2 +.L599: + .word .LANCHOR0 + .word .LANCHOR0+1160 + .word .LANCHOR2 + .fnend + .size zftl_flash_resume, .-zftl_flash_resume + .align 2 + .global rk_nandc_flash_ready + .syntax unified + .arm + .fpu softvfp + .type rk_nandc_flash_ready, %function +rk_nandc_flash_ready: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + mov r1, #1 + b nandc_irq_disable + .fnend + .size rk_nandc_flash_ready, .-rk_nandc_flash_ready + .align 2 + .global nandc_iqr_wait_flash_ready + .syntax unified + .arm + .fpu softvfp + .type nandc_iqr_wait_flash_ready, %function +nandc_iqr_wait_flash_ready: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, lr} + .save {r4, lr} + ldr r4, .L607 + ldr r0, [r4, #1044] + bl rk_nandc_rb_irq_flag_init + ldrb r3, [r4, #1028] @ zero_extendqisi2 + ldr r0, [r4, #1044] + cmp r3, #9 + ldreq r3, [r0, #292] + ldrne r3, [r0, #368] + orreq r3, r3, #2 + orrne r3, r3, #2 + streq r3, [r0, #292] + strne r3, [r0, #368] + ldreq r3, [r0, #288] + ldrne r3, [r0, #364] + orreq r3, r3, #2 + orrne r3, r3, #2 + streq r3, [r0, #288] + strne r3, [r0, #364] + ldr r3, [r0] + tst r3, #512 + bne .L605 + pop {r4, lr} + b wait_for_nand_flash_ready +.L605: + mov r1, #1 + pop {r4, lr} + b nandc_irq_disable +.L608: + .align 2 +.L607: + .word .LANCHOR0 + .fnend + .size nandc_iqr_wait_flash_ready, .-nandc_iqr_wait_flash_ready + .align 2 + .global flash_erase_duplane_block + .syntax unified + .arm + .fpu softvfp + .type flash_erase_duplane_block, %function +flash_erase_duplane_block: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r10, r3 + ldr r7, .L634 + mov r4, r0 + mov r5, r1 + mov r6, r2 + ldrb r3, [r7, #1109] @ zero_extendqisi2 + cmp r3, r0 + bhi .L610 + movw r2, #695 + ldr r1, .L634+4 + ldr r0, .L634+8 + bl rk_printk + bl dump_stack +.L610: + ldrb r3, [r7, #1109] @ zero_extendqisi2 + cmp r3, r4 + bls .L619 + ldr r3, .L634+12 + add r4, r7, r4 + ldrb r4, [r4, #1144] @ zero_extendqisi2 + ldr r9, [r7, #1044] + ldr r3, [r3] + add r8, r4, #8 + tst r3, #16 + add r8, r9, r8, lsl #8 + beq .L612 + mov r3, r10 + mov r2, r6 + mov r1, r4 + ldr r0, .L634+16 + bl rk_printk +.L612: + bl nandc_wait_flash_ready + mov r0, r4 + bl nandc_cs + cmp r5, #0 + mov r0, r4 + bne .L613 + bl zftl_flash_enter_slc_mode +.L614: + lsl r4, r4, #8 + mov r3, #96 + add r5, r9, r4 + str r3, [r5, #2056] + uxtb r3, r6 + str r3, [r5, #2052] + lsr r3, r6, #8 + str r3, [r5, #2052] + lsr r3, r6, #16 + str r3, [r5, #2052] + ldrb r3, [r7, #1152] @ zero_extendqisi2 + cmp r3, #0 + lsrne r3, r6, #24 + strne r3, [r5, #2052] + ldrb r3, [r7, #1194] @ zero_extendqisi2 + cmp r3, #0 + movne fp, #0 + bne .L616 + add r3, r9, r4 + mov r2, #208 + str r2, [r3, #2056] + bl nandc_wait_flash_ready + mov r0, r8 + bl flash_read_status + and fp, r0, #5 +.L616: + mov r2, #96 + add r3, r9, r4 + str r2, [r3, #2056] + uxtb r3, r10 + add r0, r9, r4 + str r3, [r5, #2052] + lsr r3, r10, #8 + str r3, [r5, #2052] + lsr r3, r10, #16 + str r3, [r5, #2052] + ldrb r3, [r7, #1152] @ zero_extendqisi2 + cmp r3, #0 + mov r3, #208 + lsrne r2, r10, #24 + strne r2, [r5, #2052] + str r3, [r0, #2056] + bl nandc_iqr_wait_flash_ready + bl nandc_wait_flash_ready + mov r0, r8 + bl flash_read_status + bl nandc_de_cs.constprop.35 + and r3, r0, #5 + orrs fp, r3, fp + beq .L618 + mov r2, r0 + mov r1, r6 + ldr r0, .L634+20 + bl rk_printk +.L618: + mov r0, fp + pop {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L613: + bl zftl_flash_exit_slc_mode + b .L614 +.L619: + mvn r0, #0 + pop {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L635: + .align 2 +.L634: + .word .LANCHOR0 + .word .LANCHOR1+1061 + .word .LC0 + .word .LANCHOR2 + .word .LC39 + .word .LC40 + .fnend + .size flash_erase_duplane_block, .-flash_erase_duplane_block + .align 2 + .global flash_erase_block_en + .syntax unified + .arm + .fpu softvfp + .type flash_erase_block_en, %function +flash_erase_block_en: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r7, r0 + ldr r5, .L655 + mov fp, r1 + mov r8, r2 + ldrb r6, [r5, #1153] @ zero_extendqisi2 + rsb r3, r6, #24 + mvn r6, #0 + bic r6, r2, r6, lsl r3 + ldrb r3, [r5, #1109] @ zero_extendqisi2 + cmp r3, r0 + bhi .L637 + movw r2, #757 + ldr r1, .L655+4 + ldr r0, .L655+8 + bl rk_printk + bl dump_stack +.L637: + ldrb r3, [r5, #1109] @ zero_extendqisi2 + cmp r3, r7 + bls .L644 + add r3, r5, r7 + ldr r9, [r5, #1044] + ldrb r4, [r3, #1144] @ zero_extendqisi2 + ldr r3, .L655+12 + add r10, r4, #8 + ldr r3, [r3] + add r10, r9, r10, lsl #8 + tst r3, #16 + beq .L639 + mov r3, fp + mov r2, r8 + mov r1, r4 + ldr r0, .L655+16 + bl rk_printk +.L639: + bl nandc_wait_flash_ready + mov r0, r4 + bl nandc_cs + cmp fp, #0 + mov r0, r4 + bne .L640 + bl zftl_flash_enter_slc_mode +.L641: + lsl r4, r4, #8 + mov r2, #96 + add r3, r9, r4 + add r4, r9, r4 + str r2, [r3, #2056] + uxtb r2, r6 + str r2, [r3, #2052] + lsr r2, r6, #8 + str r2, [r3, #2052] + lsr r2, r6, #16 + str r2, [r3, #2052] + ldrb r2, [r5, #1152] @ zero_extendqisi2 + cmp r2, #0 + lsrne r6, r6, #24 + strne r6, [r3, #2052] + mov r3, #208 + str r3, [r4, #2056] + bl nandc_iqr_wait_flash_ready + bl nandc_wait_flash_ready + mov r0, r10 + bl flash_read_status + bl nandc_de_cs.constprop.35 + ands r4, r0, #5 + beq .L643 + ldrh r1, [r5, #2] + mov r0, r8 + bl __aeabi_uidiv + mov r3, r4 + mvn r4, #0 + mov r2, r0 + mov r1, r7 + ldr r0, .L655+20 + bl rk_printk +.L643: + mov r0, r4 + pop {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L640: + bl zftl_flash_exit_slc_mode + b .L641 +.L644: + mvn r0, #0 + pop {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L656: + .align 2 +.L655: + .word .LANCHOR0 + .word .LANCHOR1+1087 + .word .LC0 + .word .LANCHOR2 + .word .LC41 + .word .LC42 + .fnend + .size flash_erase_block_en, .-flash_erase_block_en + .align 2 + .global flash_erase_block + .syntax unified + .arm + .fpu softvfp + .type flash_erase_block, %function +flash_erase_block: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + mov r2, r1 + mov r1, #0 + b flash_erase_block_en + .fnend + .size flash_erase_block, .-flash_erase_block + .align 2 + .global flash_erase_all + .syntax unified + .arm + .fpu softvfp + .type flash_erase_all, %function +flash_erase_all: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L664 + push {r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + mov r5, #0 + ldr r7, .L664+4 + ldrb r4, [r3, #17] @ zero_extendqisi2 + ldrh r3, [r3, #18] + mov r8, r7 + smulbb r4, r4, r3 + uxth r4, r4 +.L659: + ldrb r2, [r7, #1109] @ zero_extendqisi2 + uxth r3, r5 + cmp r2, r3 + bhi .L662 + mov r1, #0 + ldr r0, .L664+8 + pop {r4, r5, r6, r7, r8, r9, r10, lr} + b rk_printk +.L662: + uxtah r3, r7, r5 + mov r6, #0 + ldrb r9, [r3, #1144] @ zero_extendqisi2 +.L660: + uxth r3, r6 + cmp r4, r3 + addls r5, r5, #1 + bls .L659 +.L661: + ldrh r1, [r8, #2] + mov r0, r9 + mul r1, r6, r1 + add r6, r6, #1 + bl flash_erase_block + b .L660 +.L665: + .align 2 +.L664: + .word .LANCHOR2 + .word .LANCHOR0 + .word .LC43 + .fnend + .size flash_erase_all, .-flash_erase_all + .align 2 + .global rk_nandc_flash_xfer_completed + .syntax unified + .arm + .fpu softvfp + .type rk_nandc_flash_xfer_completed, %function +rk_nandc_flash_xfer_completed: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + mov r1, #0 + b nandc_irq_disable + .fnend + .size rk_nandc_flash_xfer_completed, .-rk_nandc_flash_xfer_completed + .align 2 + .global nandc_xfer_start + .syntax unified + .arm + .fpu softvfp + .type nandc_xfer_start, %function +nandc_xfer_start: + .fnstart + @ args = 0, pretend = 0, frame = 16 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r3, r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + .pad #16 + mov r5, r0 + ldr r4, .L684 + mov r0, r2 + and r6, r5, #1 + add ip, r1, #1 + ldrb r2, [r4, #1028] @ zero_extendqisi2 + cmp r2, #9 + bne .L668 + mov r1, #0 + mov lr, #1 + str r1, [sp, #4] + ubfx ip, ip, #1, #6 + ldr r2, [sp, #4] + bfi r2, r6, #1, #1 + str r2, [sp, #4] + ldr r2, [sp, #4] + orr r2, r2, #8 + str r2, [sp, #4] + ldr r2, [sp, #4] + bfi r2, lr, #5, #2 + str r2, [sp, #4] + ldr r2, [sp, #4] + orr r2, r2, #536870912 + str r2, [sp, #4] + ldr r2, [sp, #4] + orr r2, r2, #1024 + str r2, [sp, #4] + ldr r2, [sp, #4] + bfi r2, r1, #4, #1 + str r2, [sp, #4] + ldr r2, [sp, #4] + bfi r2, ip, #22, #6 + str r2, [sp, #4] + ldr r2, [sp, #4] + orr r2, r2, #128 + str r2, [sp, #4] + ldrb r2, [r4, #1195] @ zero_extendqisi2 + cmp r2, r1 + beq .L669 + ldrb r2, [r4, #1196] @ zero_extendqisi2 + cmp r2, r1 + ldrne r2, [sp, #4] + orrne r2, r2, #512 + strne r2, [sp, #4] +.L669: + ldr r1, [sp, #4] + mov r2, r5 + str r3, [r4, #1208] + str r0, [r4, #1204] + ubfx r1, r1, #22, #6 + lsl r1, r1, #10 + bl rknand_dma_map_single + ldr r1, [sp, #4] + mov r2, r5 + str r0, [r4, #1212] + clz r5, r5 + ldr r0, [r4, #1208] + lsr r5, r5, #5 + ubfx r1, r1, #22, #6 + lsl r1, r1, #2 + bl rknand_dma_map_single + mov r3, #1 + ldr r2, [r4, #1212] + str r3, [r4, #1220] + mov r1, #16 + ldr r3, [r4, #1044] + str r0, [r4, #1216] + str r2, [r3, #52] + str r0, [r3, #56] + ldr r2, [r3, #48] + str r2, [sp, #8] + ldr r2, [sp, #8] + bfi r2, r1, #9, #5 + mov r1, #2 + str r2, [sp, #8] + ldr r2, [sp, #8] + orr r2, r2, #448 + str r2, [sp, #8] + ldr r2, [sp, #8] + bfi r2, r1, #3, #3 + str r2, [sp, #8] + ldr r2, [sp, #8] + orr r2, r2, #4 + str r2, [sp, #8] + ldr r2, [sp, #8] + bfi r2, r5, #1, #1 + str r2, [sp, #8] + ldr r2, [sp, #8] + orr r2, r2, #1 + str r2, [sp, #8] + movw r2, #1228 + ldrh r1, [r4, r2] + ldr r2, [sp, #8] + bfi r2, r1, #16, #11 + str r2, [sp, #8] + ldr r2, [sp, #8] + str r2, [r3, #48] + ldr r2, [sp, #4] + str r2, [r3, #16] + ldr r2, [sp, #4] + orr r2, r2, #4 + str r2, [sp, #4] + ldr r2, [sp, #4] + str r2, [r3, #16] +.L667: + add sp, sp, #16 + @ sp needed + pop {r4, r5, r6, r7, r8, pc} +.L668: + ldr r2, [r4, #1044] + mov lr, #16 + ubfx ip, ip, #1, #6 + ldr r2, [r2, #12] + str r2, [sp, #12] + ldr r2, [sp, #12] + bfi r2, lr, #8, #8 + str r2, [sp, #12] + ldr r2, [sp, #12] + bfc r2, #3, #1 + str r2, [sp, #12] + ldr r2, [sp, #12] + bfc r2, #5, #3 + str r2, [sp, #12] + mov r2, #0 + str r2, [sp, #4] + cmp r5, r2 + ldr lr, [sp, #4] + ldreq r3, [r4, #1200] + bfi lr, r6, #1, #1 + mov r6, #1 + str lr, [sp, #4] + ldr lr, [sp, #4] + orr lr, lr, #8 + str lr, [sp, #4] + ldr lr, [sp, #4] + bfi lr, r6, #5, #2 + str lr, [sp, #4] + ldr lr, [sp, #4] + orr lr, lr, #536870912 + str lr, [sp, #4] + ldr lr, [sp, #4] + orr lr, lr, #1024 + str lr, [sp, #4] + ldr lr, [sp, #4] + bfi lr, r2, #4, #1 + str lr, [sp, #4] + ldr lr, [sp, #4] + bfi lr, ip, #22, #6 + str lr, [sp, #4] + streq r6, [r3] + beq .L675 + ldrb ip, [r4, #1193] @ zero_extendqisi2 + lsr r1, r1, #1 + cmp ip, #25 + mov ip, r2 + movcc r6, #64 + movcs r6, #128 +.L673: + cmp ip, r1 + add r7, r3, ip, lsl #2 + add lr, r6, r2 + blt .L674 +.L675: + ldr r1, [sp, #4] + mov r2, r5 + ldr r3, [r4, #1200] + str r0, [r4, #1204] + ubfx r1, r1, #22, #6 + lsl r1, r1, #10 + str r3, [r4, #1208] + bl rknand_dma_map_single + ldr r1, [sp, #4] + mov r2, r5 + str r0, [r4, #1212] + clz r5, r5 + ldr r0, [r4, #1208] + lsr r5, r5, #5 + ubfx r1, r1, #22, #6 + lsl r1, r1, #7 + bl rknand_dma_map_single + mov r3, #1 + ldr r2, [r4, #1212] + str r3, [r4, #1220] + mov r1, #16 + ldr r3, [r4, #1044] + str r0, [r4, #1216] + str r2, [r3, #20] + mov r2, #0 + str r0, [r3, #24] + str r2, [sp, #8] + ldr r2, [sp, #8] + bfi r2, r1, #9, #5 + mov r1, #2 + str r2, [sp, #8] + ldr r2, [sp, #8] + orr r2, r2, #448 + str r2, [sp, #8] + ldr r2, [sp, #8] + bfi r2, r1, #3, #3 + str r2, [sp, #8] + ldr r2, [sp, #8] + orr r2, r2, #4 + str r2, [sp, #8] + ldr r2, [sp, #8] + bfi r2, r5, #1, #1 + str r2, [sp, #8] + ldr r2, [sp, #8] + orr r2, r2, #1 + str r2, [sp, #8] + ldr r2, [sp, #8] + str r2, [r3, #16] + ldr r2, [sp, #12] + str r2, [r3, #12] + ldr r2, [sp, #4] + str r2, [r3, #8] + ldr r2, [sp, #4] + orr r2, r2, #4 + str r2, [sp, #4] + ldr r2, [sp, #4] + str r2, [r3, #8] + b .L667 +.L674: + ldr r8, [r7] @ unaligned + bic r2, r2, #3 + ldr r7, [r4, #1200] + add ip, ip, #1 + str r8, [r7, r2] + mov r2, lr + b .L673 +.L685: + .align 2 +.L684: + .word .LANCHOR0 + .fnend + .size nandc_xfer_start, .-nandc_xfer_start + .align 2 + .global nandc_set_seed + .syntax unified + .arm + .fpu softvfp + .type nandc_set_seed, %function +nandc_set_seed: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L693 + and r0, r0, #127 + lsl r0, r0, #1 + ldrh r2, [r3, r0] + ldr r3, .L693+4 + ldrb r1, [r3, #1196] @ zero_extendqisi2 + cmp r1, #0 + ldrb r1, [r3, #1028] @ zero_extendqisi2 + ldr r3, [r3, #1044] + orrne r2, r2, #-1073741824 + cmp r1, #9 + streq r2, [r3, #520] + strne r2, [r3, #336] + bx lr +.L694: + .align 2 +.L693: + .word .LANCHOR1+1108 + .word .LANCHOR0 + .fnend + .size nandc_set_seed, .-nandc_set_seed + .align 2 + .global zftl_flash_de_init + .syntax unified + .arm + .fpu softvfp + .type zftl_flash_de_init, %function +zftl_flash_de_init: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, lr} + .save {r4, lr} + ldr r4, .L715 + bl nandc_wait_flash_ready + ldrb r3, [r4] @ zero_extendqisi2 + cmp r3, #0 + beq .L696 + ldrb r0, [r4, #1110] @ zero_extendqisi2 + cmp r0, #0 + bne .L696 + ldrb r3, [r4, #1028] @ zero_extendqisi2 + cmp r3, #9 + beq .L696 + bl zftl_flash_exit_slc_mode +.L696: + mov r0, #0 + bl hynix_reconfig_rr_para + ldrb r3, [r4, #1143] @ zero_extendqisi2 + cmp r3, #0 + beq .L697 + ldrb r3, [r4, #1192] @ zero_extendqisi2 + tst r3, #1 + beq .L697 + mov r0, #1 + bl flash_set_interface_mode + mov r0, #1 + bl nandc_set_if_mode + mov r3, #0 + strb r3, [r4, #1143] +.L697: + ldrb r3, [r4, #1196] @ zero_extendqisi2 + cmp r3, #0 + beq .L698 + mov r0, #0 + strb r0, [r4, #1196] + bl nandc_set_seed + mov r3, #1 + strb r3, [r4, #1196] +.L698: + mov r0, #0 + pop {r4, pc} +.L716: + .align 2 +.L715: + .word .LANCHOR0 + .fnend + .size zftl_flash_de_init, .-zftl_flash_de_init + .align 2 + .global nandc_randomizer_enable + .syntax unified + .arm + .fpu softvfp + .type nandc_randomizer_enable, %function +nandc_randomizer_enable: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L718 + strb r0, [r3, #1196] + bx lr +.L719: + .align 2 +.L718: + .word .LANCHOR0 + .fnend + .size nandc_randomizer_enable, .-nandc_randomizer_enable + .align 2 + .global nandc_get_chip_if + .syntax unified + .arm + .fpu softvfp + .type nandc_get_chip_if, %function +nandc_get_chip_if: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L721 + add r0, r0, #8 + ldr r3, [r3, #1044] + add r0, r3, r0, lsl #8 + bx lr +.L722: + .align 2 +.L721: + .word .LANCHOR0 + .fnend + .size nandc_get_chip_if, .-nandc_get_chip_if + .align 2 + .global buf_reinit + .syntax unified + .arm + .fpu softvfp + .type buf_reinit, %function +buf_reinit: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r2, .L726 + mov r3, #0 + mov r1, r3 +.L724: + uxtb r0, r3 + add r3, r3, #1 + cmp r3, #32 + strb r1, [r2, #2] + add ip, r0, #1 + strb r0, [r2, #1] + strb ip, [r2] + add r2, r2, #48 + str r1, [r2, #-40] + bne .L724 + ldr r2, .L726+4 + mvn r0, #0 + strb r0, [r2, #2720] + strb r1, [r2, #2768] + strb r3, [r2, #2769] + bx lr +.L727: + .align 2 +.L726: + .word .LANCHOR0+1232 + .word .LANCHOR0 + .fnend + .size buf_reinit, .-buf_reinit + .align 2 + .global buf_add_tail + .syntax unified + .arm + .fpu softvfp + .type buf_add_tail, %function +buf_add_tail: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + mvn r3, #0 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + strb r3, [r1] + mov r4, r1 + ldrb r3, [r0] @ zero_extendqisi2 + cmp r3, #255 + bne .L729 + ldrb r3, [r1, #1] @ zero_extendqisi2 + mov r5, r0 + cmp r3, #255 + bne .L730 + mov r2, #74 + ldr r1, .L736 + ldr r0, .L736+4 + bl rk_printk + bl dump_stack +.L730: + ldrb r3, [r4, #1] @ zero_extendqisi2 + strb r3, [r5] + pop {r4, r5, r6, pc} +.L729: + ldr r2, .L736+8 + mov r1, #48 + mov r6, r2 +.L734: + mov r5, r3 + mla r3, r1, r3, r2 + ldrb r3, [r3, #1232] @ zero_extendqisi2 + cmp r3, #255 + bne .L734 + ldrb r3, [r4, #1] @ zero_extendqisi2 + cmp r3, #255 + bne .L732 + mov r2, #81 + ldr r1, .L736 + ldr r0, .L736+4 + bl rk_printk + bl dump_stack +.L732: + mov r3, #48 + ldrb r2, [r4, #1] @ zero_extendqisi2 + mla r3, r3, r5, r6 + strb r2, [r3, #1232] + pop {r4, r5, r6, pc} +.L737: + .align 2 +.L736: + .word .LANCHOR1+1364 + .word .LC0 + .word .LANCHOR0 + .fnend + .size buf_add_tail, .-buf_add_tail + .align 2 + .syntax unified + .arm + .fpu softvfp + .type queue_read_cmd, %function +queue_read_cmd: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, lr} + .save {r4, lr} + mov r4, r0 + ldr r1, [r0, #24] + mov r0, #48 + bl flash_start_page_read + mov r3, #1 + mov r1, r4 + strb r3, [r4, #42] + mov r3, #0 + strb r3, [r4, #43] + mvn r3, #0 + strb r3, [r4] + ldr r0, .L740 + pop {r4, lr} + b buf_add_tail +.L741: + .align 2 +.L740: + .word .LANCHOR0+2770 + .fnend + .size queue_read_cmd, .-queue_read_cmd + .align 2 + .global zbuf_free + .syntax unified + .arm + .fpu softvfp + .type zbuf_free, %function +zbuf_free: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, lr} + .save {r4, lr} + ldrb r3, [r0, #2] @ zero_extendqisi2 + ldr r4, .L752 + and r3, r3, #8 + cmp r3, #0 + strb r3, [r0, #2] + beq .L743 + ldr r3, [r0, #20] + cmn r3, #1 + beq .L743 + mov r1, r0 + add r0, r4, #2768 + bl buf_add_tail +.L744: + ldrb r3, [r4, #2769] @ zero_extendqisi2 + add r3, r3, #1 + strb r3, [r4, #2769] + pop {r4, pc} +.L743: + ldrb r3, [r4, #2768] @ zero_extendqisi2 + strb r3, [r0] + ldrb r3, [r0, #1] @ zero_extendqisi2 + strb r3, [r4, #2768] + b .L744 +.L753: + .align 2 +.L752: + .word .LANCHOR0 + .fnend + .size zbuf_free, .-zbuf_free + .align 2 + .global buf_alloc + .syntax unified + .arm + .fpu softvfp + .type buf_alloc, %function +buf_alloc: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + mov r5, r0 + ldr r4, .L765 + ldrb r3, [r4, #2769] @ zero_extendqisi2 + cmp r3, #0 + beq .L755 +.L758: + ldrb ip, [r4, #2768] @ zero_extendqisi2 + cmp r5, #0 + ldr r3, .L765+4 + add r0, ip, ip, lsl #1 + mov r2, r3 + add r0, r3, r0, lsl #4 + beq .L756 +.L757: + mov r1, #48 + mul r1, r1, ip + add r3, r4, r1 + add r2, r2, r1 + ldrb ip, [r3, #1232] @ zero_extendqisi2 + mov r1, #0 + strh r1, [r2, #34] @ movhi + str r1, [r3, #1240] + strb ip, [r4, #2768] + ldrb ip, [r4, #2769] @ zero_extendqisi2 + strb r1, [r3, #1272] + strb r1, [r3, #1273] + sub ip, ip, #1 + strb ip, [r4, #2769] + mov ip, #1 + strb ip, [r3, #1234] + mvn ip, #0 + strb ip, [r3, #1232] + str ip, [r3, #1252] + pop {r4, r5, r6, pc} +.L755: + mov r2, #121 + ldr r1, .L765+8 + ldr r0, .L765+12 + bl rk_printk + bl dump_stack + ldrb r3, [r4, #2769] @ zero_extendqisi2 + cmp r3, #0 + bne .L758 +.L760: + mov r0, #0 + pop {r4, r5, r6, pc} +.L756: + ldrb r3, [r4, #2769] @ zero_extendqisi2 + cmp r3, #1 + bne .L757 + b .L760 +.L766: + .align 2 +.L765: + .word .LANCHOR0 + .word .LANCHOR0+1232 + .word .LANCHOR1+1377 + .word .LC0 + .fnend + .size buf_alloc, .-buf_alloc + .align 2 + .global buf_remove_buf + .syntax unified + .arm + .fpu softvfp + .type buf_remove_buf, %function +buf_remove_buf: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldrb ip, [r1, #1] @ zero_extendqisi2 + ldrb r3, [r0] @ zero_extendqisi2 + cmp ip, r3 + bne .L768 + ldrb r3, [r1] @ zero_extendqisi2 + strb r3, [r0] + mov r0, #1 + bx lr +.L771: + mov r2, r3 + mla r3, lr, r3, r0 + ldrb r3, [r3, #1232] @ zero_extendqisi2 + cmp ip, r3 + bne .L770 + mla r2, lr, r2, r0 + ldrb r3, [r1] @ zero_extendqisi2 + mov r0, #1 + strb r3, [r2, #1232] + mvn r3, #0 + strb r3, [r1] + ldr pc, [sp], #4 +.L768: + ldr r0, .L776 + str lr, [sp, #-4]! + .save {lr} + mov lr, #48 +.L770: + cmp r3, #255 + bne .L771 + mov r0, #0 + ldr pc, [sp], #4 +.L777: + .align 2 +.L776: + .word .LANCHOR0 + .fnend + .size buf_remove_buf, .-buf_remove_buf + .align 2 + .global buf_remove_free + .syntax unified + .arm + .fpu softvfp + .type buf_remove_free, %function +buf_remove_free: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + mov r5, r0 + ldr r4, .L784 + ldrb r3, [r4, #2769] @ zero_extendqisi2 + cmp r3, #0 + bne .L779 + mov r2, #172 + ldr r1, .L784+4 + ldr r0, .L784+8 + bl rk_printk + bl dump_stack +.L779: + ldrb r3, [r4, #2769] @ zero_extendqisi2 + cmp r3, #0 + popeq {r4, r5, r6, pc} + mov r1, r5 + ldr r0, .L784+12 + bl buf_remove_buf + cmp r0, #1 + ldrbeq r3, [r4, #2769] @ zero_extendqisi2 + subeq r3, r3, #1 + strbeq r3, [r4, #2769] + ldrbeq r3, [r5, #2] @ zero_extendqisi2 + orreq r3, r3, #1 + strbeq r3, [r5, #2] + pop {r4, r5, r6, pc} +.L785: + .align 2 +.L784: + .word .LANCHOR0 + .word .LANCHOR1+1387 + .word .LC0 + .word .LANCHOR0+2768 + .fnend + .size buf_remove_free, .-buf_remove_free + .align 2 + .global dump_buf_info + .syntax unified + .arm + .fpu softvfp + .type dump_buf_info, %function +dump_buf_info: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + .pad #24 + sub sp, sp, #24 + ldr r5, .L790 + ldr r0, .L790+4 + ldrb r1, [r5, #2770] @ zero_extendqisi2 + add r4, r5, #1232 + bl rk_printk + ldrb r1, [r5, #2771] @ zero_extendqisi2 + add r5, r5, #2768 + ldr r0, .L790+8 + bl rk_printk + ldrb r1, [r5, #4] @ zero_extendqisi2 + ldr r0, .L790+12 + bl rk_printk + ldr r6, .L790+16 + ldrb r1, [r5, #5] @ zero_extendqisi2 + ldr r0, .L790+20 + bl rk_printk + ldrb r1, [r5] @ zero_extendqisi2 + ldr r0, .L790+24 + bl rk_printk + ldrb r1, [r5, #1] @ zero_extendqisi2 + ldr r0, .L790+28 + bl rk_printk +.L787: + ldr r0, [r4, #24] + add r4, r4, #48 + ldrb r3, [r4, #-46] @ zero_extendqisi2 + ldrb r2, [r4, #-48] @ zero_extendqisi2 + ldrb r1, [r4, #-47] @ zero_extendqisi2 + str r0, [sp, #16] + ldr r0, [r4, #-28] + str r0, [sp, #12] + ldr r0, [r4, #-12] + str r0, [sp, #8] + ldrb r0, [r4, #-6] @ zero_extendqisi2 + str r0, [sp, #4] + ldrh r0, [r4, #-14] + str r0, [sp] + mov r0, r6 + bl rk_printk + cmp r4, r5 + bne .L787 + add sp, sp, #24 + @ sp needed + pop {r4, r5, r6, pc} +.L791: + .align 2 +.L790: + .word .LANCHOR0 + .word .LC44 + .word .LC45 + .word .LC46 + .word .LC50 + .word .LC47 + .word .LC48 + .word .LC49 + .fnend + .size dump_buf_info, .-dump_buf_info + .align 2 + .global flash_check_bad_block + .syntax unified + .arm + .fpu softvfp + .type flash_check_bad_block, %function +flash_check_bad_block: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r2, .L793 + lsr ip, r1, #5 + and r1, r1, #31 + ldrb r3, [r2, #17] @ zero_extendqisi2 + ldrh r2, [r2, #18] + smulbb r3, r3, r2 + ldr r2, .L793+4 + uxth r3, r3 + ldr r2, [r2, #1040] + add r3, r3, #31 + asr r3, r3, #5 + add r2, r2, ip, lsl #2 + lsl r3, r3, #2 + uxth r3, r3 + mla r0, r0, r3, r2 + ldr r0, [r0, #912] + lsr r0, r0, r1 + and r0, r0, #1 + bx lr +.L794: + .align 2 +.L793: + .word .LANCHOR2 + .word .LANCHOR0 + .fnend + .size flash_check_bad_block, .-flash_check_bad_block + .align 2 + .global flash_mask_bad_block + .syntax unified + .arm + .fpu softvfp + .type flash_mask_bad_block, %function +flash_mask_bad_block: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L797 + mov r2, r1 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + mov r5, r0 + mov r6, r1 + mov r1, r0 + ldrb r4, [r3, #17] @ zero_extendqisi2 + ldrh r3, [r3, #18] + ldr r0, .L797+4 + smulbb r4, r4, r3 + bl rk_printk + uxth r4, r4 + ldr r3, .L797+8 + mov r1, #1 + add r0, r4, #31 + asr r0, r0, #5 + ldr r2, [r3, #1040] + lsl r0, r0, #2 + uxth r0, r0 + mul r0, r5, r0 + lsr r5, r6, #5 + and r6, r6, #31 + add r0, r0, #912 + add r0, r0, r5, lsl #2 + ldr r3, [r2, r0] + orr r6, r3, r1, lsl r6 + str r6, [r2, r0] + pop {r4, r5, r6, pc} +.L798: + .align 2 +.L797: + .word .LANCHOR2 + .word .LC51 + .word .LANCHOR0 + .fnend + .size flash_mask_bad_block, .-flash_mask_bad_block + .align 2 + .global str2hex + .syntax unified + .arm + .fpu softvfp + .type str2hex, %function +str2hex: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldrb r3, [r0] @ zero_extendqisi2 + cmp r3, #48 + bne .L800 + ldrb r3, [r0, #1] @ zero_extendqisi2 + and r3, r3, #223 + cmp r3, #88 + addeq r0, r0, #2 +.L800: + ldrb r3, [r0] @ zero_extendqisi2 + and r3, r3, #223 + cmp r3, #88 + addeq r0, r0, #1 + sub r3, r0, #1 + mov r0, #0 +.L802: + ldrb r2, [r3, #1]! @ zero_extendqisi2 + cmp r2, #0 + bne .L807 + bx lr +.L807: + sub r1, r2, #48 + uxtb ip, r1 + cmp ip, #9 + addls r0, r1, r0, lsl #4 + bls .L802 + sub r1, r2, #97 + cmp r1, #5 + subls r2, r2, #87 + bls .L809 + sub r1, r2, #65 + cmp r1, #5 + bxhi lr + sub r2, r2, #55 +.L809: + add r0, r2, r0, lsl #4 + b .L802 + .fnend + .size str2hex, .-str2hex + .align 2 + .global zftl_proc_debug_init + .syntax unified + .arm + .fpu softvfp + .type zftl_proc_debug_init, %function +zftl_proc_debug_init: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, lr} + .save {lr} + .pad #12 + mov r2, #0 + str r2, [sp] + mov r1, #292 + ldr r3, .L812 + ldr r0, .L812+4 + bl proc_create_data + add sp, sp, #12 + @ sp needed + ldr pc, [sp], #4 +.L813: + .align 2 +.L812: + .word .LANCHOR1+1404 + .word .LC52 + .fnend + .size zftl_proc_debug_init, .-zftl_proc_debug_init + .align 2 + .global ftl_print_info_to_buf + .syntax unified + .arm + .fpu softvfp + .type ftl_print_info_to_buf, %function +ftl_print_info_to_buf: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r3, r4, r5, r6, lr} + .save {r4, r5, r6, lr} + .pad #16 + mov r6, r0 + ldr r2, .L816 + ldr r1, .L816+4 + bl sprintf + ldr r1, .L816+8 + add r4, r6, r0 + ldr r5, .L816+12 + ldrb r0, [r1, #10] @ zero_extendqisi2 + ldrb r3, [r1, #6] @ zero_extendqisi2 + ldrb r2, [r1, #5] @ zero_extendqisi2 + str r0, [sp, #12] + ldrb r0, [r1, #9] @ zero_extendqisi2 + str r0, [sp, #8] + ldrb r0, [r1, #8] @ zero_extendqisi2 + str r0, [sp, #4] + mov r0, r4 + ldrb r1, [r1, #7] @ zero_extendqisi2 + str r1, [sp] + ldr r1, .L816+16 + bl sprintf + ldr r2, [r5, #1032] + add r4, r4, r0 + ldr r1, .L816+20 + mov r0, r4 + lsr r2, r2, #11 + bl sprintf + ldr r2, [r5, #2776] + add r4, r4, r0 + ldr r1, .L816+24 + mov r0, r4 + lsr r2, r2, #11 + bl sprintf + add r4, r4, r0 + ldr r1, .L816+28 + mov r0, r4 + add r4, r4, #10 + bl strcpy + ldr r2, [r5, #2780] + mov r0, r4 + ldr r1, .L816+32 + bl sprintf + add r4, r4, r0 + ldr r2, [r5, #1032] + ldr r1, .L816+36 + mov r0, r4 + bl sprintf + ldr r3, [r5, #1096] + add r4, r4, r0 + ldr r1, .L816+40 + mov r0, r4 + ldr r2, [r3, #524] + bl sprintf + ldr r3, [r5, #1096] + add r4, r4, r0 + ldr r1, .L816+44 + mov r0, r4 + ldr r2, [r3, #528] + bl sprintf + add r3, r5, #2784 + add r4, r4, r0 + ldrh r2, [r3] + mov r0, r4 + ldr r1, .L816+48 + bl sprintf + movw r3, #2786 + add r4, r4, r0 + ldrh r2, [r5, r3] + mov r0, r4 + ldr r1, .L816+52 + bl sprintf + movw r3, #2788 + add r4, r4, r0 + ldrh r2, [r5, r3] + mov r0, r4 + ldr r1, .L816+56 + bl sprintf + movw r3, #2790 + add r4, r4, r0 + ldrh r2, [r5, r3] + mov r0, r4 + ldr r1, .L816+60 + bl sprintf + movw r3, #2792 + add r4, r4, r0 + ldrh r2, [r5, r3] + mov r0, r4 + ldr r1, .L816+64 + bl sprintf + movw r3, #2794 + add r4, r4, r0 + ldrh r2, [r5, r3] + mov r0, r4 + ldr r1, .L816+68 + bl sprintf + ldrb r1, [r5, #2797] @ zero_extendqisi2 + add r4, r4, r0 + ldrb r3, [r5, #2796] @ zero_extendqisi2 + mov r0, r4 + ldrb r2, [r5, #2769] @ zero_extendqisi2 + str r1, [sp] + ldr r1, .L816+72 + bl sprintf + ldr r2, [r5, #2800] + add r4, r4, r0 + ldr r1, .L816+76 + mov r0, r4 + ldrh r3, [r2, #146] + ldrh r2, [r2, #148] + bl sprintf + ldr r3, [r5, #2800] + add r4, r4, r0 + ldr r1, .L816+80 + mov r0, r4 + ldr r2, [r3, #16] + ldr r3, [r3, #20] + add r2, r3, r2, lsr #11 + bl sprintf + ldr r3, [r5, #2800] + add r4, r4, r0 + ldr r1, .L816+84 + mov r0, r4 + ldr r2, [r3, #24] + ldr r3, [r3, #28] + add r2, r3, r2, lsr #11 + bl sprintf + ldr r3, [r5, #2800] + add r4, r4, r0 + ldr r1, .L816+88 + mov r0, r4 + ldr r2, [r3, #64] + bl sprintf + ldr r3, [r5, #2800] + add r4, r4, r0 + ldr r1, .L816+92 + mov r0, r4 + ldr r2, [r3, #68] + bl sprintf + ldr r3, [r5, #1096] + add r4, r4, r0 + ldr r1, .L816+96 + mov r0, r4 + ldr r2, [r3, #12] + umull r2, r3, r2, r1 + ldr r1, .L816+100 + lsr r2, r3, #3 + bl sprintf + ldr r3, [r5, #2800] + add r4, r4, r0 + ldrb r2, [r5] @ zero_extendqisi2 + mov r0, r4 + ldrh r1, [r3, #150] + str r1, [sp] + ldr r1, .L816+104 + ldr r3, [r3, #156] + bl sprintf + ldr r3, [r5, #1096] + add r4, r4, r0 + ldr r1, .L816+108 + mov r0, r4 + ldr r2, [r3, #556] + bl sprintf + ldr r3, [r5, #1096] + add r4, r4, r0 + ldr r1, .L816+112 + mov r0, r4 + ldr r2, [r3, #552] + bl sprintf + ldr r3, [r5, #2800] + add r4, r4, r0 + ldr r1, .L816+116 + mov r0, r4 + ldr r2, [r3, #52] + bl sprintf + ldr r3, [r5, #2800] + add r4, r4, r0 + ldr r1, .L816+120 + mov r0, r4 + ldr r2, [r3, #60] + bl sprintf + ldr r3, [r5, #2800] + add r4, r4, r0 + ldr r1, .L816+124 + mov r0, r4 + ldr r2, [r3, #76] + bl sprintf + ldr r3, [r5, #2800] + add r4, r4, r0 + ldr r1, .L816+128 + mov r0, r4 + ldr r2, [r3, #8] + bl sprintf + ldr r1, [r5, #1096] + add r4, r4, r0 + mov r0, r4 + ldrh r3, [r1, #22] + ldrh r2, [r1, #16] + ldrb r1, [r1, #25] @ zero_extendqisi2 + str r1, [sp] + ldr r1, .L816+132 + bl sprintf + ldr r1, [r5, #1096] + add r4, r4, r0 + mov r0, r4 + ldrh r3, [r1, #54] + ldrh r2, [r1, #48] + ldrb r1, [r1, #57] @ zero_extendqisi2 + str r1, [sp] + ldr r1, .L816+136 + bl sprintf + ldr r1, [r5, #1096] + add r4, r4, r0 + mov r0, r4 + ldrh r3, [r1, #86] + ldrh r2, [r1, #80] + ldrb r1, [r1, #89] @ zero_extendqisi2 + str r1, [sp] + ldr r1, .L816+140 + bl sprintf + ldr r3, [r5, #2800] + add r4, r4, r0 + mov r0, r4 + ldrh r1, [r3, #96] + ldrh r2, [r3, #74] + str r1, [sp, #8] + ldrh r1, [r3, #92] + str r1, [sp, #4] + ldrh r1, [r3, #88] + str r1, [sp] + ldr r1, .L816+144 + ldr r3, [r3, #84] + bl sprintf + ldr r3, [r5, #2800] + add r4, r4, r0 + mov r0, r4 + ldrh r1, [r3, #98] + ldrh r2, [r3, #72] + str r1, [sp, #8] + ldrh r1, [r3, #94] + str r1, [sp, #4] + ldrh r1, [r3, #90] + str r1, [sp] + ldr r1, .L816+148 + ldr r3, [r3, #80] + bl sprintf + movw r3, #2804 + add r4, r4, r0 + ldrh r2, [r5, r3] + mov r0, r4 + ldr r1, .L816+152 + bl sprintf + ldr r1, [r5, #2812] + add r4, r4, r0 + movw r3, #2806 + movw r2, #2808 + ldrh r3, [r5, r3] + mov r0, r4 + str r1, [sp, #8] + add r1, r5, #2816 + ldrh r1, [r1] + ldrh r2, [r5, r2] + str r1, [sp, #4] + movw r1, #2818 + ldrh r1, [r5, r1] + str r1, [sp] + ldr r1, .L816+156 + bl sprintf + ldr r1, [r5, #1096] + add r4, r4, r0 + movw r0, #590 + movw r3, #586 + ldrh r0, [r1, r0] + add r2, r1, #584 + ldrh r3, [r1, r3] + add r1, r1, #588 + ldrh r2, [r2] + str r0, [sp, #4] + mov r0, r4 + ldrh r1, [r1] + str r1, [sp] + ldr r1, .L816+160 + bl sprintf + ldr r2, [r5, #1096] + add r4, r4, r0 + ldr r1, .L816+164 + mov r0, r4 + ldr r3, [r2, #548] + str r3, [sp, #8] + ldr r3, [r5, #2800] + ldr r3, [r3, #44] + str r3, [sp, #4] + ldr r3, [r2, #544] + str r3, [sp] + ldr r3, [r2, #540] + ldr r2, [r2, #536] + bl sprintf + add r0, r4, r0 + sub r0, r0, r6 + add sp, sp, #16 + @ sp needed + pop {r4, r5, r6, pc} +.L817: + .align 2 +.L816: + .word .LC1 + .word .LC2 + .word .LANCHOR2 + .word .LANCHOR0 + .word .LC53 + .word .LC54 + .word .LC55 + .word .LC56 + .word .LC57 + .word .LC58 + .word .LC59 + .word .LC60 + .word .LC61 + .word .LC62 + .word .LC63 + .word .LC64 + .word .LC65 + .word .LC66 + .word .LC67 + .word .LC68 + .word .LC69 + .word .LC70 + .word .LC71 + .word .LC72 + .word -858993459 + .word .LC73 + .word .LC74 + .word .LC75 + .word .LC76 + .word .LC77 + .word .LC78 + .word .LC79 + .word .LC80 + .word .LC81 + .word .LC82 + .word .LC83 + .word .LC84 + .word .LC85 + .word .LC86 + .word .LC87 + .word .LC88 + .word .LC89 + .fnend + .size ftl_print_info_to_buf, .-ftl_print_info_to_buf + .align 2 + .global zftl_proc_ftl_read + .syntax unified + .arm + .fpu softvfp + .type zftl_proc_ftl_read, %function +zftl_proc_ftl_read: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + b ftl_print_info_to_buf + .fnend + .size zftl_proc_ftl_read, .-zftl_proc_ftl_read + .align 2 + .global ftl_gc_write_buf + .syntax unified + .arm + .fpu softvfp + .type ftl_gc_write_buf, %function +ftl_gc_write_buf: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, lr} + .save {r4, lr} + mov r1, r0 + ldrb r3, [r0, #2] @ zero_extendqisi2 + ldr r4, .L821 + orr r3, r3, #2 + strb r3, [r0, #2] + add r0, r4, #2816 + add r0, r0, #4 + bl buf_add_tail + ldrb r0, [r4, #2796] @ zero_extendqisi2 + add r0, r0, #1 + uxtb r0, r0 + strb r0, [r4, #2796] + pop {r4, pc} +.L822: + .align 2 +.L821: + .word .LANCHOR0 + .fnend + .size ftl_gc_write_buf, .-ftl_gc_write_buf + .align 2 + .global gc_hook + .syntax unified + .arm + .fpu softvfp + .type gc_hook, %function +gc_hook: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + bx lr + .fnend + .size gc_hook, .-gc_hook + .align 2 + .global vpn_check + .syntax unified + .arm + .fpu softvfp + .type vpn_check, %function +vpn_check: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + bx lr + .fnend + .size vpn_check, .-vpn_check + .align 2 + .global ftl_scan_all_data + .syntax unified + .arm + .fpu softvfp + .type ftl_scan_all_data, %function +ftl_scan_all_data: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + bx lr + .fnend + .size ftl_scan_all_data, .-ftl_scan_all_data + .align 2 + .global gc_add_sblk + .syntax unified + .arm + .fpu softvfp + .type gc_add_sblk, %function +gc_add_sblk: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + .pad #16 + mov r5, r0 + ldr r8, .L862 + mov r4, r1 + mov r9, r2 + ldr r7, .L862+4 + ldr r3, [r8] + tst r3, #256 + beq .L827 + movw r3, #2818 + ldr r2, [r7, #1092] + ldrh r3, [r7, r3] + str r3, [sp, #12] + ldr r3, .L862+8 + ldrh r3, [r3, #52] + str r3, [sp, #8] + lsl r3, r0, #1 + ldrh r3, [r2, r3] + mov r2, r1 + mov r1, r0 + str r3, [sp, #4] + ldr r3, [r7, #1084] + add r3, r3, r0, lsl #2 + ldr r0, .L862+12 + ldrb r3, [r3, #2] @ zero_extendqisi2 + lsr r3, r3, #5 + str r3, [sp] + mov r3, r9 + bl rk_printk +.L827: + movw r3, #1080 + ldrh r3, [r7, r3] + cmp r3, r5 + bhi .L828 + movw r2, #543 + ldr r1, .L862+16 + ldr r0, .L862+20 + bl rk_printk + bl dump_stack +.L828: + movw r3, #1080 + ldrh r3, [r7, r3] + cmp r3, r5 + bhi .L829 + ldr r0, [r8] + ands r0, r0, #1024 + beq .L826 + mov r3, r9 + mov r2, r4 + mov r1, r5 + ldr r0, .L862+24 + bl rk_printk +.L849: + mov r0, #0 + b .L826 +.L829: + ldr r2, [r7, #1092] + lsl r3, r5, #1 + ldrh r3, [r2, r3] + ldr r2, [r7, #1084] + add r2, r2, r5, lsl #2 + ldrb r2, [r2, #2] @ zero_extendqisi2 + ands r6, r2, #224 + bne .L831 + cmp r3, #0 + beq .L849 + movw r2, #553 + ldr r1, .L862+16 + ldr r0, .L862+20 + bl rk_printk + bl dump_stack + b .L849 +.L831: + movw r1, #2824 + ldrh r1, [r7, r1] + cmp r1, r5 + beq .L849 + ldr r1, [r7, #1096] + ldrh r0, [r1, #48] + cmp r0, r5 + beq .L849 + ldrh r0, [r1, #16] + cmp r0, r5 + beq .L849 + ldrh r0, [r1, #80] + cmp r0, r5 + beq .L849 + ldr r0, .L862+8 + mov ip, #0 + ldrh r10, [r0, #52]! +.L832: + cmp ip, r10 + bcc .L833 + cmp r4, #0 + bne .L837 + ldr ip, .L862+28 + mov r0, r4 + ldrh lr, [ip, #-4] + cmp r5, lr + beq .L826 + sub ip, ip, #2 +.L836: + ldrh r6, [r0, ip] + cmp r5, r6 + bne .L835 + ldr r1, [r8] + ands r0, r1, #256 + beq .L826 + stm sp, {r5, lr} + lsr r2, r2, #5 + mov r1, r5 + ldr r0, .L862+32 + bl rk_printk + b .L849 +.L833: + ldrh lr, [r0, #2]! + cmp lr, r5 + beq .L849 + add ip, ip, #1 + b .L832 +.L835: + add r0, r0, #2 + cmp r0, #16 + bne .L836 + add r1, r1, r9, lsl #7 + add r6, r1, #136 +.L838: + ldr r1, [r8] + tst r1, #256 + beq .L839 + movw r1, #2818 + stm sp, {r3, r10} + ldrh r1, [r7, r1] + lsr r3, r2, #5 + ldr r0, .L862+36 + mov r2, r4 + str r1, [sp, #8] + mov r1, r5 + bl rk_printk +.L839: + mov r3, r6 + add r1, r6, #128 + movw r0, #65535 +.L842: + mov r2, r3 + add r3, r3, #2 + ldrh ip, [r2] + cmp ip, r0 + bne .L840 + cmp r4, #0 + strh r5, [r2] @ movhi + ldreq r3, [r7, #1096] + ldrne r2, [r7, #1096] + addeq r9, r3, r9, lsl #1 + ldrhne r3, [r2, #124] + ldrheq r3, [r9, #120] + addne r3, r3, #1 + strhne r3, [r2, #124] @ movhi + addeq r3, r3, #1 + strheq r3, [r9, #120] @ movhi +.L861: + mov r0, #1 +.L826: + add sp, sp, #16 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L837: + add r6, r1, #392 + b .L838 +.L840: + cmp r3, r1 + bne .L842 + b .L861 +.L863: + .align 2 +.L862: + .word .LANCHOR2 + .word .LANCHOR0 + .word .LANCHOR0+2824 + .word .LC90 + .word .LANCHOR1+1448 + .word .LC0 + .word .LC91 + .word .LANCHOR3-3152 + .word .LC92 + .word .LC93 + .fnend + .size gc_add_sblk, .-gc_add_sblk + .align 2 + .global gc_mark_bad_ppa + .syntax unified + .arm + .fpu softvfp + .type gc_mark_bad_ppa, %function +gc_mark_bad_ppa: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L869 + push {r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + mov r8, r0 + ldr r5, .L869+4 + mov r7, #1 + sub r2, r3, #3136 + ldrh r2, [r2, #-2] + ldrb r1, [r3, #-3136] @ zero_extendqisi2 + add r5, r5, #4096 + lsr r6, r0, r2 + ldrb r0, [r5, #-2943] @ zero_extendqisi2 + uxth r4, r6 + rsb r0, r0, #24 + sub r0, r0, r2 + lsl r0, r7, r0 + sub r0, r0, #1 + and r0, r0, r6 + bl __aeabi_uidiv + uxth r9, r0 + mov r3, r8 + mov r2, r4 + ldr r1, [r5, #916] + ldr r0, .L869+8 + bl rk_printk + mov r1, r7 + mov r2, #0 + mov r0, r9 + bl gc_add_sblk + ldr r3, [r5, #916] + mov r1, #0 + ldr r0, .L869+12 + movw ip, #1096 +.L865: + uxth r2, r1 + cmp r3, r2 + bhi .L867 + cmp r3, #5 + bhi .L866 + add r2, r3, #1 + add r3, r3, #1088 + str r2, [r5, #916] + add r3, r3, #8 + ldr r2, .L869+12 + lsl r3, r3, #1 + strh r4, [r2, r3] @ movhi + b .L866 +.L867: + add r2, r2, ip + add r1, r1, #1 + lsl r2, r2, #1 + ldrh r2, [r0, r2] + cmp r4, r2 + bne .L865 +.L866: + mov r0, #0 + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L870: + .align 2 +.L869: + .word .LANCHOR3 + .word .LANCHOR0 + .word .LC94 + .word .LANCHOR0+2824 + .fnend + .size gc_mark_bad_ppa, .-gc_mark_bad_ppa + .align 2 + .global gc_get_src_ppa_from_index + .syntax unified + .arm + .fpu softvfp + .type gc_get_src_ppa_from_index, %function +gc_get_src_ppa_from_index: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L872 + ldr r3, [r3, #-3132] + ldr r0, [r3, r0, lsl #2] + bx lr +.L873: + .align 2 +.L872: + .word .LANCHOR3 + .fnend + .size gc_get_src_ppa_from_index, .-gc_get_src_ppa_from_index + .align 2 + .global gc_write_completed + .syntax unified + .arm + .fpu softvfp + .type gc_write_completed, %function +gc_write_completed: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #12 +.L875: + ldr r7, .L902 + ldrb fp, [r7, #2772] @ zero_extendqisi2 + mov r6, r7 + cmp fp, #255 + bne .L888 + add sp, sp, #12 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L888: + mov r2, #48 + add r10, r6, #1232 + mul r2, r2, fp + str r10, [sp, #4] + add r0, r6, r2 + add r2, r10, r2 + ldrb r1, [r0, #1232] @ zero_extendqisi2 + ldrh r8, [r2, #32] + strb r1, [r7, #2772] + ldr r1, [r0, #1268] + cmp r1, #0 + beq .L876 + ldr r3, .L902+4 + mov r2, #1 + strh r2, [r3] @ movhi + ldr r2, [r0, #1256] + add r0, r6, #4096 + str r2, [r0, #912] + ldr r0, .L902+8 + bl rk_printk + mov r2, #956 + ldr r1, .L902+12 + ldr r0, .L902+16 + bl rk_printk + bl dump_stack +.L876: + ldr r5, .L902+20 + ldrb r2, [r5, #-3128] @ zero_extendqisi2 + mov r10, r5 + cmp r2, #3 + bne .L877 + ldrb r2, [r7, #1158] @ zero_extendqisi2 + cmp r2, #0 + bne .L877 + ldr r2, [r7, #1096] + ldrb r4, [r2, #89] @ zero_extendqisi2 + ldrb r2, [r5, #-3127] @ zero_extendqisi2 + cmp r2, r4 + movhi r4, #1 + bhi .L878 + cmp r4, #2 + movcs r4, #2 +.L878: + add r4, r4, r4, lsl #1 +.L879: + mov r2, #48 + ldr r1, [r5, #-3124] + mla r2, r2, fp, r6 + ldrb r1, [r1, r8] @ zero_extendqisi2 + mov r9, r8 + ldrb r2, [r2, #1233] @ zero_extendqisi2 + cmp r1, r2 + beq .L880 + mov r2, #976 + ldr r1, .L902+12 + ldr r0, .L902+16 + bl rk_printk + bl dump_stack +.L880: + mov r2, #48 + mla r3, r2, fp, r6 + ldrb r3, [r3, #1277] @ zero_extendqisi2 + cmp r3, #3 + beq .L881 + ldrb r3, [r5, #-3128] @ zero_extendqisi2 + cmp r3, #3 + bne .L881 + ldrb r3, [r5, #-3120] @ zero_extendqisi2 + cmp r3, #0 + bne .L881 + ldrb r3, [r7, #1158] @ zero_extendqisi2 + cmp r3, #0 + bne .L881 + ldrb r3, [r7, #1159] @ zero_extendqisi2 + cmp r3, #0 + bne .L881 + ldrb r3, [r5, #-3126] @ zero_extendqisi2 + cmp r3, #0 + beq .L882 + ldrb r3, [r5, #-3125] @ zero_extendqisi2 + cmp r3, #0 + bne .L881 +.L882: + ldr r2, [r5, #-3124] + mov r3, #0 + mov r1, #48 + movw r0, #1277 + mov ip, r3 + add r8, r2, r8 +.L883: + uxth r2, r3 + cmp r4, r2 + bls .L875 + ldrb r2, [r8, r3] @ zero_extendqisi2 + add r3, r3, #1 + mla r2, r1, r2, r6 + strb ip, [r2, r0] + b .L883 +.L877: + ldrb r2, [r5, #-3126] @ zero_extendqisi2 + cmp r2, #0 + moveq r4, #1 + beq .L879 + ldrb r2, [r5, #-3125] @ zero_extendqisi2 + cmp r2, #0 + moveq r4, #1 + movne r4, #2 + b .L879 +.L881: + ldr r3, .L902+24 + mvn r5, #0 + mov r7, #48 + movw fp, #1277 + strh r8, [r3] @ movhi +.L884: + sub r2, r9, r8 + uxth r2, r2 + cmp r4, r2 + bls .L875 + ldr r2, [r10, #-3124] + mov r1, #0 + ldr r3, [sp, #4] + ldrb r0, [r2, r9] @ zero_extendqisi2 + strb r5, [r2, r9] + add r9, r9, #1 + mla r2, r7, r0, r6 + add r0, r0, r0, lsl #1 + strb r1, [r2, fp] + add r0, r3, r0, lsl #4 + bl zbuf_free + ldrb r2, [r6, #2831] @ zero_extendqisi2 + sub r2, r2, #1 + strb r2, [r6, #2831] + b .L884 +.L903: + .align 2 +.L902: + .word .LANCHOR0 + .word .LANCHOR0+5006 + .word .LC95 + .word .LANCHOR1+1460 + .word .LC0 + .word .LANCHOR3 + .word .LANCHOR0+4928 + .fnend + .size gc_write_completed, .-gc_write_completed + .align 2 + .global gc_get_src_blk + .syntax unified + .arm + .fpu softvfp + .type gc_get_src_blk, %function +gc_get_src_blk: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r1, .L916 + ldr r3, [r1, #1096] + ldrh r2, [r3, #124] + cmp r2, #0 + addne r3, r3, #392 + movne r2, #1 + bne .L906 + ldr r0, .L916+4 + ldrb r0, [r0, #-3119] @ zero_extendqisi2 + add ip, r3, r0, lsl #1 + ldrh ip, [ip, #120] + cmp ip, #0 + beq .L911 + add r3, r3, r0, lsl #7 + add r3, r3, #136 +.L906: + push {r4, lr} + .save {r4, lr} + add ip, r3, #128 + movw lr, #65535 +.L910: + mov r4, r3 + ldrh r0, [r3], #2 + cmp r0, lr + beq .L908 + cmp r2, #0 + mvn r3, #0 + strh r3, [r4] @ movhi + ldreq r3, .L916+4 + ldrne r2, [r1, #1096] + ldrbeq r2, [r3, #-3119] @ zero_extendqisi2 + ldreq r3, [r1, #1096] + ldrhne r3, [r2, #124] + addeq r3, r3, r2, lsl #1 + subne r3, r3, #1 + strhne r3, [r2, #124] @ movhi + ldrheq r2, [r3, #120] + subeq r2, r2, #1 + strheq r2, [r3, #120] @ movhi + pop {r4, pc} +.L908: + cmp r3, ip + bne .L910 + pop {r4, pc} +.L911: + movw r0, #65535 + bx lr +.L917: + .align 2 +.L916: + .word .LANCHOR0 + .word .LANCHOR3 + .fnend + .size gc_get_src_blk, .-gc_get_src_blk + .align 2 + .global gc_free_temp_buf + .syntax unified + .arm + .fpu softvfp + .type gc_free_temp_buf, %function +gc_free_temp_buf: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + ldr r5, .L933 + ldrb r0, [r5, #2831] @ zero_extendqisi2 + cmp r0, #0 + popeq {r4, r5, r6, pc} + ldrb r3, [r5, #2769] @ zero_extendqisi2 + cmp r3, #1 + bhi .L925 + ldr r2, .L933+4 + add r3, r5, #4928 + ldrh r4, [r3] + movw ip, #1277 + sub r3, r2, #3104 + mov r6, r2 + ldrh r0, [r3, #-14] + add r1, r4, #24 + ldrb r3, [r2, #-3127] @ zero_extendqisi2 + mul r3, r3, r0 + cmp r3, r1 + movcs r3, r1 + ldr r1, [r2, #-3124] + mov r2, #48 +.L920: + cmp r4, r3 + bcc .L923 +.L925: + mov r0, #0 + pop {r4, r5, r6, pc} +.L923: + ldrb r0, [r1, r4] @ zero_extendqisi2 + cmp r0, #255 + beq .L921 + mla lr, r2, r0, r5 + ldrb lr, [lr, ip] @ zero_extendqisi2 + cmp lr, #0 + bne .L921 + ldr r3, .L933+8 + add r0, r0, r0, lsl #1 + add r0, r3, r0, lsl #4 + bl zbuf_free + ldr r3, .L933+12 + ldr r3, [r3] + tst r3, #256 + beq .L922 + ldr r3, [r6, #-3124] + mov r1, r4 + ldr r0, .L933+16 + ldrb r2, [r3, r4] @ zero_extendqisi2 + bl rk_printk +.L922: + ldr r3, [r6, #-3124] + mvn r2, #0 + mov r0, #1 + strb r2, [r3, r4] + ldrb r3, [r5, #2831] @ zero_extendqisi2 + add r3, r3, r2 + strb r3, [r5, #2831] + pop {r4, r5, r6, pc} +.L921: + add r4, r4, #1 + b .L920 +.L934: + .align 2 +.L933: + .word .LANCHOR0 + .word .LANCHOR3 + .word .LANCHOR0+1232 + .word .LANCHOR2 + .word .LC96 + .fnend + .size gc_free_temp_buf, .-gc_free_temp_buf + .align 2 + .global get_ink_scaned_blk + .syntax unified + .arm + .fpu softvfp + .type get_ink_scaned_blk, %function +get_ink_scaned_blk: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r1, .L938 + movw ip, #2108 + ldrh r3, [r1, ip] + cmp r3, #0 + addne r2, r3, #1040 + subne r3, r3, #1 + addne r2, r2, #11 + strhne r3, [r1, ip] @ movhi + addne r2, r1, r2, lsl #1 + ldrhne r0, [r2, #6] + movweq r0, #65535 + bx lr +.L939: + .align 2 +.L938: + .word .LANCHOR0+2824 + .fnend + .size get_ink_scaned_blk, .-get_ink_scaned_blk + .align 2 + .global print_gc_debug_info + .syntax unified + .arm + .fpu softvfp + .type print_gc_debug_info, %function +print_gc_debug_info: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r3, r4, lr} + .save {lr} + .pad #20 + movw ip, #2804 + ldr r0, .L942 + movw r1, #2824 + movw r3, #2102 + ldrh ip, [r0, ip] + add r2, r0, r1 + ldrh r3, [r2, r3] + ldrh r1, [r0, r1] + ldrh r2, [r2, #2] + str ip, [sp, #8] + ldrb ip, [r0, #2831] @ zero_extendqisi2 + str ip, [sp, #4] + ldrb r0, [r0, #2769] @ zero_extendqisi2 + str r0, [sp] + ldr r0, .L942+4 + bl rk_printk + add sp, sp, #20 + @ sp needed + ldr pc, [sp], #4 +.L943: + .align 2 +.L942: + .word .LANCHOR0 + .word .LC97 + .fnend + .size print_gc_debug_info, .-print_gc_debug_info + .align 2 + .global _list_pop_index_node + .syntax unified + .arm + .fpu softvfp + .type _list_pop_index_node, %function +_list_pop_index_node: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + ldr r5, [r0] + cmp r5, #0 + beq .L950 + ldr r3, .L952 + movw ip, #65535 + mov lr, #6 + ldr r4, [r3, #1036] +.L946: + cmp r1, #0 + bne .L947 +.L949: + sub r4, r5, r4 + asr r3, r4, #1 + ldr r4, .L952+4 + mul r4, r4, r3 + uxth r1, r4 + bl _list_remove_node + mvn r3, #0 + uxth r0, r4 + strh r3, [r5] @ movhi + strh r3, [r5, #2] @ movhi + pop {r4, r5, r6, pc} +.L947: + ldrh r3, [r5] + cmp r3, ip + beq .L949 + sub r1, r1, #1 + mla r5, lr, r3, r4 + uxth r1, r1 + b .L946 +.L950: + movw r0, #65535 + pop {r4, r5, r6, pc} +.L953: + .align 2 +.L952: + .word .LANCHOR0 + .word -1431655765 + .fnend + .size _list_pop_index_node, .-_list_pop_index_node + .align 2 + .global _list_get_gc_head_node + .syntax unified + .arm + .fpu softvfp + .type _list_get_gc_head_node, %function +_list_get_gc_head_node: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r0, [r0] + cmp r0, #0 + beq .L959 + ldr r3, .L961 + movw r2, #65535 + mov ip, #6 + ldr r3, [r3, #1036] +.L956: + cmp r1, #0 + beq .L957 + ldrh r0, [r0] + cmp r0, r2 + bne .L958 + bx lr +.L958: + sub r1, r1, #1 + mla r0, ip, r0, r3 + uxth r1, r1 + b .L956 +.L959: + movw r0, #65535 + bx lr +.L957: + sub r0, r0, r3 + asr r3, r0, #1 + ldr r0, .L961+4 + mul r0, r0, r3 + uxth r0, r0 + bx lr +.L962: + .align 2 +.L961: + .word .LANCHOR0 + .word -1431655765 + .fnend + .size _list_get_gc_head_node, .-_list_get_gc_head_node + .align 2 + .syntax unified + .arm + .fpu softvfp + .type zftl_get_gc_node.part.10, %function +zftl_get_gc_node.part.10: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + mov r1, r0 + ldr r0, .L964 + b _list_get_gc_head_node +.L965: + .align 2 +.L964: + .word .LANCHOR3-3116 + .fnend + .size zftl_get_gc_node.part.10, .-zftl_get_gc_node.part.10 + .align 2 + .global gc_search_src_blk + .syntax unified + .arm + .fpu softvfp + .type gc_search_src_blk, %function +gc_search_src_blk: + .fnstart + @ args = 0, pretend = 0, frame = 32 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #44 + sub sp, sp, #44 + ldr r5, .L1086 + str r1, [sp, #24] + ldr r1, [r5, #1096] + str r0, [sp, #16] + str r2, [sp, #12] + add r3, r1, r0, lsl #1 + ldrh r3, [r3, #120] + cmp r3, #0 + str r3, [sp, #20] + movne r0, r3 + bne .L966 + ldr r3, .L1086+4 + ldrh r2, [r3, #52] + cmp r2, #1 + ldrls r0, .L1086+8 + ldrhls ip, [sp, #20] + strhls ip, [r0, #-8] @ movhi + strhls ip, [r0, #-6] @ movhi + strhls ip, [r0, #-4] @ movhi + ldr r0, [sp, #16] + cmp r0, #0 + bne .L970 + ldr r10, .L1086+12 + mov r7, r0 + ldr fp, .L1086+16 + mov r4, r0 +.L971: + ldr r3, [sp, #12] + add r8, r3, #1 + uxth r3, r7 + cmp r3, r8 + bge .L976 + ldr r3, .L1086+20 + mov r0, r3 + str r3, [sp, #20] + ldrh r9, [r0], #6 + mov r1, r9 + bl _list_get_gc_head_node + add r2, r9, #1 + ldr r3, [sp, #20] + movw r1, #65535 + uxth r2, r2 + cmp r0, r1 + mov r6, r0 + strh r2, [r3] @ movhi + beq .L972 + ldr r3, [r10] + lsl r9, r0, #1 + tst r3, #256 + beq .L973 + ldr r3, [r5, #1092] + mov r1, r0 + mov r0, fp + ldrh r3, [r3, r9] + bl rk_printk +.L973: + ldr r3, [r5, #1092] + ldrh r2, [r3, r9] + ldr r3, .L1086+24 + ldrh r3, [r3] + cmp r2, r3 + bcs .L974 + mov r2, #0 + mov r0, r6 + mov r1, r2 + bl gc_add_sblk + cmp r0, #0 + beq .L975 + add r4, r4, #1 + ldr r3, [sp, #12] + uxth r4, r4 + cmp r4, r3 + bcc .L975 +.L976: + ldr r3, [sp, #24] + tst r3, #2 + beq .L978 + movw r3, #2794 + ldrh r3, [r5, r3] + cmp r3, #32 + bls .L978 + ldr r9, .L1086+28 + mov fp, #0 + ldr r6, .L1086+32 + sub r10, r9, #12 +.L979: + uxth r3, fp + cmp r8, r3 + ble .L983 + ldr r7, .L1086+36 + mov r0, r10 + ldrh r3, [r7] + mov r1, r3 + str r3, [sp, #20] + bl _list_get_gc_head_node + ldr r3, [sp, #20] + add r3, r3, #1 + strh r3, [r7] @ movhi + movw r3, #65535 + cmp r0, r3 + beq .L980 + ldr r3, [r5, #1092] + lsl r2, r0, #1 + ldrh r2, [r3, r2] + ldrh r3, [r6] + cmp r2, r3 + bcs .L980 + mov r2, #0 + mov r1, r2 + bl gc_add_sblk + cmp r0, #0 + beq .L982 + add r4, r4, #1 + ldr r3, [sp, #12] + uxth r4, r4 + cmp r4, r3 + bcc .L982 +.L983: + ldr r3, [sp, #12] + cmp r4, r3 + bcs .L985 + ldr r0, .L1086+40 + ldrh r1, [r9, #-8] + ldrh r2, [r6] + sub r3, r0, #3104 + ldrh ip, [r3, #-14] + ldrb r3, [r0, #-3127] @ zero_extendqisi2 + mul r3, r3, ip + sub r3, r3, r1, lsr #2 + cmp r2, r3 + addlt r2, r2, r1, lsr #3 + strhlt r2, [r6] @ movhi +.L978: + ldr r3, [sp, #24] + tst r3, #1 + beq .L986 + ldrh r6, [sp, #12] + cmp r4, r6 + bcs .L986 + mov r9, #0 + movw r8, #65535 +.L991: + ldr r10, .L1086+44 + ldrh r7, [r10] + mov r0, r7 + add r7, r7, #1 + bl zftl_get_gc_node.part.10 + cmp r0, r8 + strh r7, [r10] @ movhi + beq .L987 + mov r2, #0 + mov r1, r2 + bl gc_add_sblk + cmp r0, #0 + beq .L988 + add r4, r4, #1 + uxth r4, r4 + cmp r6, r4 + bhi .L988 +.L989: + ldr r3, .L1086+28 + movw r2, #2818 + ldrh r1, [r3, #-8] +.L1085: + ldrh r3, [r5, r2] + cmp r3, r1, lsr #1 + bls .L986 + sub r3, r3, r1, lsr #3 +.L1082: + strh r3, [r5, r2] @ movhi + b .L986 +.L974: + ldr r3, .L1086+8 + mov r2, #0 + strh r2, [r3, #-6] @ movhi + b .L976 +.L972: + mov r2, #0 + strh r2, [r3] @ movhi + b .L976 +.L975: + add r7, r7, #1 + b .L971 +.L980: + mov r3, #0 + strh r3, [r7] @ movhi + b .L983 +.L982: + add fp, fp, #1 + b .L979 +.L985: + ldrh r3, [r6] + ldrh r2, [r9, #-8] + cmp r3, r2 + subhi r3, r3, r2, lsr #3 + strhhi r3, [r6] @ movhi + b .L978 +.L987: + mov r3, #0 + strh r3, [r10] @ movhi +.L990: + cmp r4, r6 + bcs .L989 + ldr r1, .L1086+28 + movw r2, #2818 + ldrh r3, [r5, r2] + ldrh r1, [r1, #-8] + cmp r3, r1 + addcc r3, r3, r1, lsr #3 + bcc .L1082 +.L986: + ldr r3, .L1086+12 + ldr r3, [r3] + tst r3, #256 + beq .L1021 + ldr r3, [sp, #12] + ldr r2, [sp, #24] + ldr r1, [sp, #16] + str r3, [sp] + mov r3, r4 + ldr r0, .L1086+48 + bl rk_printk +.L1021: + mov r0, r4 +.L966: + add sp, sp, #44 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L988: + add r9, r9, #1 + uxth r3, r9 + cmp r6, r3 + bhi .L991 + b .L990 +.L970: + ldr r4, .L1086+40 + ldrb r7, [r4, #-3127] @ zero_extendqisi2 + sub r4, r4, #3104 + ldrh r0, [r4, #-14] + smulbb r7, r7, r0 + ldr r0, [sp, #12] + cmp r0, #1 + uxth r7, r7 + bne .L992 + cmp r2, #0 + beq .L992 + ldrh r0, [r1, #80] + movw r1, #65535 + cmp r0, r1 + movwne r1, #2102 + ldrhne r1, [r3, r1] + subne r7, r7, r1 + mov r1, #8 + uxthne r7, r7 + str r1, [sp, #12] +.L992: + mov r6, #0 + movw r1, #2180 + strh r6, [r3, r1] @ movhi + ldr r3, [sp, #24] + ldr r1, .L1086+28 + ands r3, r3, #1 + strh r6, [r1, #-6] @ movhi + mov r8, r1 + str r3, [sp, #28] + ldreq r6, [sp, #28] + moveq r4, r6 + beq .L993 + movw r3, #2790 + ldrh r1, [r1, #-4] + ldrh r3, [r5, r3] + cmp r3, r1, lsr #2 + bhi .L994 + movw r1, #2792 + ldrh r1, [r5, r1] + cmp r1, r3 + movcs r4, r6 + bcs .L995 +.L994: + cmp r2, #1 + bls .L996 +.L998: + mov r4, #0 +.L997: + ldr r9, .L1086+52 + mov r6, #0 + mov r8, #64 + movw fp, #65535 +.L1001: + ldr r2, .L1086+44 + ldrh r3, [r2] + str r2, [sp, #36] + mov r0, r3 + str r3, [sp, #32] + bl zftl_get_gc_node.part.10 + cmp r0, fp + mov r10, r0 + ldr r2, [sp, #36] + beq .L999 + ldr r3, [sp, #32] + mov r1, #0 + add r3, r3, #1 + strh r3, [r2] @ movhi + ldr r2, [sp, #16] + bl gc_add_sblk + cmp r0, #0 + beq .L1000 + ldr r3, [r5, #1092] + lsl r10, r10, #1 + add r4, r4, #1 + ldr r2, [sp, #12] + uxth r4, r4 + ldrh r3, [r3, r10] + add r6, r6, r3 + uxth r6, r6 + cmp r7, r6 + movcs r3, #0 + movcc r3, #1 + cmp r4, r2 + orrcs r3, r3, #1 + cmp r3, #0 + bne .L995 + ldr r2, .L1086+56 + ldrh r3, [r9] + ldrh r2, [r2] + cmp r3, r2, lsl #1 + ble .L1000 +.L995: + movw r3, #2792 + ldrh r2, [r5, r3] + ldr r3, .L1086+28 + ldrh r3, [r3, #-4] + cmp r2, r3, lsr #2 + bhi .L1022 + movw r3, #2790 + ldrh r3, [r5, r3] + add r3, r3, #8 + cmp r2, r3 + ble .L993 +.L1022: + cmp r7, r6 + bls .L993 + ldrh r3, [sp, #16] + mov r8, #64 + str r3, [sp, #32] +.L1004: + ldr fp, .L1086+20 + mov r0, fp + ldrh r9, [r0], #6 + mov r1, r9 + bl _list_get_gc_head_node + movw r3, #65535 + mov r10, r0 + cmp r0, r3 + beq .L1002 + add r9, r9, #1 + ldr r2, [sp, #32] + mov r1, #0 + strh r9, [fp] @ movhi + bl gc_add_sblk + cmp r0, #0 + beq .L1003 + ldr r3, [r5, #1092] + lsl r10, r10, #1 + add r4, r4, #1 + ldr r2, [sp, #12] + uxth r4, r4 + ldrh r3, [r3, r10] + add r6, r6, r3 + uxth r6, r6 + cmp r7, r6 + movcs r3, #0 + movcc r3, #1 + cmp r4, r2 + orrcs r3, r3, #1 + cmp r3, #0 + beq .L1003 +.L993: + ldr r3, [sp, #24] + tst r3, #2 + beq .L1005 + movw r3, #2794 + ldrh r3, [r5, r3] + cmp r3, #32 + movls r3, #0 + movhi r3, #1 + cmp r6, r7 + movcs r3, #0 + cmp r3, #0 + beq .L1005 + ldr r10, .L1086+40 + mov r5, #64 + sub fp, r10, #3088 + sub r3, fp, #12 + str r3, [sp, #32] +.L1011: + ldr r8, .L1086+8 + ldr r0, [sp, #32] + ldrh r9, [r8, #-4] + sub r2, r8, #4 + str r2, [sp, #36] + mov r1, r9 + bl _list_get_gc_head_node + movw r3, #65535 + ldr r2, [sp, #36] + cmp r0, r3 + beq .L1006 + ldr r3, [sp, #12] + add r9, r9, #1 + strh r9, [r8, #-4] @ movhi + cmp r3, #1 + bne .L1007 + ldrh r2, [r8, #-14] + ldrb r3, [r10, #-3127] @ zero_extendqisi2 + smulbb r3, r3, r2 + ldrh r2, [fp, #-8] + sub r3, r3, r2, lsr #3 + ldr r2, .L1086+60 + strh r3, [r2] @ movhi +.L1007: + ldr r9, .L1086 + lsl r8, r0, #1 + ldr r3, [r9, #1092] + ldrh r2, [r3, r8] + ldr r3, .L1086+60 + ldrh r3, [r3] + cmp r2, r3 + bcs .L1008 + ldr r2, [sp, #16] + mov r1, #0 + bl gc_add_sblk + cmp r0, #0 + beq .L1009 + ldr r3, [sp, #20] + add r4, r4, #1 + ldr r2, [sp, #12] + uxth r4, r4 + add r0, r3, #1 + uxth r3, r0 + str r3, [sp, #20] + ldr r3, [r9, #1092] + ldrh r3, [r3, r8] + add r6, r6, r3 + uxth r6, r6 + cmp r7, r6 + movcs r3, #0 + movcc r3, #1 + cmp r4, r2 + orrcs r3, r3, #1 + cmp r3, #0 + beq .L1009 +.L1010: + ldr r3, [sp, #12] + ldr r0, .L1086+28 + ldr r2, .L1086 + cmp r4, r3 + add lr, r0, #3088 + bcc .L1012 + ldr r3, [sp, #20] + cmp r3, #0 + bne .L1013 + movw r3, #2794 + ldrh r1, [r2, r3] + ldrh r3, [r0, #-2] + cmp r1, r3 + bls .L1013 +.L1012: + ldr r3, .L1086+8 + movw ip, #2808 + ldrh r0, [r0, #-8] + ldrh r1, [r2, ip] + ldrh r5, [r3, #-14] + ldrb r3, [lr, #-3127] @ zero_extendqisi2 + lsr r0, r0, #3 + mul r3, r3, r5 + sub r3, r3, r0 + cmp r1, r3 + addlt r1, r1, r0 + strhlt r1, [r2, ip] @ movhi +.L1005: + ldr r3, [sp, #28] + cmp r3, #0 + beq .L986 + ldrh r9, [sp, #12] + cmp r6, r7 + cmpcc r4, r9 + bcs .L986 + ldr r5, .L1086 + mov r8, #64 +.L1019: + ldr fp, .L1086+20 + mov r0, fp + ldrh r10, [r0], #6 + mov r1, r10 + bl _list_get_gc_head_node + movw r3, #65535 + cmp r0, r3 + beq .L1015 + add r10, r10, #1 + ldr r2, [r5, #1092] + ldr r3, .L1086+64 + strh r10, [fp] @ movhi + lsl r10, r0, #1 + ldrh r1, [r2, r10] + ldrh r2, [r3] + cmp r1, r2 + bcs .L1016 + ldrh r2, [fp, #18] + ldrh r3, [r3, #-14] + cmp r3, r2, lsr #1 + bls .L1017 +.L1016: + ldr r2, [sp, #16] + mov r1, #0 + bl gc_add_sblk + cmp r0, #0 + beq .L1018 + ldr r3, [r5, #1092] + add r4, r4, #1 + uxth r4, r4 + ldrh r3, [r3, r10] + add r6, r6, r3 + uxth r6, r6 + cmp r7, r6 + cmpcs r9, r4 + bhi .L1018 +.L1017: + ldr r3, .L1086+28 + cmp r4, r9 + movw r2, #2806 + ldrhcc r1, [r3, #-8] + bcc .L1085 + ldrh r0, [r3, #-8] + ldr r3, .L1086+40 + ldrh r1, [r5, r2] + ldrb r3, [r3, #-3127] @ zero_extendqisi2 + mul r3, r0, r3 + sub r3, r3, #32 + cmp r1, r3 + addlt r1, r1, r0, lsr #3 + strhlt r1, [r5, r2] @ movhi + b .L986 +.L996: + lsr r3, r3, #2 + mov r0, #0 + strh r3, [r4, #-8] @ movhi + bl zftl_get_gc_node.part.10 + movw r2, #65535 + cmp r0, r2 + beq .L998 + ldr r1, [r5, #1092] + lsl r3, r0, #1 + ldrh r2, [r8, #-8] + ldrh r3, [r1, r3] + cmp r3, r2, lsr #2 + bcs .L998 + mov r3, #1 + ldr r2, [sp, #16] + mov r1, #0 + strh r3, [r4, #-8] @ movhi + bl gc_add_sblk + adds r4, r0, #0 + movne r4, #1 + b .L997 +.L999: + mov r3, #0 + strh r3, [r2] @ movhi + b .L995 +.L1000: + sub r8, r8, #1 + uxth r8, r8 + cmp r8, #0 + bne .L1001 + b .L995 +.L1002: + cmp r9, #64 + movhi r3, #0 + strhhi r3, [fp] @ movhi + b .L993 +.L1003: + sub r8, r8, #1 + uxth r8, r8 + cmp r8, #0 + bne .L1004 + b .L993 +.L1008: + ldr r3, .L1086+8 + mov r2, #0 + strh r2, [r3, #-4] @ movhi + b .L1010 +.L1006: + mov r3, #0 + strh r3, [r2] @ movhi + b .L1010 +.L1009: + sub r5, r5, #1 + uxth r5, r5 + cmp r5, #0 + bne .L1011 + b .L1010 +.L1013: + ldrh r0, [r0, #-8] + movw ip, #2808 + ldrb r1, [lr, #-3127] @ zero_extendqisi2 + ldrh r3, [r2, ip] + mul r1, r0, r1 + cmp r3, r1 + subgt r3, r3, r0, lsr #3 + strhgt r3, [r2, ip] @ movhi + b .L986 +.L1015: + cmp r10, #64 + movhi r3, #0 + strhhi r3, [fp] @ movhi + b .L1017 +.L1018: + sub r8, r8, #1 + uxth r8, r8 + cmp r8, #0 + bne .L1019 + b .L1017 +.L1087: + .align 2 +.L1086: + .word .LANCHOR0 + .word .LANCHOR0+2824 + .word .LANCHOR3-3104 + .word .LANCHOR2 + .word .LC98 + .word .LANCHOR3-3110 + .word .LANCHOR0+2818 + .word .LANCHOR3-3088 + .word .LANCHOR0+2816 + .word .LANCHOR3-3108 + .word .LANCHOR3 + .word .LANCHOR3-3112 + .word .LC99 + .word .LANCHOR0+2792 + .word .LANCHOR0+2790 + .word .LANCHOR0+2808 + .word .LANCHOR0+2806 + .fnend + .size gc_search_src_blk, .-gc_search_src_blk + .align 2 + .global zftl_get_gc_node + .syntax unified + .arm + .fpu softvfp + .type zftl_get_gc_node, %function +zftl_get_gc_node: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + cmp r1, #5 + mov r3, r0 + moveq r1, r0 + ldreq r0, .L1092 + beq .L1091 + cmp r1, #2 + movne r1, r3 + ldrne r0, .L1092+4 + bne .L1091 + b zftl_get_gc_node.part.10 +.L1091: + b _list_get_gc_head_node +.L1093: + .align 2 +.L1092: + .word .LANCHOR3-3100 + .word .LANCHOR3-3104 + .fnend + .size zftl_get_gc_node, .-zftl_get_gc_node + .align 2 + .global zftl_insert_free_list + .syntax unified + .arm + .fpu softvfp + .type zftl_insert_free_list, %function +zftl_insert_free_list: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r2, .L1098 + mov r1, r0 + ldr r3, [r2, #1084] + add r3, r3, r0, lsl #2 + ldrb r3, [r3, #2] @ zero_extendqisi2 + ands r3, r3, #24 + addeq r2, r2, #2784 + ldreq r0, .L1098+4 + beq .L1097 + cmp r3, #16 + ldr r0, .L1098+8 + ldreq r2, .L1098+12 + ldrne r2, .L1098+16 + subeq r0, r0, #12 + subne r0, r0, #8 +.L1097: + b _insert_free_list +.L1099: + .align 2 +.L1098: + .word .LANCHOR0 + .word .LANCHOR3-3088 + .word .LANCHOR3-3072 + .word .LANCHOR0+2786 + .word .LANCHOR0+2788 + .fnend + .size zftl_insert_free_list, .-zftl_insert_free_list + .align 2 + .global zftl_insert_data_list + .syntax unified + .arm + .fpu softvfp + .type zftl_insert_data_list, %function +zftl_insert_data_list: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L1105 + mov r1, r0 + ldr r3, [r3, #1084] + add r3, r3, r0, lsl #2 + ldrb r3, [r3, #2] @ zero_extendqisi2 + and r3, r3, #224 + cmp r3, #64 + bne .L1101 + ldr r2, .L1105+4 + ldr r0, .L1105+8 +.L1104: + b _insert_data_list +.L1101: + cmp r3, #96 + ldreq r2, .L1105+12 + ldreq r0, .L1105+16 + beq .L1104 +.L1102: + cmp r3, #160 + bxne lr + ldr r2, .L1105+20 + ldr r0, .L1105+24 + b .L1104 +.L1106: + .align 2 +.L1105: + .word .LANCHOR0 + .word .LANCHOR0+2790 + .word .LANCHOR3-3116 + .word .LANCHOR0+2792 + .word .LANCHOR3-3104 + .word .LANCHOR0+2794 + .word .LANCHOR3-3100 + .fnend + .size zftl_insert_data_list, .-zftl_insert_data_list + .align 2 + .global zftl_gc_get_free_sblk + .syntax unified + .arm + .fpu softvfp + .type zftl_gc_get_free_sblk, %function +zftl_gc_get_free_sblk: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r3, r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + .pad #16 + movw r2, #65535 + ldr r8, .L1126 + ldr r3, [r8, #1096] + add r3, r3, #588 + ldrh r4, [r3] + clz r3, r0 + lsr r3, r3, #5 + cmp r4, r2 + moveq r3, #0 + cmp r3, #0 + beq .L1108 + mov r1, r4 + ldr r0, .L1126+4 + bl rk_printk + ldr r3, [r8, #1096] + mvn r2, #0 + add r3, r3, #588 + strh r2, [r3] @ movhi +.L1109: + mov r0, r4 + add sp, sp, #16 + @ sp needed + pop {r4, r5, r6, r7, r8, pc} +.L1108: + movw r3, #2786 + mov r7, r1 + ldrh r1, [r8, r3] + movw r3, #2788 + ldrh r3, [r8, r3] + mov r6, r0 + mov r5, r8 + ldr r0, .L1126+8 + cmp r1, r3 + bcc .L1110 + add r2, r8, #2784 + ldrh r2, [r2] + cmp r3, #0 + cmpne r2, r1 + bls .L1111 +.L1110: + cmp r6, #0 + ldr r2, .L1126+12 + rsbne r1, r1, r1, lsl #3 + lsreq r1, r3, #2 + ubfxne r1, r1, #3, #16 + sub r0, r0, #8 +.L1125: + bl _list_pop_index_node + uxth r4, r0 + movw r3, #65535 + cmp r4, r3 + bne .L1116 + movw r3, #2788 + mov r2, r7 + ldrh r3, [r5, r3] + mov r1, r4 + ldr r0, .L1126+16 + str r3, [sp, #4] + ldr r3, .L1126+20 + ldrh r3, [r3] + str r3, [sp] + ldr r3, .L1126+24 + ldr r3, [r3, #-3088] + bl rk_printk +.L1116: + cmp r6, #0 + beq .L1109 + ldr r3, .L1126+28 + ldr r3, [r3] + tst r3, #256 + beq .L1109 + ldr ip, [r5, #1092] + lsl r0, r4, #1 + ldr r1, [r5, #1084] + lsl r3, r4, #2 + ldrh r0, [ip, r0] + add r2, r1, r3 + ldrb r2, [r2, #2] @ zero_extendqisi2 + str r0, [sp, #8] + ldrh r3, [r1, r3] + ldr r0, .L1126+32 + ubfx r3, r3, #0, #11 + str r3, [sp, #4] + ldr r3, [r1, r4, lsl #2] + mov r1, r4 + ubfx r3, r3, #11, #8 + str r3, [sp] + ubfx r3, r2, #3, #2 + lsr r2, r2, #5 + bl rk_printk + b .L1109 +.L1111: + cmp r6, #0 + ldr r2, .L1126+36 + lsrne r1, r1, #3 + moveq r1, r6 + sub r0, r0, #12 + b .L1125 +.L1127: + .align 2 +.L1126: + .word .LANCHOR0 + .word .LC100 + .word .LANCHOR3-3072 + .word .LANCHOR0+2788 + .word .LC101 + .word .LANCHOR0+2784 + .word .LANCHOR3 + .word .LANCHOR2 + .word .LC102 + .word .LANCHOR0+2786 + .fnend + .size zftl_gc_get_free_sblk, .-zftl_gc_get_free_sblk + .align 2 + .global zftl_get_free_sblk + .syntax unified + .arm + .fpu softvfp + .type zftl_get_free_sblk, %function +zftl_get_free_sblk: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + cmp r1, #5 + push {r0, r1, r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + .pad #8 + mov r7, r1 + ldr r5, .L1141 + bne .L1129 + movw r3, #2786 + ldr r0, .L1141+4 + ldrh r1, [r5, r3] + movw r3, #2788 + ldrh ip, [r5, r3] + cmp r1, ip + bcc .L1130 + add r3, r5, #2784 + ldrh r3, [r3] + cmp ip, #0 + cmpne r3, r1 + movhi r1, #1 + movls r1, #0 + ldrls r2, .L1141+8 + subls r0, r0, #12 + bls .L1140 +.L1130: + ldr r2, .L1141+12 + lsr r1, ip, #1 + sub r0, r0, #8 +.L1140: + bl _list_pop_index_node + uxth r4, r0 + movw r3, #65535 + cmp r4, r3 + bne .L1134 + movw r3, #2788 + mov r2, r7 + ldrh r3, [r5, r3] + mov r1, r4 + ldr r0, .L1141+16 + str r3, [sp, #4] + ldr r3, .L1141+20 + ldrh r3, [r3] + str r3, [sp] + ldr r3, .L1141+24 + ldr r3, [r3, #-3088] + bl rk_printk + b .L1134 +.L1129: + ldr r3, [r5, #1096] + movw r8, #590 + ldrh r4, [r3, r8] + movw r3, #65535 + cmp r1, #1 + cmpne r4, r3 + beq .L1133 + mov r1, r4 + ldr r0, .L1141+28 + bl rk_printk + ldr r3, [r5, #1096] + mvn r2, #0 + strh r2, [r3, r8] @ movhi +.L1134: + mov r0, r4 + add sp, sp, #8 + @ sp needed + pop {r4, r5, r6, r7, r8, pc} +.L1133: + add r3, r5, #2784 + movw r2, #2788 + ldrh r3, [r3] + mov r6, r0 + ldrh r2, [r5, r2] + cmp r3, r2 + bcc .L1135 + movw r1, #2786 + ldrh r1, [r5, r1] + cmp r2, #0 + cmpne r1, r3 + bls .L1136 +.L1135: + bl get_ink_scaned_blk + movw r3, #65535 + mov r4, r0 + cmp r0, r3 + bne .L1134 + cmp r7, #1 + ldr r2, .L1141+12 + movweq r3, #2788 + ldr r0, .L1141+32 + ldrheq r6, [r5, r3] + lsreq r6, r6, #1 + mov r1, r6 + b .L1140 +.L1136: + cmp r7, #1 + ldr r2, .L1141+20 + lsreq r6, r3, #1 + ldr r0, .L1141+36 + mov r1, r6 + b .L1140 +.L1142: + .align 2 +.L1141: + .word .LANCHOR0 + .word .LANCHOR3-3072 + .word .LANCHOR0+2786 + .word .LANCHOR0+2788 + .word .LC101 + .word .LANCHOR0+2784 + .word .LANCHOR3 + .word .LC103 + .word .LANCHOR3-3080 + .word .LANCHOR3-3088 + .fnend + .size zftl_get_free_sblk, .-zftl_get_free_sblk + .align 2 + .global zftl_remove_data_node + .syntax unified + .arm + .fpu softvfp + .type zftl_remove_data_node, %function +zftl_remove_data_node: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L1148 + mov r1, r0 + ldr r3, [r3, #1084] + add r3, r3, r0, lsl #2 + ldrb r3, [r3, #2] @ zero_extendqisi2 + and r3, r3, #224 + cmp r3, #64 + bne .L1144 + ldr r2, .L1148+4 + ldr r0, .L1148+8 +.L1147: + b _list_remove_node +.L1144: + cmp r3, #96 + ldreq r2, .L1148+12 + ldreq r0, .L1148+16 + beq .L1147 +.L1145: + cmp r3, #160 + bxne lr + ldr r2, .L1148+20 + ldr r0, .L1148+24 + b .L1147 +.L1149: + .align 2 +.L1148: + .word .LANCHOR0 + .word .LANCHOR0+2790 + .word .LANCHOR3-3116 + .word .LANCHOR0+2792 + .word .LANCHOR3-3104 + .word .LANCHOR0+2794 + .word .LANCHOR3-3100 + .fnend + .size zftl_remove_data_node, .-zftl_remove_data_node + .align 2 + .global zftl_remove_free_node + .syntax unified + .arm + .fpu softvfp + .type zftl_remove_free_node, %function +zftl_remove_free_node: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r2, .L1154 + mov r1, r0 + ldr r3, [r2, #1084] + add r3, r3, r0, lsl #2 + ldrb r3, [r3, #2] @ zero_extendqisi2 + ands r3, r3, #24 + addeq r2, r2, #2784 + ldreq r0, .L1154+4 + beq .L1153 + cmp r3, #16 + ldr r0, .L1154+8 + ldreq r2, .L1154+12 + ldrne r2, .L1154+16 + subeq r0, r0, #12 + subne r0, r0, #8 +.L1153: + b _list_remove_node +.L1155: + .align 2 +.L1154: + .word .LANCHOR0 + .word .LANCHOR3-3088 + .word .LANCHOR3-3072 + .word .LANCHOR0+2786 + .word .LANCHOR0+2788 + .fnend + .size zftl_remove_free_node, .-zftl_remove_free_node + .align 2 + .global zftl_list_update_data_list + .syntax unified + .arm + .fpu softvfp + .type zftl_list_update_data_list, %function +zftl_list_update_data_list: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L1161 + mov r1, r0 + ldr r3, [r3, #1084] + add r3, r3, r0, lsl #2 + ldrb r3, [r3, #2] @ zero_extendqisi2 + and r3, r3, #224 + cmp r3, #64 + bne .L1157 + ldr r2, .L1161+4 + ldr r0, .L1161+8 +.L1160: + b _list_update_data_list +.L1157: + cmp r3, #96 + ldreq r2, .L1161+12 + ldreq r0, .L1161+16 + beq .L1160 +.L1158: + cmp r3, #160 + bxne lr + ldr r2, .L1161+20 + ldr r0, .L1161+24 + b .L1160 +.L1162: + .align 2 +.L1161: + .word .LANCHOR0 + .word .LANCHOR0+2790 + .word .LANCHOR3-3116 + .word .LANCHOR0+2792 + .word .LANCHOR3-3104 + .word .LANCHOR0+2794 + .word .LANCHOR3-3100 + .fnend + .size zftl_list_update_data_list, .-zftl_list_update_data_list + .align 2 + .global print_list_info + .syntax unified + .arm + .fpu softvfp + .type print_list_info, %function +print_list_info: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, lr} + .save {r4, r5, r6, r7, r8, r9, lr} + mov r4, r0 + ldrh r2, [r1] + .pad #36 + sub sp, sp, #36 + ldr r1, [r0] + ldr r0, .L1168 + bl rk_printk + ldr r4, [r4] + cmp r4, #0 + beq .L1163 + ldr r6, .L1168+4 + mov r5, #0 + ldr r7, .L1168+8 + ldr r8, .L1168+12 +.L1166: + ldr r2, [r6, #1036] + ldr r9, [r6, #1092] + ldr r1, [r6, #1084] + sub r2, r4, r2 + ldrh r3, [r4] + asr r2, r2, #1 + mul r2, r7, r2 + uxth r2, r2 + lsl lr, r2, #1 + lsl r0, r2, #2 + ldrh lr, [r9, lr] + add ip, r1, r0 + str lr, [sp, #24] + ldrh r0, [r1, r0] + ubfx r0, r0, #0, #11 + str r0, [sp, #20] + mov r0, r8 + ldr r1, [r1, r2, lsl #2] + ubfx r1, r1, #11, #8 + str r1, [sp, #16] + ldrb r1, [ip, #2] @ zero_extendqisi2 + ubfx r1, r1, #3, #2 + str r1, [sp, #12] + ldrb r1, [ip, #2] @ zero_extendqisi2 + lsr r1, r1, #5 + str r1, [sp, #8] + ldrh r1, [r4, #4] + str r1, [sp, #4] + ldrh r1, [r4, #2] + str r1, [sp] + mov r1, r5 + bl rk_printk + ldrh r4, [r4] + movw r3, #65535 + cmp r4, r3 + beq .L1163 + ldr r3, [r6, #1036] + mov r2, #6 + add r5, r5, #1 + uxth r5, r5 + mla r4, r2, r4, r3 + ldr r3, .L1168+16 + ldrh r3, [r3] + cmp r3, r5 + bcs .L1166 +.L1163: + add sp, sp, #36 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, pc} +.L1169: + .align 2 +.L1168: + .word .LC104 + .word .LANCHOR0 + .word -1431655765 + .word .LC105 + .word .LANCHOR3-3076 + .fnend + .size print_list_info, .-print_list_info + .align 2 + .global dump_all_list_info + .syntax unified + .arm + .fpu softvfp + .type dump_all_list_info, %function +dump_all_list_info: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + ldr r5, .L1172 + ldr r4, .L1172+4 + sub r6, r5, #3088 + sub r7, r5, #3072 + mov r0, r6 + sub r5, r5, #3104 + add r1, r4, #2784 + bl print_list_info + add r1, r4, #2784 + sub r0, r7, #12 + add r1, r1, #2 + bl print_list_info + add r1, r4, #2784 + sub r0, r7, #8 + add r1, r1, #4 + bl print_list_info + add r1, r4, #2784 + sub r0, r5, #12 + add r1, r1, #6 + bl print_list_info + add r1, r4, #2784 + mov r0, r5 + add r1, r1, #8 + bl print_list_info + add r1, r4, #2784 + sub r0, r6, #12 + add r1, r1, #10 + pop {r4, r5, r6, r7, r8, lr} + b print_list_info +.L1173: + .align 2 +.L1172: + .word .LANCHOR3 + .word .LANCHOR0 + .fnend + .size dump_all_list_info, .-dump_all_list_info + .align 2 + .global ftl_tmp_into_update + .syntax unified + .arm + .fpu softvfp + .type ftl_tmp_into_update, %function +ftl_tmp_into_update: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L1179 + ldr r3, [r3, #2800] + ldr r2, [r3, #16] + cmp r2, #2048 + ldrhi r1, [r3, #20] + addhi r1, r1, r2, lsr #11 + ubfxhi r2, r2, #0, #11 + strhi r2, [r3, #16] + ldr r2, [r3, #24] + strhi r1, [r3, #20] + cmp r2, #2048 + ldrhi r1, [r3, #28] + addhi r1, r1, r2, lsr #11 + ubfxhi r2, r2, #0, #11 + strhi r2, [r3, #24] + ldr r2, [r3, #32] + strhi r1, [r3, #28] + cmp r2, #1024 + ldrhi r1, [r3, #36] + addhi r1, r1, r2, lsr #10 + ubfxhi r2, r2, #0, #10 + strhi r2, [r3, #32] + ldr r2, [r3, #40] + strhi r1, [r3, #36] + cmp r2, #1024 + ldrhi r1, [r3, #44] + addhi r1, r1, r2, lsr #10 + ubfxhi r2, r2, #0, #10 + strhi r2, [r3, #40] + strhi r1, [r3, #44] + bx lr +.L1180: + .align 2 +.L1179: + .word .LANCHOR0 + .fnend + .size ftl_tmp_into_update, .-ftl_tmp_into_update + .global __aeabi_idiv + .align 2 + .global ftl_get_blk_list_in_sblk + .syntax unified + .arm + .fpu softvfp + .type ftl_get_blk_list_in_sblk, %function +ftl_get_blk_list_in_sblk: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #12 + mov r5, #0 + ldr r9, .L1189 + mov r10, r0 + mov r6, r1 + mov r7, r5 + ldr r8, .L1189+4 + ldr r3, [r9, #1084] + add r3, r3, r0, lsl #2 + ldrb r2, [r3, #3] @ zero_extendqisi2 + mov r3, r8 +.L1182: + ldrb r1, [r8, #-3127] @ zero_extendqisi2 + cmp r7, r1 + blt .L1185 + add r6, r6, r5, lsl #1 + mov r2, r5 + mvn r0, #0 +.L1186: + ldrb r1, [r3, #-3127] @ zero_extendqisi2 + cmp r2, r1 + blt .L1187 + mov r0, r5 + add sp, sp, #12 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L1185: + asr r1, r2, r7 + tst r1, #1 + bne .L1183 + ldrb r4, [r8, #-3136] @ zero_extendqisi2 + mov r0, r7 + stm sp, {r2, r3} + lsl fp, r5, #1 + add r5, r5, #1 + mov r1, r4 + bl __aeabi_idiv + ldr ip, .L1189+8 + smulbb r4, r4, r10 + ldrb r1, [r9, #1153] @ zero_extendqisi2 + ldm sp, {r2, r3} + ldrh ip, [ip] + rsb r1, r1, #24 + sub r1, r1, ip + add r0, r4, r0, lsl r1 + uxth r0, r0 + strh r0, [r6, fp] @ movhi + ldrb r1, [r8, #-3136] @ zero_extendqisi2 + cmp r1, #1 + subhi r1, r1, #1 + andhi r1, r1, r7 + addhi r0, r0, r1 + strhhi r0, [r6, fp] @ movhi +.L1183: + add r7, r7, #1 + b .L1182 +.L1187: + strh r0, [r6], #2 @ movhi + add r2, r2, #1 + b .L1186 +.L1190: + .align 2 +.L1189: + .word .LANCHOR0 + .word .LANCHOR3 + .word .LANCHOR3-3138 + .fnend + .size ftl_get_blk_list_in_sblk, .-ftl_get_blk_list_in_sblk + .align 2 + .global ftl_erase_phy_blk + .syntax unified + .arm + .fpu softvfp + .type ftl_erase_phy_blk, %function +ftl_erase_phy_blk: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r2, .L1197 + ldr r3, .L1197+4 + push {r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + mov r6, r1 + sub r1, r2, #3136 + sub r7, r2, #3072 + ldrb r3, [r3, #1153] @ zero_extendqisi2 + ldrh r4, [r1, #-2] + rsb r3, r3, #24 + sub r3, r3, r4 + mvn r4, #0 + asr r5, r0, r3 + bic r4, r0, r4, lsl r3 + ldrb r3, [r2, #-3126] @ zero_extendqisi2 + sxth r4, r4 + uxtb r5, r5 + cmp r3, #0 + beq .L1192 + ldrb r3, [r2, #-3125] @ zero_extendqisi2 + cmp r3, #0 + bne .L1192 + ldrh r2, [r7, #-2] + clz r1, r6 + lsr r1, r1, #5 + mov r0, r5 + mul r2, r4, r2 + bl flash_erase_block_en +.L1192: + ldrh r2, [r7, #-2] + uxtb r1, r6 + mov r0, r5 + mul r2, r4, r2 + pop {r4, r5, r6, r7, r8, lr} + b flash_erase_block_en +.L1198: + .align 2 +.L1197: + .word .LANCHOR3 + .word .LANCHOR0 + .fnend + .size ftl_erase_phy_blk, .-ftl_erase_phy_blk + .align 2 + .global ftl_erase_sblk + .syntax unified + .arm + .fpu softvfp + .type ftl_erase_sblk, %function +ftl_erase_sblk: + .fnstart + @ args = 0, pretend = 0, frame = 80 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + lsl fp, r0, #2 + ldr r4, .L1224 + mov r8, r0 + mov r7, r1 + mov r6, #0 + ldr r9, .L1224+4 + .pad #84 + sub sp, sp, #84 + ldr r3, [r4, #1084] + add r3, r3, fp + ldrb r3, [r3, #3] @ zero_extendqisi2 + str r3, [sp, #4] +.L1200: + ldr r3, .L1224+4 + ldrb r3, [r3, #-3072] @ zero_extendqisi2 + cmp r6, r3 + bge .L1211 + ldr r3, .L1224+4 + mov r5, #0 + ldrb r2, [r3, #-3136] @ zero_extendqisi2 + sub r10, r2, #1 + mul r3, r2, r8 + mul ip, r2, r6 + str r3, [sp, #8] + ldr r3, .L1224+8 + ldrh r3, [r3] + str r3, [sp, #12] + mov r3, r5 + b .L1212 +.L1202: + ldr lr, [sp, #4] + add r1, ip, r3 + asr r1, lr, r1 + tst r1, #1 + bne .L1201 + ldr r0, [sp, #8] + add r1, sp, #80 + add lr, r1, r5, lsl #2 + and r1, r3, r10 + add r5, r5, #1 + add r1, r1, r0 + ldr r0, [sp, #12] + mul r1, r0, r1 + str r1, [lr, #-64] +.L1201: + add r3, r3, #1 +.L1212: + cmp r3, r2 + blt .L1202 + cmp r2, #4 + bne .L1203 + uxtb r3, r7 + mov r10, #0 + str r3, [sp, #8] + uxtb r3, r6 +.L1204: + cmp r10, r5 + bne .L1205 +.L1206: + add r6, r6, #1 + b .L1200 +.L1205: + add r2, sp, #16 + mov r0, r3 + ldr r2, [r2, r10, lsl #2] + add r10, r10, #1 + ldr r1, [sp, #8] + str r3, [sp, #12] + bl flash_erase_block_en + ldr r3, [sp, #12] + b .L1204 +.L1203: + cmp r5, #2 + bne .L1207 + ldrb r3, [r9, #-3126] @ zero_extendqisi2 + uxtb r5, r6 + cmp r3, #0 + beq .L1208 + ldrb r3, [r9, #-3125] @ zero_extendqisi2 + cmp r3, #0 + bne .L1208 + clz r1, r7 + ldr r3, [sp, #20] + ldr r2, [sp, #16] + lsr r1, r1, #5 + mov r0, r5 + bl flash_erase_duplane_block +.L1208: + ldr r3, [sp, #20] + uxtb r1, r7 + ldr r2, [sp, #16] + mov r0, r5 + bl flash_erase_duplane_block + b .L1206 +.L1207: + cmp r5, #1 + bne .L1206 + ldrb r3, [r9, #-3126] @ zero_extendqisi2 + uxtb r5, r6 + cmp r3, #0 + beq .L1210 + ldrb r3, [r9, #-3125] @ zero_extendqisi2 + cmp r3, #0 + bne .L1210 + clz r1, r7 + ldr r2, [sp, #16] + lsr r1, r1, #5 + mov r0, r5 + bl flash_erase_block_en +.L1210: + ldr r2, [sp, #16] + uxtb r1, r7 + mov r0, r5 + bl flash_erase_block_en + b .L1206 +.L1211: + cmp r7, #0 + bne .L1213 + ldr r2, [r4, #1084] + ldrh r3, [r2, fp] + add r1, r3, #1 + bfi r3, r1, #0, #11 + strh r3, [r2, fp] @ movhi + ldr r3, [r4, #2800] + ldr r2, [r3, #84] + ldrh r0, [r3, #96] + add r2, r2, #1 + str r2, [r3, #84] + ldr r2, [r4, #1084] + ldrh r2, [r2, fp] + ubfx r2, r2, #0, #11 + uxth r1, r2 + cmp r0, r1 + strhlt r2, [r3, #96] @ movhi +.L1215: + mov r0, #0 + add sp, sp, #84 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L1213: + ldr r1, [r4, #1084] + ldr r3, [r1, r8, lsl #2] + ubfx r2, r3, #11, #8 + add r2, r2, #1 + bfi r3, r2, #11, #8 + str r3, [r1, r8, lsl #2] + ldr r3, [r4, #2800] + ldr r2, [r3, #80] + ldrh r1, [r3, #98] + add r2, r2, #1 + str r2, [r3, #80] + ldr r2, [r4, #1084] + ldr r2, [r2, r8, lsl #2] + ubfx r2, r2, #11, #8 + cmp r1, r2 + strhcc r2, [r3, #98] @ movhi + b .L1215 +.L1225: + .align 2 +.L1224: + .word .LANCHOR0 + .word .LANCHOR3 + .word .LANCHOR3-3074 + .fnend + .size ftl_erase_sblk, .-ftl_erase_sblk + .align 2 + .global ftl_alloc_sys_blk + .syntax unified + .arm + .fpu softvfp + .type ftl_alloc_sys_blk, %function +ftl_alloc_sys_blk: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L1236 + push {r4, lr} + .save {r4, lr} + mov r4, r3 + ldr r2, [r3, #2800] + ldrh r1, [r2, #136] + cmp r1, #63 + movhi r3, #0 + strhhi r3, [r2, #136] @ movhi + ldrh r3, [r2, #112] + cmp r3, #0 + bne .L1228 + movw r2, #1359 + ldr r1, .L1236+4 + ldr r0, .L1236+8 + bl rk_printk + bl dump_stack +.L1228: + ldr r3, [r4, #2800] + movw lr, #65535 + mov ip, #0 +.L1232: + ldrh r2, [r3, #136] + add r1, r3, r2, lsl #1 + add r1, r1, #158 +.L1229: + cmp r2, #63 + strhgt ip, [r3, #136] @ movhi + bgt .L1232 +.L1231: + ldrh r0, [r1, #2]! + cmp r0, lr + addeq r2, r2, #1 + beq .L1229 +.L1234: + add r1, r3, r2, lsl #1 + mvn ip, #0 + strh ip, [r1, #160] @ movhi + strh r2, [r3, #136] @ movhi + ldrh r2, [r3, #112] + add r2, r2, ip + strh r2, [r3, #112] @ movhi + pop {r4, pc} +.L1237: + .align 2 +.L1236: + .word .LANCHOR0 + .word .LANCHOR1+1479 + .word .LC0 + .fnend + .size ftl_alloc_sys_blk, .-ftl_alloc_sys_blk + .align 2 + .global ftl_free_sys_blk + .syntax unified + .arm + .fpu softvfp + .type ftl_free_sys_blk, %function +ftl_free_sys_blk: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L1247 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + mov r5, r0 + mov r4, r3 + ldr r2, [r3, #2800] + ldrh r1, [r2, #138] + cmp r1, #63 + movhi r3, #0 + strhhi r3, [r2, #138] @ movhi + ldrh r3, [r2, #112] + cmp r3, #63 + bls .L1240 + movw r2, #1386 + ldr r1, .L1247+4 + ldr r0, .L1247+8 + bl rk_printk + bl dump_stack +.L1240: + ldr r3, [r4, #2800] + movw ip, #65535 + mov r0, #0 +.L1244: + ldrh r2, [r3, #138] + add r1, r3, r2, lsl #1 + add r1, r1, #158 +.L1241: + cmp r2, #63 + strhgt r0, [r3, #138] @ movhi + bgt .L1244 +.L1243: + ldrh lr, [r1, #2]! + cmp lr, ip + bne .L1242 + add r1, r3, r2, lsl #1 + strh r5, [r1, #160] @ movhi + strh r2, [r3, #138] @ movhi + ldrh r2, [r3, #112] + add r2, r2, #1 + strh r2, [r3, #112] @ movhi + pop {r4, r5, r6, pc} +.L1242: + add r2, r2, #1 + b .L1241 +.L1248: + .align 2 +.L1247: + .word .LANCHOR0 + .word .LANCHOR1+1497 + .word .LC0 + .fnend + .size ftl_free_sys_blk, .-ftl_free_sys_blk + .align 2 + .global ftl_info_data_recovery + .syntax unified + .arm + .fpu softvfp + .type ftl_info_data_recovery, %function +ftl_info_data_recovery: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + movw r3, #65535 + ldrh r6, [r0] + cmp r6, r3 + popeq {r4, r5, r6, r7, r8, pc} + ldr r4, .L1259 + lsl r8, r6, #2 + ldr r5, [r4, #1084] + add r7, r5, r8 + ldrb r3, [r7, #2] @ zero_extendqisi2 + tst r3, #224 + popne {r4, r5, r6, r7, r8, pc} + ldrb r2, [r0, #4] @ zero_extendqisi2 + mov r0, r6 + bfi r3, r2, #5, #3 + strb r3, [r7, #2] + bl zftl_remove_free_node + ldrb r3, [r7, #2] @ zero_extendqisi2 + ldr r2, [r4, #2800] + tst r3, #8 + ldrhne r3, [r2, #116] + subne r3, r3, #1 + strhne r3, [r2, #116] @ movhi + bne .L1254 + tst r3, #24 + ldrheq r3, [r2, #114] + ldrhne r3, [r2, #118] + subeq r3, r3, #1 + subne r3, r3, #1 + strheq r3, [r2, #114] @ movhi + strhne r3, [r2, #118] @ movhi +.L1254: + ldrb r3, [r7, #2] @ zero_extendqisi2 + and r3, r3, #224 + cmp r3, #160 + bne .L1256 + ldr r3, [r5, r6, lsl #2] + ubfx r2, r3, #11, #8 + add r2, r2, #1 + bfi r3, r2, #11, #8 + str r3, [r5, r6, lsl #2] + ldr r2, [r4, #2800] + ldrh r3, [r2, #120] + sub r3, r3, #1 + strh r3, [r2, #120] @ movhi + pop {r4, r5, r6, r7, r8, pc} +.L1256: + ldrh r2, [r5, r8] + cmp r3, #64 + add r1, r2, #1 + bfi r2, r1, #0, #11 + strh r2, [r5, r8] @ movhi + bne .L1257 + ldr r2, [r4, #2800] + ldrh r3, [r2, #122] + sub r3, r3, #1 + strh r3, [r2, #122] @ movhi + pop {r4, r5, r6, r7, r8, pc} +.L1257: + cmp r3, #96 + ldreq r2, [r4, #2800] + ldrheq r3, [r2, #124] + subeq r3, r3, #1 + strheq r3, [r2, #124] @ movhi + pop {r4, r5, r6, r7, r8, pc} +.L1260: + .align 2 +.L1259: + .word .LANCHOR0 + .fnend + .size ftl_info_data_recovery, .-ftl_info_data_recovery + .align 2 + .global ftl_get_ppa_from_index + .syntax unified + .arm + .fpu softvfp + .type ftl_get_ppa_from_index, %function +ftl_get_ppa_from_index: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L1266 + push {r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + mov r4, r0 + ldr r5, [r3, #1096] + ldr r3, .L1266+4 + sub r2, r3, #3088 + ldrb r3, [r3, #-3127] @ zero_extendqisi2 + ldrh r2, [r2, #-8] + mul r1, r3, r2 + cmp r0, r1 + smulbbge r3, r3, r2 + addlt r5, r5, #16 + addge r5, r5, #48 + ldrb r6, [r5, #9] @ zero_extendqisi2 + subge r4, r0, r3 + uxthge r4, r4 + mov r1, r6 + mov r0, r4 + bl __aeabi_idiv + smulbb r6, r0, r6 + movw r3, #65535 + mov r7, r0 + sub r4, r4, r6 + uxth r4, r4 + add r4, r5, r4, lsl #1 + ldrh r4, [r4, #16] + cmp r4, r3 + bne .L1264 + movw r2, #1945 + ldr r1, .L1266+8 + ldr r0, .L1266+12 + bl rk_printk + bl dump_stack +.L1264: + ldr r3, .L1266+16 + ldrh r0, [r3, #-2] + mla r0, r4, r0, r7 + pop {r4, r5, r6, r7, r8, pc} +.L1267: + .align 2 +.L1266: + .word .LANCHOR0 + .word .LANCHOR3 + .word .LANCHOR1+1514 + .word .LC0 + .word .LANCHOR3-3072 + .fnend + .size ftl_get_ppa_from_index, .-ftl_get_ppa_from_index + .align 2 + .global lpa_hash_get_ppa + .syntax unified + .arm + .fpu softvfp + .type lpa_hash_get_ppa, %function +lpa_hash_get_ppa: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r2, .L1276 + uxtb r3, r0 + lsl r3, r3, #1 + sub r1, r2, #3056 + ldr ip, [r2, #-2552] + sub r1, r1, #14 + ldrh r3, [r1, r3] + ldr r1, [r2, #-2556] + movw r2, #65535 + cmp r3, r2 + bne .L1275 + mvn r0, #0 + bx lr +.L1270: + lsl r3, r3, #1 + ldrh r3, [ip, r3] + cmp r3, r2 + bne .L1271 + mvn r0, #0 + ldr pc, [sp], #4 +.L1275: + str lr, [sp, #-4]! + .save {lr} +.L1271: + ldr lr, [r1, r3, lsl #2] + cmp r0, lr + bne .L1270 + mov r0, r3 + ldr lr, [sp], #4 + b ftl_get_ppa_from_index +.L1277: + .align 2 +.L1276: + .word .LANCHOR3 + .fnend + .size lpa_hash_get_ppa, .-lpa_hash_get_ppa + .align 2 + .global ftl_get_new_free_page + .syntax unified + .arm + .fpu softvfp + .type ftl_get_new_free_page, %function +ftl_get_new_free_page: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, lr} + .save {r4, lr} + movw r3, #65535 + ldrh r2, [r0] + mov r4, r0 + cmp r2, r3 + bne .L1279 + movw r2, #2088 + ldr r1, .L1287 + ldr r0, .L1287+4 + bl rk_printk + bl dump_stack +.L1279: + ldr r3, .L1287+8 + ldrh r2, [r4, #2] + ldrh r3, [r3, #-8] + cmp r2, r3 + bne .L1280 + movw r2, #2089 + ldr r1, .L1287 + ldr r0, .L1287+4 + bl rk_printk + bl dump_stack +.L1280: + ldrh r3, [r4, #6] + cmp r3, #0 + bne .L1281 + movw r2, #2090 + ldr r1, .L1287 + ldr r0, .L1287+4 + bl rk_printk + bl dump_stack +.L1281: + ldrb r3, [r4, #5] @ zero_extendqisi2 + movw r2, #65535 + mov r1, #0 + add r3, r4, r3, lsl #1 + ldrh r0, [r3, #16] + ldr r3, .L1287+12 + ldrb ip, [r3, #-3127] @ zero_extendqisi2 +.L1282: + cmp r0, r2 + ldrb r3, [r4, #5] @ zero_extendqisi2 + beq .L1284 + ldr r1, .L1287+16 + add r3, r3, #1 + uxtb r3, r3 + ldrh r2, [r4, #2] + ldrh r1, [r1, #-2] + cmp ip, r3 + strb r3, [r4, #5] + addeq r3, r2, #1 + strheq r3, [r4, #2] @ movhi + moveq r3, #0 + strbeq r3, [r4, #5] + mul r0, r0, r1 + ldrh r1, [r4, #6] + sub r1, r1, #1 + strh r1, [r4, #6] @ movhi + orr r0, r0, r2 + ldrh r1, [r4, #10] + add r1, r1, #1 + strh r1, [r4, #10] @ movhi + pop {r4, pc} +.L1284: + add r3, r3, #1 + uxtb r3, r3 + cmp r3, ip + strb r3, [r4, #5] + ldrheq r3, [r4, #2] + strbeq r1, [r4, #5] + addeq r3, r3, #1 + strheq r3, [r4, #2] @ movhi + ldrb r3, [r4, #5] @ zero_extendqisi2 + add r3, r4, r3, lsl #1 + ldrh r0, [r3, #16] + b .L1282 +.L1288: + .align 2 +.L1287: + .word .LANCHOR1+1537 + .word .LC0 + .word .LANCHOR3-3088 + .word .LANCHOR3 + .word .LANCHOR3-3072 + .fnend + .size ftl_get_new_free_page, .-ftl_get_new_free_page + .align 2 + .global ftl_ext_alloc_new_blk + .syntax unified + .arm + .fpu softvfp + .type ftl_ext_alloc_new_blk, %function +ftl_ext_alloc_new_blk: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + bl ftl_alloc_sys_blk + sub r3, r0, #1 + movw r2, #65533 + uxth r3, r3 + mov r4, r0 + cmp r3, r2 + bls .L1290 + movw r2, #2125 + ldr r1, .L1292 + ldr r0, .L1292+4 + bl rk_printk + bl dump_stack +.L1290: + ldr r5, .L1292+8 + mov r1, #0 + mov r0, r4 + bl ftl_erase_phy_blk + ldr r3, [r5, #2800] + ldrh r0, [r3, #130] + bl ftl_free_sys_blk + ldr r3, [r5, #2800] + mov r0, #0 + strh r4, [r3, #130] @ movhi + strh r0, [r3, #140] @ movhi + pop {r4, r5, r6, pc} +.L1293: + .align 2 +.L1292: + .word .LANCHOR1+1559 + .word .LC0 + .word .LANCHOR0 + .fnend + .size ftl_ext_alloc_new_blk, .-ftl_ext_alloc_new_blk + .align 2 + .global ftl_total_vpn_update + .syntax unified + .arm + .fpu softvfp + .type ftl_total_vpn_update, %function +ftl_total_vpn_update: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r2, .L1308 + ldrh r3, [r2, #-4] + cmp r3, #4 + cmpls r0, #0 + bne .L1295 + add r3, r3, #1 + strh r3, [r2, #-4] @ movhi + bx lr +.L1295: + ldr r3, .L1308+4 + mov r0, #0 + movw ip, #1080 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + strh r0, [r2, #-4] @ movhi + movw r6, #65535 + ldrh lr, [r3, ip] + mov ip, r0 + ldr r2, [r3, #1084] + ldr r1, [r3, #1092] + add lr, r2, lr, lsl #2 + sub r1, r1, #2 +.L1297: + cmp r2, lr + bne .L1300 + ldr r4, [r3, #1096] + ldr r3, [r3, #2800] + str ip, [r4, #524] + str r0, [r4, #528] + ldrh r1, [r3, #120] + cmp r1, #0 + popeq {r4, r5, r6, pc} + bl __aeabi_uidiv + str r0, [r4, #532] + pop {r4, r5, r6, pc} +.L1300: + ldrh r4, [r1, #2]! + cmp r4, r6 + beq .L1298 + ldrb r5, [r2, #2] @ zero_extendqisi2 + and r5, r5, #224 + cmp r5, #160 + addeq r0, r0, r4 + addne ip, ip, r4 +.L1298: + add r2, r2, #4 + b .L1297 +.L1309: + .align 2 +.L1308: + .word .LANCHOR3-2544 + .word .LANCHOR0 + .fnend + .size ftl_total_vpn_update, .-ftl_total_vpn_update + .align 2 + .global ftl_debug_info_fill + .syntax unified + .arm + .fpu softvfp + .type ftl_debug_info_fill, %function +ftl_debug_info_fill: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L1317 + ldrb r3, [r3, #-2546] @ zero_extendqisi2 + cmp r3, #8 + bls .L1314 + sub r3, r0, #2 + cmp r2, #0 + clz r3, r3 + lsr r3, r3, #5 + moveq r3, #0 + cmp r3, #0 + streq r3, [r1] + streq r3, [r1, #4] + beq .L1314 + ldr r3, .L1317+4 + mov r0, r2 + push {r4, lr} + .save {r4, lr} + mov r4, r1 + str r3, [r1] + mov r1, #1024 + bl js_hash + str r0, [r4, #4] + mov r0, #0 + pop {r4, pc} +.L1314: + mov r0, #0 + bx lr +.L1318: + .align 2 +.L1317: + .word .LANCHOR3 + .word 1212240712 + .fnend + .size ftl_debug_info_fill, .-ftl_debug_info_fill + .align 2 + .global ftl_vpn_update + .syntax unified + .arm + .fpu softvfp + .type ftl_vpn_update, %function +ftl_vpn_update: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, lr} + .save {r4, lr} + mov r4, r0 + bl zftl_list_update_data_list + lsl r4, r4, #1 + ldr r3, .L1323 + ldr r2, [r3, #1092] + ldrh r2, [r2, r4] + cmp r2, #0 + moveq r0, #1 + movne r0, #0 + streq r0, [r3, #2812] + pop {r4, pc} +.L1324: + .align 2 +.L1323: + .word .LANCHOR0 + .fnend + .size ftl_vpn_update, .-ftl_vpn_update + .align 2 + .global ftl_vpn_decrement + .syntax unified + .arm + .fpu softvfp + .type ftl_vpn_decrement, %function +ftl_vpn_decrement: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + movw r3, #65535 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + cmp r0, r3 + mov r5, r0 + beq .L1326 + ldr r1, .L1335 + lsl r3, r0, #1 + ldr r2, [r1, #1092] + ldrh r4, [r2, r3] + cmp r4, #0 + subne r4, r4, #1 + strhne r4, [r2, r3] @ movhi + bne .L1326 + ldr r3, [r1, #1084] + mov r2, r4 + mov r1, r0 + add r3, r3, r0, lsl #2 + ldr r0, .L1335+4 + ldrb r3, [r3, #2] @ zero_extendqisi2 + lsr r3, r3, #5 + bl rk_printk +.L1332: + mov r0, #0 + pop {r4, r5, r6, pc} +.L1326: + ldr r3, .L1335+8 + ldrh r0, [r3, #-4] + mov r4, r3 + cmp r5, r0 + beq .L1332 + movw r2, #65535 + cmp r0, r2 + strheq r5, [r3, #-4] @ movhi + beq .L1332 + bl ftl_vpn_update + add r3, r4, #608 + adds r0, r0, #0 + ldrh r2, [r3] + movne r0, #1 + add r2, r2, #1 + uxth r2, r2 + cmp r2, #7 + movhi r2, #0 + strh r2, [r3] @ movhi + ldrh r3, [r3] + ldrh r2, [r4, #-4] + strh r5, [r4, #-4] @ movhi + add r3, r4, r3, lsl #1 + strh r2, [r3, #-2] @ movhi + pop {r4, r5, r6, pc} +.L1336: + .align 2 +.L1335: + .word .LANCHOR0 + .word .LC106 + .word .LANCHOR3-3152 + .fnend + .size ftl_vpn_decrement, .-ftl_vpn_decrement + .align 2 + .global lpa_hash_update_ppa + .syntax unified + .arm + .fpu softvfp + .type lpa_hash_update_ppa, %function +lpa_hash_update_ppa: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L1349 + push {r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + uxtb r7, r0 + movw r8, #65535 + sub lr, r3, #3056 + lsl r7, r7, #1 + sub ip, lr, #14 + ldr r6, [r3, #-2556] + ldrh ip, [ip, r7] + mov r5, r8 + ldr r9, [r3, #-2552] +.L1338: + cmp ip, r5 + beq .L1342 + ldr r4, [r6, ip, lsl #2] + add r10, r6, ip, lsl #2 + cmp r0, r4 + lsl r4, ip, #1 + bne .L1339 + mvn ip, #0 + cmp r8, r5 + str ip, [r10] + lslne r8, r8, #1 + ldr ip, [r3, #-2552] + ldrh r5, [ip, r4] + subeq ip, lr, #14 + strheq r5, [ip, r7] @ movhi + strhne r5, [ip, r8] @ movhi + mvn r5, #0 + ldr ip, [r3, #-2552] + strh r5, [ip, r4] @ movhi +.L1342: + ldr ip, [r3, #-2556] + cmn r1, #1 + str r0, [ip, r2, lsl #2] + sub ip, lr, #14 + ldrh lr, [ip, r7] + ldr r0, [r3, #-2552] + strh r2, [ip, r7] @ movhi + lsl r2, r2, #1 + strh lr, [r0, r2] @ movhi + beq .L1344 + ldr r0, .L1349+4 + ldr r2, .L1349+8 + ldrb ip, [r0, #1153] @ zero_extendqisi2 + mvn r0, #0 + ldrh r2, [r2, #-2] + rsb ip, ip, #24 + sub ip, ip, r2 + lsr r2, r1, r2 + ldrb r1, [r3, #-3136] @ zero_extendqisi2 + bic r0, r2, r0, lsl ip + bl __aeabi_uidiv + uxth r0, r0 + bl ftl_vpn_decrement +.L1344: + mvn r0, #0 + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L1339: + mov r8, ip + ldrh ip, [r9, r4] + b .L1338 +.L1350: + .align 2 +.L1349: + .word .LANCHOR3 + .word .LANCHOR0 + .word .LANCHOR3-3136 + .fnend + .size lpa_hash_update_ppa, .-lpa_hash_update_ppa + .align 2 + .global ftl_mask_bad_block + .syntax unified + .arm + .fpu softvfp + .type ftl_mask_bad_block, %function +ftl_mask_bad_block: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + .pad #8 + mov r3, #1 + ldr r7, .L1359 + ldr ip, .L1359+4 + ldrb r4, [r7, #1153] @ zero_extendqisi2 + ldrb r5, [ip, #-3136]! @ zero_extendqisi2 + rsb r1, r4, #24 + lsl r4, r3, r4 + sub r4, r4, #1 + and r4, r4, r0, lsr r1 + uxtb r4, r4 + smulbb r2, r4, r5 + uxtb r9, r2 + ldrh r2, [ip, #-2] + sub r1, r1, r2 + lsl r3, r3, r1 + mov r1, r5 + sub r3, r3, #1 + and r0, r3, r0, lsr r2 + uxth r10, r0 + bl __aeabi_uidiv + ldr r3, .L1359+8 + cmp r5, #1 + subhi r2, r5, #1 + mov r6, r0 + andhi r2, r2, r10 + uxth r8, r0 + ldr r3, [r3] + addhi r2, r9, r2 + uxtbhi r9, r2 + tst r3, #16384 + beq .L1353 + uxth r3, r0 + str r10, [sp] + mov r2, r9 + ldr r0, .L1359+12 + mov r1, r4 + bl rk_printk +.L1353: + movw r3, #1080 + ldrh r3, [r7, r3] + cmp r3, r8 + bls .L1351 + ldr r3, [r7, #1084] + uxth r6, r6 + add r6, r3, r6, lsl #2 + mov r3, #1 + ldrb r2, [r6, #3] @ zero_extendqisi2 + orr r2, r2, r3, lsl r9 + strb r2, [r6, #3] +.L1351: + add sp, sp, #8 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L1360: + .align 2 +.L1359: + .word .LANCHOR0 + .word .LANCHOR3 + .word .LANCHOR2 + .word .LC107 + .fnend + .size ftl_mask_bad_block, .-ftl_mask_bad_block + .align 2 + .global gc_free_bad_sblk + .syntax unified + .arm + .fpu softvfp + .type gc_free_bad_sblk, %function +gc_free_bad_sblk: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #12 + ldr r6, .L1382 + ldr r3, [r6, #916] + cmp r3, #0 + beq .L1378 + ldr r8, .L1382+4 + mov r7, #0 + str r0, [sp, #4] +.L1363: + ldrb r2, [r8, #-3127] @ zero_extendqisi2 + uxth r3, r7 + cmp r2, r3 + bhi .L1373 +.L1378: + mov r0, #0 + add sp, sp, #12 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L1373: + ldrb r9, [r8, #-3136] @ zero_extendqisi2 + uxth r0, r7 + ldr r10, .L1382+8 + ldr fp, .L1382+12 + mov r1, r9 + bl __aeabi_idiv + ldrb r3, [r10, #1153] @ zero_extendqisi2 + uxth r5, r9 + ldrh r2, [sp, #4] + cmp r9, #1 + ldrh r4, [fp], #2 + mov r9, #0 + rsb r3, r3, #24 + str r10, [sp] + ldr r10, .L1382+16 + sub r3, r3, r4 + smulbb r4, r2, r5 + subhi r5, r5, #1 + andhi r5, r5, r7 + add r4, r4, r0, lsl r3 + uxth r4, r4 + addhi r4, r4, r5 + uxthhi r4, r4 +.L1365: + ldr r1, [r6, #916] + uxth r5, r9 + mov r3, r5 + cmp r1, r5 + addls r7, r7, #1 + bls .L1363 +.L1372: + add r3, r3, #1088 + add r3, r3, #8 + lsl r3, r3, #1 + ldrh r3, [r10, r3] + cmp r3, r4 + bne .L1366 + mov r1, r4 + ldr r0, .L1382+20 + bl rk_printk + ldrb r3, [r8, #-2542] @ zero_extendqisi2 + cmp r3, #0 + bne .L1367 + ldrb r3, [r8, #-3126] @ zero_extendqisi2 + cmp r3, #0 + beq .L1368 +.L1367: + ldr r3, [sp] + ldr r2, .L1382+24 + ldr r3, [r3, #2800] + ldr r3, [r3, #156] + cmp r3, r2 + beq .L1369 +.L1368: + ldrh r0, [fp, #-2] + lsl r0, r4, r0 + bl ftl_mask_bad_block +.L1369: + ldr r3, [r6, #916] + movw r0, #1097 + movw ip, #1096 +.L1370: + cmp r5, r3 + bcc .L1371 + sub r3, r3, #1 + str r3, [r6, #916] +.L1366: + add r9, r9, #1 + b .L1365 +.L1371: + add r1, r5, r0 + lsl r1, r1, #1 + ldrh lr, [r10, r1] + add r1, r5, ip + lsl r1, r1, #1 + add r5, r5, #1 + uxth r5, r5 + strh lr, [r10, r1] @ movhi + b .L1370 +.L1383: + .align 2 +.L1382: + .word .LANCHOR0+4096 + .word .LANCHOR3 + .word .LANCHOR0 + .word .LANCHOR3-3138 + .word .LANCHOR0+2824 + .word .LC108 + .word 1145785929 + .fnend + .size gc_free_bad_sblk, .-gc_free_bad_sblk + .align 2 + .global ftl_free_sblk + .syntax unified + .arm + .fpu softvfp + .type ftl_free_sblk, %function +ftl_free_sblk: + .fnstart + @ args = 0, pretend = 0, frame = 16 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + lsl r10, r0, #2 + ldr r5, .L1407 + .pad #20 + sub sp, sp, #20 + mov r7, r0 + ldr r6, [r5, #1084] + add r8, r6, r10 + ldrb r4, [r8, #2] @ zero_extendqisi2 + tst r4, #8 + lsr r3, r4, #5 + str r3, [sp, #4] + beq .L1385 + ldr r1, [r5, #2800] + ldrh r3, [r6, r10] + ldr fp, [r6, r0, lsl #2] + ldrh r2, [r1, #74] + ubfx r3, r3, #0, #11 + str r3, [sp, #12] + ubfx fp, fp, #11, #8 + add r2, r3, r2 + uxth r3, r2 + ldrh r2, [r1, #72] + add r1, r5, #1088 + ldrh r9, [r1] + mov r0, r3 + add r2, r2, fp + str r3, [sp] + uxth r2, r2 + mov r1, r9 + str r2, [sp, #8] + bl __aeabi_uidiv + ldr ip, .L1407+4 + ldr r2, [sp, #8] + ldr r3, [sp, #12] + ldrh r1, [ip, #-12] + uxtah r0, r2, r0 + cmp r0, r1 + ble .L1386 + movw r2, #2794 + ldrh r0, [r5, r2] + movw r2, #2786 + ldrh r2, [r5, r2] + add r0, r0, r2 + sub r2, ip, #560 + ldrh r1, [r2, #-2] + add r1, r1, #8 + cmp r0, r1 + bge .L1387 +.L1392: + mov r2, #2 + bfi r4, r2, #3, #2 + b .L1403 +.L1387: + movw r1, #2790 + add r0, r5, #2784 + ldrh r0, [r0] + ldrh r1, [r5, r1] + ldrh r2, [r2, #-4] + add r1, r1, r0 + movw r0, #2792 + ldrh r0, [r5, r0] + add r2, r2, #8 + add r1, r1, r0 + cmp r1, r2 +.L1406: + bge .L1392 + b .L1404 +.L1386: + ldr r1, [sp] + mla r2, r2, r9, r1 + ldrh r1, [ip, #-10] + cmp r2, r1 + ble .L1388 + movw r2, #2790 + ldrh r1, [r5, r2] + add r2, r5, #2784 + ldrh r2, [r2] + add r1, r1, r2 + movw r2, #2792 + ldrh r2, [r5, r2] + add r1, r1, r2 + sub r2, ip, #560 + ldrh r0, [r2, #-4] + add ip, r0, #8 + cmp r1, ip + bge .L1390 +.L1404: + bfc r4, #3, #2 +.L1403: + strb r4, [r8, #2] +.L1388: + ldrb r2, [r8, #2] @ zero_extendqisi2 + ands r2, r2, #24 + bne .L1393 + mul r9, r9, fp + ldrh r2, [r6, r10] + lsr fp, fp, #3 + add r9, r9, r9, lsl #1 + add r3, r3, r9, asr #2 + bfi r2, r3, #0, #11 + strh r2, [r6, r10] @ movhi + ldr r3, [r6, r7, lsl #2] + bfi r3, fp, #11, #8 + str r3, [r6, r7, lsl #2] +.L1394: + mov r0, r7 + bl zftl_remove_data_node + ldr r3, .L1407 + mov r0, #0 + ldr r2, [r3, #1084] + mov r4, r3 + add r10, r2, r10 + ldrb r2, [r10, #2] @ zero_extendqisi2 + bfc r2, #5, #3 + strb r2, [r10, #2] + lsl r2, r7, #1 + ldr r1, [r3, #1092] + strh r0, [r1, r2] @ movhi + ldr r2, [sp, #4] + add r2, r2, #6 + and r2, r2, #7 + cmp r2, #4 + bhi .L1397 + mov r0, r7 + bl gc_free_bad_sblk +.L1397: + ldrb r3, [r8, #2] @ zero_extendqisi2 + tst r3, #8 + beq .L1398 + ldr r3, [r4, #1096] + movw r2, #586 + ldrh r1, [r3, r2] + cmp r1, r7 + bne .L1398 + mvn r1, #0 + strh r1, [r3, r2] @ movhi + movw r2, #590 + ldrh r0, [r3, r2] + movw r1, #65535 + cmp r0, r1 + bne .L1398 + strh r7, [r3, r2] @ movhi + mov r1, r7 + ldr r0, .L1407+8 + add sp, sp, #20 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, lr} + b rk_printk +.L1390: + movw ip, #2794 + movw lr, #2786 + ldrh ip, [r5, ip] + ldrh lr, [r5, lr] + ldrh r2, [r2, #-2] + add ip, ip, lr + add r2, r2, #8 + cmp ip, r2 + blt .L1392 + add r0, r0, #24 + cmp r1, r0 + b .L1406 +.L1393: + cmp r2, #16 + bne .L1394 + mov r0, r3 + mov r1, r9 + str r3, [sp] + bl __aeabi_idiv + add r0, r0, r0, lsl #1 + ldr r2, [r6, r7, lsl #2] + add fp, fp, r0, asr #2 + bfi r2, fp, #11, #8 + str r2, [r6, r7, lsl #2] + ldr r3, [sp] + ldrh r2, [r6, r10] + asr r3, r3, #5 + bfi r2, r3, #0, #11 + strh r2, [r6, r10] @ movhi + b .L1394 +.L1385: + tst r4, #24 + bne .L1394 + movw r3, #2788 + ldrh r3, [r5, r3] + cmp r3, #0 + bne .L1394 + movw r3, #2786 + ldrh r0, [r5, r3] + cmp r0, #15 + bhi .L1394 + movw r3, #2790 + add r2, r5, #2784 + ldrh r2, [r2] + ldrh r3, [r5, r3] + ldr ip, .L1407+12 + add r3, r3, r2 + movw r2, #2792 + ldrh r2, [r5, r2] + ldrh r1, [ip, #-4] + add r3, r3, r2 + add r1, r1, #16 + cmp r3, r1 + ble .L1394 + movw r3, #2794 + ldrh r2, [r5, r3] + ldrh r3, [ip, #-2] + add r2, r2, r0 + add r3, r3, #8 + cmp r2, r3 + bge .L1394 + mov r3, #2 + add r5, r5, #1088 + bfi r4, r3, #3, #2 + ldrh r1, [r5] + strb r4, [r8, #2] + ldrh r4, [r6, r10] + ubfx r4, r4, #0, #11 + mov r0, r4 + asr r4, r4, #5 + bl __aeabi_idiv + ldr r3, [r6, r7, lsl #2] + add r0, r0, r0, lsl #1 + ubfx r2, r3, #11, #8 + add r0, r2, r0, asr #2 + bfi r3, r0, #11, #8 + str r3, [r6, r7, lsl #2] + ldrh r3, [r6, r10] + bfi r3, r4, #0, #11 + strh r3, [r6, r10] @ movhi + b .L1394 +.L1398: + mov r0, r7 + add sp, sp, #20 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, lr} + b zftl_insert_free_list +.L1408: + .align 2 +.L1407: + .word .LANCHOR0 + .word .LANCHOR3-2528 + .word .LC109 + .word .LANCHOR3-3088 + .fnend + .size ftl_free_sblk, .-ftl_free_sblk + .align 2 + .global gc_free_src_blk + .syntax unified + .arm + .fpu softvfp + .type gc_free_src_blk, %function +gc_free_src_blk: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + mov r5, #0 + ldr r8, .L1447 + ldr r7, .L1447+4 + mov r6, r8 +.L1410: + ldrh r2, [r7, #52] + uxth r3, r5 + cmp r2, r3 + bhi .L1424 + mov r3, #0 + strh r3, [r7, #52] @ movhi + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L1424: + uxth r3, r5 + add r3, r7, r3, lsl #1 + ldrh r4, [r3, #54] + ldr r3, [r8, #1092] + lsl r9, r4, #1 + ldrh r2, [r3, r9] + cmp r2, #0 + beq .L1411 + mov r1, r4 + ldr r0, .L1447+8 + bl rk_printk +.L1411: + ldr r3, [r6, #1092] + mov r2, #0 + strh r2, [r3, r9] @ movhi + ldr r3, [r6, #1092] + ldrh r3, [r3, r9] + cmp r3, r2 + bne .L1412 + ldr r3, .L1447+12 + ldr r9, [r6, #1084] + ldr r3, [r3] + add r9, r9, r4, lsl #2 + tst r3, #256 + beq .L1413 + ldrb r2, [r9, #2] @ zero_extendqisi2 + mov r1, r4 + ldr r0, .L1447+16 + lsr r2, r2, #5 + bl rk_printk +.L1413: + ldrb r3, [r9, #2] @ zero_extendqisi2 + and r2, r3, #224 + and r3, r3, #192 + cmp r3, #0 + cmpne r2, #224 + bne .L1414 + movw r2, #1363 + ldr r1, .L1447+20 + ldr r0, .L1447+24 + bl rk_printk + bl dump_stack +.L1414: + mov r0, r4 + bl ftl_free_sblk + ldr r3, [r6, #1096] + ldrh r1, [r3, #124] + cmp r1, #0 + beq .L1415 + add r0, r3, #392 + mov r2, #0 +.L1417: + ldrh ip, [r0], #2 + cmp r4, ip + bne .L1416 + add r2, r2, #196 + mvn r0, #0 + lsl r2, r2, #1 + add r1, r1, r0 + strh r0, [r3, r2] @ movhi + strh r1, [r3, #124] @ movhi +.L1415: + ldrh r1, [r3, #120] + cmp r1, #0 + beq .L1418 + add r0, r3, #136 + mov r2, #0 +.L1420: + ldrh ip, [r0], #2 + cmp r4, ip + bne .L1419 + mvn r0, #0 + add r2, r3, r2, lsl #1 + add r1, r1, r0 + strh r0, [r2, #136] @ movhi + strh r1, [r3, #120] @ movhi +.L1418: + ldrh r1, [r3, #122] + cmp r1, #0 + beq .L1421 + add r0, r3, #264 + mov r2, #0 +.L1423: + ldrh ip, [r0], #2 + cmp r4, ip + bne .L1422 + add r2, r2, #132 + mvn r0, #0 + lsl r2, r2, #1 + add r1, r1, r0 + strh r0, [r3, r2] @ movhi + strh r1, [r3, #122] @ movhi +.L1421: + add r5, r5, #1 + b .L1410 +.L1416: + add r2, r2, #1 + cmp r2, #64 + bne .L1417 + b .L1415 +.L1419: + add r2, r2, #1 + cmp r2, #64 + bne .L1420 + b .L1418 +.L1422: + add r2, r2, #1 + cmp r2, #64 + bne .L1423 + b .L1421 +.L1412: + mov r1, #1 + mov r0, r4 + bl gc_add_sblk + b .L1421 +.L1448: + .align 2 +.L1447: + .word .LANCHOR0 + .word .LANCHOR0+2824 + .word .LC110 + .word .LANCHOR2 + .word .LC111 + .word .LANCHOR1+1581 + .word .LC0 + .fnend + .size gc_free_src_blk, .-gc_free_src_blk + .align 2 + .global print_ftl_debug_info + .syntax unified + .arm + .fpu softvfp + .type print_ftl_debug_info, %function +print_ftl_debug_info: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, lr} + .save {r4, lr} + .pad #32 + sub sp, sp, #32 + ldr r4, .L1451 + ldr r1, [r4, #2800] + add r3, r4, #2784 + ldr r0, [r4, #1096] + ldr ip, [r4, #2780] + ldrh r2, [r1, #146] + ldrh r3, [r3] + ldrh r1, [r1, #148] + str ip, [sp, #28] + ldr ip, [r0, #528] + str ip, [sp, #24] + ldr r0, [r0, #524] + str r0, [sp, #20] + movw r0, #2794 + ldrh r0, [r4, r0] + str r0, [sp, #16] + movw r0, #2792 + ldrh r0, [r4, r0] + str r0, [sp, #12] + movw r0, #2790 + ldrh r0, [r4, r0] + str r0, [sp, #8] + movw r0, #2788 + ldrh r0, [r4, r0] + str r0, [sp, #4] + movw r0, #2786 + ldrh r0, [r4, r0] + str r0, [sp] + ldr r0, .L1451+4 + bl rk_printk + ldr r1, [r4, #2800] + ldrb r3, [r4, #2797] @ zero_extendqisi2 + ldr r0, .L1451+8 + ldr r2, [r1, #64] + str r2, [sp, #4] + ldr r2, [r1, #8] + str r2, [sp] + ldr r2, [r1, #28] + ldr r1, [r1, #20] + bl rk_printk + ldr r1, [r4, #2800] + ldr r0, .L1451+12 + ldr r3, [r1, #16] + ldr r2, [r1, #60] + ldr r1, [r1, #52] + lsr r3, r3, #11 + bl rk_printk + ldr r2, [r4, #2800] + ldrh r0, [r2, #98] + ldrh r3, [r2, #88] + ldrh r1, [r2, #74] + str r0, [sp, #24] + ldrh r0, [r2, #94] + str r0, [sp, #20] + ldrh r0, [r2, #90] + str r0, [sp, #16] + ldr r0, [r2, #80] + str r0, [sp, #12] + ldrh r0, [r2, #72] + str r0, [sp, #8] + ldrh r0, [r2, #96] + str r0, [sp, #4] + ldrh r0, [r2, #92] + str r0, [sp] + ldr r0, .L1451+16 + ldr r2, [r2, #84] + bl rk_printk + movw r0, #2804 + movw r3, #2818 + ldrh r0, [r4, r0] + movw r2, #2806 + movw r1, #2808 + ldrh r3, [r4, r3] + ldrh r2, [r4, r2] + str r0, [sp, #4] + add r0, r4, #2816 + ldrh r0, [r0] + ldrh r1, [r4, r1] + str r0, [sp] + ldr r0, .L1451+20 + bl rk_printk + ldr ip, [r4, #2800] + movw r2, #586 + ldr r0, [r4, #1096] + ldrh lr, [ip, #150] + add r3, r0, #588 + add r1, r0, #584 + ldrh r2, [r0, r2] + ldrh r3, [r3] + ldrh r1, [r1] + str lr, [sp, #8] + ldr ip, [ip, #156] + str ip, [sp, #4] + movw ip, #590 + ldrh r0, [r0, ip] + str r0, [sp] + ldr r0, .L1451+24 + bl rk_printk + add sp, sp, #32 + @ sp needed + pop {r4, pc} +.L1452: + .align 2 +.L1451: + .word .LANCHOR0 + .word .LC112 + .word .LC113 + .word .LC114 + .word .LC115 + .word .LC116 + .word .LC117 + .fnend + .size print_ftl_debug_info, .-print_ftl_debug_info + .align 2 + .global ftl_write_buf + .syntax unified + .arm + .fpu softvfp + .type ftl_write_buf, %function +ftl_write_buf: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + subs r4, r0, #0 + bne .L1454 + movw r2, #811 + ldr r1, .L1464 + ldr r0, .L1464+4 + bl rk_printk + bl dump_stack + bl print_ftl_debug_info + mvn r0, #0 + pop {r4, r5, r6, pc} +.L1457: + mov r1, r4 + ldr r0, .L1464+8 + bl buf_add_tail + ldr r3, [r6, #2800] + ldrb r1, [r4, #40] @ zero_extendqisi2 + ldrb r0, [r6, #2796] @ zero_extendqisi2 + ldr r2, [r3, #16] + add r0, r0, #1 + add r2, r2, r1 + uxtb r0, r0 + str r2, [r3, #16] + ldr r2, [r3, #32] + strb r0, [r6, #2796] + add r2, r2, #1 + str r2, [r3, #32] + pop {r4, r5, r6, pc} +.L1454: + ldr r3, .L1464+12 + ldrb r1, [r4, #40] @ zero_extendqisi2 + ldrb r2, [r3, #-2546] @ zero_extendqisi2 + mov r5, r3 + cmp r1, r2 + bls .L1459 + movw r2, #818 + ldr r1, .L1464 + ldr r0, .L1464+4 + bl rk_printk + bl dump_stack +.L1459: + ldrb r3, [r4, #40] @ zero_extendqisi2 + ldr r6, .L1464+16 + cmp r3, #0 + beq .L1456 + ldrb r2, [r5, #-2546] @ zero_extendqisi2 + cmp r2, r3 + bcs .L1457 +.L1456: + mov r0, r4 + bl zbuf_free + ldrb r0, [r6, #2796] @ zero_extendqisi2 + pop {r4, r5, r6, pc} +.L1465: + .align 2 +.L1464: + .word .LANCHOR1+1597 + .word .LC0 + .word .LANCHOR0+2820 + .word .LANCHOR3 + .word .LANCHOR0 + .fnend + .size ftl_write_buf, .-ftl_write_buf + .align 2 + .global ftl_write_completed + .syntax unified + .arm + .fpu softvfp + .type ftl_write_completed, %function +ftl_write_completed: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + mov r10, #0 + ldr r8, .L1483 + ldr r9, .L1483+4 + mov r6, r8 +.L1467: + ldrb r5, [r8, #2773] @ zero_extendqisi2 + cmp r5, #255 + bne .L1478 + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L1478: + mov r2, #48 + ldr r3, .L1483+8 + mul r2, r2, r5 + add r7, r5, r5, lsl #1 + add r7, r3, r7, lsl #4 + add r4, r8, r2 + ldrb r1, [r4, #1232] @ zero_extendqisi2 + strb r1, [r8, #2773] + ldr r1, [r4, #1268] + cmn r1, #1 + bne .L1468 + ldr r1, .L1483+12 + ldrb r3, [r1, #-2542] @ zero_extendqisi2 + cmp r3, #0 + bne .L1469 + ldrb r3, [r1, #-3126] @ zero_extendqisi2 + cmp r3, #0 + beq .L1470 +.L1469: + ldr r3, [r6, #2800] + ldr r3, [r3, #156] + cmp r3, r9 + beq .L1471 +.L1470: + mov r10, #48 + ldr r3, .L1483+16 + mla r10, r10, r5, r6 + ldrb r1, [r1, #-3136] @ zero_extendqisi2 + ldrh r0, [r3] + ldrb r3, [r6, #1153] @ zero_extendqisi2 + ldr r2, [r10, #1256] + rsb r3, r3, #24 + sub r3, r3, r0 + lsr r2, r2, r0 + mvn r0, #0 + bic r0, r2, r0, lsl r3 + bl __aeabi_uidiv + ldr r3, [r6, #1096] + uxth r4, r0 + movw r2, #65535 + ldr r0, .L1483+20 + ldr r1, [r3, #560] + cmp r1, r2 + mov r1, r4 + streq r4, [r3, #560] + ldreq r2, [r10, #1256] + streq r2, [r3, #564] + mov r3, #48 + mla r5, r3, r5, r6 + ldr r3, [r5, #1256] + ldr r2, [r5, #1252] + bl rk_printk + ldr r3, [r6, #1096] + ldr r2, [r3, #556] + add r2, r2, #1 + str r2, [r3, #556] + ldrh r2, [r3, #16] + cmp r2, r4 + moveq r2, #0 + strheq r2, [r3, #22] @ movhi + beq .L1471 + ldrh r2, [r3, #48] + cmp r2, r4 + moveq r2, #0 + strheq r2, [r3, #54] @ movhi +.L1471: + mov r0, r7 + mov r10, #1 + bl ftl_write_buf + b .L1467 +.L1468: + cmp r10, #1 + bne .L1476 + ldr r2, [r4, #1256] + ldr r1, [r4, #1252] + ldr r0, .L1483+24 + bl rk_printk + mov r0, r7 + bl ftl_write_buf + b .L1467 +.L1476: + add r3, r3, r2 + ldr r1, [r4, #1260] + ldrh r2, [r3, #32] + ldr r0, [r4, #1252] + bl lpa_hash_update_ppa + ldrb r3, [r4, #1234] @ zero_extendqisi2 + tst r3, #4 + bicne r3, r3, #2 + strbne r3, [r4, #1234] + bne .L1467 + mov r0, r7 + bl zbuf_free + b .L1467 +.L1484: + .align 2 +.L1483: + .word .LANCHOR0 + .word 1145785929 + .word .LANCHOR0+1232 + .word .LANCHOR3 + .word .LANCHOR3-3138 + .word .LC118 + .word .LC119 + .fnend + .size ftl_write_completed, .-ftl_write_completed + .align 2 + .global zftl_add_read_buf + .syntax unified + .arm + .fpu softvfp + .type zftl_add_read_buf, %function +zftl_add_read_buf: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + subs r5, r0, #0 + bne .L1486 + movw r2, #1151 + ldr r1, .L1491 + ldr r0, .L1491+4 + bl rk_printk + bl dump_stack + pop {r4, r5, r6, lr} + b print_ftl_debug_info +.L1486: + ldr r4, .L1491+8 + ldrb r2, [r5, #40] @ zero_extendqisi2 + ldrb r3, [r4, #-2546] @ zero_extendqisi2 + cmp r2, r3 + bls .L1488 + movw r2, #1158 + ldr r1, .L1491 + ldr r0, .L1491+4 + bl rk_printk + bl dump_stack +.L1488: + mov r1, r5 + ldr r0, .L1491+12 + bl buf_add_tail + ldrb r3, [r4, #-2535] @ zero_extendqisi2 + add r3, r3, #1 + strb r3, [r4, #-2535] + pop {r4, r5, r6, pc} +.L1492: + .align 2 +.L1491: + .word .LANCHOR1+1611 + .word .LC0 + .word .LANCHOR3 + .word .LANCHOR3-2536 + .fnend + .size zftl_add_read_buf, .-zftl_add_read_buf + .align 2 + .global sblk_init + .syntax unified + .arm + .fpu softvfp + .type sblk_init, %function +sblk_init: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L1494 + mvn r2, #0 + mov r0, #0 + strb r2, [r3, #2770] + strb r2, [r3, #2773] + strb r2, [r3, #2771] + strb r2, [r3, #2772] + bx lr +.L1495: + .align 2 +.L1494: + .word .LANCHOR0 + .fnend + .size sblk_init, .-sblk_init + .align 2 + .global dump_sblk_queue + .syntax unified + .arm + .fpu softvfp + .type dump_sblk_queue, %function +dump_sblk_queue: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + ldr r5, .L1506 + ldr r0, .L1506+4 + ldrb r1, [r5, #2770] @ zero_extendqisi2 + bl rk_printk + ldrb r4, [r5, #2770] @ zero_extendqisi2 + cmp r4, #255 + popeq {r4, r5, r6, pc} + add r4, r4, r4, lsl #1 + add r5, r5, #1232 + ldr r6, .L1506+8 + add r4, r5, r4, lsl #4 +.L1498: + ldr r3, [r4, #24] + mov r0, r6 + ldrb r2, [r4, #42] @ zero_extendqisi2 + ldrb r1, [r4, #1] @ zero_extendqisi2 + bl rk_printk + ldrb r4, [r4] @ zero_extendqisi2 + cmp r4, #255 + popeq {r4, r5, r6, pc} + add r4, r4, r4, lsl #1 + add r4, r5, r4, lsl #4 + b .L1498 +.L1507: + .align 2 +.L1506: + .word .LANCHOR0 + .word .LC120 + .word .LC121 + .fnend + .size dump_sblk_queue, .-dump_sblk_queue + .align 2 + .global queue_lun_state + .syntax unified + .arm + .fpu softvfp + .type queue_lun_state, %function +queue_lun_state: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #12 + ldr lr, .L1520 + ldrb ip, [lr, #2770] @ zero_extendqisi2 + cmp ip, #255 + beq .L1516 + ldrb r3, [lr, #1153] @ zero_extendqisi2 + mov r2, #1 + mov r8, #48 + movw r10, #1274 + rsb r6, r3, #24 + lsl r3, r2, r3 + sub r3, r3, #1 + uxth r3, r3 + and r4, r3, r0, asr r6 + str r4, [sp] + ldr r4, .L1520+4 + sub r5, r4, #3136 + ldrb r4, [r4, #-3136] @ zero_extendqisi2 + ldrh r7, [r5, #-2] + sub r4, r4, #1 + sub r5, r6, r7 + uxth r4, r4 + lsl r2, r2, r5 + and r0, r4, r0, asr r7 + sub r2, r2, #1 + uxth r2, r2 + and r0, r0, r2 + str r0, [sp, #4] +.L1515: + mla r0, r8, ip, lr + ldr r9, [sp] + movw r5, #1256 + ldr r5, [r0, r5] + and fp, r3, r5, lsr r6 + cmp r9, fp + bne .L1510 + and r5, r4, r5, lsr r7 + ldr r9, [sp, #4] + ldrb r0, [r0, r10] @ zero_extendqisi2 + and r5, r5, r2 + cmp r9, r5 + bne .L1511 + cmp r1, #1 + bne .L1508 +.L1513: + sub r5, r0, #7 + tst r5, #253 + beq .L1510 +.L1508: + add sp, sp, #12 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L1511: + cmp r1, #3 + ldrls pc, [pc, r1, asl #2] + b .L1510 +.L1512: + .word .L1508 + .word .L1513 + .word .L1514 + .word .L1508 +.L1514: + cmp r0, #11 + bne .L1508 +.L1510: + mla ip, r8, ip, lr + ldrb ip, [ip, #1232] @ zero_extendqisi2 + cmp ip, #255 + bne .L1515 +.L1516: + mov r0, #0 + b .L1508 +.L1521: + .align 2 +.L1520: + .word .LANCHOR0 + .word .LANCHOR3 + .fnend + .size queue_lun_state, .-queue_lun_state + .align 2 + .global queue_remove_completed_req + .syntax unified + .arm + .fpu softvfp + .type queue_remove_completed_req, %function +queue_remove_completed_req: + .fnstart + @ args = 0, pretend = 0, frame = 16 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L1548 + mov ip, #0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #20 + sub sp, sp, #20 + ldr r7, .L1548+4 + mov r0, #48 + mvn r4, #0 + movw r5, #1275 + ldrb r1, [r3, #2771] @ zero_extendqisi2 + movw r6, #1233 + ldrb r2, [r3, #2770] @ zero_extendqisi2 + add r8, r3, #1232 + add r9, r7, #1 + add r10, r7, #2 + str r1, [sp, #8] + ldrb r1, [r3, #2773] @ zero_extendqisi2 + str r1, [sp, #12] + ldrb r1, [r3, #2772] @ zero_extendqisi2 + str r1, [sp, #4] +.L1523: + cmp r2, #255 + beq .L1524 + mla fp, r0, r2, r3 + movw lr, #1274 + mov r1, r2 + ldrb lr, [fp, lr] @ zero_extendqisi2 + sub lr, lr, #12 + cmp lr, #1 + bls .L1525 + cmp ip, #0 + beq .L1522 +.L1547: + strb r2, [r3, #2770] + b .L1522 +.L1525: + mul ip, r0, r1 + ldrb r2, [fp, #1232] @ zero_extendqisi2 + add lr, r3, ip + ldrb fp, [lr, r5] @ zero_extendqisi2 + strb r4, [lr, #1232] + cmp fp, #1 + bne .L1528 + add ip, r8, ip + ldrh ip, [ip, #34] + cmp ip, #0 + ldreq ip, [sp, #12] + moveq lr, r10 + ldrne ip, [sp, #4] + movne lr, r9 +.L1529: + cmp ip, #255 + bne .L1534 + strb r2, [r3, #2770] + mov r2, #48 + mla r3, r2, r1, r3 + ldrb r3, [r3, #1233] @ zero_extendqisi2 + strb r3, [lr] +.L1522: + add sp, sp, #20 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L1528: + cmp fp, #0 + bne .L1530 + ldr ip, [lr, #1252] + cmn ip, #1 + ldrne ip, [sp, #8] + movne lr, r7 + bne .L1529 +.L1530: + mov ip, #1 + b .L1523 +.L1534: + mov lr, ip + mla ip, r0, ip, r3 + ldrb ip, [ip, #1232] @ zero_extendqisi2 + cmp ip, #255 + bne .L1534 + mla r1, r0, r1, r3 + mla lr, r0, lr, r3 + ldrb r1, [r1, r6] @ zero_extendqisi2 + strb r1, [lr, #1232] + b .L1530 +.L1524: + cmp ip, #0 + beq .L1522 + mvn r2, #0 + b .L1547 +.L1549: + .align 2 +.L1548: + .word .LANCHOR0 + .word .LANCHOR0+2771 + .fnend + .size queue_remove_completed_req, .-queue_remove_completed_req + .align 2 + .global pm_select_ram_region + .syntax unified + .arm + .fpu softvfp + .type pm_select_ram_region, %function +pm_select_ram_region: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r1, .L1561 + mov r3, #0 + movw r0, #65535 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + add r2, r1, #4 +.L1552: + lsl ip, r3, #3 + uxth r4, r3 + ldrh ip, [ip, r1] + cmp ip, r0 + beq .L1551 + add r3, r3, #1 + cmp r3, #32 + bne .L1552 + mov r4, r3 + mov r1, #0 + mov r3, #32768 + sub ip, r2, #4 +.L1554: + add r0, ip, r1, lsl #3 + uxth lr, r1 + ldrh r0, [r0, #2] + tst r0, #32768 + bne .L1553 + cmp r0, r3 + movcc r3, r0 + movcc r4, lr +.L1553: + add r1, r1, #1 + cmp r1, #32 + bne .L1554 + cmp r4, #32 + bne .L1551 + ldr r3, .L1561+4 + mvn r1, #0 + sub r2, r2, #4 + ldrb lr, [r3, #-2276] @ zero_extendqisi2 + mov r3, #0 +.L1556: + lsl ip, r3, #3 + uxth r5, r3 + add r0, r2, ip + ldrh r0, [r0, #2] + cmp r0, r1 + bcs .L1555 + ldrh ip, [ip, r2] + cmp ip, lr + movne r1, r0 + movne r4, r5 +.L1555: + add r3, r3, #1 + cmp r3, #32 + bne .L1556 + cmp r4, #32 + bne .L1551 + movw r2, #377 + ldr r1, .L1561+8 + ldr r0, .L1561+12 + bl rk_printk + bl dump_stack +.L1551: + mov r0, r4 + pop {r4, r5, r6, pc} +.L1562: + .align 2 +.L1561: + .word .LANCHOR3-2532 + .word .LANCHOR3 + .word .LANCHOR1+1629 + .word .LC0 + .fnend + .size pm_select_ram_region, .-pm_select_ram_region + .align 2 + .global ftl_memset + .syntax unified + .arm + .fpu softvfp + .type ftl_memset, %function +ftl_memset: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + b memset + .fnend + .size ftl_memset, .-ftl_memset + .align 2 + .global flash_lsb_page_tbl_build + .syntax unified + .arm + .fpu softvfp + .type flash_lsb_page_tbl_build, %function +flash_lsb_page_tbl_build: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + mov r6, r0 + ldr r5, .L1618 + mov r0, #1024 + ldr r3, [r5, #1104] + ldrb r1, [r3, #12] @ zero_extendqisi2 + bl __aeabi_idiv + cmp r6, #0 + uxth r4, r0 + bne .L1565 + add r5, r5, #4 +.L1566: + lsl r3, r6, #1 + strh r6, [r3, r5] @ movhi + add r6, r6, #1 + cmp r6, #512 + bne .L1566 +.L1572: + mov r2, #2048 + mov r1, #255 + ldr r0, .L1618+4 + bl ftl_memset + ldr ip, .L1618+8 + mov r3, #0 + ldr r0, .L1618+4 +.L1567: + lsl r2, r3, #1 + add r3, r3, #1 + ldrh r2, [r2, ip] + lsl r1, r2, #1 + strh r2, [r0, r1] @ movhi + uxth r2, r3 + cmp r2, r4 + bcc .L1567 + pop {r4, r5, r6, pc} +.L1565: + cmp r6, #1 + bne .L1568 + mov r3, #0 + add r5, r5, #4 +.L1571: + cmp r3, #3 + uxth r2, r3 + bls .L1569 + tst r2, #1 + movne r1, #3 + moveq r1, #2 + rsb r2, r1, r2, lsl #1 + uxth r2, r2 +.L1569: + lsl r1, r3, #1 + add r3, r3, #1 + cmp r3, #512 + strh r2, [r1, r5] @ movhi + bne .L1571 + b .L1572 +.L1568: + cmp r6, #2 + bne .L1573 + mov r2, #0 + add r5, r5, #4 +.L1575: + uxth r3, r2 + cmp r2, #1 + lsl r1, r2, #1 + add r2, r2, #1 + lslhi r3, r3, #1 + subhi r3, r3, #1 + uxthhi r3, r3 + cmp r2, #512 + strh r3, [r1, r5] @ movhi + bne .L1575 + b .L1572 +.L1573: + cmp r6, #3 + bne .L1576 + mov r3, #0 + add r5, r5, #4 +.L1579: + cmp r3, #5 + uxth r2, r3 + bls .L1577 + tst r2, #1 + movne r1, #5 + moveq r1, #4 + rsb r2, r1, r2, lsl #1 + uxth r2, r2 +.L1577: + lsl r1, r3, #1 + add r3, r3, #1 + cmp r3, #512 + strh r2, [r1, r5] @ movhi + bne .L1579 + b .L1572 +.L1576: + cmp r6, #4 + mov r2, r5 + mov r3, #0 + bne .L1580 + strh r3, [r5, #4] @ movhi + mov r3, #1 + strh r3, [r5, #6] @ movhi + mov r3, #2 + strh r3, [r5, #8] @ movhi + mov r3, #3 + strh r3, [r5, #10] @ movhi + mov r3, #5 + strh r3, [r5, #14] @ movhi + mov r3, #7 + strh r3, [r5, #16] @ movhi + mov r3, #8 + strh r6, [r5, #12] @ movhi + strh r3, [r5, #18]! @ movhi +.L1582: + tst r3, #1 + movne r2, #7 + moveq r2, #6 + rsb r2, r2, r3, lsl #1 + add r3, r3, #1 + uxth r3, r3 + strh r2, [r5, #2]! @ movhi + cmp r3, #512 + bne .L1582 + b .L1572 +.L1580: + cmp r6, #5 + bne .L1583 + add r1, r5, #4 +.L1584: + lsl r0, r3, #1 + strh r3, [r0, r1] @ movhi + add r3, r3, #1 + cmp r3, #16 + bne .L1584 + add r2, r2, #34 +.L1585: + strh r3, [r2, #2]! @ movhi + add r3, r3, #2 + uxth r3, r3 + cmp r3, #1008 + bne .L1585 + b .L1572 +.L1583: + cmp r6, #8 + bne .L1586 + add r5, r5, #4 +.L1587: + strh r3, [r3, r5] @ movhi + add r3, r3, #2 + cmp r3, #1024 + bne .L1587 + b .L1572 +.L1586: + cmp r6, #9 + bne .L1588 + strh r3, [r5, #4] @ movhi + mov r3, #1 + strh r3, [r5, #6] @ movhi + mov r3, #2 + strh r3, [r5, #8]! @ movhi + movw r2, #1021 + mov r3, #3 +.L1589: + strh r3, [r5, #2]! @ movhi + add r3, r3, #2 + uxth r3, r3 + cmp r3, r2 + bne .L1589 + b .L1572 +.L1588: + cmp r6, #10 + bne .L1590 + add r1, r5, #4 +.L1591: + lsl r0, r3, #1 + strh r3, [r0, r1] @ movhi + add r3, r3, #1 + cmp r3, #63 + bne .L1591 + add r2, r2, #128 + movw r1, #961 +.L1592: + strh r3, [r2, #2]! @ movhi + add r3, r3, #2 + uxth r3, r3 + cmp r3, r1 + bne .L1592 + b .L1572 +.L1590: + cmp r6, #11 + bne .L1593 + ldr r1, .L1618+8 + mov r3, #0 +.L1594: + lsl r0, r3, #1 + strh r3, [r0, r1] @ movhi + add r3, r3, #1 + cmp r3, #8 + bne .L1594 + add r2, r2, #18 +.L1596: + tst r3, #1 + movne r1, #7 + moveq r1, #6 + rsb r1, r1, r3, lsl #1 + add r3, r3, #1 + uxth r3, r3 + strh r1, [r2, #2]! @ movhi + cmp r3, #512 + bne .L1596 + b .L1572 +.L1593: + cmp r6, #13 + bne .L1572 + ldr r2, .L1618+12 + mov r3, #0 +.L1597: + strh r3, [r2, #2]! @ movhi + add r3, r3, #3 + uxth r3, r3 + cmp r3, #1536 + bne .L1597 + b .L1572 +.L1619: + .align 2 +.L1618: + .word .LANCHOR0 + .word .LANCHOR3-2272 + .word .LANCHOR0+4 + .word .LANCHOR0+2 + .fnend + .size flash_lsb_page_tbl_build, .-flash_lsb_page_tbl_build + .align 2 + .global flash_die_info_init + .syntax unified + .arm + .fpu softvfp + .type flash_die_info_init, %function +flash_die_info_init: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #12 + ldr r4, .L1638 + ldr r3, [r4] + tst r3, #4096 + beq .L1621 + ldr r1, .L1638+4 + ldr r0, .L1638+8 + bl rk_printk +.L1621: + ldrh r3, [r4, #30] + mov r7, #0 + ldr r5, .L1638+12 + ldr r9, .L1638+16 + ldr r6, .L1638+20 + strh r3, [r5, #2] @ movhi + ldrb r1, [r4, #16] @ zero_extendqisi2 + add r8, r9, #6 + ldrh r0, [r4, #14] + mov r10, r8 + strb r7, [r5, #1109] + bl __aeabi_idiv + mov r2, #8 + strh r0, [r6, #-224] @ movhi + mov r1, r7 + ldr r0, .L1638+24 + bl ftl_memset + mov r2, #32 + mov r1, r7 + sub r0, r6, #220 + bl ftl_memset +.L1623: + mov r3, #2 + ldrb r2, [r4, #4] @ zero_extendqisi2 + strb r3, [r7, r9] + add r1, r8, r7, lsl #3 + ldr r0, .L1638+28 + bl flash_mem_cmp8 + cmp r0, #0 + ldr fp, .L1638+28 + bne .L1622 + ldrb r3, [r5, #1109] @ zero_extendqisi2 + add r2, r6, r3, lsl #2 + str r0, [r2, #-220] + uxtb r0, r7 + add r2, r3, #1 + add r3, r5, r3 + strb r2, [r5, #1109] + strb r0, [r3, #1144] + bl zftl_flash_enter_slc_mode +.L1622: + add r7, r7, #1 + cmp r7, #4 + bne .L1623 + ldrb r3, [r4, #12] @ zero_extendqisi2 + cmp r3, #2 + beq .L1624 +.L1628: + ldrb r2, [r4, #17] @ zero_extendqisi2 + ldrb r3, [r5, #1109] @ zero_extendqisi2 + smulbb r3, r3, r2 + ldrh r2, [r4, #18] + smulbb r3, r3, r2 + strh r3, [r6, #-188] @ movhi + add sp, sp, #12 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L1624: + ldrb r3, [r4, #4] @ zero_extendqisi2 + mov r7, #0 + ldrh r8, [r5, #2] + ldrb r9, [r4, #27] @ zero_extendqisi2 + str r3, [sp] + ldrh r3, [r4, #18] + and r3, r3, #65280 + mul r3, r8, r3 + ldrb r8, [r4, #17] @ zero_extendqisi2 + mul r8, r8, r3 + lsl r3, r8, #1 +.L1627: + ldr r2, [sp] + add r1, r10, r7, lsl #3 + mov r0, fp + str r3, [sp, #4] + bl flash_mem_cmp8 + cmp r0, #0 + ldr r3, [sp, #4] + bne .L1625 + ldrb r2, [r5, #1109] @ zero_extendqisi2 + cmp r9, #0 + moveq r0, r8 + movne r0, r3 + add r1, r6, r2, lsl #2 + str r0, [r1, #-220] + add r1, r2, #1 + add r2, r5, r2 + strb r1, [r5, #1109] + strb r7, [r2, #1144] +.L1625: + add r7, r7, #1 + cmp r7, #4 + bne .L1627 + b .L1628 +.L1639: + .align 2 +.L1638: + .word .LANCHOR2 + .word .LANCHOR1+1650 + .word .LC4 + .word .LANCHOR0 + .word .LANCHOR0+1154 + .word .LANCHOR3 + .word .LANCHOR0+1144 + .word .LANCHOR2+5 + .fnend + .size flash_die_info_init, .-flash_die_info_init + .align 2 + .global lpa_hash_init + .syntax unified + .arm + .fpu softvfp + .type lpa_hash_init, %function +lpa_hash_init: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, lr} + .save {r4, lr} + mov r2, #512 + ldr r4, .L1642 + mov r1, #255 + sub r0, r4, #3056 + sub r0, r0, #14 + bl ftl_memset + sub r3, r4, #3088 + ldrb r2, [r4, #-3127] @ zero_extendqisi2 + ldrh r3, [r3, #-8] + mov r1, #255 + ldr r0, [r4, #-2552] + pop {r4, lr} + mul r2, r2, r3 + lsl r2, r2, #2 + b ftl_memset +.L1643: + .align 2 +.L1642: + .word .LANCHOR3 + .fnend + .size lpa_hash_init, .-lpa_hash_init + .align 2 + .global lpa_rebuild_hash + .syntax unified + .arm + .fpu softvfp + .type lpa_rebuild_hash, %function +lpa_rebuild_hash: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L1656 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + ldr r3, [r3] + tst r3, #4096 + beq .L1645 + mov r3, #0 + mov r2, #239 + ldr r1, .L1656+4 + ldr r0, .L1656+8 + bl rk_printk +.L1645: + ldr r4, .L1656+12 + mov r2, #512 + mov r1, #255 + sub r5, r4, #3056 + sub r6, r4, #3088 + sub r5, r5, #14 + mov r0, r5 + bl ftl_memset + ldrh r3, [r6, #-8] + mov r1, #255 + ldrb r2, [r4, #-3127] @ zero_extendqisi2 + ldr r0, [r4, #-2552] + mul r2, r2, r3 + lsl r2, r2, #2 + bl ftl_memset + mov r1, #0 +.L1646: + ldrh r0, [r6, #-8] + uxth ip, r1 + ldrb r3, [r4, #-3127] @ zero_extendqisi2 + mov r2, ip + mul r3, r3, r0 + cmp ip, r3, lsl #1 + blt .L1648 + pop {r4, r5, r6, pc} +.L1648: + ldr r3, [r4, #-2556] + ldr r3, [r3, r2, lsl #2] + cmn r3, #1 + beq .L1647 + uxtb r3, r3 + lsl r2, r2, #1 + lsl r3, r3, #1 + ldrh r0, [r5, r3] + strh ip, [r5, r3] @ movhi + ldr r3, [r4, #-2552] + strh r0, [r3, r2] @ movhi +.L1647: + add r1, r1, #1 + b .L1646 +.L1657: + .align 2 +.L1656: + .word .LANCHOR2 + .word .LANCHOR1+1670 + .word .LC122 + .word .LANCHOR3 + .fnend + .size lpa_rebuild_hash, .-lpa_rebuild_hash + .align 2 + .global zftl_read_flash_info + .syntax unified + .arm + .fpu softvfp + .type zftl_read_flash_info, %function +zftl_read_flash_info: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, lr} + .save {r4, lr} + mov r2, #11 + mov r1, #0 + mov r4, r0 + bl ftl_memset + ldr r2, .L1662 + mov ip, #1 + ldr r3, .L1662+4 + ldrh r0, [r2, #2] + ldrb r1, [r3, #13] @ zero_extendqisi2 + smulbb r1, r1, r0 + ldr r0, .L1662+8 + strh r1, [r4, #4] @ unaligned + ldrb r1, [r2, #1193] @ zero_extendqisi2 + strb r1, [r4, #7] + ldr r1, [r2, #1032] + str r1, [r4] @ unaligned + ldrb r1, [r3, #13] @ zero_extendqisi2 + strb r1, [r4, #6] + mov r1, #32 + ldrb r3, [r3, #11] @ zero_extendqisi2 + strb r1, [r4, #8] + ldrb r1, [r2, #1109] @ zero_extendqisi2 + strb r3, [r4, #9] + mov r3, #0 + strb r3, [r4, #10] +.L1659: + uxtb r2, r3 + cmp r1, r2 + bhi .L1660 + pop {r4, pc} +.L1660: + ldrb lr, [r3, r0] @ zero_extendqisi2 + add r3, r3, #1 + ldrb r2, [r4, #10] @ zero_extendqisi2 + orr r2, r2, ip, lsl lr + strb r2, [r4, #10] + b .L1659 +.L1663: + .align 2 +.L1662: + .word .LANCHOR0 + .word .LANCHOR2 + .word .LANCHOR0+1144 + .fnend + .size zftl_read_flash_info, .-zftl_read_flash_info + .align 2 + .global gc_static_wearleveling + .syntax unified + .arm + .fpu softvfp + .type gc_static_wearleveling, %function +gc_static_wearleveling: + .fnstart + @ args = 0, pretend = 0, frame = 24 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r0, .L1779 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #44 + sub sp, sp, #44 + ldr r3, [r0, #2800] + ldr r3, [r3, #32] + cmp r3, #10240 + bls .L1665 + bl ftl_tmp_into_update +.L1665: + ldr r3, [r0, #1096] + ldr r2, [r3, #568] + ldr r1, [r3, #12] + add ip, r2, #35840 + add ip, ip, #160 + cmp r1, ip + bcs .L1666 + ldr lr, [r0, #2800] + ldr ip, [r3, #572] + ldr lr, [lr, #36] + add ip, ip, #256 + cmp lr, ip + movcc r0, #0 + bcc .L1664 +.L1666: + add r2, r2, #860160 + add r2, r2, #3840 + cmp r1, r2 + bhi .L1668 + ldr ip, [r0, #2800] + ldr r2, [r3, #572] + ldr ip, [ip, #36] + add r2, r2, #32 + cmp ip, r2 + movls r7, #0 + movls r5, r7 + bls .L1669 +.L1668: + ldr r2, [r0, #2800] + mov r4, #0 + ldr r5, .L1779 + movw r10, #65535 + ldr r8, .L1779+4 + mov r6, r4 + ldr r0, [r2, #36] + mov fp, r10 + str r1, [r3, #568] + ldr r9, .L1779+8 + str r0, [r3, #572] + ldrh r7, [r2, #134] + str r4, [sp, #36] + str r4, [sp, #32] + str r4, [sp, #28] + str r4, [sp, #24] + str r4, [sp, #16] + str r4, [sp, #20] +.L1670: + ldrh r3, [r8] + cmp r3, r7 + bhi .L1679 + ldr r0, [r5, #1096] + mov r3, #0 + mov r2, #128 + mov r1, #255 + strh r3, [r0, #122] @ movhi + add r0, r0, #264 + bl ftl_memset + ldr r2, [r5, #1096] + movw r3, #586 + ldr r8, [r5, #1084] + ldrh r1, [r2, r3] + ldr r3, .L1779+8 + ldr r3, [r3] + lsl r9, r1, #2 + add r7, r8, r9 + tst r3, #1024 + beq .L1680 + ldr ip, [r5, #1092] + lsl r0, r1, #1 + ldr r3, [r8, r1, lsl #2] + ldrh r2, [r8, r9] + ldrh r0, [ip, r0] + ubfx r3, r3, #11, #8 + ubfx r2, r2, #0, #11 + str r0, [sp, #12] + ldrb r0, [r7, #3] @ zero_extendqisi2 + str r0, [sp, #8] + ldrb r0, [r7, #2] @ zero_extendqisi2 + lsr r0, r0, #5 + str r0, [sp, #4] + ldrb r0, [r7, #2] @ zero_extendqisi2 + ubfx r0, r0, #3, #2 + str r0, [sp] + ldr r0, .L1779+12 + bl rk_printk +.L1680: + ldrb r3, [r7, #2] @ zero_extendqisi2 + and r3, r3, #224 + cmp r3, #32 + bne .L1681 + ldr r3, .L1779 + ldr r3, [r3, #2800] + add r3, r3, #688 + ldrh r3, [r3] + cmp r3, #2 + ldrhi r3, .L1779+16 + movhi r2, #1 + strhi r2, [r3, #-184] +.L1681: + ldrb r2, [r7, #2] @ zero_extendqisi2 + tst r2, #8 + beq .L1682 + ldr r5, .L1779 + ldr r3, [r5, #2800] + ldrh r1, [r3, #96] + ldr r3, .L1779+16 + ldrh r0, [r3, #-180] + ldrh r3, [r8, r9] + ubfx r3, r3, #0, #11 + add r3, r3, r0, lsr #2 + cmp r1, r3 + ble .L1682 + and r3, r2, #192 + cmp r3, #64 + bne .L1683 + ldr r0, [r5, #1096] + movw r3, #586 + mov r2, #1 + mov r1, #0 + ldrh r0, [r0, r3] + bl gc_add_sblk + ldr r2, .L1779+20 + mov r1, #1 + movw r3, #2180 + strh r1, [r2, r3] @ movhi +.L1682: + ldr r1, .L1779 + ldr r3, [r1, #1096] + ldr r7, [r1, #1084] + add r3, r3, #584 + ldrh r5, [r3] + ldr r3, .L1779+8 + ldr r3, [r3] + lsl r2, r5, #2 + add r8, r7, r2 + tst r3, #1024 + beq .L1684 + ldr r0, [r1, #1092] + lsl r1, r5, #1 + ldr r3, [r7, r5, lsl #2] + ldrh r2, [r7, r2] + ldrh r1, [r0, r1] + ubfx r3, r3, #11, #8 + ldr r0, .L1779+24 + ubfx r2, r2, #0, #11 + str r1, [sp, #12] + ldrb r1, [r8, #3] @ zero_extendqisi2 + str r1, [sp, #8] + ldrb r1, [r8, #2] @ zero_extendqisi2 + lsr r1, r1, #5 + str r1, [sp, #4] + ldrb r1, [r8, #2] @ zero_extendqisi2 + ubfx r1, r1, #3, #2 + str r1, [sp] + mov r1, r5 + bl rk_printk +.L1684: + ldrb r3, [r8, #2] @ zero_extendqisi2 + tst r3, #8 + beq .L1685 + ldr r8, .L1779 + ldr r2, [r8, #2800] + ldrh r1, [r2, #98] + ldr r2, .L1779+16 + ldrh r0, [r2, #-178] + ldr r2, [r7, r5, lsl #2] + ubfx r2, r2, #11, #8 + add r2, r2, r0, lsr #2 + cmp r1, r2 + ble .L1685 + and r2, r3, #192 + cmp r2, #64 + bne .L1686 + ldr r3, [r8, #1096] + mov r2, #1 + mov r1, #0 + add r3, r3, #584 + ldrh r0, [r3] + bl gc_add_sblk + ldr r2, .L1779+20 + mov r1, #1 + movw r3, #2180 + strh r1, [r2, r3] @ movhi +.L1685: + ldr r3, .L1779+8 + ldr r3, [r3] + tst r3, #1024 + beq .L1687 + ldr r1, .L1779 + lsl ip, r4, #2 + ldr r2, [r1, #1084] + add r0, r2, ip + ldr r3, [r2, r4, lsl #2] + ldrh r2, [r2, ip] + ldr ip, [r1, #1092] + lsl r1, r4, #1 + ubfx r3, r3, #11, #8 + ubfx r2, r2, #0, #11 + ldrh r1, [ip, r1] + str r1, [sp, #12] + ldrb r1, [r0, #3] @ zero_extendqisi2 + str r1, [sp, #8] + ldrb r1, [r0, #2] @ zero_extendqisi2 + lsr r1, r1, #5 + str r1, [sp, #4] + ldrb r1, [r0, #2] @ zero_extendqisi2 + ldr r0, .L1779+28 + ubfx r1, r1, #3, #2 + str r1, [sp] + mov r1, r4 + bl rk_printk +.L1687: + ldr r3, .L1779+8 + ldr r3, [r3] + tst r3, #1024 + beq .L1688 + ldr r1, .L1779 + lsl ip, r6, #2 + ldr r2, [r1, #1084] + add r0, r2, ip + ldr r3, [r2, r6, lsl #2] + ldrh r2, [r2, ip] + ldr ip, [r1, #1092] + lsl r1, r6, #1 + ubfx r3, r3, #11, #8 + ubfx r2, r2, #0, #11 + ldrh r1, [ip, r1] + str r1, [sp, #12] + ldrb r1, [r0, #3] @ zero_extendqisi2 + str r1, [sp, #8] + ldrb r1, [r0, #2] @ zero_extendqisi2 + lsr r1, r1, #5 + str r1, [sp, #4] + ldrb r1, [r0, #2] @ zero_extendqisi2 + ldr r0, .L1779+32 + ubfx r1, r1, #3, #2 + str r1, [sp] + mov r1, r6 + bl rk_printk +.L1688: + ldr r5, .L1779 + ldrh r3, [sp, #16] + ldr r1, [sp, #24] + ldr r4, [r5, #2800] + ldr r0, [sp, #36] + strh r3, [r4, #96] @ movhi + ldrh r3, [sp, #20] + strh r10, [r4, #92] @ movhi + strh fp, [r4, #94] @ movhi + strh r3, [r4, #98] @ movhi + bl __aeabi_uidiv + strh r0, [r4, #88] @ movhi + mov r6, r0 + ldr r1, [sp, #28] + ldr r0, [sp, #32] + bl __aeabi_uidiv + strh r0, [r4, #90] @ movhi + ldr r4, .L1779+8 + ldr r3, [r4] + tst r3, #1024 + beq .L1689 + uxth r0, r0 + uxth r3, r6 + ldr r2, [sp, #28] + str r0, [sp] + ldr r1, [sp, #24] + ldr r0, .L1779+36 + bl rk_printk +.L1689: + ldr r3, [r4] + ldr r4, .L1779+16 + tst r3, #1024 + beq .L1690 + ldrh r3, [r4, #-178] + mov r2, fp + mov r1, r10 + ldr r0, .L1779+40 + str r3, [sp, #8] + ldrh r3, [r4, #-180] + str r3, [sp, #4] + ldr r3, [sp, #20] + str r3, [sp] + ldr r3, [sp, #16] + bl rk_printk +.L1690: + ldr r3, [sp, #20] + sub r3, r3, fp + str r3, [sp, #24] + ldr r2, [sp, #24] + ldrh r3, [r4, #-178] + cmp r2, r3 + bgt .L1691 + ldr r3, [sp, #16] + ldrh r2, [r4, #-180] + sub r3, r3, r10 + cmp r3, r2 + movle r7, #0 + movle r5, r7 + ble .L1692 +.L1691: + ldr r3, [r5, #1096] + mov r7, #0 + ldr r4, [r3, #580] + ldr r3, [r5, #2800] + mov r5, r7 + ldrh r9, [r3, #134] + uxth r4, r4 + ldr r3, .L1779+20 + add r3, r3, #2176 + add r3, r3, #4 + str r3, [sp, #20] +.L1693: + ldr r3, .L1779+4 + ldrh r3, [r3] + cmp r9, r3 + bcc .L1703 +.L1702: + ldr r3, .L1779 + ldr r3, [r3, #1096] + str r4, [r3, #580] +.L1692: + cmp fp, #0 + beq .L1705 + ldr r2, .L1779 + ldr r4, .L1779+4 + ldr r3, [r2, #2800] + mov r0, r2 + ldrh r3, [r3, #134] +.L1706: + ldrh r2, [r4] + cmp r2, r3 + bhi .L1708 + ldr r3, [r0, #2800] + ldrh r2, [r3, #72] + add r2, fp, r2 + strh r2, [r3, #72] @ movhi + ldrh r2, [r3, #98] + cmp fp, r2 + subcc r2, r2, fp + strhcc r2, [r3, #98] @ movhi +.L1705: + cmp r10, #0 + beq .L1711 + ldr r3, .L1779 + ldr r6, .L1779+4 + ldr r2, [r3, #2800] + mov ip, r3 + ldrh r0, [r2, #134] +.L1712: + ldrh r3, [r6] + cmp r3, r0 + bhi .L1714 + ldr r3, [ip, #2800] + ldrh r2, [r3, #74] + add r2, r10, r2 + strh r2, [r3, #74] @ movhi + ldrh r2, [r3, #96] + cmp r10, r2 + subcc r2, r2, r10 + strhcc r2, [r3, #96] @ movhi +.L1711: + ldr r4, .L1779+44 + mov r1, #0 + sub r0, r4, #12 + bl _list_get_gc_head_node + movw r2, #65535 + cmp r0, r2 + beq .L1669 + ldr r2, .L1779 + lsl r3, r0, #1 + ldr r1, [r2, #1092] + ldrh r2, [r4, #-8] + ldrh r3, [r1, r3] + cmp r3, r2, lsr #1 + bhi .L1669 + add r5, r5, #1 + mov r2, #1 + mov r1, #0 + bl gc_add_sblk +.L1669: + add r0, r5, r7 +.L1664: + add sp, sp, #44 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L1679: + ldr r0, [r5, #1084] + lsl r1, r7, #2 + add ip, r0, r1 + ldrb r3, [ip, #2] @ zero_extendqisi2 + and r2, r3, #224 + cmp r2, #224 + beq .L1671 + tst r3, #8 + beq .L1672 + ldrh r2, [r0, r1] + ldr r3, [r0, r1] + ubfx r2, r2, #0, #11 + ubfx r3, r3, #11, #8 +.L1673: + ldr lr, [sp, #24] + cmp r10, r2 + add lr, lr, #1 + uxth lr, lr + str lr, [sp, #24] + ldr lr, [sp, #36] + add lr, lr, r2 + str lr, [sp, #36] + ldrhi r10, [r5, #1096] + movwhi lr, #586 + strhhi r7, [r10, lr] @ movhi + movhi r10, r2 +.L1717: + ldr lr, [sp, #16] + cmp lr, r2 + movcc lr, r2 + movcc r4, r7 + str lr, [sp, #16] + movw lr, #65535 + cmp r3, lr + bne .L1675 +.L1677: + cmp r2, #9 + cmphi r3, #9 + bhi .L1671 + ldr r3, [r9] + tst r3, #256 + beq .L1671 + ldr r3, [r0, r1] + ldrh r2, [r0, r1] + lsl r1, r7, #1 + ldr r0, [r5, #1092] + ubfx r3, r3, #11, #8 + ubfx r2, r2, #0, #11 + ldrh r1, [r0, r1] + ldr r0, .L1779+48 + str r1, [sp, #12] + ldrb r1, [ip, #3] @ zero_extendqisi2 + str r1, [sp, #8] + ldrb r1, [ip, #2] @ zero_extendqisi2 + lsr r1, r1, #5 + str r1, [sp, #4] + ldrb r1, [ip, #2] @ zero_extendqisi2 + ubfx r1, r1, #3, #2 + str r1, [sp] + mov r1, r7 + bl rk_printk +.L1671: + add r7, r7, #1 + uxth r7, r7 + b .L1670 +.L1672: + tst r3, #24 + ldrheq r2, [r0, r1] + movweq r3, #65535 + ldrne r3, [r0, r1] + movwne r2, #65535 + ubfxeq r2, r2, #0, #11 + ubfxne r3, r3, #11, #8 + beq .L1673 +.L1675: + ldr lr, [sp, #28] + cmp fp, r3 + movhi fp, r3 + add lr, lr, #1 + uxth lr, lr + str lr, [sp, #28] + ldr lr, [sp, #32] + add lr, lr, r3 + str lr, [sp, #32] + ldrhi lr, [r5, #1096] + addhi lr, lr, #584 + strhhi r7, [lr] @ movhi + ldr lr, [sp, #20] + cmp lr, r3 + movcc lr, r3 + movcc r6, r7 + str lr, [sp, #20] + b .L1677 +.L1683: + tst r2, #224 + bne .L1682 + ldr r3, [r5, #1096] + movw r8, #590 + movw r2, #65535 + ldrh r1, [r3, r8] + cmp r1, r2 + bne .L1682 + movw r7, #586 + ldrh r0, [r3, r7] + add r3, r3, #588 + ldrh r3, [r3] + cmp r3, r0 + beq .L1682 + bl zftl_remove_free_node + ldr r3, [r5, #1096] + ldrh r2, [r3, r7] + strh r2, [r3, r8] @ movhi + mvn r2, #0 + strh r2, [r3, r7] @ movhi + b .L1682 +.L1686: + and r3, r3, #248 + cmp r3, #16 + bne .L1685 + ldr r3, [r8, #1096] + add r2, r3, #588 + ldrh r1, [r2] + movw r2, #65535 + cmp r1, r2 + bne .L1685 + add r2, r3, #584 + ldrh r0, [r2] + movw r2, #590 + ldrh r3, [r3, r2] + cmp r3, r0 + beq .L1685 + bl zftl_remove_free_node + ldr r3, [r8, #1096] + add r2, r3, #588 + add r3, r3, #584 + ldrh r1, [r3] + strh r1, [r2] @ movhi + mvn r2, #0 + strh r2, [r3] @ movhi + b .L1685 +.L1703: + add r4, r4, #1 + uxth r4, r4 + cmp r3, r4 + ldr r3, .L1779 + movls r4, #0 + lsl r6, r4, #2 + ldr r8, [r3, #1084] + add r2, r8, r6 + ldrb r2, [r2, #2] @ zero_extendqisi2 + and ip, r2, #224 + and r1, r2, #192 + cmp r1, #0 + cmpne ip, #224 + beq .L1695 + ubfx r2, r2, #3, #2 + ldr r0, .L1779+16 + ands r1, r2, #1 + beq .L1696 + cmp ip, #160 +.L1777: + bne .L1698 + ldrh r2, [r0, #-178] + ldr r0, [sp, #24] + cmp r0, r2 + ble .L1699 + ldr r2, [r8, r6] + ubfx r2, r2, #11, #8 + cmp r2, fp + bls .L1700 + cmp r1, #0 + beq .L1699 + ldrh r2, [r8, r6] + ubfx r2, r2, #0, #11 + cmp r2, r10 + bgt .L1699 +.L1700: + mov r2, #1 + mov r1, #0 + mov r0, r4 + str r3, [sp, #28] + bl gc_add_sblk + ldr r3, [sp, #20] + mov r2, #1 + add r5, r5, r2 + strh r2, [r3] @ movhi + ldr r2, .L1779+8 + ldr r3, [sp, #28] + ldr r2, [r2] + tst r2, #1024 + beq .L1699 + ldr r1, [r3, #1092] + lsl r2, r4, #1 + ldr r3, [r3, #1084] + ldrh r0, [r1, r2] + ldr r1, [r8, r6] + add r3, r3, r6 + ldrb r2, [r3, #2] @ zero_extendqisi2 + ldr r3, .L1779+20 + ubfx r1, r1, #11, #8 + str r1, [sp, #8] + ldrh r1, [r8, r6] + lsr r2, r2, #5 + ubfx r1, r1, #0, #11 + str r1, [sp, #4] + mov r1, r4 + ldrh r3, [r3, #52] + str r3, [sp] + mov r3, r0 + ldr r0, .L1779+52 +.L1778: + bl rk_printk +.L1699: + cmp r7, #4 + cmpls r5, #4 + bhi .L1702 +.L1695: + add r9, r9, #1 + uxth r9, r9 + b .L1693 +.L1696: + cmp r2, #2 + b .L1777 +.L1698: + ldr r2, [sp, #16] + ldrh r0, [r0, #-180] + sub r2, r2, r10 + cmp r2, r0 + ble .L1699 + ldrh r2, [r8, r6] + add r0, r10, #8 + ubfx r2, r2, #0, #11 + cmp r2, r0 + ble .L1701 + cmp r1, #0 + beq .L1699 + ldr r2, [r8, r6] + add r1, fp, #4 + ubfx r2, r2, #11, #8 + cmp r2, r1 + bgt .L1699 +.L1701: + mov r2, #1 + mov r1, #0 + mov r0, r4 + str r3, [sp, #28] + bl gc_add_sblk + ldr r3, [sp, #20] + mov r2, #1 + add r7, r7, r2 + strh r2, [r3] @ movhi + ldr r2, .L1779+8 + ldr r3, [sp, #28] + ldr r2, [r2] + tst r2, #1024 + beq .L1699 + ldr r1, [r3, #1092] + lsl r2, r4, #1 + ldr r3, [r3, #1084] + ldrh r0, [r1, r2] + ldr r1, [r8, r6] + add r3, r3, r6 + ldrb r2, [r3, #2] @ zero_extendqisi2 + ldr r3, .L1779+20 + ubfx r1, r1, #11, #8 + str r1, [sp, #8] + ldrh r1, [r8, r6] + lsr r2, r2, #5 + ubfx r1, r1, #0, #11 + str r1, [sp, #4] + mov r1, r4 + ldrh r3, [r3, #52] + str r3, [sp] + mov r3, r0 + ldr r0, .L1779+56 + b .L1778 +.L1708: + ldr ip, [r0, #1084] + lsl lr, r3, #2 + ldr r2, [ip, r3, lsl #2] + add r6, ip, lr + ubfx r1, r2, #11, #8 + cmp fp, r1 + bhi .L1707 + ldrb r6, [r6, #2] @ zero_extendqisi2 + tst r6, #24 + subne r1, r1, fp + bfine r2, r1, #11, #8 + strne r2, [ip, lr] +.L1707: + add r3, r3, #1 + uxth r3, r3 + b .L1706 +.L1714: + ldr r4, [ip, #1084] + lsl lr, r0, #2 + ldrh r3, [r4, lr] + add r1, r4, lr + ubfx r2, r3, #0, #11 + cmp r2, r10 + blt .L1713 + ldrb r1, [r1, #2] @ zero_extendqisi2 + and r1, r1, #24 + cmp r1, #16 + subne r2, r2, r10 + bfine r3, r2, #0, #11 + strhne r3, [r4, lr] @ movhi +.L1713: + add r0, r0, #1 + uxth r0, r0 + b .L1712 +.L1780: + .align 2 +.L1779: + .word .LANCHOR0 + .word .LANCHOR0+1080 + .word .LANCHOR2 + .word .LC124 + .word .LANCHOR3 + .word .LANCHOR0+2824 + .word .LC125 + .word .LC126 + .word .LC127 + .word .LC128 + .word .LC129 + .word .LANCHOR3-3088 + .word .LC123 + .word .LC130 + .word .LC131 + .fnend + .size gc_static_wearleveling, .-gc_static_wearleveling + .align 2 + .global zftl_sblk_list_init + .syntax unified + .arm + .fpu softvfp + .type zftl_sblk_list_init, %function +zftl_sblk_list_init: + .fnstart + @ args = 0, pretend = 0, frame = 16 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + movw r3, #1080 + ldr r4, .L1813 + mov r2, #6 + mov r1, #0 + .pad #20 + sub sp, sp, #20 + ldr r7, .L1813+4 + mov r5, #0 + ldrh r3, [r4, r3] + add r10, r4, #2784 + ldr r0, [r4, #1036] + sub r8, r7, #3072 + sub r9, r7, #3104 + mul r2, r2, r3 + bl ftl_memset + mov r3, #32 + ldrh r1, [r9, #-14] + strh r3, [r8, #-4] @ movhi + movw r3, #2786 + strh r5, [r4, r3] @ movhi + movw r3, #2788 + strh r5, [r4, r3] @ movhi + movw r3, #2790 + strh r5, [r4, r3] @ movhi + movw r3, #2794 + strh r5, [r4, r3] @ movhi + movw r3, #2792 + strh r5, [r4, r3] @ movhi + mov r0, #32768 + ldrb r3, [r7, #-3127] @ zero_extendqisi2 + str r5, [r7, #-3088] + str r5, [r7, #-3084] + str r5, [r7, #-3080] + mul r1, r1, r3 + str r5, [r7, #-3104] + str r5, [r7, #-3116] + str r5, [r7, #-3100] + strh r5, [r10] @ movhi + bl __aeabi_idiv + sxth r3, r0 + str r7, [sp, #8] + str r10, [sp, #12] + str r3, [sp, #4] + ldr r3, [r4, #2800] + ldrsh r6, [r3, #134] + strh r5, [r3, #146] @ movhi +.L1782: + ldr r3, .L1813+8 + ldrh r3, [r3] + cmp r6, r3 + blt .L1799 + ldr r2, [sp, #12] + ldr r3, [r4, #2800] + ldrh r2, [r2] + strh r2, [r3, #114] @ movhi + movw r2, #2786 + ldrh r2, [r4, r2] + strh r2, [r3, #118] @ movhi + movw r2, #2788 + ldrh r2, [r4, r2] + strh r2, [r3, #116] @ movhi + movw r2, #2790 + ldrh r2, [r4, r2] + strh r2, [r3, #122] @ movhi + movw r2, #2794 + ldrh r2, [r4, r2] + strh r2, [r3, #120] @ movhi + movw r2, #2792 + ldrh r2, [r4, r2] + strh r2, [r3, #124] @ movhi + add sp, sp, #20 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L1799: + ldr r7, [r4, #1084] + add r7, r7, r6, lsl #2 + ldrb r3, [r7, #3] @ zero_extendqisi2 + cmp r3, #0 + ldreq r1, [sp, #4] + beq .L1783 + ldr r3, [sp, #8] + ldr ip, [r4, #2800] + ldrh r10, [r9, #-14] + ldrb lr, [r3, #-3127] @ zero_extendqisi2 + mov r3, #0 + mov r1, r3 +.L1784: + cmp r3, lr + blt .L1787 + cmp r1, #0 + beq .L1788 + mov r0, #32768 + bl __aeabi_idiv + add r1, r0, #1 + sxth r1, r1 +.L1783: + lsl fp, r6, #1 + ldr r0, [r4, #1036] + add r2, fp, r6 + lsl r2, r2, #1 + add ip, r0, r2 + strh r1, [ip, #4] @ movhi + mvn r1, #0 + strh r1, [ip, #2] @ movhi + strh r1, [r0, r2] @ movhi + ldrb r2, [r7, #2] @ zero_extendqisi2 + and r2, r2, #224 + cmp r2, #224 + cmpne r2, #32 + moveq r10, #1 + movne r10, #0 + beq .L1789 + ldr r1, [r4, #1096] + ldrh r0, [r1, #16] + cmp r6, r0 + beq .L1789 + ldrh r0, [r1, #48] + cmp r6, r0 + beq .L1789 + ldrh r1, [r1, #80] + cmp r6, r1 + beq .L1789 + cmp r2, #64 + bne .L1790 + uxth r7, r6 + ldr r2, .L1813+12 + sub r0, r9, #12 + mov r1, r7 +.L1811: + bl _insert_data_list + ldr r2, [r4, #1092] + ldrh r3, [r2, fp] + cmp r3, #7 + movls r2, r10 + movls r1, #1 + movls r0, r7 + bls .L1809 +.L1789: + add r6, r6, #1 + sxth r6, r6 + b .L1782 +.L1787: + ldrb r2, [r7, #3] @ zero_extendqisi2 + asr r2, r2, r3 + add r3, r3, #1 + tst r2, #1 + ldrhne r2, [ip, #146] + addeq r1, r10, r1 + sxtheq r1, r1 + addne r2, r2, #1 + strhne r2, [ip, #146] @ movhi + b .L1784 +.L1788: + ldrb r3, [r7, #2] @ zero_extendqisi2 + mvn r0, #0 + orr r3, r3, #224 + strb r3, [r7, #2] + lsl r3, r6, #1 + ldr r2, [r4, #1092] + strh r0, [r2, r3] @ movhi + b .L1783 +.L1790: + cmp r2, #96 + uxtheq r7, r6 + ldreq r2, .L1813+16 + ldreq r0, .L1813+20 + moveq r1, r7 + beq .L1811 +.L1791: + cmp r2, #160 + uxtheq r7, r6 + ldreq r2, .L1813+24 + ldreq r0, .L1813+28 + moveq r1, r7 + beq .L1811 +.L1792: + cmp r2, #0 + bne .L1789 + ldr r2, [r4, #1092] + uxth r10, r6 + ldrh r2, [r2, fp] + cmp r2, #0 + beq .L1793 + cmp r5, #2 + bgt .L1794 + mov r1, r6 + ldr r0, .L1813+32 + bl rk_printk + ldrb r3, [r7, #2] @ zero_extendqisi2 + add r5, r5, #1 + sxth r5, r5 + mov r1, #1 + mov r0, r10 + tst r3, #16 + movne r2, #5 + moveq r2, #2 + bfi r3, r2, #5, #3 + mov r2, #0 + strb r3, [r7, #2] +.L1809: + bl gc_add_sblk + b .L1789 +.L1794: + mov r2, #656 + ldr r1, .L1813+36 + ldr r0, .L1813+40 + bl rk_printk + bl dump_stack +.L1793: + ldrb r3, [r7, #2] @ zero_extendqisi2 + ands r3, r3, #24 + bne .L1797 + ldr r2, .L1813+44 + mov r1, r10 + ldr r0, .L1813+48 +.L1807: + bl _insert_free_list + b .L1789 +.L1797: + cmp r3, #16 + ldreq r2, .L1813+52 + moveq r1, r10 + subeq r0, r8, #12 + ldrne r2, .L1813+56 + movne r1, r10 + subne r0, r8, #8 + b .L1807 +.L1814: + .align 2 +.L1813: + .word .LANCHOR0 + .word .LANCHOR3 + .word .LANCHOR0+1080 + .word .LANCHOR0+2790 + .word .LANCHOR0+2792 + .word .LANCHOR3-3104 + .word .LANCHOR0+2794 + .word .LANCHOR3-3100 + .word .LC132 + .word .LANCHOR1+1687 + .word .LC0 + .word .LANCHOR0+2784 + .word .LANCHOR3-3088 + .word .LANCHOR0+2786 + .word .LANCHOR0+2788 + .fnend + .size zftl_sblk_list_init, .-zftl_sblk_list_init + .align 2 + .global pm_free_sblk + .syntax unified + .arm + .fpu softvfp + .type pm_free_sblk, %function +pm_free_sblk: + .fnstart + @ args = 0, pretend = 0, frame = 272 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #284 + sub sp, sp, #284 + ldr r5, .L1843 + ldrh r3, [r5, #-176] + cmp r3, #128 + bls .L1816 + mov r2, #94 + ldr r1, .L1843+4 + ldr r0, .L1843+8 + bl rk_printk + bl dump_stack +.L1816: + ldr r4, .L1843+12 + mov r2, #0 + ldrh ip, [r5, #-176] + movw lr, #65535 + ldr r1, [r4, #2800] + add r3, r1, #688 + add r1, r1, #416 + ldrh r0, [r3] + mov r3, r2 +.L1819: + ldrh r6, [r1], #2 + cmp r6, lr + addne r2, r2, #1 + uxthne r2, r2 + cmp r2, r0 + bcs .L1818 + cmp r2, ip + bcs .L1818 + add r3, r3, #1 + uxth r3, r3 + cmp r3, #128 + bne .L1819 +.L1818: + add r3, r3, #1 + mov r2, #256 + uxth fp, r3 + mov r1, #0 + add r0, sp, #24 + cmp fp, #129 + mov r6, #0 + moveq fp, #128 + bl ftl_memset + ldr r7, [r4, #2800] + movw r3, #698 + ldrb r8, [r4, #1153] @ zero_extendqisi2 + ldrb r2, [r5, #-3136] @ zero_extendqisi2 + ldrh r3, [r7, r3] + add r10, r7, #704 + rsb r8, r8, #24 + str r3, [sp, #12] + ldr r3, .L1843+16 + ldrh r9, [r3, #-2] + sub r3, r8, r9 + mvn r8, #0 + mvn r8, r8, lsl r3 +.L1821: + ldr r1, [sp, #12] + uxth r3, r6 + cmp r1, r3 + bhi .L1824 + ldr r3, .L1843+20 + add r8, sp, #24 + ldrb r7, [r5, #-3127] @ zero_extendqisi2 + movw r10, #65535 + mov r6, #0 + ldrh r3, [r3, #-8] + str r6, [sp, #12] + smulbb r7, r7, r3 + uxth r7, r7 +.L1830: + ldr r2, [r4, #2800] + add r3, r6, #208 + lsl r3, r3, #1 + ldrb r1, [r5, #-3136] @ zero_extendqisi2 + uxth r9, r6 + ldrh r3, [r2, r3] + add r0, r2, #692 + ldrh r0, [r0] + str r2, [sp, #16] + str r3, [sp, #20] + bl __aeabi_idiv + ldr r3, [sp, #20] + ldr r2, [sp, #16] + cmp r0, r3 + ldreq r0, .L1843+24 + ldrbeq r1, [r5, #-3127] @ zero_extendqisi2 + ldrheq r0, [r0] + smulbbeq r1, r1, r0 + strheq r1, [r8] @ movhi + ldrh r1, [r8] + ldrh ip, [r2, #74] + cmp r1, #0 + cmpne r1, r7 + movcc r0, #1 + movcs r0, #0 + cmp r0, #0 + ldr r0, [sp, #12] + movne r0, r9 + movne r7, r1 + str r0, [sp, #16] + str r0, [sp, #12] + movw r0, #65535 + cmp r3, r0 + cmpne ip, #2 + bls .L1827 + ldr ip, [r4, #1084] + lsl r0, r3, #2 + ldrh r2, [r2, #92] + ldrh r0, [ip, r0] + add r2, r2, #4 + ubfx r0, r0, #0, #11 + cmp r0, r2 + bgt .L1827 + mov r10, r9 + str r0, [sp] + mov r2, r1 + ldr r0, .L1843+28 + mov r1, r6 + bl rk_printk +.L1827: + ldrh r2, [r8] + cmp r2, #0 + bne .L1828 + ldr r1, [r4, #2800] + add r9, r6, #208 + lsl r3, r9, #1 + movw r0, #65535 + ldrh r3, [r1, r3] + cmp r3, r0 + beq .L1828 + ldr r0, .L1843+32 + ldr r0, [r0] + tst r0, #4096 + beq .L1829 + add r1, r1, #688 + ldr r0, .L1843+36 + ldrh r1, [r1] + str r1, [sp] + mov r1, r6 + bl rk_printk +.L1829: + ldr r3, [r4, #2800] + lsl r9, r9, #1 + ldrh r0, [r3, r9] + bl ftl_free_sblk + ldr r3, [r4, #2800] + mvn r2, #0 + strh r2, [r3, r9] @ movhi + add r3, r3, #688 + ldrh r2, [r3] + sub r2, r2, #1 + strh r2, [r3] @ movhi +.L1828: + add r6, r6, #1 + add r8, r8, #2 + uxth r3, r6 + cmp fp, r3 + bhi .L1830 + ldr r3, [sp, #16] + movw r0, #65535 + cmp r10, r0 + movne r3, r10 + mov r0, r3 + add sp, sp, #284 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L1824: + ldr r0, [r10], #4 + mov r1, r2 + str r2, [sp, #16] + and r0, r8, r0, lsr r9 + bl __aeabi_uidiv + ldr r2, [sp, #16] + uxth r0, r0 + add lr, r7, #416 + add r1, sp, #24 + mov r3, #0 +.L1823: + ldrh ip, [lr], #2 + add r3, r3, #1 + uxth r3, r3 + add r1, r1, #2 + cmp r0, ip + ldrheq ip, [r1, #-2] + addeq ip, ip, #1 + strheq ip, [r1, #-2] @ movhi + cmp fp, r3 + bne .L1823 + add r6, r6, #1 + b .L1821 +.L1844: + .align 2 +.L1843: + .word .LANCHOR3 + .word .LANCHOR1+1707 + .word .LC0 + .word .LANCHOR0 + .word .LANCHOR3-3136 + .word .LANCHOR3-3088 + .word .LANCHOR3-3096 + .word .LC133 + .word .LANCHOR2 + .word .LC134 + .fnend + .size pm_free_sblk, .-pm_free_sblk + .align 2 + .global ftl_memcpy + .syntax unified + .arm + .fpu softvfp + .type ftl_memcpy, %function +ftl_memcpy: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + b memcpy + .fnend + .size ftl_memcpy, .-ftl_memcpy + .align 2 + .global flash_info_data_init + .syntax unified + .arm + .fpu softvfp + .type flash_info_data_init, %function +flash_info_data_init: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L1852 + push {r4, lr} + .save {r4, lr} + ldr r3, [r3] + tst r3, #4096 + beq .L1847 + ldr r2, .L1852+4 + mov r1, #120 + ldr r0, .L1852+8 + bl rk_printk +.L1847: + ldr r4, .L1852+12 + mov r2, #2048 + mov r1, #0 + ldr r0, [r4, #1040] + bl ftl_memset + ldr r3, [r4, #1040] + ldr r2, .L1852+16 + ldr r1, .L1852+20 + str r2, [r3] + mov r3, #2032 + ldr r0, [r4, #1040] + mov r2, #32 + str r3, [r0, #8] + mov r3, #1 + strh r3, [r0, #16] @ movhi + add r0, r0, #80 + bl ftl_memcpy + ldr r0, [r4, #1040] + mov r2, #32 + ldr r1, .L1852+24 + pop {r4, lr} + add r0, r0, #48 + b ftl_memcpy +.L1853: + .align 2 +.L1852: + .word .LANCHOR2 + .word .LANCHOR1+1720 + .word .LC135 + .word .LANCHOR0 + .word 1398362953 + .word .LANCHOR0+1111 + .word .LANCHOR2+4 + .fnend + .size flash_info_data_init, .-flash_info_data_init + .align 2 + .global ftl_memcpy32 + .syntax unified + .arm + .fpu softvfp + .type ftl_memcpy32, %function +ftl_memcpy32: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + mov r3, #0 +.L1855: + cmp r3, r2 + bne .L1856 + bx lr +.L1856: + ldr ip, [r1, r3, lsl #2] + str ip, [r0, r3, lsl #2] + add r3, r3, #1 + b .L1855 + .fnend + .size ftl_memcpy32, .-ftl_memcpy32 + .align 2 + .global ftl_memcmp + .syntax unified + .arm + .fpu softvfp + .type ftl_memcmp, %function +ftl_memcmp: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + b memcmp + .fnend + .size ftl_memcmp, .-ftl_memcmp + .align 2 + .global timer_get_time + .syntax unified + .arm + .fpu softvfp + .type timer_get_time, %function +timer_get_time: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L1859 + ldr r0, [r3] + ldr r3, .L1859+4 + ldr r3, [r3, #-168] + sub r0, r0, r3 + b jiffies_to_msecs +.L1860: + .align 2 +.L1859: + .word jiffies + .word .LANCHOR3 + .fnend + .size timer_get_time, .-timer_get_time + .align 2 + .global StorageSysDataLoad + .syntax unified + .arm + .fpu softvfp + .type StorageSysDataLoad, %function +StorageSysDataLoad: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + mov r4, r1 + mov r5, r0 + mov r2, #512 + mov r1, #0 + mov r0, r4 + bl ftl_memset + bl rknand_device_lock + ldr r3, .L1863 + mov r2, r4 + mov r1, #1 + mov r0, r5 + ldr r3, [r3, #-160] + ldr r3, [r3, #12] + blx r3 + mov r4, r0 + bl rknand_device_unlock + mov r0, r4 + pop {r4, r5, r6, pc} +.L1864: + .align 2 +.L1863: + .word .LANCHOR3 + .fnend + .size StorageSysDataLoad, .-StorageSysDataLoad + .align 2 + .global StorageSysDataStore + .syntax unified + .arm + .fpu softvfp + .type StorageSysDataStore, %function +StorageSysDataStore: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + mov r5, r1 + mov r4, r0 + bl rknand_device_lock + ldr r3, .L1867 + mov r2, r5 + mov r1, #1 + mov r0, r4 + ldr r3, [r3, #-160] + ldr r3, [r3, #16] + blx r3 + mov r4, r0 + bl rknand_device_unlock + mov r0, r4 + pop {r4, r5, r6, pc} +.L1868: + .align 2 +.L1867: + .word .LANCHOR3 + .fnend + .size StorageSysDataStore, .-StorageSysDataStore + .align 2 + .global FlashBootVendorRead + .syntax unified + .arm + .fpu softvfp + .type FlashBootVendorRead, %function +FlashBootVendorRead: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + mov r4, r0 + mov r5, r1 + mov r6, r2 + bl rknand_device_lock + ldr r3, .L1871 + mov r2, r6 + mov r1, r5 + mov r0, r4 + ldr r3, [r3, #-160] + ldr r3, [r3, #4] + blx r3 + mov r4, r0 + bl rknand_device_unlock + mov r0, r4 + pop {r4, r5, r6, pc} +.L1872: + .align 2 +.L1871: + .word .LANCHOR3 + .fnend + .size FlashBootVendorRead, .-FlashBootVendorRead + .align 2 + .global FlashBootVendorWrite + .syntax unified + .arm + .fpu softvfp + .type FlashBootVendorWrite, %function +FlashBootVendorWrite: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + mov r4, r0 + mov r5, r1 + mov r6, r2 + bl rknand_device_lock + ldr r3, .L1875 + mov r2, r6 + mov r1, r5 + mov r0, r4 + ldr r3, [r3, #-160] + ldr r3, [r3, #8] + blx r3 + mov r4, r0 + bl rknand_device_unlock + mov r0, r4 + pop {r4, r5, r6, pc} +.L1876: + .align 2 +.L1875: + .word .LANCHOR3 + .fnend + .size FlashBootVendorWrite, .-FlashBootVendorWrite + .align 2 + .global flash_sram_load_store + .syntax unified + .arm + .fpu softvfp + .type flash_sram_load_store, %function +flash_sram_load_store: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr ip, .L1882 + cmp r2, #0 + moveq r2, r3 + ldr ip, [ip, #-156] + add ip, ip, #4096 + add ip, ip, r1 + moveq r1, ip + strne lr, [sp, #-4]! + .save {lr} + movne r1, r0 + ldrne lr, [sp], #4 + movne r2, r3 + movne r0, ip +.L1881: + b ftl_memcpy +.L1883: + .align 2 +.L1882: + .word .LANCHOR3 + .fnend + .size flash_sram_load_store, .-flash_sram_load_store + .align 2 + .global FlashCs123Init + .syntax unified + .arm + .fpu softvfp + .type FlashCs123Init, %function +FlashCs123Init: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + bx lr + .fnend + .size FlashCs123Init, .-FlashCs123Init + .align 2 + .global ftl_dma32_malloc + .syntax unified + .arm + .fpu softvfp + .type ftl_dma32_malloc, %function +ftl_dma32_malloc: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + cmp r0, #8192 + ble .L1886 + b ftl_malloc +.L1886: + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + add r4, r0, #63 + ldr r5, .L1890 + bic r4, r4, #63 + ldr r3, [r5, #-152] + cmp r4, r3 + ble .L1887 + mov r0, #16384 + bl ftl_malloc + mov r3, #16384 + str r0, [r5, #-148] + str r3, [r5, #-152] +.L1887: + ldr r3, [r5, #-152] + ldr r0, [r5, #-148] + sub r3, r3, r4 + add r4, r0, r4 + str r3, [r5, #-152] + str r4, [r5, #-148] + pop {r4, r5, r6, pc} +.L1891: + .align 2 +.L1890: + .word .LANCHOR3 + .fnend + .size ftl_dma32_malloc, .-ftl_dma32_malloc + .align 2 + .global nandc_init + .syntax unified + .arm + .fpu softvfp + .type nandc_init, %function +nandc_init: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r3, r4, r5, r6, lr} + .save {r4, r5, r6, lr} + .pad #16 + mov r3, #0 + ldr r5, .L1912 + mov r6, r0 + str r3, [sp, #12] + ldr r3, [r5] + tst r3, #4096 + beq .L1893 + mov r2, r0 + ldr r1, .L1912+4 + ldr r0, .L1912+8 + bl rk_printk +.L1893: + ldr r4, .L1912+12 + mov r3, #6 + ldr r2, [r6, #352] + strb r3, [r4, #1028] + ldr r3, .L1912+16 + str r6, [r4, #1044] + cmp r2, r3 + ldr r2, [r6, #128] + moveq r3, #8 + strbeq r3, [r4, #1028] + ldr r3, .L1912+20 + cmp r2, r3 + ldr r2, .L1912+24 + moveq r3, #9 + strbeq r3, [r4, #1028] + ldrb r3, [r4, #1028] @ zero_extendqisi2 + cmp r3, #9 + bne .L1896 + mov r3, #1 + mov r1, #2 + strb r3, [r4, #1195] + ldr r3, [sp, #12] + orr r3, r3, #256 + str r3, [sp, #12] + ldr r3, [sp, #12] + bfi r3, r1, #18, #3 + str r3, [sp, #12] + ldr r3, [sp, #12] + str r3, [r6] + mov r3, #0 + ldr r0, [r4, #1044] + str r3, [r0, #520] + movw r3, #4161 + str r3, [r0, #4] + movw r3, #8321 + str r3, [r0, #8] + mov r3, #38 + str r2, [r0, #80] + str r3, [r0, #84] + mov r3, #39 + str r3, [r0, #84] + ldr r3, [r5] + tst r3, #4096 + beq .L1898 + ldr r1, [r0] + ldr r2, [r0, #8] + ldr r3, [r0, #80] + ldr ip, [r0, #84] + ldr r0, [r0, #88] +.L1911: + str r0, [sp, #4] + str ip, [sp] + ldr r0, .L1912+28 + bl rk_printk +.L1898: + mov r3, #1 + movw r2, #1228 + strb r3, [r4, #1196] + mov r3, #0 + strh r3, [r4, r2] @ movhi + strb r3, [r4, #1193] + ldr r3, [r5] + tst r3, #4096 + beq .L1892 + ldrb r1, [r4, #1028] @ zero_extendqisi2 + ldr r0, .L1912+32 + bl rk_printk +.L1892: + add sp, sp, #16 + @ sp needed + pop {r4, r5, r6, pc} +.L1896: + ldr r3, [sp, #12] + mov r0, #1 + mov r1, #0 + strb r1, [r4, #1195] + orr r3, r3, #256 + str r3, [sp, #12] + ldr r3, [sp, #12] + bfi r3, r0, #24, #3 + mov r0, #2048 + str r3, [sp, #12] + ldr r3, [sp, #12] + str r3, [r6] + ldr r3, [r4, #1044] + str r1, [r3, #336] + movw r1, #4193 + str r1, [r3, #4] + movw r1, #8321 + str r1, [r3, #344] + str r2, [r3, #304] + mov r2, #38 + str r2, [r3, #308] + mov r2, #39 + str r2, [r3, #308] + bl ftl_dma32_malloc + ldr r3, [r5] + str r0, [r4, #1200] + tst r3, #4096 + beq .L1898 + ldr r0, [r4, #1044] + ldr r1, [r0] + ldr r2, [r0, #344] + ldr r3, [r0, #304] + ldr ip, [r0, #308] + ldr r0, [r0, #312] + b .L1911 +.L1913: + .align 2 +.L1912: + .word .LANCHOR2 + .word .LANCHOR1+1741 + .word .LC136 + .word .LANCHOR0 + .word 1446522928 + .word 1446588464 + .word 1052675 + .word .LC137 + .word .LC138 + .fnend + .size nandc_init, .-nandc_init + .align 2 + .global zbuf_init + .syntax unified + .arm + .fpu softvfp + .type zbuf_init, %function +zbuf_init: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + mov r5, #0 + ldr r4, .L1918 + mov r6, r5 + ldr r7, .L1918+4 +.L1915: + ldrb r0, [r7, #-2546] @ zero_extendqisi2 + uxtb r3, r5 + strb r6, [r4, #2] + add r5, r5, #1 + add r2, r3, #1 + strb r3, [r4, #1] + strb r2, [r4] + add r4, r4, #48 + lsl r0, r0, #9 + str r6, [r4, #-40] + bl ftl_dma32_malloc + str r0, [r4, #-44] + mov r0, #64 + bl ftl_dma32_malloc + cmp r5, #32 + str r0, [r4, #-36] + bne .L1915 + ldr r3, .L1918+8 + mvn r2, #0 + strb r2, [r3, #2720] + strb r6, [r3, #2768] + strb r5, [r3, #2769] + pop {r4, r5, r6, r7, r8, pc} +.L1919: + .align 2 +.L1918: + .word .LANCHOR0+1232 + .word .LANCHOR3 + .word .LANCHOR0 + .fnend + .size zbuf_init, .-zbuf_init + .align 2 + .global gc_init + .syntax unified + .arm + .fpu softvfp + .type gc_init, %function +gc_init: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + movw r9, #2824 + ldr r6, .L1922 + mov r5, #0 + movw r2, #2204 + mov r1, r5 + ldr r4, .L1922+4 + add r7, r6, r9 + mov r0, r7 + sub r8, r4, #3088 + strb r5, [r4, #-3119] + strb r5, [r4, #-144] + str r5, [r4, #-140] + strh r5, [r8, #-6] @ movhi + bl ftl_memset + mvn r3, #0 + ldrb r0, [r4, #-3127] @ zero_extendqisi2 + strh r3, [r6, r9] @ movhi + movw ip, #2806 + ldrh r3, [r8, #-8] + str r5, [r6, #2832] + lsr r2, r3, #1 + lsr r1, r3, #2 + strh r2, [r7, #34] @ movhi + smulbb r2, r0, r3 + strh r1, [r7, #32] @ movhi + sub r7, r4, #3104 + strh r5, [r7, #-8] @ movhi + uxth r2, r2 + strh r5, [r7, #-6] @ movhi + strh r5, [r7, #-4] @ movhi + sub lr, r2, #32 + strh lr, [r6, ip] @ movhi + movw ip, #2808 + strh r2, [r6, ip] @ movhi + add r2, r6, #2816 + strh r3, [r2] @ movhi + mov r3, #4 + strh r3, [r4, #-136] @ movhi + movw r3, #2818 + strh r1, [r6, r3] @ movhi + ldrh r3, [r7, #-14] + mul r0, r0, r3 + lsl r0, r0, #2 + bl ftl_dma32_malloc + ldrh r3, [r7, #-14] + str r0, [r4, #-132] + ldrb r0, [r4, #-3127] @ zero_extendqisi2 + mul r0, r0, r3 + lsl r0, r0, #2 + bl ftl_dma32_malloc + ldrh r3, [r7, #-14] + str r0, [r4, #-128] + ldrb r0, [r4, #-3127] @ zero_extendqisi2 + mul r0, r0, r3 + bl ftl_dma32_malloc + ldrh r3, [r7, #-14] + str r0, [r4, #-3124] + ldrb r0, [r4, #-3127] @ zero_extendqisi2 + mul r0, r0, r3 + lsl r0, r0, #2 + bl ftl_dma32_malloc + ldrh r3, [r7, #-14] + str r0, [r4, #-3132] + ldrb r0, [r4, #-3127] @ zero_extendqisi2 + mul r0, r0, r3 + lsl r0, r0, #2 + bl ftl_dma32_malloc + ldrh r3, [r8, #-4] + movw r2, #2804 + str r0, [r4, #-124] + lsr r3, r3, #2 + strh r3, [r6, r2] @ movhi + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L1923: + .align 2 +.L1922: + .word .LANCHOR0 + .word .LANCHOR3 + .fnend + .size gc_init, .-gc_init + .align 2 + .global rk_ftl_de_init + .syntax unified + .arm + .fpu softvfp + .type rk_ftl_de_init, %function +rk_ftl_de_init: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, lr} + .save {r4, lr} + mov r1, #0 + ldr r0, .L1926 + bl rk_printk + ldr r3, .L1926+4 + pop {r4, lr} + ldr r3, [r3, #-160] + ldr r3, [r3, #40] + bx r3 @ indirect register sibling call +.L1927: + .align 2 +.L1926: + .word .LC139 + .word .LANCHOR3 + .fnend + .size rk_ftl_de_init, .-rk_ftl_de_init + .align 2 + .global rk_ftl_cache_write_back + .syntax unified + .arm + .fpu softvfp + .type rk_ftl_cache_write_back, %function +rk_ftl_cache_write_back: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L1929 + mov r0, #0 + ldr r3, [r3, #-160] + ldr r3, [r3, #32] + bx r3 @ indirect register sibling call +.L1930: + .align 2 +.L1929: + .word .LANCHOR3 + .fnend + .size rk_ftl_cache_write_back, .-rk_ftl_cache_write_back + .align 2 + .global rk_nand_suspend + .syntax unified + .arm + .fpu softvfp + .type rk_nand_suspend, %function +rk_nand_suspend: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L1932 + ldr r3, [r3, #-160] + ldr r3, [r3, #44] + bx r3 @ indirect register sibling call +.L1933: + .align 2 +.L1932: + .word .LANCHOR3 + .fnend + .size rk_nand_suspend, .-rk_nand_suspend + .align 2 + .global rk_nand_resume + .syntax unified + .arm + .fpu softvfp + .type rk_nand_resume, %function +rk_nand_resume: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L1935 + ldr r3, [r3, #-160] + ldr r3, [r3, #48] + bx r3 @ indirect register sibling call +.L1936: + .align 2 +.L1935: + .word .LANCHOR3 + .fnend + .size rk_nand_resume, .-rk_nand_resume + .align 2 + .global rk_ftl_get_capacity + .syntax unified + .arm + .fpu softvfp + .type rk_ftl_get_capacity, %function +rk_ftl_get_capacity: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L1938 + mov r0, #0 + ldr r3, [r3, #-160] + ldr r3, [r3, #36] + bx r3 +.L1939: + .align 2 +.L1938: + .word .LANCHOR3 + .fnend + .size rk_ftl_get_capacity, .-rk_ftl_get_capacity + .align 2 + .global rk_nandc_get_irq_status + .syntax unified + .arm + .fpu softvfp + .type rk_nandc_get_irq_status, %function +rk_nandc_get_irq_status: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L1941 + ldr r3, [r3, #-160] + ldr r3, [r3, #60] + bx r3 +.L1942: + .align 2 +.L1941: + .word .LANCHOR3 + .fnend + .size rk_nandc_get_irq_status, .-rk_nandc_get_irq_status + .align 2 + .global rknand_proc_ftlread + .syntax unified + .arm + .fpu softvfp + .type rknand_proc_ftlread, %function +rknand_proc_ftlread: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L1944 + ldr r3, [r3, #-160] + ldr r3, [r3, #64] + bx r3 +.L1945: + .align 2 +.L1944: + .word .LANCHOR3 + .fnend + .size rknand_proc_ftlread, .-rknand_proc_ftlread + .align 2 + .global FtlRead + .syntax unified + .arm + .fpu softvfp + .type FtlRead, %function +FtlRead: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr ip, .L1948 + str lr, [sp, #-4]! + .save {lr} + ldr ip, [ip, #-160] + ldr lr, [ip, #20] + mov ip, lr + ldr lr, [sp], #4 + bx ip +.L1949: + .align 2 +.L1948: + .word .LANCHOR3 + .fnend + .size FtlRead, .-FtlRead + .align 2 + .global FtlDiscard + .syntax unified + .arm + .fpu softvfp + .type FtlDiscard, %function +FtlDiscard: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L1951 + ldr r3, [r3, #-160] + ldr r3, [r3, #28] + bx r3 +.L1952: + .align 2 +.L1951: + .word .LANCHOR3 + .fnend + .size FtlDiscard, .-FtlDiscard + .align 2 + .global rk_ftl_garbage_collect + .syntax unified + .arm + .fpu softvfp + .type rk_ftl_garbage_collect, %function +rk_ftl_garbage_collect: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L1954 + ldr r3, [r3, #-160] + ldr r3, [r3, #52] + bx r3 +.L1955: + .align 2 +.L1954: + .word .LANCHOR3 + .fnend + .size rk_ftl_garbage_collect, .-rk_ftl_garbage_collect + .align 2 + .global ReadFlashInfo + .syntax unified + .arm + .fpu softvfp + .type ReadFlashInfo, %function +ReadFlashInfo: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L1957 + ldr r3, [r3, #-160] + ldr r3, [r3, #56] + bx r3 @ indirect register sibling call +.L1958: + .align 2 +.L1957: + .word .LANCHOR3 + .fnend + .size ReadFlashInfo, .-ReadFlashInfo + .align 2 + .global rknand_print_hex + .syntax unified + .arm + .fpu softvfp + .type rknand_print_hex, %function +rknand_print_hex: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + mov ip, r2 + push {r0, r1, r2, r3, r4, lr} + .save {lr} + .pad #20 + mul r3, r3, ip + mov r2, #0 + str r2, [sp, #12] + str ip, [sp] + stmib sp, {r1, r3} + mov r1, r0 + mov r3, #16 + ldr r0, .L1961 + bl print_hex_dump + add sp, sp, #20 + @ sp needed + ldr pc, [sp], #4 +.L1962: + .align 2 +.L1961: + .word .LC140 + .fnend + .size rknand_print_hex, .-rknand_print_hex + .align 2 + .global hynix_get_read_retry_default + .syntax unified + .arm + .fpu softvfp + .type hynix_get_read_retry_default, %function +hynix_get_read_retry_default: + .fnstart + @ args = 0, pretend = 0, frame = 48 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r5, r0 + ldr r6, .L2074 + mvn r3, #83 + cmp r5, #2 + mvn r2, #81 + .pad #52 + sub sp, sp, #52 + ldr r4, [r6, #1040] + strb r0, [r4, #112] + mvn r0, #82 + strb r3, [r4, #128] + mvn r3, #80 + add r1, r4, #128 + strb r0, [r4, #129] + strb r2, [r4, #130] + strb r3, [r4, #131] + bne .L1964 + mvn r3, #88 + mov r10, #7 + strb r3, [r4, #128] + mvn r2, #8 + ldr r3, .L2074+4 + strb r2, [r3, #407] +.L2068: + mov fp, #4 + b .L1965 +.L1964: + cmp r5, #3 + bne .L1966 + add r2, r4, #127 + mov r3, #176 +.L1967: + strb r3, [r2, #1]! + add r3, r3, #1 + uxtb r3, r3 + cmp r3, #184 + bne .L1967 +.L2069: + mov r10, #8 + mov fp, r10 +.L1965: + sub r3, r5, #1 + cmp r3, #1 + bhi .L1973 + sub r9, fp, #1 + mov r8, #0 + uxtab r3, r1, r9 + str r3, [sp, #4] +.L1974: + ldrb r2, [r6, #1109] @ zero_extendqisi2 + uxtb r3, r8 + cmp r2, r3 + bhi .L1979 +.L1980: + strb fp, [r4, #113] + strb r10, [r4, #114] + add sp, sp, #52 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L1966: + cmp r5, #4 + bne .L1968 + mvn ip, #51 + strb r0, [r4, #133] + strb ip, [r4, #128] + mvn ip, #64 + strb ip, [r4, #129] + mvn ip, #85 + strb ip, [r4, #130] + mvn ip, #84 + strb ip, [r4, #131] + mvn ip, #50 + strb ip, [r4, #132] + strb r2, [r4, #134] + strb r3, [r4, #135] + b .L2069 +.L1968: + cmp r5, #5 + bne .L1969 + mov r3, #56 + mov r10, #8 + strb r3, [r4, #128] + mov r3, #57 + strb r3, [r4, #129] + mov r3, #58 + strb r3, [r4, #130] + mov r3, #59 + strb r3, [r4, #131] + b .L2068 +.L1969: + cmp r5, #6 + bne .L1970 + mov r3, #14 + mov r10, #12 + strb r3, [r4, #128] + mov r3, #15 + strb r3, [r4, #129] + mov r3, #16 + strb r3, [r4, #130] + mov r3, #17 + strb r3, [r4, #131] + b .L2068 +.L1970: + cmp r5, #7 + bne .L1971 + add r2, r4, #127 + mov r3, #176 +.L1972: + strb r3, [r2, #1]! + add r3, r3, #1 + uxtb r3, r3 + cmp r3, #184 + bne .L1972 + mvn r3, #43 + mov r10, #12 + strb r3, [r4, #136] + mvn r3, #42 + strb r3, [r4, #137] + mov fp, #10 + b .L1965 +.L1971: + cmp r5, #8 + mov r3, #7 + movne r10, r3 + bne .L2068 + strb r3, [r4, #129] + mov r3, #9 + mov r2, #6 + strb r3, [r4, #131] + mov r3, #10 + strb r2, [r4, #128] + strb r5, [r4, #130] + mov r10, #50 + strb r3, [r4, #132] + mov fp, #5 + b .L1965 +.L1979: + add r3, r6, r3 + mov r5, #160 + ldrb r3, [r3, #1144] @ zero_extendqisi2 + add r1, r4, #127 + ldr r7, [r6, #1044] + mla r5, r5, r3, r4 + add r7, r7, r3, lsl #8 + mov r3, #55 + add r5, r5, #144 + sub r9, r5, #1 +.L1975: + str r3, [r7, #2056] + mov r0, #200 + ldrb r2, [r1, #1]! @ zero_extendqisi2 + str r3, [sp, #12] + str r2, [r7, #2052] + str r1, [sp, #8] + bl ndelay + ldr r3, [sp, #4] + ldr r1, [sp, #8] + ldr r2, [r7, #2048] + cmp r3, r1 + ldr r3, [sp, #12] + strb r2, [r9, #1]! + bne .L1975 + ldr lr, .L2074+8 + mov r1, r5 + mov r2, #0 +.L1976: + mov r3, #1 + add ip, lr, r2 +.L1977: + ldrb r0, [ip, r3, lsl #2] @ zero_extendqisi2 + ldrb r7, [r1] @ zero_extendqisi2 + add r0, r0, r7 + strb r0, [r1, r3, lsl #3] + add r3, r3, #1 + cmp r3, #7 + bne .L1977 + add r2, r2, #1 + add r1, r1, #1 + cmp r2, #4 + bne .L1976 + mov r3, #0 + add r8, r8, #1 + strb r3, [r5, #16] + strb r3, [r5, #24] + strb r3, [r5, #32] + strb r3, [r5, #40] + strb r3, [r5, #48] + strb r3, [r5, #41] + strb r3, [r5, #49] + b .L1974 +.L1973: + sub r3, r5, #3 + cmp r3, #5 + bhi .L1980 + smulbb r3, fp, r10 + asr r2, r3, #1 + lsl r3, r3, #4 + str r3, [sp, #44] + lsl r3, r2, #2 + str r2, [sp, #4] + str r3, [sp, #36] + lsl r3, r2, #1 + str r3, [sp, #20] + mov r3, #0 +.L2073: + str r3, [sp, #16] + ldr r3, .L2074 + ldrb r2, [r3, #1109] @ zero_extendqisi2 + ldrb r3, [sp, #16] @ zero_extendqisi2 + cmp r2, r3 + bls .L1980 + ldr r2, .L2074 + mov r7, #255 + add r3, r2, r3 + ldrb r8, [r3, #1144] @ zero_extendqisi2 + mov r0, r8 + bl zftl_flash_exit_slc_mode + mov r0, #160 + mla r0, r0, r8, r4 + add r3, r0, #144 + str r3, [sp, #32] + ldr r3, .L2074 + ldr r9, [r3, #1044] + add r6, r9, r8, lsl #8 + str r7, [r6, #2056] + bl nandc_wait_flash_ready + cmp r5, #8 + bne .L1982 + add r3, r4, #144 + mov r2, #23 + str r3, [sp, #32] + mov r3, #120 + str r3, [r6, #2056] + mov r3, #0 + str r3, [r6, #2052] + mov r1, #25 + str r3, [r6, #2052] + str r3, [r6, #2052] + str r2, [r6, #2056] + mov r2, #4 + str r2, [r6, #2056] + str r1, [r6, #2056] + mov r1, #218 + str r1, [r6, #2056] + mov r1, #21 + str r3, [r6, #2056] + str r3, [r6, #2052] + str r3, [r6, #2052] + str r1, [r6, #2052] + str r2, [r6, #2052] + str r3, [r6, #2052] +.L1983: + add r3, r9, r8, lsl #8 + mov r2, #48 + str r2, [r3, #2056] + bl nandc_wait_flash_ready + sub r3, r5, #5 + cmp r5, #8 + cmpne r3, #1 + str r3, [sp, #40] + movls r2, #16 + bls .L1989 + cmp r5, #7 + movne r2, #2 + moveq r2, #32 +.L1989: + ldr r3, .L2074+12 + sub r2, r2, #1 + add r6, r9, r8, lsl #8 + ldr r3, [r3, #-120] + sub r1, r3, #1 + uxtab r2, r3, r2 + mov r0, r1 +.L1990: + ldr ip, [r6, #2048] + strb ip, [r0, #1]! + cmp r0, r2 + bne .L1990 + cmp r5, #8 + bne .L1991 + mov r2, #0 +.L1993: + ldrb r0, [r3, r2, lsl #2] @ zero_extendqisi2 + uxtb r1, r2 + cmp r0, #50 + beq .L1992 + add r0, r3, r2, lsl #2 + ldrb r0, [r0, #1] @ zero_extendqisi2 + cmp r0, #5 + beq .L1992 + add r2, r2, #1 + cmp r2, #8 + bne .L1993 +.L1994: + mov r1, #0 + ldr r0, .L2074+16 + bl rk_printk +.L1996: + b .L1996 +.L1982: + cmp r5, #4 + mov r3, #54 + str r3, [r6, #2056] + bne .L1984 + mov r3, #64 + str r7, [r6, #2052] + str r3, [r6, #2048] + mov r3, #204 +.L2070: + str r3, [r6, #2052] + mov r3, #77 +.L2071: + str r3, [r6, #2048] +.L1985: + add r3, r9, r8, lsl #8 + mov r2, #22 + cmp r5, #6 + str r2, [r3, #2056] + mov r2, #23 + str r2, [r3, #2056] + mov r2, #4 + str r2, [r3, #2056] + mov r2, #25 + str r2, [r3, #2056] + mov r2, #0 + str r2, [r3, #2056] + str r2, [r3, #2052] + str r2, [r3, #2052] + moveq r2, #31 + str r2, [r3, #2052] + mov r2, #2 + str r2, [r3, #2052] + mov r2, #0 + str r2, [r3, #2052] + b .L1983 +.L1984: + sub r3, r5, #5 + cmp r3, #1 + ldrbls r3, [r4, #128] @ zero_extendqisi2 + strls r3, [r6, #2052] + movls r3, #82 + bls .L2071 + cmp r5, #7 + bne .L1985 + mov r3, #174 + str r3, [r6, #2052] + mov r3, #0 + str r3, [r6, #2048] + mov r3, #176 + b .L2070 +.L1992: + cmp r1, #6 + bhi .L1994 +.L1995: + ldr r3, .L2074+12 + ldr r2, [r3, #-120] + mov r3, r2 +.L2005: + ldr r0, [sp, #44] + sub r1, r3, r2 + cmp r0, r1 + bgt .L2006 + ldr r3, .L2074+12 + ldr r1, [r3, #-120] + ldr r3, [sp, #20] + add r0, r1, r3 + mov r3, #8 +.L2008: + mov lr, r0 + mov ip, #0 +.L2007: + ldrh r7, [lr] + add ip, ip, #1 + mvn r7, r7 + strh r7, [lr], #2 @ movhi + ldr r7, [sp, #4] + cmp r7, ip + bgt .L2007 + ldr ip, [sp, #36] + subs r3, r3, #1 + add r0, r0, ip + bne .L2008 + str r1, [sp, #8] + str r3, [sp, #12] +.L2009: + mov ip, #0 + mov r0, ip +.L2013: + mov lr, #1 + mov r7, #16 + lsl lr, lr, r0 + str r7, [sp, #28] + mov r7, #0 + str lr, [sp, #24] + ldr lr, [sp, #8] +.L2011: + ldrh r3, [lr] + mov r1, r3 + ldr r3, [sp, #24] + bics r3, r3, r1 + ldr r3, [sp, #20] + addeq r7, r7, #1 + add lr, lr, r3 + ldr r3, [sp, #28] + subs r3, r3, #1 + str r3, [sp, #28] + bne .L2011 + cmp r7, #8 + add r0, r0, #1 + ldrhi r3, [sp, #24] + orrhi ip, ip, r3 + uxthhi ip, ip + cmp r0, #16 + bne .L2013 + ldr r3, [sp, #8] + strh ip, [r3], #2 @ movhi + str r3, [sp, #8] + ldr r3, [sp, #12] + add r3, r3, #1 + str r3, [sp, #12] + ldr r1, [sp, #12] + ldr r3, [sp, #4] + cmp r3, r1 + bgt .L2009 + ldr r3, .L2074+12 + ldr r1, [r3, #-120] + mov r3, #0 + sub r0, r1, #4 + add ip, r1, #28 +.L2016: + ldr lr, [r0, #4]! + cmp lr, #0 + addeq r3, r3, #1 + cmp ip, r0 + bne .L2016 + cmp r3, #7 + ble .L2017 + ldr r0, .L2074+20 + mov r3, #1024 + mov r2, #1 + bl rknand_print_hex + mov r1, #0 + ldr r0, .L2074+16 + bl rk_printk +.L2018: + b .L2018 +.L1991: + cmp r5, #7 + bne .L1997 + mov r2, #0 +.L1999: + ldrb r0, [r3, r2, lsl #2] @ zero_extendqisi2 + uxtb r1, r2 + cmp r0, #12 + beq .L1998 + add r0, r3, r2, lsl #2 + ldrb r0, [r0, #1] @ zero_extendqisi2 + cmp r0, #10 + beq .L1998 + add r2, r2, #1 + cmp r2, #8 + bne .L1999 +.L2000: + mov r1, #0 + ldr r0, .L2074+16 + bl rk_printk +.L2001: + b .L2001 +.L1998: + cmp r1, #6 + bls .L1995 + b .L2000 +.L1997: + cmp r5, #6 + bne .L1995 + add r3, r3, #7 +.L2002: + ldrb r2, [r1, #1]! @ zero_extendqisi2 + cmp r2, #12 + beq .L1995 + ldrb r2, [r1, #8] @ zero_extendqisi2 + cmp r2, #4 + beq .L1995 + cmp r1, r3 + bne .L2002 + mov r1, #0 + ldr r0, .L2074+16 + bl rk_printk +.L2004: + b .L2004 +.L2006: + ldr r1, [r6, #2048] + strb r1, [r3], #1 + b .L2005 +.L2017: + cmp r5, #6 + moveq ip, #4 + beq .L2019 + cmp r5, #7 + moveq ip, #10 + beq .L2019 + cmp r5, #8 + movne ip, #8 + moveq ip, #5 +.L2019: + sub r3, fp, #1 + ldr r0, [sp, #32] + uxtb r3, r3 + mov lr, #0 + add r3, r3, #1 + str r3, [sp, #8] +.L2020: + mov r3, r0 + mov r1, r2 +.L2021: + ldrb r7, [r1], #1 @ zero_extendqisi2 + strb r7, [r3], #1 + sub r7, r1, r2 + uxtb r7, r7 + cmp fp, r7 + bhi .L2021 + ldr r3, [sp, #8] + add lr, lr, #1 + cmp r10, lr + add r0, r0, ip + add r2, r2, r3 + bgt .L2020 + add r7, r9, r8, lsl #8 + mov r8, #255 + str r8, [r7, #2056] + bl nandc_wait_flash_ready + ldr r3, [sp, #40] + cmp r3, #1 + bhi .L2023 + mov r3, #54 + mov r2, #22 + str r3, [r7, #2056] + ldrb r3, [r4, #128] @ zero_extendqisi2 + str r3, [r6, #2052] + mov r3, #0 + str r3, [r6, #2048] + str r2, [r7, #2056] + str r3, [r7, #2056] + str r3, [r6, #2052] + str r3, [r6, #2052] + mov r3, #48 + str r8, [r6, #2052] + str r8, [r6, #2052] + str r8, [r6, #2052] +.L2072: + str r3, [r7, #2056] + bl nandc_wait_flash_ready + ldr r3, [sp, #16] + add r3, r3, #1 + b .L2073 +.L2023: + cmp r5, #8 + moveq r3, #190 + movne r3, #56 + b .L2072 +.L2075: + .align 2 +.L2074: + .word .LANCHOR0 + .word .LANCHOR2 + .word .LANCHOR2+390 + .word .LANCHOR3 + .word .LC141 + .word .LC142 + .fnend + .size hynix_get_read_retry_default, .-hynix_get_read_retry_default + .align 2 + .global flash_get_read_retry_tbl + .syntax unified + .arm + .fpu softvfp + .type flash_get_read_retry_tbl, %function +flash_get_read_retry_tbl: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L2078 + ldrb r0, [r3, #23] @ zero_extendqisi2 + sub r3, r0, #1 + cmp r3, #7 + bxhi lr + b hynix_get_read_retry_default +.L2079: + .align 2 +.L2078: + .word .LANCHOR2 + .fnend + .size flash_get_read_retry_tbl, .-flash_get_read_retry_tbl + .align 2 + .global nandc_xfer_done + .syntax unified + .arm + .fpu softvfp + .type nandc_xfer_done, %function +nandc_xfer_done: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + .pad #8 + mov r1, #0 + ldr r4, .L2129 + ldr r7, .L2129+4 + ldrb r3, [r4, #1028] @ zero_extendqisi2 + ldr r6, [r4, #1044] + strb r1, [r7, #-116] + cmp r3, #9 + bne .L2081 + ldr r3, [r6, #16] + str r3, [sp] + ldr r5, [r6, #48] + ubfx r5, r5, #1, #1 + cmp r5, r1 + bne .L2082 + ldr r7, .L2129+8 + ldr r8, .L2129+12 +.L2083: + ldr r3, [sp] + tst r3, #1048576 + beq .L2093 + ldr r3, [r4, #1220] + cmp r3, #0 + beq .L2091 + ldr r1, [sp] + mov r2, #1 + ldr r0, [r4, #1212] + ubfx r1, r1, #22, #6 + lsl r1, r1, #10 + bl rknand_dma_unmap_single + ldr r1, [sp] + mov r2, #1 + ubfx r1, r1, #22, #6 + b .L2128 +.L2082: + mov r5, r1 +.L2084: + ldr r2, [r6, #64] + ldr r3, [sp] + ubfx r2, r2, #16, #6 + ubfx r3, r3, #22, #6 + cmp r2, r3 + bge .L2086 + ldr r3, [r4, #1044] + ldr r3, [r3] + str r3, [sp, #4] + ldr r3, [sp, #4] + tst r3, #8192 + beq .L2085 + ldr r3, [sp, #4] + tst r3, #131072 + beq .L2085 + ldr r1, [sp, #4] + ldr r0, .L2129+16 + ubfx r1, r1, #17, #1 + bl rk_printk +.L2086: + ldr r3, [r4, #1220] + cmp r3, #0 + beq .L2091 + ldr r1, [sp] + mov r2, #0 + ldr r0, [r4, #1212] + ubfx r1, r1, #22, #6 + lsl r1, r1, #10 + bl rknand_dma_unmap_single + ldr r1, [sp] + mov r2, #0 + ubfx r1, r1, #22, #6 +.L2128: + lsl r1, r1, #2 +.L2126: + ldr r0, [r4, #1216] + bl rknand_dma_unmap_single +.L2091: + mov r3, #0 + str r3, [r4, #1220] + add sp, sp, #8 + @ sp needed + pop {r4, r5, r6, r7, r8, pc} +.L2085: + ldr r3, [sp] + add r5, r5, #1 + ubfx r3, r3, #22, #6 + cmp r5, r3, lsl #12 + bne .L2087 + ldr r2, [r6, #64] + mov r1, r5 + ldr r3, [sp] + ldr r0, .L2129+20 + ubfx r2, r2, #16, #5 + ubfx r3, r3, #22, #6 + bl rk_printk + ldr r3, [sp, #4] + tst r3, #8192 + mov r3, #1 + strb r3, [r7, #-116] + bne .L2086 + ldr r3, .L2129+24 + ldr r0, .L2129+28 + ldr r3, [r3, #4] + blx r3 + b .L2086 +.L2087: + mov r1, #10 + mov r0, #5 + bl rk_usleep_range + b .L2084 +.L2093: + ldr r3, [r4, #1044] + add r5, r5, #1 + ldr r3, [r3, #16] + str r3, [sp] + bics r3, r5, #-16777216 + bne .L2092 + ldr r2, [sp] + mov r1, r5 + ldr r3, [r6, #64] + mov r0, r7 + ubfx r3, r3, #16, #6 + bl rk_printk + mov r3, #64 + mov r2, #4 + ldr r1, [r4, #1044] + mov r0, r8 + bl rknand_print_hex +.L2092: + mov r1, #10 + mov r0, #5 + bl rk_usleep_range + b .L2083 +.L2081: + ldr r3, [r6, #8] + str r3, [sp] + ldr r5, [r6, #16] + ubfx r5, r5, #1, #1 + cmp r5, #0 + bne .L2095 + ldr r7, .L2129+8 + ldr r8, .L2129+12 +.L2096: + ldr r3, [sp] + tst r3, #1048576 + beq .L2103 + ldr r3, [r4, #1220] + cmp r3, #0 + beq .L2091 + ldr r1, [sp] + mov r2, #1 + ldr r0, [r4, #1212] + ubfx r1, r1, #22, #6 + lsl r1, r1, #10 + bl rknand_dma_unmap_single + ldr r1, [sp] + mov r2, #1 + ubfx r1, r1, #22, #6 + b .L2127 +.L2095: + ldr r7, .L2129+20 + mov r5, r1 + ldr r8, .L2129+12 +.L2097: + ldr r2, [r6, #28] + ldr r3, [sp] + ubfx r2, r2, #16, #5 + ubfx r3, r3, #22, #6 + cmp r2, r3 + bge .L2099 + ldr r3, [r4, #1044] + ldr r3, [r3] + str r3, [sp, #4] + ldr r3, [sp, #4] + tst r3, #8192 + beq .L2098 + ldr r3, [sp, #4] + tst r3, #131072 + beq .L2098 + ldr r1, [sp, #4] + ldr r0, .L2129+32 + bl rk_printk +.L2099: + ldr r3, [r4, #1220] + cmp r3, #0 + beq .L2091 + ldr r1, [sp] + mov r2, #0 + ldr r0, [r4, #1212] + ubfx r1, r1, #22, #6 + lsl r1, r1, #10 + bl rknand_dma_unmap_single + ldr r1, [sp] + mov r2, #0 + ubfx r1, r1, #22, #6 +.L2127: + lsl r1, r1, #7 + b .L2126 +.L2098: + add r5, r5, #1 + bics r3, r5, #-16777216 + bne .L2100 + ldr r2, [r6, #28] + mov r1, r5 + ldr r3, [sp] + mov r0, r7 + ubfx r2, r2, #16, #5 + ubfx r3, r3, #22, #6 + bl rk_printk + mov r3, #64 + mov r2, #4 + ldr r1, [r4, #1044] + mov r0, r8 + bl rknand_print_hex +.L2100: + mov r1, #10 + mov r0, #5 + bl rk_usleep_range + b .L2097 +.L2103: + ldr r3, [r4, #1044] + add r5, r5, #1 + ldr r3, [r3, #8] + str r3, [sp] + bics r3, r5, #-16777216 + bne .L2102 + ldr r2, [sp] + mov r1, r5 + ldr r3, [r6, #28] + mov r0, r7 + ubfx r3, r3, #16, #5 + bl rk_printk + mov r3, #64 + mov r2, #4 + ldr r1, [r4, #1044] + mov r0, r8 + bl rknand_print_hex +.L2102: + mov r1, #10 + mov r0, #5 + bl rk_usleep_range + b .L2096 +.L2130: + .align 2 +.L2129: + .word .LANCHOR0 + .word .LANCHOR3 + .word .LC145 + .word .LC146 + .word .LC143 + .word .LC144 + .word arm_delay_ops + .word 644245000 + .word .LC147 + .fnend + .size nandc_xfer_done, .-nandc_xfer_done + .align 2 + .global nandc_xfer + .syntax unified + .arm + .fpu softvfp + .type nandc_xfer, %function +nandc_xfer: + .fnstart + @ args = 4, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + .pad #8 + mov r4, r1 + ldr r5, [sp, #32] + mov r8, r2 + mov r6, r3 + mov r1, r8 + mov r2, r6 + mov r0, r4 + mov r3, r5 + bl nandc_xfer_start + mov r0, r4 + bl nandc_xfer_done + cmp r4, #0 + movne r0, #0 + bne .L2132 + ldr r7, .L2170 + ldrb r3, [r7, #1028] @ zero_extendqisi2 + cmp r3, #9 + bne .L2133 + ldr r1, [r7, #1044] + lsr r8, r8, #2 + mov r2, #1 + mov r0, r4 +.L2134: + cmp r4, r8 + bcc .L2138 + ldr r4, [r1] + cmp r2, #0 + movne r0, #512 + and r3, r4, #139264 + cmp r3, #139264 + bne .L2140 + mov r1, r4 + ldr r0, .L2170+4 + bl rk_printk + ldr r3, [r7, #1044] + mvn r0, #0 + orr r4, r4, #131072 + str r4, [r3] +.L2140: + tst r4, #8192 + beq .L2141 + ldr r3, .L2170+8 + ldrb r3, [r3, #-116] @ zero_extendqisi2 + cmp r3, #0 + beq .L2141 + mov r1, r4 + ldr r0, .L2170+12 + bl rk_printk + ldr r3, [r7, #1044] + mov r2, #1 + str r2, [r3, #16] +.L2169: + mvn r0, #0 +.L2132: + add sp, sp, #8 + @ sp needed + pop {r4, r5, r6, r7, r8, pc} +.L2138: + add r3, r4, #84 + ldr r3, [r1, r3, lsl #2] + str r3, [sp, #4] + ldr ip, [sp, #4] + ldr r3, [sp, #4] + ubfx r3, r3, #26, #1 + and r3, r3, ip, lsr #10 + and r2, r2, r3 + ldr r3, [sp, #4] + tst r3, #4 + bne .L2152 + ldr r3, [sp, #4] + tst r3, #262144 + bne .L2152 + ldr ip, [sp, #4] + ldr r3, [sp, #4] + ubfx ip, ip, #3, #7 + ubfx r3, r3, #19, #7 + cmp ip, r3 + ldr r3, [sp, #4] + ubfxgt r3, r3, #3, #7 + ubfxle r3, r3, #19, #7 + cmp r0, r3 + movcc r0, r3 +.L2135: + add r4, r4, #1 + b .L2134 +.L2152: + mvn r0, #0 + b .L2135 +.L2133: + ldrb r3, [r7, #1193] @ zero_extendqisi2 + lsr r0, r8, #1 + mov r2, r5 + mov r1, r4 + cmp r3, #25 + movcc lr, #64 + movcs lr, #128 +.L2143: + cmp r1, r0 + add ip, lr, r4 + add r2, r2, #4 + bcc .L2144 + ldr r1, [r7, #1044] + mov r2, #0 + lsr r8, r8, #2 + mov r0, r2 +.L2145: + cmp r2, r8 + bcc .L2149 + mov r3, #0 + str r3, [r1, #16] + ldr r4, [r1] + and r3, r4, #139264 + cmp r3, #139264 + bne .L2141 + mov r1, r4 + ldr r0, .L2170+16 + bl rk_printk + ldr r3, [r7, #1044] + orr r4, r4, #131072 + str r4, [r3] + b .L2169 +.L2144: + ldr r3, [r7, #1200] + bic r4, r4, #3 + add r1, r1, #1 + ldr r3, [r3, r4] + strb r3, [r2, #-4] + lsr r4, r3, #8 + strb r4, [r2, #-3] + lsr r4, r3, #16 + lsr r3, r3, #24 + strb r4, [r2, #-2] + mov r4, ip + strb r3, [r2, #-1] + b .L2143 +.L2149: + add r3, r2, #8 + ldr r3, [r1, r3, lsl #2] + str r3, [sp, #4] + ldr r3, [sp, #4] + tst r3, #4 + bne .L2155 + ldr r3, [sp, #4] + tst r3, #32768 + bne .L2155 + ldr ip, [sp, #4] + ldr r4, [sp, #4] + ldr r3, [sp, #4] + ldr lr, [sp, #4] + ubfx ip, ip, #3, #5 + ubfx r4, r4, #27, #1 + ubfx r3, r3, #16, #5 + orr ip, ip, r4, lsl #5 + ubfx lr, lr, #29, #1 + orr r3, r3, lr, lsl #5 + cmp ip, r3 + ldr r3, [sp, #4] + ldrhi ip, [sp, #4] + ldrls ip, [sp, #4] + ubfxhi r3, r3, #3, #5 + ubfxls r3, r3, #16, #5 + ubfxhi ip, ip, #27, #1 + ubfxls ip, ip, #29, #1 + orr r3, r3, ip, lsl #5 + cmp r0, r3 + movcc r0, r3 +.L2146: + add r2, r2, #1 + b .L2145 +.L2155: + mvn r0, #0 + b .L2146 +.L2141: + cmn r0, #1 + beq .L2132 + ldr r3, [r5] + cmn r3, #1 + bne .L2132 + ldr r3, [r5, #4] + cmn r3, #1 + bne .L2132 + ldr r3, [r6] + cmn r3, #1 + moveq r0, #512 + b .L2132 +.L2171: + .align 2 +.L2170: + .word .LANCHOR0 + .word .LC148 + .word .LANCHOR3 + .word .LC149 + .word .LC150 + .fnend + .size nandc_xfer, .-nandc_xfer + .align 2 + .global flash_read_page + .syntax unified + .arm + .fpu softvfp + .type flash_read_page, %function +flash_read_page: + .fnstart + @ args = 4, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r6, r0 + ldr r7, .L2188 + .pad #20 + sub sp, sp, #20 + ubfx r9, r1, #24, #2 + mov r8, r3 + str r2, [sp, #12] + lsl r10, r6, #8 + ldrb r4, [r7, #1153] @ zero_extendqisi2 + ldr r5, [r7, #1044] + rsb r0, r4, #24 + mvn r4, #0 + bic r4, r1, r4, lsl r0 + bl nandc_wait_flash_ready + mov r0, r6 + bl nandc_cs + cmp r9, #0 + bne .L2173 + mov r0, r6 + bl zftl_flash_enter_slc_mode +.L2174: + ldr r2, [r7, #1104] + ldrb r1, [r2, #7] @ zero_extendqisi2 + cmp r1, #1 + bne .L2176 + ldrb r1, [r2, #12] @ zero_extendqisi2 + cmp r1, #2 + addeq r1, r5, r10 + moveq r0, #38 + streq r0, [r1, #2056] +.L2176: + add fp, r5, r10 + mov r1, #0 + str r1, [fp, #2056] + mov r0, #48 + str r1, [fp, #2052] + str r1, [fp, #2052] + uxtb r1, r4 + str r1, [fp, #2052] + lsr r1, r4, #8 + str r1, [fp, #2052] + lsr r1, r4, #16 + str r1, [fp, #2052] + ldrb r1, [r7, #1152] @ zero_extendqisi2 + cmp r1, #0 + lsrne r1, r4, #24 + strne r1, [fp, #2052] + add r1, r5, r10 + str r0, [r1, #2056] + cmp r9, #0 + ldrb r2, [r2, #12] @ zero_extendqisi2 + sub r2, r2, #3 + clz r2, r2 + lsr r2, r2, #5 + moveq r2, #0 + cmp r2, #0 + beq .L2178 + ldrb r2, [r7, #1158] @ zero_extendqisi2 + cmp r2, #0 + bne .L2178 + ldrb r3, [r7, #1159] @ zero_extendqisi2 + cmp r3, #0 + addeq r4, r4, r4, lsl #1 + subeq r0, r4, #1 + addeq r0, r0, r9 + beq .L2187 +.L2178: + mov r0, r4 +.L2187: + bl nandc_set_seed + bl nandc_wait_flash_ready + add r3, r5, r10 + mov r2, #5 + str r2, [r3, #2056] + mov r1, #0 + mov r2, #224 + str r1, [fp, #2052] + mov r0, r6 + str r1, [fp, #2052] + str r2, [r3, #2056] + ldr r3, [sp, #12] + ldrb r2, [sp, #56] @ zero_extendqisi2 + str r8, [sp] + bl nandc_xfer + bl nandc_de_cs.constprop.35 + add sp, sp, #20 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2173: + ldr r2, [r7, #1104] + ldrb r2, [r2, #12] @ zero_extendqisi2 + cmp r2, #3 + bne .L2175 + ldrb r2, [r7, #1158] @ zero_extendqisi2 + cmp r2, #0 + bne .L2175 + ldrb r2, [r7, #1159] @ zero_extendqisi2 + cmp r2, #0 + addeq r2, r5, r10 + streq r9, [r2, #2056] + beq .L2174 +.L2175: + mov r0, r6 + bl zftl_flash_exit_slc_mode + b .L2174 +.L2189: + .align 2 +.L2188: + .word .LANCHOR0 + .fnend + .size flash_read_page, .-flash_read_page + .align 2 + .global micron_read_retrial + .syntax unified + .arm + .fpu softvfp + .type micron_read_retrial, %function +micron_read_retrial: + .fnstart + @ args = 4, pretend = 0, frame = 16 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #28 + sub sp, sp, #28 + ldr r4, .L2219 + mov r6, r0 + mov r10, r1 + mov r9, #0 + str r3, [sp, #16] + ldrb r3, [r4, #1193] @ zero_extendqisi2 + str r2, [sp, #12] + add r3, r3, r3, lsl #1 + asr r3, r3, #2 + str r3, [sp, #8] + bl nandc_wait_flash_ready + ldr r5, [r4, #1044] + add r5, r5, r6, lsl #8 +.L2191: + ldr fp, .L2219+4 + mov r0, r6 + mov r7, #0 + mvn r4, #0 + bl zftl_flash_enter_slc_mode + mov r0, r6 + bl zftl_flash_exit_slc_mode +.L2192: + ldrb r3, [fp, #-108] @ zero_extendqisi2 + cmp r7, r3 + bcc .L2197 +.L2196: + mov r3, #239 + mov r0, #200 + str r3, [r5, #2056] + mov r3, #137 + str r3, [r5, #2052] + bl ndelay + mov r3, #0 + str r3, [r5, #2048] + str r3, [r5, #2048] + str r3, [r5, #2048] + str r3, [r5, #2048] + ldr r3, [sp, #8] + cmp r4, r3 + bcc .L2198 + cmn r4, #1 + movne r4, #256 +.L2198: + cmn r4, #1 + movne r8, #0 + moveq r8, #1 + cmp r4, #256 + movne r1, r8 + orreq r1, r8, #1 + cmp r1, #0 + beq .L2199 + mov r1, r6 + str r4, [sp] + mov r3, r7 + mov r2, r10 + ldr r0, .L2219+8 + bl rk_printk + eor r1, r9, #1 + ands r1, r8, r1 + beq .L2200 + mov r1, #3 + mov r0, r6 + bl mt_auto_read_calibration_config + mov r9, #1 + b .L2191 +.L2197: + mov r3, #239 + mov r0, #200 + str r3, [r5, #2056] + mov r3, #137 + str r3, [r5, #2052] + bl ndelay + add r3, r7, #1 + ldr r2, [sp, #12] + str r3, [r5, #2048] + mov r1, r10 + str r3, [sp, #20] + mov r3, #0 + str r3, [r5, #2048] + mov r0, r6 + str r3, [r5, #2048] + str r3, [r5, #2048] + ldr r3, [sp, #64] + str r3, [sp] + ldr r3, [sp, #16] + bl flash_read_page + ldr r3, .L2219+12 + mov r8, r0 + ldr r3, [r3] + tst r3, #4096 + beq .L2193 + str r0, [sp] + mov r3, r4 + mov r2, r10 + mov r1, r7 + ldr r0, .L2219+16 + bl rk_printk +.L2193: + cmn r8, #1 + beq .L2194 + ldr r3, [fp, #-120] + cmn r4, #1 + moveq r4, r8 + str r3, [sp, #12] + ldr r3, [fp, #-112] + str r3, [sp, #16] + ldr r3, [sp, #8] + cmp r8, r3 + bcc .L2203 +.L2194: + ldr r7, [sp, #20] + b .L2192 +.L2203: + mov r4, r8 + b .L2196 +.L2200: + cmp r9, #0 + beq .L2201 + mov r0, r6 + bl mt_auto_read_calibration_config + cmn r4, #1 + movne r4, #256 +.L2201: + bl nandc_wait_flash_ready + mov r0, r4 + add sp, sp, #28 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2199: + cmp r9, #0 + beq .L2201 + mov r0, r6 + mov r4, #256 + bl mt_auto_read_calibration_config + b .L2201 +.L2220: + .align 2 +.L2219: + .word .LANCHOR0 + .word .LANCHOR3 + .word .LC152 + .word .LANCHOR2 + .word .LC151 + .fnend + .size micron_read_retrial, .-micron_read_retrial + .align 2 + .global toshiba_3d_read_retrial + .syntax unified + .arm + .fpu softvfp + .type toshiba_3d_read_retrial, %function +toshiba_3d_read_retrial: + .fnstart + @ args = 4, pretend = 0, frame = 24 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #36 + sub sp, sp, #36 + ldr r7, .L2269 + mov r8, r0 + ubfx r4, r1, #24, #2 + mov r9, r1 + str r3, [sp, #20] + add r6, r8, #8 + str r2, [sp, #16] + mov r5, #1 + bl nandc_wait_flash_ready + ldr r3, [r7, #1044] + str r3, [sp, #12] + add r6, r3, r6, lsl #8 + ldrb r3, [r7, #1100] @ zero_extendqisi2 + cmp r3, #36 + movne r3, #56 + moveq r3, #46 + str r3, [sp, #28] + movne r3, #10 + moveq r3, #26 + cmp r4, #0 + str r3, [sp, #24] + mvn r4, #0 + ldr r3, [sp, #12] + add fp, r3, r8, lsl #8 + bne .L2239 +.L2230: + ldr r3, .L2269 + ldrb r3, [r3, #1100] @ zero_extendqisi2 + cmp r3, #36 + bne .L2224 + mov r2, #0 + mov r1, r5 + mov r0, r6 + bl toshiba_tlc_set_rr_para + mov r3, #93 + str r3, [fp, #2056] +.L2225: + ldr r3, [sp, #72] + mov r1, r9 + ldr r2, [sp, #16] + mov r0, r8 + str r3, [sp] + ldr r3, [sp, #20] + bl flash_read_page + ldr r3, .L2269+4 + mov r10, r0 + ldr r3, [r3] + tst r3, #16 + beq .L2226 + mov r3, r0 + mov r2, r9 + mov r1, r5 + ldr r0, .L2269+8 + bl rk_printk +.L2226: + cmn r10, #1 + beq .L2227 + ldr r3, .L2269+12 + cmn r4, #1 + moveq r4, r10 + ldr r2, [r3, #-120] + ldr r3, [r3, #-112] + str r2, [sp, #16] + str r3, [sp, #20] + ldrb r3, [r7, #1193] @ zero_extendqisi2 + add r3, r3, r3, lsl #1 + cmp r10, r3, asr #2 + bcc .L2245 +.L2227: + ldr r3, [sp, #24] + add r5, r5, #1 + cmp r3, r5 + bne .L2230 +.L2229: + ldr r3, .L2269 + ldrb r3, [r3, #1100] @ zero_extendqisi2 + cmp r3, #36 + moveq r2, #0 + beq .L2268 + mov r1, #0 + mov r0, r6 + bl toshiba_3d_set_slc_rr_para +.L2232: + ldr r3, .L2269 + ldrb r3, [r3, #1100] @ zero_extendqisi2 + cmp r3, #36 + bne .L2241 + ldr r3, [sp, #12] + mov r2, #85 + add r3, r3, r8, lsl #8 + str r2, [r3, #2056] + mov r2, #0 + str r2, [r3, #2052] + str r2, [r3, #2048] + mov r2, #255 + str r2, [r3, #2056] +.L2241: + ldrb r3, [r7, #1193] @ zero_extendqisi2 + add r3, r3, r3, lsl #1 + cmp r4, r3, asr #2 + bcc .L2242 + cmn r4, #1 + movne r4, #256 +.L2242: + cmn r4, #1 + cmpne r4, #256 + bne .L2243 + str r4, [sp] + mov r3, r5 + mov r2, r9 + mov r1, r8 + ldr r0, .L2269+16 + bl rk_printk +.L2243: + bl nandc_wait_flash_ready + mov r0, r4 + add sp, sp, #36 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2224: + uxtb r1, r5 + mov r0, r6 + bl toshiba_3d_set_slc_rr_para + b .L2225 +.L2245: + mov r4, r10 + b .L2229 +.L2239: + ldr r3, .L2269 + ldrb r3, [r3, #1100] @ zero_extendqisi2 + cmp r3, #36 + bne .L2233 + mov r2, #1 + mov r1, r5 + mov r0, r6 + bl toshiba_tlc_set_rr_para + mov r3, #93 +.L2267: + str r3, [fp, #2056] + mov r1, r9 + ldr r3, [sp, #72] + mov r0, r8 + ldr r2, [sp, #16] + str r3, [sp] + ldr r3, [sp, #20] + bl flash_read_page + ldr r3, .L2269+4 + mov r10, r0 + ldr r3, [r3] + tst r3, #16 + beq .L2235 + mov r3, r0 + mov r2, r9 + mov r1, r5 + ldr r0, .L2269+20 + bl rk_printk +.L2235: + cmn r10, #1 + beq .L2236 + ldr r3, .L2269+12 + cmn r4, #1 + moveq r4, r10 + ldr r2, [r3, #-120] + ldr r3, [r3, #-112] + str r2, [sp, #16] + str r3, [sp, #20] + ldrb r3, [r7, #1193] @ zero_extendqisi2 + add r3, r3, r3, lsl #1 + cmp r10, r3, asr #2 + bcc .L2246 +.L2236: + ldr r3, [sp, #28] + add r5, r5, #1 + cmp r3, r5 + bne .L2239 +.L2238: + ldr r3, .L2269 + ldrb r3, [r3, #1100] @ zero_extendqisi2 + cmp r3, #36 + bne .L2240 + mov r2, #1 +.L2268: + mov r1, #0 + mov r0, r6 + bl toshiba_tlc_set_rr_para + b .L2232 +.L2233: + uxtb r1, r5 + mov r0, r6 + bl toshiba_3d_set_tlc_rr_para + mov r3, #38 + b .L2267 +.L2246: + mov r4, r10 + b .L2238 +.L2240: + mov r1, #0 + mov r0, r6 + bl toshiba_3d_set_tlc_rr_para + b .L2232 +.L2270: + .align 2 +.L2269: + .word .LANCHOR0 + .word .LANCHOR2 + .word .LC153 + .word .LANCHOR3 + .word .LC155 + .word .LC154 + .fnend + .size toshiba_3d_read_retrial, .-toshiba_3d_read_retrial + .align 2 + .global toshiba_read_retrial + .syntax unified + .arm + .fpu softvfp + .type toshiba_read_retrial, %function +toshiba_read_retrial: + .fnstart + @ args = 4, pretend = 0, frame = 24 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r6, r0 + .pad #36 + sub sp, sp, #36 + ldr r5, .L2303 + add r9, r6, #8 + str r3, [sp, #20] + str r1, [sp, #12] + str r2, [sp, #16] + bl nandc_wait_flash_ready + mov r0, r6 + bl zftl_flash_enter_slc_mode + mov r0, r6 + bl zftl_flash_exit_slc_mode + ldrb r3, [r5, #1100] @ zero_extendqisi2 + ldr r7, [r5, #1044] + sub r3, r3, #67 + cmp r3, #1 + lsl r3, r6, #8 + add r9, r7, r9, lsl #8 + str r3, [sp, #24] + movls r3, #0 + strls r3, [sp, #8] + bls .L2272 + ldrb r3, [r5, #1143] @ zero_extendqisi2 + cmp r3, #0 + beq .L2290 + mov r0, #1 + bl nandc_set_if_mode + mov r3, #1 +.L2290: + str r3, [sp, #8] + lsl r3, r6, #8 + mov r2, #92 + add r3, r7, r3 + str r2, [r3, #2056] + mov r2, #197 + str r2, [r3, #2056] +.L2272: + ldr fp, .L2303+4 + lsl r3, r6, #8 + mov r8, #1 + mvn r10, #0 + str r3, [sp, #28] +.L2274: + ldrb r3, [fp, #-108] @ zero_extendqisi2 + add r3, r3, #1 + cmp r8, r3 + bcc .L2283 + mov r4, r10 +.L2282: + ldrb r3, [r5, #1100] @ zero_extendqisi2 + mov r1, #0 + mov r0, r9 + sub r3, r3, #67 + cmp r3, #1 + bhi .L2284 + bl sandisk_set_rr_para +.L2285: + add r6, r7, r6, lsl #8 + mov r3, #255 + str r3, [r6, #2056] + ldrb r3, [r5, #1193] @ zero_extendqisi2 + add r3, r3, r3, lsl #1 + cmp r4, r3, asr #2 + bcc .L2286 + cmn r4, #1 + movne r4, #256 +.L2286: + cmn r4, #1 + cmpne r4, #256 + bne .L2287 + str r4, [sp] + mov r3, r8 + ldr r2, [sp, #12] + mov r1, r8 + ldr r0, .L2303+8 + bl rk_printk +.L2287: + bl nandc_wait_flash_ready + ldr r3, [sp, #8] + cmp r3, #0 + beq .L2271 + mov r0, #4 + bl nandc_set_if_mode +.L2271: + mov r0, r4 + add sp, sp, #36 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2283: + ldrb r3, [r5, #1100] @ zero_extendqisi2 + mov r0, r9 + uxtb r1, r8 + sub r3, r3, #67 + cmp r3, #1 + bhi .L2275 + bl sandisk_set_rr_para +.L2276: + ldrb r3, [r5, #1100] @ zero_extendqisi2 + cmp r3, #34 + bne .L2277 + ldr r3, .L2303+4 + ldrb r3, [r3, #-108] @ zero_extendqisi2 + sub r3, r3, #3 + cmp r8, r3 + ldreq r3, [sp, #28] + moveq r2, #179 + addeq r3, r7, r3 + streq r2, [r3, #2056] +.L2277: + ldr r3, [sp, #24] + mov r2, #38 + add r1, sp, #12 + mov r0, r6 + add r3, r7, r3 + str r2, [r3, #2056] + mov r2, #93 + str r2, [r3, #2056] + ldr r3, [sp, #72] + str r3, [sp] + ldm r1, {r1, r2, r3} + bl flash_read_page + cmn r0, #1 + mov r4, r0 + beq .L2280 + ldr r3, [fp, #-120] + cmn r10, #1 + moveq r10, r0 + str r3, [sp, #16] + ldr r3, [fp, #-112] + str r3, [sp, #20] + ldrb r3, [r5, #1193] @ zero_extendqisi2 + add r3, r3, r3, lsl #1 + cmp r0, r3, asr #2 + bcc .L2282 +.L2280: + add r8, r8, #1 + b .L2274 +.L2275: + bl toshiba_set_rr_para + b .L2276 +.L2284: + bl toshiba_set_rr_para + b .L2285 +.L2304: + .align 2 +.L2303: + .word .LANCHOR0 + .word .LANCHOR3 + .word .LC155 + .fnend + .size toshiba_read_retrial, .-toshiba_read_retrial + .align 2 + .global ymtc_3d_read_retrial + .syntax unified + .arm + .fpu softvfp + .type ymtc_3d_read_retrial, %function +ymtc_3d_read_retrial: + .fnstart + @ args = 4, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r7, r0 + .pad #20 + sub sp, sp, #20 + mov r8, r1 + mov r9, r2 + mov r10, r3 + bl nandc_wait_flash_ready + mov r0, r7 + mvn r4, #0 + bl zftl_flash_enter_slc_mode + mov r0, r7 + mov r5, #1 + bl zftl_flash_exit_slc_mode + ldr r3, .L2334 + tst r8, #50331648 + add r2, r7, #8 + ldr fp, .L2334+4 + ldr r6, [r3, #1044] + str r3, [sp, #12] + add r6, r6, r2, lsl #8 + bne .L2315 +.L2310: + uxtb r1, r5 + mov r0, r6 + bl ymtc_3d_set_slc_rr_para + ldr r3, [sp, #56] + mov r2, r9 + mov r1, r8 + mov r0, r7 + str r3, [sp] + mov r3, r10 + bl flash_read_page + cmn r0, #1 + beq .L2307 + ldr r3, [sp, #12] + cmn r4, #1 + moveq r4, r0 + ldr r9, [fp, #-120] + ldr r10, [fp, #-112] + ldrb r3, [r3, #1193] @ zero_extendqisi2 + add r3, r3, r3, lsl #1 + cmp r0, r3, asr #2 + bcc .L2318 +.L2307: + add r5, r5, #1 + cmp r5, #10 + bne .L2310 +.L2309: + mov r1, #0 + mov r0, r6 + bl ymtc_3d_set_slc_rr_para +.L2311: + ldr r3, [sp, #12] + ldrb r3, [r3, #1193] @ zero_extendqisi2 + add r3, r3, r3, lsl #1 + cmp r4, r3, asr #2 + bcc .L2316 + cmn r4, #1 + movne r4, #256 +.L2316: + cmn r4, #1 + cmpne r4, #256 + bne .L2317 + str r4, [sp] + mov r3, r5 + mov r2, r8 + mov r1, r5 + ldr r0, .L2334+8 + bl rk_printk +.L2317: + bl nandc_wait_flash_ready + mov r0, r4 + add sp, sp, #20 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2318: + mov r4, r0 + b .L2309 +.L2315: + uxtb r1, r5 + mov r0, r6 + bl ymtc_3d_set_tlc_rr_para + ldr r3, [sp, #56] + mov r2, r9 + mov r1, r8 + mov r0, r7 + str r3, [sp] + mov r3, r10 + bl flash_read_page + cmn r0, #1 + beq .L2312 + ldr r3, [sp, #12] + cmn r4, #1 + moveq r4, r0 + ldr r9, [fp, #-120] + ldr r10, [fp, #-112] + ldrb r3, [r3, #1193] @ zero_extendqisi2 + add r3, r3, r3, lsl #1 + cmp r0, r3, asr #2 + bcc .L2319 +.L2312: + add r5, r5, #1 + cmp r5, #51 + bne .L2315 +.L2314: + mov r1, #0 + mov r0, r6 + bl ymtc_3d_set_tlc_rr_para + b .L2311 +.L2319: + mov r4, r0 + b .L2314 +.L2335: + .align 2 +.L2334: + .word .LANCHOR0 + .word .LANCHOR3 + .word .LC156 + .fnend + .size ymtc_3d_read_retrial, .-ymtc_3d_read_retrial + .align 2 + .global samsung_read_retrial + .syntax unified + .arm + .fpu softvfp + .type samsung_read_retrial, %function +samsung_read_retrial: + .fnstart + @ args = 4, pretend = 0, frame = 16 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r9, r0 + .pad #28 + sub sp, sp, #28 + mov r7, r1 + mov fp, r3 + str r2, [sp, #16] + bl nandc_wait_flash_ready + mov r0, r9 + bl zftl_flash_enter_slc_mode + mov r0, r9 + bl zftl_flash_exit_slc_mode + ldr r3, .L2374 + tst r7, #50331648 + ldr r2, [r3, #1044] + str r3, [sp, #20] + str r2, [sp, #12] + bne .L2337 + lsl r10, r9, #8 + mvn r4, #0 + mov r5, #1 + add r6, r2, r10 +.L2342: + mov r3, #239 + str r3, [r6, #2056] + mov r3, #141 + str r3, [r6, #2052] + ldr r3, .L2374+4 + ldrsb r3, [r5, r3] + str r3, [r6, #2048] + mov r3, #0 + str r3, [r6, #2048] + str r3, [r6, #2048] + str r3, [r6, #2048] + bl nandc_wait_flash_ready + ldr r3, [sp, #64] + mov r1, r7 + ldr r2, [sp, #16] + mov r0, r9 + str r3, [sp] + mov r3, fp + bl flash_read_page + ldr r3, .L2374+8 + mov r8, r0 + ldr r3, [r3] + tst r3, #16 + beq .L2338 + mov r3, r0 + mov r2, r7 + mov r1, r5 + ldr r0, .L2374+12 + bl rk_printk +.L2338: + cmn r8, #1 + beq .L2339 + ldr r3, .L2374+16 + cmn r4, #1 + moveq r4, r8 + ldr r2, [r3, #-120] + ldr fp, [r3, #-112] + ldr r3, [sp, #20] + str r2, [sp, #16] + ldrb r3, [r3, #1193] @ zero_extendqisi2 + add r3, r3, r3, lsl #1 + cmp r8, r3, asr #2 + bcc .L2351 +.L2339: + add r5, r5, #1 + cmp r5, #26 + bne .L2342 +.L2341: + ldr r3, [sp, #12] + add r10, r3, r10 + mov r3, #239 + str r3, [r10, #2056] + mov r3, #141 +.L2373: + str r3, [r6, #2052] + mov r3, #0 + str r3, [r6, #2048] + str r3, [r6, #2048] + str r3, [r6, #2048] + str r3, [r6, #2048] + bl nandc_wait_flash_ready + ldr r3, .L2374 + ldrb r3, [r3, #1193] @ zero_extendqisi2 + add r3, r3, r3, lsl #1 + cmp r4, r3, asr #2 + bcc .L2349 + cmn r4, #1 + movne r4, #256 +.L2349: + cmn r4, #1 + cmpne r4, #256 + bne .L2350 + str r4, [sp] + mov r3, r5 + mov r2, r7 + mov r1, r5 + ldr r0, .L2374+20 + bl rk_printk +.L2350: + bl nandc_wait_flash_ready + mov r0, r4 + add sp, sp, #28 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2351: + mov r4, r8 + b .L2341 +.L2337: + lsl r3, r9, #8 + lsl r2, r9, #8 + ldr r8, .L2374+24 + str r3, [sp, #20] + mvn r4, #0 + ldr r3, [sp, #12] + mov r5, #1 + add r6, r3, r2 +.L2348: + mov r3, #239 + str r3, [r6, #2056] + mov r3, #137 + str r3, [r6, #2052] + ldrb r3, [r8, #4] @ zero_extendqisi2 + str r3, [r6, #2048] + ldrb r3, [r8, #5] @ zero_extendqisi2 + str r3, [r6, #2048] + ldrb r3, [r8, #6] @ zero_extendqisi2 + str r3, [r6, #2048] + ldrb r3, [r8, #7] @ zero_extendqisi2 + str r3, [r6, #2048] + bl nandc_wait_flash_ready + ldr r3, [sp, #64] + mov r1, r7 + ldr r2, [sp, #16] + mov r0, r9 + str r3, [sp] + mov r3, fp + bl flash_read_page + ldr r3, .L2374+8 + mov r10, r0 + ldr r3, [r3] + tst r3, #16 + beq .L2344 + mov r3, r0 + mov r2, r7 + mov r1, r5 + ldr r0, .L2374+28 + bl rk_printk +.L2344: + cmn r10, #1 + beq .L2345 + ldr r3, .L2374+16 + cmn r4, #1 + moveq r4, r10 + ldr r2, [r3, #-120] + ldr fp, [r3, #-112] + ldr r3, .L2374 + str r2, [sp, #16] + ldrb r3, [r3, #1193] @ zero_extendqisi2 + add r3, r3, r3, lsl #1 + cmp r10, r3, asr #2 + bcc .L2352 +.L2345: + add r5, r5, #1 + add r8, r8, #4 + cmp r5, #26 + bne .L2348 +.L2347: + ldr r3, [sp, #12] + ldr r2, [sp, #20] + add r10, r3, r2 + mov r3, #239 + str r3, [r10, #2056] + mov r3, #137 + b .L2373 +.L2352: + mov r4, r10 + b .L2347 +.L2375: + .align 2 +.L2374: + .word .LANCHOR0 + .word .LANCHOR1+1752 + .word .LANCHOR2 + .word .LC157 + .word .LANCHOR3 + .word .LC159 + .word .LANCHOR1+1778 + .word .LC158 + .fnend + .size samsung_read_retrial, .-samsung_read_retrial + .align 2 + .global hynix_read_retrial + .syntax unified + .arm + .fpu softvfp + .type hynix_read_retrial, %function +hynix_read_retrial: + .fnstart + @ args = 4, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r10, r3 + ldr fp, .L2395 + mov r9, r2 + .pad #20 + sub sp, sp, #20 + mov r6, r0 + mov r8, r1 + mov r7, #0 + ldr r3, [fp, #1040] + mvn r4, #0 + add r2, r3, r0 + ldrb r3, [r3, #114] @ zero_extendqisi2 + str r2, [sp, #12] + ldrb r5, [r2, #120] @ zero_extendqisi2 + str r3, [sp, #8] + bl nandc_wait_flash_ready + mov r0, r6 + bl zftl_flash_enter_slc_mode + mov r0, r6 + bl zftl_flash_exit_slc_mode +.L2377: + ldr r3, [sp, #8] + cmp r7, r3 + bcc .L2382 +.L2381: + ldr r3, [sp, #12] + strb r5, [r3, #120] + ldrb r3, [fp, #1193] @ zero_extendqisi2 + add r3, r3, r3, lsl #1 + cmp r4, r3, asr #2 + bcc .L2383 + cmn r4, #1 + movne r4, #256 +.L2383: + cmn r4, #1 + cmpne r4, #256 + bne .L2384 + str r4, [sp] + mov r3, r7 + mov r2, r8 + mov r1, r7 + ldr r0, .L2395+4 + bl rk_printk +.L2384: + bl nandc_wait_flash_ready + mov r0, r4 + add sp, sp, #20 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2382: + ldr r3, [sp, #8] + add r5, r5, #1 + uxtb r5, r5 + mov r0, r6 + cmp r3, r5 + movls r5, #0 + mov r1, r5 + bl hynix_set_rr_para + ldr r3, [sp, #56] + mov r2, r9 + mov r1, r8 + mov r0, r6 + str r3, [sp] + mov r3, r10 + bl flash_read_page + cmn r0, #1 + beq .L2379 + ldr r3, .L2395+8 + cmn r4, #1 + moveq r4, r0 + ldr r9, [r3, #-120] + ldr r10, [r3, #-112] + ldrb r3, [fp, #1193] @ zero_extendqisi2 + add r3, r3, r3, lsl #1 + cmp r0, r3, asr #2 + bcc .L2385 +.L2379: + add r7, r7, #1 + b .L2377 +.L2385: + mov r4, r0 + b .L2381 +.L2396: + .align 2 +.L2395: + .word .LANCHOR0 + .word .LC160 + .word .LANCHOR3 + .fnend + .size hynix_read_retrial, .-hynix_read_retrial + .align 2 + .global flash_ddr_tuning_read + .syntax unified + .arm + .fpu softvfp + .type flash_ddr_tuning_read, %function +flash_ddr_tuning_read: + .fnstart + @ args = 4, pretend = 0, frame = 24 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r4, #0 + mov r5, r4 + mov r6, #1024 + mov r7, #6 + mvn r10, #0 + .pad #36 + sub sp, sp, #36 + mov r8, r0 + mov fp, r1 + str r2, [sp, #16] + str r3, [sp, #20] + bl nandc_get_ddr_para + str r0, [sp, #28] + str r4, [sp, #24] + str r4, [sp, #12] +.L2403: + uxtb r0, r7 + bl nandc_set_ddr_para + ldr r3, [sp, #72] + mov r1, fp + ldr r2, [sp, #16] + mov r0, r8 + str r3, [sp] + ldr r3, [sp, #20] + bl flash_read_page + ldr r3, .L2424 + mov r9, r0 + ldr r3, [r3] + tst r3, #16 + beq .L2398 + mov r3, r0 + mov r2, fp + mov r1, r7 + ldr r0, .L2424+4 + bl rk_printk +.L2398: + add r3, r6, #1 + cmp r9, r3 + bhi .L2399 + ldr r3, .L2424+8 + ldr r3, [r3, #-120] + str r3, [sp, #16] + ldr r3, .L2424+8 + ldr r3, [r3, #-112] + str r3, [sp, #20] + ldr r3, .L2424+12 + ldrb r3, [r3, #1193] @ zero_extendqisi2 + cmp r9, r3, lsr #2 + bcs .L2409 + add r5, r5, #1 + cmp r5, #7 + bls .L2409 + sub r4, r7, r5 + mov r6, r9 + mov r10, #0 +.L2401: + ldr r2, [sp, #12] + ldr r3, [sp, #24] + cmp r5, r2 + movcc r4, r3 +.L2402: + cmp r4, #0 + beq .L2404 + ldr r3, .L2424+12 + ldrb r2, [r3, #1193] @ zero_extendqisi2 + ldr r3, .L2424+16 + umull r2, r3, r2, r3 + ubfx r3, r3, #1, #8 + cmp r3, r6 + bls .L2404 + mov r1, r4 + ldr r0, .L2424+20 + bl rk_printk + uxtb r0, r4 +.L2423: + bl nandc_set_ddr_para + cmn r10, #1 + bne .L2397 + ldr r4, .L2424+12 + ldrb r3, [r4, #1192] @ zero_extendqisi2 + mov r5, r4 + tst r3, #1 + beq .L2397 + mov r1, r8 + mov r2, fp + ldr r0, .L2424+24 + bl rk_printk + mov r0, r8 + bl flash_reset + mov r0, #1 + bl flash_set_interface_mode + mov r0, #1 + bl nandc_set_if_mode + add r3, r4, r8 + mov r2, #2 + mov r0, r8 + strb r2, [r3, #1154] + bl zftl_flash_enter_slc_mode + ldr r3, [sp, #72] + mov r1, fp + ldr r2, [sp, #16] + mov r0, r8 + str r3, [sp] + ldr r3, [sp, #20] + bl flash_read_page + mov r2, fp + mov r3, r0 + mov r6, r0 + mov r1, r8 + ldr r0, .L2424+28 + bl rk_printk + ldrb r3, [r4, #1193] @ zero_extendqisi2 + cmp r6, r3 + bhi .L2411 + ldr r2, .L2424+8 + ldr r3, [r2, #-104] + add r3, r3, #1 + cmp r3, #100 + str r3, [r2, #-104] + movhi r3, #0 + strbhi r3, [r4, #1143] + bhi .L2397 +.L2407: + ldrb r0, [r5, #1192] @ zero_extendqisi2 + bl flash_set_interface_mode + ldrb r0, [r5, #1192] @ zero_extendqisi2 + bl nandc_set_if_mode +.L2397: + mov r0, r6 + add sp, sp, #36 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2399: + ldr r3, [sp, #12] + cmp r5, r3 + bls .L2410 + cmp r5, #7 + sub r3, r4, r5 + str r3, [sp, #24] + bhi .L2402 + str r5, [sp, #12] +.L2410: + mov r5, #0 + b .L2400 +.L2409: + mov r4, r7 + mov r6, r9 + mov r10, #0 +.L2400: + add r7, r7, #2 + cmp r7, #50 + bne .L2403 + b .L2401 +.L2404: + ldrb r0, [sp, #28] @ zero_extendqisi2 + b .L2423 +.L2411: + mov r6, r10 + b .L2407 +.L2425: + .align 2 +.L2424: + .word .LANCHOR2 + .word .LC161 + .word .LANCHOR3 + .word .LANCHOR0 + .word -1431655765 + .word .LC162 + .word .LC163 + .word .LC164 + .fnend + .size flash_ddr_tuning_read, .-flash_ddr_tuning_read + .align 2 + .global flash_read_page_en + .syntax unified + .arm + .fpu softvfp + .type flash_read_page_en, %function +flash_read_page_en: + .fnstart + @ args = 4, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #12 + mov r8, r3 + ldr r5, .L2454 + mov r10, r0 + mov r4, r1 + mov r7, r2 + ldr r9, [sp, #48] + ldrb r3, [r5, #1109] @ zero_extendqisi2 + cmp r3, r0 + bhi .L2427 + movw r2, #431 + ldr r1, .L2454+4 + ldr r0, .L2454+8 + bl rk_printk + bl dump_stack +.L2427: + add r3, r5, r10 + ldrb r6, [r3, #1144] @ zero_extendqisi2 + ldrb r3, [r5, #1109] @ zero_extendqisi2 + cmp r10, r3 + bcc .L2428 + ldr r2, .L2454+12 + ldr r2, [r2] + tst r2, #64 + bne .L2429 +.L2453: + mvn r0, #0 +.L2426: + add sp, sp, #12 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2429: + str r3, [sp] + mov r2, r10 + mov r3, r4 + mov r1, r6 + ldr r0, .L2454+16 + bl rk_printk + b .L2453 +.L2428: + tst r4, #50331648 + bne .L2431 + ldrb r3, [r5] @ zero_extendqisi2 + cmp r3, #0 + beq .L2432 + ldrb r3, [r5, #1] @ zero_extendqisi2 + cmp r3, #0 + beq .L2431 +.L2432: + ldrh r10, [r5, #2] + mov r0, r4 + mov r1, r10 + bl __aeabi_uidiv + mov r1, r10 + mul fp, r10, r0 + mov r0, r4 + bl __aeabi_uidivmod + ldrb r3, [r5, #1] @ zero_extendqisi2 + lsl r1, r1, #1 + cmp r3, #0 + addeq r1, r5, r1 + addne r4, r1, fp + ldrheq r4, [r1, #4] + addeq r4, r4, fp +.L2431: + str r9, [sp] + mov r3, r8 + mov r2, r7 + mov r1, r4 + mov r0, r6 + bl flash_read_page + cmn r0, #1 + bne .L2426 + ldrb r10, [r5, #1196] @ zero_extendqisi2 + cmp r10, #0 + bne .L2434 +.L2437: + ldr r3, .L2454+20 + ldr r10, [r3, #-100] + cmp r10, #0 + bne .L2435 +.L2436: + ldrb r3, [r5, #1196] @ zero_extendqisi2 + mov r2, r4 + mov r1, #0 + ldr r0, .L2454+24 + str r3, [sp] + mvn r3, #0 + bl rk_printk + ldrb r3, [r5, #1143] @ zero_extendqisi2 + cmp r3, #0 + beq .L2453 + str r9, [sp, #48] + mov r3, r8 + mov r2, r7 + mov r1, r4 + mov r0, r6 + add sp, sp, #12 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, lr} + b flash_ddr_tuning_read +.L2434: + mov r3, #0 + str r9, [sp] + strb r3, [r5, #1196] + mov r2, r7 + mov r3, r8 + mov r1, r4 + mov r0, r6 + bl flash_read_page + cmn r0, #1 + strb r10, [r5, #1196] + beq .L2437 + b .L2426 +.L2435: + str r9, [sp] + mov r3, r8 + mov r2, r7 + mov r1, r4 + mov r0, r6 + blx r10 + cmn r0, #1 + bne .L2426 + b .L2436 +.L2455: + .align 2 +.L2454: + .word .LANCHOR0 + .word .LANCHOR1+1882 + .word .LC0 + .word .LANCHOR2 + .word .LC165 + .word .LANCHOR3 + .word .LC166 + .fnend + .size flash_read_page_en, .-flash_read_page_en + .align 2 + .global flash_get_last_written_page + .syntax unified + .arm + .fpu softvfp + .type flash_get_last_written_page, %function +flash_get_last_written_page: + .fnstart + @ args = 4, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r8, r1 + ldr r5, .L2467 + .pad #20 + sub sp, sp, #20 + mov r10, r0 + mov fp, r2 + ldr r1, .L2467+4 + mov r9, r3 + ldrh r6, [r5, #30] + ldrh r4, [r1, #-224] + ldr r1, [sp, #56] + mul r6, r8, r6 + sub r4, r4, #1 + sxth r4, r4 + str r1, [sp] + add r1, r4, r6 + bl flash_read_page_en + cmp r0, #512 + str r5, [sp, #12] + moveq r7, #0 + beq .L2458 +.L2457: + ldr r3, [sp, #12] + ldr r3, [r3] + tst r3, #4096 + beq .L2462 + ldr r3, [r9] + mov r2, r4 + mov r1, r8 + ldr r0, .L2467+8 + bl rk_printk +.L2462: + mov r0, r4 + add sp, sp, #20 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2461: + add r5, r7, r4 + ldr r3, [sp, #56] + add r5, r5, r5, lsr #31 + mov r2, fp + mov r0, r10 + asr r5, r5, #1 + str r3, [sp] + mov r3, r9 + sxtah r1, r6, r5 + bl flash_read_page_en + cmp r0, #512 + subeq r4, r5, #1 + addne r5, r5, #1 + sxtheq r4, r4 + sxthne r7, r5 +.L2458: + cmp r7, r4 + ble .L2461 + b .L2457 +.L2468: + .align 2 +.L2467: + .word .LANCHOR2 + .word .LANCHOR3 + .word .LC167 + .fnend + .size flash_get_last_written_page, .-flash_get_last_written_page + .align 2 + .global flash_get_last_written_page_ext + .syntax unified + .arm + .fpu softvfp + .type flash_get_last_written_page_ext, %function +flash_get_last_written_page_ext: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr ip, .L2471 + push {r0, r1, r2, lr} + .save {lr} + .pad #12 + ldr lr, .L2471+4 + ldrb ip, [ip, #1153] @ zero_extendqisi2 + ldrh lr, [lr, #-2] + str r3, [sp] + mov r3, r2 + rsb ip, ip, #24 + mov r2, r1 + sub ip, ip, lr + mvn r1, #0 + asr lr, r0, ip + bic r1, r0, r1, lsl ip + uxtb r0, lr + bl flash_get_last_written_page + add sp, sp, #12 + @ sp needed + ldr pc, [sp], #4 +.L2472: + .align 2 +.L2471: + .word .LANCHOR0 + .word .LANCHOR3-3136 + .fnend + .size flash_get_last_written_page_ext, .-flash_get_last_written_page_ext + .align 2 + .global flash_ddr_para_scan + .syntax unified + .arm + .fpu softvfp + .type flash_ddr_para_scan, %function +flash_ddr_para_scan: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r4, r5, r6, r7, r8, r9, lr} + .save {r4, r5, r6, r7, r8, r9, lr} + .pad #12 + mov r7, r0 + ldr r4, .L2480 + mov r6, #1 + mov r8, r1 + mov r9, #4 + ldr r5, .L2480+4 + ldrb r0, [r4, #1192] @ zero_extendqisi2 + strb r6, [r4, #1143] + bl flash_set_interface_mode + ldrb r0, [r4, #1192] @ zero_extendqisi2 + bl nandc_set_if_mode + ldr r3, [r5, #-96] + mov r1, r8 + ldr r2, [r5, #-92] + mov r0, r7 + str r9, [sp] + bl flash_ddr_tuning_read + ldr r3, [r5, #-96] + mov r1, r8 + str r9, [sp] + mov r0, r7 + ldr r2, [r5, #-92] + bl flash_read_page + cmn r0, #1 + mov r3, r4 + bne .L2474 + ldrb r2, [r4, #1192] @ zero_extendqisi2 + tst r2, #1 + beq .L2474 + mov r0, r6 + bl flash_set_interface_mode + mov r0, r6 + bl nandc_set_if_mode + mov r3, #0 + strb r3, [r4, #1143] +.L2475: + mov r0, #0 + add sp, sp, #12 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, pc} +.L2474: + mov r2, #1 + strb r2, [r3, #1143] + b .L2475 +.L2481: + .align 2 +.L2480: + .word .LANCHOR0 + .word .LANCHOR3 + .fnend + .size flash_ddr_para_scan, .-flash_ddr_para_scan + .align 2 + .global flash_prog_page + .syntax unified + .arm + .fpu softvfp + .type flash_prog_page, %function +flash_prog_page: + .fnstart + @ args = 4, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov fp, r3 + ldr r6, .L2494 + .pad #20 + sub sp, sp, #20 + mov r4, r0 + mov r7, r1 + str r2, [sp, #12] + mvn r2, #0 + ldrb r3, [r6, #1153] @ zero_extendqisi2 + add r8, r0, #8 + ldr r5, [r6, #1044] + rsb r3, r3, #24 + bic r10, r1, r2, lsl r3 + add r8, r5, r8, lsl #8 + bl nandc_wait_flash_ready + mov r0, r4 + bl hynix_reconfig_rr_para + mov r0, r4 + bl nandc_cs + tst r7, #50331648 + mov r0, r4 + bne .L2483 + bl zftl_flash_enter_slc_mode +.L2484: + lsl r9, r4, #8 + mov r1, #128 + mov r0, r10 + add r2, r5, r9 + add r5, r5, r9 + str r1, [r2, #2056] + mov r1, #0 + str r1, [r2, #2052] + str r1, [r2, #2052] + uxtb r1, r10 + str r1, [r2, #2052] + lsr r1, r10, #8 + str r1, [r2, #2052] + lsr r1, r10, #16 + str r1, [r2, #2052] + ldrb r1, [r6, #1152] @ zero_extendqisi2 + cmp r1, #0 + lsrne r1, r10, #24 + strne r1, [r2, #2052] + bl nandc_set_seed + ldr r3, .L2494+4 + mov r1, #1 + mov r0, r4 + ldrb r2, [r3, #13] @ zero_extendqisi2 + ldr r3, [sp, #12] + str fp, [sp] + bl nandc_xfer + mov r3, #16 + str r3, [r5, #2056] + bl nandc_iqr_wait_flash_ready + bl nandc_wait_flash_ready + mov r0, r8 + bl flash_read_status + bl nandc_de_cs.constprop.35 + ands r0, r0, #4 + beq .L2482 + mov r2, r0 + mov r1, r7 + ldr r0, .L2494+8 + bl rk_printk + mvn r0, #0 +.L2482: + add sp, sp, #20 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2483: + bl zftl_flash_exit_slc_mode + b .L2484 +.L2495: + .align 2 +.L2494: + .word .LANCHOR0 + .word .LANCHOR2 + .word .LC168 + .fnend + .size flash_prog_page, .-flash_prog_page + .align 2 + .global flash_test_blk + .syntax unified + .arm + .fpu softvfp + .type flash_test_blk, %function +flash_test_blk: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r4, r5, r6, r7, lr} + .save {r4, r5, r6, r7, lr} + .pad #12 + mov r6, r0 + ldr r4, .L2507 + mov r5, r1 + mov r2, #32 + mov r1, #165 + ldr r0, [r4, #-120] + bl ftl_memset + mov r2, #8 + mov r1, #90 + ldr r0, [r4, #-112] + bl ftl_memset + ldr r3, .L2507+4 + mov r0, r6 + ldrh r3, [r3, #2] + mul r5, r5, r3 + mov r1, r5 + bl flash_erase_block + cmn r0, #1 + bne .L2497 +.L2499: + mvn r4, #0 +.L2498: + mov r1, r5 + mov r0, r6 + bl flash_erase_block + mov r0, r4 + add sp, sp, #12 + @ sp needed + pop {r4, r5, r6, r7, pc} +.L2497: + ldr r7, .L2507+8 + mov r1, r5 + mov r0, r6 + ldrb r3, [r7, #13] @ zero_extendqisi2 + str r3, [sp] + ldr r3, [r4, #-112] + ldr r2, [r4, #-120] + bl flash_prog_page + cmn r0, #1 + beq .L2499 + ldrb r3, [r7, #13] @ zero_extendqisi2 + mov r1, r5 + mov r0, r6 + str r3, [sp] + ldr r3, [r4, #-112] + ldr r2, [r4, #-120] + bl flash_read_page_en + cmn r0, #1 + beq .L2499 + ldr r3, [r4, #-120] + ldr r2, [r3] + ldr r3, .L2507+12 + cmp r2, r3 + bne .L2499 + ldr r3, [r4, #-112] + ldr r4, [r3] + ldr r3, .L2507+16 + subs r4, r4, r3 + mvnne r4, #0 + b .L2498 +.L2508: + .align 2 +.L2507: + .word .LANCHOR3 + .word .LANCHOR0 + .word .LANCHOR2 + .word -1515870811 + .word 1515870810 + .fnend + .size flash_test_blk, .-flash_test_blk + .align 2 + .global flash_start_one_pass_page_prog + .syntax unified + .arm + .fpu softvfp + .type flash_start_one_pass_page_prog, %function +flash_start_one_pass_page_prog: + .fnstart + @ args = 12, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + .pad #8 + mov r9, r3 + ldr r6, .L2519 + mov r10, r0 + lsl r7, r9, #8 + mov r0, r3 + ldr r5, [sp, #40] + mov r8, r2 + ldr r4, [r6, #1044] + bl nandc_cs + cmp r10, #0 + mov r2, #128 + addne r3, r4, r7 + mov r0, r5 + strne r10, [r3, #2056] + add r3, r4, r7 + str r2, [r3, #2056] + mov r2, #0 + str r2, [r3, #2052] + add r4, r4, r7 + str r2, [r3, #2052] + uxtb r2, r5 + str r2, [r3, #2052] + lsr r2, r5, #8 + str r2, [r3, #2052] + lsr r2, r5, #16 + str r2, [r3, #2052] + ldrb r2, [r6, #1152] @ zero_extendqisi2 + cmp r2, #0 + lsrne r2, r5, #24 + strne r2, [r3, #2052] + bl nandc_set_seed + ldr r3, .L2519+4 + mov r1, #1 + mov r0, r9 + ldrb r2, [r3, #13] @ zero_extendqisi2 + ldr r3, [sp, #48] + str r3, [sp] + ldr r3, [sp, #44] + bl nandc_xfer + str r8, [r4, #2056] + add sp, sp, #8 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L2520: + .align 2 +.L2519: + .word .LANCHOR0 + .word .LANCHOR2 + .fnend + .size flash_start_one_pass_page_prog, .-flash_start_one_pass_page_prog + .align 2 + .global flash_dual_page_prog + .syntax unified + .arm + .fpu softvfp + .type flash_dual_page_prog, %function +flash_dual_page_prog: + .fnstart + @ args = 12, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r10, r3 + ldr r3, .L2534 + mov r9, r2 + add r2, r0, #8 + .pad #20 + sub sp, sp, #20 + ldr r6, .L2534+4 + mov r4, r0 + ldrb r5, [r3, #1153] @ zero_extendqisi2 + mov r7, r1 + ldr r8, [r3, #1044] + ubfx fp, r1, #24, #2 + rsb r3, r5, #24 + mvn r5, #0 + bic r5, r1, r5, lsl r3 + ldr r3, [r6] + add r8, r8, r2, lsl #8 + tst r3, #16 + beq .L2522 + ldr r3, [sp, #64] + mov r2, fp + ldr r0, .L2534+8 + bl rk_printk +.L2522: + bl nandc_wait_flash_ready + mov r0, r4 + bl nandc_cs + cmp fp, #0 + mov r0, r4 + bne .L2523 + bl zftl_flash_enter_slc_mode +.L2524: + mov r1, #0 + mov r3, r4 + mov r2, #16 + mov r0, r1 + stm sp, {r5, r9, r10} + add r5, r5, #1 + bl flash_start_one_pass_page_prog + bl nandc_wait_flash_ready + ldr r3, [sp, #60] + mov r1, #0 + mov r2, #16 + mov r0, r1 + str r5, [sp] + str r3, [sp, #8] + ldr r3, [sp, #56] + str r3, [sp, #4] + mov r3, r4 + bl flash_start_one_pass_page_prog + bl nandc_wait_flash_ready + mov r0, r8 + bl flash_read_status + bl nandc_de_cs.constprop.35 + ands r0, r0, #4 + beq .L2521 + ldr r3, [r6] + tst r3, #4096 + beq .L2526 + mov r2, r0 + mov r1, r7 + ldr r0, .L2534+12 + bl rk_printk +.L2526: + mvn r0, #0 +.L2521: + add sp, sp, #20 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2523: + bl zftl_flash_exit_slc_mode + b .L2524 +.L2535: + .align 2 +.L2534: + .word .LANCHOR0 + .word .LANCHOR2 + .word .LC169 + .word .LC168 + .fnend + .size flash_dual_page_prog, .-flash_dual_page_prog + .align 2 + .global ymtc_flash_tlc_page_prog + .syntax unified + .arm + .fpu softvfp + .type ymtc_flash_tlc_page_prog, %function +ymtc_flash_tlc_page_prog: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + .pad #16 + mov r10, r3 + ldr r3, .L2543 + mov r6, #1 + mov r5, r0 + mov r8, r2 + add r2, r0, #8 + mov r9, r1 + ldrb r4, [r3, #1153] @ zero_extendqisi2 + ldr r7, [r3, #1044] + rsb r4, r4, #24 + lsl r4, r6, r4 + add r7, r7, r2, lsl #8 + sub r4, r4, #1 + and r4, r4, r1 + bl nandc_wait_flash_ready + mov r0, r5 + bl nandc_cs + mov r0, r5 + bl zftl_flash_exit_slc_mode + mov r3, r5 + mov r2, #26 + mov r1, r6 + stm sp, {r4, r8, r10} + mov r0, #0 + bl flash_start_one_pass_page_prog + bl nandc_wait_flash_ready + add r3, r4, r6 + mov r2, #26 + mov r1, r6 + str r3, [sp] + mov r0, #0 + mov r3, r5 + stmib sp, {r8, r10} + add r4, r4, #2 + bl flash_start_one_pass_page_prog + bl nandc_wait_flash_ready + mov r3, r5 + mov r2, #16 + mov r1, r6 + mov r0, #0 + stmib sp, {r8, r10} + str r4, [sp] + bl flash_start_one_pass_page_prog + bl nandc_iqr_wait_flash_ready + bl nandc_wait_flash_ready + mov r0, r7 + bl flash_read_status + bl nandc_de_cs.constprop.35 + ands r0, r0, #4 + beq .L2536 + ldr r3, .L2543+4 + ldr r3, [r3] + tst r3, #4096 + beq .L2538 + mov r2, r0 + mov r1, r9 + ldr r0, .L2543+8 + bl rk_printk +.L2538: + mvn r0, #0 +.L2536: + add sp, sp, #16 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L2544: + .align 2 +.L2543: + .word .LANCHOR0 + .word .LANCHOR2 + .word .LC170 + .fnend + .size ymtc_flash_tlc_page_prog, .-ymtc_flash_tlc_page_prog + .section .text.unlikely + .align 2 + .syntax unified + .arm + .fpu softvfp + .type fw_flash_page_prog.constprop.29, %function +fw_flash_page_prog.constprop.29: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, lr} + .save {r4, r5, r6, r7, r8, r9, lr} + mov r6, r1 + ldr r4, .L2551 + .pad #20 + sub sp, sp, #20 + mov r7, r2 + ldr r3, [r4, #1104] + ldrb r1, [r3, #9] @ zero_extendqisi2 + bl __aeabi_uidiv + mov r5, r0 + ldrb r0, [r4, #1108] @ zero_extendqisi2 + ldrb r8, [r4, #1193] @ zero_extendqisi2 + bl nandc_bch_sel + ldr r3, .L2551+4 + ldrb r2, [r3, #11] @ zero_extendqisi2 + cmp r2, #9 + bne .L2546 + ldrb r4, [r4, #1110] @ zero_extendqisi2 + cmp r4, #0 + bne .L2546 + ldrb r3, [r3, #16] @ zero_extendqisi2 + cmp r3, #3 + bne .L2547 + mov r3, r7 + mov r2, r6 + mov r1, r5 + mov r0, r4 + bl ymtc_flash_tlc_page_prog +.L2550: + mov r4, r0 + mov r0, r8 + bl nandc_bch_sel + mov r0, r4 + add sp, sp, #20 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, pc} +.L2547: + ldr r9, .L2551+8 + mov r2, #16384 + mov r1, #255 + ldr r0, [r9, #-120] + bl ftl_memset + ldr r3, [r9, #-120] + mov r2, #4 + str r2, [sp, #8] + mov r1, r5 + mov r2, r6 + mov r0, r4 + str r3, [sp, #4] + str r3, [sp] + mov r3, r7 + bl flash_dual_page_prog + b .L2550 +.L2546: + mov r3, #4 + mov r2, r6 + str r3, [sp] + mov r1, r5 + mov r3, r7 + mov r0, #0 + bl flash_prog_page + b .L2550 +.L2552: + .align 2 +.L2551: + .word .LANCHOR0 + .word .LANCHOR2 + .word .LANCHOR3 + .fnend + .size fw_flash_page_prog.constprop.29, .-fw_flash_page_prog.constprop.29 + .text + .align 2 + .global flash_start_tlc_page_prog + .syntax unified + .arm + .fpu softvfp + .type flash_start_tlc_page_prog, %function +flash_start_tlc_page_prog: + .fnstart + @ args = 12, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #12 + mov r6, r3 + ldr r4, .L2561 + add r5, sp, #48 + mov fp, r0 + mov r7, r1 + mov r8, r2 + ldm r5, {r5, r9, r10} + ldrb r3, [r4, #1109] @ zero_extendqisi2 + cmp r3, r6 + bhi .L2554 + mov r2, #868 + ldr r1, .L2561+4 + ldr r0, .L2561+8 + bl rk_printk + bl dump_stack +.L2554: + ldrb r3, [r4, #1109] @ zero_extendqisi2 + cmp r3, r6 + bls .L2553 + add r6, r4, r6 + ldr r4, [r4, #1044] + ldrb r6, [r6, #1144] @ zero_extendqisi2 + mov r0, r6 + bl nandc_cs + lsl r3, r6, #8 + cmp fp, #0 + addne r2, r4, r3 + add r4, r4, r3 + mov r3, #128 + strne fp, [r2, #2056] + str r7, [r4, #2056] + str r3, [r4, #2056] + mov r3, #0 + str r3, [r4, #2052] + str r3, [r4, #2052] + uxtb r3, r5 + str r3, [r4, #2052] + lsr r3, r5, #8 + str r3, [r4, #2052] + lsr r3, r5, #16 + add r5, r5, r5, lsl #1 + str r3, [r4, #2052] + sub r0, r5, #1 + add r0, r0, r7 + bl nandc_set_seed + ldr r3, .L2561+12 + mov r1, #1 + mov r0, r6 + ldrb r2, [r3, #13] @ zero_extendqisi2 + mov r3, r9 + str r10, [sp] + bl nandc_xfer + str r8, [r4, #2056] + add sp, sp, #12 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, lr} + b nandc_de_cs.constprop.35 +.L2553: + add sp, sp, #12 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2562: + .align 2 +.L2561: + .word .LANCHOR0 + .word .LANCHOR1+1901 + .word .LC0 + .word .LANCHOR2 + .fnend + .size flash_start_tlc_page_prog, .-flash_start_tlc_page_prog + .align 2 + .syntax unified + .arm + .fpu softvfp + .type queue_tlc_prog_cmd, %function +queue_tlc_prog_cmd: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r3, r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + .pad #16 + mov r8, r1 + ldr r1, .L2568 + mov r7, #1 + mov r6, r0 + ldr r2, [r0] + ldrb r3, [r1, #1153] @ zero_extendqisi2 + ldr ip, [r2, #24] + rsb r0, r3, #24 + lsl r4, r7, r3 + ldrb r3, [r1, #1159] @ zero_extendqisi2 + lsl r5, r7, r0 + sub r4, r4, #1 + and r4, r4, ip, lsr r0 + cmp r3, #0 + sub r5, r5, #1 + and r5, r5, ip + uxtb r4, r4 + beq .L2564 + mov r0, r4 + bl zftl_flash_exit_slc_mode + ldr r3, [r6] + mov r1, r7 + mov r0, #0 + ldr r2, [r3, #12] + str r2, [sp, #8] + mov r2, #26 + ldr r3, [r3, #4] + str r5, [sp] + str r3, [sp, #4] + mov r3, r4 + bl flash_start_one_pass_page_prog + bl nandc_iqr_wait_flash_ready + bl nandc_wait_flash_ready + ldr r3, [r6, #4] + mov r1, r7 + mov r0, #0 + ldr r2, [r3, #12] + str r2, [sp, #8] + mov r2, #26 + ldr r3, [r3, #4] + str r3, [sp, #4] + add r3, r5, r7 + str r3, [sp] + mov r3, r4 + bl flash_start_one_pass_page_prog + bl nandc_iqr_wait_flash_ready + bl nandc_wait_flash_ready + ldr r3, [r6, #8] + add r5, r5, #2 + mov r1, r7 + mov r0, #0 + ldr r2, [r3, #12] + str r2, [sp, #8] + mov r2, #16 + ldr r3, [r3, #4] + str r5, [sp] + str r3, [sp, #4] + mov r3, r4 + bl flash_start_one_pass_page_prog +.L2565: + cmp r8, #0 + beq .L2563 + ldr r1, [r6] + mov r3, #4 + ldr r0, .L2568+4 + strb r3, [r1, #42] + mov r3, #1 + strb r3, [r1, #43] + mvn r3, #0 + strb r3, [r1] + add sp, sp, #16 + @ sp needed + pop {r4, r5, r6, r7, r8, lr} + b buf_add_tail +.L2564: + ldr r3, [r2, #12] + mov r1, r7 + ldrb r0, [r2, #44] @ zero_extendqisi2 + str r3, [sp, #8] + ldr r3, [r2, #4] + mov r2, #26 + str r5, [sp] + str r3, [sp, #4] + mov r3, r4 + bl flash_start_tlc_page_prog + bl nandc_iqr_wait_flash_ready + bl nandc_wait_flash_ready + ldm r6, {r2, r3} + mov r1, #2 + ldrb r0, [r2, #44] @ zero_extendqisi2 + ldr r2, [r3, #12] + str r2, [sp, #8] + mov r2, #26 + ldr r3, [r3, #4] + str r5, [sp] + str r3, [sp, #4] + mov r3, r4 + bl flash_start_tlc_page_prog + bl nandc_iqr_wait_flash_ready + bl nandc_wait_flash_ready + ldr r3, [r6, #8] + mov r1, #3 + ldr r2, [r6] + ldrb r0, [r2, #44] @ zero_extendqisi2 + ldr r2, [r3, #12] + str r2, [sp, #8] + mov r2, #16 + ldr r3, [r3, #4] + str r5, [sp] + str r3, [sp, #4] + mov r3, r4 + bl flash_start_tlc_page_prog + b .L2565 +.L2563: + add sp, sp, #16 + @ sp needed + pop {r4, r5, r6, r7, r8, pc} +.L2569: + .align 2 +.L2568: + .word .LANCHOR0 + .word .LANCHOR0+2770 + .fnend + .size queue_tlc_prog_cmd, .-queue_tlc_prog_cmd + .align 2 + .global sblk_3d_tlc_dump_prog + .syntax unified + .arm + .fpu softvfp + .type sblk_3d_tlc_dump_prog, %function +sblk_3d_tlc_dump_prog: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r3, r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + .pad #16 + mov r7, #1 + ldr r2, .L2574 + mov r5, r0 + ldr r0, [r0, #24] + ldrb r3, [r2, #1153] @ zero_extendqisi2 + ldrb r8, [r2, #1159] @ zero_extendqisi2 + rsb r1, r3, #24 + lsl r4, r7, r3 + lsl r6, r7, r1 + sub r4, r4, #1 + cmp r8, #0 + and r4, r4, r0, lsr r1 + sub r6, r6, #1 + and r6, r6, r0 + uxtb r4, r4 + beq .L2571 + mov r0, r4 + bl zftl_flash_exit_slc_mode + ldr r3, [r5, #12] + mov r2, #26 + mov r1, r7 + mov r0, #0 + str r6, [sp] + str r3, [sp, #8] + ldr r3, [r5, #4] + str r3, [sp, #4] + mov r3, r4 + bl flash_start_one_pass_page_prog + bl nandc_iqr_wait_flash_ready + bl nandc_wait_flash_ready + ldr r3, [r5, #12] + mov r2, #26 + mov r1, r7 + mov r0, #0 + str r3, [sp, #8] + ldr r3, [r5, #4] + str r3, [sp, #4] + add r3, r6, r7 + str r3, [sp] + mov r3, r4 + bl flash_start_one_pass_page_prog + bl nandc_iqr_wait_flash_ready + bl nandc_wait_flash_ready + ldr r3, [r5, #12] + add r6, r6, #2 + str r6, [sp] + mov r2, #16 + mov r1, r7 + mov r0, #0 + str r3, [sp, #8] + ldr r3, [r5, #4] + str r3, [sp, #4] + mov r3, r4 + bl flash_start_one_pass_page_prog +.L2572: + bl nandc_iqr_wait_flash_ready + bl nandc_wait_flash_ready + mov r1, #64 + ldr r0, [r5, #24] + add sp, sp, #16 + @ sp needed + pop {r4, r5, r6, r7, r8, lr} + b flash_wait_device_ready +.L2571: + ldr r3, [r5, #12] + mov r1, r7 + mov r2, #26 + mov r0, r8 + str r6, [sp] + str r3, [sp, #8] + ldr r3, [r5, #4] + str r3, [sp, #4] + mov r3, r4 + bl flash_start_tlc_page_prog + bl nandc_iqr_wait_flash_ready + bl nandc_wait_flash_ready + ldr r3, [r5, #12] + mov r2, #26 + mov r1, #2 + mov r0, r8 + str r6, [sp] + str r3, [sp, #8] + ldr r3, [r5, #4] + str r3, [sp, #4] + mov r3, r4 + bl flash_start_tlc_page_prog + bl nandc_iqr_wait_flash_ready + bl nandc_wait_flash_ready + ldr r3, [r5, #12] + mov r2, #16 + str r6, [sp] + mov r1, #3 + mov r0, r8 + str r3, [sp, #8] + ldr r3, [r5, #4] + str r3, [sp, #4] + mov r3, r4 + bl flash_start_tlc_page_prog + b .L2572 +.L2575: + .align 2 +.L2574: + .word .LANCHOR0 + .fnend + .size sblk_3d_tlc_dump_prog, .-sblk_3d_tlc_dump_prog + .align 2 + .global flash_start_3d_mlc_page_prog + .syntax unified + .arm + .fpu softvfp + .type flash_start_3d_mlc_page_prog, %function +flash_start_3d_mlc_page_prog: + .fnstart + @ args = 4, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + .pad #8 + mov r8, r3 + ldr r4, .L2580 + mov r7, r0 + mov r5, r1 + mov r6, r2 + ldrb r3, [r4, #1109] @ zero_extendqisi2 + cmp r3, r1 + bhi .L2577 + movw r2, #903 + ldr r1, .L2580+4 + ldr r0, .L2580+8 + bl rk_printk + bl dump_stack +.L2577: + ldrb r3, [r4, #1109] @ zero_extendqisi2 + cmp r3, r5 + bls .L2576 + add r5, r4, r5 + ldr r4, [r4, #1044] + ldrb r5, [r5, #1144] @ zero_extendqisi2 + mov r0, r5 + add r4, r4, r5, lsl #8 + bl nandc_cs + mov r3, #128 + mov r0, r6 + str r3, [r4, #2056] + mov r3, #0 + str r3, [r4, #2052] + str r3, [r4, #2052] + uxtb r3, r6 + str r3, [r4, #2052] + lsr r3, r6, #8 + str r3, [r4, #2052] + lsr r3, r6, #16 + str r3, [r4, #2052] + bl nandc_set_seed + ldr r3, .L2580+12 + mov r1, #1 + mov r0, r5 + ldrb r2, [r3, #13] @ zero_extendqisi2 + ldr r3, [sp, #32] + str r3, [sp] + mov r3, r8 + bl nandc_xfer + str r7, [r4, #2056] +.L2576: + add sp, sp, #8 + @ sp needed + pop {r4, r5, r6, r7, r8, pc} +.L2581: + .align 2 +.L2580: + .word .LANCHOR0 + .word .LANCHOR1+1927 + .word .LC0 + .word .LANCHOR2 + .fnend + .size flash_start_3d_mlc_page_prog, .-flash_start_3d_mlc_page_prog + .align 2 + .global sblk_mlc_dump_prog + .syntax unified + .arm + .fpu softvfp + .type sblk_mlc_dump_prog, %function +sblk_mlc_dump_prog: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L2588 + push {r0, r1, r4, r5, r6, lr} + .save {r4, r5, r6, lr} + .pad #8 + mov r5, r0 + ldr r1, [r0, #24] + ldrb r4, [r3, #1153] @ zero_extendqisi2 + mov r3, #1 + rsb r2, r4, #24 + lsl r4, r3, r4 + lsl r6, r3, r2 + sub r4, r4, #1 + sub r6, r6, #1 + and r4, r4, r1, lsr r2 + and r6, r6, r1 + uxtb r4, r4 + mov r0, r4 + bl zftl_flash_exit_slc_mode + ldr r3, .L2588+4 + ldr r3, [r3] + tst r3, #4096 + beq .L2583 + ldr r2, [r5, #24] + mov r1, r6 + ldr r0, .L2588+8 + add r3, r2, #1 + bl rk_printk +.L2583: + ldr r3, [r5, #12] + mov r2, r6 + mov r1, r4 + mov r0, #16 + str r3, [sp] + ldr r3, [r5, #4] + bl flash_start_3d_mlc_page_prog + bl nandc_iqr_wait_flash_ready + bl nandc_wait_flash_ready + ldr r3, [r5, #12] + add r2, r6, #1 + mov r1, r4 + mov r0, #16 + str r3, [sp] + ldr r3, [r5, #4] + bl flash_start_3d_mlc_page_prog + bl nandc_iqr_wait_flash_ready + bl nandc_wait_flash_ready + mov r1, #64 + ldr r0, [r5, #24] + bl flash_wait_device_ready + bl nandc_de_cs.constprop.35 + add sp, sp, #8 + @ sp needed + pop {r4, r5, r6, pc} +.L2589: + .align 2 +.L2588: + .word .LANCHOR0 + .word .LANCHOR2 + .word .LC171 + .fnend + .size sblk_mlc_dump_prog, .-sblk_mlc_dump_prog + .align 2 + .global flash_start_page_prog + .syntax unified + .arm + .fpu softvfp + .type flash_start_page_prog, %function +flash_start_page_prog: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r10, r2 + ldr r5, .L2605 + mov fp, r3 + mov r8, r1 + .pad #20 + sub sp, sp, #20 + str r0, [sp, #12] + ldrb r2, [r5, #1153] @ zero_extendqisi2 + rsb r4, r2, #24 + lsr r3, r1, r4 + mvn r1, #0 + bic r3, r3, r1, lsl r2 + ldrb r2, [r5, #1109] @ zero_extendqisi2 + uxtb r9, r3 + cmp r2, r9 + bhi .L2591 + mov r2, #956 + ldr r1, .L2605+4 + ldr r0, .L2605+8 + bl rk_printk + bl dump_stack +.L2591: + ldrb r2, [r5, #1109] @ zero_extendqisi2 + cmp r2, r9 + bls .L2590 + mvn r2, #0 + ldr r7, [r5, #1044] + bic r4, r8, r2, lsl r4 + add r2, r5, r9 + ldrb r6, [r2, #1144] @ zero_extendqisi2 + bl nandc_rdy_status + cmp r0, #0 + bne .L2593 + ldrb r2, [r5, #1109] @ zero_extendqisi2 + cmp r2, #1 + bne .L2594 + bl nandc_wait_flash_ready +.L2593: + mov r0, r6 + bl hynix_reconfig_rr_para + mov r0, r6 + bl nandc_cs + tst r8, #50331648 + bne .L2595 + mov r0, r4 + bl slc_phy_page_address_calc + ldrb r3, [r5] @ zero_extendqisi2 + mov r4, r0 + cmp r3, #0 + beq .L2596 + mov r0, r6 + bl zftl_flash_enter_slc_mode +.L2596: + lsl r8, r6, #8 + mov r2, #128 + mov r0, r4 + add r3, r7, r8 + add r7, r7, r8 + str r2, [r3, #2056] + mov r2, #0 + str r2, [r3, #2052] + str r2, [r3, #2052] + uxtb r2, r4 + str r2, [r3, #2052] + lsr r2, r4, #8 + str r2, [r3, #2052] + lsr r2, r4, #16 + str r2, [r3, #2052] + ldrb r2, [r5, #1152] @ zero_extendqisi2 + cmp r2, #0 + lsrne r2, r4, #24 + strne r2, [r3, #2052] + bl nandc_set_seed + ldr r3, .L2605+12 + mov r1, #1 + mov r0, r6 + ldrb r2, [r3, #13] @ zero_extendqisi2 + mov r3, r10 + str fp, [sp] + bl nandc_xfer + ldr r3, [sp, #12] + str r3, [r7, #2056] + add sp, sp, #20 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, lr} + b nandc_de_cs.constprop.35 +.L2594: + mov r2, #64 + mov r1, r4 + mov r0, r9 + bl flash_wait_device_ready_raw + b .L2593 +.L2595: + mov r0, r6 + bl zftl_flash_exit_slc_mode + b .L2596 +.L2590: + add sp, sp, #20 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2606: + .align 2 +.L2605: + .word .LANCHOR0 + .word .LANCHOR1+1956 + .word .LC0 + .word .LANCHOR2 + .fnend + .size flash_start_page_prog, .-flash_start_page_prog + .align 2 + .syntax unified + .arm + .fpu softvfp + .type queue_prog_cmd, %function +queue_prog_cmd: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + mov r4, r0 + ldr r3, [r0, #12] + ldr r2, [r0, #4] + ldr r1, [r0, #24] + mov r0, #16 + bl flash_start_page_prog + ldr r2, .L2616 + ldr r0, [r4, #24] + ldrb r3, [r2, #2770] @ zero_extendqisi2 + cmp r3, #255 + beq .L2608 + ldrb ip, [r2, #1153] @ zero_extendqisi2 + mvn r1, #0 + mov r5, #48 + movw r8, #1256 + movw r6, #1274 + rsb r7, ip, #24 + mvn r1, r1, lsl ip + uxth r1, r1 + and r0, r1, r0, asr r7 +.L2610: + mla ip, r5, r3, r2 + ldr lr, [ip, r8] + and lr, r1, lr, lsr r7 + cmp r0, lr + bne .L2609 + add lr, ip, r6 + ldrb ip, [ip, r6] @ zero_extendqisi2 + cmp ip, #7 + bne .L2609 + mov r3, #3 + strb r3, [lr] +.L2608: + mov r3, #3 + mov r1, r4 + strb r3, [r4, #42] + mov r3, #1 + strb r3, [r4, #43] + mvn r3, #0 + strb r3, [r4] + ldr r0, .L2616+4 + pop {r4, r5, r6, r7, r8, lr} + b buf_add_tail +.L2609: + mla r3, r5, r3, r2 + ldrb r3, [r3, #1232] @ zero_extendqisi2 + cmp r3, #255 + bne .L2610 + b .L2608 +.L2617: + .align 2 +.L2616: + .word .LANCHOR0 + .word .LANCHOR0+2770 + .fnend + .size queue_prog_cmd, .-queue_prog_cmd + .align 2 + .global flash_complete_plane_page_read + .syntax unified + .arm + .fpu softvfp + .type flash_complete_plane_page_read, %function +flash_complete_plane_page_read: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + .pad #8 + mov r10, r2 + ldr r5, .L2649 + mvn r2, #0 + mov r6, r0 + mov r9, r1 + ldrb r3, [r5, #1153] @ zero_extendqisi2 + rsb r4, r3, #24 + lsr r7, r0, r4 + bic r7, r7, r2, lsl r3 + ldrb r3, [r5, #1109] @ zero_extendqisi2 + uxtb r7, r7 + cmp r3, r7 + bhi .L2619 + movw r2, #1070 + ldr r1, .L2649+4 + ldr r0, .L2649+8 + bl rk_printk + bl dump_stack +.L2619: + ldrb r3, [r5, #1109] @ zero_extendqisi2 + mvn r0, #0 + cmp r3, r7 + bls .L2618 + add r7, r5, r7 + bic r4, r6, r0, lsl r4 + ldrb r8, [r7, #1144] @ zero_extendqisi2 + ubfx r6, r6, #24, #2 + ldr r7, [r5, #1044] + mov r0, r8 + bl nandc_cs + cmp r6, #0 + bne .L2621 + mov r0, r4 + bl slc_phy_page_address_calc + mov r4, r0 +.L2621: + ldrb r3, [r5, #1127] @ zero_extendqisi2 + uxtb lr, r4 + lsr ip, r4, #8 + ldrb r0, [r5, #1152] @ zero_extendqisi2 + cmp r3, #1 + lsl r3, r8, #8 + moveq r1, #6 + addeq r2, r7, r3 + beq .L2648 + ldr r2, [r5, #1104] + ldrb r2, [r2, #12] @ zero_extendqisi2 + cmp r2, #3 + add r2, r7, r3 + bne .L2625 + mov r1, #5 +.L2648: + str r1, [r2, #2056] + mov r1, #0 + str r1, [r2, #2052] + cmp r0, #0 + str r1, [r2, #2052] + lsr r1, r4, #16 + str lr, [r2, #2052] + add r3, r7, r3 + str ip, [r2, #2052] + str r1, [r2, #2052] + lsrne r1, r4, #24 + strne r1, [r2, #2052] +.L2644: + mov r2, #224 + cmp r6, #0 + str r2, [r3, #2056] + ldr r3, [r5, #1104] + ldrb r3, [r3, #12] @ zero_extendqisi2 + sub r3, r3, #3 + clz r3, r3 + lsr r3, r3, #5 + moveq r3, #0 + cmp r3, #0 + beq .L2628 + ldrb r3, [r5, #1158] @ zero_extendqisi2 + cmp r3, #0 + bne .L2628 + ldrb r3, [r5, #1159] @ zero_extendqisi2 + cmp r3, #0 + addeq r4, r4, r4, lsl #1 + subeq r6, r6, #1 + addeq r0, r4, r6 + beq .L2645 +.L2628: + mov r0, r4 +.L2645: + bl nandc_set_seed + ldr r3, .L2649+12 + mov r1, #0 + mov r0, r8 + ldrb r2, [r3, #13] @ zero_extendqisi2 + mov r3, r9 + str r10, [sp] + bl nandc_xfer + bl nandc_de_cs.constprop.35 +.L2618: + add sp, sp, #8 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L2625: + mov r1, #0 + cmp r0, #0 + str r1, [r2, #2056] + add r3, r7, r3 + str r1, [r2, #2052] + str r1, [r2, #2052] + lsr r1, r4, #16 + str lr, [r2, #2052] + str ip, [r2, #2052] + str r1, [r2, #2052] + lsrne r1, r4, #24 + strne r1, [r2, #2052] + mov r1, #5 + str r1, [r3, #2056] + mov r1, #0 + str r1, [r2, #2052] + str r1, [r2, #2052] + b .L2644 +.L2650: + .align 2 +.L2649: + .word .LANCHOR0 + .word .LANCHOR1+1978 + .word .LC0 + .word .LANCHOR2 + .fnend + .size flash_complete_plane_page_read, .-flash_complete_plane_page_read + .align 2 + .global flash_complete_page_read + .syntax unified + .arm + .fpu softvfp + .type flash_complete_page_read, %function +flash_complete_page_read: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r3, #1 + ldr r4, .L2683 + mov fp, r2 + .pad #20 + sub sp, sp, #20 + mov r10, r1 + str r0, [sp, #12] + ubfx r6, r0, #24, #2 + ldrb r7, [r4, #1153] @ zero_extendqisi2 + rsb r2, r7, #24 + lsl r7, r3, r7 + lsl r5, r3, r2 + ldrb r3, [r4, #1109] @ zero_extendqisi2 + sub r7, r7, #1 + sub r5, r5, #1 + and r7, r7, r0, lsr r2 + and r5, r5, r0 + uxtb r7, r7 + cmp r3, r7 + bhi .L2652 + mov r2, #1232 + ldr r1, .L2683+4 + ldr r0, .L2683+8 + bl rk_printk + bl dump_stack +.L2652: + add r7, r4, r7 + ldrb r9, [r7, #1144] @ zero_extendqisi2 + ldr r7, [r4, #1044] + mov r0, r9 + bl nandc_cs + cmp r6, #0 + bne .L2653 + mov r0, r5 + bl slc_phy_page_address_calc + mov r5, r0 +.L2653: + ldr r8, .L2683+12 + ldrb r3, [r8, #16] @ zero_extendqisi2 + cmp r3, #3 + bne .L2654 + add r7, r7, r9, lsl #8 + mov r3, #5 + str r3, [r7, #2056] + mov r3, #0 + str r3, [r7, #2052] + str r3, [r7, #2052] + uxtb r3, r5 + str r3, [r7, #2052] + lsr r3, r5, #8 + str r3, [r7, #2052] + lsr r3, r5, #16 + str r3, [r7, #2052] + mov r3, #224 + str r3, [r7, #2056] +.L2654: + ldr r3, [r4, #1104] + cmp r6, #0 + ldrb r3, [r3, #12] @ zero_extendqisi2 + sub r3, r3, #3 + clz r3, r3 + lsr r3, r3, #5 + moveq r3, #0 + cmp r3, #0 + beq .L2655 + ldrb r3, [r4, #1158] @ zero_extendqisi2 + cmp r3, #0 + bne .L2655 + ldrb r3, [r4, #1159] @ zero_extendqisi2 + cmp r3, #0 + addeq r3, r5, r5, lsl #1 + subeq r0, r6, #1 + addeq r0, r0, r3 + beq .L2682 +.L2655: + mov r0, r5 +.L2682: + bl nandc_set_seed + ldrb r2, [r8, #13] @ zero_extendqisi2 + mov r3, r10 + str fp, [sp] + mov r1, #0 + mov r0, r9 + bl nandc_xfer + cmn r0, #1 + bne .L2657 + ldrb r7, [r4, #1196] @ zero_extendqisi2 + cmp r7, #0 + beq .L2658 + mov r3, #0 + mov r2, r10 + strb r3, [r4, #1196] + orr r1, r5, r6, lsl #24 + ldrb r3, [r8, #13] @ zero_extendqisi2 + mov r0, r9 + str r3, [sp] + mov r3, fp + bl flash_read_page + cmp r6, #0 + strb r7, [r4, #1196] + bne .L2659 +.L2664: + ldrb r3, [r4] @ zero_extendqisi2 + cmp r3, #0 + beq .L2659 + ldrb r3, [r4, #1193] @ zero_extendqisi2 + add r3, r3, r3, lsl #1 + cmp r0, r3, asr #2 + blt .L2659 + ldrb r3, [r8, #23] @ zero_extendqisi2 + sub r3, r3, #4 + cmp r3, #4 + movls r0, #256 +.L2651: + add sp, sp, #20 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2659: + cmn r0, #1 + bne .L2651 +.L2665: + ldr r3, .L2683+16 + ldr r7, [r3, #-100] + cmp r7, #0 + bne .L2661 +.L2663: + ldrb r3, [r4, #1196] @ zero_extendqisi2 + mov r1, #0 + ldr r2, [sp, #12] + ldr r0, .L2683+20 + str r3, [sp] + mvn r3, #0 + bl rk_printk + ldrb r3, [r4, #1143] @ zero_extendqisi2 + cmp r3, #0 + mvneq r0, #0 + beq .L2651 + ldrb r3, [r8, #13] @ zero_extendqisi2 + mov r2, r10 + orr r1, r5, r6, lsl #24 + mov r0, r9 + str r3, [sp] + mov r3, fp + bl flash_ddr_tuning_read + b .L2651 +.L2661: + ldrb r3, [r8, #13] @ zero_extendqisi2 + mov r2, r10 + orr r1, r5, r6, lsl #24 + mov r0, r9 + str r3, [sp] + mov r3, fp + blx r7 + cmn r0, #1 + bne .L2651 + b .L2663 +.L2658: + cmp r6, #0 + beq .L2664 + b .L2665 +.L2657: + cmp r6, #0 + bne .L2651 + b .L2664 +.L2684: + .align 2 +.L2683: + .word .LANCHOR0 + .word .LANCHOR1+2009 + .word .LC0 + .word .LANCHOR2 + .word .LANCHOR3 + .word .LC172 + .fnend + .size flash_complete_page_read, .-flash_complete_page_read + .align 2 + .syntax unified + .arm + .fpu softvfp + .type queue_wait_first_req_completed, %function +queue_wait_first_req_completed: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #20 + sub sp, sp, #20 + ldr r4, .L2779 + ldrb r5, [r4, #2770] @ zero_extendqisi2 + cmp r5, #255 + bne .L2686 +.L2719: + mov r7, #0 + b .L2685 +.L2686: + mov r8, #48 + mla r2, r8, r5, r4 + ldrb r3, [r2, #1274] @ zero_extendqisi2 + ldr r7, [r2, #1256] + sub r2, r3, #1 + cmp r2, #10 + ldrls pc, [pc, r2, asl #2] + b .L2719 +.L2689: + .word .L2688 + .word .L2690 + .word .L2691 + .word .L2691 + .word .L2691 + .word .L2691 + .word .L2692 + .word .L2693 + .word .L2694 + .word .L2691 + .word .L2694 +.L2688: + mla r8, r8, r5, r4 + bl nandc_wait_flash_ready + ldr r3, [r8, #1240] + ldr r1, [r8, #1236] + cmp r3, #0 + beq .L2695 + ldr r2, .L2779+4 + ldrb r0, [r8, #1272] @ zero_extendqisi2 + ldrb r2, [r2, #-2546] @ zero_extendqisi2 + cmp r0, r2 + moveq r1, r3 +.L2695: + mov r3, #48 + mov r0, r7 + mla r4, r3, r5, r4 + ldr r2, [r4, #1244] + bl flash_complete_page_read + str r0, [r4, #1268] +.L2778: + mov r3, #13 + strb r3, [r4, #1274] + ldrb r3, [r4, #1234] @ zero_extendqisi2 + orr r3, r3, #8 + strb r3, [r4, #1234] + b .L2719 +.L2690: + bl nandc_wait_flash_ready + mla r3, r8, r5, r4 + ldrb r6, [r3, #1232] @ zero_extendqisi2 + ldr r2, [r3, #1240] + ldr r9, [r3, #1236] + mla r8, r8, r6, r4 + cmp r2, #0 + ldr r10, [r8, #1236] + beq .L2696 + ldrb r1, [r3, #1272] @ zero_extendqisi2 + ldr r3, .L2779+4 + ldrb r3, [r3, #-2546] @ zero_extendqisi2 + cmp r1, r3 + moveq r9, r2 +.L2696: + mov r3, #48 + mla r3, r3, r6, r4 + ldr r2, [r3, #1240] + cmp r2, #0 + beq .L2697 + ldrb r1, [r3, #1272] @ zero_extendqisi2 + ldr r3, .L2779+4 + ldrb r3, [r3, #-2546] @ zero_extendqisi2 + cmp r1, r3 + moveq r10, r2 +.L2697: + mov r7, #48 + mov r1, r9 + mla r3, r7, r5, r4 + mla r7, r7, r6, r4 + ldr r2, [r3, #1244] + ldr r0, [r3, #1256] + str r3, [sp, #12] + bl flash_complete_plane_page_read + ldr r2, [r7, #1244] + mov r8, r0 + mov r1, r10 + ldr r0, [r7, #1256] + bl flash_complete_plane_page_read + cmn r8, #1 + mov fp, r0 + beq .L2698 + ldr r3, [sp, #12] + ldr r2, [r3, #1252] + cmn r2, #1 + beq .L2699 + ldr r3, [r3, #1244] + ldr r3, [r3, #4] + cmp r2, r3 + beq .L2699 +.L2698: + mov r7, #48 + ldrb r3, [r4, #1153] @ zero_extendqisi2 + mla r7, r7, r5, r4 + mvn ip, #0 + mvn ip, ip, lsl r3 + rsb r1, r3, #24 + ldr lr, [r7, #1256] + mov r2, r9 + ldr r3, .L2779+4 + ldrb r3, [r3, #-2546] @ zero_extendqisi2 + and r0, ip, lr, lsr r1 + bic r1, lr, ip, lsl r1 + uxtb r0, r0 + str r3, [sp] + ldr r3, [r7, #1244] + bl flash_read_page_en + ldr r2, [r7, #1252] + mov r8, r0 + cmn r2, #1 + beq .L2700 + ldr r3, [r7, #1244] + ldr r1, [r3, #4] + cmp r2, r1 + beq .L2700 + ldr r0, .L2779+8 + ldr r0, [r0] + tst r0, #64 + beq .L2700 + str r1, [sp] + ldr r0, .L2779+12 + ldr r3, [r3] + ldr r1, [r7, #1256] + bl rk_printk +.L2700: + mov r3, #48 + mla r3, r3, r5, r4 + ldr r2, [r3, #1252] + cmn r2, #1 + beq .L2699 + ldr r3, [r3, #1244] + ldr r3, [r3, #4] + cmp r2, r3 + beq .L2699 + movw r2, #431 + ldr r1, .L2779+16 + ldr r0, .L2779+20 + bl rk_printk + bl dump_stack +.L2699: + mov r3, #48 + mov r2, #13 + mla r5, r3, r5, r4 + cmn fp, #1 + strb r2, [r5, #1274] + ldrb r2, [r5, #1234] @ zero_extendqisi2 + str r8, [r5, #1268] + orr r2, r2, #8 + strb r2, [r5, #1234] + beq .L2701 + mla r3, r3, r6, r4 + ldr r2, [r3, #1252] + cmn r2, #1 + beq .L2703 + ldr r3, [r3, #1244] + ldr r3, [r3, #4] + cmp r2, r3 + beq .L2703 +.L2701: + mov r5, #48 + ldrb r3, [r4, #1153] @ zero_extendqisi2 + mla r5, r5, r6, r4 + mvn ip, #0 + mvn ip, ip, lsl r3 + rsb r1, r3, #24 + ldr lr, [r5, #1256] + mov r2, r10 + ldr r3, .L2779+4 + ldrb r3, [r3, #-2546] @ zero_extendqisi2 + and r0, ip, lr, lsr r1 + bic r1, lr, ip, lsl r1 + uxtb r0, r0 + str r3, [sp] + ldr r3, [r5, #1244] + bl flash_read_page_en + ldr r2, [r5, #1252] + cmn r2, #1 + beq .L2705 + ldr r3, [r5, #1244] + ldr r1, [r3, #4] + cmp r2, r1 + beq .L2705 + ldr r0, .L2779+8 + ldr r0, [r0] + tst r0, #64 + beq .L2705 + str r1, [sp] + ldr r0, .L2779+12 + ldr r3, [r3] + ldr r1, [r5, #1256] + bl rk_printk +.L2705: + mov r3, #48 + mla r3, r3, r6, r4 + ldr r2, [r3, #1252] + cmn r2, #1 + beq .L2703 + ldr r3, [r3, #1244] + ldr r3, [r3, #4] + cmp r2, r3 + beq .L2703 + movw r2, #450 + ldr r1, .L2779+16 + ldr r0, .L2779+20 + bl rk_printk + bl dump_stack +.L2703: + mov r3, #48 + mla r4, r3, r6, r4 + str r8, [r4, #1268] + b .L2778 +.L2691: + bl nandc_iqr_wait_flash_ready + mov r0, r7 + mov r1, #64 + bl flash_wait_device_ready + tst r0, #64 + mov r7, r0 + beq .L2719 + ands r2, r0, #5 + mov r3, #48 + beq .L2707 + mla r4, r3, r5, r4 + mov r3, #12 + mov r2, r0 + ldr r0, .L2779+24 + strb r3, [r4, #1274] + ldrb r1, [r4, #1233] @ zero_extendqisi2 + str r3, [sp] + ldr r3, [r4, #1256] + bl rk_printk +.L2777: + mvn r3, #0 + str r3, [r4, #1268] + b .L2685 +.L2707: + mul r3, r3, r5 + mov r1, #13 + add r7, r4, r3 + str r2, [r7, #1268] + ldr r2, [r4, #2800] + strb r1, [r7, #1274] + ldr r1, [r2, #156] + ldr r2, .L2779+28 + cmp r1, r2 + bne .L2719 + ldr r2, .L2779+32 + add r3, r2, r3 + ldrh r3, [r3, #34] + cmp r3, #0 + bne .L2719 + ldrb r3, [r4, #1153] @ zero_extendqisi2 + mvn ip, #0 + ldr lr, [r7, #1256] + ldr r6, .L2779+4 + rsb r1, r3, #24 + mvn ip, ip, lsl r3 + ldrb r3, [r6, #-2546] @ zero_extendqisi2 + and r0, ip, lr, lsr r1 + bic r1, lr, ip, lsl r1 + str r3, [sp] + uxtb r0, r0 + ldr r3, [r6, #-96] + ldr r2, [r6, #-92] + bl flash_read_page_en + cmn r0, #1 + mov r3, r0 + beq .L2708 + ldr r1, [r7, #1244] + ldr r2, [r6, #-96] + ldr r1, [r1] + ldr r2, [r2] + cmp r1, r2 + beq .L2719 +.L2708: + mov r2, #48 + ldr r0, .L2779+36 + mla r5, r2, r5, r4 + ldrb r2, [r4, #1196] @ zero_extendqisi2 + ldrb r1, [r5, #1233] @ zero_extendqisi2 + str r2, [sp] + ldr r2, [r5, #1256] + bl rk_printk + mvn r3, #0 + str r3, [r5, #1268] + b .L2719 +.L2694: + ldrb r1, [r4, #1153] @ zero_extendqisi2 + mvn r2, #0 + cmp r3, #11 + ldr r9, .L2779+32 + moveq r3, #10 + movne r3, #3 + rsb r0, r1, #24 + mov lr, r3 + mvn r2, r2, lsl r1 + add r3, r5, r5, lsl #1 + and r1, r2, r7, lsr r0 + add r3, r9, r3, lsl #4 + uxth r1, r1 + mov r6, #48 + movw r10, #1256 +.L2710: + ldrb r8, [r3] @ zero_extendqisi2 + cmp r8, #255 + mvneq r7, #0 + beq .L2685 +.L2717: + mla ip, r6, r8, r4 + movw fp, #1274 + add r3, r8, r8, lsl #1 + ldrb fp, [ip, fp] @ zero_extendqisi2 + add r3, r9, r3, lsl #4 + cmp fp, lr + bne .L2710 + ldr ip, [ip, r10] + and ip, r2, ip, lsr r0 + cmp r1, ip + bne .L2710 + bl nandc_iqr_wait_flash_ready + mov r0, r7 + mov r1, #64 + bl flash_wait_device_ready + tst r0, #64 + mov r7, r0 + bne .L2712 +.L2776: + mov r7, #0 + b .L2713 +.L2712: + ands r3, r0, #15 + mul r6, r6, r5 + beq .L2714 + add r6, r4, r6 + mov r9, #12 + ldrb r1, [r6, #1233] @ zero_extendqisi2 + mov r2, r0 + str r9, [sp] + ldr r0, .L2779+40 + ldr r3, [r6, #1256] + bl rk_printk + mvn r3, #0 + strb r9, [r6, #1274] + str r3, [r6, #1268] +.L2713: + mov r3, #48 + mla r5, r3, r5, r4 + mla r8, r3, r8, r4 + ldrb r2, [r5, #1274] @ zero_extendqisi2 + ldr r3, [r5, #1268] + strb r2, [r8, #1274] + str r3, [r8, #1268] +.L2685: + mov r0, r7 + add sp, sp, #20 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2714: + add r7, r4, r6 + mov r2, #13 + str r3, [r7, #1268] + ldr r3, [r4, #2800] + strb r2, [r7, #1274] + ldr r2, [r3, #156] + ldr r3, .L2779+28 + cmp r2, r3 + bne .L2776 + add r6, r9, r6 + ldrh r3, [r6, #34] + cmp r3, #0 + bne .L2776 + ldrb r3, [r4, #1153] @ zero_extendqisi2 + mvn ip, #0 + ldr lr, [r7, #1256] + ldr r6, .L2779+4 + rsb r1, r3, #24 + mvn ip, ip, lsl r3 + ldrb r3, [r6, #-2546] @ zero_extendqisi2 + and r0, ip, lr, lsr r1 + bic r1, lr, ip, lsl r1 + str r3, [sp] + uxtb r0, r0 + ldr r3, [r6, #-96] + ldr r2, [r6, #-92] + bl flash_read_page_en + cmn r0, #1 + mov r3, r0 + beq .L2716 + ldr r1, [r7, #1244] + ldr r2, [r6, #-96] + ldr r1, [r1] + ldr r2, [r2] + cmp r1, r2 + beq .L2776 +.L2716: + mov r6, #48 + ldrb r2, [r4, #1196] @ zero_extendqisi2 + mla r6, r6, r5, r4 + ldr r0, .L2779+44 + ldrb r1, [r6, #1233] @ zero_extendqisi2 + str r2, [sp] + ldr r2, [r6, #1256] + bl rk_printk + mvn r3, #0 + str r3, [r6, #1268] + b .L2776 +.L2692: + mov r0, r7 + mov r1, #32 + bl flash_wait_device_ready + tst r0, #32 + mov r7, r0 + beq .L2719 + ands r2, r0, #15 + mov r3, #48 + mla r4, r3, r5, r4 + movne r3, #12 + strbne r3, [r4, #1274] + bne .L2777 +.L2718: + mov r3, #13 + str r2, [r4, #1268] + strb r3, [r4, #1274] + b .L2719 +.L2693: + mov r1, #64 + mov r0, r7 + bl flash_wait_device_ready + tst r0, #64 + movne r3, #48 + mlane r4, r3, r5, r4 + movne r3, #7 + strne r0, [r4, #1268] + strbne r3, [r4, #1274] + b .L2719 +.L2780: + .align 2 +.L2779: + .word .LANCHOR0 + .word .LANCHOR3 + .word .LANCHOR2 + .word .LC173 + .word .LANCHOR1+2034 + .word .LC0 + .word .LC174 + .word 1145785929 + .word .LANCHOR0+1232 + .word .LC175 + .word .LC176 + .word .LC177 + .fnend + .size queue_wait_first_req_completed, .-queue_wait_first_req_completed + .align 2 + .global sblk_prog_page + .syntax unified + .arm + .fpu softvfp + .type sblk_prog_page, %function +sblk_prog_page: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #12 + mov r4, r0 + ldrh r3, [r0, #34] + mov r5, r1 + cmp r3, #0 + beq .L2782 + ldr r3, .L2812 + ldr r3, [r3] + tst r3, #256 + beq .L2782 + mov r2, r1 + ldr r1, [r0, #24] + ldr r0, .L2812+4 + bl rk_printk +.L2782: + ldr r8, .L2812+8 + mov r6, #0 + ldr fp, .L2812+12 +.L2783: + cmp r5, #0 + bne .L2794 +.L2810: + mov r0, #0 + add sp, sp, #12 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2794: + ldrb r9, [r4] @ zero_extendqisi2 + ldr r7, [r4, #24] +.L2784: + mov r1, #1 + mov r0, r7 + bl queue_lun_state + cmp r0, #0 + bne .L2785 + cmp r5, #1 + beq .L2786 + ldrb r3, [r8, #1194] @ zero_extendqisi2 + cmp r3, #0 + beq .L2786 + ldrb r3, [r8, #1159] @ zero_extendqisi2 + cmp r3, #0 + beq .L2787 +.L2786: + mov r0, r4 + bl queue_prog_cmd +.L2788: + subs r5, r5, #1 + beq .L2810 + ldr r4, .L2812+16 + add r9, r9, r9, lsl #1 + add r4, r4, r9, lsl #4 + b .L2783 +.L2785: + bl queue_wait_first_req_completed + bl queue_remove_completed_req + b .L2784 +.L2787: + ldrb r2, [r8, #1153] @ zero_extendqisi2 + mvn r3, #0 + rsb r1, r2, #24 + mvn r3, r3, lsl r2 + ldrb r2, [r4] @ zero_extendqisi2 + and r3, r3, r7, lsr r1 + cmp r2, #255 + uxth r3, r3 + bne .L2789 + movw r2, #697 + ldr r1, .L2812+20 + ldr r0, .L2812+24 + str r3, [sp, #4] + bl rk_printk + bl dump_stack + ldr r3, [sp, #4] +.L2789: + ldrb r2, [r4] @ zero_extendqisi2 + mov r1, #48 + mov r10, #1 + mla r2, r1, r2, r8 + ldrb r1, [r8, #1153] @ zero_extendqisi2 + ldr r0, [r2, #1256] + rsb r2, r1, #24 + lsl r1, r10, r1 + sub r1, r1, #1 + and r1, r1, r0, lsr r2 + uxth r1, r1 + cmp r3, r1 + bne .L2790 + ldr r3, .L2812+28 + ldrb lr, [fp, #-3136] @ zero_extendqisi2 + ldrh ip, [r3, #-2] + sub lr, lr, #1 + sub r3, r2, ip + lsl r3, r10, r3 + lsl r2, r10, ip + sub r3, r3, #1 + sub r2, r2, #1 + and r3, r3, lr + uxth r2, r2 + uxth r3, r3 + and r1, r3, r7, lsr ip + and r3, r3, r0, lsr ip + and ip, r2, r7 + subs r7, r1, r3 + and r2, r2, r0 + movne r7, #1 + cmp ip, r2 + movne r7, #0 + cmp r7, #0 + beq .L2790 + cmp r6, lr + beq .L2790 + ldr r3, [r4, #12] + mov r0, #17 + ldr r2, [r4, #4] + add r6, r6, r10 + ldr r1, [r4, #24] + bl flash_start_page_prog + mov r3, #9 + strb r10, [r4, #43] + strb r3, [r4, #42] + mvn r3, #0 + strb r3, [r4] + mov r1, r4 + ldr r0, .L2812+32 + bl buf_add_tail + b .L2788 +.L2790: + mov r0, r4 + mov r6, #0 + bl queue_prog_cmd + b .L2788 +.L2813: + .align 2 +.L2812: + .word .LANCHOR2 + .word .LC178 + .word .LANCHOR0 + .word .LANCHOR3 + .word .LANCHOR0+1232 + .word .LANCHOR1+2065 + .word .LC0 + .word .LANCHOR3-3136 + .word .LANCHOR0+2770 + .fnend + .size sblk_prog_page, .-sblk_prog_page + .align 2 + .global sblk_wait_write_queue_completed + .syntax unified + .arm + .fpu softvfp + .type sblk_wait_write_queue_completed, %function +sblk_wait_write_queue_completed: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, lr} + .save {r4, lr} + ldr r4, .L2818 +.L2815: + ldrb r3, [r4, #2770] @ zero_extendqisi2 + cmp r3, #255 + bne .L2816 + pop {r4, pc} +.L2816: + bl queue_wait_first_req_completed + bl queue_remove_completed_req + b .L2815 +.L2819: + .align 2 +.L2818: + .word .LANCHOR0 + .fnend + .size sblk_wait_write_queue_completed, .-sblk_wait_write_queue_completed + .align 2 + .global ftl_flush + .syntax unified + .arm + .fpu softvfp + .type ftl_flush, %function +ftl_flush: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + ldr r4, .L2826 + ldr r5, .L2826+4 + ldrb r1, [r4, #2797] @ zero_extendqisi2 + cmp r1, #0 + beq .L2821 + ldrb r3, [r5, #-88] @ zero_extendqisi2 + add r0, r4, #1232 + add r3, r3, r3, lsl #1 + add r0, r0, r3, lsl #4 + bl sblk_prog_page +.L2821: + mvn r3, #0 + strb r3, [r5, #-88] + mov r3, #0 + strb r3, [r4, #2797] + bl sblk_wait_write_queue_completed + bl ftl_write_completed + movw r0, #65535 + pop {r4, r5, r6, lr} + b ftl_vpn_decrement +.L2827: + .align 2 +.L2826: + .word .LANCHOR0 + .word .LANCHOR3 + .fnend + .size ftl_flush, .-ftl_flush + .align 2 + .global zftl_cache_flush + .syntax unified + .arm + .fpu softvfp + .type zftl_cache_flush, %function +zftl_cache_flush: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L2836 + ldrb r3, [r3, #2797] @ zero_extendqisi2 + cmp r3, #0 + bxeq lr + push {r4, lr} + .save {r4, lr} + bl timer_get_time + ldr r3, .L2836+4 + ldr r3, [r3, #-84] + add r3, r3, #100 + cmp r0, r3 + popls {r4, pc} + pop {r4, lr} + b ftl_flush +.L2837: + .align 2 +.L2836: + .word .LANCHOR0 + .word .LANCHOR3 + .fnend + .size zftl_cache_flush, .-zftl_cache_flush + .align 2 + .global ftl_read_page + .syntax unified + .arm + .fpu softvfp + .type ftl_read_page, %function +ftl_read_page: + .fnstart + @ args = 4, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + mov r4, r0 + ldr r8, [sp, #24] + mov r5, r1 + mov r6, r2 + mov r7, r3 + bl sblk_wait_write_queue_completed + mov r3, r7 + str r8, [sp, #24] + mov r2, r6 + mov r1, r5 + mov r0, r4 + pop {r4, r5, r6, r7, r8, lr} + b flash_read_page_en + .fnend + .size ftl_read_page, .-ftl_read_page + .align 2 + .global ftl_read_ppa_page + .syntax unified + .arm + .fpu softvfp + .type ftl_read_ppa_page, %function +ftl_read_ppa_page: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + .pad #8 + mov r8, r3 + ldr r3, .L2842 + mov r5, r0 + mvn r4, #0 + mov r6, r1 + mov r7, r2 + ldrb r0, [r3, #1153] @ zero_extendqisi2 + rsb r3, r0, #24 + mvn r4, r4, lsl r0 + and r4, r4, r5, lsr r3 + uxtb r4, r4 + bl sblk_wait_write_queue_completed + mov r3, r7 + str r8, [sp] + mov r2, r6 + mov r1, r5 + mov r0, r4 + bl flash_read_page_en + add sp, sp, #8 + @ sp needed + pop {r4, r5, r6, r7, r8, pc} +.L2843: + .align 2 +.L2842: + .word .LANCHOR0 + .fnend + .size ftl_read_ppa_page, .-ftl_read_ppa_page + .align 2 + .global sblk_read_page + .syntax unified + .arm + .fpu softvfp + .type sblk_read_page, %function +sblk_read_page: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #12 + mov r10, r0 + mov r7, r1 + mov r4, r0 + mov r5, r1 +.L2845: + cmp r5, #0 + bne .L2855 +.L2868: + ldr r4, .L2870 +.L2856: + cmp r7, #0 + bne .L2858 + mov r0, r7 + add sp, sp, #12 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2855: + ldrb r8, [r4] @ zero_extendqisi2 + ldr fp, [r4, #24] +.L2846: + mov r1, #0 + mov r0, fp + bl queue_lun_state + cmp r0, #0 + bne .L2847 + cmp r5, #1 + beq .L2852 + ldr r3, .L2870+4 + ldrb r3, [r3, #-80] @ zero_extendqisi2 + cmp r3, #0 + bne .L2849 +.L2852: + mov r0, r4 + bl queue_read_cmd + b .L2850 +.L2847: + bl queue_wait_first_req_completed + bl queue_remove_completed_req + b .L2846 +.L2849: + ldr r3, .L2870+8 + ldrb r2, [r3, #1153] @ zero_extendqisi2 + mvn r3, #0 + rsb r1, r2, #24 + mvn r3, r3, lsl r2 + ldrb r2, [r4] @ zero_extendqisi2 + and r3, r3, fp, lsr r1 + cmp r2, #255 + uxth r3, r3 + bne .L2851 + movw r2, #782 + ldr r1, .L2870+12 + ldr r0, .L2870+16 + str r3, [sp] + bl rk_printk + bl dump_stack + ldr r3, [sp] +.L2851: + ldr r2, .L2870+8 + mov r6, #48 + ldrb r9, [r4] @ zero_extendqisi2 + ldrb ip, [r2, #1153] @ zero_extendqisi2 + mla r6, r6, r9, r2 + mvn r2, #0 + mvn r2, r2, lsl ip + rsb r0, ip, #24 + ldr r1, [r6, #1256] + and r2, r2, r1, lsr r0 + uxth r2, r2 + cmp r3, r2 + bne .L2852 + ldr r3, .L2870+20 + ldrh r3, [r3] + add fp, r3, fp + cmp r1, fp + bne .L2852 + ldr r0, [r4, #24] + mvn fp, #0 + ldrb r8, [r6, #1232] @ zero_extendqisi2 + add r9, r9, r9, lsl #1 + add r5, r5, fp + bl flash_start_plane_read + mov r2, #2 + mov r3, #0 + strb r2, [r4, #42] + mov r1, r4 + strb r3, [r4, #43] + ldr r0, .L2870+24 + strb fp, [r4] + str r2, [sp, #4] + str r3, [sp] + bl buf_add_tail + ldr r1, .L2870 + ldr r2, [sp, #4] + ldr r3, [sp] + strb fp, [r6, #1232] + strb r2, [r6, #1274] + add r1, r1, r9, lsl #4 + strb r3, [r6, #1275] + ldr r0, .L2870+24 + bl buf_add_tail +.L2850: + subs r5, r5, #1 + beq .L2868 + ldr r4, .L2870 + add r8, r8, r8, lsl #1 + add r4, r4, r8, lsl #4 + b .L2845 +.L2858: + ldrb r3, [r10, #42] @ zero_extendqisi2 + cmp r3, #13 + bne .L2857 + ldrb r3, [r10] @ zero_extendqisi2 + sub r7, r7, #1 + cmp r3, #255 + addne r3, r3, r3, lsl #1 + addne r10, r4, r3, lsl #4 +.L2857: + bl queue_wait_first_req_completed + bl queue_remove_completed_req + b .L2856 +.L2871: + .align 2 +.L2870: + .word .LANCHOR0+1232 + .word .LANCHOR3 + .word .LANCHOR0 + .word .LANCHOR1+2080 + .word .LC0 + .word .LANCHOR3-3074 + .word .LANCHOR0+2770 + .fnend + .size sblk_read_page, .-sblk_read_page + .align 2 + .global gc_check_data_one_wl + .syntax unified + .arm + .fpu softvfp + .type gc_check_data_one_wl, %function +gc_check_data_one_wl: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #28 + sub sp, sp, #28 + ldr r5, .L2906 + ldr r3, [r5, #2832] + ldr r10, [r5, #1096] + cmp r3, #0 + bne .L2873 + mov r0, #1 + bl buf_alloc + str r0, [r5, #2832] +.L2873: + ldr r4, [r5, #2832] + cmp r4, #0 + bne .L2874 + movw r2, #729 + ldr r1, .L2906+4 + ldr r0, .L2906+8 + bl rk_printk + bl dump_stack +.L2874: + ldr r7, .L2906+12 + add fp, r10, #96 + mov r9, #0 +.L2875: + ldrb r3, [r10, #89] @ zero_extendqisi2 + ldr r6, .L2906+16 + cmp r9, r3 + bge .L2886 + mov r8, #1 + b .L2887 +.L2885: + ldr r2, .L2906+20 + ldrb r1, [r7, #-3128] @ zero_extendqisi2 + ldrh r3, [fp] + ldrh r2, [r2, #-2] + cmp r1, #2 + mul r2, r2, r3 + beq .L2876 + ldrb r3, [r5, #1158] @ zero_extendqisi2 + cmp r3, #0 + beq .L2877 +.L2876: + ldrh r3, [r6, #12] + sub r3, r3, #1 + add r3, r3, r2 + add r3, r3, r8 + orr r3, r3, r1, lsl #24 +.L2905: + str r3, [r4, #24] + mov r1, #1 + mov r0, r4 + bl sblk_read_page + ldr r2, [r4, #36] + cmn r2, #1 + beq .L2881 + ldr r0, [r7, #-132] + ldrh r1, [r6, #18] + ldr r3, [r4, #12] + ldr ip, [r0, r1, lsl #2] + ldr r0, [r3, #4] + cmp ip, r0 + bne .L2881 + ldr r0, [r7, #-128] + ldr r3, [r3, #8] + ldr r1, [r0, r1, lsl #2] + cmp r1, r3 + beq .L2882 +.L2881: + ldrh r3, [r6, #18] + ldr r1, [r7, #-132] + lsl r0, r3, #2 + ldr r3, [r1, r3, lsl #2] + cmn r3, #1 + beq .L2882 + ldr r1, .L2906+24 + ldr r1, [r1] + tst r1, #1024 + beq .L2883 + ldr r1, [r4, #12] + ldr ip, [r1, #12] + str ip, [sp, #16] + ldr ip, [r1, #8] + str ip, [sp, #12] + ldr ip, [r1, #4] + str ip, [sp, #8] + ldr r1, [r1] + str r1, [sp, #4] + ldr r1, [r7, #-128] + ldr r1, [r1, r0] + ldr r0, .L2906+28 + str r1, [sp] + ldr r1, [r4, #24] + bl rk_printk +.L2883: + ldrh r3, [r10, #80] + mov r1, #0 + ldr r2, [r5, #1092] + lsl r3, r3, #1 + strh r1, [r2, r3] @ movhi + ldr r2, [r5, #1096] + ldr r3, [r2, #556] + add r3, r3, #1 + str r3, [r2, #556] + ldr r3, [r5, #2800] + ldr r2, [r3, #156] + ldr r3, .L2906+32 + cmp r2, r3 + bne .L2890 + ldrb r3, [r7, #-2542] @ zero_extendqisi2 + cmp r3, r1 + bne .L2890 + ldrb r3, [r7, #-3126] @ zero_extendqisi2 + cmp r3, r1 + bne .L2890 + ldr r0, [r4, #24] + bl ftl_mask_bad_block +.L2890: + mvn r0, #0 + b .L2872 +.L2877: + ldrh r3, [r6, #12] + cmp r1, #3 + addne r3, r3, r2 + bne .L2905 + ldrb r1, [r5, #1159] @ zero_extendqisi2 + cmp r1, #0 + addne r3, r3, r3, lsl #1 + addeq r3, r3, r2 + orreq r3, r3, r8, lsl #24 + subne r3, r3, #1 + addne r3, r3, r2 + addne r3, r3, r8 + orrne r3, r3, #50331648 + b .L2905 +.L2882: + ldrh r3, [r6, #18] + add r8, r8, #1 + add r3, r3, #1 + strh r3, [r6, #18] @ movhi +.L2887: + ldrh r3, [r6, #16] + cmp r8, r3 + ble .L2885 + add r9, r9, #1 + add fp, fp, #2 + b .L2875 +.L2886: + ldrh r3, [r6, #12] + add r2, r3, #1 + strh r2, [r6, #12] @ movhi + ldr r2, .L2906+12 + ldrb r0, [r2, #-3126] @ zero_extendqisi2 + cmp r0, #0 + movne r0, #0 + addne r3, r3, #2 + strhne r3, [r6, #12] @ movhi +.L2884: +.L2872: + add sp, sp, #28 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2907: + .align 2 +.L2906: + .word .LANCHOR0 + .word .LANCHOR1+2095 + .word .LC0 + .word .LANCHOR3 + .word .LANCHOR0+2824 + .word .LANCHOR3-3072 + .word .LANCHOR2 + .word .LC179 + .word 1145785929 + .fnend + .size gc_check_data_one_wl, .-gc_check_data_one_wl + .align 2 + .global sblk_tlc_prog_one_page + .syntax unified + .arm + .fpu softvfp + .type sblk_tlc_prog_one_page, %function +sblk_tlc_prog_one_page: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + mov r4, r0 + ldr r3, [r0] + ldr r6, [r3, #24] +.L2909: + mov r1, #1 + mov r0, r6 + bl queue_lun_state + subs r5, r0, #0 + bne .L2910 + mov r0, r4 + mov r1, #1 + bl queue_tlc_prog_cmd + mov r0, r5 + pop {r4, r5, r6, pc} +.L2910: + bl queue_wait_first_req_completed + bl queue_remove_completed_req + b .L2909 + .fnend + .size sblk_tlc_prog_one_page, .-sblk_tlc_prog_one_page + .align 2 + .global sblk_xlc_prog_pages + .syntax unified + .arm + .fpu softvfp + .type sblk_xlc_prog_pages, %function +sblk_xlc_prog_pages: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r5, r0 + ldr r3, [r0] + .pad #20 + sub sp, sp, #20 + mov r7, r1 + mov fp, r2 + ldr r4, [r3, #24] +.L2913: + mov r1, #1 + mov r0, r4 + bl queue_lun_state + subs r10, r0, #0 + bne .L2914 + cmp fp, #2 + bne .L2915 + ldr r1, .L2925 + ldr lr, [r7] + ldrb r3, [r1, #1194] @ zero_extendqisi2 + cmp r3, #0 + ldreq r4, [lr, #24] + beq .L2920 + ldrb r3, [r1, #1153] @ zero_extendqisi2 + mov r9, #1 + ldr r2, [r5] + ldr lr, [lr, #24] + rsb r0, r3, #24 + ldr ip, [r2, #24] + lsl r4, r9, r3 + ldrb r3, [r1, #1159] @ zero_extendqisi2 + lsl r6, r9, r0 + sub r4, r4, #1 + sub r6, r6, #1 + and r4, r4, ip, lsr r0 + cmp r3, #0 + and r8, ip, r6 + uxtb r4, r4 + and r6, r6, lr + beq .L2917 + mov r0, r4 + bl zftl_flash_exit_slc_mode + ldr r3, [r5] + mov r1, r9 + mov r0, r10 + ldr r2, [r3, #12] + str r2, [sp, #8] + mov r2, #17 + ldr r3, [r3, #4] + str r8, [sp] + str r3, [sp, #4] + mov r3, r4 + bl flash_start_one_pass_page_prog + bl nandc_wait_flash_ready + ldr r3, [r7] + mov r1, r9 + mov r0, r10 + ldr r2, [r3, #12] + str r2, [sp, #8] + mov r2, #26 + ldr r3, [r3, #4] + str r6, [sp] + str r3, [sp, #4] + mov r3, r4 + bl flash_start_one_pass_page_prog + bl nandc_wait_flash_ready + ldr r3, [r5, #4] + mov r1, fp + mov r0, r10 + ldr r2, [r3, #12] + str r2, [sp, #8] + mov r2, #17 + ldr r3, [r3, #4] + str r3, [sp, #4] + add r3, r8, r9 + str r3, [sp] + mov r3, r4 + bl flash_start_one_pass_page_prog + bl nandc_wait_flash_ready + ldr r3, [r7, #4] + mov r1, fp + mov r0, r10 + add r8, r8, #2 + ldr r2, [r3, #12] + str r2, [sp, #8] + mov r2, #26 + ldr r3, [r3, #4] + str r3, [sp, #4] + add r3, r6, r9 + str r3, [sp] + mov r3, r4 + bl flash_start_one_pass_page_prog + bl nandc_wait_flash_ready + ldr r3, [r5, #8] + mov r1, #3 + mov r0, r10 + add r6, r6, #2 + ldr r2, [r3, #12] + str r2, [sp, #8] + mov r2, #17 + ldr r3, [r3, #4] + str r8, [sp] + str r3, [sp, #4] + mov r3, r4 + bl flash_start_one_pass_page_prog + bl nandc_wait_flash_ready + ldr r3, [r7, #8] + mov r1, #3 + mov r0, r10 + ldr r2, [r3, #12] + str r2, [sp, #8] + mov r2, #16 + ldr r3, [r3, #4] + str r6, [sp] + str r3, [sp, #4] + mov r3, r4 + bl flash_start_one_pass_page_prog +.L2918: + ldr r1, [r5] + mov r3, #5 + ldr r0, .L2925+4 + strb r3, [r1, #42] + mov r3, #1 + strb r3, [r1, #43] + mvn r3, #0 + strb r3, [r1] + bl buf_add_tail +.L2919: + mov r0, #0 + add sp, sp, #20 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2914: + bl queue_wait_first_req_completed + bl queue_remove_completed_req + b .L2913 +.L2917: + ldr r3, [r2, #12] + mov r1, r9 + ldrb r0, [r2, #44] @ zero_extendqisi2 + str r3, [sp, #8] + ldr r3, [r2, #4] + mov r2, #17 + str r8, [sp] + str r3, [sp, #4] + mov r3, r4 + bl flash_start_tlc_page_prog + bl nandc_wait_flash_ready + ldr r3, [r7] + mov r1, r9 + ldr r2, [r5] + ldrb r0, [r2, #44] @ zero_extendqisi2 + ldr r2, [r3, #12] + str r2, [sp, #8] + mov r2, #26 + ldr r3, [r3, #4] + str r6, [sp] + str r3, [sp, #4] + mov r3, r4 + bl flash_start_tlc_page_prog + bl nandc_wait_flash_ready + ldm r5, {r2, r3} + mov r1, fp + ldrb r0, [r2, #44] @ zero_extendqisi2 + ldr r2, [r3, #12] + str r2, [sp, #8] + mov r2, #17 + ldr r3, [r3, #4] + str r8, [sp] + str r3, [sp, #4] + mov r3, r4 + bl flash_start_tlc_page_prog + bl nandc_wait_flash_ready + ldr r3, [r7, #4] + mov r1, fp + ldr r2, [r5] + ldrb r0, [r2, #44] @ zero_extendqisi2 + ldr r2, [r3, #12] + str r2, [sp, #8] + mov r2, #26 + ldr r3, [r3, #4] + str r6, [sp] + str r3, [sp, #4] + mov r3, r4 + bl flash_start_tlc_page_prog + bl nandc_wait_flash_ready + ldr r3, [r5, #8] + mov r1, #3 + ldr r2, [r5] + ldrb r0, [r2, #44] @ zero_extendqisi2 + ldr r2, [r3, #12] + str r2, [sp, #8] + mov r2, #17 + ldr r3, [r3, #4] + str r8, [sp] + str r3, [sp, #4] + mov r3, r4 + bl flash_start_tlc_page_prog + bl nandc_wait_flash_ready + ldr r3, [r7, #8] + mov r1, #3 + ldr r2, [r5] + ldrb r0, [r2, #44] @ zero_extendqisi2 + ldr r2, [r3, #12] + str r2, [sp, #8] + mov r2, #16 + ldr r3, [r3, #4] + str r6, [sp] + str r3, [sp, #4] + mov r3, r4 + bl flash_start_tlc_page_prog + b .L2918 +.L2921: + bl queue_wait_first_req_completed + bl queue_remove_completed_req +.L2920: + mov r1, #1 + mov r0, r4 + bl queue_lun_state + subs r6, r0, #0 + bne .L2921 + mov r1, #1 + mov r0, r5 + bl queue_tlc_prog_cmd + mov r1, r6 + mov r0, r7 + bl queue_tlc_prog_cmd +.L2922: + mov r1, #1 + mov r0, r4 + bl queue_lun_state + cmp r0, #0 + beq .L2919 + bl queue_wait_first_req_completed + bl queue_remove_completed_req + b .L2922 +.L2915: + mov r1, #1 + mov r0, r5 + bl queue_tlc_prog_cmd + b .L2919 +.L2926: + .align 2 +.L2925: + .word .LANCHOR0 + .word .LANCHOR0+2770 + .fnend + .size sblk_xlc_prog_pages, .-sblk_xlc_prog_pages + .align 2 + .global sblk_3d_mlc_prog_pages + .syntax unified + .arm + .fpu softvfp + .type sblk_3d_mlc_prog_pages, %function +sblk_3d_mlc_prog_pages: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + .pad #8 + mov r7, r1 + ldr r9, .L2933 + add r5, r0, #8 + mov r8, #1 + ldr r10, .L2933+4 +.L2928: + cmp r7, #0 + bne .L2931 + mov r0, r7 + add sp, sp, #8 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L2931: + ldr r3, [r5, #-8] + ldr r4, [r3, #24] +.L2929: + mov r1, #1 + mov r0, r4 + bl queue_lun_state + cmp r0, #0 + bne .L2930 + ldr r3, [r5, #-8] + sub r7, r7, #1 + add r5, r5, #8 + ldr r1, [r3, #24] + ldrb r3, [r9, #1153] @ zero_extendqisi2 + rsb r2, r3, #24 + lsl r4, r8, r3 + lsl r6, r8, r2 + sub r4, r4, #1 + sub r6, r6, #1 + and r4, r4, r1, lsr r2 + and r6, r6, r1 + uxtb r4, r4 + mov r0, r4 + bl zftl_flash_exit_slc_mode + ldr r3, [r5, #-16] + mov r1, r4 + mov r0, #16 + ldr r2, [r3, #12] + str r2, [sp] + mov r2, r6 + ldr r3, [r3, #4] + bl flash_start_3d_mlc_page_prog + bl nandc_wait_flash_ready + ldr r3, [r5, #-12] + mov r1, r4 + mov r0, #16 + ldr r2, [r3, #12] + str r2, [sp] + add r2, r6, #1 + ldr r3, [r3, #4] + bl flash_start_3d_mlc_page_prog + bl nandc_de_cs.constprop.35 + ldr r1, [r5, #-16] + mov r3, #4 + mov r0, r10 + strb r3, [r1, #42] + mvn r3, #0 + strb r8, [r1, #43] + strb r3, [r1] + bl buf_add_tail + b .L2928 +.L2930: + bl queue_wait_first_req_completed + bl queue_remove_completed_req + b .L2929 +.L2934: + .align 2 +.L2933: + .word .LANCHOR0 + .word .LANCHOR0+2770 + .fnend + .size sblk_3d_mlc_prog_pages, .-sblk_3d_mlc_prog_pages + .align 2 + .global flash_prog_page_en + .syntax unified + .arm + .fpu softvfp + .type flash_prog_page_en, %function +flash_prog_page_en: + .fnstart + @ args = 8, pretend = 0, frame = 16 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #28 + sub sp, sp, #28 + mov r10, r3 + ldr r4, .L2966 + mov r8, r0 + mov r5, r1 + ldrb r3, [sp, #68] @ zero_extendqisi2 + mov fp, r2 + ubfx r7, r1, #24, #2 + str r3, [sp, #20] + ldrb r3, [r4, #1109] @ zero_extendqisi2 + cmp r3, r0 + bhi .L2936 + movw r2, #642 + ldr r1, .L2966+4 + ldr r0, .L2966+8 + bl rk_printk + bl dump_stack +.L2936: + ldrb r3, [r4, #1109] @ zero_extendqisi2 + cmp r3, r8 + mvnls r0, #0 + bls .L2935 + add r3, r4, r8 + cmp r7, #0 + ldrb r3, [r3, #1144] @ zero_extendqisi2 + str r3, [sp, #12] + bne .L2949 + ldrb r3, [r4] @ zero_extendqisi2 + cmp r3, #0 + beq .L2939 + ldrb r3, [r4, #1] @ zero_extendqisi2 + cmp r3, #0 + beq .L2949 +.L2939: + ldrh r7, [r4, #2] + mov r0, r5 + mov r1, r7 + bl __aeabi_uidiv + mov r1, r7 + mul r6, r7, r0 + mov r0, r5 + bl __aeabi_uidivmod + ldrb r3, [r4, #1] @ zero_extendqisi2 + lsl r1, r1, #1 + cmp r3, #0 + addeq r4, r4, r1 + ldrheq r1, [r4, #4] + add r6, r1, r6 +.L2938: + ldr r4, .L2966+12 + ldr r7, .L2966+16 +.L2944: + ldr r3, [r4] + tst r3, #16 + beq .L2941 + mov r3, r6 + mov r2, r5 + ldr r1, [sp, #12] + ldr r0, .L2966+20 + bl rk_printk +.L2941: + ldr r3, [sp, #64] + mov r2, fp + mov r1, r6 + ldr r0, [sp, #12] + str r3, [sp] + mov r3, r10 + bl flash_prog_page + ldr r3, [sp, #20] + str r0, [sp, #16] + cmp r3, #0 + beq .L2942 + ldr r3, [sp, #64] + mov r1, r5 + mov r0, r8 + str r3, [sp] + ldr r3, [r7, #-96] + ldr r2, [r7, #-92] + bl flash_read_page_en + cmn r0, #1 + cmpne r0, #512 + mov r9, r0 + beq .L2943 + ldr r3, [r7, #-92] + ldr r2, [fp] + ldr r3, [r3] + cmp r2, r3 + bne .L2943 + ldr r3, [r7, #-96] + ldr r2, [r10] + ldr r3, [r3] + cmp r2, r3 + beq .L2942 +.L2943: + mov r3, #4 + mov r1, fp + mov r2, r3 + ldr r0, .L2966+24 + bl rknand_print_hex + mov r3, #4 + mov r1, r10 + mov r2, r3 + ldr r0, .L2966+28 + bl rknand_print_hex + mov r3, #4 + ldr r1, [r7, #-96] + mov r2, r3 + ldr r0, .L2966+32 + bl rknand_print_hex + mov r3, #4 + ldr r1, [r7, #-92] + mov r2, r3 + ldr r0, .L2966+36 + bl rknand_print_hex + cmp r9, #512 + beq .L2944 +.L2946: + mov r1, r5 + ldr r0, .L2966+40 + bl rk_printk + mvn r4, #0 + movw r2, #685 + ldr r1, .L2966+4 + ldr r0, .L2966+8 + bl rk_printk + bl dump_stack +.L2945: + mov r0, r4 +.L2935: + add sp, sp, #28 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2949: + mov r6, r5 + b .L2938 +.L2942: + ldr r4, [sp, #16] + cmn r4, #1 + bne .L2945 + b .L2946 +.L2967: + .align 2 +.L2966: + .word .LANCHOR0 + .word .LANCHOR1+2116 + .word .LC0 + .word .LANCHOR2 + .word .LANCHOR3 + .word .LC180 + .word .LC181 + .word .LC182 + .word .LC183 + .word .LC184 + .word .LC185 + .fnend + .size flash_prog_page_en, .-flash_prog_page_en + .align 2 + .global ftl_prog_page + .syntax unified + .arm + .fpu softvfp + .type ftl_prog_page, %function +ftl_prog_page: + .fnstart + @ args = 4, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r4, r5, r6, r7, lr} + .save {r4, r5, r6, r7, lr} + .pad #12 + mov r4, r0 + mov r7, r3 + mov r5, r1 + mov r6, r2 + bl sblk_wait_write_queue_completed + mov r3, #1 + mov r0, r4 + str r3, [sp, #4] + mov r2, r6 + ldr r3, [sp, #32] + mov r1, r5 + str r3, [sp] + mov r3, r7 + bl flash_prog_page_en + cmn r0, #1 + mov r4, r0 + bne .L2968 + ldr r1, .L2971 + movw r2, #2678 + ldr r0, .L2971+4 + bl rk_printk + bl dump_stack + mov r1, r5 + ldr r0, .L2971+8 + bl rk_printk +.L2968: + mov r0, r4 + add sp, sp, #12 + @ sp needed + pop {r4, r5, r6, r7, pc} +.L2972: + .align 2 +.L2971: + .word .LANCHOR1+2135 + .word .LC0 + .word .LC185 + .fnend + .size ftl_prog_page, .-ftl_prog_page + .align 2 + .global ftl_info_flush + .syntax unified + .arm + .fpu softvfp + .type ftl_info_flush, %function +ftl_info_flush: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r1, #0 + ldr r4, .L3010 + .pad #20 + sub sp, sp, #20 + mov r9, r0 + mov r8, #0 + ldr r6, .L3010+4 + ldrb r2, [r4, #-2546] @ zero_extendqisi2 + ldr r0, [r4, #-76] + ldr r10, .L3010+8 + ldr r7, .L3010+12 + lsl r2, r2, #1 + bl ftl_memset + ldr r3, [r6, #2800] + ldrh r2, [r3, #74] + cmp r2, #1 + movhi r2, #0 + strhhi r2, [r3, #150] @ movhi +.L2987: + ldr r3, .L3010+16 + ldr r2, [r6, #2800] + ldrb r5, [r4, #-56] @ zero_extendqisi2 + ldrh fp, [r3] + ldrh r3, [r4, #-54] + str r3, [sp, #8] + ldr r3, [r2, #4] + add r3, r3, #1 + str r3, [r2, #4] + ldr r3, [r4, #-76] + str r9, [r3] + ldr r2, [r6, #2800] + ldrb r1, [r4, #-2546] @ zero_extendqisi2 + ldr r3, [r4, #-76] + ldr r2, [r2, #4] + ldr r0, [r4, #-52] + lsl r1, r1, #9 + str r3, [sp, #12] + str r2, [r3, #4] + bl js_hash + ldr r3, [sp, #12] + str r0, [r3, #8] + ldr r3, [r10] + tst r3, #4096 + beq .L2975 + ldr r3, [r6, #2800] + ldrh r2, [r4, #-54] + ldrb r1, [r4, #-56] @ zero_extendqisi2 + ldr r3, [r3, #4] + ldr r0, .L3010+20 + bl rk_printk +.L2975: + ldr r3, .L3010+24 + ldrh r0, [r4, #-54] + ldrh r3, [r3] + cmp r3, r0 + bhi .L2976 + ldr fp, .L3010+28 + ldr r5, .L3010+32 +.L2983: + ldrb r3, [r4, #-55] @ zero_extendqisi2 + add r3, r3, #1 + uxtb r3, r3 + cmp r3, #7 + strb r3, [r4, #-55] + bls .L2977 + mov r3, #8 +.L2982: + ldr r2, [r6, #1040] + sub r8, r3, #8 + uxth r8, r8 + add r2, r2, r3 + ldrb r1, [r2, #32] @ zero_extendqisi2 + add r2, r1, #127 + uxtb r2, r2 + cmp r2, #125 + bhi .L2978 + movw r2, #846 + mov r1, fp + mov r0, r5 + bl rk_printk + bl dump_stack +.L2981: + strb r8, [r4, #-55] + mov r8, #1 +.L2977: + ldr r3, [r6, #1040] + ldrb r2, [r4, #-55] @ zero_extendqisi2 + add r3, r3, r2 + ldrb r3, [r3, #40] @ zero_extendqisi2 + cmp r3, #255 + strb r3, [r4, #-56] + beq .L2983 + ldrh r5, [r7, #-2] + mov r0, #0 + mul r5, r3, r5 + mov r1, r5 + bl flash_erase_block + ldrb r3, [r4, #-2546] @ zero_extendqisi2 + mov r1, r5 + ldr r2, [r4, #-52] + mov r0, #0 + str r3, [sp] + ldr r3, [r4, #-76] + bl ftl_prog_page + mov r3, #1 + add r5, r5, r3 + strh r3, [r4, #-54] @ movhi +.L2984: + ldrb r3, [r4, #-2546] @ zero_extendqisi2 + mov r1, r5 + ldr r2, [r4, #-52] + mov r0, #0 + str r3, [sp] + ldr r3, [r4, #-76] + bl ftl_prog_page + ldrh r3, [r4, #-54] + cmn r0, #1 + add r3, r3, #1 + strh r3, [r4, #-54] @ movhi + beq .L2985 + ldrb r3, [r4, #-48] @ zero_extendqisi2 + cmp r3, #0 + beq .L2986 +.L2985: + mov r3, #0 + strb r3, [r4, #-48] + b .L2987 +.L2978: + cmp r1, #255 + bne .L2981 + add r3, r3, #1 + cmp r3, #16 + bne .L2982 + mov r8, #8 + b .L2981 +.L2976: + ldr r3, [sp, #8] + cmp r0, #0 + mla r5, fp, r5, r3 + bne .L2984 + mov r1, r5 + bl flash_erase_block + b .L2984 +.L2986: + cmp r8, #1 + beq .L2988 +.L2996: + ldrb r3, [r4, #-56] @ zero_extendqisi2 + cmp r3, #255 + bne .L2990 + movw r2, #890 + ldr r1, .L3010+28 + ldr r0, .L3010+32 + bl rk_printk + bl dump_stack +.L2990: + mov r0, #0 + add sp, sp, #20 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L2988: + ldrb r5, [r4, #-55] @ zero_extendqisi2 + ldr r8, .L3010+28 + ldr r9, .L3010+32 + add r5, r5, #1 +.L2991: + cmp r5, #7 + bhi .L2996 + ldr r3, [r6, #1040] + add r3, r3, r5 + ldrb r10, [r3, #40] @ zero_extendqisi2 + add r3, r10, #127 + uxtb r3, r3 + cmp r3, #125 + bhi .L2992 + movw r2, #881 + mov r1, r8 + mov r0, r9 + bl rk_printk + bl dump_stack +.L2993: + ldrh r1, [r7, #-2] + mov r0, #0 + mul r1, r10, r1 + bl flash_erase_block + b .L2994 +.L2992: + cmp r10, #255 + bne .L2993 +.L2994: + add r5, r5, #1 + uxth r5, r5 + b .L2991 +.L3011: + .align 2 +.L3010: + .word .LANCHOR3 + .word .LANCHOR0 + .word .LANCHOR2 + .word .LANCHOR3-3072 + .word .LANCHOR3-3074 + .word .LC186 + .word .LANCHOR3-3096 + .word .LANCHOR1+2149 + .word .LC0 + .fnend + .size ftl_info_flush, .-ftl_info_flush + .align 2 + .global ftl_info_blk_init + .syntax unified + .arm + .fpu softvfp + .type ftl_info_blk_init, %function +ftl_info_blk_init: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r3, #1 + ldr r4, .L3043 + mov r6, #0 + mov r1, r6 + mov r2, #16384 + ldr r5, .L3043+4 + .pad #20 + sub sp, sp, #20 + strb r3, [r4, #-48] + strb r3, [r4, #-46] + movw r3, #1080 + ldr r0, [r4, #-52] + ldrh r3, [r5, r3] + strb r6, [r4, #-47] + str r0, [r5, #1084] + ldr r10, .L3043+8 + add r3, r0, r3, lsl #2 + ldr r9, .L3043+12 + str r3, [r5, #2800] + bl ftl_memset + mov r1, r6 + mov r2, #16384 + ldr r0, [r4, #-44] + bl ftl_memset + ldr r3, [r5, #1040] + strb r6, [r4, #-55] + strh r6, [r4, #-54] @ movhi + mov r6, #7 + ldrb r3, [r3, #40] @ zero_extendqisi2 + strb r3, [r4, #-56] +.L3014: + ldr r3, [r5, #1040] + sxth r8, r6 + add r3, r3, r6 + ldrb r7, [r3, #40] @ zero_extendqisi2 + cmp r7, #255 + bne .L3013 +.L3018: + subs r6, r6, #1 + bcs .L3014 + mov r7, r6 + mov r8, #0 +.L3015: + ldr r6, .L3043+8 + ldr r3, [r6] + tst r3, #4096 + beq .L3019 + ldr r3, [r5, #2800] + mov r2, #4800 + mov r1, r7 + ldr r0, .L3043+16 + ldr r3, [r3] + bl rk_printk +.L3019: + cmn r7, #1 + bne .L3020 + mov r2, #16384 + mov r1, #0 + ldr r0, [r4, #-52] + bl ftl_memset + ldr r3, [r5, #2800] + ldr r2, .L3043+12 + str r2, [r3] + ldr r2, .L3043+20 + ldr r3, [r5, #2800] + str r2, [r3, #12] +.L3042: + mov r0, r7 +.L3012: + add sp, sp, #20 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L3013: + ldr r3, .L3043+24 + mov r0, #0 + ldr r2, [r4, #-52] + ldrh r3, [r3] + mul r7, r7, r3 + ldrb r3, [r4, #-2546] @ zero_extendqisi2 + str r3, [sp] + mov r1, r7 + ldr r3, [r4, #-76] + bl ftl_read_page + cmn r0, #1 + mov fp, r0 + bne .L3016 + ldrb r3, [r4, #-2546] @ zero_extendqisi2 + add r1, r7, #1 + ldr r2, [r4, #-52] + mov r0, #0 + str r3, [sp] + ldr r3, [r4, #-76] + bl ftl_read_page + mov fp, r0 +.L3016: + ldr r3, [r10] + tst r3, #4096 + beq .L3017 + ldr r3, [r5, #2800] + mov r2, fp + mov r1, r6 + ldr r0, .L3043+28 + ldr r3, [r3] + str r3, [sp] + movw r3, #749 + bl rk_printk +.L3017: + cmn fp, #1 + beq .L3018 + ldr r3, [r5, #2800] + ldr r3, [r3] + cmp r3, r9 + bne .L3018 + mov r7, r8 + b .L3015 +.L3020: + ldr r3, [r5, #1040] + mov r0, #0 + ldr r2, [r4, #-52] + mov r7, #0 + strb r8, [r4, #-55] + add r3, r3, r8 + ldr r10, .L3043+12 + ldrb r1, [r3, #40] @ zero_extendqisi2 + mov r3, #4 + str r3, [sp] + ldr r3, [r4, #-76] + strb r1, [r4, #-56] + bl flash_get_last_written_page + uxth r9, r0 + ldrb r8, [r4, #-56] @ zero_extendqisi2 + ldr fp, .L3043+32 + add r3, r9, #1 + uxth r3, r3 + str r3, [sp, #8] + ldr r3, .L3043+36 + ldrh r3, [r3, #-2] + mla r8, r3, r8, r0 +.L3022: + sub r3, r9, r7 + tst r3, #32768 + bne .L3026 + ldrb r3, [r4, #-2546] @ zero_extendqisi2 + sub r1, r8, r7 + ldr r2, [r4, #-52] + mov r0, #0 + str r3, [sp] + ldr r3, [r4, #-76] + bl ftl_read_page + cmn r0, #1 + beq .L3023 + ldr r3, [r5, #2800] + ldr r3, [r3] + cmp r3, r10 + bne .L3023 + ldr r3, [r4, #-76] + ldr r3, [r3, #8] + cmp r3, #0 + bne .L3024 +.L3026: + ldrh r3, [sp, #8] + strh r3, [r4, #-54] @ movhi + bl ftl_tmp_into_update + ldr r2, [r5, #2800] + mov r0, #0 + ldr r3, [r2, #64] + add r3, r3, #1 + str r3, [r2, #64] + bl ftl_info_flush + mov r0, #0 + bl ftl_info_flush + ldr r7, [r6] + ands r7, r7, #16384 + beq .L3042 + ldr r3, [r5, #2800] + ldr r0, .L3043+40 + ldr r1, [r3, #156] + bl rk_printk + mov r0, #0 + b .L3012 +.L3024: + ldrb r1, [r4, #-2546] @ zero_extendqisi2 + ldr r0, [r4, #-52] + str r3, [sp, #12] + lsl r1, r1, #9 + bl js_hash + ldr r3, [sp, #12] + cmp r3, r0 + beq .L3026 + ldr r3, [r4, #-76] + mov r0, fp + ldr r1, [r3, #8] + bl rk_printk +.L3023: + add r7, r7, #1 + b .L3022 +.L3044: + .align 2 +.L3043: + .word .LANCHOR3 + .word .LANCHOR0 + .word .LANCHOR2 + .word 1229739078 + .word .LC188 + .word 393252 + .word .LANCHOR3-3074 + .word .LC187 + .word .LC189 + .word .LANCHOR3-3072 + .word .LC190 + .fnend + .size ftl_info_blk_init, .-ftl_info_blk_init + .align 2 + .global ftl_ext_info_flush + .syntax unified + .arm + .fpu softvfp + .type ftl_ext_info_flush, %function +ftl_ext_info_flush: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r4, r5, r6, r7, r8, r9, lr} + .save {r4, r5, r6, r7, r8, r9, lr} + .pad #12 + bl timer_get_time + ldr r3, .L3061 + ldr r5, .L3061+4 + umull r0, r1, r0, r3 + ldr r3, [r5, #1096] + ldr r0, [r3, #520] + lsr r1, r1, #5 + cmp r1, r0 + bls .L3046 + ldr r2, [r3, #12] + sub r2, r2, r0 + add r2, r2, r1 + str r2, [r3, #12] +.L3060: + str r1, [r3, #520] + b .L3047 +.L3046: + bcc .L3060 +.L3047: + ldr r4, .L3061+8 + mov r0, #0 + bl ftl_total_vpn_update + sub r7, r4, #3136 +.L3051: + ldr r3, [r5, #2800] + ldr r2, [r3, #56] + add r2, r2, #1 + str r2, [r3, #56] + ldrh r2, [r3, #140] + ldr r3, .L3061+12 + ldrh r3, [r3] + cmp r2, r3 + bcc .L3049 + bl ftl_ext_alloc_new_blk +.L3049: + ldr r3, [r5, #2800] + ldrh r2, [r3, #130] + movw r3, #65535 + cmp r2, r3 + bne .L3050 + movw r2, #2211 + ldr r1, .L3061+16 + ldr r0, .L3061+20 + bl rk_printk + bl dump_stack +.L3050: + ldr r2, [r5, #2800] + ldrb r6, [r5, #1153] @ zero_extendqisi2 + ldrh r1, [r7, #-2] + ldrh r3, [r2, #130] + rsb r6, r6, #24 + ldr r0, [r4, #-76] + sub r6, r6, r1 + mvn r1, #0 + asr r8, r3, r6 + bic r6, r3, r1, lsl r6 + ldr r3, .L3061+24 + sxth r6, r6 + ldrh r1, [r3, #-2] + ldrh r3, [r2, #140] + ldrb r2, [r4, #-2546] @ zero_extendqisi2 + mla r6, r1, r6, r3 + lsl r2, r2, #1 + mov r1, #0 + bl ftl_memset + ldr r3, [r4, #-76] + mov r2, #0 + str r2, [r3] + ldr r3, [r5, #2800] + ldrb r1, [r4, #-2546] @ zero_extendqisi2 + ldr r9, [r4, #-76] + ldr r3, [r3, #56] + ldr r0, [r4, #-44] + lsl r1, r1, #9 + str r3, [r9, #4] + bl js_hash + ldrb r3, [r4, #-2546] @ zero_extendqisi2 + mov r1, r6 + str r0, [r9, #8] + uxtb r0, r8 + ldr r2, [r4, #-44] + str r3, [sp] + ldr r3, [r4, #-76] + bl ftl_prog_page + ldr r2, [r5, #2800] + ldrh r3, [r2, #140] + add r3, r3, #1 + uxth r3, r3 + cmp r3, #1 + strh r3, [r2, #140] @ movhi + beq .L3051 + cmn r0, #1 + beq .L3052 + ldrb r0, [r4, #-46] @ zero_extendqisi2 + cmp r0, #0 + beq .L3053 +.L3052: +.L3048: + mov r3, #0 + strb r3, [r4, #-46] + b .L3051 +.L3053: + add sp, sp, #12 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, pc} +.L3062: + .align 2 +.L3061: + .word 1374389535 + .word .LANCHOR0 + .word .LANCHOR3 + .word .LANCHOR3-3096 + .word .LANCHOR1+2164 + .word .LC0 + .word .LANCHOR3-3072 + .fnend + .size ftl_ext_info_flush, .-ftl_ext_info_flush + .align 2 + .global ftl_ext_info_init + .syntax unified + .arm + .fpu softvfp + .type ftl_ext_info_init, %function +ftl_ext_info_init: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r2, #0 + ldr r4, .L3083 + .pad #20 + sub sp, sp, #20 + ldr r5, .L3083+4 + sub r3, r4, #2544 + strh r2, [r3, #-4] @ movhi + sub r2, r4, #3136 + ldr r3, [r5, #2800] + ldrh r2, [r2, #-2] + ldrh r6, [r3, #130] + ldrb r3, [r5, #1153] @ zero_extendqisi2 + rsb r3, r3, #24 + sub r3, r3, r2 + mvn r2, #0 + asr r7, r6, r3 + bic r6, r6, r2, lsl r3 + uxtb r10, r7 + mov r3, #4 + str r3, [sp] + mov r1, r6 + ldr r3, [r4, #-76] + mov r0, r10 + ldr r2, [r4, #-44] + bl flash_get_last_written_page + ldr r3, .L3083+8 + mov r8, r0 + ldr r2, [r3] + str r3, [sp, #8] + tst r2, #4096 + beq .L3064 + ldr r3, [r5, #2800] + uxth r7, r7 + mov r2, #2256 + ldr r1, .L3083+12 + ldrh r3, [r3, #130] + str r7, [sp] + str r3, [sp, #4] + mov r3, r0 + ldr r0, .L3083+16 + bl rk_printk +.L3064: + ldr fp, .L3083+20 + mov r9, #0 +.L3065: + uxth r7, r8 + sub r3, r7, r9 + tst r3, #32768 + bne .L3070 + ldr r3, .L3083+24 + sub r1, r8, r9 + ldrh r0, [r3] + ldrb r3, [r4, #-2546] @ zero_extendqisi2 + mla r1, r6, r0, r1 + str r3, [sp] + ldr r3, [r4, #-76] + ldr r2, [r4, #-44] + mov r0, r10 + bl flash_read_page_en + cmp r0, #512 + cmnne r0, #1 + beq .L3066 + ldr r3, [r5, #1096] + ldr r2, .L3083+28 + ldr r3, [r3] + cmp r3, r2 + bne .L3066 + ldr r3, [r4, #-76] + ldr r3, [r3, #8] + cmp r3, #0 + bne .L3067 +.L3070: + bl zftl_sblk_list_init + ldr r3, [r5, #2800] + ldrh r2, [r3, #140] + cmp r2, r8 + bgt .L3069 + add r7, r7, #1 + strh r7, [r3, #140] @ movhi + bl ftl_ext_info_flush +.L3069: + ldr r4, [r5, #1096] + bl timer_get_time + ldr r3, .L3083+32 + umull r0, r1, r0, r3 + lsr r3, r1, #5 + str r3, [r4, #520] + ldr r4, [r5, #1096] + bl timer_get_time + ldr r3, [r5, #1096] + mov r2, #0 + str r0, [r4, #604] + add r1, r3, #584 + str r2, [r3, #608] + mvn r2, #0 + strh r2, [r1] @ movhi + movw r1, #586 + strh r2, [r3, r1] @ movhi + add r1, r3, #588 + strh r2, [r1] @ movhi + movw r1, #590 + strh r2, [r3, r1] @ movhi + movw r1, #65535 + str r2, [r3, #564] + ldr r2, [sp, #8] + str r1, [r3, #560] + ldr r2, [r2] + tst r2, #4096 + beq .L3072 + ldr r4, [r3, #520] + ldr r5, [r3, #12] + bl timer_get_time + mov r2, r4 + str r0, [sp] + mov r3, r5 + ldr r1, .L3083+12 + ldr r0, .L3083+36 + bl rk_printk +.L3072: + ldr r3, .L3083+40 + mvn r2, #0 + mov r0, #0 + strh r2, [r3, #-4] @ movhi + add sp, sp, #20 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L3067: + ldrb r1, [r4, #-2546] @ zero_extendqisi2 + ldr r0, [r4, #-44] + str r3, [sp, #12] + lsl r1, r1, #9 + bl js_hash + ldr r3, [sp, #12] + cmp r3, r0 + beq .L3070 + ldr r3, [r4, #-76] + mov r0, fp + ldr r1, [r3, #8] + bl rk_printk +.L3066: + add r9, r9, #1 + b .L3065 +.L3084: + .align 2 +.L3083: + .word .LANCHOR3 + .word .LANCHOR0 + .word .LANCHOR2 + .word .LANCHOR1+2183 + .word .LC191 + .word .LC192 + .word .LANCHOR3-3074 + .word 1162432070 + .word 1374389535 + .word .LC193 + .word .LANCHOR3-3152 + .fnend + .size ftl_ext_info_init, .-ftl_ext_info_init + .align 2 + .global ftl_prog_ppa_page + .syntax unified + .arm + .fpu softvfp + .type ftl_prog_ppa_page, %function +ftl_prog_ppa_page: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr ip, .L3087 + push {r0, r1, r2, r4, r5, lr} + .save {r4, r5, lr} + .pad #12 + ldrb r5, [ip, #1153] @ zero_extendqisi2 + mov ip, #1 + str r3, [sp] + mov r3, r2 + mov r2, r1 + rsb r4, r5, #24 + lsl lr, ip, r4 + lsl ip, ip, r5 + sub ip, ip, #1 + sub lr, lr, #1 + and ip, ip, r0, lsr r4 + and r1, lr, r0 + uxtb r0, ip + bl ftl_prog_page + add sp, sp, #12 + @ sp needed + pop {r4, r5, pc} +.L3088: + .align 2 +.L3087: + .word .LANCHOR0 + .fnend + .size ftl_prog_ppa_page, .-ftl_prog_ppa_page + .align 2 + .global ftl_write_last_log_page + .syntax unified + .arm + .fpu softvfp + .type ftl_write_last_log_page, %function +ftl_write_last_log_page: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldrh r3, [r0, #6] + cmp r3, #1 + bne .L3091 + push {r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + mov r4, r0 + ldr r5, .L3097 + ldrh r8, [r0, #12] + ldr r6, [r5, #-2556] + bl ftl_get_new_free_page + cmn r0, #1 + mov r7, r0 + beq .L3092 + ldrh r0, [r4] + add r6, r6, r8, lsl #2 + bl ftl_vpn_decrement + ldr r3, [r5, #-40] + mov r0, r6 + ldr r2, .L3097+4 + str r2, [r3] + sub r3, r5, #3088 + ldrh r3, [r3, #-8] + ldrb r1, [r5, #-3127] @ zero_extendqisi2 + ldr r4, [r5, #-40] + mul r1, r1, r3 + lsl r1, r1, #2 + bl js_hash + ldr r1, [r5, #-40] + str r0, [r4, #4] + mov r4, #0 + mov r2, r4 + mov r0, #2 + str r4, [r1, #8] + str r4, [r1, #12] + str r4, [r1, #16]! + bl ftl_debug_info_fill + ldrb r3, [r5, #-2546] @ zero_extendqisi2 + mov r1, r6 + ldr r2, [r5, #-40] + mov r0, r7 + bl ftl_prog_ppa_page +.L3092: + mov r0, #0 + pop {r4, r5, r6, r7, r8, pc} +.L3091: + mvn r0, #0 + bx lr +.L3098: + .align 2 +.L3097: + .word .LANCHOR3 + .word -178307901 + .fnend + .size ftl_write_last_log_page, .-ftl_write_last_log_page + .align 2 + .global ftl_dump_write_open_sblk + .syntax unified + .arm + .fpu softvfp + .type ftl_dump_write_open_sblk, %function +ftl_dump_write_open_sblk: + .fnstart + @ args = 0, pretend = 0, frame = 64 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + movw r3, #1080 + ldr r4, .L3138 + .pad #108 + sub sp, sp, #108 + ldrh r3, [r4, r3] + cmp r3, r0 + bls .L3099 + ldr r3, .L3138+4 + ldrb r2, [r3, #-3120] @ zero_extendqisi2 + cmp r2, #0 + bne .L3101 + ldrb r2, [r3, #-3126] @ zero_extendqisi2 + cmp r2, #0 + beq .L3099 +.L3101: + ldrb r2, [r4, #1158] @ zero_extendqisi2 + cmp r2, #0 + bne .L3099 + ldr r2, [r4, #1084] + lsl r7, r0, #2 + ldr r5, .L3138+8 + add r1, sp, #88 + mov r10, r0 + strh r0, [sp, #72] @ movhi + add r2, r2, r7 + mov r6, #0 + ldrb r2, [r2, #2] @ zero_extendqisi2 + and r2, r2, #224 + cmp r2, #160 + ldrbeq r8, [r3, #-3128] @ zero_extendqisi2 + movne r8, #1 + bl ftl_get_blk_list_in_sblk + ldrh r3, [r5, #-8] + uxtb r0, r0 + strh r6, [sp, #74] @ movhi + strb r0, [sp, #81] + strb r6, [sp, #77] + smulbb r0, r3, r0 + ldr r3, [r4, #1084] + strh r6, [sp, #82] @ movhi + strh r0, [sp, #78] @ movhi + add r2, r3, r7 + ldr r1, [r3, r10, lsl #2] + ldrb r2, [r2, #2] @ zero_extendqisi2 + ldr r0, .L3138+12 + ubfx r1, r1, #11, #8 + str r1, [sp, #4] + mov r1, r10 + ldrh r3, [r3, r7] + mov r7, r6 + ubfx r3, r3, #0, #11 + str r3, [sp] + ubfx r3, r2, #3, #2 + lsr r2, r2, #5 + bl rk_printk + mov r0, #1 + bl buf_alloc + mov r4, r0 + add r3, r5, #16 + str r6, [sp, #44] + str r3, [sp, #64] +.L3103: + ldr r3, .L3138+16 + uxth r5, r6 + ldrh r3, [r3] + cmp r3, r5 + bls .L3111 + lsl r3, r5, #1 + str r5, [sp, #52] + mov fp, #0 + sub r2, r3, #1 + add r3, r3, r5 + sub r3, r3, #1 + str r2, [sp, #48] + str r3, [sp, #56] + b .L3114 +.L3112: + ldr r2, [sp, #60] + add r3, sp, #104 + add r3, r3, r2 + ldrh r3, [r3, #-32] + str r3, [sp, #40] + movw r3, #65535 + ldr r2, [sp, #40] + cmp r2, r3 + bne .L3104 +.L3110: + add r7, r7, #1 + uxth r7, r7 +.L3105: + cmp r8, r7 + bcs .L3112 + add fp, fp, #1 +.L3114: + uxth r3, fp + uxth r2, fp + str r3, [sp, #44] + ldrb r3, [sp, #81] @ zero_extendqisi2 + cmp r3, r2 + bls .L3113 + mov r7, #1 + add r3, r2, #8 + lsl r3, r3, r7 + str r3, [sp, #60] + b .L3105 +.L3104: + ldr r3, [sp, #64] + cmp r8, #3 + ldr r2, [sp, #40] + ldrh r3, [r3, #-2] + mul r3, r2, r3 + bne .L3106 + ldr r2, .L3138 + ldrb r2, [r2, #1159] @ zero_extendqisi2 + cmp r2, #0 + uxtaheq r3, r3, r6 + ldrne r2, [sp, #56] + orreq r3, r3, r7, lsl #24 + beq .L3108 +.L3137: + add r3, r2, r3 + ldr r2, .L3138+4 + add r3, r3, r7 + ldrb r2, [r2, #-3128] @ zero_extendqisi2 + orr r3, r3, r2, lsl #24 +.L3108: + str r3, [r4, #24] + mov r1, #1 + mov r0, r4 + str r3, [sp, #68] + bl sblk_read_page + ldr r9, [r4, #36] + ldr r3, [sp, #68] + cmn r9, #1 + cmpne r9, #512 + bne .L3110 + ldr r1, [r4, #12] + ldr r2, [r4, #4] + ldr r0, [r1, #12] + str r0, [sp, #32] + ldr r0, [r1, #8] + str r0, [sp, #28] + ldr r0, [r1, #4] + str r0, [sp, #24] + ldr r1, [r1] + ldr r0, .L3138+20 + str r1, [sp, #20] + ldr r1, [r2, #12] + str r1, [sp, #16] + ldr r1, [r2, #8] + str r1, [sp, #12] + ldr r1, [r2, #4] + str r1, [sp, #8] + ldr r2, [r2] + ldr r1, [sp, #40] + str r9, [sp] + str r2, [sp, #4] + ldr r2, [sp, #52] + bl rk_printk + cmp r9, #512 + bne .L3110 +.L3111: + uxth r2, r6 + ldr r6, .L3138+4 + ldr r3, [sp, #44] + mov r1, r10 + str r7, [sp] + ldr r0, .L3138+24 + bl rk_printk + ldrb r2, [r6, #-2546] @ zero_extendqisi2 + mov r1, #0 + ldr r0, [r4, #4] + ldr fp, .L3138+28 + lsl r2, r2, #9 + bl ftl_memset + ldrb r2, [r6, #-2546] @ zero_extendqisi2 + mov r1, #0 + ldr r0, [r4, #12] + lsl r2, r2, #1 + bl ftl_memset +.L3115: + ldr r7, .L3138+16 + ldrh r3, [r7] + cmp r3, r5 + bls .L3121 + lsl r3, r5, #1 + mov r8, #0 + ldr r9, .L3138+32 + add r7, r7, #24 + str r3, [sp, #40] + b .L3122 +.L3106: + cmp r8, #2 + uxtahne r3, r3, r6 + bne .L3108 + ldr r2, [sp, #48] + b .L3137 +.L3113: + add r6, r6, #1 + b .L3103 +.L3120: + ldr r3, [fp] + tst r3, #4096 + uxth r3, r8 + beq .L3116 + mov r2, r3 + mov r1, r5 + mov r0, r9 + str r3, [sp, #44] + bl rk_printk + ldr r3, [sp, #44] +.L3116: + ldrb r2, [r6, #-3120] @ zero_extendqisi2 + cmp r2, #0 + beq .L3117 + add r2, sp, #104 + mov r0, r4 + add r3, r2, r3, lsl #1 + ldrh r2, [r3, #-16] + ldrh r3, [r7, #-2] + mul r3, r3, r2 + orr r3, r3, r5 + str r3, [r4, #24] + bl sblk_3d_tlc_dump_prog +.L3118: + add r8, r8, #1 +.L3122: + ldrb r2, [sp, #81] @ zero_extendqisi2 + uxth r3, r8 + cmp r2, r3 + bhi .L3120 + add r5, r5, #1 + uxth r5, r5 + b .L3115 +.L3117: + ldrb r1, [r6, #-3128] @ zero_extendqisi2 + cmp r1, #2 + bne .L3119 + add r2, sp, #104 + mov r0, r4 + add r3, r2, r3, lsl #1 + ldrh r2, [r3, #-16] + ldrh r3, [r7, #-2] + mul r3, r3, r2 + ldr r2, [sp, #40] + orr r3, r3, r2 + orr r3, r3, #33554432 + str r3, [r4, #24] + bl sblk_mlc_dump_prog + b .L3118 +.L3119: + add r1, sp, #104 + ldrh ip, [r7, #-2] + add r3, r1, r3, lsl #1 + ldrh r1, [r3, #-16] + ldr r3, .L3138 + mul ip, ip, r1 + ldrb r1, [r3, #1153] @ zero_extendqisi2 + mvn r3, #0 + rsb lr, r1, #24 + orr ip, ip, r5 + mvn r1, r3, lsl r1 + str ip, [r4, #24] + str r2, [sp, #4] + and r0, r1, ip, lsr lr + ldrb r3, [r6, #-2546] @ zero_extendqisi2 + bic r1, ip, r1, lsl lr + uxtb r0, r0 + str r3, [sp] + ldr r3, [r4, #12] + ldr r2, [r4, #4] + bl flash_prog_page_en + b .L3118 +.L3121: + mov r0, r4 + bl zbuf_free + mov r1, r10 + ldr r0, .L3138+36 + bl rk_printk +.L3099: + add sp, sp, #108 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L3139: + .align 2 +.L3138: + .word .LANCHOR0 + .word .LANCHOR3 + .word .LANCHOR3-3088 + .word .LC194 + .word .LANCHOR3-3096 + .word .LC195 + .word .LC196 + .word .LANCHOR2 + .word .LC197 + .word .LC198 + .fnend + .size ftl_dump_write_open_sblk, .-ftl_dump_write_open_sblk + .align 2 + .global gc_ink_check_sblk + .syntax unified + .arm + .fpu softvfp + .type gc_ink_check_sblk, %function +gc_ink_check_sblk: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + .pad #8 + movw r3, #2106 + ldr r4, .L3169 + ldr r5, .L3169+4 + ldrh r2, [r4, r3] + ldr r6, [r5, #904] + cmp r2, #3 + ldrls pc, [pc, r2, asl #2] + b .L3141 +.L3143: + .word .L3142 + .word .L3144 + .word .L3145 + .word .L3146 +.L3142: + ldr r8, .L3169+8 + movw r3, #2788 + ldrh r3, [r8, r3] + cmp r3, #7 + bls .L3140 + ldrb r3, [r8, #2769] @ zero_extendqisi2 + cmp r3, #2 + bls .L3140 + ldr r7, .L3169+12 + mov r1, #0 + movw r9, #65535 + sub r6, r7, #3072 + sub r6, r6, #8 + mov r0, r6 + bl _list_get_gc_head_node + cmp r0, r9 + beq .L3140 + ldr r3, [r8, #1084] + lsl r0, r0, #2 + ldrh r3, [r3, r0] + ubfx r3, r3, #0, #11 + cmp r3, #2 + bgt .L3140 + mov r0, #1 + bl buf_alloc + cmp r0, #0 + str r0, [r5, #904] + beq .L3140 + mov r0, r6 + ldr r2, .L3169+16 + mov r1, #0 + bl _list_pop_index_node + uxth r10, r0 + mov r6, r0 + cmp r10, r9 + bne .L3150 + ldr r0, [r5, #904] + bl zbuf_free + mov r3, #0 + str r3, [r5, #904] +.L3140: + add sp, sp, #8 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L3150: + add r1, r4, #2144 + mov r0, r10 + add r1, r1, #14 + uxth r6, r6 + bl ftl_get_blk_list_in_sblk + movw r3, #2142 + mov r2, #0 + strh r10, [r4, r3] @ movhi + add r3, r4, #2144 + strh r2, [r3] @ movhi + mov r2, #1 + movw r3, #2106 + lsl r6, r6, #2 + strh r2, [r4, r3] @ movhi + ldr r3, [r8, #1084] + strb r0, [r5, #879] + ldrb r2, [r7, #-2546] @ zero_extendqisi2 + ldrh r3, [r3, r6] + tst r3, #1 + ldr r3, [r5, #904] + lsl r2, r2, #9 + movne r1, #85 + moveq r1, #170 + ldr r0, [r3, #4] + add sp, sp, #8 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, lr} + b ftl_memset +.L3144: + movw r3, #2142 + mov r1, #0 + ldrh r0, [r4, r3] + bl ftl_erase_sblk + mov r2, #2 +.L3168: + movw r3, #2106 +.L3166: + strh r2, [r4, r3] @ movhi + b .L3140 +.L3145: + ldr r8, .L3169+12 + mov r7, #0 + ldr r10, .L3169+20 + bl sblk_wait_write_queue_completed + sub r9, r8, #3072 +.L3152: + ldrb r2, [r5, #879] @ zero_extendqisi2 + uxth r3, r7 + cmp r2, r3 + bhi .L3154 + add r2, r4, #2144 + ldr r1, .L3169+24 + ldrh r3, [r2] + ldrh r1, [r1, #-8] + add r3, r3, #1 + uxth r3, r3 + cmp r1, r3 + strh r3, [r2] @ movhi + bhi .L3140 + mov r3, #0 + strh r3, [r2] @ movhi + mov r2, #3 + b .L3168 +.L3154: + uxth r2, r7 + add r3, r4, #2128 + add r3, r3, #14 + add r3, r3, r2, lsl #1 + ldrh r1, [r3, #16] + movw r3, #65535 + cmp r1, r3 + beq .L3153 + add r3, r4, #2144 + ldrh ip, [r9, #-2] + ldrh r3, [r3] + mla ip, r1, ip, r3 + ldr r3, [r6, #4] + str ip, [r3] + ldr r3, [r6, #4] + str r10, [r3, #4] + mov r3, #0 + ldr r2, [r6, #12] + str r3, [r2] + ldr r2, .L3169+8 + ldrb r1, [r2, #1153] @ zero_extendqisi2 + mvn r2, #0 + str r3, [sp, #4] + ldrb r3, [r8, #-2546] @ zero_extendqisi2 + rsb lr, r1, #24 + mvn r1, r2, lsl r1 + str r3, [sp] + and r0, r1, ip, lsr lr + ldr r3, [r6, #12] + ldr r2, [r6, #4] + bic r1, ip, r1, lsl lr + uxtb r0, r0 + bl flash_prog_page_en +.L3153: + add r7, r7, #1 + b .L3152 +.L3146: + add r10, r4, #2128 + mov r9, #0 + add r10, r10, #14 + bl sblk_wait_write_queue_completed +.L3155: + ldrb r2, [r5, #879] @ zero_extendqisi2 + uxth r3, r9 + cmp r2, r3 + bhi .L3159 + add r2, r4, #2144 + ldrh r3, [r2] + add r3, r3, #1 + uxth r3, r3 + strh r3, [r2] @ movhi + ldr r2, .L3169+24 + ldrh r2, [r2, #-8] + cmp r2, r3 + bhi .L3140 + movw r3, #2106 + mov r6, #0 + ldr r0, [r5, #904] + strh r6, [r4, r3] @ movhi + bl zbuf_free + movw r2, #2108 + str r6, [r5, #904] + ldrh r3, [r4, r2] + cmp r3, #15 + bhi .L3160 + add r1, r3, #1 + add r3, r3, #1040 + strh r1, [r4, r2] @ movhi + movw r2, #2142 + add r3, r3, #12 + ldrh r2, [r4, r2] + add r3, r4, r3, lsl #1 + strh r2, [r3, #6] @ movhi +.L3161: + movw r3, #2108 + ldr r0, .L3169+28 + ldrh r2, [r4, r3] + movw r3, #2142 + ldrh r1, [r4, r3] + add sp, sp, #8 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, lr} + b rk_printk +.L3159: + uxth r7, r9 + movw r2, #65535 + add r7, r7, #8 + lsl r7, r7, #1 + ldrh r3, [r10, r7] + cmp r3, r2 + beq .L3157 + ldr r2, .L3169+32 + mov r1, #1 + mov r0, r6 + ldrh r8, [r2] + add r2, r4, #2144 + ldrh r2, [r2] + mla r8, r3, r8, r2 + str r8, [r6, #24] + bl sblk_read_page + ldr r3, [r6, #4] + ldr r3, [r3] + cmp r8, r3 + beq .L3157 + mov r0, r8 + bl ftl_mask_bad_block + mvn r3, #0 + strh r3, [r10, r7] @ movhi +.L3157: + add r9, r9, #1 + b .L3155 +.L3160: + movw r3, #2142 + ldrh r0, [r4, r3] + bl zftl_insert_free_list + b .L3161 +.L3141: + mov r2, #0 + b .L3166 +.L3170: + .align 2 +.L3169: + .word .LANCHOR0+2824 + .word .LANCHOR0+4096 + .word .LANCHOR0 + .word .LANCHOR3 + .word .LANCHOR0+2788 + .word 1437269760 + .word .LANCHOR3-3088 + .word .LC199 + .word .LANCHOR3-3074 + .fnend + .size gc_ink_check_sblk, .-gc_ink_check_sblk + .align 2 + .global ftl_ink_check_sblk + .syntax unified + .arm + .fpu softvfp + .type ftl_ink_check_sblk, %function +ftl_ink_check_sblk: + .fnstart + @ args = 0, pretend = 0, frame = 40 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + lsl r9, r0, #2 + ldr r6, .L3190 + mov r5, r0 + mov r1, r0 + .pad #52 + sub sp, sp, #52 + ldr r2, [r6, #1084] + ldr r3, [r2, r0, lsl #2] + ldrh r2, [r2, r9] + ldr r0, .L3190+4 + ubfx r3, r3, #11, #8 + ubfx r2, r2, #0, #11 + bl rk_printk + movw r3, #65535 + cmp r5, r3 + beq .L3171 + movw r3, #1080 + ldrh r3, [r6, r3] + cmp r3, r5 + bls .L3171 + mov r1, #0 + mov r0, r5 + bl ftl_erase_sblk + mov r0, r5 + add r1, sp, #32 + strh r5, [sp, #16] @ movhi + mov r8, #0 + bl ftl_get_blk_list_in_sblk + strb r0, [sp, #25] + mov r0, #1 + bl buf_alloc + ldr r3, [r6, #1084] + mov r4, r0 + ldr r10, .L3190+8 + ldr fp, .L3190+12 + ldrh r3, [r3, r9] + ldrb r2, [r10, #-2546] @ zero_extendqisi2 + ldr r0, [r0, #4] + ubfx r3, r3, #0, #11 + cmp r3, #1 + lsl r2, r2, #9 + movle r1, #85 + movgt r1, #170 + bl ftl_memset + bl sblk_wait_write_queue_completed +.L3175: + ldr r3, .L3190+16 + ldrh r2, [r3] + uxth r3, r8 + cmp r2, r3 + bls .L3178 + mov r7, #0 + b .L3179 +.L3177: + uxth r3, r7 + add r2, sp, #48 + add r3, r2, r3, lsl #1 + ldrh r1, [r3, #-16] + movw r3, #65535 + cmp r1, r3 + beq .L3176 + ldr r3, .L3190+20 + ldrh ip, [r3] + uxth r3, r8 + mla ip, r1, ip, r3 + ldr r3, [r4, #4] + str ip, [r3] + ldr r3, [r4, #4] + str fp, [r3, #4] + mov r3, #0 + ldr r2, [r4, #12] + str r3, [r2] + mvn r2, #0 + ldrb r1, [r6, #1153] @ zero_extendqisi2 + str r3, [sp, #4] + ldrb r3, [r10, #-2546] @ zero_extendqisi2 + rsb lr, r1, #24 + mvn r1, r2, lsl r1 + str r3, [sp] + and r0, r1, ip, lsr lr + ldr r3, [r4, #12] + ldr r2, [r4, #4] + bic r1, ip, r1, lsl lr + uxtb r0, r0 + bl flash_prog_page_en +.L3176: + add r7, r7, #1 +.L3179: + ldrb r2, [sp, #25] @ zero_extendqisi2 + uxth r3, r7 + cmp r2, r3 + bhi .L3177 + add r8, r8, #1 + b .L3175 +.L3178: + mov r10, #0 +.L3180: + ldr r3, .L3190+24 + uxth r2, r10 + ldrh r1, [r3, #-8] + cmp r1, r2 + bls .L3185 + mov fp, #0 + str r2, [sp, #12] + b .L3186 +.L3184: + uxth r7, fp + add r3, sp, #48 + add r7, r7, #8 + add r7, r3, r7, lsl #1 + movw r3, #65535 + ldrh r1, [r7, #-32] + cmp r1, r3 + beq .L3182 + ldr r0, .L3190+20 + ldr r3, [sp, #12] + ldrh r8, [r0] + mov r0, r4 + mla r8, r1, r8, r3 + mov r1, #1 + str r8, [r4, #24] + bl sblk_read_page + ldr r1, [r4, #4] + ldr r1, [r1] + cmp r8, r1 + beq .L3182 + mov r0, r8 + bl ftl_mask_bad_block + mvn r1, #0 + strh r1, [r7, #-32] @ movhi +.L3182: + add fp, fp, #1 +.L3186: + ldrb r0, [sp, #25] @ zero_extendqisi2 + uxth r1, fp + cmp r0, r1 + bhi .L3184 + add r10, r10, #1 + b .L3180 +.L3185: + mov r0, r4 + bl zbuf_free + ldr r2, [r6, #1084] + mov r1, r5 + ldr r0, .L3190+28 + ldr r3, [r2, r5, lsl #2] + ldrh r2, [r2, r9] + ubfx r3, r3, #11, #8 + ubfx r2, r2, #0, #11 + bl rk_printk +.L3171: + add sp, sp, #52 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L3191: + .align 2 +.L3190: + .word .LANCHOR0 + .word .LC200 + .word .LANCHOR3 + .word 1437269760 + .word .LANCHOR3-3096 + .word .LANCHOR3-3074 + .word .LANCHOR3-3088 + .word .LC201 + .fnend + .size ftl_ink_check_sblk, .-ftl_ink_check_sblk + .align 2 + .global ftl_alloc_sblk + .syntax unified + .arm + .fpu softvfp + .type ftl_alloc_sblk, %function +ftl_alloc_sblk: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + uxth r5, r0 + cmp r0, #5 + mov r9, r0 + mov r1, r5 + mov r0, #0 + movne r8, #0 + moveq r8, #2 + bl zftl_get_free_sblk + movw r3, #65535 + mov r4, r0 + cmp r0, r3 + beq .L3194 + ldr r6, .L3212 + lsl r7, r0, #2 + ldr r5, [r6, #1084] + add r5, r5, r7 + ldrb r3, [r5, #2] @ zero_extendqisi2 + tst r3, #224 + beq .L3195 + mov r2, #1012 + ldr r1, .L3212+4 + ldr r0, .L3212+8 + bl rk_printk + bl dump_stack +.L3195: + ldrb r3, [r5, #2] @ zero_extendqisi2 + bfi r3, r9, #5, #3 + uxtb r3, r3 + ubfx r2, r3, #3, #2 + orr r2, r8, r2 + bfi r3, r2, #3, #2 + clz r2, r8 + strb r3, [r5, #2] + uxtb r3, r3 + lsr r2, r2, #5 + and r1, r3, #24 + cmp r1, #24 + cmpeq r8, #0 + moveq r1, #1 + bfieq r3, r1, #3, #2 + strbeq r3, [r5, #2] + ldr r3, [r6, #2800] + ldrh r3, [r3, #150] + cmp r3, #0 + beq .L3197 + ldr r3, [r6, #1084] + ldrh r3, [r3, r7] + ubfx r3, r3, #0, #11 + cmp r3, #0 + movne r2, #0 + andeq r2, r2, #1 + cmp r2, #0 + beq .L3197 + mov r0, r4 + bl ftl_ink_check_sblk +.L3197: + mov r0, r4 + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L3194: + bl print_ftl_debug_info + mov r2, r9 + mov r1, r4 + ldr r0, .L3212+12 + bl rk_printk + mov r1, r5 + mov r0, #0 + bl zftl_get_free_sblk + mov r2, r9 + mov r1, r0 + mov r4, r0 + ldr r0, .L3212+12 + bl rk_printk + bl dump_all_list_info + movw r2, #1031 + ldr r1, .L3212+4 + ldr r0, .L3212+8 + bl rk_printk + bl dump_stack + b .L3197 +.L3213: + .align 2 +.L3212: + .word .LANCHOR0 + .word .LANCHOR1+2201 + .word .LC0 + .word .LC202 + .fnend + .size ftl_alloc_sblk, .-ftl_alloc_sblk + .align 2 + .global ftl_open_sblk_init + .syntax unified + .arm + .fpu softvfp + .type ftl_open_sblk_init, %function +ftl_open_sblk_init: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r4, r0 + ldr r5, .L3222 + mov r6, r1 + mov r7, #0 + sub r8, r5, #3088 +.L3215: + movw r10, #65535 +.L3216: + mov r0, r6 + bl ftl_alloc_sblk + cmp r0, r10 + mov r9, r0 + beq .L3216 + mov r1, #0 + ldr fp, .L3222+4 + bl ftl_erase_sblk + add r1, r4, #16 + mov r0, r9 + bl ftl_get_blk_list_in_sblk + strh r9, [r4] @ movhi + cmp r6, #2 + ldrh r2, [r8, #-8] + uxtb r0, r0 + ldrbne r3, [r5, #-3127] @ zero_extendqisi2 + moveq r3, #0 + ldrb r1, [r5, #-3127] @ zero_extendqisi2 + lsl r10, r9, #1 + strb r0, [r4, #9] + smulbb r0, r0, r2 + strh r7, [r4, #2] @ movhi + smulbbne r3, r3, r2 + strb r7, [r4, #5] + mul r2, r2, r1 + strh r7, [r4, #10] @ movhi + strh r0, [r4, #6] @ movhi + mov r1, #255 + ldr r0, [r5, #-2556] + uxthne r3, r3 + strb r6, [r4, #4] + strh r3, [r4, #12] @ movhi + lsl r2, r2, #2 + add r0, r0, r3, lsl #2 + bl ftl_memset + ldr r3, [fp, #1092] + ldrh r2, [r4, #6] + strh r2, [r3, r10] @ movhi + ldrb r3, [r4, #9] @ zero_extendqisi2 + cmp r3, #0 + popne {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc} + mov r1, r9 + ldr r0, .L3222+8 + bl rk_printk + ldr r3, [fp, #1092] + mvn r2, #0 + strh r2, [r3, r10] @ movhi + mov r3, #7 + strb r3, [r4, #4] + b .L3215 +.L3223: + .align 2 +.L3222: + .word .LANCHOR3 + .word .LANCHOR0 + .word .LC203 + .fnend + .size ftl_open_sblk_init, .-ftl_open_sblk_init + .align 2 + .global pm_alloc_new_blk + .syntax unified + .arm + .fpu softvfp + .type pm_alloc_new_blk, %function +pm_alloc_new_blk: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + .pad #8 + movw r1, #690 + ldr r4, .L3242 + ldr r7, .L3242+4 + ldr r2, [r4, #2800] + ldrh r3, [r2, r1] + add r3, r3, #1 + uxth r3, r3 + strh r3, [r2, r1] @ movhi + ldrb r1, [r7, #-3127] @ zero_extendqisi2 + cmp r1, r3 + bls .L3225 + add r3, r3, #336 + lsl r3, r3, #1 + ldrh r2, [r2, r3] + movw r3, #65535 + cmp r2, r3 + bne .L3226 +.L3225: + ldr r5, .L3242+8 + movw r8, #65535 +.L3227: + mov r0, #1 + bl ftl_alloc_sblk + cmp r0, r8 + mov r6, r0 + beq .L3227 + mov r1, #0 + bl ftl_erase_sblk + ldr r1, [r4, #2800] + mov r0, r6 + add r1, r1, #672 + bl ftl_get_blk_list_in_sblk + uxth r0, r0 + cmp r0, #0 + bne .L3228 + mov r1, r6 + mov r0, r5 + bl rk_printk + ldr r3, [r4, #1084] + add r6, r3, r6, lsl #2 + ldrb r3, [r6, #2] @ zero_extendqisi2 + orr r3, r3, #224 + strb r3, [r6, #2] + b .L3227 +.L3228: + ldr r2, [r4, #2800] + movw r3, #690 + mov r5, #0 + movw r1, #65535 + strh r5, [r2, r3] @ movhi + add r2, r2, #416 + mov r3, #1 + str r3, [r7, #-36] +.L3230: + ldrh r0, [r2], #2 + uxth r3, r5 + cmp r0, r1 + beq .L3229 + add r5, r5, #1 + cmp r5, #128 + bne .L3230 + mov r2, #264 + ldr r1, .L3242+12 + ldr r0, .L3242+16 + bl rk_printk + bl dump_stack + mov r3, r5 +.L3229: + ldr r2, [r4, #2800] + add r3, r3, #208 + lsl r3, r3, #1 + strh r6, [r2, r3] @ movhi + add r3, r2, #688 + ldrh r2, [r3] + add r2, r2, #1 + strh r2, [r3] @ movhi +.L3226: + ldr r2, [r4, #2800] + movw r3, #690 + ldrh r3, [r2, r3] + add r3, r3, #336 + lsl r3, r3, #1 + ldrh r5, [r2, r3] + movw r2, #65533 + sub r3, r5, #1 + uxth r3, r3 + cmp r3, r2 + bls .L3232 + movw r2, #270 + ldr r1, .L3242+12 + ldr r0, .L3242+16 + bl rk_printk + bl dump_stack +.L3232: + ldr r1, [r4, #2800] + mov r2, #0 + movw r0, #694 + add r3, r1, #696 + strh r2, [r3] @ movhi + ldr r3, .L3242+20 + ldrb r2, [r4, #1153] @ zero_extendqisi2 + ldrh r3, [r3, #-2] + rsb r2, r2, #24 + sub r2, r2, r3 + asr r3, r5, r2 + strh r3, [r1, r0] @ movhi + add r1, r1, #692 + strh r5, [r1] @ movhi + ldr r1, .L3242+24 + ldr r1, [r1] + tst r1, #4096 + beq .L3236 + uxth r3, r3 + mvn r1, #0 + mvn r2, r1, lsl r2 + ldr r0, .L3242+28 + str r3, [sp] + mov r1, r5 + mov r3, r5 + bl rk_printk +.L3236: + mov r0, #0 + add sp, sp, #8 + @ sp needed + pop {r4, r5, r6, r7, r8, pc} +.L3243: + .align 2 +.L3242: + .word .LANCHOR0 + .word .LANCHOR3 + .word .LC203 + .word .LANCHOR1+2216 + .word .LC0 + .word .LANCHOR3-3136 + .word .LANCHOR2 + .word .LC204 + .fnend + .size pm_alloc_new_blk, .-pm_alloc_new_blk + .align 2 + .global pm_write_page + .syntax unified + .arm + .fpu softvfp + .type pm_write_page, %function +pm_write_page: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + .pad #8 + mov r5, r0 + ldr r9, .L3258 + mov r8, r1 + mov r7, r9 +.L3245: + ldr r3, [r9, #2800] + ldr r2, [r3, #48] + add r2, r2, #1 + str r2, [r3, #48] + add r2, r3, #696 + ldrh r1, [r2] + ldr r2, .L3258+4 + ldrh r2, [r2] + cmp r1, r2 + bcs .L3246 + add r3, r3, #692 + ldrh r2, [r3] + movw r3, #65535 + cmp r2, r3 + bne .L3247 +.L3246: + bl pm_alloc_new_blk + mov r0, #0 + bl ftl_info_flush +.L3247: + ldr r3, [r7, #2800] + add r3, r3, #692 + ldrh r2, [r3] + movw r3, #65535 + cmp r2, r3 + bne .L3248 + movw r2, #303 + ldr r1, .L3258+8 + ldr r0, .L3258+12 + bl rk_printk + bl dump_stack +.L3248: + ldr r3, [r7, #2800] + mov r1, #0 + ldr r4, .L3258+16 + add r2, r3, #692 + add r3, r3, #696 + ldrh r6, [r2] + sub r2, r4, #3072 + ldrh r2, [r2, #-2] + ldrh r3, [r3] + ldr r0, [r4, #-32] + mla r6, r2, r6, r3 + mov r2, #64 + bl ftl_memset + ldr r3, [r4, #-32] + mov r0, r8 + str r5, [r3] + ldr r3, [r7, #2800] + ldrb r1, [r4, #-2546] @ zero_extendqisi2 + ldr r10, [r4, #-32] + ldr r3, [r3, #48] + lsl r1, r1, #9 + str r3, [r10, #4] + bl js_hash + ldr r3, [r7, #2800] + mov r2, r8 + str r0, [r10, #8] + mov r1, r6 + ldrb r0, [r3, #694] @ zero_extendqisi2 + ldrb r3, [r4, #-2546] @ zero_extendqisi2 + str r3, [sp] + ldr r3, [r4, #-32] + bl ftl_prog_page + ldr r2, [r7, #2800] + add r1, r2, #696 + ldrh r3, [r1] + add r3, r3, #1 + uxth r3, r3 + cmp r3, #1 + strh r3, [r1] @ movhi + beq .L3249 + ldrb r3, [r4, #-28] @ zero_extendqisi2 + cmp r3, #0 + beq .L3250 +.L3249: + mov r3, #0 + strb r3, [r4, #-28] + b .L3245 +.L3250: + cmn r0, #1 + bne .L3252 + mov r1, r6 + ldr r0, .L3258+20 + bl rk_printk + b .L3245 +.L3252: + movw r3, #698 + mov r0, #0 + ldrh r3, [r2, r3] + cmp r5, r3 + addcc r5, r5, #176 + strcc r6, [r2, r5, lsl #2] + add sp, sp, #8 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L3259: + .align 2 +.L3258: + .word .LANCHOR0 + .word .LANCHOR3-3096 + .word .LANCHOR1+2233 + .word .LC0 + .word .LANCHOR3 + .word .LC205 + .fnend + .size pm_write_page, .-pm_write_page + .align 2 + .global flash_info_flush + .syntax unified + .arm + .fpu softvfp + .type flash_info_flush, %function +flash_info_flush: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L3273 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #20 + sub sp, sp, #20 + ldr r3, [r3] + tst r3, #4096 + beq .L3261 + ldr r2, .L3273+4 + movw r1, #365 + ldr r0, .L3273+8 + bl rk_printk +.L3261: + ldr r4, .L3273+12 + mov r2, #64 + ldr r5, .L3273+16 + mov r1, #0 + ldr r9, .L3273+20 + mov r7, #0 + ldr r0, [r4, #-24] + mov r10, r7 + bl ftl_memset + mov r3, #16 + mov r2, #4 + ldr r1, [r5, #1040] + ldr r0, .L3273+24 + bl rknand_print_hex + ldr r8, .L3273+28 + ldr r6, [r5, #1040] + ldr r1, [r6, #8] + add r0, r6, #16 + bl js_hash + str r0, [r6, #12] +.L3262: + ldrb r6, [r4, #-20] @ zero_extendqisi2 + mov r0, r9 + ldrh fp, [r4, #-18] + ldrh r3, [r5, #2] + mov r1, r6 + mov r2, fp + str r3, [sp, #12] + bl rk_printk + ldrh r2, [r4, #-224] + ldrh r0, [r4, #-18] + ldr r3, [sp, #12] + sub r2, r2, #1 + cmp r0, r2 + blt .L3263 + ldr r6, [r5, #1040] + ldrb r2, [r4, #-19] @ zero_extendqisi2 + strh r10, [r4, #-18] @ movhi + ldr r3, [r6, #4] + mov r0, r6 + add r3, r3, #1 + str r3, [r6, #4] + ldrb r3, [r4, #-20] @ zero_extendqisi2 + strb r2, [r4, #-20] + strb r3, [r4, #-19] + ldrh r3, [r6, #16] + add r3, r3, #1 + strh r3, [r0, #16]! @ movhi + ldr r1, [r6, #8] + bl js_hash + ldrb r3, [r4, #-20] @ zero_extendqisi2 + str r0, [r6, #12] + mov r0, #0 + ldrh r6, [r5, #2] + mul r6, r6, r3 + mov r1, r6 +.L3272: + bl flash_erase_block +.L3264: + ldr r2, [r5, #1040] + mov fp, #1 + ldr r3, [r4, #-24] + mov r1, r6 + mov r0, #0 + ldr r2, [r2, #4] + str r2, [r3] + mov r2, #4 + ldr r3, [r4, #-24] + str r8, [r3, #4] + stm sp, {r2, fp} + ldr r2, [r5, #1040] + bl flash_prog_page_en + ldrh r3, [r4, #-18] + cmn r0, #1 + add r3, r3, fp + strh r3, [r4, #-18] @ movhi + bne .L3265 + mov r1, r6 + ldr r0, .L3273+32 + bl rk_printk + b .L3262 +.L3267: + mov r7, fp + b .L3262 +.L3263: + cmp r0, #0 + mla r6, r6, r3, fp + bne .L3264 + mov r1, r6 + b .L3272 +.L3265: + cmp r7, #0 + beq .L3267 + mov r0, #0 + add sp, sp, #20 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L3274: + .align 2 +.L3273: + .word .LANCHOR2 + .word .LANCHOR1+2247 + .word .LC135 + .word .LANCHOR3 + .word .LANCHOR0 + .word .LC207 + .word .LC206 + .word 1398362953 + .word .LC208 + .fnend + .size flash_info_flush, .-flash_info_flush + .align 2 + .global flash_info_blk_init + .syntax unified + .arm + .fpu softvfp + .type flash_info_blk_init, %function +flash_info_blk_init: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L3307 + push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #12 + ldr r4, .L3307+4 + ldr r3, [r3] + tst r3, #4096 + beq .L3276 + ldr r3, [r4, #1040] + mov r1, #50 + ldr r2, .L3307+8 + ldr r0, .L3307+12 + str r3, [sp] + mov r3, #2048 + bl rk_printk +.L3276: + ldr r5, .L3307+16 + mov r7, #4 + ldr r8, .L3307+20 +.L3280: + mov r6, #0 +.L3279: + ldrh r1, [r4, #2] + mov r9, #4 + str r9, [sp] + mov r0, #0 + ldr r3, [r5, #-24] + ldr r2, [r4, #1040] + mla r1, r7, r1, r6 + bl flash_read_page_en + cmn r0, #1 + beq .L3277 + ldr r2, [r4, #1040] + ldr r3, [r2] + cmp r3, r8 + beq .L3278 +.L3277: + add r6, r6, #1 + cmp r6, #4 + bne .L3279 + add r7, r7, #1 + cmp r7, #16 + bne .L3280 +.L3306: + mvn r0, #0 +.L3275: + add sp, sp, #12 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L3287: + str r9, [sp] + sub r1, r10, r7 + ldr r3, [r5, #-24] + mov r0, #0 + ldr r2, [r4, #1040] + bl flash_read_page_en + cmn r0, #1 + beq .L3285 + ldr r3, [r4, #1040] + ldr r3, [r3] + cmp r3, r8 + beq .L3286 +.L3285: + add r7, r7, #1 + b .L3284 +.L3286: + cmp r7, #1 + bls .L3290 + bl flash_info_flush +.L3290: + mov r0, #0 + b .L3275 +.L3278: + ldrb r1, [r2, #36] @ zero_extendqisi2 + ldrh r0, [r4, #2] + ldrb r3, [r2, #37] @ zero_extendqisi2 + strb r1, [r5, #-20] + str r9, [sp] + strb r3, [r5, #-19] + mul r1, r1, r0 + ldr r3, [r5, #-24] + mov r0, #0 + bl flash_read_page_en + cmn r0, #1 + beq .L3289 + ldr r3, [r4, #1040] + ldr r2, [r3] + cmp r2, r8 + ldreq r6, [r3, #4] + beq .L3282 +.L3289: + mov r6, #0 +.L3282: + ldrh r0, [r4, #2] + mov r3, #4 + ldrb r1, [r5, #-19] @ zero_extendqisi2 + str r3, [sp] + ldr r2, [r4, #1040] + ldr r3, [r5, #-24] + mul r1, r0, r1 + mov r0, #0 + bl flash_read_page_en + cmn r0, #1 + beq .L3283 + ldr r3, [r4, #1040] + ldr r2, [r3] + cmp r2, r8 + bne .L3283 + ldr r2, [r3, #4] + cmp r6, r2 + ldrbcc r2, [r3, #37] @ zero_extendqisi2 + ldrbcc r3, [r3, #36] @ zero_extendqisi2 + strbcc r2, [r5, #-20] + strbcc r3, [r5, #-19] +.L3283: + mov r9, #4 + ldr r3, [r5, #-24] + ldrb r1, [r5, #-20] @ zero_extendqisi2 + mov r0, #0 + str r9, [sp] + mov r7, #0 + ldr r2, [r4, #1040] + bl flash_get_last_written_page + uxth fp, r0 + ldrb r10, [r5, #-20] @ zero_extendqisi2 + add r3, fp, #1 + strh r3, [r5, #-18] @ movhi + ldrh r3, [r4, #2] + mla r10, r3, r10, r0 +.L3284: + sub r0, fp, r7 + sxth r6, r0 + cmp r6, #0 + bge .L3287 + cmn r6, #1 + bne .L3286 + ldr r3, [r4, #1040] + ldr r0, .L3307+24 + ldr r1, [r3] + bl rk_printk + b .L3306 +.L3308: + .align 2 +.L3307: + .word .LANCHOR2 + .word .LANCHOR0 + .word .LANCHOR1+2264 + .word .LC209 + .word .LANCHOR3 + .word 1398362953 + .word .LC210 + .fnend + .size flash_info_blk_init, .-flash_info_blk_init + .align 2 + .global nand_flash_init + .syntax unified + .arm + .fpu softvfp + .type nand_flash_init, %function +nand_flash_init: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r4, r0 + ldr r6, .L3395 + ldr r3, [r6] + tst r3, #4096 + beq .L3310 + ldr r2, .L3395+4 + movw r1, #3450 + ldr r0, .L3395+8 + bl rk_printk +.L3310: + ldr r5, .L3395+12 + mov r7, #0 + mov r0, r4 + ldr r4, .L3395+16 + ldr r9, .L3395+20 + mov fp, #44 + str r7, [r5, #-104] + bl nandc_init + ldr r3, .L3395+24 + mov r2, #8 + mov r1, r7 + ldr r0, .L3395+28 + mov r10, r9 + str r3, [r4, #1104] + mov r3, #1 + strb r3, [r4, #1109] + mov r3, #3 + strb r3, [r4, #1153] + bl ftl_memset + mov r2, #32 + mov r1, r7 + sub r0, r5, #220 + bl ftl_memset +.L3316: + lsl r8, r7, #3 + uxtb r0, r7 + add r1, r9, r8 + bl flash_read_id + cmp r7, #0 + bne .L3311 + ldrb r3, [r4, #1160] @ zero_extendqisi2 + sub r3, r3, #1 + uxtb r3, r3 + cmp r3, #253 + bls .L3312 +.L3314: + mvn r7, #1 +.L3309: + mov r0, r7 + pop {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L3312: + ldrb r3, [r4, #1161] @ zero_extendqisi2 + cmp r3, #255 + beq .L3314 +.L3311: + ldrb r3, [r8, r10] @ zero_extendqisi2 + add r7, r7, #1 + cmp r3, #181 + strbeq fp, [r8, r10] + cmp r7, #4 + bne .L3316 + ldr r9, .L3395+32 + mov r7, #0 + ldr r10, .L3395+20 +.L3319: + lsl r8, r7, #5 + ldrb r2, [r9, r7, lsl #5] @ zero_extendqisi2 + mov r1, r10 + add r0, r8, #1 + add r0, r9, r0 + bl flash_mem_cmp8 + cmp r0, #0 + bne .L3317 + add r9, r9, r8 + ldr r3, .L3395+36 + add r8, r6, r8 + ldrb r2, [r8, #440] @ zero_extendqisi2 + mov r1, r3 +.L3318: + ldrb ip, [r3, r0, lsl #5] @ zero_extendqisi2 + cmp ip, r2 + beq .L3320 + add r0, r0, #1 + cmp r0, #4 + bne .L3318 +.L3320: + add r1, r1, r0, lsl #5 + mov r2, #32 + ldr r0, .L3395+40 + bl ftl_memcpy + mov r2, #32 + mov r1, r9 + ldr r0, .L3395+24 + bl ftl_memcpy + ldrb r3, [r4, #1028] @ zero_extendqisi2 + cmp r3, #8 + bhi .L3321 + ldrb r2, [r6, #24] @ zero_extendqisi2 + cmp r2, #60 + movhi r2, #60 + strbhi r2, [r6, #24] + cmp r3, #6 + beq .L3314 +.L3321: + ldr r3, [r6] + tst r3, #4096 + beq .L3323 + ldr r2, .L3395+4 + movw r1, #3480 + ldr r0, .L3395+8 + bl rk_printk +.L3323: + ldr r3, [r4, #1104] + mov r0, #16384 + mov r7, #0 + ldrh r3, [r3, #10] + cmp r3, #1024 + movcs r3, #2 + strbcs r3, [r4, #1153] + bl ftl_malloc + str r0, [r5, #-92] + mov r0, #16384 + bl ftl_malloc + str r0, [r5, #-120] + mov r0, #2048 + bl ftl_dma32_malloc + str r0, [r4, #1040] + mov r0, #64 + bl ftl_dma32_malloc + str r0, [r5, #-96] + mov r0, #64 + bl ftl_dma32_malloc + str r0, [r5, #-112] + mov r0, #64 + bl ftl_dma32_malloc + strb r7, [r5, #-16] + str r0, [r5, #-24] + bl flash_die_info_init + ldrb r0, [r6, #22] @ zero_extendqisi2 + bl flash_lsb_page_tbl_build + ldrb r0, [r6, #24] @ zero_extendqisi2 + bl nandc_bch_sel + ldr r1, [r4, #1104] + str r7, [r5, #-100] + ldrh r3, [r1, #16] + ubfx r2, r3, #8, #3 + strb r2, [r4, #1192] + ubfx r2, r3, #3, #1 + strb r2, [r5, #-80] + ubfx r2, r3, #4, #1 + strb r2, [r4, #1194] + ubfx r2, r3, #12, #1 + strb r2, [r5, #-3120] + ubfx r2, r3, #13, #1 + strb r2, [r5, #-3126] + ubfx r2, r3, #11, #1 + strb r2, [r4, #1158] + ldrb r2, [r1, #31] @ zero_extendqisi2 + ldrb r1, [r1, #28] @ zero_extendqisi2 + ubfx r0, r2, #1, #1 + strb r0, [r5, #-2542] + ubfx r0, r2, #2, #1 + strb r0, [r5, #-15] + ubfx r0, r3, #14, #1 + lsr r3, r3, #15 + strb r0, [r4, #1] + strb r1, [r4] + strb r3, [r5, #-3125] + ubfx r3, r2, #3, #1 + strb r3, [r4, #1152] + mov r3, #60 + strb r3, [r4, #1108] + ubfx r2, r2, #4, #1 + ldrb r3, [r4, #1028] @ zero_extendqisi2 + strb r2, [r4, #1159] + strb r1, [r4, #1110] + cmp r3, #9 + moveq r2, #70 + strbeq r2, [r4, #1108] + ldrb r2, [r6, #35] @ zero_extendqisi2 + tst r2, #1 + beq .L3326 + ldrb r2, [r6, #33] @ zero_extendqisi2 + cmp r2, #0 + movne r2, #2 + moveq r2, #3 + strb r2, [r4, #1110] +.L3326: + cmp r3, #8 + bne .L3328 + ldrb r3, [r4, #1160] @ zero_extendqisi2 + cmp r3, #137 + cmpne r3, #44 + bne .L3328 + ldrb r3, [r6, #32] @ zero_extendqisi2 + cmp r3, #3 + moveq r3, #0 + strbeq r3, [r4, #1110] +.L3328: + ldrh r2, [r6, #20] + ldrb r3, [r6, #23] @ zero_extendqisi2 + tst r2, #64 + strb r3, [r4, #1100] + beq .L3330 + sub r2, r3, #17 + cmp r3, #21 + cmpne r2, #2 + bhi .L3331 + cmp r3, #21 + ldr r2, .L3395+44 + movne r3, #15 + moveq r3, #4 + str r2, [r5, #-100] +.L3391: + strb r3, [r5, #-108] +.L3330: + ldr r3, [r6] + tst r3, #4096 + beq .L3341 + ldr r2, .L3395+4 + movw r1, #3573 + ldr r0, .L3395+8 + bl rk_printk +.L3341: + mov r3, #0 + strb r3, [r4, #1143] + ldrb r3, [r4, #1192] @ zero_extendqisi2 + tst r3, #1 + moveq r0, #4 + beq .L3393 + ldrb r3, [r4, #1160] @ zero_extendqisi2 + cmp r3, #155 + beq .L3343 + mov r0, #4 + bl flash_set_interface_mode + mov r0, #4 + bl nandc_set_if_mode +.L3343: + mov r0, #1 + bl flash_set_interface_mode + mov r0, #1 +.L3393: + bl nandc_set_if_mode + bl flash_info_blk_init + cmn r0, #1 + mov r7, r0 + bne .L3345 + ldr r3, [r4, #1040] + mov r2, #17 + mov r0, #0 + strb r0, [r4, #1154] + strb r2, [r3, #32] + bl zftl_flash_exit_slc_mode + b .L3309 +.L3317: + add r7, r7, #1 + cmp r7, #49 + bne .L3319 + b .L3314 +.L3331: + sub r2, r3, #65 + cmp r3, #33 + cmpne r2, #1 + bhi .L3334 + ldr r3, .L3395+48 + str r3, [r5, #-100] + mov r3, #4 + strb r3, [r4, #1101] +.L3394: + mov r3, #7 + b .L3391 +.L3334: + sub r2, r3, #67 + sub r1, r3, #34 + uxtb r2, r2 + cmp r2, #1 + cmphi r1, #1 + movls r1, #1 + movhi r1, #0 + bhi .L3335 + cmp r3, #68 + cmpne r3, #35 + ldr r1, .L3395+48 + movne r3, #7 + moveq r3, #17 + cmp r2, #1 + strb r3, [r5, #-108] + movls r3, #4 + movhi r3, #5 + str r1, [r5, #-100] + strb r3, [r4, #1101] + b .L3330 +.L3335: + sub r2, r3, #36 + cmp r2, #1 + ldrls r3, .L3395+52 + strls r3, [r5, #-100] + bls .L3394 +.L3339: + cmp r3, #50 + ldreq r3, .L3395+56 + streq r3, [r5, #-100] + moveq r3, #25 + beq .L3391 +.L3340: + cmp r3, #81 + ldreq r3, .L3395+60 + strbeq r1, [r4, #1195] + streq r3, [r5, #-100] + moveq r3, #7 + strbeq r3, [r5, #-108] + b .L3330 +.L3345: + ldrb r3, [r6, #11] @ zero_extendqisi2 + cmp r3, #9 + bne .L3346 + ldr r3, [r4, #1040] + ldrb r3, [r3, #20] @ zero_extendqisi2 + cmp r3, #1 + movne r3, #0 + strbne r3, [r4, #1110] +.L3346: + ldrb r3, [r4, #1100] @ zero_extendqisi2 + sub r3, r3, #1 + cmp r3, #7 + ldrls r3, .L3395+64 + strls r3, [r5, #-100] + ldrb r3, [r4, #1192] @ zero_extendqisi2 + tst r3, #4 + beq .L3349 + ldr r3, [r4, #1040] + ldrb r3, [r3, #19] @ zero_extendqisi2 + cmp r3, #0 + beq .L3349 + ldrb r3, [r5, #-20] @ zero_extendqisi2 + mov r0, #0 + ldrh r1, [r4, #2] + mul r1, r1, r3 + bl flash_ddr_para_scan + ldrb r3, [r4, #1143] @ zero_extendqisi2 + cmp r3, #0 + bne .L3349 + ldr r2, [r4, #1040] + strb r3, [r2, #19] + bl flash_info_flush +.L3349: + ldr r3, [r6] + tst r3, #4096 + beq .L3351 + ldr r2, .L3395+4 + movw r1, #3676 + ldr r0, .L3395+8 + bl rk_printk +.L3351: + bl nand_flash_print_info + mov r7, #0 + b .L3309 +.L3396: + .align 2 +.L3395: + .word .LANCHOR2 + .word .LANCHOR1+2284 + .word .LC135 + .word .LANCHOR3 + .word .LANCHOR0 + .word .LANCHOR0+1160 + .word .LANCHOR2+4 + .word .LANCHOR0+1144 + .word .LANCHOR2+418 + .word .LANCHOR2+1986 + .word .LANCHOR0+1111 + .word micron_read_retrial + .word toshiba_read_retrial + .word toshiba_3d_read_retrial + .word samsung_read_retrial + .word ymtc_3d_read_retrial + .word hynix_read_retrial + .fnend + .size nand_flash_init, .-nand_flash_init + .align 2 + .global ftl_sysblk_dump + .syntax unified + .arm + .fpu softvfp + .type ftl_sysblk_dump, %function +ftl_sysblk_dump: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r9, r0 + .pad #52 + sub sp, sp, #52 + mov r0, #1 + mov r5, #0 + ldr r10, .L3408 + mov r6, r5 + bl buf_alloc + ldr r3, [r0, #4] + mov r4, r0 + str r3, [sp, #44] +.L3398: + ldr r3, .L3408+4 + ldrh r2, [r3, #-8] + uxth r3, r5 + cmp r2, r3 + bhi .L3400 + ldr r1, [sp, #44] + mov r3, #32 + mov r2, #4 + ldr r0, .L3408+8 + add r1, r1, #704 + bl rknand_print_hex + mov r0, r4 + bl zbuf_free + cmp r6, #0 + beq .L3401 + movw r2, #1619 + ldr r1, .L3408+12 + ldr r0, .L3408+16 + bl rk_printk + bl dump_stack +.L3401: + mov r0, r6 + add sp, sp, #52 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L3400: + ldr r3, .L3408+20 + uxth fp, r5 + ldr r2, [r4, #12] + add r5, r5, #1 + ldr r1, [r4, #4] + ldrh r7, [r3] + ldrb r3, [r10, #-2546] @ zero_extendqisi2 + mla r7, r9, r7, fp + mov r0, r7 + bl ftl_read_ppa_page + ldr r2, [r4, #12] + mov r8, r0 + ldr r3, [r4, #4] + ldr r1, [r2, #12] + str r1, [sp, #32] + ldr r1, [r2, #8] + str r1, [sp, #28] + ldr r1, [r2, #4] + str r1, [sp, #24] + mov r1, r9 + ldr r2, [r2] + str r2, [sp, #20] + ldr r2, [r3, #12] + str r2, [sp, #16] + ldr r2, [r3, #8] + str r2, [sp, #12] + ldr r2, [r3, #4] + str r2, [sp, #8] + mov r2, fp + ldr r3, [r3] + str r0, [sp] + ldr r0, .L3408+24 + str r3, [sp, #4] + mov r3, r7 + bl rk_printk + cmn r8, #1 + cmpne r8, #512 + moveq r6, #1 + b .L3398 +.L3409: + .align 2 +.L3408: + .word .LANCHOR3 + .word .LANCHOR3-3088 + .word .LC211 + .word .LANCHOR1+2300 + .word .LC0 + .word .LANCHOR3-3074 + .word .LC195 + .fnend + .size ftl_sysblk_dump, .-ftl_sysblk_dump + .align 2 + .global ftl_open_sblk_recovery + .syntax unified + .arm + .fpu softvfp + .type ftl_open_sblk_recovery, %function +ftl_open_sblk_recovery: + .fnstart + @ args = 0, pretend = 0, frame = 216 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #228 + sub sp, sp, #228 + ldr r5, .L3532 + mov r4, r0 + str r1, [sp, #28] + ldr r3, [r5] + tst r3, #4096 + beq .L3411 + ldrh r1, [r0, #2] + ldr r0, .L3532+4 + bl rk_printk +.L3411: + ldr r3, [r5] + tst r3, #4096 + beq .L3412 + ldrb r1, [r4, #5] @ zero_extendqisi2 + ldr r0, .L3532+8 + bl rk_printk +.L3412: + ldr r3, [r5] + tst r3, #4096 + beq .L3413 + ldrh r1, [r4] + ldr r0, .L3532+12 + bl rk_printk +.L3413: + ldr r3, [r5] + tst r3, #4096 + beq .L3414 + ldrh r2, [r4, #18] + ldrh r1, [r4, #16] + ldr r0, .L3532+16 + bl rk_printk +.L3414: + ldr r3, [r5] + tst r3, #4096 + beq .L3415 + ldrb r1, [r4, #9] @ zero_extendqisi2 + ldr r0, .L3532+20 + bl rk_printk +.L3415: + ldrh r3, [r4, #10] + ldr r1, .L3532+24 + ldrh r2, [r4] + strh r3, [r4, #14] @ movhi + movw r3, #1080 + ldrh r3, [r1, r3] + cmp r2, r3 + bcs .L3410 + mov r0, #1 + bl buf_alloc + ldr r3, .L3532+28 + mov r1, #255 + ldr r2, [r0, #4] + mov r5, r0 + add r0, sp, #32 + ldrb r3, [r3, #-2546] @ zero_extendqisi2 + sub r3, r3, #2 + add r3, r2, r3, lsl #9 + mov r2, #64 + str r3, [sp, #16] + bl ftl_memset + mov r2, #64 + mov r1, #255 + add r0, sp, #96 + bl ftl_memset + mov r2, #64 + mov r1, #255 + add r0, sp, #160 + bl ftl_memset + ldrb r10, [r4, #5] @ zero_extendqisi2 + mov r3, #2 + ldrh r9, [r4, #2] + str r3, [sp, #12] + mov r3, #0 + str r3, [sp, #24] +.L3417: + ldr r3, .L3532+32 + ldrh r3, [r3] + cmp r3, r9 + bhi .L3434 +.L3420: + ldrh r3, [r4, #10] + ldr r1, .L3532+36 + ldrh r2, [r4, #6] + ldrb r0, [r4, #9] @ zero_extendqisi2 + strh r9, [r4, #2] @ movhi + add r2, r2, r3 + ldrh r3, [r1, #-8] + strb r10, [r4, #5] + str r1, [sp, #16] + mul r3, r3, r0 + cmp r2, r3 + beq .L3435 + movw r2, #1802 + ldr r1, .L3532+40 + ldr r0, .L3532+44 + bl rk_printk + bl dump_stack +.L3435: + ldr r6, .L3532+28 + mov r7, #0 + ldrh r0, [r4, #10] + mov r2, r7 + ldr r3, [r6, #-2556] +.L3436: + cmp r2, r0 + bcc .L3438 + ldr r2, [sp, #16] + ldrb r3, [r4, #9] @ zero_extendqisi2 + ldr r9, .L3532 + ldrh r2, [r2, #-8] + ldr r10, .L3532+24 + smulbb r3, r3, r2 + sub r3, r3, r0 + add r7, r7, r3 + ldr r3, [r9] + uxth r7, r7 + tst r3, #4096 + beq .L3439 + ldrh r1, [r4] + ldr r2, [r10, #1092] + ldr r0, .L3532+48 + lsl r3, r1, #1 + ldrh r3, [r2, r3] + mov r2, r7 + bl rk_printk +.L3439: + ldrh r3, [r4] + ldr r2, [r10, #1092] + lsl r3, r3, #1 + strh r7, [r2, r3] @ movhi + ldr r3, [r9] + tst r3, #16384 + beq .L3440 + ldr r3, [sp, #44] + add r1, sp, #32 + ldr r0, .L3532+52 + str r3, [sp] + ldm r1, {r1, r2, r3} + bl rk_printk +.L3440: + ldrb r2, [r6, #-2546] @ zero_extendqisi2 + mov r8, #0 + mov r1, #0 + ldr r0, [r5, #4] + lsl r2, r2, #9 + bl ftl_memset +.L3441: + ldrb r3, [r6, #-3127] @ zero_extendqisi2 + ldr r2, [sp, #12] + mul r3, r2, r3 + cmp r8, r3 + bcc .L3453 + ldr fp, .L3532+56 + mov r7, #0 + add r8, sp, #32 +.L3454: + ldrb r3, [r6, #-3127] @ zero_extendqisi2 + ldr r2, [sp, #12] + mul r3, r2, r3 + cmp r7, r3 + bcc .L3460 + mov r0, r5 + bl zbuf_free + ldr r3, [sp, #16] + ldrh r2, [r4, #12] + ldrb r1, [r4, #9] @ zero_extendqisi2 + ldrh r3, [r3, #-8] + mla r3, r1, r3, r2 + ldr r2, [r6, #-2556] + sub r3, r3, #-1073741823 + ldr r3, [r2, r3, lsl #2] + cmn r3, #1 + beq .L3461 + movw r2, #1917 + ldr r1, .L3532+40 + ldr r0, .L3532+44 + bl rk_printk + bl dump_stack +.L3461: + ldrh r3, [r4, #6] + cmp r3, #1 + bne .L3410 + mov r0, r4 + bl ftl_write_last_log_page +.L3410: + add sp, sp, #228 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L3434: + ldrb r10, [r4, #5] @ zero_extendqisi2 + ldr r6, .L3532+28 +.L3418: + ldrb r3, [r4, #9] @ zero_extendqisi2 + cmp r3, r10 + movls r3, #0 + strbls r3, [r4, #5] + addls r3, r9, #1 + uxthls r9, r3 + bls .L3417 +.L3433: + add r3, r4, r10, lsl #1 + ldrh r8, [r3, #16] + movw r3, #65535 + cmp r8, r3 + beq .L3419 + ldr r3, .L3532+60 + ldr r2, [r5, #12] + ldr r1, [r5, #4] + ldrh r3, [r3, #-2] + mla r3, r8, r3, r9 + str r3, [sp, #20] + ldr r0, [sp, #20] + ldrb r3, [r6, #-2546] @ zero_extendqisi2 + bl ftl_read_ppa_page + cmp r0, #512 + mov r7, r0 + beq .L3420 + cmn r0, #1 + beq .L3421 + ldr r3, [r5, #12] + ldr r2, [r3] + cmn r2, #1 + bne .L3421 + ldr r3, [r3, #4] + cmn r3, #1 + bne .L3421 + ldr r3, [r5, #4] + ldr r3, [r3] + cmn r3, #1 + beq .L3420 +.L3421: + mov r3, #1 + ldrh r2, [r4, #10] + strb r3, [r6, #-47] + ldrb r3, [r4, #9] @ zero_extendqisi2 + mla r3, r9, r3, r10 + cmp r2, r3 + beq .L3422 + movw r2, #1694 + ldr r1, .L3532+40 + ldr r0, .L3532+44 + bl rk_printk + bl dump_stack +.L3422: + ldrh r3, [r4, #10] + ldrh r2, [r4, #6] + add r2, r2, r3 + ldr r3, .L3532+32 + ldrh r1, [r3] + ldrb r3, [r4, #9] @ zero_extendqisi2 + mul r3, r3, r1 + cmp r2, r3 + beq .L3423 + movw r2, #1695 + ldr r1, .L3532+40 + ldr r0, .L3532+44 + bl rk_printk + bl dump_stack +.L3423: + ldrb r3, [r6, #-2546] @ zero_extendqisi2 + cmp r3, #8 + bls .L3424 + ldr r3, [r5, #12] + ldr r1, .L3532+64 + ldr r2, [r3] + cmp r2, r1 + beq .L3424 + cmn r7, #1 + beq .L3426 + ldr r2, [r3, #4] + cmn r2, #1 + bne .L3427 +.L3430: + ldr r3, [r5, #12] + ldr r0, [r3, #4] + cmn r0, #1 + bne .L3428 +.L3426: + ldrh r3, [r4, #6] + sub r3, r3, #1 + strh r3, [r4, #6] @ movhi + ldrh r3, [r4, #10] + add r3, r3, #1 + strh r3, [r4, #10] @ movhi + mov r3, #4 + str r3, [sp, #12] + mov r3, #1 + str r3, [sp, #24] +.L3419: + add r3, r10, #1 + uxth r10, r3 + b .L3418 +.L3427: + ldr r2, [r3, #16] + ldr r1, .L3532+68 + cmp r2, r1 + bne .L3430 + ldr fp, [r3, #20] + mov r1, #1024 + ldr r0, [sp, #16] + bl js_hash + cmp fp, r0 + beq .L3430 + mov r1, #1024 + ldr r0, [sp, #16] + bl js_hash + mov r2, r9 + mov r1, r8 + str r0, [sp, #4] + str r7, [sp] + ldr r3, [sp, #20] + ldr r0, .L3532+72 + bl rk_printk + mov r3, #16 + mov r2, #4 + ldr r1, [sp, #16] + ldr r0, .L3532+76 + bl rknand_print_hex + ldrb r3, [r6, #-2546] @ zero_extendqisi2 + mov r2, #4 + ldr r1, [r5, #12] + ldr r0, .L3532+80 + lsr r3, r3, #1 + bl rknand_print_hex + b .L3426 +.L3424: + cmn r7, #1 + bne .L3430 + b .L3426 +.L3428: + ldr r3, [r3] + ldr r2, .L3532+64 + cmp r3, r2 + beq .L3426 + bl lpa_hash_get_ppa + ldr r3, [sp, #28] + mov r8, r0 + cmp r3, #0 + beq .L3431 + ldr fp, [r5, #12] + ldr r3, [fp, #8] + cmp r3, r0 + cmnne r0, #1 + beq .L3431 + ldr r3, .L3532+84 + mov r7, #1 + ldrb r1, [r6, #-3136] @ zero_extendqisi2 + ldrh r0, [r3] + ldr r3, .L3532+24 + ldrb r3, [r3, #1153] @ zero_extendqisi2 + rsb r3, r3, #24 + sub r3, r3, r0 + lsl r3, r7, r3 + sub r3, r3, #1 + and r0, r3, r8, lsr r0 + bl __aeabi_uidiv + ldr r3, [sp, #28] + uxth r0, r0 + ldrh r3, [r3] + cmp r3, r0 + bne .L3431 + ldrb r3, [r6, #-2546] @ zero_extendqisi2 + mov r0, r8 + ldr r2, [r6, #-76] + ldr r1, [r5, #4] + ldr fp, [fp] + bl ftl_read_ppa_page + ldr r3, [r6, #-76] + ldr r3, [r3] + cmp fp, r3 + bhi .L3431 + ldr r3, [r5, #12] + ldr r0, [r3, #8] + cmn r0, #1 + beq .L3426 + ldr r3, .L3532+84 + ldrb r1, [r6, #-3136] @ zero_extendqisi2 + ldrh r2, [r3] + ldr r3, .L3532+24 + ldrb r3, [r3, #1153] @ zero_extendqisi2 + rsb r3, r3, #24 + sub r3, r3, r2 + lsl r7, r7, r3 + sub r7, r7, #1 + and r0, r7, r0, lsr r2 + bl __aeabi_uidiv + uxth r0, r0 + bl ftl_vpn_decrement + b .L3426 +.L3438: + ldrh r1, [r4, #12] + add r1, r1, r2 + add r2, r2, #1 + ldr r1, [r3, r1, lsl #2] + cmn r1, #1 + addne r7, r7, #1 + uxthne r7, r7 + b .L3436 +.L3453: + add r3, sp, #32 + ldr r0, [r3, r8, lsl #2] + cmn r0, #1 + bne .L3442 +.L3446: + ldr r2, [r10, #2800] + mvn r7, #0 + ldr r3, [r5, #12] + mov r0, #2 + ldr r2, [r2, #8] + str r2, [r3] + mov r2, #0 + ldr r3, [r5, #12] + str r7, [r3, #4] + ldr r3, [r5, #12] + str r7, [r3, #8] + ldr r3, [r5, #12] + str r2, [r3, #12] + ldr r3, [r5, #12] + str r2, [r3, #16] + ldr r3, [r5, #4] + str r2, [r3] + ldr r1, [r5, #12] + add r1, r1, #16 + bl ftl_debug_info_fill +.L3443: + ldr r3, [sp, #24] + cmp r3, #1 + bne .L3448 + ldrh r3, [r4, #6] + cmp r3, #1 + bls .L3448 +.L3507: + mov r0, r4 + bl ftl_get_new_free_page + ldr r3, [r9] + mov fp, r0 + tst r3, #16384 + beq .L3450 + ldrh r2, [r4, #12] + mov r1, r0 + ldrh r3, [r4, #10] + ldr r0, .L3532+88 + add r3, r3, r2 + ldr r2, [r5, #12] + sub r3, r3, #1 + ldr r2, [r2, #4] + bl rk_printk +.L3450: + ldrb r3, [r6, #-3127] @ zero_extendqisi2 + ldr r1, [sp, #12] + ldrh r2, [r4, #6] + mul r3, r1, r3 + add r3, r3, #1 + sub r3, r3, r8 + cmp r2, r3 + bls .L3448 + ldrb r3, [r6, #-2546] @ zero_extendqisi2 + mov r0, fp + ldr r2, [r5, #12] + ldr r1, [r5, #4] + bl ftl_prog_ppa_page + str r0, [sp, #20] + ldrh r0, [r4] + bl ftl_vpn_decrement + ldr r2, [sp, #20] + adds r3, r7, #1 + movne r3, #1 + cmn r2, #1 + cmnne r7, #1 + beq .L3451 + add r3, sp, #96 + ldrh r2, [r4, #12] + str fp, [r3, r8, lsl #2] + ldrh r3, [r4, #10] + add r3, r3, r2 + add r2, sp, #160 + sub r3, r3, #1 + str r3, [r2, r8, lsl #2] +.L3448: + add r8, r8, #1 + b .L3441 +.L3442: + ldrb r3, [r6, #-2546] @ zero_extendqisi2 + ldr r2, [r5, #12] + ldr r1, [r5, #4] + bl ftl_read_ppa_page + ldr r3, [r5, #12] + mov r7, r0 + ldr r0, [r3, #4] + bl lpa_hash_get_ppa + ldr r3, [r9] + mov fp, r0 + tst r3, #16384 + beq .L3444 + ldr r3, [r5, #12] + add r2, sp, #32 + mov r1, r0 + ldr r2, [r2, r8, lsl #2] + ldr r0, .L3532+92 + ldr r3, [r3, #4] + bl rk_printk +.L3444: + add r3, sp, #32 + mov r2, #1 + ldr r3, [r3, r8, lsl #2] + mov r0, #2 + cmp fp, r3 + ldr r3, [r5, #12] + mvnne r7, #0 + str fp, [r3, #8] + ldr r3, [r5, #12] + str r2, [r3, #12] + mov r2, #0 + ldr r3, [r5, #12] + str r2, [r3, #16] + ldr r1, [r5, #12] + add r1, r1, #16 + bl ftl_debug_info_fill + cmn r7, #1 + bne .L3443 + b .L3446 +.L3451: + ldrh r2, [r4, #6] + cmp r2, #1 + movls r3, #0 + andhi r3, r3, #1 + cmp r3, #0 + bne .L3507 + b .L3448 +.L3460: + add r10, sp, #96 + ldr r3, [r10, r7, lsl #2] + cmn r3, #1 + beq .L3456 + ldrb r3, [r6, #-2546] @ zero_extendqisi2 + ldr r2, [r5, #12] + ldr r1, [r5, #4] + ldr r0, [r8, r7, lsl #2] + bl ftl_read_ppa_page + cmn r0, #1 + cmpne r0, #256 + bne .L3456 + ldrb r3, [r6, #-2546] @ zero_extendqisi2 + ldr r0, [r10, r7, lsl #2] + ldr r2, [r5, #12] + ldr r1, [r5, #4] + bl ftl_read_ppa_page + ldr r3, [r9] + mov r10, r0 + tst r3, #16384 + beq .L3458 + ldr r2, [r5, #12] + mov r1, r0 + ldr r3, [r8, r7, lsl #2] + ldr r0, .L3532+88 + ldr r2, [r2, #8] + bl rk_printk +.L3458: + cmn r10, #1 + beq .L3456 + ldr r1, [r5, #12] + ldr r2, [r8, r7, lsl #2] + ldr r3, [r1, #8] + cmp r2, r3 + bne .L3456 + ldr r3, [r9] + add r10, sp, #160 + tst r3, #16384 + beq .L3459 + ldr r3, [r10, r7, lsl #2] + mov r0, fp + ldr r1, [r1, #4] + bl rk_printk +.L3459: + ldr r2, [r10, r7, lsl #2] + ldr r3, [r5, #12] + uxth r2, r2 + ldmib r3, {r0, r1} + bl lpa_hash_update_ppa +.L3456: + add r7, r7, #1 + b .L3454 +.L3431: + ldr r1, [r5, #12] + ldr r2, .L3532+24 + ldr r0, [r1, #4] + ldr r3, [r2, #2780] + cmp r0, r3 + bcs .L3426 + ldr r3, .L3532+32 + ldrb ip, [r4, #9] @ zero_extendqisi2 + ldrh r0, [r4, #10] + ldrh r3, [r3] + mul r3, r3, ip + sub r3, r3, #1 + cmp r0, r3 + bge .L3426 + ldr r3, [r2, #2800] + ldr r1, [r1] + ldr r2, [r3, #8] + cmp r1, r2 + strhi r1, [r3, #8] + ldrh r1, [r4, #12] + ldrh r2, [r4, #10] + ldr r3, [r5, #12] + add r2, r2, r1 + uxth r2, r2 + ldmib r3, {r0, r1} + bl lpa_hash_update_ppa + ldr r3, [sp, #36] + str r3, [sp, #32] + ldr r3, [sp, #40] + str r3, [sp, #36] + ldr r3, [sp, #44] + str r3, [sp, #40] + ldr r3, [sp, #20] + str r3, [sp, #44] + b .L3426 +.L3533: + .align 2 +.L3532: + .word .LANCHOR2 + .word .LC212 + .word .LC213 + .word .LC214 + .word .LC215 + .word .LC216 + .word .LANCHOR0 + .word .LANCHOR3 + .word .LANCHOR3-3096 + .word .LANCHOR3-3088 + .word .LANCHOR1+2316 + .word .LC0 + .word .LC219 + .word .LC220 + .word .LC223 + .word .LANCHOR3-3072 + .word -178307901 + .word 1212240712 + .word .LC217 + .word .LC218 + .word .LC183 + .word .LANCHOR3-3138 + .word .LC222 + .word .LC221 + .fnend + .size ftl_open_sblk_recovery, .-ftl_open_sblk_recovery + .align 2 + .global dump_ftl_info + .syntax unified + .arm + .fpu softvfp + .type dump_ftl_info, %function +dump_ftl_info: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r4, r5, r6, r7, lr} + .save {r4, r5, r6, r7, lr} + .pad #12 + movw r7, #1080 + ldr r4, .L3536 + ldr r5, .L3536+4 + ldrb r1, [r4, #2769] @ zero_extendqisi2 + ldr r0, .L3536+8 + bl rk_printk + ldrh r3, [r5, #-54] + sub r6, r5, #3088 + ldrb r2, [r5, #-55] @ zero_extendqisi2 + ldrb r1, [r5, #-56] @ zero_extendqisi2 + ldr r0, .L3536+12 + bl rk_printk + ldr r3, [r4, #2800] + ldr r0, .L3536+16 + ldrh r2, [r3, #140] + ldrh r1, [r3, #130] + bl rk_printk + ldr r0, [r4, #1096] + ldrh ip, [r0, #26] + ldrb r3, [r0, #21] @ zero_extendqisi2 + ldrh r2, [r0, #18] + ldrh r1, [r0, #16] + str ip, [sp, #4] + ldrh r0, [r0, #22] + str r0, [sp] + ldr r0, .L3536+20 + bl rk_printk + ldr r0, [r4, #1096] + ldrh ip, [r0, #58] + ldrb r3, [r0, #53] @ zero_extendqisi2 + ldrh r2, [r0, #50] + ldrh r1, [r0, #48] + str ip, [sp, #4] + ldrh r0, [r0, #54] + str r0, [sp] + ldr r0, .L3536+24 + bl rk_printk + ldr r0, [r4, #1096] + ldrh ip, [r0, #90] + ldrb r3, [r0, #85] @ zero_extendqisi2 + ldrh r2, [r0, #82] + ldrh r1, [r0, #80] + str ip, [sp, #4] + ldrh r0, [r0, #86] + str r0, [sp] + ldr r0, .L3536+28 + bl rk_printk + ldrh r2, [r6, #-8] + ldrb r3, [r5, #-3127] @ zero_extendqisi2 + ldr r1, [r5, #-2556] + ldr r0, .L3536+32 + mul r3, r3, r2 + mov r2, #4 + lsl r3, r3, #1 + bl rknand_print_hex + ldrh r3, [r4, r7] + mov r2, #2 + ldr r1, [r4, #1092] + ldr r0, .L3536+36 + bl rknand_print_hex + ldr r1, [r4, #2800] + movw r3, #698 + mov r2, #4 + ldr r0, .L3536+40 + ldrh r3, [r1, r3] + add r1, r1, #704 + bl rknand_print_hex + ldrh r3, [r4, r7] + mov r2, #4 + ldr r1, [r4, #1084] + ldr r0, .L3536+44 + bl rknand_print_hex + sub r1, r5, #3056 + mov r3, #256 + mov r2, #2 + sub r1, r1, #14 + ldr r0, .L3536+48 + bl rknand_print_hex + ldrh r2, [r6, #-8] + ldrb r3, [r5, #-3127] @ zero_extendqisi2 + ldr r1, [r5, #-2552] + ldr r0, .L3536+52 + mul r3, r3, r2 + mov r2, #2 + lsl r3, r3, #1 + add sp, sp, #12 + @ sp needed + pop {r4, r5, r6, r7, lr} + b rknand_print_hex +.L3537: + .align 2 +.L3536: + .word .LANCHOR0 + .word .LANCHOR3 + .word .LC224 + .word .LC225 + .word .LC226 + .word .LC227 + .word .LC228 + .word .LC229 + .word .LC230 + .word .LC231 + .word .LC211 + .word .LC232 + .word .LC233 + .word .LC234 + .fnend + .size dump_ftl_info, .-dump_ftl_info + .align 2 + .global pm_ppa_update_check + .syntax unified + .arm + .fpu softvfp + .type pm_ppa_update_check, %function +pm_ppa_update_check: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L3542 + push {r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + mov r6, r2 + ldr r7, .L3542+4 + mov r4, r0 + sub r2, r3, #3136 + mov r5, r1 + ldrh r0, [r2, #-2] + ldrb ip, [r7, #1153] @ zero_extendqisi2 + ldrb r1, [r3, #-3136] @ zero_extendqisi2 + mvn r3, #0 + rsb ip, ip, #24 + sub ip, ip, r0 + lsr r0, r6, r0 + bic r0, r0, r3, lsl ip + bl __aeabi_uidiv + ldr r3, [r7, #1084] + uxth r0, r0 + add r0, r3, r0, lsl #2 + ldrb r0, [r0, #2] @ zero_extendqisi2 + lsr r0, r0, #5 + cmp r0, #7 + cmpne r0, #1 + moveq r0, #1 + movne r0, #0 + popne {r4, r5, r6, r7, r8, pc} + mov r3, r6 + mov r2, r5 + mov r1, r4 + ldr r0, .L3542+8 + bl rk_printk + bl dump_ftl_info + mvn r0, #0 + pop {r4, r5, r6, r7, r8, pc} +.L3543: + .align 2 +.L3542: + .word .LANCHOR3 + .word .LANCHOR0 + .word .LC235 + .fnend + .size pm_ppa_update_check, .-pm_ppa_update_check + .align 2 + .syntax unified + .arm + .fpu softvfp + .type load_l2p_region, %function +load_l2p_region: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + cmp r1, #31 + push {r0, r1, r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + .pad #8 + mov r7, r0 + mov r6, r1 + bls .L3545 + mov r2, #32 + ldr r1, .L3559 + ldr r0, .L3559+4 + bl rk_printk + bl dump_stack +.L3545: + ldr r8, .L3559+8 + movw r10, #698 + ldr r5, .L3559+12 + ldr r3, [r8, #2800] + mov r9, r8 + ldrh r2, [r3, r10] + cmp r2, r7 + bcs .L3546 + mov r1, r7 + ldr r0, .L3559+16 + mov r4, #0 + bl rk_printk + ldrh r2, [r5, #-14] + mov r1, #255 + ldr r0, [r4, #4] + bl ftl_memset + ldr r3, [r8, #2800] + ldrh r3, [r3, r10] + cmp r3, r7 + bcc .L3547 +.L3557: + mov r0, #0 +.L3544: + add sp, sp, #8 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L3547: + mov r2, #37 +.L3558: + ldr r1, .L3559 + ldr r0, .L3559+4 + bl rk_printk + bl dump_stack + b .L3557 +.L3546: + add r2, r7, #176 + lsl r6, r6, #3 + ldr r4, [r3, r2, lsl #2] + ldr r3, .L3559+20 + add r8, r5, r6 + add r2, r3, r6 + strh r7, [r3, r6] @ movhi + mov r3, #0 + cmp r4, r3 + strh r3, [r2, #2] @ movhi + bne .L3549 + mov r2, r4 + mov r1, r7 + ldr r0, .L3559+24 + bl rk_printk + ldrh r2, [r5, #-14] + mov r1, #255 + ldr r0, [r8, #-2528] + bl ftl_memset + b .L3557 +.L3549: + ldrb r3, [r5, #-2546] @ zero_extendqisi2 + mov r0, r4 + ldr r2, [r5, #-32] + ldr r1, [r8, #-2528] + bl ftl_read_ppa_page + ldr r2, [r5, #-32] + mov r3, r0 + ldr r2, [r2] + cmp r2, r7 + bne .L3550 + cmn r0, #1 + cmpne r0, #512 + beq .L3550 +.L3554: + ldr r3, [r5, #-32] + ldr r3, [r3] + cmp r7, r3 + beq .L3557 + mov r2, #73 + b .L3558 +.L3550: + mov r1, r7 + str r4, [sp] + ldr r0, .L3559+28 + add r6, r5, r6 + bl rk_printk + ldr r1, [r9, #2800] + movw r3, #698 + mov r2, #4 + ldr r0, .L3559+32 + ldrh r3, [r1, r3] + add r1, r1, #704 + bl rknand_print_hex + ldrb r3, [r5, #-2546] @ zero_extendqisi2 + mov r2, #4 + ldr r1, [r6, #-2528] + ldr r0, .L3559+36 + lsl r3, r3, #7 + bl rknand_print_hex + mov r3, #16 + mov r2, #4 + ldr r1, [r5, #-32] + ldr r0, .L3559+40 + bl rknand_print_hex + ldrb r3, [r5, #-2546] @ zero_extendqisi2 + mov r0, r4 + ldr r2, [r5, #-32] + ldr r1, [r6, #-2528] + bl ftl_read_ppa_page + cmn r0, #1 + cmpne r0, #512 + bne .L3553 + ldrh r2, [r5, #-14] + mov r1, #255 + ldr r0, [r6, #-2528] + bl ftl_memset +.L3555: + mvn r0, #0 + b .L3544 +.L3553: + ldr r3, [r5, #-32] + ldr r3, [r3] + cmp r7, r3 + beq .L3554 + b .L3555 +.L3560: + .align 2 +.L3559: + .word .LANCHOR1+2339 + .word .LC0 + .word .LANCHOR0 + .word .LANCHOR3 + .word .LC236 + .word .LANCHOR3-2532 + .word .LC237 + .word .LC238 + .word .LC239 + .word .LC218 + .word .LC240 + .fnend + .size load_l2p_region, .-load_l2p_region + .align 2 + .global pm_gc + .syntax unified + .arm + .fpu softvfp + .type pm_gc, %function +pm_gc: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #12 + ldr r6, .L3579 + ldr r4, .L3579+4 + ldr r3, [r6, #2800] + add r3, r3, #688 + ldrh r2, [r3] + ldrh r3, [r4, #-176] + sub r3, r3, #1 + cmp r2, r3 + bge .L3562 + ldr r3, [r4, #-184] + cmp r3, #0 + beq .L3563 +.L3562: + bl pm_free_sblk + ldr r2, [r6, #2800] + add r3, r2, #688 + ldrh r1, [r3] + ldrh r3, [r4, #-176] + sub r3, r3, #1 + cmp r1, r3 + bge .L3564 + ldr r3, [r4, #-184] + cmp r3, #0 + beq .L3563 +.L3564: + uxth r0, r0 + movw r5, #65535 + mov r3, #0 + add r0, r0, #208 + str r3, [r4, #-184] + lsl r0, r0, #1 + ldrh r9, [r2, r0] + cmp r9, r5 + bne .L3566 + mov r2, #182 + ldr r1, .L3579+8 + ldr r0, .L3579+12 + bl rk_printk + bl dump_stack + bl pm_free_sblk + uxth r0, r0 + ldr r3, [r6, #2800] + add r0, r0, #208 + lsl r0, r0, #1 + ldrh r9, [r3, r0] + cmp r9, r5 + beq .L3563 +.L3566: + ldr r5, .L3579+16 + bl pm_select_ram_region + lsl r7, r0, #3 + mov r10, r0 + movw r3, #65535 + ldrh r0, [r5, r7] + add r8, r5, r7 + add r5, r5, #4 + cmp r0, r3 + beq .L3567 + add r3, r4, r7 + ldr r1, [r3, #-2528] + cmp r1, #0 + beq .L3567 + ldrsh r3, [r8, #2] + cmp r3, #0 + bge .L3567 + bl pm_write_page + ldrh r3, [r8, #2] + ubfx r3, r3, #0, #15 + strh r3, [r8, #2] @ movhi +.L3567: + sub r5, r5, #4 + mov r8, #0 + add r5, r5, r7 +.L3568: + ldr r3, [r6, #2800] + movw r1, #698 + uxth r2, r8 + ldrh r1, [r3, r1] + cmp r1, r2 + bhi .L3571 + bl pm_free_sblk +.L3563: + mov r0, #0 + add sp, sp, #12 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L3571: + ldr r1, .L3579+20 + uxth fp, r8 + ldrb r0, [r6, #1153] @ zero_extendqisi2 + add ip, fp, #176 + str r2, [sp, #4] + ldrh r1, [r1] + ldr r3, [r3, ip, lsl #2] + rsb r0, r0, #24 + mvn ip, #0 + sub r0, r0, r1 + lsr r3, r3, r1 + ldrb r1, [r4, #-3136] @ zero_extendqisi2 + bic r0, r3, ip, lsl r0 + bl __aeabi_uidiv + uxth r0, r0 + ldr r2, [sp, #4] + cmp r9, r0 + bne .L3569 + mov r1, r10 + mov r0, r2 + bl load_l2p_region + cmp r0, #0 + bne .L3570 + add r3, r4, r7 + mov r0, fp + ldr r1, [r3, #-2528] + bl pm_write_page +.L3570: + mvn r3, #0 + strh r3, [r5] @ movhi +.L3569: + add r8, r8, #1 + b .L3568 +.L3580: + .align 2 +.L3579: + .word .LANCHOR0 + .word .LANCHOR3 + .word .LANCHOR1+2355 + .word .LC0 + .word .LANCHOR3-2532 + .word .LANCHOR3-3138 + .fnend + .size pm_gc, .-pm_gc + .align 2 + .global pm_flush_id + .syntax unified + .arm + .fpu softvfp + .type pm_flush_id, %function +pm_flush_id: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + lsl r0, r0, #3 + ldr r4, .L3587 + sub r3, r4, #2528 + add r2, r4, r0 + sub r3, r3, #4 + ldr r1, [r2, #-2528] + add r5, r3, r0 + ldrh r0, [r3, r0] + bl pm_write_page + ldrh r3, [r5, #2] + ubfx r3, r3, #0, #15 + strh r3, [r5, #2] @ movhi + ldr r3, [r4, #-36] + cmp r3, #0 + beq .L3582 + bl pm_gc + mov r3, #0 + str r3, [r4, #-36] +.L3582: + mov r0, #0 + pop {r4, r5, r6, pc} +.L3588: + .align 2 +.L3587: + .word .LANCHOR3 + .fnend + .size pm_flush_id, .-pm_flush_id + .align 2 + .global pm_flush + .syntax unified + .arm + .fpu softvfp + .type pm_flush, %function +pm_flush: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + mov r4, #0 + ldr r5, .L3594 +.L3591: + add r3, r5, r4, lsl #3 + uxth r0, r4 + ldrsh r3, [r3, #2] + cmp r3, #0 + bge .L3590 + bl pm_flush_id +.L3590: + add r4, r4, #1 + cmp r4, #32 + bne .L3591 + mov r0, #0 + pop {r4, r5, r6, pc} +.L3595: + .align 2 +.L3594: + .word .LANCHOR3-2532 + .fnend + .size pm_flush, .-pm_flush + .align 2 + .global flt_sys_flush + .syntax unified + .arm + .fpu softvfp + .type flt_sys_flush, %function +flt_sys_flush: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, lr} + .save {r4, lr} + bl ftl_flush + bl pm_flush + bl ftl_ext_info_flush + mov r0, #0 + pop {r4, lr} + b ftl_info_flush + .fnend + .size flt_sys_flush, .-flt_sys_flush + .align 2 + .global zftl_deinit + .syntax unified + .arm + .fpu softvfp + .type zftl_deinit, %function +zftl_deinit: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, lr} + .save {r4, lr} + bl zftl_flash_de_init + bl flt_sys_flush + pop {r4, lr} + b zftl_flash_de_init + .fnend + .size zftl_deinit, .-zftl_deinit + .align 2 + .global pm_init + .syntax unified + .arm + .fpu softvfp + .type pm_init, %function +pm_init: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r5, #0 + ldr r8, .L3623 + mvn r9, #0 + mov r10, r5 + mov r3, #1 + ldr r4, .L3623+4 + .pad #20 + sub sp, sp, #20 + mov r7, r0 + mov r0, #64 + str r5, [r4, #-184] + str r5, [r4, #-36] + strb r3, [r4, #-28] + bl ftl_dma32_malloc + str r0, [r4, #-32] +.L3602: + cmp r7, #0 + mov r6, r8 + strh r9, [r6, r5]! @ movhi + strh r10, [r6, #2] @ movhi + beq .L3601 + ldrb r0, [r4, #-2546] @ zero_extendqisi2 + lsl r0, r0, #9 + bl ftl_dma32_malloc + str r0, [r6, #4] +.L3601: + add r5, r5, #8 + cmp r5, #256 + bne .L3602 + ldr r5, .L3623+8 + ldr r9, [r4, #-2528] + ldr r6, [r4, #-32] + ldr r3, [r5, #2800] + add r2, r3, #692 + ldrb r0, [r3, #694] @ zero_extendqisi2 + mov r3, #4 + ldrh r1, [r2] + str r3, [sp] + mov r2, r9 + mov r3, r6 + bl flash_get_last_written_page + ldr r3, [r5, #2800] + mov r8, r0 + add r2, r3, #696 + ldrh r2, [r2] + cmp r2, r0 + bgt .L3603 + add r1, r3, #692 + mov r3, r0 + ldrh r1, [r1] + ldr r0, .L3623+12 + bl rk_printk + ldr r3, [r5, #2800] + add r3, r3, #696 + ldrsh r7, [r3] + add r3, r8, #1 + str r3, [sp, #12] +.L3604: + ldr r3, [sp, #12] + cmp r7, r3 + blt .L3607 + mov r3, #1 + ldrh r2, [sp, #12] + strb r3, [r4, #-47] + ldr r3, [r5, #2800] + add r3, r3, #696 + strh r2, [r3] @ movhi + bl pm_free_sblk +.L3603: + ldrh r2, [r4, #-14] + mov r1, #255 + ldr r0, [r4, #-2528] + bl ftl_memset + ldr r1, [r4, #-2528] + mvn r0, #0 + bl pm_write_page + ldrb r3, [r4, #-47] @ zero_extendqisi2 + cmp r3, #0 + beq .L3608 + ldr r1, [r4, #-2528] + mvn r0, #0 + bl pm_write_page + ldr r1, [r4, #-2528] + mvn r0, #0 + bl pm_write_page + ldr r1, [r4, #-2528] + mvn r0, #0 + bl pm_write_page +.L3608: + bl pm_free_sblk + bl pm_gc + mov r0, #0 + add sp, sp, #20 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L3607: + ldr r3, [r5, #2800] + movw fp, #694 + add r2, r3, #692 + ldrb r0, [r3, fp] @ zero_extendqisi2 + ldrh r8, [r2] + ldr r2, .L3623+16 + ldrb r3, [r4, #-2546] @ zero_extendqisi2 + ldrh r2, [r2] + str r3, [sp] + mov r3, r6 + mla r8, r2, r8, r7 + mov r2, r9 + mov r1, r8 + bl flash_read_page_en + ldr r3, [r5, #2800] + mov r10, r0 + ldr r0, .L3623+20 + ldr r2, [r3, #48] + add r2, r2, #1 + str r2, [r3, #48] + mov r2, r8 + ldrh r3, [r3, fp] + ldr r1, [r6] + bl rk_printk + cmp r10, #512 + cmnne r10, #1 + beq .L3605 + ldr r2, [r5, #2800] + movw r3, #698 + ldrh r3, [r2, r3] + ldr r2, [r6] + cmp r2, r3 + bcs .L3605 + ldr r10, [r6, #8] + cmp r10, #0 + beq .L3606 + ldrb r1, [r4, #-2546] @ zero_extendqisi2 + mov r0, r9 + lsl r1, r1, #9 + bl js_hash + cmp r10, r0 + beq .L3606 + ldr r1, [r6, #8] + ldr r0, .L3623+24 + bl rk_printk +.L3605: + add r7, r7, #1 + sxth r7, r7 + b .L3604 +.L3606: + ldr r3, [r6] + ldr r2, [r5, #2800] + add r3, r3, #176 + str r8, [r2, r3, lsl #2] + b .L3605 +.L3624: + .align 2 +.L3623: + .word .LANCHOR3-2532 + .word .LANCHOR3 + .word .LANCHOR0 + .word .LC241 + .word .LANCHOR3-3074 + .word .LC242 + .word .LC243 + .fnend + .size pm_init, .-pm_init + .align 2 + .global pm_log2phys + .syntax unified + .arm + .fpu softvfp + .type pm_log2phys, %function +pm_log2phys: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #12 + mov r7, r1 + ldr r8, .L3641 + mov r6, r0 + mov r9, r2 + ldr r10, .L3641+4 + ldrb r4, [r8, #-2546] @ zero_extendqisi2 + lsl r1, r4, #7 + lsl r4, r4, #7 + bl __aeabi_uidiv + str r0, [sp, #4] + ldrh fp, [sp, #4] + ldr r2, [r10, #2780] + smulbb r4, r4, fp + cmp r6, r2 + sub r4, r6, r4 + bcc .L3626 + mov r1, r6 + ldr r0, .L3641+8 + bl rk_printk + cmp r9, #0 + mvn r0, #0 + streq r0, [r7] +.L3625: + add sp, sp, #12 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L3626: + ldr r1, .L3641+12 + uxth r4, r4 + mov r2, #0 + sub r6, r8, #2528 +.L3632: + lsl r0, r2, #3 + uxth r5, r2 + add ip, r1, r0 + ldr ip, [ip, #4] + cmp ip, #0 + beq .L3628 + ldrh r0, [r0, r1] + cmp r0, fp + bne .L3628 +.L3629: + cmp r9, #0 + lsl r5, r5, #3 + bne .L3630 + add r2, r8, r5 + ldr r2, [r2, #-2528] + ldr r1, [r2, r4, lsl #2] + mvn r2, #0 + str r1, [r7] + ldrb r0, [r10, #1153] @ zero_extendqisi2 + ldrb r3, [r8, #-3072] @ zero_extendqisi2 + rsb ip, r0, #24 + mvn r2, r2, lsl r0 + and r2, r2, r1, lsr ip + cmp r2, r3 + mvncs r3, #0 + strcs r3, [r7] +.L3631: + sub r6, r6, #4 + movw r2, #32767 + add r6, r6, r5 + mov r0, #0 + ldrh r3, [r6, #2] + ubfx r1, r3, #0, #15 + cmp r1, r2 + addne r3, r3, #1 + strhne r3, [r6, #2] @ movhi + b .L3625 +.L3630: + add r2, r8, r5 + ldr r1, [r7] + ldr r2, [r2, #-2528] + ldrb r3, [sp, #4] @ zero_extendqisi2 + str r1, [r2, r4, lsl #2] + sub r1, r6, #4 + add r1, r1, r5 + strb r3, [r8, #-2276] + ldrh r2, [r1, #2] + mvn r2, r2, lsl #17 + mvn r2, r2, lsr #17 + strh r2, [r1, #2] @ movhi + b .L3631 +.L3628: + add r2, r2, #1 + cmp r2, #32 + bne .L3632 + bl pm_select_ram_region + lsl r1, r0, #3 + sub r2, r6, #4 + mov r5, r0 + add ip, r2, r1 + ldrh r1, [r2, r1] + movw r2, #65535 + cmp r1, r2 + beq .L3633 + ldrsh r2, [ip, #2] + cmp r2, #0 + bge .L3633 + bl pm_flush_id +.L3633: + mov r1, r5 + mov r0, fp + strb r5, [r8, #-12] + bl load_l2p_region + b .L3629 +.L3642: + .align 2 +.L3641: + .word .LANCHOR3 + .word .LANCHOR0 + .word .LC244 + .word .LANCHOR3-2532 + .fnend + .size pm_log2phys, .-pm_log2phys + .align 2 + .global gc_recovery + .syntax unified + .arm + .fpu softvfp + .type gc_recovery, %function +gc_recovery: + .fnstart + @ args = 0, pretend = 0, frame = 40 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + movw r3, #65535 + ldr r8, .L3744 + mov r5, #0 + .pad #76 + sub sp, sp, #76 + ldr r7, .L3744+4 + ldr r4, [r8, #1096] + strb r5, [r7, #-3119] + ldrh r2, [r4, #80] + strb r5, [r7, #-144] + cmp r2, r3 + beq .L3644 + mvn r3, #0 + mov r0, #1 + strh r3, [r4, #130] @ movhi + bl buf_alloc + ldrb r3, [r4, #89] @ zero_extendqisi2 + mov r6, r0 + ldrb r1, [r7, #-3128] @ zero_extendqisi2 + add r3, r4, r3, lsl #1 + cmp r1, #2 + ldrh r2, [r3, #94] + sub r3, r7, #3072 + ldrh r3, [r3, #-2] + mul r2, r3, r2 + str r2, [sp, #64] + beq .L3645 + ldrb r3, [r8, #1158] @ zero_extendqisi2 + cmp r3, r5 + bne .L3645 + ldrb r3, [r8, #1159] @ zero_extendqisi2 + cmp r3, r5 + beq .L3646 +.L3645: + ldr r3, .L3744+8 + ldrh r3, [r3, #-14] + sub r3, r3, #1 + add r3, r3, r2 + orr r3, r3, r1, lsl #24 +.L3734: + str r3, [r6, #24] +.L3647: + mov r1, #1 + mov r0, r6 + bl sblk_read_page + ldr r3, [r6, #36] + cmn r3, #1 + cmpne r3, #512 + beq .L3648 + ldr r3, [r6, #12] + ldr r9, .L3744+12 + ldr r3, [r3] + cmp r3, r9 + beq .L3649 +.L3648: + mov r0, r6 + bl zbuf_free + ldr r2, [r6, #12] + ldr r3, [r6, #4] + ldr r0, .L3744+16 + ldr r1, [r2, #12] + str r1, [sp, #24] + ldr r1, [r2, #8] + str r1, [sp, #20] + ldr r1, [r2, #4] + str r1, [sp, #16] + ldr r2, [r2] + str r2, [sp, #12] + ldr r2, [r3, #12] + str r2, [sp, #8] + ldr r2, [r3, #8] + str r2, [sp, #4] + ldr r2, [r3, #4] + str r2, [sp] + ldr r3, [r3] + ldr r2, [r6, #36] + ldr r1, [r6, #24] + bl rk_printk +.L3742: + ldrh r3, [r4, #80] + mov r5, #0 + ldr r2, [r8, #1092] + lsl r3, r3, #1 + strh r5, [r2, r3] @ movhi + ldrh r2, [r4, #80] + ldr r3, [r8, #1096] + strh r2, [r3, #130] @ movhi +.L3650: + ldrh r0, [r4, #80] + ldr r6, .L3744 + ldr r2, [r6, #1092] + lsl r3, r0, #1 + ldrh r3, [r2, r3] + cmp r3, #0 + bne .L3694 + bl ftl_dump_write_open_sblk +.L3694: + mov r2, r5 + ldrh r1, [r4, #80] + ldr r0, .L3744+20 + bl rk_printk + mvn r3, #0 + strh r3, [r4, #80] @ movhi + bl pm_flush + bl ftl_ext_info_flush + ldr r3, [r6, #1096] + movw r2, #65535 + ldrh r3, [r3, #130] + cmp r3, r2 + beq .L3695 + movw r2, #1080 + ldrh r2, [r6, r2] + cmp r2, r3 + bhi .L3696 + movw r2, #517 + ldr r1, .L3744+24 + ldr r0, .L3744+28 + bl rk_printk + bl dump_stack +.L3696: + ldr r3, [r6, #1096] + ldrh r0, [r3, #130] + bl ftl_free_sblk +.L3695: + ldr r2, [r6, #2800] + mvn r3, #0 + mov r0, #0 + strh r3, [r2, #126] @ movhi + ldr r2, [r6, #1096] + strh r3, [r2, #130] @ movhi + bl ftl_info_flush +.L3643: + add sp, sp, #76 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L3646: + cmp r1, #3 + bne .L3647 + sub r3, r7, #3088 + ldrh r3, [r3, #-8] + sub r3, r3, #1 + add r3, r3, r2 + orr r3, r3, #50331648 + b .L3734 +.L3649: + ldrb r3, [r7, #-11] @ zero_extendqisi2 + ldr r5, .L3744+8 + cmp r3, #2 + bne .L3651 + ldrb r3, [r7, #-3128] @ zero_extendqisi2 + cmp r3, #3 + bne .L3651 + ldrh r2, [r5, #-14] + ldrh r0, [r7, #-14] + ldr r1, [r6, #4] + lsl r3, r2, #2 + ldrb r2, [r7, #-3127] @ zero_extendqisi2 + smulbb r2, r2, r3 + ldr r3, [r7, #-132] + sub r2, r2, r0 + lsr r0, r0, #2 + uxth r2, r2 + add r0, r3, r0, lsl #2 + bl ftl_memcpy + ldrb r3, [r8, #1158] @ zero_extendqisi2 + cmp r3, #0 + bne .L3652 + ldrb r3, [r8, #1159] @ zero_extendqisi2 + cmp r3, #0 + beq .L3653 +.L3652: + ldr r3, [r6, #24] + sub r3, r3, #1 +.L3735: + str r3, [r6, #24] + mov r1, #1 + mov r0, r6 + bl sblk_read_page + ldr r3, [r6, #36] + cmn r3, #1 + cmpne r3, #512 + beq .L3655 + ldr r3, [r6, #12] + ldr r3, [r3] + cmp r3, r9 + beq .L3656 +.L3655: + mov r0, r6 + bl zbuf_free + b .L3742 +.L3653: + ldr r3, [sp, #64] + ldrh r2, [r5, #8] + sub r3, r3, #1 + add r3, r3, r2 + orr r3, r3, #33554432 + b .L3735 +.L3656: + ldrh r2, [r7, #-14] +.L3736: + ldr r1, [r6, #4] + ldr r0, [r7, #-132] + bl ftl_memcpy + ldrh r3, [r5, #-14] + ldrb r2, [r7, #-3127] @ zero_extendqisi2 + mul r2, r2, r3 + ldrb r3, [r7, #-2546] @ zero_extendqisi2 + cmp r3, r2, asr #6 + lsl r2, r2, #2 + bge .L3658 + mov r1, #0 + ldr r0, [r7, #-128] + bl ftl_memset + ldrb r10, [r7, #-11] @ zero_extendqisi2 + cmp r10, #1 + movne r10, #1 + bne .L3737 + ldrh r1, [r5, #-14] + ldrb r3, [r7, #-3127] @ zero_extendqisi2 + ldrh r5, [r7, #-14] + ldr r0, [r7, #-128] + mul r3, r3, r1 + ldr r1, [r6, #4] + lsl r3, r3, #2 + sub r5, r5, r3 + add r1, r1, r3 + mov r2, r5 + bl ftl_memcpy +.L3659: + ldr r3, .L3744+32 + ldrh r3, [r3, #-8] + str r3, [sp, #44] + ldrb r3, [r7, #-3128] @ zero_extendqisi2 + cmp r3, #2 + str r3, [sp, #36] + bne .L3660 + ldrb r3, [r7, #-3126] @ zero_extendqisi2 + cmp r3, #0 + beq .L3661 +.L3660: + ldrb r3, [r8, #1158] @ zero_extendqisi2 + cmp r3, #0 + beq .L3662 +.L3661: + ldr r3, [sp, #36] + ldr r2, [sp, #44] + mul r3, r3, r2 + str r3, [sp, #44] + mov r3, #1 + str r3, [sp, #36] +.L3662: + ldr r8, .L3744+4 + mov r7, #0 + str r7, [sp, #48] +.L3663: + ldr r3, [sp, #44] + cmp r3, r7 + bls .L3676 + add r3, r7, r7, lsl #1 + sub r3, r3, #1 + str r3, [sp, #52] + mov r3, #0 + b .L3739 +.L3651: + ldrh r3, [r5, #-14] + ldrb r2, [r7, #-3127] @ zero_extendqisi2 + mul r2, r2, r3 + lsl r2, r2, #2 + b .L3736 +.L3658: + ldr r1, [r6, #4] + mov r10, #0 + ldr r0, [r7, #-128] + add r1, r1, r2 + bl ftl_memcpy +.L3737: + mov r5, #0 + b .L3659 +.L3672: + ldr r3, [sp, #56] + ldrb r1, [r8, #-3128] @ zero_extendqisi2 + ldrh r2, [r3, #96] + ldr r3, .L3744+36 + cmp r1, #2 + ldrh r3, [r3, #-2] + mul r3, r3, r2 + str r3, [sp, #64] + beq .L3664 + ldr r2, .L3744 + ldrb r2, [r2, #1158] @ zero_extendqisi2 + cmp r2, #0 + beq .L3665 +.L3664: + sub r2, r7, #1 + add r3, r2, r3 + add r3, r3, fp + orr r3, r3, r1, lsl #24 +.L3738: + str r3, [r6, #24] + mov r1, #1 + mov r0, r6 + bl sblk_read_page + cmp r10, #0 + beq .L3669 + ldr r3, [r8, #-128] + ldr r2, [r3, r9] + cmp r2, #0 + ldreq r2, [r6, #12] + ldreq r2, [r2, #8] + streq r2, [r3, r9] +.L3669: + ldr r3, [r8, #-132] + ldr r2, [r6, #12] + ldr r3, [r3, r9] + ldr r1, [r2, #4] + cmp r3, r1 + bne .L3670 + ldr r0, [r8, #-128] + ldr ip, [r0, r9] + ldr r0, [r2, #8] + cmp ip, r0 + beq .L3671 +.L3670: + ldr r0, [r2, #12] + str r0, [sp, #16] + ldr r0, [r2, #8] + str r1, [sp, #8] + str r0, [sp, #12] + ldr r2, [r2] + ldr r0, .L3744+40 + str r2, [sp, #4] + ldr r2, [r8, #-128] + ldr r2, [r2, r9] + str r2, [sp] + ldr r2, [r6, #36] + ldr r1, [r6, #24] + bl rk_printk + ldr r3, [r8, #-132] + ldr r3, [r3, r9] + cmn r3, #1 + beq .L3671 + mov r0, r6 + bl zbuf_free + ldrh r3, [r4, #80] + mov r0, #0 + ldr r2, .L3744 + ldr r1, [r2, #1092] + lsl r3, r3, #1 + strh r0, [r1, r3] @ movhi + ldrh r1, [r4, #80] + ldr r3, [r2, #1096] + strh r1, [r3, #130] @ movhi + b .L3650 +.L3665: + cmp r1, #3 + addne r3, r7, r3 + bne .L3738 + ldr r2, .L3744 + ldrb r2, [r2, #1159] @ zero_extendqisi2 + cmp r2, #0 + ldrne r2, [sp, #52] + addeq r3, r7, r3 + orreq r3, r3, fp, lsl #24 + addne r3, r3, r2 + addne r3, r3, fp + orrne r3, r3, #50331648 + b .L3738 +.L3671: + ldr r3, [sp, #48] + add fp, fp, #1 + add r9, r9, #4 + add r3, r3, #1 + str r3, [sp, #48] +.L3674: + ldr r3, [sp, #36] + cmp r3, fp + bcs .L3672 + ldr r3, [sp, #40] + add r3, r3, #1 +.L3739: + str r3, [sp, #40] + ldr r2, [sp, #40] + ldrb r3, [r4, #89] @ zero_extendqisi2 + cmp r2, r3 + bge .L3673 + ldr r3, [sp, #48] + mov fp, #1 + lsl r9, r3, #2 + add r3, r4, r2, lsl #1 + str r3, [sp, #56] + b .L3674 +.L3673: + ldrb r3, [r8, #-3126] @ zero_extendqisi2 + cmp r3, #0 + addne r7, r7, #1 + add r7, r7, #1 + b .L3663 +.L3676: + mov r0, r6 + mov r5, #0 + bl zbuf_free + ldr r3, .L3744 + mov r6, r5 + ldrb r1, [r4, #89] @ zero_extendqisi2 + mov r10, r5 + ldrh r2, [r4, #80] + ldr r0, [r3, #1092] + ldr r3, .L3744+8 + lsl r2, r2, #1 + ldrh ip, [r3, #-14] + add r9, r3, #3104 + smulbb r1, r1, ip + strh r1, [r0, r2] @ movhi +.L3678: + ldr r3, [sp, #44] + cmp r3, r6 + bls .L3692 + add r2, r6, r6, lsl #1 + sub r3, r2, #1 + str r3, [sp, #52] + mov r3, #0 + b .L3741 +.L3688: + ldr r2, [r9, #-132] + ldr fp, [r2, r10, lsl #2] + cmn fp, #1 + beq .L3679 + ldr r2, [r9, #-128] + mov r0, fp + ldr r3, [r2, r10, lsl #2] + str r3, [sp, #48] + bl lpa_hash_get_ppa + cmn r0, #1 + str r0, [sp, #68] + bne .L3680 + mov r2, #0 + add r1, sp, #68 + mov r0, fp + bl pm_log2phys +.L3680: + ldr r3, [sp, #56] + ldr r1, .L3744+44 + ldrb r0, [r9, #-3128] @ zero_extendqisi2 + ldrh r2, [r3, #96] + ldrh r1, [r1] + cmp r0, #2 + mul r2, r1, r2 + beq .L3681 + ldr r1, .L3744 + ldrb ip, [r1, #1158] @ zero_extendqisi2 + cmp ip, #0 + beq .L3682 +.L3681: + sub r1, r6, #1 + add r2, r1, r2 + add r2, r2, r8 + orr r2, r2, r0, lsl #24 +.L3740: + str r2, [sp, #64] + ldr r2, .L3744+48 + ldr r3, [sp, #48] + ldrb r1, [r9, #-3136] @ zero_extendqisi2 + ldrh ip, [r2, #-2] + ldr r2, .L3744 + ldrb r0, [r2, #1153] @ zero_extendqisi2 + mov r2, #1 + str r2, [sp, #60] + rsb r0, r0, #24 + sub r0, r0, ip + lsl r0, r2, r0 + sub r0, r0, #1 + and r0, r0, r3, lsr ip + bl __aeabi_uidiv + ldr r1, [sp, #68] + mov r7, r0 + ldr r3, [sp, #48] + ldr r2, [sp, #60] + cmp r3, r1 + bne .L3686 + add r1, sp, #64 + mov r0, fp + bl pm_log2phys + uxth r0, r7 + add r5, r5, #1 + bl ftl_vpn_decrement +.L3687: + ldr r1, .L3744 + uxth r7, r7 + add r10, r10, #1 + ldr r2, [r1, #1084] + add r2, r2, r7, lsl #2 + ldrb r2, [r2, #2] @ zero_extendqisi2 + ands r0, r2, #224 + bne .L3679 + ldr r2, [r1, #1092] + lsl r7, r7, #1 + ldrh r1, [r2, r7] + cmp r1, #0 + strhne r0, [r2, r7] @ movhi +.L3679: + add r8, r8, #1 +.L3690: + ldr r3, [sp, #36] + cmp r3, r8 + bcs .L3688 + ldr r3, [sp, #40] + add r3, r3, #1 +.L3741: + str r3, [sp, #40] + ldrb r2, [r4, #89] @ zero_extendqisi2 + ldr r3, [sp, #40] + cmp r3, r2 + bge .L3689 + add r3, r4, r3, lsl #1 + mov r8, #1 + str r3, [sp, #56] + b .L3690 +.L3682: + cmp r0, #3 + addne r2, r6, r2 + bne .L3740 + ldrb r1, [r1, #1159] @ zero_extendqisi2 + cmp r1, #0 + lsl r1, r8, #24 + ldrne r3, [sp, #52] + addeq r2, r6, r2 + addne r2, r2, r3 + addne r2, r2, r8 + orr r2, r2, r1 + b .L3740 +.L3686: + ldr r2, [sp, #64] + cmp r1, r2 + addeq r5, r5, #1 + b .L3687 +.L3689: + ldrb r2, [r9, #-3126] @ zero_extendqisi2 + cmp r2, #0 + addne r6, r6, #1 + add r6, r6, #1 + b .L3678 +.L3692: + ldrh r3, [r4, #80] + ldr r2, .L3744 + ldr r2, [r2, #1092] + lsl r3, r3, #1 + strh r5, [r2, r3] @ movhi + ldrh r0, [r4, #80] + bl zftl_insert_data_list + b .L3650 +.L3644: + ldrh r3, [r4, #130] + cmp r3, r2 + beq .L3643 + ldr r2, [r8, #2800] + ldrh r2, [r2, #126] + cmp r2, r3 + bne .L3698 + bl pm_flush + ldr r3, [r8, #1096] + ldrh r0, [r3, #130] + bl ftl_free_sblk + ldr r3, [r8, #2800] + mvn r2, #0 + mov r0, r5 + strh r2, [r3, #126] @ movhi + bl ftl_info_flush +.L3698: + ldr r3, [r8, #1096] + mvn r2, #0 + strh r2, [r3, #130] @ movhi + b .L3643 +.L3745: + .align 2 +.L3744: + .word .LANCHOR0 + .word .LANCHOR3 + .word .LANCHOR3-3104 + .word -178307901 + .word .LC245 + .word .LC247 + .word .LANCHOR1+2361 + .word .LC0 + .word .LANCHOR3-3088 + .word .LANCHOR3-3072 + .word .LC246 + .word .LANCHOR3-3074 + .word .LANCHOR3-3136 + .fnend + .size gc_recovery, .-gc_recovery + .align 2 + .global gc_update_l2p_map_new + .syntax unified + .arm + .fpu softvfp + .type gc_update_l2p_map_new, %function +gc_update_l2p_map_new: + .fnstart + @ args = 0, pretend = 0, frame = 24 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #28 + sub sp, sp, #28 + ldr r4, .L3781 + ldr r3, .L3781+4 + ldr r5, [r4, #1096] + ldrh r3, [r3, #-14] + ldrb r2, [r5, #89] @ zero_extendqisi2 + mul r3, r2, r3 + str r3, [sp] + ldr r3, .L3781+8 + ldr r2, [r3] + mov fp, r3 + tst r2, #256 + beq .L3747 + ldrh r1, [r5, #80] + ldr r0, .L3781+12 + bl rk_printk +.L3747: + ldr r2, .L3781+16 + mov r7, #0 + ldrh r3, [r5, #80] + mov r6, r7 + ldr r0, [sp] + ldrb r2, [r2, #-11] @ zero_extendqisi2 + ldr r8, .L3781+16 + ldr r1, [r4, #1092] + lsl r3, r3, #1 + sub r2, r0, r2 + strh r2, [r1, r3] @ movhi +.L3748: + ldr r3, [sp] + cmp r6, r3 + bne .L3757 + ldr r3, [fp] + tst r3, #256 + beq .L3758 + ldrh r2, [r5, #80] + mov r3, r7 + ldr r0, [r4, #1092] + ldr r1, [r4, #1096] + lsl r2, r2, #1 + ldrh r1, [r1, #80] + ldrh r2, [r0, r2] + ldr r0, .L3781+20 + bl rk_printk +.L3758: + ldrh r3, [r5, #80] + ldr r2, [r4, #1092] + lsl r3, r3, #1 + ldrh r3, [r2, r3] + cmp r7, r3 + beq .L3759 + movw r2, #898 + ldr r1, .L3781+24 + ldr r0, .L3781+28 + bl rk_printk + bl dump_stack +.L3759: + ldrh r3, [r5, #80] + ldr r2, [r4, #1092] + lsl r3, r3, #1 + strh r7, [r2, r3] @ movhi + ldrh r0, [r5, #80] + bl zftl_insert_data_list + add sp, sp, #28 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L3757: + ldr r3, [r8, #-132] + lsl r9, r6, #2 + ldr r10, [r3, r6, lsl #2] + cmn r10, #1 + beq .L3749 + ldrb r1, [r8, #-2546] @ zero_extendqisi2 + mov r0, r10 + lsl r1, r1, #7 + bl __aeabi_uidiv + uxth r3, r0 + str r3, [sp, #12] + ldr r3, [fp] + tst r3, #256 + beq .L3750 + mov r3, r6 + mov r2, r10 + ldr r1, [sp, #12] + ldr r0, .L3781+32 + bl rk_printk +.L3750: + str r6, [sp, #8] +.L3756: + ldr r3, [r8, #-132] + ldr r10, [r3, r9] + cmn r10, #1 + beq .L3751 + ldrb r1, [r8, #-2546] @ zero_extendqisi2 + mov r0, r10 + lsl r1, r1, #7 + bl __aeabi_uidiv + ldr r3, [sp, #12] + uxth r0, r0 + cmp r3, r0 + bne .L3751 + ldr r3, [r8, #-128] + mov r0, r10 + ldr r3, [r3, r9] + str r3, [sp, #4] + bl lpa_hash_get_ppa + cmn r0, #1 + str r0, [sp, #20] + bne .L3752 + mov r2, #0 + add r1, sp, #20 + mov r0, r10 + bl pm_log2phys +.L3752: + ldr r3, [sp, #20] + ldr r2, [sp, #4] + cmp r2, r3 + bne .L3753 + ldr r3, .L3781+16 + add r1, sp, #24 + mov r2, #1 + mov r0, r10 + add r7, r7, #1 + ldr r3, [r3, #-124] + ldr r3, [r3, r9] + str r3, [r1, #-8]! + bl pm_log2phys + ldr r3, .L3781+36 + ldr r2, [sp, #4] + ldrh r0, [r3] + ldrb r3, [r4, #1153] @ zero_extendqisi2 + rsb r3, r3, #24 + sub r3, r3, r0 + lsr r0, r2, r0 + ldr r2, .L3781+16 + ldrb r1, [r2, #-3136] @ zero_extendqisi2 + mvn r2, #0 + bic r0, r0, r2, lsl r3 + bl __aeabi_uidiv + uxth r0, r0 +.L3780: + bl ftl_vpn_decrement + ldr r3, [r8, #-132] + mvn r2, #0 + str r2, [r3, r9] +.L3751: + ldr r3, [sp, #8] + add r9, r9, #4 + add r3, r3, #1 + str r3, [sp, #8] + ldr r2, [sp, #8] + ldr r3, [sp] + cmp r3, r2 + bne .L3756 +.L3749: + add r6, r6, #1 + b .L3748 +.L3753: + ldr r2, [fp] + tst r2, #256 + beq .L3755 + ldr r2, [sp, #4] + mov r1, r10 + ldr r0, .L3781+40 + bl rk_printk +.L3755: + ldrh r0, [r5, #80] + b .L3780 +.L3782: + .align 2 +.L3781: + .word .LANCHOR0 + .word .LANCHOR3-3104 + .word .LANCHOR2 + .word .LC248 + .word .LANCHOR3 + .word .LC251 + .word .LANCHOR1+2373 + .word .LC0 + .word .LC249 + .word .LANCHOR3-3138 + .word .LC250 + .fnend + .size gc_update_l2p_map_new, .-gc_update_l2p_map_new + .align 2 + .global gc_scan_src_blk_one_page + .syntax unified + .arm + .fpu softvfp + .type gc_scan_src_blk_one_page, %function +gc_scan_src_blk_one_page: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + .pad #8 + mov r1, #0 + ldr r5, .L3810 + mov lr, r1 + movw r0, #65535 + ldr r4, .L3810+4 + ldrb r3, [r5, #2828] @ zero_extendqisi2 + ldr r7, .L3810+8 + add r2, r4, r3, lsl #1 + ldrb ip, [r7, #-3127] @ zero_extendqisi2 + ldrh r8, [r2, #36] + ldrh r2, [r4, #2] +.L3784: + cmp r8, r0 + beq .L3786 + cmp lr, #0 + mov r0, #1 + strhne r2, [r4, #2] @ movhi + cmp r1, #0 + strbne r3, [r5, #2828] + mov r9, #1 + bl buf_alloc + mov r6, r0 +.L3789: + ldrb r1, [r5, #2830] @ zero_extendqisi2 + cmp r9, r1 + ble .L3799 + mov r0, r6 + bl zbuf_free + ldrb r3, [r5, #2828] @ zero_extendqisi2 + ldrb r2, [r7, #-3127] @ zero_extendqisi2 + add r3, r3, #1 + uxtb r3, r3 + cmp r2, r3 + strb r3, [r5, #2828] + ldrheq r3, [r4, #2] + addeq r3, r3, #1 + strheq r3, [r4, #2] @ movhi + moveq r3, #0 + strbeq r3, [r5, #2828] + add sp, sp, #8 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L3786: + add r3, r3, #1 + uxtb r3, r3 + cmp r3, ip + moveq r3, #0 + addeq r2, r2, #1 + add r1, r4, r3, lsl #1 + uxtheq r2, r2 + ldrh r8, [r1, #36] + moveq lr, #1 + mov r1, #1 + b .L3784 +.L3799: + ldr r3, .L3810+12 + cmp r1, #2 + ldrh r3, [r3] + mul r2, r8, r3 + ldrheq r3, [r4, #2] + addeq r3, r2, r3, lsl #1 + subeq r3, r3, #1 + beq .L3809 + cmp r1, #3 + ldrhne r3, [r4, #2] + addne r3, r3, r2 + bne .L3808 + ldrb r3, [r5, #1158] @ zero_extendqisi2 + cmp r3, #0 + bne .L3793 + ldrb r3, [r5, #1159] @ zero_extendqisi2 + cmp r3, #0 + ldrheq r3, [r4, #2] + addeq r3, r3, r2 + orreq r3, r3, r9, lsl #24 + beq .L3808 +.L3793: + ldrh r3, [r4, #2] + add r3, r3, r3, lsl #1 + sub r3, r3, #1 + add r3, r3, r2 +.L3809: + ldrb r2, [r7, #-3128] @ zero_extendqisi2 + add r3, r3, r9 + orr r3, r3, r2, lsl #24 +.L3808: + str r3, [r6, #24] + mov r1, #1 + mov r0, r6 + bl sblk_read_page + ldr r3, [r6, #36] + cmp r3, #512 + cmnne r3, #1 + beq .L3796 + ldr r3, [r6, #12] + ldr r10, [r3, #4] + mov r0, r10 + bl lpa_hash_get_ppa + cmn r0, #1 + str r0, [sp, #4] + bne .L3797 + ldr r3, [r5, #2780] + cmp r10, r3 + bcs .L3797 + mov r2, #0 + add r1, sp, #4 + mov r0, r10 + bl pm_log2phys +.L3797: + ldr r3, [r6, #24] + ldr r2, [sp, #4] + cmp r3, r2 + ldrheq r1, [r4, #20] + ldreq r2, [r7, #-3132] + streq r3, [r2, r1, lsl #2] + ldrheq r3, [r4, #20] + addeq r3, r3, #1 + strheq r3, [r4, #20] @ movhi +.L3796: + ldrh r3, [r4, #22] + add r9, r9, #1 + add r3, r3, #1 + strh r3, [r4, #22] @ movhi + b .L3789 +.L3811: + .align 2 +.L3810: + .word .LANCHOR0 + .word .LANCHOR0+2824 + .word .LANCHOR3 + .word .LANCHOR3-3074 + .fnend + .size gc_scan_src_blk_one_page, .-gc_scan_src_blk_one_page + .align 2 + .global gc_scan_src_blk + .syntax unified + .arm + .fpu softvfp + .type gc_scan_src_blk, %function +gc_scan_src_blk: + .fnstart + @ args = 0, pretend = 0, frame = 24 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + movw r3, #2824 + ldr r4, .L3867 + .pad #28 + sub sp, sp, #28 + ldrh r2, [r4, r3] + movw r3, #65535 + cmp r2, r3 + bne .L3813 + movw r2, #1505 + ldr r1, .L3867+4 + ldr r0, .L3867+8 + bl rk_printk + bl dump_stack +.L3813: + movw r3, #2824 + ldrh r1, [r4, r3] + movw r3, #65535 + cmp r1, r3 + moveq r0, #0 + beq .L3812 + ldr r3, .L3867+12 + ldr r3, [r3] + tst r3, #256 + beq .L3815 + ldr r2, [r4, #1092] + lsl r3, r1, #1 + ldr r0, .L3867+16 + ldrh r2, [r2, r3] + bl rk_printk +.L3815: + ldr r7, .L3867+20 + movw r5, #2824 + bl timer_get_time + ldrh r0, [r4, r5] + add r1, r7, #36 + bl ftl_get_blk_list_in_sblk + uxtb r0, r0 + cmp r0, #0 + strb r0, [r4, #2829] + mvneq r3, #0 + strheq r3, [r4, r5] @ movhi + beq .L3812 + ldrh r3, [r4, r5] + ldr r2, [r4, #1084] + add r2, r2, r3, lsl #2 + ldrb r2, [r2, #2] @ zero_extendqisi2 + and r2, r2, #224 + cmp r2, #32 + beq .L3817 + cmp r2, #0 + cmpne r2, #224 + beq .L3818 + ldr r2, [r4, #1096] + ldrh r1, [r2, #16] + cmp r1, r3 + beq .L3817 + ldrh r1, [r2, #48] + cmp r1, r3 + beq .L3817 + ldrh r2, [r2, #80] + cmp r2, r3 + bne .L3860 +.L3817: + mvn r2, #0 + movw r3, #2824 + mov r0, #0 + strh r2, [r4, r3] @ movhi + strh r0, [r7, #20] @ movhi +.L3812: + add sp, sp, #28 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L3818: + cmp r2, #0 + bne .L3817 + ldr r2, [r4, #1092] + lsl r3, r3, #1 + ldrh r3, [r2, r3] + cmp r3, #0 + beq .L3820 + movw r2, #1530 + ldr r1, .L3867+4 + ldr r0, .L3867+8 + bl rk_printk + bl dump_stack +.L3820: + movw r3, #2824 + ldr r2, [r4, #1092] + ldrh r3, [r4, r3] + mov r1, #0 + lsl r3, r3, #1 + strh r1, [r2, r3] @ movhi + b .L3817 +.L3860: + add r0, r7, r0, lsl #1 + movw r3, #65535 + ldrh r10, [r0, #34] + cmp r10, r3 + bne .L3821 + movw r2, #1540 + ldr r1, .L3867+4 + ldr r0, .L3867+8 + bl rk_printk + bl dump_stack +.L3821: + movw r2, #2824 + ldr r8, .L3867+24 + ldrh r0, [r4, r2] + ldr r2, [r4, #1084] + sub r1, r8, #3072 + sub fp, r8, #3088 + ldrh r6, [fp, #-8] + ldrh r3, [r1, #-2] + add r2, r2, r0, lsl #2 + str r1, [sp, #4] + sub r6, r6, #1 + ldrb r2, [r2, #2] @ zero_extendqisi2 + uxth r6, r6 + mul r3, r10, r3 + and r2, r2, #224 + cmp r2, #160 + movne r9, #1 + bne .L3822 + ldrb r2, [r8, #-3128] @ zero_extendqisi2 + cmp r2, #2 + uxth r9, r2 + orr r3, r3, r2, lsl #24 + subeq r2, r8, #3104 + ldrheq r6, [r2, #-14] + ldrb r2, [r4, #1158] @ zero_extendqisi2 + subeq r6, r6, #1 + uxtheq r6, r6 + cmp r2, #0 + bne .L3824 + ldrb r2, [r4, #1159] @ zero_extendqisi2 + cmp r2, #0 + beq .L3822 +.L3824: + ldr r2, .L3867+28 + ldrh r6, [r2, #-14] + sub r6, r6, #1 + uxth r6, r6 +.L3822: + orr r6, r6, r3 + strb r9, [r4, #2830] + mov r3, #0 + mov r0, #1 + strh r3, [r7, #2] @ movhi + strb r3, [r4, #2828] + strh r3, [r7, #22] @ movhi + strh r3, [r7, #24] @ movhi + str r3, [sp] + bl buf_alloc + mov r1, #1 + str r6, [r0, #24] + mov r5, r0 + bl sblk_read_page + ldr r3, [sp] + strh r3, [r7, #20] @ movhi + ldr r3, [r5, #36] + cmn r3, #1 + cmpne r3, #512 + bne .L3825 +.L3865: + mov r0, r5 + bl zbuf_free +.L3863: + mvn r0, #0 + b .L3812 +.L3825: + ldr r1, [r5, #12] + ldr r3, .L3867+32 + ldr r2, [r1] + str r3, [sp, #8] + cmp r2, r3 + beq .L3826 + movw r2, #1578 +.L3866: + ldr r1, .L3867+4 + ldr r0, .L3867+8 + bl rk_printk + bl dump_stack + b .L3865 +.L3826: + ldrb r2, [r8, #-3127] @ zero_extendqisi2 + ldrh r3, [fp, #-8] + smulbb r3, r3, r2 + smulbb r3, r3, r9 + uxth r3, r3 + str r3, [sp] + ldrb r3, [r8, #-11] @ zero_extendqisi2 + cmp r3, #2 + cmpeq r9, #3 + bne .L3827 + ldr r3, .L3867+28 + ldrh r0, [r8, #-14] + ldr r1, [r5, #4] + ldrh r9, [r3, #-14] + ldr r3, [r8, #-3132] + lsl r9, r9, #2 + smulbb r9, r9, r2 + sub r9, r9, r0 + lsr r0, r0, #2 + uxth r9, r9 + add r0, r3, r0, lsl #2 + mov r2, r9 + bl ftl_memcpy + ldr r3, [r5, #12] + ldr r3, [r3, #4] + cmp r3, #0 + beq .L3828 + mov r1, r9 + ldr r0, [r5, #4] + str r3, [sp, #12] + bl js_hash + ldr r3, [sp, #12] + cmp r3, r0 + beq .L3828 + mov r0, r5 + bl zbuf_free + ldr r1, [r5, #12] + mov r3, r9 +.L3864: + ldr r2, [r5, #24] + ldr r1, [r1, #4] + ldr r0, .L3867+36 + bl rk_printk + b .L3863 +.L3828: + ldrb r3, [r4, #1158] @ zero_extendqisi2 + cmp r3, #0 + bne .L3829 + ldrb r3, [r4, #1159] @ zero_extendqisi2 + cmp r3, #0 + beq .L3830 +.L3829: + sub r6, r6, #1 + str r6, [r5, #24] +.L3831: + mov r1, #1 + mov r0, r5 + bl sblk_read_page + ldr r3, [r5, #36] + cmn r3, #1 + cmpne r3, #512 + beq .L3865 + ldr r3, [r5, #12] + ldr r2, [sp, #8] + ldr r3, [r3] + cmp r3, r2 + movwne r2, #1619 + ldrheq r2, [r8, #-14] + bne .L3866 +.L3862: + ldr r1, [r5, #4] + mov r9, #0 + ldr r0, [r8, #-3132] + mov r10, #1 + bl ftl_memcpy + ldr r6, [r8, #-3132] + sub r6, r6, #4 +.L3836: + ldr r3, [sp] + cmp r9, r3 + blt .L3841 + mov r0, r5 + bl zbuf_free + movw r3, #2824 + ldr r2, [r4, #1092] + ldrh r1, [r4, r3] + lsl r3, r1, #1 + ldrh r2, [r2, r3] + ldrh r3, [r7, #20] + cmp r2, r3 + beq .L3842 + ldr r0, .L3867+40 + bl rk_printk +.L3842: + movw r3, #2824 + ldrh r1, [r7, #20] + ldrh r3, [r4, r3] + ldr r2, [r4, #1092] + lsl r3, r3, #1 + strh r1, [r2, r3] @ movhi + mov r3, #0 + strh r3, [r7, #24] @ movhi + ldrh r0, [r7, #20] + b .L3812 +.L3830: + ldr r2, [sp, #4] + ldrh r3, [fp, #-8] + ldrh r2, [r2, #-2] + sub r3, r3, #1 + uxth r3, r3 + mul r10, r10, r2 + orr r3, r3, #33554432 + orr r10, r3, r10 + str r10, [r5, #24] + b .L3831 +.L3827: + ldr r3, [sp] + ldr r9, [r1, #4] + ldr r0, [r5, #4] + lsl r6, r3, #2 + mov r1, r6 + bl js_hash + cmp r9, r0 + moveq r2, r6 + beq .L3862 + mov r0, r5 + bl zbuf_free + ldr r1, [r5, #12] + mov r3, r6 + b .L3864 +.L3841: + ldr r0, [r6, #4]! + cmn r0, #1 + beq .L3838 + bl lpa_hash_get_ppa + cmn r0, #1 + str r0, [sp, #20] + bne .L3839 + mov r2, #0 + add r1, sp, #20 + ldr r0, [r6] + bl pm_log2phys +.L3839: + ldr r3, .L3867+44 + ldr fp, [sp, #20] + ldrb r1, [r8, #-3136] @ zero_extendqisi2 + ldrh r0, [r3] + ldrb r3, [r4, #1153] @ zero_extendqisi2 + rsb r3, r3, #24 + sub r3, r3, r0 + lsl r3, r10, r3 + sub r3, r3, #1 + and r0, r3, fp, lsr r0 + bl __aeabi_uidiv + ldrh r3, [r7] + cmp r0, r3 + ldreq r3, [r8, #-3132] + ldrheq r2, [r7, #20] + streq fp, [r3, r2, lsl #2] + ldrheq r3, [r7, #20] + addeq r3, r3, #1 + strheq r3, [r7, #20] @ movhi +.L3838: + bl timer_get_time + add r9, r9, #1 + b .L3836 +.L3868: + .align 2 +.L3867: + .word .LANCHOR0 + .word .LANCHOR1+2395 + .word .LC0 + .word .LANCHOR2 + .word .LC252 + .word .LANCHOR0+2824 + .word .LANCHOR3 + .word .LANCHOR3-3104 + .word -178307901 + .word .LC253 + .word .LC254 + .word .LANCHOR3-3138 + .fnend + .size gc_scan_src_blk, .-gc_scan_src_blk + .align 2 + .global gc_scan_static_data + .syntax unified + .arm + .fpu softvfp + .type gc_scan_static_data, %function +gc_scan_static_data: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #12 + ldr r4, .L3886 + ldr r3, [r4, #1096] + ldr r2, [r3, #544] + cmn r2, #1 + beq .L3870 + ldr r6, .L3886+4 + mov r7, #0 + ldr r9, .L3886+8 + sub r10, r6, #3136 +.L3878: + ldr r3, [r4, #1096] + mov r2, #0 + add r1, sp, #4 + uxth r8, r7 + ldr r0, [r3, #544] + bl pm_log2phys + ldr r3, [sp, #4] + cmn r3, #1 + beq .L3871 + mov r0, #1 + bl buf_alloc + ldr r3, [sp, #4] + mov r5, r0 + mov r1, #1 + str r3, [r0, #24] + bl sblk_read_page + ldr r3, [r5, #36] + cmp r3, #256 + bne .L3872 + ldrb r3, [r4, #1153] @ zero_extendqisi2 + mov fp, #1 + ldrh r2, [r10, #-2] + ldr r0, [sp, #4] + rsb r3, r3, #24 + ldrb r1, [r6, #-3136] @ zero_extendqisi2 + sub r3, r3, r2 + lsl r3, fp, r3 + sub r3, r3, #1 + and r0, r3, r0, lsr r2 + bl __aeabi_uidiv + mov r2, #0 + mov r1, fp + uxth r0, r0 + bl gc_add_sblk +.L3872: + ldr r2, [r5, #12] + ldr r3, [r4, #1096] + ldr r2, [r2, #4] + ldr r3, [r3, #544] + cmp r2, r3 + beq .L3873 + movw r2, #2163 + mov r1, r9 + ldr r0, .L3886+12 + bl rk_printk + bl dump_stack +.L3873: + mov r0, r5 + bl zbuf_free +.L3871: + ldr r3, [r4, #1096] + ldr r1, [r4, #2780] + ldr r2, [r3, #544] + add r2, r2, #1 + cmp r2, r1 + str r2, [r3, #544] + bcc .L3874 + mvn r2, #0 + str r2, [r3, #544] + ldr r2, [r3, #548] + add r2, r2, #1 + str r2, [r3, #548] + bl ftl_flush + bl pm_flush + bl ftl_ext_info_flush + mov r0, #0 + bl ftl_info_flush +.L3869: + add sp, sp, #12 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L3874: + ldr r3, [sp, #4] + cmn r3, #1 + bne .L3869 + ldrh r3, [r6, #-14] + add r7, r7, #1 + cmp r8, r3, lsr #2 + bcc .L3878 + b .L3869 +.L3870: + ldr r2, [r3, #536] + ldr r1, [r3, #12] + add r2, r2, #12910592 + add r2, r2, #49408 + cmp r1, r2 + bhi .L3880 + ldr r0, [r4, #2800] + ldr r2, [r3, #540] + ldr r0, [r0, #44] + add r2, r2, #4992 + add r2, r2, #8 + cmp r0, r2 + bls .L3869 +.L3880: + ldr r2, [r4, #2800] + ldr r2, [r2, #44] + str r1, [r3, #536] + str r2, [r3, #540] + mov r2, #0 + str r2, [r3, #544] + b .L3869 +.L3887: + .align 2 +.L3886: + .word .LANCHOR0 + .word .LANCHOR3 + .word .LANCHOR1+2411 + .word .LC0 + .fnend + .size gc_scan_static_data, .-gc_scan_static_data + .align 2 + .global gc_block_vpn_scan + .syntax unified + .arm + .fpu softvfp + .type gc_block_vpn_scan, %function +gc_block_vpn_scan: + .fnstart + @ args = 0, pretend = 0, frame = 32 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + movw r5, #1080 + ldr r4, .L3922 + .pad #44 + sub sp, sp, #44 + ldr r2, [r4, #1096] + ldrh r3, [r4, r5] + ldr r2, [r2, #608] + cmp r2, r3 + bcs .L3888 + bl timer_get_time + ldr r6, [r4, #1096] + ldr r3, [r6, #604] + add r3, r3, #29952 + add r3, r3, #48 + cmp r0, r3 + bls .L3888 + bl timer_get_time + ldr r3, [r4, #1096] + str r0, [r6, #604] + ldrh r1, [r4, r5] + ldr r2, [r3, #600] + cmp r2, r1 + bcs .L3890 + ldr r1, [r4, #2800] + ldrh r1, [r1, #134] + cmp r2, r1 + bcs .L3891 +.L3890: + ldr r2, [r4, #2800] + ldrh r2, [r2, #134] + str r2, [r3, #600] +.L3891: + ldr r5, [r3, #600] + movw r3, #65535 + uxth r7, r5 + cmp r7, r3 + bne .L3892 + movw r2, #2504 + ldr r1, .L3922+4 + ldr r0, .L3922+8 + bl rk_printk + bl dump_stack +.L3892: + ldr r3, [r4, #1096] + add r1, sp, #24 + mov r0, r7 + ldr r2, [r3, #600] + add r2, r2, #1 + str r2, [r3, #600] + ldr r2, [r3, #608] + add r2, r2, #1 + str r2, [r3, #608] + bl ftl_get_blk_list_in_sblk + uxth r3, r0 + cmp r3, #0 + beq .L3888 + ldr r10, [r4, #1084] + uxth r5, r5 + add r10, r10, r5, lsl #2 + ldrb r3, [r10, #2] @ zero_extendqisi2 + and r2, r3, #224 + and r3, r3, #192 + cmp r3, #0 + cmpne r2, #224 + beq .L3893 + ldr r3, [r4, #1096] + ldrh r1, [r3, #16] + cmp r1, r7 + beq .L3893 + ldrh r1, [r3, #48] + cmp r1, r7 + beq .L3893 + ldrh r3, [r3, #80] + cmp r3, r7 + bne .L3894 +.L3893: + cmp r2, #0 + bne .L3888 + ldr r3, [r4, #1092] + lsl r5, r5, #1 + ldrh r3, [r3, r5] + cmp r3, #0 + beq .L3895 + movw r2, #2521 + ldr r1, .L3922+4 + ldr r0, .L3922+8 + bl rk_printk + bl dump_stack +.L3895: + ldr r3, [r4, #1092] + mov r2, #0 + strh r2, [r3, r5] @ movhi +.L3888: + add sp, sp, #44 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L3894: + uxth r0, r0 + add r3, sp, #40 + add r0, r3, r0, lsl #1 + movw r3, #65535 + ldrh r8, [r0, #-18] + cmp r8, r3 + bne .L3897 + movw r2, #2529 + ldr r1, .L3922+4 + ldr r0, .L3922+8 + bl rk_printk + bl dump_stack +.L3897: + ldr r6, .L3922+12 + sub fp, r6, #3088 + ldrh r2, [fp, #-8] + sub r2, r2, #1 + uxth r3, r2 + sub r2, r6, #3072 + ldrh r1, [r2, #-2] + ldrb r2, [r10, #2] @ zero_extendqisi2 + and r2, r2, #224 + mul r1, r8, r1 + cmp r2, #160 + sub r2, r6, #3104 + movne r8, #1 + bne .L3898 + ldrb r8, [r6, #-3128] @ zero_extendqisi2 + cmp r8, #2 + ldrheq r3, [r2, #-14] + orr r1, r1, r8, lsl #24 + uxthne r8, r8 + subeq r3, r3, #1 + uxtheq r3, r3 +.L3898: + orr r3, r3, r1 + str r2, [sp, #12] + mov r0, #1 + str r3, [sp, #8] + bl buf_alloc + ldr r3, [sp, #8] + mov r1, #1 + mov r9, r0 + str r3, [r0, #24] + bl sblk_read_page + ldr r2, [sp, #12] + mov r1, #255 + ldr r0, [r6, #-3132] + ldrh r3, [r2, #-14] + ldrb r2, [r6, #-3127] @ zero_extendqisi2 + mul r2, r2, r3 + lsl r2, r2, #2 + bl ftl_memset + ldr r2, [r9, #36] + cmn r2, #1 + cmpne r2, #512 + moveq r2, #1 + movne r2, #0 + moveq r2, #0 + beq .L3921 + ldr r3, [r9, #12] + ldr r1, [r3] + ldr r3, .L3922+16 + cmp r1, r3 + beq .L3901 +.L3921: + mov r1, #1 + mov r0, r7 + bl gc_add_sblk + mov r0, r9 + bl zbuf_free + b .L3888 +.L3901: + ldrh r3, [fp, #-8] + mov fp, r2 + ldrb r1, [r6, #-3127] @ zero_extendqisi2 + smulbb r1, r1, r3 + smulbb r8, r1, r8 + uxth r3, r8 + mov r8, r2 + str r3, [sp, #12] + ldr r3, [r9, #4] + str r3, [sp, #8] +.L3902: + ldr r3, [sp, #12] + cmp fp, r3 + blt .L3905 + mov r0, r9 + lsl r6, r5, #1 + bl zbuf_free + ldr r3, .L3922+20 + ldr r3, [r3] + tst r3, #256 + beq .L3906 + ldr r3, [r4, #1092] + mov r1, r5 + ldr r0, .L3922+24 + ldrh r2, [r3, r6] + ldrb r3, [r10, #2] @ zero_extendqisi2 + lsr r3, r3, #5 + str r3, [sp] + mov r3, r8 + bl rk_printk +.L3906: + ldr r3, [r4, #1092] + cmp r8, #31 + strh r8, [r3, r6] @ movhi + bhi .L3888 + mov r2, #0 + mov r1, #1 + mov r0, r7 + bl gc_add_sblk + b .L3888 +.L3905: + ldr r3, [sp, #8] + ldr r0, [r3, fp, lsl #2] + cmn r0, #1 + beq .L3903 + bl lpa_hash_get_ppa + cmn r0, #1 + str r0, [sp, #20] + bne .L3904 + ldr r3, [sp, #8] + mov r2, #0 + add r1, sp, #20 + ldr r0, [r3, fp, lsl #2] + bl pm_log2phys +.L3904: + ldr r2, .L3922+28 + mov r3, #1 + ldr r0, [sp, #20] + ldrb r1, [r6, #-3136] @ zero_extendqisi2 + ldrh ip, [r2] + ldrb r2, [r4, #1153] @ zero_extendqisi2 + rsb r2, r2, #24 + sub r2, r2, ip + lsl r2, r3, r2 + sub r2, r2, #1 + and r0, r2, r0, lsr ip + bl __aeabi_uidiv + cmp r5, r0 + addeq r8, r8, #1 + uxtheq r8, r8 +.L3903: + add fp, fp, #1 + b .L3902 +.L3923: + .align 2 +.L3922: + .word .LANCHOR0 + .word .LANCHOR1+2431 + .word .LC0 + .word .LANCHOR3 + .word -178307901 + .word .LANCHOR2 + .word .LC255 + .word .LANCHOR3-3138 + .fnend + .size gc_block_vpn_scan, .-gc_block_vpn_scan + .align 2 + .global ftl_sblk_dump + .syntax unified + .arm + .fpu softvfp + .type ftl_sblk_dump, %function +ftl_sblk_dump: + .fnstart + @ args = 0, pretend = 0, frame = 80 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + lsl r3, r0, #2 + ldr r4, .L3961 + .pad #124 + sub sp, sp, #124 + lsl r2, r0, #2 + mov r7, r0 + str r3, [sp, #68] + ldr r3, [r4, #1084] + str r1, [sp, #60] + ldr r1, [r3, r0, lsl #2] + add r2, r3, r2 + ldrb r2, [r2, #2] @ zero_extendqisi2 + ubfx r1, r1, #11, #8 + str r1, [sp, #4] + lsl r1, r0, #2 + ldrh r3, [r3, r1] + mov r1, r0 + ldr r0, .L3961+4 + ubfx r3, r3, #0, #11 + str r3, [sp] + ubfx r3, r2, #3, #2 + lsr r2, r2, #5 + bl rk_printk + movw r3, #65535 + cmp r7, r3 + beq .L3947 + movw r3, #1080 + ldrh r3, [r4, r3] + cmp r3, r7 + bls .L3947 + ldr r3, [r4, #1084] + lsl r2, r7, #2 + add r1, sp, #104 + strh r7, [sp, #88] @ movhi + mov r0, r7 + mov r5, #0 + add r3, r3, r2 + mov fp, r5 + ldrb r3, [r3, #2] @ zero_extendqisi2 + and r3, r3, #224 + cmp r3, #160 + ldreq r3, .L3961+8 + movne r9, #1 + ldrbeq r9, [r3, #-3128] @ zero_extendqisi2 + bl ftl_get_blk_list_in_sblk + ldr r3, .L3961+12 + uxtb r0, r0 + lsl r2, r7, #2 + strh r5, [sp, #90] @ movhi + strb r0, [sp, #97] + mov r1, r7 + ldrh r3, [r3, #-8] + strb r5, [sp, #93] + strh r5, [sp, #98] @ movhi + smulbb r3, r3, r0 + strh r3, [sp, #94] @ movhi + ldr r3, [r4, #1084] + add r3, r3, r2 + ldrb r2, [r3, #2] @ zero_extendqisi2 + mov r3, r9 + str r0, [sp] + ldr r0, .L3961+16 + lsr r2, r2, #5 + bl rk_printk + mov r0, #1 + bl buf_alloc + mov r6, r0 + str r5, [sp, #44] + str r5, [sp, #52] +.L3927: + ldr r3, .L3961+20 + ldrh r2, [r3] + uxth r3, r5 + cmp r2, r3 + bls .L3944 + str r3, [sp, #72] + lsl r3, r3, #1 + sub r2, r3, #1 + str r2, [sp, #76] + uxth r2, r5 + add r3, r3, r2 + sub r3, r3, #1 + str r3, [sp, #64] + mov r3, #0 + b .L3960 +.L3941: + ldrh r3, [sp, #48] + add r2, sp, #120 + add r3, r2, r3, lsl #1 + ldrh r3, [r3, #-16] + str r3, [sp, #56] + movw r3, #65535 + ldr r2, [sp, #56] + cmp r2, r3 + beq .L3928 + ldr r3, .L3961+24 + cmp r9, #3 + ldrh r4, [r3, #-2] + mul r3, r2, r4 + bne .L3929 + ldr r2, .L3961 + ldrb r1, [r2, #1158] @ zero_extendqisi2 + cmp r1, #0 + ldrne r2, [sp, #64] + bne .L3958 + ldrb r2, [r2, #1159] @ zero_extendqisi2 + lsl r4, r8, #24 + cmp r2, #0 + ldrne r2, [sp, #64] + uxtaheq r3, r3, r5 + addne r3, r3, r2 + addne r3, r3, r8 + orr r4, r4, r3 +.L3931: + mov r1, #1 + str r4, [r6, #24] + mov r0, r6 + bl sblk_read_page + ldr r2, [r6, #12] + ldr r3, [r6, #4] + ldr r10, [r6, #36] + ldr r1, [r2, #12] + ldr r0, .L3961+28 + str r1, [sp, #32] + ldr r1, [r2, #8] + str r1, [sp, #28] + ldr r1, [r2, #4] + str r1, [sp, #24] + ldr r2, [r2] + ldr r1, [sp, #56] + str r2, [sp, #20] + ldr r2, [r3, #12] + str r2, [sp, #16] + ldr r2, [r3, #8] + str r2, [sp, #12] + ldr r2, [r3, #4] + str r2, [sp, #8] + ldr r3, [r3] + ldr r2, [sp, #72] + str r10, [sp] + str r3, [sp, #4] + mov r3, r4 + bl rk_printk + ldr r3, [sp, #52] + cmn r10, #1 + cmpne r10, #512 + moveq r3, #1 + ldr r0, .L3961+32 + str r3, [sp, #52] + ldr r3, .L3961+36 + ldr r3, [r3, #4] + blx r3 + ldr r3, .L3961 + ldr r2, [sp, #68] + ldr r3, [r3, #1084] + add r3, r3, r2 + ldrb r2, [r3, #2] @ zero_extendqisi2 + and r2, r2, #224 + cmp r2, #32 + cmpne r2, #224 + moveq r10, #1 + movne r10, #0 + beq .L3928 + ldr r3, [r6, #12] + ldr r0, [r3, #4] + bl lpa_hash_get_ppa + cmn r0, #1 + str r0, [sp, #84] + bne .L3935 + ldr r3, [r6, #12] + mov r2, r10 + add r1, sp, #84 + ldr r0, [r3, #4] + bl pm_log2phys +.L3935: + ldr r3, [sp, #84] + cmp r4, r3 + bne .L3936 + ldr r3, [sp, #44] + mov r1, r4 + ldr r2, [r6, #12] + ldr r0, .L3961+40 + add r3, r3, #1 + ldr r2, [r2, #4] + str r3, [sp, #44] + bl rk_printk +.L3936: + ldr r3, [sp, #60] + cmp r3, #0 + beq .L3938 + ldr r2, [r3, fp, lsl #2] + lsl r4, fp, #2 + ldr r3, [r6, #12] + ldr r3, [r3, #4] + cmp r3, r2 + beq .L3939 + ldr r3, .L3961+44 + ldr r3, [r3] + tst r3, #4096 + beq .L3939 + mov r1, fp + ldr r0, .L3961+48 + bl rk_printk +.L3939: + ldr r3, [sp, #60] + ldr r2, [r6, #12] + ldr r3, [r3, r4] + ldr r2, [r2, #4] + cmp r2, r3 + cmnne r3, #1 + beq .L3938 + movw r2, #1575 + ldr r1, .L3961+52 + ldr r0, .L3961+56 + bl rk_printk + bl dump_stack +.L3938: + add fp, fp, #1 +.L3928: + add r8, r8, #1 + uxth r8, r8 +.L3943: + cmp r9, r8 + bcs .L3941 + ldr r3, [sp, #48] + add r3, r3, #1 +.L3960: + str r3, [sp, #48] + ldrb r2, [sp, #97] @ zero_extendqisi2 + ldrh r3, [sp, #48] + cmp r2, r3 + bls .L3942 + mov r8, #1 + b .L3943 +.L3929: + cmp r9, #2 + uxtahne r4, r3, r5 + bne .L3931 + ldr r2, [sp, #76] +.L3958: + add r4, r3, r2 + ldr r2, .L3961+8 + add r3, r4, r8 + ldrb r4, [r2, #-3128] @ zero_extendqisi2 + orr r4, r3, r4, lsl #24 + b .L3931 +.L3942: + add r5, r5, #1 + b .L3927 +.L3944: + mov r0, r6 + bl zbuf_free + ldr r3, .L3961 + lsl r2, r7, #1 + ldr r0, .L3961+60 + ldr r1, [r3, #1092] + ldr r3, [sp, #44] + ldrh r2, [r1, r2] + mov r1, r7 + bl rk_printk + ldr r0, [sp, #52] +.L3924: + add sp, sp, #124 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L3947: + mov r0, #0 + b .L3924 +.L3962: + .align 2 +.L3961: + .word .LANCHOR0 + .word .LC256 + .word .LANCHOR3 + .word .LANCHOR3-3088 + .word .LC257 + .word .LANCHOR3-3096 + .word .LANCHOR3-3072 + .word .LC195 + .word 644245000 + .word arm_delay_ops + .word .LC258 + .word .LANCHOR2 + .word .LC259 + .word .LANCHOR1+2449 + .word .LC0 + .word .LC260 + .fnend + .size ftl_sblk_dump, .-ftl_sblk_dump + .align 2 + .global zftl_read + .syntax unified + .arm + .fpu softvfp + .type zftl_read, %function +zftl_read: + .fnstart + @ args = 0, pretend = 0, frame = 48 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r7, r3 + ldr r3, .L4026 + .pad #76 + sub sp, sp, #76 + mov r4, r0 + mov r6, r1 + str r2, [sp, #24] + ldr r3, [r3] + tst r3, #4096 + beq .L3964 + mov r3, r2 + mov r2, r1 + mov r1, r0 + ldr r0, .L4026+4 + bl rk_printk +.L3964: + cmp r4, #0 + bne .L3965 + ldr r3, .L4026+8 + mov r4, #24576 + ldr r3, [r3, #1032] +.L3966: + ldr r2, [sp, #24] + cmp r3, r2 + cmpcs r3, r6 + movls r5, #1 + movhi r5, #0 + bls .L3995 + add r2, r6, r2 + cmp r3, r2 + bcc .L3995 + add r3, r4, r6 + ldr r4, .L4026+8 + str r3, [sp, #28] + ldr r1, [sp, #24] + ldr r2, [r4, #2800] + ldr r0, [sp, #28] + ldr r3, [r2, #24] + add r3, r3, r1 + str r3, [r2, #24] + ldr r3, .L4026+12 + ldrb r6, [r3, #-2546] @ zero_extendqisi2 + mov r1, r6 + bl __aeabi_uidiv + ldr r3, [sp, #24] + mov r1, r6 + ldr r2, [sp, #28] + str r0, [sp, #36] + add r3, r3, r2 + sub r0, r3, #1 + str r3, [sp, #44] + bl __aeabi_uidiv + ldr r3, [sp, #36] + str r5, [sp, #40] + ldr r6, [sp, #36] + ldr r5, .L4026+12 + rsb r3, r3, #1 + add r3, r3, r0 + str r0, [sp, #48] + str r3, [sp, #32] +.L3968: + ldr r3, [sp, #32] + cmp r3, #0 + bne .L3992 + bl timer_get_time + str r0, [r5, #-8] + ldr r0, [sp, #40] +.L3963: + add sp, sp, #76 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L3965: + cmp r4, #3 + bhi .L3995 + lsl r4, r4, #13 + mov r3, #8192 + b .L3966 +.L3992: + ldr r3, [sp, #36] + ldr r2, [sp, #48] + ldrb r1, [r5, #-2546] @ zero_extendqisi2 + cmp r6, r2 + cmpne r6, r3 + moveq r10, #1 + movne r10, #0 + uxth r8, r1 + bne .L3969 + cmp r6, r3 + bne .L3970 + ldr r0, [sp, #28] + bl __aeabi_uidivmod + uxth r10, r1 + ldr r3, [sp, #24] + sub r8, r8, r10 + uxth r8, r8 + cmp r3, r8 + ldrhcc r8, [sp, #24] +.L3969: + ldr r2, .L4026+16 + mov r3, #0 + mov r9, r2 +.L3973: + ldr r1, [r2, #20] + cmp r6, r1 + bne .L3971 + ldrb r1, [r2, #2] @ zero_extendqisi2 + tst r1, #8 + beq .L3971 + mov r2, #48 + lsl r8, r8, #9 + mov r0, r7 + mla r3, r2, r3, r4 + add r7, r7, r8 + mov r2, r8 + ldr r1, [r3, #1236] + add r1, r1, r10, lsl #9 + bl ftl_memcpy +.L3972: + ldr r3, [sp, #32] + add r6, r6, #1 + sub r3, r3, #1 + str r3, [sp, #32] +.L3979: + ldrb r3, [r4, #2769] @ zero_extendqisi2 + ldr r2, [sp, #32] + cmp r2, #0 + cmpne r3, #2 + bhi .L3968 + ldrb r1, [r5, #-2535] @ zero_extendqisi2 + cmp r1, #0 + beq .L3968 + ldrb r0, [r5, #-2536] @ zero_extendqisi2 + add r0, r0, r0, lsl #1 + add r0, r9, r0, lsl #4 + bl sblk_read_page +.L3981: + ldrb r3, [r5, #-2535] @ zero_extendqisi2 + cmp r3, #0 + bne .L3991 + mvn r2, #0 + strb r3, [r5, #-2535] + strb r2, [r5, #-2536] + b .L3968 +.L3970: + ldr r3, [sp, #28] + mov r10, #0 + ldr r2, [sp, #24] + add r8, r3, r2 + mls r1, r6, r1, r8 + uxtb r8, r1 + b .L3969 +.L3971: + add r3, r3, #1 + add r2, r2, #48 + cmp r3, #32 + bne .L3973 + mov r0, r6 + bl lpa_hash_get_ppa + cmn r0, #1 + str r0, [sp, #68] + bne .L3974 + mov r2, #0 + add r1, sp, #68 + mov r0, r6 + bl pm_log2phys +.L3974: + ldr r3, [sp, #68] + cmn r3, #1 + moveq r8, #0 + beq .L3976 + mov r0, #0 + bl buf_alloc + subs r3, r0, #0 + beq .L3979 + ldr r1, [r4, #2800] + ldr r2, [r1, #40] + add r2, r2, #1 + str r2, [r1, #40] + ldr r2, [sp, #68] + str r7, [r3, #8] + add r7, r7, r8, lsl #9 + str r6, [r3, #20] + str r2, [r3, #24] + str r2, [r3, #28] + strb r8, [r3, #40] + strb r10, [r3, #41] + bl zftl_add_read_buf + b .L3972 +.L3978: + mla r3, r3, r6, r8 + ldr r2, [sp, #28] + ldr r1, [sp, #44] + cmp r2, r3 + movls r2, #1 + movhi r2, #0 + cmp r1, r3 + movls r2, #0 + cmp r2, #0 + beq .L3977 + mov r0, r7 + add r7, r7, #512 + mov r2, #512 + mov r1, #0 + bl ftl_memset +.L3977: + add r8, r8, #1 +.L3976: + ldrb r3, [r5, #-2546] @ zero_extendqisi2 + cmp r8, r3 + bcc .L3978 + b .L3972 +.L3991: + ldrb r3, [r5, #-2536] @ zero_extendqisi2 + cmp r3, #255 + bne .L3982 + movw r2, #1284 + ldr r1, .L4026+20 + ldr r0, .L4026+24 + bl rk_printk + bl dump_stack +.L3982: + ldr r3, .L4026+12 + ldr r1, .L4026+12 + ldrb r9, [r3, #-2536] @ zero_extendqisi2 + ldr r3, .L4026+16 + add r2, r9, r9, lsl #1 + add r3, r3, r2, lsl #4 + mov r2, #48 + mla r2, r2, r9, r4 + str r3, [sp, #52] + ldr r10, [r2, #1268] + ldrb r3, [r2, #1232] @ zero_extendqisi2 + cmn r10, #1 + strb r3, [r1, #-2536] + bne .L3983 + ldr r2, [r4, #1096] + str r10, [sp, #40] + ldr r3, [r2, #552] + add r3, r3, #1 + str r3, [r2, #552] +.L3984: + mov r1, #48 + cmn r10, #1 + mla r1, r1, r9, r4 + movne r2, #0 + moveq r2, #1 + ldr r3, [r1, #1244] + ldr r0, [r1, #1252] + ldr ip, [r3, #4] + cmp ip, r0 + orrne r2, r2, #1 + cmp r2, #0 + beq .L3985 + ldrb r0, [r4, #1153] @ zero_extendqisi2 + mvn ip, #0 + ldr lr, [r1, #1256] + ldrb fp, [r1, #1272] @ zero_extendqisi2 + ldrb r8, [r5, #-2546] @ zero_extendqisi2 + mvn ip, ip, lsl r0 + ldr r10, [r1, #1236] + ldr r2, [r1, #1240] + rsb r1, r0, #24 + and r0, ip, lr, lsr r1 + cmp fp, r8 + movcc r2, r10 + str r8, [sp] + bic r1, lr, ip, lsl r1 + uxtb r0, r0 + bl flash_read_page_en + mov r10, r0 +.L3985: + mov r8, #48 + cmn r10, #1 + mla r8, r8, r9, r4 + movne fp, #0 + moveq fp, #1 + ldr r3, [r8, #1244] + ldr r2, [r8, #1252] + ldr r3, [r3, #4] + cmp r3, r2 + moveq r3, fp + orrne r3, fp, #1 + cmp r3, #0 + beq .L3987 + ldr r2, [r4, #1096] + ldr r0, .L4026+28 + ldr r3, [r2, #552] + add r3, r3, #1 + str r3, [r2, #552] + ldr r3, [r8, #1244] + ldrb r1, [r8, #1233] @ zero_extendqisi2 + ldr r2, [r3, #12] + str r2, [sp, #16] + ldr r2, [r3, #8] + str r2, [sp, #12] + ldr r2, [r3, #4] + str r2, [sp, #8] + mov r2, r10 + ldr r3, [r3] + str r3, [sp, #4] + ldr r3, [r8, #1256] + str r3, [sp] + ldr r3, [r8, #1252] + bl rk_printk + ldr r3, .L4026+32 + ldr r2, [r8, #1256] + ldrb r1, [r5, #-3136] @ zero_extendqisi2 + ldrh r0, [r3, #-2] + ldrb r3, [r4, #1153] @ zero_extendqisi2 + lsr r2, r2, r0 + rsb r3, r3, #24 + sub r3, r3, r0 + mvn r0, #0 + bic r0, r2, r0, lsl r3 + bl __aeabi_uidiv + mov r1, #0 + uxth r0, r0 + bl ftl_sblk_dump +.L3987: + mov r3, #48 + mla r3, r3, r9, r4 + ldr r2, [r3, #1244] + ldr r3, [r3, #1252] + ldr r2, [r2, #4] + cmp r2, r3 + orrne fp, fp, #1 + cmp fp, #0 + beq .L3988 + movw r2, #1320 + ldr r1, .L4026+20 + ldr r0, .L4026+24 + bl rk_printk + bl dump_stack +.L3988: + mov r3, #48 + mla r9, r3, r9, r4 + ldrb r3, [r5, #-2546] @ zero_extendqisi2 + ldrb r2, [r9, #1272] @ zero_extendqisi2 + cmp r3, r2 + ldrbls r3, [r9, #1234] @ zero_extendqisi2 + bicls r3, r3, #8 + strbls r3, [r9, #1234] + bls .L3990 + ldrb r1, [r9, #1273] @ zero_extendqisi2 + lsl r2, r2, #9 + ldr r3, [r9, #1236] + ldr r0, [r9, #1240] + add r1, r3, r1, lsl #9 + bl ftl_memcpy +.L3990: + ldr r1, [sp, #52] + ldr r0, .L4026+36 + bl buf_remove_buf + ldr r0, [sp, #52] + bl zbuf_free + ldrb r3, [r5, #-2535] @ zero_extendqisi2 + sub r3, r3, #1 + strb r3, [r5, #-2535] + b .L3981 +.L3983: + cmp r10, #256 + bne .L3984 + ldr r1, .L4026+40 + mov fp, #1 + ldrb r0, [r4, #1153] @ zero_extendqisi2 + ldr r3, [r2, #1256] + ldrh ip, [r1] + rsb r0, r0, #24 + str r2, [sp, #60] + ldr r2, .L4026+12 + sub r0, r0, ip + str r3, [sp, #56] + lsl r0, fp, r0 + ldrb r1, [r2, #-3136] @ zero_extendqisi2 + sub r0, r0, #1 + and r0, r0, r3, lsr ip + bl __aeabi_uidiv + ldr r2, [sp, #60] + mov r8, r0 + uxth r1, r0 + ldr r3, [sp, #56] + ldr r0, .L4026+44 + ldr r2, [r2, #1252] + bl rk_printk + mov r2, #0 + mov r1, fp + uxth r0, r8 + bl gc_add_sblk + b .L3984 +.L3995: + mvn r0, #0 + b .L3963 +.L4027: + .align 2 +.L4026: + .word .LANCHOR2 + .word .LC261 + .word .LANCHOR0 + .word .LANCHOR3 + .word .LANCHOR0+1232 + .word .LANCHOR1+2463 + .word .LC0 + .word .LC263 + .word .LANCHOR3-3136 + .word .LANCHOR0+2771 + .word .LANCHOR3-3138 + .word .LC262 + .fnend + .size zftl_read, .-zftl_read + .align 2 + .global zftl_vendor_read + .syntax unified + .arm + .fpu softvfp + .type zftl_vendor_read, %function +zftl_vendor_read: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + mov r3, r2 + mov r2, r1 + add r1, r0, #512 + mov r0, #2 + b zftl_read + .fnend + .size zftl_vendor_read, .-zftl_vendor_read + .align 2 + .global zftl_sys_read + .syntax unified + .arm + .fpu softvfp + .type zftl_sys_read, %function +zftl_sys_read: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + mov r3, r2 + mov r2, r1 + mov r1, r0 + mov r0, #2 + b zftl_read + .fnend + .size zftl_sys_read, .-zftl_sys_read + .align 2 + .syntax unified + .arm + .fpu softvfp + .type zftl_debug_proc_write, %function +zftl_debug_proc_write: + .fnstart + @ args = 0, pretend = 0, frame = 96 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + cmp r2, #79 + .pad #132 + sub sp, sp, #132 + mvnhi r0, #21 + add r6, sp, #48 + str r6, [sp, #44] + bhi .L4030 + mov r0, r6 + mov r4, r2 + bl rk_copy_from_user + cmp r0, #0 + mvnne r0, #13 + bne .L4030 + add r3, sp, #128 + mov r1, r6 + add r3, r3, r4 + strb r0, [r3, #-80] + ldr r0, .L4056 + bl rk_printk + mov r3, #16 + mov r2, #1 + mov r1, r6 + ldr r0, .L4056+4 + bl rknand_print_hex + bl rknand_device_lock + mov r2, #7 + ldr r1, .L4056+8 + mov r0, r6 + bl memcmp + subs r7, r0, #0 + bne .L4032 + ldr r5, .L4056+12 + movw r3, #698 + mov r2, #4 + ldr r0, .L4056+16 + ldr r6, .L4056+20 + movw r8, #65535 + ldr r1, [r5, #2800] + ldrh r3, [r1, r3] + add r1, r1, #704 + bl rknand_print_hex + ldr r1, [r5, #2800] + mov r2, #2 + ldrh r3, [r6, #-176] + ldr r0, .L4056+24 + add r1, r1, #416 + bl rknand_print_hex +.L4033: + ldrh r3, [r6, #-176] + cmp r7, r3 + blt .L4035 +.L4036: + bl rknand_device_unlock + mov r0, r4 +.L4030: + add sp, sp, #132 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L4035: + mov r0, #300 + bl msleep + ldr r2, [r5, #2800] + add r3, r7, #208 + lsl r3, r3, #1 + ldrh r0, [r2, r3] + cmp r0, r8 + beq .L4034 + mov r1, #0 + bl ftl_sblk_dump +.L4034: + add r7, r7, #1 + b .L4033 +.L4032: + mov r2, #7 + ldr r1, .L4056+28 + mov r0, r6 + bl memcmp + subs r5, r0, #0 + bne .L4037 + ldr r8, .L4056+12 + movw r3, #698 + mov r2, #4 + ldr r0, .L4056+16 + ldr r7, .L4056+20 + ldr r1, [r8, #2800] + ldr r10, .L4056+32 + ldr fp, .L4056+36 + ldrh r3, [r1, r3] + add r1, r1, #704 + bl rknand_print_hex + ldr r1, [r8, #2800] + mov r2, #2 + ldrh r3, [r7, #-176] + ldr r0, .L4056+24 + add r1, r1, #416 + bl rknand_print_hex + mov r0, #50 + bl msleep + ldr r0, .L4056+40 + add r6, sp, #128 + add r1, sp, #55 + str r1, [r6, #-84]! + bl rk_printk + mov r1, r6 + ldr r0, [sp, #44] + bl rk_simple_strtoull.constprop.33 + str r8, [sp, #36] + uxth r3, r0 + ldr r8, .L4056+44 + mov r6, r0 + str r0, [sp, #40] + str r3, [sp, #32] +.L4039: + add r9, r8, r5 + ldrh r1, [r8, r5] + ldrh r2, [r9, #2] + mov r0, r10 + bl rk_printk + ldrh r3, [r5, r8] + ldr r2, [sp, #32] + cmp r3, r2 + bne .L4038 + ldrb r3, [r7, #-2546] @ zero_extendqisi2 + mov r0, fp + mov r2, #4 + ldr r1, [r9, #4] + lsl r3, r3, #7 + bl rknand_print_hex + mov r0, #50 + bl msleep +.L4038: + add r5, r5, #8 + cmp r5, #256 + bne .L4039 + mov r0, #300 + uxth r6, r6 + bl msleep + mov r0, #1 + add r6, r6, #176 + bl buf_alloc + ldr r3, [sp, #36] + mov r5, r0 + mov r1, #1 + ldr r3, [r3, #2800] + ldr r3, [r3, r6, lsl #2] + str r3, [r0, #24] + str r3, [sp, #40] + bl sblk_read_page + ldr r2, [r5, #12] + ldr r3, [r5, #4] + ldr r0, .L4056+48 + ldr r1, [r2, #12] + str r1, [sp, #24] + ldr r1, [r2, #8] + str r1, [sp, #20] + ldr r1, [r2, #4] + str r1, [sp, #16] + ldr r2, [r2] + ldr r1, [sp, #40] + str r2, [sp, #12] + ldr r2, [r3, #12] + str r2, [sp, #8] + ldr r2, [r3, #8] + str r2, [sp, #4] + ldr r2, [r3, #4] + str r2, [sp] + ldr r3, [r3] + ldr r2, [r5, #36] + bl rk_printk + ldrb r3, [r7, #-2546] @ zero_extendqisi2 + mov r2, #4 + ldr r1, [r5, #4] + ldr r0, .L4056+52 + lsl r3, r3, #7 +.L4055: + bl rknand_print_hex + mov r0, r5 + bl zbuf_free + b .L4036 +.L4037: + mov r2, #7 + ldr r1, .L4056+56 + mov r0, r6 + bl memcmp + cmp r0, #0 + bne .L4040 + bl dump_ftl_info + b .L4036 +.L4040: + mov r2, #9 + ldr r1, .L4056+60 + mov r0, r6 + bl memcmp + cmp r0, #0 + bne .L4041 + add r1, sp, #128 + add r0, sp, #57 + str r0, [r1, #-84]! + bl rk_simple_strtoull.constprop.33 + ldr r3, .L4056+64 + str r0, [sp, #40] + strh r0, [r3, #-4] @ movhi + bl dump_all_list_info + b .L4036 +.L4041: + mov r2, #8 + ldr r1, .L4056+68 + mov r0, r6 + bl memcmp + cmp r0, #0 + beq .L4036 + mov r2, #8 + ldr r1, .L4056+72 + mov r0, r6 + bl memcmp + cmp r0, #0 + bne .L4043 + add r5, sp, #128 + add r1, sp, #56 + ldr r0, .L4056+40 + str r1, [r5, #-84]! + bl rk_printk + mov r1, r5 + ldr r0, [sp, #44] + bl rk_simple_strtoull.constprop.33 + str r0, [sp, #40] + mov r0, #1 + bl buf_alloc + ldr r3, [sp, #40] + mov r5, r0 + mov r1, #1 + ldr r6, .L4056+20 + str r3, [r0, #24] + bl sblk_read_page + ldr r2, [r5, #12] + ldr r3, [r5, #4] + ldr r0, .L4056+48 + ldr r1, [r2, #12] + str r1, [sp, #24] + ldr r1, [r2, #8] + str r1, [sp, #20] + ldr r1, [r2, #4] + str r1, [sp, #16] + ldr r2, [r2] + ldr r1, [sp, #40] + str r2, [sp, #12] + ldr r2, [r3, #12] + str r2, [sp, #8] + ldr r2, [r3, #8] + str r2, [sp, #4] + ldr r2, [r3, #4] + str r2, [sp] + ldr r3, [r3] + ldr r2, [r5, #36] + bl rk_printk + ldrb r3, [r6, #-2546] @ zero_extendqisi2 + mov r2, #4 + ldr r1, [r5, #4] + ldr r0, .L4056+76 + lsl r3, r3, #7 + bl rknand_print_hex + ldrb r3, [r6, #-2546] @ zero_extendqisi2 + mov r2, #4 + ldr r1, [r5, #12] + ldr r0, .L4056+80 + lsl r3, r3, #1 + b .L4055 +.L4043: + mov r2, #8 + ldr r1, .L4056+84 + mov r0, r6 + bl memcmp + subs r7, r0, #0 + bne .L4044 + add r5, sp, #128 + add r1, sp, #56 + ldr r0, .L4056+40 + str r1, [r5, #-84]! + bl rk_printk + mov r1, r5 + ldr r0, [sp, #44] + bl rk_simple_strtoull.constprop.33 + mov r1, r7 + str r0, [sp, #40] + uxth r0, r0 + bl ftl_sblk_dump + b .L4036 +.L4044: + mov r2, #10 + ldr r1, .L4056+88 + mov r0, r6 + bl memcmp + cmp r0, #0 + bne .L4045 + add r1, sp, #58 + add r5, sp, #128 + ldr r0, .L4056+40 + str r1, [r5, #-84]! + bl rk_printk + mov r1, r5 + ldr r0, [sp, #44] + bl rk_simple_strtoull.constprop.33 + ldr r3, .L4056+92 + str r0, [sp, #40] + str r0, [r3] + b .L4036 +.L4045: + mov r0, r6 + mov r2, #8 + ldr r1, .L4056+96 + bl memcmp + subs r6, r0, #0 + bne .L4046 + add r5, sp, #128 + add r1, sp, #56 + ldr r0, .L4056+40 + str r1, [r5, #-84]! + bl rk_printk + mov r1, r5 + ldr r0, [sp, #44] + bl rk_simple_strtoull.constprop.33 + mov r5, r0 + bl lpa_hash_get_ppa + cmn r0, #1 + str r0, [sp, #40] + bne .L4047 + mov r2, r6 + add r1, sp, #40 + mov r0, r5 + bl pm_log2phys +.L4047: + ldr r2, [sp, #40] + mov r1, r5 + ldr r0, .L4056+100 + bl rk_printk + b .L4036 +.L4046: + ldr r0, .L4056+104 + bl rk_printk + ldr r0, .L4056+108 + bl rk_printk + ldr r0, .L4056+112 + bl rk_printk + ldr r0, .L4056+116 + bl rk_printk + ldr r0, .L4056+120 + bl rk_printk + ldr r0, .L4056+124 + bl rk_printk + ldr r0, .L4056+128 + bl rk_printk + ldr r0, .L4056+132 + bl rk_printk + ldr r0, .L4056+136 + bl rk_printk + b .L4036 +.L4057: + .align 2 +.L4056: + .word .LC264 + .word .LC265 + .word .LC266 + .word .LANCHOR0 + .word .LC267 + .word .LANCHOR3 + .word .LC268 + .word .LC269 + .word .LC271 + .word .LC272 + .word .LC270 + .word .LANCHOR3-2532 + .word .LC245 + .word .LC273 + .word .LC274 + .word .LC275 + .word .LANCHOR3-3072 + .word .LC276 + .word .LC277 + .word .LC218 + .word .LC240 + .word .LC278 + .word .LC279 + .word .LANCHOR2 + .word .LC280 + .word .LC281 + .word .LC282 + .word .LC283 + .word .LC284 + .word .LC285 + .word .LC286 + .word .LC287 + .word .LC288 + .word .LC289 + .word .LC290 + .fnend + .size zftl_debug_proc_write, .-zftl_debug_proc_write + .global __aeabi_idivmod + .align 2 + .global ftl_update_l2p_map + .syntax unified + .arm + .fpu softvfp + .type ftl_update_l2p_map, %function +ftl_update_l2p_map: + .fnstart + @ args = 0, pretend = 0, frame = 24 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r7, r0 + ldr r6, .L4088 + .pad #28 + sub sp, sp, #28 + ldrb r8, [r0, #9] @ zero_extendqisi2 + sub r3, r6, #3088 + ldr r4, [r6, #-2556] + ldrh r3, [r3, #-8] + mul r8, r8, r3 + ldrh r3, [r0, #12] + add r4, r4, r3, lsl #2 + sub r3, r8, #-1073741823 + ldr r3, [r4, r3, lsl #2] + cmn r3, #1 + beq .L4059 + movw r2, #1998 + ldr r1, .L4088+4 + ldr r0, .L4088+8 + bl rk_printk + bl dump_stack +.L4059: + mov r5, #0 + sub r4, r4, #4 + mov r10, r5 +.L4060: + cmp r10, r8 + bne .L4066 + ldr r3, .L4088+12 + ldr r4, .L4088+16 + ldr r3, [r3] + tst r3, #4096 + beq .L4067 + ldrh r1, [r7] + ldr r2, [r4, #1092] + ldr r0, .L4088+20 + lsl r3, r1, #1 + ldrh r3, [r2, r3] + mov r2, r5 + bl rk_printk +.L4067: + ldrh r3, [r7] + ldr r2, [r4, #1092] + lsl r3, r3, #1 + strh r5, [r2, r3] @ movhi + add sp, sp, #28 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L4066: + ldr r9, [r4, #4]! + cmn r9, #1 + beq .L4061 + ldrb r1, [r6, #-2546] @ zero_extendqisi2 + mov r0, r9 + lsl r1, r1, #7 + bl __aeabi_uidiv + uxth r3, r0 + str r3, [sp, #4] + ldr r3, .L4088+12 + ldr r3, [r3] + tst r3, #4096 + beq .L4062 + mov r3, r10 + mov r2, r9 + ldr r1, [sp, #4] + ldr r0, .L4088+24 + bl rk_printk +.L4062: + mov r9, r4 + mov fp, r10 +.L4065: + ldr r0, [r9] + cmn r0, #1 + beq .L4063 + ldrb r1, [r6, #-2546] @ zero_extendqisi2 + lsl r1, r1, #7 + bl __aeabi_uidiv + ldr r3, [sp, #4] + uxth r0, r0 + cmp r3, r0 + bne .L4063 + ldrb r3, [r7, #9] @ zero_extendqisi2 + mov r0, fp + mov r1, r3 + str r3, [sp, #12] + bl __aeabi_idivmod + ldr r2, .L4088+28 + add r1, r7, r1, lsl #1 + ldr r3, [sp, #12] + ldrh r0, [r1, #16] + ldrh r2, [r2] + mov r1, r3 + mul r2, r2, r0 + mov r0, fp + str r2, [sp, #8] + bl __aeabi_idiv + ldr r2, [sp, #8] + add r2, r2, r0 + ldr r0, .L4088+32 + str r2, [sp, #20] + ldr r1, [r9] + bl pm_ppa_update_check + cmp r0, #0 + beq .L4064 + mov r3, r8 + mov r2, #4 + ldr r1, [r6, #-2556] + ldr r0, .L4088+36 + bl rknand_print_hex +.L4064: + add r5, r5, #1 + mov r2, #1 + uxth r5, r5 + add r1, sp, #20 + ldr r0, [r9] + bl pm_log2phys + mvn r3, #0 + str r3, [r9] +.L4063: + add fp, fp, #1 + add r9, r9, #4 + cmp r8, fp + bne .L4065 +.L4061: + add r10, r10, #1 + b .L4060 +.L4089: + .align 2 +.L4088: + .word .LANCHOR3 + .word .LANCHOR1+2473 + .word .LC0 + .word .LANCHOR2 + .word .LANCHOR0 + .word .LC294 + .word .LC291 + .word .LANCHOR3-3074 + .word .LC292 + .word .LC293 + .fnend + .size ftl_update_l2p_map, .-ftl_update_l2p_map + .align 2 + .global ftl_alloc_new_data_sblk + .syntax unified + .arm + .fpu softvfp + .type ftl_alloc_new_data_sblk, %function +ftl_alloc_new_data_sblk: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + mov r5, r0 + ldrh r6, [r0] + bl ftl_update_l2p_map + bl pm_flush + ldrh r0, [r5] + movw r3, #65535 + cmp r0, r3 + beq .L4091 + bl zftl_insert_data_list +.L4091: + ldr r4, .L4099 + mov r0, r5 + ldr r1, [r4, #1096] + add r1, r1, #16 + cmp r5, r1 + movw r5, #65535 + moveq r1, #2 + movne r1, #3 + bl ftl_open_sblk_init + ldr r3, [r4, #1096] + cmp r6, r5 + ldr r3, [r3, #560] + sub r3, r3, r6 + clz r3, r3 + lsr r3, r3, #5 + moveq r3, #0 + cmp r3, #0 + beq .L4093 + mov r1, r6 + ldr r0, .L4099+4 + bl rk_printk + ldr r3, [r4, #1096] + ldr r0, [r3, #564] + bl gc_mark_bad_ppa + ldr r3, [r4, #1096] + mvn r2, #0 + str r5, [r3, #560] + str r2, [r3, #564] +.L4093: + bl ftl_ext_info_flush + mov r0, #0 + bl ftl_info_flush + bl lpa_rebuild_hash + mov r0, #0 + pop {r4, r5, r6, pc} +.L4100: + .align 2 +.L4099: + .word .LANCHOR0 + .word .LC295 + .fnend + .size ftl_alloc_new_data_sblk, .-ftl_alloc_new_data_sblk + .align 2 + .global ftl_write_commit + .syntax unified + .arm + .fpu softvfp + .type ftl_write_commit, %function +ftl_write_commit: + .fnstart + @ args = 0, pretend = 0, frame = 24 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #36 + sub sp, sp, #36 + ldr r8, .L4167 + mov r9, r8 +.L4102: + ldrb r2, [r8, #2796] @ zero_extendqisi2 + cmp r2, #0 + beq .L4104 + ldrb r3, [r8, #2820] @ zero_extendqisi2 + sub r2, r2, #1 + ldr r1, .L4167+4 + strb r2, [r8, #2796] + str r3, [sp, #12] + add r3, r3, r3, lsl #1 + add r3, r1, r3, lsl #4 + ldr r1, [sp, #12] + str r3, [sp, #20] + mov r3, #48 + mla r3, r3, r1, r8 + ldrb r1, [r3, #1232] @ zero_extendqisi2 + ldr r2, [r3, #1252] + ldr r3, [r8, #2780] + strb r1, [r8, #2820] + cmp r2, r3 + bcc .L4106 + movw r2, #607 + ldr r1, .L4167+8 + ldr r0, .L4167+12 + bl rk_printk + bl dump_stack +.L4106: + ldr r2, [sp, #12] + mov r3, #48 + mla r3, r3, r2, r9 + ldr r2, [r9, #2780] + ldr r7, [r3, #1252] + cmp r7, r2 + bcc .L4107 + ldr r0, [sp, #20] + bl zbuf_free + mvn r0, #0 +.L4101: + add sp, sp, #36 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L4107: + ldr r2, [r3, #1244] + ldr fp, [r3, #1236] + ldrb r5, [r3, #1273] @ zero_extendqisi2 + ldrb r3, [r3, #1272] @ zero_extendqisi2 + str r2, [sp, #8] + str r3, [sp, #16] + ldrb r3, [r9, #2797] @ zero_extendqisi2 + cmp r3, #0 + beq .L4109 + ldr r6, .L4167+16 + ldr r3, .L4167+4 + ldrb r4, [r6, #-88] @ zero_extendqisi2 + add r4, r4, r4, lsl #1 + add r4, r3, r4, lsl #4 +.L4110: + ldrb r3, [r4] @ zero_extendqisi2 + cmp r3, #255 + bne .L4111 + ldr r3, [r4, #20] + cmp r7, r3 + bne .L4109 + ldr r3, [sp, #16] + lsl r5, r5, #9 + ldr r0, [r4, #4] + add r1, fp, r5 + lsl r2, r3, #9 + add r0, r0, r5 + bl ftl_memcpy + ldrb r3, [r6, #-2546] @ zero_extendqisi2 + mov r0, #2 + ldr r2, [r4, #4] + ldr r1, [r4, #12] + sub r3, r3, #2 + add r2, r2, r3, lsl #9 + add r1, r1, #16 + bl ftl_debug_info_fill + ldr r0, [sp, #20] + bl zbuf_free + b .L4102 +.L4111: + ldr r2, .L4167+4 + add r3, r3, r3, lsl #1 + add r4, r2, r3, lsl #4 + b .L4110 +.L4109: + mov r0, r7 + bl lpa_hash_get_ppa + cmn r0, #1 + str r0, [sp, #28] + bne .L4113 + mov r2, #0 + add r1, sp, #28 + mov r0, r7 + bl pm_log2phys +.L4113: + ldr r6, [r9, #1096] + mov r1, #0 + ldr r3, .L4167+4 + mov r4, r1 + ldr ip, [sp, #28] + add r6, r6, #16 + add r0, r3, #1536 +.L4115: + ldr r2, [r3, #20] + cmp r7, r2 + bne .L4114 + ldrb r2, [r3, #2] @ zero_extendqisi2 + tst r2, #8 + ldrne r4, [r3, #4] + movne r1, #1 + ldrne ip, [r3, #24] + bicne r2, r2, #8 + strbne r2, [r3, #2] +.L4114: + add r3, r3, #48 + cmp r3, r0 + bne .L4115 + ldr r3, .L4167+16 + cmp r1, #0 + ldr r2, [sp, #16] + strne ip, [sp, #28] + ldrb r3, [r3, #-2546] @ zero_extendqisi2 + cmp r2, r3 + bcs .L4142 + cmp r4, #0 + beq .L4118 + cmp r5, #0 + beq .L4119 + lsl r2, r5, #9 + mov r1, r4 + mov r0, fp + bl ftl_memcpy + ldr r6, [r9, #1096] + add r6, r6, #48 +.L4119: + ldr r3, [sp, #16] + add r5, r5, r3 + ldr r3, .L4167+16 + ldrb r2, [r3, #-2546] @ zero_extendqisi2 + cmp r5, r2 + ldrcs r6, [r9, #1096] + addcs r6, r6, #16 + bcs .L4142 + lsl r0, r5, #9 + sub r2, r2, r5 + lsl r2, r2, #9 + add r1, r4, r0 + add r0, fp, r0 + bl ftl_memcpy +.L4142: + mov r10, #0 + b .L4117 +.L4118: + ldr r3, [sp, #28] + cmn r3, #1 + beq .L4121 + mov r0, #1 + bl buf_alloc + ldr r3, [sp, #28] + mov r4, r0 + str r7, [r0, #20] + mov r1, #1 + str r3, [r0, #24] + bl sblk_read_page + ldr r3, [r4, #12] + ldr r2, [r3, #4] + ldr r10, [r3, #12] + cmp r7, r2 + add r10, r10, #1 + bne .L4122 + ldr r2, [r4, #36] + cmn r2, #1 + bne .L4123 +.L4122: + ldrb r2, [r9, #1153] @ zero_extendqisi2 + mvn ip, #0 + ldr lr, [r4, #24] + rsb r1, r2, #24 + mvn ip, ip, lsl r2 + ldr r2, .L4167+16 + and r0, ip, lr, lsr r1 + bic r1, lr, ip, lsl r1 + ldrb r2, [r2, #-2546] @ zero_extendqisi2 + uxtb r0, r0 + str r2, [sp] + ldr r2, [r4, #4] + bl flash_read_page_en + str r0, [r4, #36] +.L4123: + ldr r3, [r4, #12] + ldr r3, [r3, #4] + cmp r7, r3 + bne .L4124 + ldr r3, [r4, #36] + cmn r3, #1 + bne .L4125 +.L4124: + ldr r2, [r8, #1096] + ldr r0, .L4167+20 + ldr r3, [r2, #552] + add r3, r3, #1 + str r3, [r2, #552] + ldr r3, [r4, #36] + ldrb r1, [r4, #1] @ zero_extendqisi2 + ldr r2, [sp, #28] + str r3, [sp] + mov r3, r7 + bl rk_printk + mov r3, #4 + ldr r1, [r4, #12] + mov r2, r3 + ldr r0, .L4167+24 + bl rknand_print_hex +.L4125: + ldr r3, [r4, #12] + ldr r3, [r3, #4] + cmp r7, r3 + bne .L4126 + ldr r3, [r4, #36] + cmn r3, #1 + bne .L4127 +.L4126: + movw r2, #699 + ldr r1, .L4167+8 + ldr r0, .L4167+12 + bl rk_printk + bl dump_stack +.L4127: + cmp r5, #0 + beq .L4128 + ldr r3, [sp, #28] + lsl r2, r5, #9 + cmn r3, #1 + beq .L4129 + ldr r1, [r4, #4] + mov r0, fp + bl ftl_memcpy +.L4130: + ldr r6, [r8, #1096] + add r6, r6, #48 +.L4128: + ldr r3, [sp, #16] + add r5, r5, r3 + ldr r3, .L4167+16 + ldrb r2, [r3, #-2546] @ zero_extendqisi2 + cmp r5, r2 + bcc .L4131 + ldrhi r6, [r8, #1096] + addhi r6, r6, #16 +.L4132: + cmp r4, #0 + beq .L4117 + ldrb r3, [r4, #2] @ zero_extendqisi2 + mov r1, r4 + ldr r0, .L4167+28 + bic r3, r3, #8 + strb r3, [r4, #2] + bl buf_remove_buf + mov r0, r4 + bl zbuf_free +.L4117: + ldrh r3, [r6, #6] + cmp r3, #0 + bne .L4134 + bl ftl_flush + mov r0, r6 + bl ftl_alloc_new_data_sblk +.L4134: + mov r0, r6 + mov r4, #48 + bl ftl_get_new_free_page + ldr r3, [sp, #12] + str r0, [sp, #16] + mov r0, #2 + mul r4, r4, r3 + ldr r3, [sp, #8] + mov r1, r3 + add r5, r9, r4 + ldr r2, [r5, #1248] + str r10, [r3, #12] + stm r3, {r2, r7} + ldr r2, [sp, #28] + str r2, [r3, #8] + mov r2, #0 + ldr r3, .L4167+16 + str r2, [r1, #16]! + ldrb r2, [r3, #-2546] @ zero_extendqisi2 + sub r2, r2, #2 + add r2, fp, r2, lsl #9 + bl ftl_debug_info_fill + ldr r3, [sp, #16] + ldr r1, [sp, #20] + ldr r0, .L4167+32 + str r3, [r5, #1256] + ldr r3, [sp, #28] + str r3, [r5, #1260] + mvn r3, #0 + strb r3, [r5, #1232] + ldrb r3, [r5, #1234] @ zero_extendqisi2 + orr r3, r3, #10 + strb r3, [r5, #1234] + ldr r3, .L4167+4 + ldrh r2, [r6, #12] + add r4, r3, r4 + ldrh r3, [r6, #10] + add r3, r3, r2 + sub r3, r3, #1 + strh r3, [r4, #32] @ movhi + bl buf_add_tail + ldrb r3, [r9, #2797] @ zero_extendqisi2 + ldr r4, .L4167 + add r3, r3, #1 + strb r3, [r9, #2797] + bl timer_get_time + ldr r3, .L4167+16 + ldrh r2, [r6, #6] + str r0, [r3, #-84] + ldrb r3, [r9, #2797] @ zero_extendqisi2 + cmp r3, #2 + bhi .L4135 + cmp r2, #1 + bne .L4105 +.L4135: + ldr lr, .L4167+16 + mov r5, #48 + ldrb r1, [r6, #5] @ zero_extendqisi2 + ldrb r0, [lr, #-88] @ zero_extendqisi2 + cmp r1, #0 + mov r1, #0 + moveq ip, #1 + movne ip, #2 + cmp r2, #1 + mov r2, r0 + moveq ip, r3 +.L4139: + cmp r1, ip + bne .L4140 + uxtb r1, r1 + add r0, r0, r0, lsl #1 + strb r2, [lr, #-88] + sub r3, r3, r1 + strb r3, [r4, #2797] + ldr r3, .L4167+4 + add r0, r3, r0, lsl #4 + bl sblk_prog_page + ldrh r3, [r6, #6] + cmp r3, #1 + bne .L4105 + bl sblk_wait_write_queue_completed + bl ftl_write_completed + mov r0, r6 + bl ftl_write_last_log_page + mov r0, r6 + bl ftl_alloc_new_data_sblk +.L4105: + ldrb r3, [r4, #2796] @ zero_extendqisi2 + cmp r3, #0 + bne .L4102 +.L4104: + bl ftl_write_completed + mov r0, #0 + b .L4101 +.L4131: + ldr r3, [sp, #28] + sub r2, r2, r5 + lsl r2, r2, #9 + lsl r0, r5, #9 + cmn r3, #1 + beq .L4133 + ldr r1, [r4, #4] + add r1, r1, r0 + add r0, fp, r0 + bl ftl_memcpy + b .L4132 +.L4133: + mov r1, #0 + add r0, fp, r0 + bl ftl_memset + b .L4132 +.L4140: + mla r2, r5, r2, r4 + add r1, r1, #1 + ldrb r2, [r2, #1232] @ zero_extendqisi2 + b .L4139 +.L4121: + cmp r5, #0 + moveq r10, r5 + moveq r4, r5 + beq .L4128 + lsl r2, r5, #9 + mov r10, r4 +.L4129: + mov r1, #0 + mov r0, fp + bl ftl_memset + b .L4130 +.L4168: + .align 2 +.L4167: + .word .LANCHOR0 + .word .LANCHOR0+1232 + .word .LANCHOR1+2492 + .word .LC0 + .word .LANCHOR3 + .word .LC296 + .word .LC240 + .word .LANCHOR0+2771 + .word .LANCHOR3-88 + .fnend + .size ftl_write_commit, .-ftl_write_commit + .align 2 + .global gc_do_copy_back + .syntax unified + .arm + .fpu softvfp + .type gc_do_copy_back, %function +gc_do_copy_back: + .fnstart + @ args = 0, pretend = 0, frame = 72 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #84 + sub sp, sp, #84 + ldr r7, .L4307 + ldrb r0, [r7, #-3119] @ zero_extendqisi2 + cmp r0, #0 + bne .L4170 + bl buf_alloc + subs r4, r0, #0 + beq .L4169 + ldr r5, .L4307+4 + ldrh r2, [r5, #22] + mov r0, r2 + bl gc_get_src_ppa_from_index + mov r1, #1 + add r2, r2, #1 + str r0, [r4, #24] + mov r6, r0 + mov r0, r4 + strh r2, [r5, #22] @ movhi + bl sblk_read_page + ldr r3, [r4, #36] + cmn r3, #1 + cmpne r3, #512 + bne .L4172 + movw r2, #1032 + ldr r1, .L4307+8 + ldr r0, .L4307+12 + bl rk_printk + bl dump_stack +.L4172: + ldr r3, [r4, #12] + ldr r8, [r3, #4] + mov r0, r8 + bl lpa_hash_get_ppa + cmn r0, #1 + str r0, [sp, #56] + bne .L4173 + mov r2, #0 + add r1, sp, #56 + mov r0, r8 + bl pm_log2phys +.L4173: + ldr r9, [sp, #56] + cmp r6, r9 + bne .L4174 + ldr r2, .L4307+16 + mov r3, #0 + sub r10, r2, #1232 +.L4177: + add r1, r2, r3 + ldr r0, [r1, #20] + cmp r8, r0 + bne .L4175 + ldrb r1, [r1, #2] @ zero_extendqisi2 + tst r1, #2 + beq .L4175 + mov r0, r4 + bl zbuf_free + ldr r3, .L4307+20 + ldr r3, [r3] + tst r3, #256 + beq .L4169 + ldrh r3, [r5, #22] + mov r2, r6 + mov r1, r8 + ldr r0, .L4307+24 + bl rk_printk +.L4169: + add sp, sp, #84 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L4175: + add r3, r3, #48 + cmp r3, #1536 + bne .L4177 + ldrb r3, [r7, #-2546] @ zero_extendqisi2 + mov r2, #0 + str r8, [r4, #20] + strb r2, [r4, #41] + strb r3, [r4, #40] + ldr r3, [r4, #12] + ldr r1, [r3] + str r1, [r4, #16] + str r2, [r3, #16] + ldr r3, .L4307+20 + ldr r3, [r3] + tst r3, #256 + beq .L4178 + mov r0, r8 + bl lpa_hash_get_ppa + ldrh r3, [r5, #22] + mov r2, r9 + str r6, [sp] + mov r1, r8 + str r3, [sp, #4] + mov r3, r0 + ldr r0, .L4307+28 + bl rk_printk +.L4178: + mov r0, r4 + bl ftl_gc_write_buf + bl ftl_write_commit + ldr r2, [r10, #2800] + ldr r3, [r2, #60] + add r3, r3, #1 + str r3, [r2, #60] + ldrh r3, [r5, #24] + add r3, r3, #1 + strh r3, [r5, #24] @ movhi + b .L4169 +.L4174: + ldr r3, .L4307+20 + ldr r3, [r3] + tst r3, #256 + beq .L4179 + mov r0, r8 + bl lpa_hash_get_ppa + ldrh r3, [r5, #22] + mov r2, r9 + str r6, [sp] + mov r1, r8 + str r3, [sp, #4] + mov r3, r0 + ldr r0, .L4307+28 + bl rk_printk +.L4179: + mov r0, r4 + bl zbuf_free + b .L4169 +.L4170: + ldr r10, .L4307+32 + ldr r3, [r10, #1096] + ldrb r9, [r3, #89] @ zero_extendqisi2 + str r3, [sp, #12] + ldrb r3, [r7, #-3127] @ zero_extendqisi2 + uxth r8, r9 + cmp r3, r8 + movhi r6, #1 + bhi .L4180 + cmp r8, #2 + movcc r6, r8 + movcs r6, #2 +.L4180: + ldrb r5, [r7, #-3128] @ zero_extendqisi2 + ldr r3, .L4307+4 + cmp r5, #3 + bne .L4181 + ldrb r2, [r10, #1158] @ zero_extendqisi2 + cmp r2, #0 + beq .L4182 + movw r2, #2102 + mov r1, r9 + ldrh fp, [r3, r2] + mov r0, fp + bl __aeabi_idiv + ldrb r3, [r7, #-2542] @ zero_extendqisi2 + uxth r4, r0 + cmp r3, #0 + beq .L4183 + ldr r3, .L4307+36 + lsl r0, r0, #1 + ldrh r3, [r3, r0] + cmp r3, #0 + moveq r5, #1 + movne r5, #2 +.L4184: + smulbb r8, r8, r4 + sub r8, fp, r8 + uxth r3, r8 + str r3, [sp, #20] +.L4185: + mul r3, r6, r5 + ldr r9, .L4307+36 + mov r8, #0 + str r3, [sp, #16] + add r9, r9, r4, lsl #1 + ldr r3, .L4307+4 +.L4189: + ldr r1, [sp, #16] + uxth r0, r8 + mov r2, r0 + cmp r0, r1 + bge .L4242 + ldr r1, .L4307+40 + add r2, fp, r2 + ldrh ip, [r1] + ldr r1, [sp, #12] + ldrb r1, [r1, #89] @ zero_extendqisi2 + mul r1, r1, ip + ldrb ip, [r7, #-11] @ zero_extendqisi2 + sub r1, r1, ip + cmp r2, r1 + blt .L4190 + ldrb r1, [r7, #-2542] @ zero_extendqisi2 + cmp r1, #0 + beq .L4242 + ldrh r1, [r9] + cmp r1, r4 + bcc .L4191 +.L4242: + mov r3, #1 + str r3, [sp, #24] + b .L4187 +.L4183: + ldrb r3, [r7, #-15] @ zero_extendqisi2 + cmp r3, #0 + moveq r5, #1 + beq .L4184 + sub r3, r4, #62 + cmp r3, #2160 + movcs r5, #2 + bcs .L4184 + mov r1, r5 + mov r0, r4 + bl __aeabi_uidivmod + uxth r1, r1 + cmp r1, #0 + movne r5, #1 + moveq r5, #2 + b .L4184 +.L4182: + ldrb r2, [r7, #-3120] @ zero_extendqisi2 + cmp r2, #0 + movw r2, #2102 + beq .L4186 + ldrh fp, [r3, r2] + add r1, r9, r9, lsl #1 + mov r0, fp + bl __aeabi_idiv + mul r9, r0, r9 + ldr r2, .L4307+44 + uxth r4, r0 + sub r9, r9, r9, lsl #2 + add r9, r9, fp + smull r2, r3, r9, r2 + sub r9, r3, r9, asr #31 + uxth r3, r9 + str r3, [sp, #20] + ldrb r3, [r10, #1159] @ zero_extendqisi2 + cmp r3, #0 + addne r4, r4, r4, lsl #1 + uxthne r4, r4 + b .L4185 +.L4186: + ldrh r10, [r3, r2] + mov r1, r9 + mov r0, r10 + bl __aeabi_idiv + ldr r2, .L4307+48 + lsl r3, r0, #1 + smulbb r8, r0, r8 + ldrh r3, [r2, r3] + sub r10, r10, r8 + lsr r4, r3, #3 + and r3, r3, #7 + str r3, [sp, #24] + uxth r3, r10 + mla r9, r9, r4, r3 + str r3, [sp, #20] + ldr r3, [sp, #24] + add r9, r9, r9, lsl #1 + cmp r3, #1 + uxth fp, r9 + beq .L4185 +.L4187: + mul r3, r6, r5 + str r3, [sp, #36] + lsl r3, r6, #1 + uxth r3, r3 + str r3, [sp, #44] + ldrh r3, [sp, #44] + smulbb r3, r3, r5 + sub r3, fp, r3 + uxth r3, r3 + str r3, [sp, #48] + mov r3, #0 + str r3, [sp, #32] + ldr r3, .L4307+36 + add r3, r3, r4, lsl #1 + str r3, [sp, #40] +.L4192: + ldrh r9, [sp, #32] + ldr r2, [sp, #36] + ldr r7, .L4307 + str r9, [sp, #28] + cmp r9, r2 + blt .L4216 + ldrb r3, [r7, #-3128] @ zero_extendqisi2 + cmp r3, #3 + bne .L4217 + ldr r3, .L4307+32 + ldrb r1, [r3, #1158] @ zero_extendqisi2 + cmp r1, #0 + movne r3, r2 + movne r1, #0 + subne r2, r3, #1 + bne .L4219 + ldrb r2, [r7, #-3120] @ zero_extendqisi2 + ldr r3, [sp, #56] + cmp r2, #0 + strbne r1, [r3, #44] + bne .L4305 + ldr r1, [sp, #24] + cmp r1, #1 + moveq r2, #9 + beq .L4225 + ldr r1, [sp, #24] + cmp r1, #2 + moveq r2, #13 +.L4225: + strb r2, [r3, #44] +.L4305: + mov r2, r6 + add r1, sp, #68 + add r0, sp, #56 + bl sblk_xlc_prog_pages +.L4221: + ldrb r3, [r7, #-3120] @ zero_extendqisi2 + ldr r2, .L4307+32 + cmp r3, #0 + addne r6, r6, r6, lsl #1 + uxthne r6, r6 + bne .L4231 + ldrb r3, [r7, #-3126] @ zero_extendqisi2 + cmp r3, #0 + ldrne r6, [sp, #44] + bne .L4231 + ldrb r3, [r2, #1158] @ zero_extendqisi2 + cmp r3, #0 + beq .L4231 + smulbb r5, r6, r5 + ldrb r3, [r7, #-2542] @ zero_extendqisi2 + uxth r5, r5 + cmp r3, #0 + moveq r6, r5 + beq .L4231 + ldr r1, .L4307+36 + lsl r3, r4, #1 + ldrh r3, [r1, r3] + cmp r3, r4 + movcs r6, r5 +.L4231: + ldr r1, [r2, #2800] + ldr r0, .L4307+4 + ldr r3, [r1, #52] + add r3, r3, r6 + str r3, [r1, #52] + movw r1, #2102 + ldrh r3, [r0, r1] + add r6, r6, r3 + ldr r3, .L4307+52 + uxth r6, r6 + strh r6, [r0, r1] @ movhi + ldrh r1, [r3, #-14] + ldr r3, [sp, #12] + ldrb r3, [r3, #89] @ zero_extendqisi2 + mul r3, r3, r1 + cmp r6, r3 + ldrge r3, [r2, #1096] + movge r2, #0 + strhge r2, [r3, #86] @ movhi + bl gc_write_completed + b .L4169 +.L4181: + ldrb r2, [r7, #-3126] @ zero_extendqisi2 + mov r1, r9 + cmp r2, #0 + movw r2, #2102 + ldrh fp, [r3, r2] + mov r0, fp + bne .L4188 + bl __aeabi_idiv + uxth r4, r0 + mov r5, #1 + smulbb r8, r8, r4 + sub r8, fp, r8 + uxth r3, r8 + str r3, [sp, #20] + b .L4185 +.L4188: + bl __aeabi_idiv + uxth r4, r0 + mov r5, #2 + smulbb r8, r8, r4 + sub r8, fp, r8 + uxth r3, r8 + str r3, [sp, #20] + b .L4185 +.L4191: + tst r0, #1 + beq .L4242 +.L4190: + ldr r10, [r7, #-128] + ldr r1, [r10, r2, lsl #2] + cmn r1, #1 + bne .L4193 + ldrh r1, [r3, #22] + ldrh ip, [r3, #20] + cmp ip, r1 + bls .L4169 + ldrb ip, [r7, #-2542] @ zero_extendqisi2 + cmp ip, #0 + beq .L4194 + ldrh ip, [r9] + cmp ip, r4 + bcs .L4194 + tst r0, #1 + ldrne r1, [r10, ip, lsl #2] + strne r1, [r10, r2, lsl #2] + bne .L4193 +.L4194: + mov r0, r1 + str r3, [sp, #24] + bl gc_get_src_ppa_from_index + ldr r3, [sp, #24] + add r1, r1, #1 + strh r1, [r3, #22] @ movhi + str r0, [r10, r2, lsl #2] +.L4193: + add r8, r8, #1 + b .L4189 +.L4216: + ldr r3, [sp, #28] + add r3, fp, r3 + str r3, [sp, #16] + ldr r2, [sp, #16] + ldr r3, [r7, #-3124] + ldrb r3, [r3, r2] @ zero_extendqisi2 + cmp r3, #255 + bne .L4196 + mov r0, #0 + bl buf_alloc + subs r7, r0, #0 + bne .L4197 + bl sblk_wait_write_queue_completed + bl ftl_write_completed + bl gc_write_completed + bl gc_free_temp_buf + mov r0, r7 + bl buf_alloc + subs r7, r0, #0 + beq .L4169 +.L4197: + ldr r2, .L4307 + ldrb r1, [r7, #1] @ zero_extendqisi2 + ldr r0, [sp, #16] + ldr r3, [r2, #-3124] + strb r1, [r3, r0] + ldr r1, .L4307+32 + ldrb r3, [r1, #2831] @ zero_extendqisi2 + add r3, r3, #1 + strb r3, [r1, #2831] + add r3, r9, fp + strh r3, [r7, #32] @ movhi + ldrb r3, [sp, #24] @ zero_extendqisi2 + strb r3, [r7, #45] + sub r3, r2, #3104 + ldrh r1, [r3, #-14] + ldr r3, [sp, #12] + ldrb r3, [r3, #89] @ zero_extendqisi2 + mul r3, r3, r1 + ldrb r1, [r2, #-11] @ zero_extendqisi2 + sub r3, r3, r1 + cmp r0, r3 + blt .L4198 + ldrb r3, [r2, #-2542] @ zero_extendqisi2 + cmp r3, #0 + beq .L4199 + ldr r3, [sp, #40] + ldrh r3, [r3] + cmp r3, r4 + bcs .L4199 + tst r9, #1 + bne .L4198 +.L4199: + ldr r8, .L4307 + mvn r2, #0 + ldr r1, [sp, #16] + ldr r10, .L4307+56 + ldr r3, [r8, #-132] + str r2, [r3, r1, lsl #2] + ldrb r3, [r8, #-11] @ zero_extendqisi2 + cmp r3, #2 + bne .L4200 + sub r3, r8, #3104 + ldr r2, [sp, #16] + ldrh r1, [r3, #-14] + ldr r3, [sp, #12] + ldrb r3, [r3, #89] @ zero_extendqisi2 + mul r3, r1, r3 + sub r3, r3, #2 + cmp r2, r3 + ldrh r2, [r8, #-14] + bne .L4201 + ldr r1, [r8, #-132] + ldr r0, [r7, #4] + bl ftl_memcpy + ldrb r2, [r8, #-2546] @ zero_extendqisi2 + mov r1, #0 + ldr r0, [r7, #12] + lsl r2, r2, #1 + bl ftl_memset + ldr r3, [r7, #12] + str r10, [r3] + ldrh r1, [r8, #-14] + ldr r0, [r7, #4] + ldr r10, [r7, #12] + bl js_hash + ldr r2, .L4307+32 + str r0, [r10, #4] + ldr r3, [r7, #12] + ldr r2, [r2, #1096] + ldr r2, [r2, #132] + str r2, [r3, #8] + mov r2, #0 + ldr r3, [r7, #12] +.L4301: + str r2, [r3, #12] +.L4202: + ldr r3, [r7, #12] + mov r2, #0 + str r2, [r3, #16] +.L4196: + ldr r3, .L4307 + ldr r1, [sp, #16] + ldrb lr, [sp, #24] @ zero_extendqisi2 + ldr r2, [r3, #-3124] + ldrb r7, [r2, r1] @ zero_extendqisi2 + add r2, sp, #80 + ldr r1, [sp, #28] + add r0, r7, r7, lsl #1 + add ip, r2, r1, lsl #2 + ldr r2, .L4307+32 + add r1, r2, #1232 + add r0, r1, r0, lsl #4 + str r0, [ip, #-24] + mov ip, #48 + mul ip, ip, r7 + add r1, r1, ip + add r0, r2, ip + mov ip, #2 + strb lr, [r0, #1277] + strh ip, [r1, #34] @ movhi + ldrb r1, [r3, #-3128] @ zero_extendqisi2 + cmp r1, #3 + bne .L4207 + ldrb r1, [r2, #1158] @ zero_extendqisi2 + cmp r1, #0 + beq .L4208 + ldrb r3, [r3, #-2542] @ zero_extendqisi2 + and r8, r9, #1 + add r8, r8, r4 + cmp r3, #0 + beq .L4209 + ldr r3, [sp, #40] + ldr r2, [sp, #32] + ldrh r3, [r3] + cmp r3, r4 + movcs r2, #0 + andcc r2, r2, #1 + cmp r2, #0 + movne r8, r3 +.L4209: + ldr r3, .L4307+32 + mov r10, #48 + mov r1, r5 + mov r0, r9 + mla r10, r10, r7, r3 + bl __aeabi_uidiv + ldr r3, [sp, #20] + ldr r2, .L4307+60 + uxtah r0, r3, r0 + ldr r3, [sp, #12] + ldrh r2, [r2] + add r0, r3, r0, lsl #1 + ldrh r3, [r0, #96] + mla r8, r2, r3, r8 + orr r8, r8, #50331648 + str r8, [r10, #1256] +.L4214: + mov r2, #48 + ldr r3, .L4307+32 + mul r7, r2, r7 + add r2, r3, r7 + add r3, r3, #1232 + add r3, r3, r7 + ldr r2, [r2, #1256] + ldrh r1, [r3, #32] + ldr r3, .L4307 + ldr r3, [r3, #-124] + str r2, [r3, r1, lsl #2] + b .L4233 +.L4201: + ldrb r3, [r8, #-3127] @ zero_extendqisi2 + ldr r0, [r8, #-132] + mul r3, r1, r3 + lsr r1, r2, #2 + add r1, r0, r1, lsl #2 + ldr r0, [r7, #4] + rsb r3, r2, r3, lsl #2 + mov r2, r3 + str r3, [sp, #52] + bl ftl_memcpy + ldrb r2, [r8, #-2546] @ zero_extendqisi2 + mov r1, #0 + ldr r0, [r7, #12] + lsl r2, r2, #1 + bl ftl_memset + ldr r2, [r7, #12] + ldr r3, [sp, #52] + str r10, [r2] + mov r1, r3 + ldr r0, [r7, #4] + ldr r8, [r7, #12] + bl js_hash + ldr r2, .L4307+32 + str r0, [r8, #4] + ldr r3, [r7, #12] + ldr r2, [r2, #1096] + ldr r2, [r2, #132] + str r2, [r3, #8] + mov r2, #1 + ldr r3, [r7, #12] + b .L4301 +.L4200: + ldr r3, .L4307+52 + ldrb r2, [r8, #-3127] @ zero_extendqisi2 + ldr r1, [r8, #-132] + ldrh r3, [r3, #-14] + ldr r0, [r7, #4] + mul r2, r2, r3 + lsl r2, r2, #2 + bl ftl_memcpy + ldr r3, .L4307+52 + ldrb r1, [r8, #-2546] @ zero_extendqisi2 + ldr r0, [r7, #4] + ldrh r2, [r3, #-14] + ldrb r3, [r8, #-3127] @ zero_extendqisi2 + mul r3, r3, r2 + cmp r1, r3, asr #6 + lsl r2, r3, #2 + ldrhlt r1, [r8, #-14] + mov r3, r2 + ldr r8, .L4307 + add r0, r0, r3 + sublt r2, r1, r2 + ldr r1, [r8, #-128] + bl ftl_memcpy + ldrb r2, [r8, #-2546] @ zero_extendqisi2 + mov r1, #0 + ldr r0, [r7, #12] + lsl r2, r2, #1 + bl ftl_memset + ldr r3, [r7, #12] + str r10, [r3] + sub r3, r8, #3104 + ldrh r3, [r3, #-14] + ldrb r1, [r8, #-3127] @ zero_extendqisi2 + ldr r0, [r7, #4] + ldr r10, [r7, #12] + mul r1, r1, r3 + lsl r1, r1, #2 + bl js_hash + ldr r2, .L4307+32 + str r0, [r10, #4] + ldr r3, [r7, #12] + ldr r2, [r2, #1096] + ldr r2, [r2, #132] +.L4302: + str r2, [r3, #8] + b .L4202 +.L4198: + ldr r8, .L4307 + mov r1, #1 + ldr r2, [sp, #16] + mov r0, r7 + ldr r3, [r8, #-128] + ldr r3, [r3, r2, lsl #2] + str r3, [r7, #24] + bl sblk_read_page + ldr r3, [r7, #36] + cmn r3, #1 + cmpne r3, #512 + bne .L4205 + ldr r3, .L4307+64 + mvn r0, #0 + ldr r2, [r7, #24] + ldrh r1, [r3] + ldr r3, .L4307+32 + ldrb r3, [r3, #1153] @ zero_extendqisi2 + lsr r2, r2, r1 + rsb r3, r3, #24 + sub r3, r3, r1 + ldrb r1, [r8, #-3136] @ zero_extendqisi2 + bic r0, r2, r0, lsl r3 + bl __aeabi_uidiv + mov r1, #0 + uxth r0, r0 + bl ftl_sblk_dump + ldr r3, [r7, #36] + cmn r3, #1 + cmpne r3, #512 + bne .L4205 + ldr r3, [r7, #12] + mvn r2, #0 + str r2, [r3, #4] + ldr r3, [r7, #36] + cmp r3, r2 + cmpne r3, #512 + bne .L4205 + movw r2, #1223 + ldr r1, .L4307+8 + ldr r0, .L4307+12 + bl rk_printk + bl dump_stack +.L4205: + ldr r3, [r7, #12] + ldr r2, .L4307+32 + ldr r1, [r3, #4] + ldr r2, [r2, #2780] + cmp r1, r2 + ldr r1, [sp, #16] + mvncs r2, #0 + strcs r2, [r3, #4] + ldr r3, [r7, #12] + ldr r2, [r3, #4] + ldr r3, .L4307 + ldr r3, [r3, #-132] + str r2, [r3, r1, lsl #2] + ldr r3, [r7, #12] + ldr r2, [r7, #24] + b .L4302 +.L4208: + ldrb r3, [r2, #1159] @ zero_extendqisi2 + ldr r1, .L4307+68 + cmp r3, #0 + umull r2, r3, r9, r1 + beq .L4211 + ldr r2, [sp, #20] + lsr r3, r3, #1 + ldr ip, [sp, #12] + uxtah r2, r2, r3 + add r3, r3, r3, lsl #1 + add r2, ip, r2, lsl #1 + ldr ip, .L4307+60 + sub r3, r9, r3 + ldrh r2, [r2, #96] + ldrh ip, [ip] + mla r2, ip, r2, r4 + uxtah r3, r2, r3 +.L4306: + str r3, [r0, #1256] + mov r0, #48 + mul r7, r0, r7 + ldr r3, .L4307+32 + umull r0, r1, r9, r1 + add r2, r3, #1232 + add r2, r2, r7 + add r7, r3, r7 + ldrh ip, [r2, #32] + ldr r2, .L4307 + lsr r1, r1, #1 + ldr r3, [r7, #1256] + add r1, r1, r1, lsl #1 + ldr r2, [r2, #-124] + sub r1, r9, r1 + lsl r1, r1, #24 + add r1, r1, #16777216 + orr r1, r1, r3 + str r1, [r2, ip, lsl #2] +.L4233: + ldr r3, .L4307 + ldrb r2, [r3, #-2542] @ zero_extendqisi2 + cmp r2, #0 + beq .L4215 + ldr r2, [sp, #40] + ldrh r2, [r2] + cmp r2, r4 + bcs .L4215 + tst r9, #1 + beq .L4215 + ldr r1, [r3, #-3124] + mvn r2, #0 + ldr r0, [sp, #16] + ldr ip, [sp, #48] + strb r2, [r1, r0] + add r1, sp, #80 + ldr r0, [sp, #28] + add r1, r1, r0, lsl #2 + ldrh r0, [sp, #48] + ldr r1, [r1, #-24] + strh r0, [r1, #32] @ movhi + ldrb r0, [r1, #1] @ zero_extendqisi2 + ldr r1, [r3, #-3124] + strb r0, [r1, ip] + ldr r1, [sp, #16] + ldr r3, [r3, #-128] + str r2, [r3, r1, lsl #2] +.L4215: + ldr r3, [sp, #32] + add r3, r3, #1 + str r3, [sp, #32] + b .L4192 +.L4211: + ldr r2, [sp, #20] + ubfx r3, r3, #1, #16 + add r3, r2, r3 + ldr r2, [sp, #12] + add r3, r2, r3, lsl #1 + ldr r2, .L4307+60 + ldrh r3, [r3, #96] + ldrh r2, [r2] + mla r3, r2, r3, r4 + b .L4306 +.L4207: + cmp r1, #2 + bne .L4214 + ldrb r3, [r3, #-3126] @ zero_extendqisi2 + cmp r3, #0 + bne .L4213 + ldr r2, [sp, #20] + ldr r3, [sp, #28] + add r3, r3, r2 + ldr r2, [sp, #12] + add r3, r2, r3, lsl #1 + ldr r2, .L4307+60 + ldrh r3, [r3, #96] + ldrh r2, [r2] + mla r3, r2, r3, r4 +.L4303: + orr r3, r3, #33554432 + str r3, [r0, #1256] + b .L4214 +.L4213: + ldr r3, [sp, #20] + ldr r2, [sp, #12] + add r3, r3, r9, lsr #1 + add r3, r2, r3, lsl #1 + ldr r2, .L4307+60 + ldrh r3, [r3, #96] + ldrh r2, [r2] + mla r3, r2, r3, r4 + and r2, r9, #1 + add r3, r3, r2 + b .L4303 +.L4220: + add r0, sp, #80 + add ip, sp, #80 + add r0, r0, r3, lsl #2 + add r3, ip, r3, lsl #2 + ldr r3, [r3, #-20] + ldr r0, [r0, #-24] + ldrb r3, [r3, #1] @ zero_extendqisi2 + strb r3, [r0] +.L4219: + uxth r3, r1 + add r1, r1, #1 + cmp r3, r2 + blt .L4220 + add r3, sp, #80 + add r2, r3, r2, lsl #2 + ldr r3, [r2, #-24] +.L4304: + smulbb r1, r6, r5 + mvn r2, #0 + strb r2, [r3] + ldr r0, [sp, #56] + uxtb r1, r1 + bl sblk_prog_page + b .L4221 +.L4217: + ldrb r3, [r7, #-3126] @ zero_extendqisi2 + cmp r3, #0 + beq .L4226 + ldrb r3, [r7, #-3125] @ zero_extendqisi2 + cmp r3, #0 + bne .L4227 +.L4226: + ldr r2, [sp, #36] + sub r1, r2, #1 +.L4228: + uxth r2, r3 + add r3, r3, #1 + cmp r2, r1 + blt .L4229 + add r3, sp, #80 + add r1, r3, r1, lsl #2 + ldr r3, [r1, #-24] + b .L4304 +.L4227: + mov r1, r6 + add r0, sp, #56 + bl sblk_3d_mlc_prog_pages + b .L4221 +.L4229: + add r0, sp, #80 + add ip, sp, #80 + add r0, r0, r2, lsl #2 + add r2, ip, r2, lsl #2 + ldr r2, [r2, #-20] + ldr r0, [r0, #-24] + ldrb r2, [r2, #1] @ zero_extendqisi2 + strb r2, [r0] + b .L4228 +.L4308: + .align 2 +.L4307: + .word .LANCHOR3 + .word .LANCHOR0+2824 + .word .LANCHOR1+2509 + .word .LC0 + .word .LANCHOR0+1232 + .word .LANCHOR2 + .word .LC297 + .word .LC298 + .word .LANCHOR0 + .word .LANCHOR2+2114 + .word .LANCHOR3-3118 + .word 1431655766 + .word .LANCHOR2+3650 + .word .LANCHOR3-3104 + .word -178307901 + .word .LANCHOR3-3074 + .word .LANCHOR3-3138 + .word -1431655765 + .fnend + .size gc_do_copy_back, .-gc_do_copy_back + .align 2 + .global zftl_do_gc + .syntax unified + .arm + .fpu softvfp + .type zftl_do_gc, %function +zftl_do_gc: + .fnstart + @ args = 0, pretend = 0, frame = 8 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + movw r3, #2788 + ldr r4, .L4535 + cmp r0, #1 + .pad #36 + sub sp, sp, #36 + mov r10, r0 + ldr r5, .L4535+4 + add r9, r4, #2784 + ldrh r8, [r4, r3] + ldrh r6, [r9] + movw r3, #2786 + ldr r7, [r4, #1096] + ldrh fp, [r4, r3] + add r6, r8, r6 + uxth r6, r6 + beq .L4310 +.L4322: + ldrb r3, [r5, #-144] @ zero_extendqisi2 + cmp r3, #6 + ldrls pc, [pc, r3, asl #2] + b .L4435 +.L4313: + .word .L4312 + .word .L4314 + .word .L4315 + .word .L4316 + .word .L4317 + .word .L4318 + .word .L4319 +.L4318: + ldr r8, .L4535+40 + mov r7, #0 +.L4320: + bl gc_check_data_one_wl + subs r9, r0, #0 + beq .L4431 + ldr r3, [r4, #1096] + mov r6, #0 + strh r6, [r8, #52] @ movhi + ldrh r0, [r3, #80] + bl ftl_free_sblk + ldr r2, [r4, #1096] + mvn r3, #0 + ldr r1, [r4, #2800] + ldr r0, [r4, #2832] + strh r3, [r2, #80] @ movhi + strh r3, [r1, #126] @ movhi + strh r3, [r2, #130] @ movhi + bl zbuf_free + str r6, [r4, #2832] + strb r6, [r5, #-144] + b .L4532 +.L4310: + ldr r3, [r5, #-8] + cmp r3, #0 + bne .L4321 + ldr r2, [r5, #-4] + cmp r2, #0 + beq .L4322 +.L4321: + ldr r2, .L4535+60 + ldrh r2, [r2, #-4] + cmp r6, r2, lsr #2 + bls .L4322 + movw r2, #2804 + ldrh r2, [r4, r2] + cmp r2, r6 + bcs .L4322 + str r3, [sp, #24] + bl timer_get_time + ldr r3, [sp, #24] + add r3, r3, #20 + cmp r3, r0 + movcc r3, #0 + strcc r3, [r5, #-8] + ldr r3, [r5, #-4] + add r3, r3, #20 + str r3, [sp, #24] + bl timer_get_time + ldr r3, [sp, #24] + cmp r3, r0 + movcc r3, #0 + strcc r3, [r5, #-4] + ldr r3, [r4, #1096] + ldrh r3, [r3, #124] + cmp r3, #0 + bne .L4322 +.L4435: + mov r7, #16 + b .L4309 +.L4312: + movw r3, #2790 + ldrh r2, [r7, #80] + ldrh r9, [r4, r3] + movw r3, #2792 + ldrh r3, [r4, r3] + add r8, r8, fp + uxth r8, r8 + add r9, r9, r3 + movw r3, #65535 + cmp r2, r3 + uxth r9, r9 + beq .L4325 + cmp r10, #0 + bne .L4326 + movw r3, #2804 + ldrh r3, [r4, r3] + cmp r6, r3, lsl #1 + bge .L4435 +.L4326: + ldr r10, .L4535+60 + ldrh r1, [r10, #-6] + sub r0, r10, #12 + add r1, r1, #1 + uxth r1, r1 + strh r1, [r10, #-6] @ movhi + bl _list_get_gc_head_node + movw r3, #65535 + cmp r0, r3 + beq .L4328 + ldr r1, [r4, #1092] + lsl r2, r0, #1 + ldr r3, [r5, #-140] + ldrh r2, [r1, r2] + ldrh r1, [r10, #-8] + add r3, r3, #1 + str r3, [r5, #-140] + cmp r1, r2 + bcs .L4329 + movw r1, #1080 + ldrh r1, [r4, r1] + cmp r3, r1, lsr #4 + bls .L4328 + movw r3, #2808 + ldrh r3, [r4, r3] + cmp r3, r2 + bls .L4328 +.L4329: + ldrb r2, [r5, #-3119] @ zero_extendqisi2 + mov r1, #0 + bl gc_add_sblk + cmp r0, #0 + beq .L4330 + mov r3, #1 + strb r3, [r5, #-144] + mov r3, #0 + str r3, [r5, #-140] + b .L4435 +.L4328: + mov r3, #0 + strh r3, [r10, #-6] @ movhi +.L4330: + cmp r8, #15 + movls r9, #2 + bls .L4331 + movw r3, #2794 + clz r9, r9 + ldrh r2, [r4, r3] + lsr r9, r9, #5 + ldrh r3, [r10, #-2] + cmp r2, r3 + orrhi r9, r9, #1 + cmp r9, #0 + movne r9, #2 + moveq r9, #1 +.L4331: + ldr r3, .L4535+8 + ldr r3, [r3] + tst r3, #256 + beq .L4332 + ldrh r1, [r7, #80] + ldr r3, [r4, #1096] + ldrb r2, [r5, #-3119] @ zero_extendqisi2 + str r1, [sp, #16] + ldrh r1, [r3, #122] + ldr r0, .L4535+12 + str r1, [sp, #12] + ldrh r1, [r3, #120] + str r1, [sp, #8] + movw r1, #2807 + ldrh r3, [r3, #124] + str r8, [sp] + str r3, [sp, #4] + mov r3, r6 + bl rk_printk +.L4332: + mov r2, #1 + mov r1, r9 + ldrb r0, [r5, #-3119] @ zero_extendqisi2 + bl gc_search_src_blk + cmp r0, #0 + ble .L4333 +.L4334: + mov r3, #1 +.L4533: + strb r3, [r5, #-144] + b .L4435 +.L4333: + mov r2, #1 + mov r1, #3 + ldrb r0, [r5, #-3119] @ zero_extendqisi2 + bl gc_search_src_blk + cmp r0, #0 + bgt .L4334 + b .L4435 +.L4325: + cmp r10, #1 + bne .L4335 + ldr r3, [r4, #2800] + ldrh r3, [r3, #150] + cmp r3, #0 + beq .L4336 + movw r3, #2788 + ldrh r3, [r4, r3] + cmp r3, #8 + bls .L4336 + bl gc_ink_check_sblk +.L4336: + bl gc_scan_static_data + ldr r3, [r4, #1096] + ldrh r3, [r3, #122] + cmp r3, #0 + beq .L4337 +.L4338: + mov r3, #1 + strb r3, [r5, #-3119] + b .L4533 +.L4337: + bl gc_static_wearleveling + subs r7, r0, #0 + bne .L4338 + bl gc_block_vpn_scan + cmp r8, #0 + ldr fp, .L4535+60 + beq .L4339 + cmp r6, r9 + bcs .L4340 + ldrh r3, [fp, #-4] + cmp r3, r6 + bhi .L4341 +.L4340: + ldrh r2, [fp, #-4] + add r3, r6, r9 + cmp r3, r2 + blt .L4341 + movw r3, #2794 + ldrh r2, [r4, r3] + ldrh r3, [fp, #-2] + cmp r2, r3 + bcc .L4339 +.L4341: + mov r1, #1 + mov r0, #16 + strb r1, [r5, #-3119] + str r1, [sp, #24] + bl zftl_get_gc_node.part.10 + movw r2, #65535 + cmp r0, r2 + beq .L4342 + ldr r2, [r4, #1092] + lsl r3, r0, #1 + ldr r1, [sp, #24] + ldrh r3, [r2, r3] + ldrh r2, [r5, #-136] + cmp r3, r2 + movcs r3, #0 + movcc r3, #1 + cmp r6, #2 + movls r3, #0 + cmp r3, #0 + beq .L4342 + mov r2, #0 + strb r2, [r5, #-3119] + str r2, [r5, #-140] + bl gc_add_sblk + cmp r0, #0 + bne .L4334 +.L4342: + mov r1, #0 + ldr r0, .L4535+16 + bl _list_get_gc_head_node + movw r2, #65535 + cmp r0, r2 + beq .L4343 + ldr r2, [r4, #1092] + lsl r3, r0, #1 + ldrh r3, [r2, r3] + ldrh r2, [r5, #-136] + cmp r3, r2 + movcs r3, #0 + movcc r3, #1 + cmp r6, #2 + movls r3, #0 + cmp r3, #0 + beq .L4343 + mov r2, #0 + mov r1, #1 + strb r2, [r5, #-3119] + str r2, [r5, #-140] + bl gc_add_sblk + cmp r0, #0 + bne .L4334 +.L4343: + ldrh r3, [r5, #-136] + ldrh r2, [fp, #-8] + ldr r0, .L4535+16 + add r3, r3, #1 + ldr r1, [r5, #-140] + uxth r3, r3 + str r2, [sp, #28] + cmp r3, r2, lsr #5 + strh r3, [r5, #-136] @ movhi + add r1, r1, #1 + movhi r3, #4 + str r1, [r5, #-140] + strhhi r3, [r5, #-136] @ movhi + mov r3, #0 + strh r3, [r0, #-8] @ movhi + strh r3, [r0, #-6] @ movhi + strh r3, [r0, #-4] @ movhi + movw r0, #1080 + ldrh r0, [r4, r0] + cmp r1, r0, lsr #5 + bls .L4345 + movw r1, #2794 + ldrh r1, [r4, r1] + cmp r1, r8 + bls .L4345 + mov r1, r3 + sub r0, fp, #12 + str r3, [sp, #24] + bl _list_get_gc_head_node + movw r1, #65535 + ldr r3, [sp, #24] + cmp r0, r1 + ldr r2, [sp, #28] + bne .L4346 +.L4519: + mov r7, #16 + b .L4347 +.L4346: + ldr r1, [r4, #1092] + lsl r0, r0, #1 + ldrh r1, [r1, r0] + ldrb r0, [r5, #-3127] @ zero_extendqisi2 + mul r2, r2, r0 + cmp r1, r2 + strle r3, [r5, #-140] + movle r2, #4 + bgt .L4519 +.L4527: + mov r1, #2 +.L4518: + ldrb r0, [r5, #-3119] @ zero_extendqisi2 + bl gc_search_src_blk + uxth r0, r0 + cmp r0, #0 + beq .L4519 + b .L4334 +.L4345: + movw r3, #2794 + ldrh r2, [r4, r3] + ldrh r3, [fp, #-2] + cmp r2, r3 + movcs r2, #1 + bcs .L4527 +.L4350: + movw r3, #2790 + ldrh r3, [r4, r3] + cmp r3, #0 + bne .L4351 + movw r3, #2792 + ldrh r3, [r4, r3] + cmp r3, #8 + bls .L4352 +.L4351: + mov r2, #4 + mov r1, #1 + b .L4518 +.L4352: + ldr r2, .L4535+40 + movw r3, #2106 + ldrh r3, [r2, r3] + cmp r3, #0 + bne .L4519 +.L4347: + ldr r3, [r4, #2812] + cmp r3, #0 + beq .L4353 + mov r3, #0 + mov r1, #0 + str r3, [r4, #2812] + subs r3, r8, r3 + movne r3, #1 + cmp r6, #15 + movhi r3, #0 + ldr r0, .L4535+20 + cmp r3, #0 + movne r3, #1 + strb r3, [r5, #-3119] + bl _list_get_gc_head_node + movw r2, #65535 + cmp r0, r2 + beq .L4356 + ldr r2, [r4, #1092] + lsl r3, r0, #1 + ldrh r3, [r2, r3] + cmp r3, #8 + bhi .L4356 + mov r3, #1 + ldrb r2, [r5, #-3119] @ zero_extendqisi2 + mov r1, #0 + str r3, [r4, #2812] + bl gc_add_sblk + cmp r0, #0 + bne .L4334 +.L4356: + mov r1, #0 + ldr r0, .L4535+16 + bl _list_get_gc_head_node + movw r2, #65535 + cmp r0, r2 + beq .L4357 + ldr r2, [r4, #1092] + lsl r3, r0, #1 + ldrh r3, [r2, r3] + cmp r3, #4 + bhi .L4357 + mov r3, #1 + ldrb r2, [r5, #-3119] @ zero_extendqisi2 + mov r1, #0 + str r3, [r4, #2812] + bl gc_add_sblk + cmp r0, #0 + bne .L4334 +.L4357: + mov r0, #0 + bl zftl_get_gc_node.part.10 + movw r2, #65535 + cmp r0, r2 + beq .L4353 + ldr r2, [r4, #1092] + lsl r3, r0, #1 + ldrh r3, [r2, r3] + cmp r3, #4 + bhi .L4353 + mov r1, #1 + ldrb r2, [r5, #-3119] @ zero_extendqisi2 + str r1, [r4, #2812] + bl gc_add_sblk + cmp r0, #0 + bne .L4334 +.L4353: + ldr r3, [r4, #1096] + mov r1, #1 + strb r1, [r5, #-3119] + ldrh fp, [r3, #124] + cmp fp, #0 + movne r3, #0 + strbne r1, [r5, #-144] + strbne r3, [r5, #-3119] + bne .L4309 + movw r3, #2804 + ldrh r2, [r4, r3] + cmp r6, r2 + bcs .L4359 + cmp r8, #0 + beq .L4360 + cmp r8, #16 + bls .L4361 + ldr r6, .L4535+60 + movw r3, #2794 + ldrh r2, [r4, r3] + ldrh r3, [r6, #-2] + cmp r2, r3 + bhi .L4361 + mov r2, #4 + mov r0, r1 + bl gc_search_src_blk + uxth r0, r0 + cmp r0, #0 + bne .L4362 +.L4523: + ldrb r0, [r5, #-3119] @ zero_extendqisi2 + mov r2, #4 + mov r1, #3 +.L4525: + bl gc_search_src_blk + uxth r0, r0 +.L4363: + cmp r0, #0 + bne .L4365 + b .L4309 +.L4339: + ldrh r3, [r5, #-136] + ldrh r2, [fp, #-8] + cmp r3, r2, lsr #5 + movcs r3, #4 + strhcs r3, [r5, #-136] @ movhi + b .L4519 +.L4335: + movw r3, #2804 + ldrh r3, [r4, r3] + cmp r3, r6 + bcs .L4519 + ldr r3, [r4, #1096] + ldrh r3, [r3, #124] + cmp r3, #0 + beq .L4435 + b .L4519 +.L4362: + mov r1, fp + sub r0, r6, #12 + bl _list_get_gc_head_node + movw r3, #65535 + cmp r0, r3 + beq .L4365 + ldr r1, [r4, #1092] + lsl r2, r0, #1 + ldr r3, [r5, #-140] + ldrh r2, [r1, r2] + ldrh r1, [r6, #-8] + add r3, r3, #1 + str r3, [r5, #-140] + cmp r1, r2 + bcs .L4366 + movw r1, #1080 + ldrh r1, [r4, r1] + cmp r3, r1, lsr #4 + bls .L4365 + movw r3, #2808 + ldrh r3, [r4, r3] + cmp r3, r2 + bls .L4365 +.L4366: + ldrb r2, [r5, #-3119] @ zero_extendqisi2 + mov r1, #0 + bl gc_add_sblk + mov r3, #1 + str r3, [r4, #2812] + mov r3, #0 + str r3, [r5, #-140] +.L4365: + mov r3, #1 + b .L4526 +.L4361: + mov r2, #1 + mov r1, #2 + mov r0, r2 +.L4529: + bl gc_search_src_blk + uxth r0, r0 + cmp r0, #0 + bne .L4365 + b .L4523 +.L4360: + cmp r6, #16 + strb r8, [r5, #-3119] + movhi r2, #4 + movhi r1, #3 + movhi r0, r8 + bhi .L4525 + mov r2, r1 + mov r0, r8 + b .L4529 +.L4359: + cmp r10, #1 + bne .L4309 + cmp r6, r2, lsl #1 + bge .L4369 + cmp r9, r8, lsr #1 + bcs .L4370 + ldr r2, .L4535+60 + movw r1, #2794 + ldrh r0, [r4, r1] + ldrh r1, [r2, #-2] + cmp r0, r1 + ldrhcc r2, [r2, #-4] + lsrcc r2, r2, #2 + strhcc r2, [r4, r3] @ movhi + bcc .L4309 +.L4370: + mov r0, #8 + bl zftl_get_gc_node.part.10 + movw r2, #65535 + cmp r0, r2 + beq .L4371 + ldr r2, [r4, #1092] + lsl r3, r0, #1 + ldrh r3, [r2, r3] + cmp r3, #3 + movhi r3, #0 + movls r3, #1 + cmp r6, #0 + moveq r3, #0 + cmp r3, #0 + beq .L4371 + mov r2, #0 + mov r1, #1 + strb r2, [r5, #-3119] + bl gc_add_sblk + cmp r0, #0 + bne .L4365 +.L4371: + mov r1, #0 + ldr r0, .L4535+20 + bl _list_get_gc_head_node + movw r3, #65535 + mov fp, r0 + cmp r0, r3 + ldr r10, .L4535+60 + bne .L4372 +.L4377: + cmp r8, #1 + bhi .L4373 +.L4374: + cmp r6, r9 + bcs .L4381 + mov r6, #0 + mov r0, #4 + strb r6, [r5, #-3119] + bl zftl_get_gc_node.part.10 + movw r3, #65535 + cmp r0, r3 + beq .L4381 + ldr r3, [r4, #1092] + lsl r0, r0, #1 + ldrh r1, [r10, #-8] + ldrh r2, [r3, r0] + ldrb r3, [r5, #-3127] @ zero_extendqisi2 + mul r3, r3, r1 + cmp r2, r3, asr #1 + ble .L4383 +.L4381: + ldrh r3, [r10, #-4] + movw r2, #2804 + lsr r3, r3, #2 + strh r3, [r4, r2] @ movhi +.L4309: + mov r0, r7 + add sp, sp, #36 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L4372: + movw r2, #1080 + ldr r3, [r5, #-140] + ldrh r2, [r4, r2] + add r3, r3, #1 + str r3, [r5, #-140] + cmp r3, r2, lsr #4 + lsl r3, r0, #1 + str r3, [sp, #24] + bls .L4375 + ldr r3, [r4, #1092] + lsl r2, r0, #1 + mov r1, #0 + str r1, [r5, #-140] + ldrh r2, [r3, r2] + movw r3, #2808 + ldrh r3, [r4, r3] + cmp r2, r3 + bcs .L4375 + mov r3, #1 + mov r2, r3 + strb r3, [r5, #-3119] + str r3, [sp, #24] + bl gc_add_sblk + cmp r0, #0 + ldr r3, [sp, #24] + beq .L4375 +.L4526: + strb r3, [r5, #-144] + b .L4309 +.L4375: + ldr r3, [r4, #1092] + lsl r2, fp, #1 + ldrh r2, [r3, r2] + ldrh r3, [r10, #-8] + cmp r2, r3, lsr #1 + bhi .L4376 + mov r2, #0 + mov r1, #1 + mov r0, fp + bl gc_add_sblk + b .L4365 +.L4376: + movw r3, #2790 + movw r1, #2792 + ldrh r1, [r4, r1] + ldrh r3, [r4, r3] + add r3, r3, r1 + ldrh r1, [r10, #-4] + cmp r3, r1, lsl #1 + ble .L4377 + movw r3, #2808 + ldrh r3, [r4, r3] + cmp r3, r2 + bcc .L4374 + b .L4377 +.L4373: + cmp r8, #16 + mov r1, #1 + strb r1, [r5, #-3119] + bls .L4378 + movw r3, #2794 + ldrh r2, [r4, r3] + ldrh r3, [r10, #-2] + cmp r2, r3 + movls r2, #4 + movls r0, r1 + bls .L4531 +.L4378: + mov r2, #1 + mov r1, #2 + mov r0, r2 +.L4531: + bl gc_search_src_blk + uxth r0, r0 + cmp r0, #0 + bne .L4379 + mov r2, #4 + mov r1, #3 + ldrb r0, [r5, #-3119] @ zero_extendqisi2 + bl gc_search_src_blk + uxth r0, r0 +.L4379: + ldrh r3, [r10, #-4] + cmp r6, r9, lsr #1 + movw r2, #2804 + lsrhi r3, r3, #2 + lsrls r3, r3, #1 +.L4524: + strh r3, [r4, r2] @ movhi + b .L4363 +.L4383: + mov r2, #4 + mov r1, #3 + mov r0, r6 + bl gc_search_src_blk + ldrh r3, [r10, #-4] + uxth r0, r0 + movw r2, #2804 + lsr r3, r3, #1 + b .L4524 +.L4369: + ldr r2, .L4535+60 + ldrh r2, [r2, #-4] + lsr r2, r2, #2 + strh r2, [r4, r3] @ movhi + movw r3, #2106 + ldr r2, .L4535+40 + ldrh r3, [r2, r3] + cmp r3, #0 + moveq r7, #0 + b .L4309 +.L4314: + movw r6, #2824 + movw r3, #65535 + ldrh r2, [r4, r6] + cmp r2, r3 + bne .L4384 + bl gc_get_src_blk + strh r0, [r4, r6] @ movhi +.L4384: + movw r3, #2824 + movw r1, #65535 + ldrh r2, [r4, r3] + cmp r2, r1 + beq .L4385 + movw r1, #1080 + ldrh r1, [r4, r1] + cmp r1, r2 + mvnls r2, #0 + strhls r2, [r4, r3] @ movhi +.L4385: + movw r3, #2824 + movw r1, #65535 + ldrh r3, [r4, r3] + ldr r2, .L4535+40 + cmp r3, r1 + beq .L4534 + ldrh ip, [r2, #52] + ldr r1, [r4, #1084] + cmp ip, #0 + addne r2, r2, #52 + movne r0, #0 + add r1, r1, r3, lsl #2 + bne .L4388 +.L4387: + ldrb r2, [r1, #2] @ zero_extendqisi2 + tst r2, #192 + and r2, r2, #224 + moveq r1, #1 + movne r1, #0 + cmp r2, #224 + movne r2, r1 + orreq r2, r1, #1 + cmp r2, #0 + beq .L4390 + ldr r2, [r4, #1092] + lsl r3, r3, #1 + ldrh r3, [r2, r3] + cmp r3, #0 + beq .L4392 + movw r2, #3306 + ldr r1, .L4535+64 + ldr r0, .L4535+68 + bl rk_printk + bl dump_stack + b .L4392 +.L4388: + uxth lr, r0 + cmp lr, ip + bcs .L4387 + ldrh lr, [r2, #2]! + add r0, r0, #1 + cmp lr, r3 + bne .L4388 +.L4392: + mvn r2, #0 + movw r3, #2824 + strh r2, [r4, r3] @ movhi + b .L4435 +.L4390: + mov r3, #2 + b .L4533 +.L4315: + bl gc_scan_src_blk + cmn r0, #1 + moveq r3, #3 + beq .L4533 + movw r3, #2824 + ldr r2, .L4535+40 + ldrh r3, [r4, r3] + movw r1, #65535 + mov r6, r2 + cmp r3, r1 + beq .L4334 + ldrh r1, [r2, #20] + cmp r1, #0 + movne r3, #4 + strbne r3, [r5, #-144] + movne r3, #0 + strhne r3, [r2, #22] @ movhi + bne .L4435 +.L4394: + mov r2, #1 + lsl r3, r3, #1 + strb r2, [r5, #-144] + ldr r2, [r4, #1092] + ldrh r3, [r2, r3] + cmp r3, #0 + beq .L4395 + movw r2, #3336 + ldr r1, .L4535+64 + ldr r0, .L4535+68 + bl rk_printk + bl dump_stack +.L4395: + movw r5, #2824 + ldrh r0, [r4, r5] + bl ftl_free_sblk + ldrh r3, [r4, r5] + mov r5, #0 + ldr r2, [r4, #1092] + lsl r3, r3, #1 + strh r5, [r2, r3] @ movhi + ldrh r3, [r6, #26] + add r3, r3, #1 + uxth r3, r3 + cmp r3, #8 + strhls r3, [r6, #26] @ movhi + bls .L4392 + strh r5, [r6, #26] @ movhi + bl ftl_flush + bl pm_flush + bl ftl_ext_info_flush + mov r0, r5 + bl ftl_info_flush + b .L4392 +.L4316: + ldr r7, .L4535+40 + mov r8, r7 +.L4489: + bl gc_scan_src_blk_one_page + ldr r3, .L4535+24 + ldrh r2, [r7, #2] + ldrh r3, [r3] + cmp r2, r3 + bcs .L4398 + cmp r6, #7 + bls .L4489 + b .L4435 +.L4398: + ldrh r3, [r7, #20] + ldrh r1, [r7] + cmp r3, #0 + beq .L4399 + mov r2, #4 + ldr r0, [r4, #1092] + strb r2, [r5, #-144] + mov r2, #0 + strh r2, [r7, #22] @ movhi + lsl r2, r1, #1 + ldrh r2, [r0, r2] + cmp r3, r2 + beq .L4400 + ldr r0, .L4535+8 + ldr r0, [r0] + tst r0, #1024 + beq .L4400 + ldr r0, .L4535+28 + bl rk_printk +.L4400: + movw r3, #2824 + ldr r2, [r4, #1092] + ldrh r3, [r4, r3] + lsl r3, r3, #1 + ldrh r2, [r2, r3] + ldrh r3, [r8, #20] + cmp r2, r3 + beq .L4401 + movw r2, #3379 + ldr r1, .L4535+64 + ldr r0, .L4535+68 + bl rk_printk + bl dump_stack +.L4401: + movw r3, #2824 + ldrh r1, [r8, #20] + ldrh r3, [r4, r3] + ldr r2, [r4, #1092] + lsl r3, r3, #1 + strh r1, [r2, r3] @ movhi + b .L4435 +.L4399: + mov r3, #1 + ldr r6, [r4, #1084] + strb r3, [r5, #-144] + ldr r3, .L4535+8 + add r6, r6, r1, lsl #2 + ldr r3, [r3] + tst r3, #256 + beq .L4402 + ldrb r2, [r6, #2] @ zero_extendqisi2 + ldr r0, .L4535+32 + lsr r2, r2, #5 + bl rk_printk +.L4402: + ldrb r3, [r6, #2] @ zero_extendqisi2 + and r2, r3, #224 + and r3, r3, #192 + cmp r3, #0 + cmpne r2, #224 + bne .L4403 + movw r2, #3389 + ldr r1, .L4535+64 + ldr r0, .L4535+68 + bl rk_printk + bl dump_stack +.L4403: + movw r5, #2824 + ldrh r0, [r4, r5] + bl ftl_free_sblk + mvn r3, #0 + strh r3, [r4, r5] @ movhi + ldrh r3, [r8, #26] + add r3, r3, #1 + uxth r3, r3 + cmp r3, #8 + movhi r3, #0 + strhls r3, [r8, #26] @ movhi + strhhi r3, [r8, #26] @ movhi + bls .L4435 +.L4532: + bl flt_sys_flush + b .L4435 +.L4317: + cmp r10, #0 + bne .L4405 + movw r3, #2804 + ldrh r3, [r4, r3] + cmp r3, r6 + bcc .L4435 +.L4405: + ldrh r2, [r7, #80] + movw r3, #65535 + cmp r2, r3 + bne .L4406 + ldrb r8, [r5, #-3119] @ zero_extendqisi2 + cmp r8, #1 + bne .L4406 + ldr r9, .L4535+40 + bl ftl_flush + movw r3, #2180 + mov r1, #5 + ldrh r0, [r9, r3] + cmp r0, #0 + movne r0, r8 + bl zftl_gc_get_free_sblk + movw r3, #65535 + mov r6, r0 + cmp r0, r3 + beq .L4409 + ldr r8, [r4, #1084] + add r8, r8, r0, lsl #2 + ldrb r3, [r8, #2] @ zero_extendqisi2 + tst r3, #224 + beq .L4410 + movw r2, #3423 + ldr r1, .L4535+64 + ldr r0, .L4535+68 + bl rk_printk + bl dump_stack +.L4410: + ldrb r3, [r8, #2] @ zero_extendqisi2 + and r3, r3, #15 + orr r3, r3, #176 + strb r3, [r8, #2] +.L4434: + mov r1, #1 + mov r0, r6 + bl ftl_erase_sblk + mov r3, #5 + add r1, r7, #96 + strb r3, [r7, #84] + mov r0, r6 + bl ftl_get_blk_list_in_sblk + ldr r2, .L4535+60 + uxtb r0, r0 + mov r8, #0 + strh r6, [r7, #80] @ movhi + strb r0, [r7, #89] + mov r1, #255 + ldrh r3, [r2, #-8] + strh r8, [r7, #82] @ movhi + strb r8, [r7, #85] + strh r8, [r7, #90] @ movhi + smulbb r0, r3, r0 + ldrh r3, [r2, #-30] + strh r0, [r7, #86] @ movhi + sub r7, r2, #16 + ldrb r2, [r5, #-3127] @ zero_extendqisi2 + ldr r0, [r5, #-132] + mul r2, r2, r3 + lsl r2, r2, #2 + bl ftl_memset + ldrh r3, [r7, #-14] + mov r1, #255 + ldrb r2, [r5, #-3127] @ zero_extendqisi2 + ldr r0, [r5, #-128] + mul r2, r2, r3 + lsl r2, r2, #2 + bl ftl_memset + ldrh r3, [r7, #-14] + mov r1, #255 + ldrb r2, [r5, #-3127] @ zero_extendqisi2 + ldr r0, [r5, #-3124] + mvn r5, #0 + mul r2, r2, r3 + bl ftl_memset + ldr r3, [r4, #1096] + strh r5, [r3, #128] @ movhi + strh r5, [r3, #130] @ movhi + str r6, [r3, #132] + bl pm_flush + bl ftl_ext_info_flush + ldr r3, [r4, #2800] + movw r2, #2182 + mov r0, r8 + strh r8, [r9, #52] @ movhi + strh r6, [r3, #126] @ movhi + movw r3, #2102 + strh r8, [r9, r3] @ movhi + ldr r3, .L4535+36 + strh r8, [r9, r2] @ movhi + strh r8, [r3] @ movhi + str r5, [r3, #80] + bl ftl_info_flush + b .L4435 +.L4536: + .align 2 +.L4535: + .word .LANCHOR0 + .word .LANCHOR3 + .word .LANCHOR2 + .word .LC299 + .word .LANCHOR3-3104 + .word .LANCHOR3-3100 + .word .LANCHOR3-3096 + .word .LC300 + .word .LC301 + .word .LANCHOR0+4928 + .word .LANCHOR0+2824 + .word .LANCHOR0+4096 + .word 1145785929 + .word .LANCHOR3-3136 + .word .LANCHOR0+1088 + .word .LANCHOR3-3088 + .word .LANCHOR1+2525 + .word .LC0 +.L4406: + cmp r10, #1 + movne r8, #1 + moveq r8, #4 + cmp r6, #15 + ldr r6, .L4535+40 + addls r8, r8, #4 + add r10, r6, #2176 + add r10, r10, #6 +.L4413: + sub r8, r8, #1 + uxtb r8, r8 + cmp r8, #255 + beq .L4435 + bl gc_do_copy_back + ldrb r3, [r5, #-3119] @ zero_extendqisi2 + cmp r3, #0 + bne .L4414 + ldrb r3, [r4, #2769] @ zero_extendqisi2 + cmp r3, #3 + bhi .L4415 + bl ftl_write_commit +.L4415: + ldrh r2, [r6, #22] + ldrh r3, [r6, #20] + cmp r2, r3 + bcc .L4413 + mov r3, #1 + strb r3, [r5, #-144] + bl ftl_write_commit + bl ftl_flush + ldrh r3, [r6] + ldr r2, [r4, #1092] + lsl r3, r3, #1 + ldrh r3, [r2, r3] + cmp r3, #0 + beq .L4417 + movw r2, #3507 + ldr r1, .L4535+64 + ldr r0, .L4535+68 + bl rk_printk + bl dump_stack +.L4417: + movw r3, #2824 + ldr r2, [r4, #1092] + ldrh r0, [r4, r3] + lsl r3, r0, #1 + ldrh r3, [r2, r3] + cmp r3, #0 + bne .L4418 + bl ftl_free_sblk + b .L4392 +.L4418: + mov r2, #1 + mov r1, #0 + bl gc_add_sblk + b .L4392 +.L4414: + ldrh r3, [r10] + cmp r3, #0 + beq .L4419 + ldr r8, .L4535+44 + mov r3, #0 + strh r3, [r10] @ movhi + bl sblk_wait_write_queue_completed + bl gc_write_completed + ldr r0, [r8, #912] + cmn r0, #1 + beq .L4420 + ldrb r3, [r5, #-2542] @ zero_extendqisi2 + cmp r3, #0 + bne .L4421 + ldrb r3, [r5, #-3126] @ zero_extendqisi2 + cmp r3, #0 + beq .L4422 +.L4421: + ldr r3, [r4, #2800] + ldr r2, [r3, #156] + ldr r3, .L4535+48 + cmp r2, r3 + bne .L4422 + ldr r7, .L4535+52 + ldrb r3, [r4, #1153] @ zero_extendqisi2 + ldrb r1, [r5, #-3136] @ zero_extendqisi2 + ldrh r2, [r7, #-2] + rsb r3, r3, #24 + sub r3, r3, r2 + lsr r2, r0, r2 + mvn r0, #0 + bic r0, r2, r0, lsl r3 + bl __aeabi_uidiv + ldr r3, [r4, #1084] + lsl lr, r0, #2 + add ip, r3, lr + ldrb r2, [ip, #2] @ zero_extendqisi2 + tst r2, #8 + beq .L4420 + ldrh r1, [r9] + ldrh r7, [r7, #44] + add r1, r1, #8 + cmp r1, r7 + bge .L4420 + ldr r1, .L4535+56 + bfc r2, #3, #2 + strb r2, [ip, #2] + ldr r2, [r3, r0, lsl #2] + ldrh r1, [r1] + ldrh ip, [r3, lr] + ubfx r2, r2, #11, #8 + mul r1, r2, r1 + ubfx r7, ip, #0, #11 + lsr r2, r2, #3 + add r1, r1, r1, lsl #1 + add r1, r7, r1, asr #2 + bfi ip, r1, #0, #11 + strh ip, [r3, lr] @ movhi + ldr r1, [r3, r0, lsl #2] + bfi r1, r2, #11, #8 + str r1, [r3, r0, lsl #2] +.L4420: + ldr r3, [r4, #1096] + mov r7, #0 + str r7, [r8, #912] + strh r7, [r6, #52] @ movhi + ldrh r0, [r3, #80] + bl ftl_free_sblk + ldr r0, [r4, #2832] + mvn r3, #0 + ldr r2, [r4, #1096] + ldr r1, [r4, #2800] + cmp r0, r7 + strh r3, [r2, #80] @ movhi + strh r3, [r1, #126] @ movhi + strh r3, [r2, #130] @ movhi + beq .L4423 + bl zbuf_free +.L4423: + str r7, [r4, #2832] + bl flt_sys_flush + movw r2, #3567 + ldr r1, .L4535+64 + ldr r0, .L4535+68 + strb r7, [r5, #-144] + bl rk_printk + bl dump_stack + b .L4435 +.L4422: + bl ftl_mask_bad_block + b .L4420 +.L4419: + ldrh r3, [r7, #86] + ldrh r2, [r6, #22] + cmp r3, #1 + ldrh r3, [r6, #20] + bls .L4424 + cmp r2, r3 + bcc .L4413 + mov r3, #1 + strb r3, [r5, #-144] + ldrh r3, [r6, #52] + add r2, r3, #1 + strh r2, [r6, #52] @ movhi + add r3, r6, r3, lsl #1 + ldrh r2, [r6] + strh r2, [r3, #54] @ movhi + mvn r3, #0 + strh r3, [r6] @ movhi + b .L4435 +.L4424: + cmp r2, r3 + mov r1, #5 + strb r1, [r5, #-144] + bcc .L4425 + ldrh r3, [r6, #52] + add r2, r3, #1 + strh r2, [r6, #52] @ movhi + add r3, r6, r3, lsl #1 + ldrh r2, [r6] + strh r2, [r3, #54] @ movhi + mvn r3, #0 + strh r3, [r6] @ movhi +.L4425: + bl ftl_flush + bl sblk_wait_write_queue_completed + bl gc_write_completed + ldrh r2, [r7, #80] + ldr r3, [r4, #1096] + strh r2, [r3, #128] @ movhi + bl pm_flush + bl ftl_ext_info_flush + ldr r2, .L4535+60 + mov r3, #0 + ldrb r1, [r4, #1158] @ zero_extendqisi2 + strh r3, [r6, #12] @ movhi + ldrh r3, [r2, #-8] + cmp r1, #0 + ldrhne r2, [r2, #-30] + strh r3, [r6, #14] @ movhi + ldrb r3, [r5, #-3128] @ zero_extendqisi2 + strhne r2, [r6, #14] @ movhi + movne r2, #1 + strh r3, [r6, #16] @ movhi + strhne r2, [r6, #16] @ movhi + cmp r3, #2 + bne .L4428 + ldrh r3, [r6, #14] + lsl r3, r3, #1 + strh r3, [r6, #14] @ movhi + ldrb r3, [r5, #-3126] @ zero_extendqisi2 + cmp r3, #0 + moveq r3, #1 + strheq r3, [r6, #16] @ movhi +.L4428: + mov r3, #0 + strh r3, [r6, #18] @ movhi + b .L4435 +.L4431: + ldrh r2, [r8, #12] + ldrh r3, [r8, #14] + cmp r2, r3 + bcc .L4432 + mov r3, #6 + ldr r0, [r4, #2832] + strb r3, [r5, #-144] + bl zbuf_free + str r9, [r4, #2832] + b .L4435 +.L4432: + cmp r6, #15 + bls .L4320 + cmp r10, #1 + bne .L4435 + add r7, r7, #1 + uxtb r7, r7 + cmp r7, #4 + bls .L4320 + b .L4435 +.L4319: + bl gc_update_l2p_map_new + bl gc_free_src_blk + bl ftl_flush + mvn r6, #0 + bl pm_flush + strh r6, [r7, #80] @ movhi + bl ftl_ext_info_flush + ldr r3, [r4, #2800] + mov r0, #0 + strh r6, [r3, #126] @ movhi + bl ftl_info_flush +.L4534: + mov r3, #0 + b .L4533 +.L4409: + movw r2, #3430 + ldr r1, .L4535+64 + ldr r0, .L4535+68 + bl rk_printk + bl dump_stack + b .L4434 + .fnend + .size zftl_do_gc, .-zftl_do_gc + .align 2 + .global zftl_init + .syntax unified + .arm + .fpu softvfp + .type zftl_init, %function +zftl_init: + .fnstart + @ args = 0, pretend = 0, frame = 24 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + mvn r3, #0 + ldr r5, .L4617 + mov r6, #0 + .pad #28 + sub sp, sp, #28 + ldr r4, .L4617+4 + ldr r9, .L4617+8 + ldr r1, .L4617+12 + ldr r0, .L4617+16 + strb r3, [r4, #2820] + strb r3, [r5, #-2536] + strb r3, [r5, #-88] + str r3, [r5] + strb r6, [r4, #2796] + strb r6, [r5, #-2535] + strb r6, [r4, #2797] + bl rk_printk + ldrb r3, [r9, #16] @ zero_extendqisi2 + sub r2, r5, #3104 + ldrb r8, [r9, #13] @ zero_extendqisi2 + str r3, [sp, #4] + ldrb r3, [sp, #4] @ zero_extendqisi2 + ldr r1, [sp, #4] + lsl r10, r8, #9 + strb r8, [r5, #-2546] + strb r3, [r5, #-3128] + uxth r10, r10 + ldrh r3, [r9, #14] + strh r3, [r2, #-14] @ movhi + mov r0, r3 + str r3, [sp, #12] + bl __aeabi_idiv + str r0, [sp, #8] + sub r2, r5, #3088 + ldrh r3, [sp, #8] + mov r1, #1 + ldrb r7, [r4, #1109] @ zero_extendqisi2 + ldrh fp, [r9, #18] + strh r3, [r2, #-8] @ movhi + ldrb r2, [r9, #17] @ zero_extendqisi2 + strb r7, [r5, #-3072] + ldr r3, [sp, #12] + ldrh r0, [r4, #2] + smulbb r7, r7, r2 + strb r2, [r5, #-3136] + movw r2, #1080 + strh r10, [r5, #-14] @ movhi + strh fp, [r4, r2] @ movhi + sub r2, r5, #3072 + uxtb r7, r7 + strh r0, [r2, #-2] @ movhi + strb r7, [r5, #-3127] +.L4538: + cmp r0, r1 + uxth r2, r6 + add r6, r6, #1 + bcs .L4539 + ldr r1, .L4617+20 + sub r2, r2, #1 + mov ip, #0 + mov r0, #1 + strh r2, [r1, #-2] @ movhi + mul r2, r3, r8 + mul r1, r2, fp + str r2, [sp, #12] + lsr lr, r1, #21 +.L4540: + cmp lr, r0 + uxth r2, ip + add ip, ip, #1 + bcs .L4541 + ldr r9, .L4617+24 + sub r2, r2, #1 + uxth r2, r2 + mul r1, r7, r1 + ldr r6, .L4617 + lsr fp, fp, #4 + str r3, [sp, #20] + mul r0, r9, r7 + str r1, [r4, #2776] + mov r1, r8 + sub r8, r6, #3088 + lsl r9, r0, r2 + add r2, r9, #24576 + str r9, [r4, #1032] + str r2, [r6, #4] + mov r0, r2 + str r2, [sp, #16] + bl __aeabi_uidiv + sub ip, r10, #1 + str r0, [r4, #2780] + mov r1, r10 + add r0, ip, r0, lsl #2 + bl __aeabi_uidiv + ldr r3, [sp, #8] + strh r0, [r6, #8] @ movhi + uxth r0, r0 + lsl r0, r0, #4 + mul r1, r7, r3 + bl __aeabi_idiv + ldr r3, [sp, #12] + ldr r2, [sp, #16] + strh r0, [r6, #-176] @ movhi + mul r1, r7, r3 + mov r0, r2 + sub r1, r1, #1 + bl __aeabi_uidiv + cmp fp, #79 + strh fp, [r8, #-4] @ movhi + movls r2, #80 + mov r1, #2000 + strhls r2, [r8, #-4] @ movhi + add r0, r0, #8 + ldr r2, .L4617+28 + strh r0, [r8, #-2] @ movhi + mov r0, #32 + ldr r3, [sp, #20] + strh r1, [r2, #-10] @ movhi + mov r1, #50 + strh r1, [r2, #-12] @ movhi + mov r1, #256 + strh r1, [r6, #-180] @ movhi + mov r1, #48 + strh r1, [r6, #-178] @ movhi + ldr r1, .L4617+32 + strh r0, [r1] @ movhi + ldr r1, [sp, #4] + cmp r1, #2 + mov r1, r2 + beq .L4543 + ldrb ip, [r6, #-3120] @ zero_extendqisi2 + cmp ip, #0 + beq .L4544 +.L4543: + mov r2, #150 + mov r0, #12 + strh r2, [r1, #-12] @ movhi + mov r2, #64 + strh r2, [r6, #-178] @ movhi + ldr r2, .L4617+32 + strh r0, [r2] @ movhi + ldrb r0, [r4] @ zero_extendqisi2 + cmp r0, #0 + moveq r0, #4 + strheq r0, [r2] @ movhi + moveq r2, #600 + strheq r2, [r1, #-10] @ movhi + moveq r2, #128 + strheq r2, [r6, #-180] @ movhi + ldrb r2, [r4, #1159] @ zero_extendqisi2 + cmp r2, #0 + movne r2, #200 + strhne r2, [r1, #-12] @ movhi + movne r2, #2000 + strhne r2, [r1, #-10] @ movhi +.L4547: + mul r7, r7, r3 + mov r2, #0 + str r2, [r4, #2812] + mov r2, #1 + strb r2, [r6, #-11] + cmp r10, r7, lsl #2 + ldr r7, .L4617+8 + movlt r3, #2 + strblt r3, [r6, #-11] + ldr r3, [r7] + tst r3, #4096 + beq .L4550 + mov r1, r9 + ldr r0, .L4617+36 + bl rk_printk +.L4550: + ldr r3, [r7] + tst r3, #4096 + beq .L4551 + ldr r1, [r4, #2776] + ldr r0, .L4617+40 + bl rk_printk +.L4551: + ldr r3, [r7] + tst r3, #4096 + beq .L4552 + ldr r1, [r4, #2780] + ldr r0, .L4617+44 + bl rk_printk +.L4552: + ldr r3, [r7] + tst r3, #4096 + beq .L4553 + ldr r1, [r6, #4] + ldr r0, .L4617+48 + bl rk_printk +.L4553: + ldr r3, [r7] + tst r3, #4096 + beq .L4554 + ldrh r1, [r6, #8] + ldr r0, .L4617+52 + bl rk_printk +.L4554: + ldr r3, [r7] + tst r3, #4096 + beq .L4555 + ldrh r1, [r6, #-14] + ldr r0, .L4617+56 + bl rk_printk +.L4555: + ldr r3, [r7] + tst r3, #4096 + beq .L4556 + ldrh r1, [r6, #-176] + ldr r0, .L4617+60 + bl rk_printk +.L4556: + ldr r3, [r7] + tst r3, #4096 + beq .L4557 + ldrh r1, [r8, #-4] + ldr r0, .L4617+64 + bl rk_printk +.L4557: + ldr r3, [r7] + tst r3, #4096 + beq .L4558 + ldrh r1, [r8, #-2] + ldr r0, .L4617+68 + bl rk_printk +.L4558: + bl zbuf_init + mov r0, #16384 + movw r9, #1080 + bl ftl_malloc + str r0, [r5, #-52] + mov r0, #16384 + bl ftl_malloc + str r0, [r5, #-44] + mov r0, #16384 + bl ftl_malloc + str r0, [r5, #12] + mov r0, #256 + bl ftl_dma32_malloc + str r0, [r5, #-76] + mov r0, #256 + bl ftl_dma32_malloc + ldrh r3, [r4, r9] + str r0, [r5, #-40] + mov r0, #6 + mul r0, r0, r3 + bl ftl_dma32_malloc + ldrh r3, [r8, #-8] + str r0, [r4, #1036] + ldrb r0, [r5, #-3127] @ zero_extendqisi2 + mul r0, r0, r3 + lsl r0, r0, #2 + bl ftl_dma32_malloc + ldrh r1, [r8, #-8] + str r0, [r5, #-2552] + ldrb r0, [r5, #-3127] @ zero_extendqisi2 + ldr r2, [r5, #-44] + ldrh ip, [r4, r9] + mul r0, r0, r1 + str r2, [r5, #-2556] + lsl r1, r0, #1 + add r3, r2, r0, lsl #3 + ldr r0, [r7] + add r1, r1, ip, lsr #1 + str r3, [r4, #1092] + add r1, r2, r1, lsl #2 + tst r0, #4096 + str r1, [r4, #1096] + beq .L4559 + ldr r0, .L4617+72 + bl rk_printk +.L4559: + ldrh r2, [r8, #-8] + movw r3, #1080 + ldrb r5, [r6, #-3127] @ zero_extendqisi2 + ldrh r3, [r4, r3] + mul r5, r5, r2 + ldrh r2, [r6, #8] + lsl r8, r3, #2 + add r5, r3, r5, lsl #2 + ldr r3, [r7] + add r8, r8, r2, lsl #2 + lsl r5, r5, #1 + tst r3, #4096 + add r5, r5, #632 + add r8, r8, #704 + beq .L4560 + ldrh r3, [r6, #-14] + mov r2, r8 + mov r1, r5 + ldr r0, .L4617+76 + bl rk_printk +.L4560: + ldrh r1, [r6, #-14] + cmp r8, r1 + cmpls r5, r1 + movhi r5, #1 + movls r5, #0 + bls .L4561 +.L4615: + b .L4615 +.L4539: + lsl r1, r1, #1 + b .L4538 +.L4541: + lsl r0, r0, #1 + b .L4540 +.L4544: + ldrb r1, [r4, #1158] @ zero_extendqisi2 + cmp r1, #0 + movne r1, #1200 + strhne r0, [r2, #-12] @ movhi + strhne r1, [r2, #-10] @ movhi + strhne r0, [r6, #-178] @ movhi + b .L4547 +.L4561: + bl sblk_init + bl gc_init + bl ftl_info_blk_init + cmn r0, #1 + beq .L4537 + bl ftl_ext_info_init + mov r0, #1 + bl pm_init + bl lpa_rebuild_hash + ldr r0, [r4, #1096] + mov r1, r5 + add r0, r0, #16 + bl ftl_open_sblk_recovery + ldr r0, [r4, #1096] + add r1, r0, #16 + add r0, r0, #48 + bl ftl_open_sblk_recovery + ldr r2, [r4, #2800] + ldr r0, [r4, #1096] + ldr r3, [r2, #8] + add r0, r0, #16 + add r3, r3, #16 + str r3, [r2, #8] + bl ftl_info_data_recovery + ldr r0, [r4, #1096] + add r0, r0, #48 + bl ftl_info_data_recovery + ldr r0, [r4, #1096] + add r0, r0, #80 + bl ftl_info_data_recovery + bl gc_recovery + bl pm_flush + mov r0, #1 + bl ftl_total_vpn_update + ldrb r3, [r6, #-47] @ zero_extendqisi2 + cmp r3, #0 + ldrne r2, [r4, #2800] + ldrne r3, [r2, #68] + addne r3, r3, #1 + strne r3, [r2, #68] + bl ftl_ext_info_flush + mov r0, #0 + bl ftl_info_flush + bl print_ftl_debug_info + ldr r3, [r4, #1096] + ldrh r3, [r3, #124] + cmp r3, #0 + bne .L4571 + ldr r3, .L4617+80 + movw r2, #2788 + ldrh r2, [r4, r2] + ldrh r3, [r3] + add r3, r3, r2 + cmp r3, #7 + ble .L4571 +.L4567: + mov r0, #0 +.L4537: + add sp, sp, #28 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L4571: + ldr r6, .L4617+80 + mov r5, #16384 +.L4568: + mov r1, #1 + mov r0, #0 + bl zftl_do_gc + mov r1, #1 + mov r0, r1 + bl zftl_do_gc + ldr r3, [r4, #1096] + ldrh r2, [r3, #124] + cmp r2, #0 + bne .L4566 + ldrh r2, [r3, #80] + movw r3, #65535 + cmp r2, r3 + bne .L4566 + ldr r2, .L4617+84 + ldrh r3, [r6] + ldrh r2, [r2] + add r3, r3, r2 + cmp r3, #7 + bgt .L4567 +.L4566: + subs r5, r5, #1 + bne .L4568 + b .L4567 +.L4618: + .align 2 +.L4617: + .word .LANCHOR3 + .word .LANCHOR0 + .word .LANCHOR2 + .word .LC1 + .word .LC2 + .word .LANCHOR3-3136 + .word 1892352 + .word .LANCHOR3-2528 + .word .LANCHOR0+1088 + .word .LC302 + .word .LC303 + .word .LC304 + .word .LC305 + .word .LC306 + .word .LC307 + .word .LC308 + .word .LC309 + .word .LC310 + .word .LC311 + .word .LC312 + .word .LANCHOR0+2784 + .word .LANCHOR0+2788 + .fnend + .size zftl_init, .-zftl_init + .align 2 + .global rk_ftl_init + .syntax unified + .arm + .fpu softvfp + .type rk_ftl_init, %function +rk_ftl_init: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L4634 + mov r0, #68 + push {r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + mov r5, #0 + ldr r4, .L4634+4 + ldr r3, [r3] + str r5, [r4, #-164] + strb r5, [r4, #16] + str r3, [r4, #-168] + str r5, [r4, #-152] + bl ftl_dma32_malloc + cmp r0, r5 + str r0, [r4, #-160] + bne .L4620 +.L4622: + mvn r5, #0 +.L4619: + mov r0, r5 + pop {r4, r5, r6, r7, r8, pc} +.L4620: + mov r0, #2048 + bl ftl_dma32_malloc + mov r1, r4 + str r0, [r4, #20] + str r5, [r1, #24]! + sub r0, r4, #156 + str r5, [r4, #-156] + bl rknand_get_reg_addr + ldr r3, [r4, #-156] + cmp r3, #0 + beq .L4622 + bl rk_nandc_irq_init + mov r3, #2048 + mov r2, r5 + mov r1, r5 + ldr r0, [r4, #20] + bl flash_sram_load_store + bl rknand_flash_cs_init + ldr r3, [r4, #-160] + ldr r2, .L4634+8 + ldr r0, [r4, #-156] + str r2, [r3, #40] + ldr r2, .L4634+12 + str r2, [r3, #32] + ldr r2, .L4634+16 + str r2, [r3, #44] + ldr r2, .L4634+20 + str r2, [r3, #48] + ldr r2, .L4634+24 + str r2, [r3, #36] + ldr r2, .L4634+28 + str r2, [r3, #56] + ldr r2, .L4634+32 + str r2, [r3, #20] + ldr r2, .L4634+36 + str r2, [r3, #24] + ldr r2, .L4634+40 + str r2, [r3, #12] + ldr r2, .L4634+44 + str r2, [r3, #16] + ldr r2, .L4634+48 + str r2, [r3, #4] + ldr r2, .L4634+52 + str r2, [r3, #8] + ldr r2, .L4634+56 + str r2, [r3, #60] + ldr r2, .L4634+60 + str r2, [r3, #64] + ldr r2, .L4634+64 + str r2, [r3, #52] + ldr r2, .L4634+68 + str r2, [r3, #28] + bl nand_flash_init + subs r7, r0, #0 + bne .L4623 + bl zftl_init + mov r5, r0 + bl zftl_proc_debug_init + mov r3, #1 + strb r3, [r4, #16] +.L4624: + mov r1, r5 + ldr r0, .L4634+72 + bl rk_printk + b .L4619 +.L4623: + ldr r3, [r4, #-160] + mov r6, r4 + ldr r2, .L4634+76 + ldr r0, [r4, #-156] + ldr r4, .L4634+80 + str r2, [r3, #40] + ldr r2, .L4634+84 + str r2, [r3, #32] + ldr r2, .L4634+88 + str r2, [r3, #44] + ldr r2, .L4634+92 + str r2, [r3, #48] + ldr r2, .L4634+96 + str r2, [r3, #36] + ldr r2, .L4634+100 + str r2, [r3, #56] + ldr r2, .L4634+104 + str r2, [r3, #20] + ldr r2, .L4634+108 + str r2, [r3, #24] + ldr r2, .L4634+112 + str r2, [r3, #12] + ldr r2, .L4634+116 + str r2, [r3, #16] + ldr r2, .L4634+120 + str r2, [r3, #4] + ldr r2, .L4634+124 + str r2, [r3, #8] + ldr r2, .L4634+128 + str r2, [r3, #60] + ldr r2, .L4634+132 + str r2, [r3, #64] + ldr r2, .L4634+136 + str r2, [r3, #52] + ldr r2, .L4634+140 + str r2, [r3, #28] + bl FlashInit + cmn r7, #2 + mov r5, r0 + bne .L4625 + mov r2, #32 + ldr r1, .L4634+144 + add r0, r4, #4 + bl ftl_memcpy + ldrb r0, [r4, #22] @ zero_extendqisi2 + bl flash_lsb_page_tbl_build + ldrh r3, [r4, #14] + strh r3, [r4, #30] @ movhi +.L4625: + ldr r3, .L4634+148 + ldr r2, [r3] + ldr r3, .L4634+152 + cmp r2, r3 + ldr r2, .L4634+156 + bne .L4626 + ldr r3, .L4634+160 + ldrb r3, [r3] @ zero_extendqisi2 + cmp r3, #0 + bne .L4627 +.L4626: + mov r3, #0 + strb r3, [r2, #1110] + strb r3, [r2] +.L4627: + ldr r1, .L4634+164 + mov r0, #1 + ldrh ip, [r4, #14] + mov r3, #0 + str r3, [r6, #-100] + ldrb r1, [r1] @ zero_extendqisi2 + strb r1, [r2, #1108] + ldr r1, .L4634+168 + ldrb r1, [r1] @ zero_extendqisi2 + strb r1, [r2, #1193] +.L4628: + cmp ip, r0 + uxth r1, r3 + add r3, r3, #1 + bcs .L4629 + sub r3, r1, #1 + ldr r1, .L4634+172 + strh r3, [r1, #-2] @ movhi + mov r3, #0 + cmp r5, r3 + strb r3, [r2, #1143] + bne .L4624 + bl FtlInit + mov r5, r0 + b .L4624 +.L4629: + lsl r0, r0, #1 + b .L4628 +.L4635: + .align 2 +.L4634: + .word jiffies + .word .LANCHOR3 + .word zftl_deinit + .word zftl_cache_flush + .word zftl_flash_suspend + .word zftl_flash_resume + .word zftl_get_density + .word zftl_read_flash_info + .word zftl_read + .word zftl_write + .word zftl_sys_read + .word zftl_sys_write + .word zftl_vendor_read + .word zftl_vendor_write + .word zftl_nandc_get_irq_status + .word zftl_proc_ftl_read + .word zftl_do_gc + .word zftl_discard + .word .LC313 + .word ftl_deinit + .word .LANCHOR2 + .word ftl_cache_flush + .word ftl_flash_suspend + .word ftl_flash_resume + .word ftl_get_density + .word ftl_read_flash_info + .word ftl_read + .word ftl_write + .word ftl_sys_read + .word ftl_sys_write + .word ftl_vendor_read + .word ftl_vendor_write + .word ftl_nandc_get_irq_status + .word ftl_proc_ftl_read + .word ftl_do_gc + .word ftl_discard + .word gNandParaInfo + .word g_nandc_version_data + .word 1446522928 + .word .LANCHOR0 + .word gFlashSlcMode + .word gNandFlashIDBEccBits + .word gNandFlashEccBits + .word .LANCHOR3-3136 + .fnend + .size rk_ftl_init, .-rk_ftl_init + .align 2 + .global zftl_write + .syntax unified + .arm + .fpu softvfp + .type zftl_write, %function +zftl_write: + .fnstart + @ args = 0, pretend = 0, frame = 24 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + mov r10, r3 + ldr r3, .L4666 + .pad #36 + sub sp, sp, #36 + mov r4, r0 + mov r6, r1 + mov r5, r2 + ldr r3, [r3] + tst r3, #4096 + beq .L4637 + ldr r3, [r10] + str r3, [sp] + mov r3, r2 + mov r2, r1 + mov r1, r0 + ldr r0, .L4666+4 + bl rk_printk +.L4637: + cmp r4, #0 + bne .L4638 + ldr r3, .L4666+8 + mov r4, #24576 + ldr r2, [r3, #1032] +.L4639: + cmp r2, r5 + cmpcs r2, r6 + movls fp, #1 + movhi fp, #0 + bls .L4657 + add r1, r6, r5 + cmp r2, r1 + bcc .L4657 + ldr r8, .L4666+12 + add r4, r4, r6 + mov r0, r4 + ldrb r6, [r8, #-2546] @ zero_extendqisi2 + mov r1, r6 + bl __aeabi_uidiv + mov r9, r0 + sub r0, r5, #1 + mov r1, r6 + add r0, r0, r4 + bl __aeabi_uidiv + str r8, [sp, #16] + sub r7, r0, r9 + ldr r8, .L4666+8 + add r7, r7, #1 + mov r6, r9 + add r3, r4, r5 + str r0, [sp, #12] + str fp, [sp, #20] + str r3, [sp, #24] +.L4641: + cmp r7, #0 + bne .L4650 + bl ftl_write_commit + mov r1, #1 + mov r0, r7 + bl zftl_do_gc + ldr r3, [r8, #1096] + ldr r4, .L4666+16 + ldrh r3, [r3, #124] + cmp r3, #0 + bne .L4651 + movw r2, #2788 + ldrh r3, [r4] + ldrh r2, [r8, r2] + add r3, r3, r2 + cmp r3, #11 + bgt .L4652 +.L4651: + mov r1, #1 + mov r0, #0 + bl zftl_do_gc +.L4652: + ldr r5, .L4666+20 +.L4653: + ldrh r3, [r4] + ldrh r2, [r5] + add r3, r3, r2 + cmp r3, #7 + ble .L4654 + bl timer_get_time + ldr r3, [sp, #16] + str r0, [r3, #-4] + mov r0, #0 +.L4636: + add sp, sp, #36 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L4638: + cmp r4, #3 + bhi .L4657 + lsl r4, r4, #13 + mov r2, #8192 + b .L4639 +.L4650: + ldrb r3, [r8, #2796] @ zero_extendqisi2 + cmp r3, #0 + beq .L4642 + ldrb r3, [r8, #2769] @ zero_extendqisi2 + cmp r3, #2 + bhi .L4642 + bl ftl_write_commit +.L4642: + mov r0, #0 + bl buf_alloc + subs fp, r0, #0 + bne .L4643 + bl ftl_write_commit + b .L4641 +.L4643: + ldrb r3, [sp, #20] @ zero_extendqisi2 + strb r3, [fp, #41] + ldr r3, [sp, #16] + ldrb r2, [r3, #-2546] @ zero_extendqisi2 + ldr r3, [sp, #12] + strb r2, [fp, #40] + cmp r6, r3 + cmpne r6, r9 + bne .L4646 + cmp r6, r9 + smulbbne r2, r6, r2 + ldrne r3, [sp, #24] + subne r2, r3, r2 + bne .L4665 + mov r1, r2 + mov r0, r4 + str r2, [sp, #28] + bl __aeabi_uidivmod + ldr r2, [sp, #28] + uxtb r1, r1 + strb r1, [fp, #41] + sub r2, r2, r1 + uxtb r2, r2 + cmp r5, r2 + strbcc r5, [fp, #40] + bcc .L4646 +.L4665: + strb r2, [fp, #40] +.L4646: + ldrb ip, [fp, #41] @ zero_extendqisi2 + mov r1, r10 + ldrb r2, [fp, #40] @ zero_extendqisi2 + sub r7, r7, #1 + ldr r0, [fp, #4] + lsl r2, r2, #9 + add r0, r0, ip, lsl #9 + bl ftl_memcpy + ldr r1, [r8, #2800] + str r6, [fp, #20] + add r6, r6, #1 + ldr r2, [r1, #8] + add r0, r2, #1 + str r0, [r1, #8] + mov r0, fp + str r2, [fp, #16] + bl ftl_write_buf + ldrb r3, [fp, #40] @ zero_extendqisi2 + add r10, r10, r3, lsl #9 + b .L4641 +.L4654: + mov r1, #1 + mov r0, #0 + bl zftl_do_gc + mov r1, #1 + mov r0, r1 + bl zftl_do_gc + b .L4653 +.L4657: + mvn r0, #0 + b .L4636 +.L4667: + .align 2 +.L4666: + .word .LANCHOR2 + .word .LC314 + .word .LANCHOR0 + .word .LANCHOR3 + .word .LANCHOR0+2784 + .word .LANCHOR0+2788 + .fnend + .size zftl_write, .-zftl_write + .align 2 + .global zftl_vendor_write + .syntax unified + .arm + .fpu softvfp + .type zftl_vendor_write, %function +zftl_vendor_write: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + mov r3, r2 + mov r2, r1 + add r1, r0, #512 + mov r0, #2 + b zftl_write + .fnend + .size zftl_vendor_write, .-zftl_vendor_write + .align 2 + .global zftl_sys_write + .syntax unified + .arm + .fpu softvfp + .type zftl_sys_write, %function +zftl_sys_write: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + mov r3, r2 + mov r2, r1 + mov r1, r0 + mov r0, #2 + b zftl_write + .fnend + .size zftl_sys_write, .-zftl_sys_write + .align 2 + .global zftl_discard + .syntax unified + .arm + .fpu softvfp + .type zftl_discard, %function +zftl_discard: + .fnstart + @ args = 0, pretend = 0, frame = 24 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #36 + sub sp, sp, #36 + ldr r7, .L4720 + ldr r3, [r7, #1032] + cmp r1, r3 + cmpls r0, r3 + movcs r2, #1 + movcc r2, #0 + bcs .L4692 + mov r4, r1 + add r1, r0, r1 + cmp r3, r1 + bcc .L4692 + ldr r3, .L4720+4 + add r8, r0, #24576 + ldr r6, .L4720+8 + ldr r0, [r3] + ldr r1, [r6, #28] + str r3, [sp, #16] + tst r0, #4096 + add r1, r4, r1 + str r1, [r6, #28] + beq .L4672 + str r2, [sp] + mov r3, r4 + mov r2, r8 + ldr r0, .L4720+12 + bl rk_printk +.L4672: + ldr r3, [r7, #2800] + ldr r10, [r3, #8] + add r2, r10, #1 + str r2, [r3, #8] + bl ftl_write_commit + bl ftl_flush + ldrb r9, [r6, #-2546] @ zero_extendqisi2 + mov r0, r8 + mov r1, r9 + bl __aeabi_uidiv + mov r1, r9 + mov r5, r0 + mov r0, r8 + bl __aeabi_uidivmod + subs fp, r1, #0 + beq .L4673 + sub r9, r9, fp + mov r0, r5 + cmp r9, r4 + movcs r9, r4 + bl lpa_hash_get_ppa + cmn r0, #1 + str r0, [sp, #24] + bne .L4674 + mov r2, #0 + add r1, sp, #24 + mov r0, r5 + bl pm_log2phys +.L4674: + ldr r3, [sp, #24] + cmn r3, #1 + uxth r3, r9 + str r3, [sp, #12] + beq .L4676 + mov r0, #0 + bl buf_alloc + subs r3, r0, #0 + beq .L4676 + ldr r0, [r3, #4] + mov r1, #0 + str r5, [r3, #20] + strb fp, [r3, #41] + strb r9, [r3, #40] + str r10, [r3, #16] + add r0, r0, fp, lsl #9 + str r3, [sp, #20] + ldr r3, [sp, #12] + lsl r2, r3, #9 + bl ftl_memset + ldr r3, [sp, #20] + mov r0, r3 + bl ftl_write_buf + bl ftl_write_commit + ldr r2, [r7, #2800] + ldr r3, [r2, #76] + add r3, r3, #1 + str r3, [r2, #76] +.L4676: + ldr r3, [sp, #12] + add r5, r5, #1 + sub r4, r4, r3 +.L4673: + cmp r4, #0 + beq .L4678 + bl ftl_flush +.L4678: + mov r9, #0 + mvn r3, #0 + str r3, [sp, #28] +.L4679: + ldrb r3, [r6, #-2546] @ zero_extendqisi2 + cmp r4, r3 + bcs .L4684 + cmp r4, #0 + beq .L4686 + mov r0, r5 + bl lpa_hash_get_ppa + cmn r0, #1 + str r0, [sp, #24] + bne .L4687 + mov r2, #0 + add r1, sp, #24 + mov r0, r5 + bl pm_log2phys +.L4687: + ldr r3, [sp, #24] + cmn r3, #1 + beq .L4686 + mov r0, #0 + bl buf_alloc + subs r9, r0, #0 + beq .L4686 + mov r3, #0 + str r5, [r9, #20] + strb r3, [r9, #41] + ldrb r3, [r6, #-2546] @ zero_extendqisi2 + strb r4, [r9, #40] + str r10, [r9, #16] + cmp r4, r3 + bcc .L4689 + movw r2, #1496 + ldr r1, .L4720+16 + ldr r0, .L4720+20 + bl rk_printk + bl dump_stack +.L4689: + lsl r2, r4, #9 + mov r1, #0 + ldr r0, [r9, #4] + bl ftl_memset + mov r0, r9 + bl ftl_write_buf + bl ftl_write_commit + ldr r2, [r7, #2800] + ldr r3, [r2, #76] + add r3, r3, #1 + str r3, [r2, #76] +.L4686: + ldr r1, [r6, #28] + cmp r1, #8192 + bls .L4693 + ldr r3, [sp, #16] + ldr r3, [r3] + tst r3, #4096 + beq .L4690 + mov r3, #0 + mov r2, r8 + str r3, [sp] + mov r3, r4 + ldr r0, .L4720+12 + bl rk_printk +.L4690: + mov r4, #0 + str r4, [r6, #28] + bl flt_sys_flush + mov r3, #1 + str r3, [r7, #2812] +.L4693: + mov r0, #0 + b .L4670 +.L4684: + mov r0, r5 + bl lpa_hash_get_ppa + cmn r0, #1 + str r0, [sp, #24] + beq .L4680 + mov r0, #0 + bl buf_alloc + subs fp, r0, #0 + beq .L4682 + ldrb r2, [r6, #-2546] @ zero_extendqisi2 + mov r1, #0 + str r5, [fp, #20] + strb r9, [fp, #41] + strb r2, [fp, #40] + str r10, [fp, #16] + lsl r2, r2, #9 + ldr r0, [fp, #4] + bl ftl_memset + mov r0, fp + bl ftl_write_buf + bl ftl_write_commit +.L4719: + ldr r2, [r7, #2800] + ldr r3, [r2, #76] + add r3, r3, #1 + str r3, [r2, #76] +.L4682: + ldrb r3, [r6, #-2546] @ zero_extendqisi2 + add r5, r5, #1 + sub r4, r4, r3 + b .L4679 +.L4680: + mov r2, #0 + add r1, sp, #24 + mov r0, r5 + bl pm_log2phys + ldr r3, [sp, #24] + cmn r3, #1 + beq .L4682 + mov r2, #1 + add r1, sp, #28 + mov r0, r5 + bl pm_log2phys + ldr r3, .L4720+24 + ldr r2, [sp, #24] + ldrb r1, [r6, #-3136] @ zero_extendqisi2 + ldrh r0, [r3] + ldrb r3, [r7, #1153] @ zero_extendqisi2 + lsr r2, r2, r0 + rsb r3, r3, #24 + sub r3, r3, r0 + mvn r0, #0 + bic r0, r2, r0, lsl r3 + bl __aeabi_uidiv + uxth r0, r0 + bl ftl_vpn_decrement + b .L4719 +.L4692: + mvn r0, #0 +.L4670: + add sp, sp, #36 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L4721: + .align 2 +.L4720: + .word .LANCHOR0 + .word .LANCHOR2 + .word .LANCHOR3 + .word .LC315 + .word .LANCHOR1+2536 + .word .LC0 + .word .LANCHOR3-3138 + .fnend + .size zftl_discard, .-zftl_discard + .align 2 + .global dump_pm_blk + .syntax unified + .arm + .fpu softvfp + .type dump_pm_blk, %function +dump_pm_blk: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + movw r3, #698 + ldr r4, .L4727 + mov r2, #4 + mov r5, #0 + movw r7, #65535 + ldr r0, .L4727+4 + ldr r1, [r4, #2800] + ldr r6, .L4727+8 + ldrh r3, [r1, r3] + add r1, r1, #704 + bl rknand_print_hex + ldr r1, [r4, #2800] + mov r2, #2 + ldrh r3, [r6, #-176] + ldr r0, .L4727+12 + add r1, r1, #416 + bl rknand_print_hex +.L4723: + ldrh r2, [r6, #-176] + uxth r3, r5 + cmp r2, r3 + bhi .L4725 + pop {r4, r5, r6, r7, r8, pc} +.L4725: + uxth r3, r5 + ldr r2, [r4, #2800] + add r3, r3, #208 + lsl r3, r3, #1 + ldrh r0, [r2, r3] + cmp r0, r7 + beq .L4724 + mov r1, #0 + bl ftl_sblk_dump +.L4724: + add r5, r5, #1 + b .L4723 +.L4728: + .align 2 +.L4727: + .word .LANCHOR0 + .word .LC267 + .word .LANCHOR3 + .word .LC268 + .fnend + .size dump_pm_blk, .-dump_pm_blk + .align 2 + .global id_block_prog_msb_ff_data + .syntax unified + .arm + .fpu softvfp + .type id_block_prog_msb_ff_data, %function +id_block_prog_msb_ff_data: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #12 + ldr r5, .L4736 + ldrb r3, [r5, #1110] @ zero_extendqisi2 + cmp r3, #0 + bne .L4729 + ldr r3, [r5, #1104] + mov r4, r2 + mov r10, r0 + mov fp, r1 + ldrb r3, [r3, #19] @ zero_extendqisi2 + sub r2, r3, #5 + cmp r3, #68 + cmpne r2, #2 + bls .L4731 + sub r3, r3, #19 + tst r3, #239 + bne .L4729 +.L4731: + ldr r6, .L4736+4 + sub r7, r6, #2272 +.L4733: + ldr r3, [r5, #1104] + ldrh r3, [r3, #10] + cmp r3, r4 + bhi .L4734 +.L4729: + add sp, sp, #12 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L4734: + lsl r9, r4, #1 + add r8, r4, fp + mov r2, r8 + ldr r0, .L4736+8 + ldrh r3, [r7, r9] + mov r1, r4 + bl rk_printk + ldrh r2, [r7, r9] + movw r3, #65535 + cmp r2, r3 + bne .L4729 + mov r2, #16384 + mov r1, #255 + ldr r0, [r6, #-120] + add r4, r4, #1 + bl ftl_memset + ldr r3, [r5, #1104] + mov r1, r8 + mov r0, r10 + uxth r4, r4 + ldrb r3, [r3, #9] @ zero_extendqisi2 + str r3, [sp] + ldr r3, [r6, #-120] + mov r2, r3 + bl flash_prog_page + b .L4733 +.L4737: + .align 2 +.L4736: + .word .LANCHOR0 + .word .LANCHOR3 + .word .LC316 + .fnend + .size id_block_prog_msb_ff_data, .-id_block_prog_msb_ff_data + .align 2 + .global write_idblock + .syntax unified + .arm + .fpu softvfp + .type write_idblock, %function +write_idblock: + .fnstart + @ args = 0, pretend = 0, frame = 160 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L4848 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #180 + sub sp, sp, #180 + ldr lr, [r1] + ldrb ip, [r3] @ zero_extendqisi2 + ldr r4, .L4848+4 + ldr r10, .L4848+8 + str ip, [sp, #76] + ldrh ip, [sp, #76] + ldr r9, .L4848+12 + cmp lr, r4 + cmpne lr, r10 + str ip, [sp, #40] + movne ip, #1 + moveq ip, #0 + cmp lr, r9 + moveq ip, #0 + andne ip, ip, #1 + cmp ip, #0 + beq .L4739 +.L4847: + mvn r0, #0 +.L4738: + add sp, sp, #180 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L4739: + cmp r0, #15 + bls .L4847 + mov r5, r2 + ldr r2, [r3, #1104] + mov fp, r0 + mov r0, #256000 + str r3, [sp, #16] + ldrb r6, [r2, #9] @ zero_extendqisi2 + ldrh r8, [r2, #10] + ldr r2, .L4848+16 + str r1, [sp, #32] + ldrh r7, [r2, #30] + ldrb r2, [r3, #1110] @ zero_extendqisi2 + str r2, [sp, #96] + bl ftl_malloc + subs r3, r0, #0 + str r3, [sp, #20] + beq .L4847 + ldr r2, .L4848+20 + ldrb r2, [r2, #16] @ zero_extendqisi2 + cmp r2, #0 + streq r2, [sp, #16] + beq .L4742 + ldr r3, [sp, #16] + ldrb r2, [r3] @ zero_extendqisi2 + ldrb r3, [r3, #1110] @ zero_extendqisi2 + cmp r2, #0 + clzne r3, r3 + lsrne r3, r3, #5 + bne .L4844 + cmp r3, #3 + streq r3, [sp, #40] + moveq r3, #2 + beq .L4844 + cmp r3, #2 + ldr r3, [sp, #40] + moveq r3, #2 + str r3, [sp, #40] + movne r3, #0 + moveq r3, #3 +.L4844: + str r3, [sp, #16] +.L4742: + add fp, fp, #508 + add fp, fp, #3 + lsr fp, fp, #9 + cmp fp, #8 + bls .L4798 + cmp fp, #500 + bhi .L4745 +.L4744: + ldr r3, [sp, #32] + ldr r3, [r3] + cmp r3, r4 + cmpne r3, r10 + movne r4, #1 + moveq r4, #0 + cmp r3, r9 + moveq r9, #0 + andne r9, r4, #1 + cmp r9, #0 + beq .L4746 +.L4745: + ldr r0, [sp, #20] + bl ftl_free + b .L4847 +.L4798: + mov fp, #8 + b .L4744 +.L4746: + mov r0, r9 + mul r8, r6, r8 + bl zftl_flash_exit_slc_mode + ldr r3, .L4848 + sub r0, r8, #1 + mov r1, r8 + add r0, r0, fp + ldrb r2, [r3, #1110] @ zero_extendqisi2 + strb r2, [r3] + bl __aeabi_uidiv + ldr r3, [sp, #32] + movw r2, #63871 + ldr ip, .L4848+24 + str r0, [sp, #100] + movw r0, #4094 + add r3, r3, #254976 + add r3, r3, #512 +.L4752: + ldr r1, [r3, #-4]! + cmp r1, #0 + bne .L4747 + cmp r9, #0 + sub r2, r2, #1 + ldrne r1, [sp, #32] + streq ip, [r3, #512] + ldrne r1, [r1, r9, lsl #2] + add r9, r9, #1 + strne r1, [r3, #512] + cmp r9, r0 + movhi r9, #0 + cmp r2, #4096 + bne .L4752 +.L4751: + mul r3, r6, r7 + mov r2, #4 + mov r1, r5 + ldr r0, .L4848+28 + str r3, [sp, #72] + mov r3, #5 + bl rknand_print_hex + mov r2, fp + mov r1, fp + ldr r0, .L4848+32 + bl rk_printk + sub r3, r5, #4 + str r3, [sp, #48] + mov r3, #0 + str r3, [sp, #36] + str r3, [sp, #24] +.L4792: + ldr r3, .L4848+20 + ldrb r3, [r3, #16] @ zero_extendqisi2 + cmp r3, #0 + bne .L4753 + ldr r3, [sp, #48] + ldr r1, [sp, #24] + ldr r2, [r3, #4] + ldr r3, [sp, #72] + mul r10, r2, r3 + ldr r3, [sp, #100] + cmp r1, #0 + cmpne r3, #1 + bls .L4754 + ldr r3, [sp, #48] + ldr r3, [r3] + add r3, r3, #1 + cmp r2, r3 + bne .L4754 +.L4755: + ldr r3, [sp, #24] + add r3, r3, #1 + str r3, [sp, #24] + ldr r3, [sp, #48] + add r3, r3, #4 + str r3, [sp, #48] + ldr r3, [sp, #24] + cmp r3, #4 + bne .L4792 +.L4794: + mov r0, #0 + bl zftl_flash_exit_slc_mode + ldr r3, .L4848 + mov r0, #0 + ldrb r2, [sp, #76] @ zero_extendqisi2 + strb r2, [r3] + ldr r2, [sp, #16] + cmp r2, #0 + ldrbne r2, [sp, #96] @ zero_extendqisi2 + strbne r2, [r3, #1110] + mov r2, #2 + strb r2, [r3, #1154] + bl zftl_flash_enter_slc_mode + ldr r0, [sp, #20] + bl ftl_free + ldr r3, [sp, #36] + clz r0, r3 + lsr r0, r0, #5 + rsb r0, r0, #0 + b .L4738 +.L4747: + ldr r0, .L4848+36 + bl rk_printk + b .L4751 +.L4753: + ldr r5, .L4848 + ldr r2, [sp, #24] + ldr r3, [r5, #1040] + add r3, r3, r2 + ldrb r3, [r3, #32] @ zero_extendqisi2 + cmp r3, #255 + beq .L4755 + ldr r2, [sp, #72] + mul r10, r2, r3 + ldr r3, [sp, #16] + cmp r3, #0 + beq .L4754 + ldr r3, [sp, #24] + and r4, r3, #1 + ldr r3, [sp, #16] + cmp r3, #3 + orreq r4, r4, #1 + cmp r4, #0 + ldrbne r3, [sp, #40] @ zero_extendqisi2 + strbne r3, [r5] + strbne r3, [r5, #1110] + bne .L4754 + mov r0, r4 + bl zftl_flash_exit_slc_mode + strb r4, [r5] + strb r4, [r5, #1110] +.L4754: + ldr r5, .L4848 + mov r2, #512 + mov r1, #0 + ldr r0, [sp, #20] + bl ftl_memset + ldr r3, [r5, #1104] + mov r6, #0 + mov r0, r10 + ldrb r8, [r3, #9] @ zero_extendqisi2 + ldrh r7, [r3, #10] + ldr r3, .L4848+16 + mov r1, r8 + ldrh r4, [r3, #30] + mul r7, r8, r7 + ldrb r3, [r5, #1196] @ zero_extendqisi2 + strb r6, [r5, #1196] + str r3, [sp, #104] + mul r4, r8, r4 + bl __aeabi_uidiv + mov r1, r0 + mov r0, r6 + bl flash_erase_block + cmp r7, fp + movcs r0, #1 + bcs .L4757 + add r1, r10, r4 + mov r0, r6 + bl flash_erase_block + mov r0, #2 +.L4757: + ldr r2, [r5, #1104] + ldrh r3, [r2, #10] + ldrb r1, [r2, #12] @ zero_extendqisi2 + lsl r3, r3, #2 + mul r0, r0, r3 + bl __aeabi_idiv + mov r1, r4 + str r0, [sp, #64] + mov r0, r10 + bl __aeabi_uidivmod + sub r3, r10, r1 + str r1, [sp, #56] + cmp r10, r3 + str r3, [sp, #44] + bne .L4801 + ldrb r3, [r5, #1028] @ zero_extendqisi2 + cmp r3, #9 + bne .L4801 + ldr r3, .L4848+20 + mov r2, #1024 + mov r1, #0 + ldr r4, [r3, #-92] + mov r0, r4 + bl ftl_memset + ldr r2, .L4848+40 + mov r3, #12 + stm r4, {r2, r3} + mov r3, #0 + strb r3, [r4, #16] + str r3, [r4, #12] + ldrb r3, [r5, #1110] @ zero_extendqisi2 + cmp r3, #0 + ldrne r3, [r5, #1104] + ldrbne r3, [r3, #29] @ zero_extendqisi2 + strbne r3, [r4, #16] + mov r3, #4 + strb r3, [r4, #17] + ldr r3, .L4848 + ldr r3, [r3, #1104] + ldrb r1, [r3, #12] @ zero_extendqisi2 + ldrh r0, [r3, #10] + bl __aeabi_idiv + cmp r8, #8 + mov r3, #0 + movhi r2, #70 + movls r2, #16 + mov r1, #12 + strh r0, [r4, #18] @ movhi + strb r3, [r4, #20] + add r0, r4, r1 + strh r3, [r4, #22] @ movhi + strb r2, [r4, #21] + bl js_hash + sub r3, fp, #4 + str r0, [r4, #8] + str r3, [sp, #28] +.L4758: + ldr r9, [sp, #32] + mov r6, #0 + ldr r7, .L4848 +.L4761: + ldr r3, [sp, #64] + cmp r3, r6 + bhi .L4772 + ldr r3, .L4848+16 + mov r4, #0 + strb r4, [r7, #1196] + mov r0, r10 + ldr r5, .L4848 + mov r8, #4 + ldrb r2, [r3, #13] @ zero_extendqisi2 + ldrh r1, [r3, #30] + str r2, [sp, #80] + mul r1, r2, r1 + bl __aeabi_uidivmod + sub r3, r10, r1 + ldr r6, [sp, #20] + str r3, [sp, #84] + and r3, r1, #3 + str r3, [sp, #56] + ldr r3, [sp, #28] + str r1, [sp, #52] + str r4, [sp, #64] + str r3, [sp, #68] +.L4773: + ldr r3, [sp, #68] + cmp r4, r3 + bcc .L4787 + ldrb r3, [sp, #104] @ zero_extendqisi2 + ldr r4, .L4848 + strb r3, [r4, #1196] + ldr r3, [sp, #16] + cmp r3, #0 + beq .L4788 + mov r0, #0 + bl zftl_flash_exit_slc_mode + mov r3, #0 + strb r3, [r4] + strb r3, [r4, #1110] +.L4788: + ldr r3, [sp, #28] + mov r2, #0 + lsl r3, r3, #7 +.L4790: + ldr r1, [sp, #20] + ldr r0, [r1, r2, lsl #2] + ldr r1, [sp, #32] + ldr r1, [r1, r2, lsl #2] + cmp r0, r1 + beq .L4789 + mov r2, #512 + mov r1, #0 + ldr r0, [sp, #20] + bl ftl_memset + mov r1, r10 + mov r0, #0 + bl flash_erase_block + b .L4755 +.L4801: + str fp, [sp, #28] + mov r4, #0 + b .L4758 +.L4772: + ldr r3, [sp, #56] + ldrb r2, [r7, #1110] @ zero_extendqisi2 + add r5, r3, r6 + ubfx r5, r5, #2, #16 + cmp r2, #0 + add r0, r5, #1 + lsl r1, r0, #1 + add r3, r7, r1 + ldrh r3, [r3, #4] + beq .L4763 + ldrb r3, [r7, #1] @ zero_extendqisi2 + cmp r3, #0 + moveq r3, r0 + movne r3, r1 +.L4763: + ldrb r1, [r7, #1028] @ zero_extendqisi2 + cmp r1, #9 + subne r3, r3, #1 + lslne r3, r3, #2 + cmp r2, #0 + str r3, [sp, #112] + movw r3, #61424 + str r3, [sp, #116] + lsl r3, r5, #1 + add r1, r7, r3 + ldrh r1, [r1, #4] + moveq r5, r1 + beq .L4768 + ldrb r2, [r7, #1] @ zero_extendqisi2 + cmp r2, #0 + movne r5, r3 +.L4768: + cmp r4, #0 + mul r0, r5, r8 + bne .L4769 + ldr r3, [sp, #44] + add r3, r0, r3 + ldr r0, .L4848+44 + str r3, [sp, #60] + movw r3, #61424 + str r3, [sp, #12] + add r3, sp, #176 + mov r2, r3 + ldr r1, [sp, #60] + ldr r3, [r2, #-64]! + str r3, [sp, #8] + ldr r3, [r9] + str r2, [sp, #52] + mov r2, r6 + str r9, [sp] + str r3, [sp, #4] + mov r3, fp + bl rk_printk + mov r1, r9 + ldr r2, [sp, #52] + ldr r0, [sp, #60] + bl fw_flash_page_prog.constprop.29 + ldrb r3, [r7, #1110] @ zero_extendqisi2 + cmp r3, #0 + bne .L4770 + add r5, r5, #1 + mov r1, r8 + uxth r5, r5 + ldr r0, [sp, #44] + bl __aeabi_uidiv + mov r2, r5 + mov r1, r0 + mov r0, r4 + bl id_block_prog_msb_ff_data +.L4770: + ldr r3, [sp, #28] + add r9, r9, #2048 + add r3, r3, #16 + cmp r6, r3 + bcc .L4771 + ldr r3, [sp, #28] + add r3, r3, #20 + cmp r6, r3 + ldrcc r3, [sp, #32] + addcc r9, r3, #2048 +.L4771: + add r6, r6, #4 + mov r4, #0 + uxth r6, r6 + b .L4761 +.L4769: + ldr r3, [sp, #44] + add r2, sp, #112 + mov r1, r4 + add r0, r0, r3 + bl fw_flash_page_prog.constprop.29 + b .L4771 +.L4787: + ldr r3, [sp, #56] + mov r1, r8 + sub r3, r8, r3 + uxth r3, r3 + str r3, [sp, #60] + ldr r3, [sp, #52] + add r0, r3, r4 + bl __aeabi_uidiv + uxth r0, r0 + ldrb r1, [r5, #1110] @ zero_extendqisi2 + lsl r3, r0, #1 + cmp r1, #0 + add r2, r5, r3 + ldrh r2, [r2, #4] + moveq r0, r2 + beq .L4775 + ldrb r2, [r5, #1] @ zero_extendqisi2 + cmp r2, #0 + movne r0, r3 +.L4775: + ldr r2, [sp, #84] + ldr r3, [sp, #80] + ldrb r9, [r5, #1108] @ zero_extendqisi2 + mla r3, r0, r3, r2 + str r3, [sp, #88] + ldr r3, [r5, #1104] + ldr r2, [sp, #88] + ldrb r1, [r3, #9] @ zero_extendqisi2 + ldr r3, [sp, #56] + add r0, r3, r2 + bl __aeabi_uidiv + ldrb r3, [r5, #1193] @ zero_extendqisi2 + str r0, [sp, #44] + mov r0, r9 + str r3, [sp, #108] + bl nandc_bch_sel +.L4776: + str r8, [sp] + add r3, sp, #112 + mov r2, r6 + ldr r1, [sp, #44] + mov r0, #0 + bl flash_read_page + cmn r0, #1 + mov r7, r0 + bne .L4777 + ldrb r3, [r5, #1196] @ zero_extendqisi2 + cmp r3, #0 + str r3, [sp, #92] + bne .L4778 +.L4781: + ldr r3, .L4848+20 + ldr r3, [r3, #-100] + subs ip, r3, #0 + bne .L4779 +.L4780: + ldrb r3, [r5, #1143] @ zero_extendqisi2 + cmp r3, #0 + beq .L4777 + str r8, [sp] + add r3, sp, #112 + mov r2, r6 + ldr r1, [sp, #44] + mov r0, #0 + bl flash_ddr_tuning_read + b .L4846 +.L4778: + mov r0, #0 + add r3, sp, #112 + strb r0, [r5, #1196] + mov r2, r6 + str r8, [sp] + ldr r1, [sp, #44] + bl flash_read_page + ldrb r3, [sp, #92] @ zero_extendqisi2 + cmn r0, #1 + strb r3, [r5, #1196] + beq .L4781 +.L4846: + mov r7, r0 +.L4777: + cmn r7, #1 + movne r7, #0 + moveq r7, #1 + cmp r9, #16 + moveq r9, #0 + andne r9, r7, #1 + cmp r9, #0 + beq .L4783 + mov r0, #16 + mov r9, #16 + bl nandc_bch_sel + b .L4776 +.L4779: + str r8, [sp] + add r3, sp, #112 + mov r2, r6 + ldr r1, [sp, #44] + mov r0, #0 + blx ip + cmn r0, #1 + beq .L4780 + b .L4846 +.L4783: + ldr r0, [sp, #108] + bl nandc_bch_sel + ldr r3, [sp, #64] + cmp r7, #0 + mvnne r3, #0 + str r3, [sp, #64] + ldr r3, [sp, #84] + ldr r2, [sp, #64] + cmp r10, r3 + cmpeq r4, #0 + moveq r3, #1 + movne r3, #0 + cmp r2, #0 + movne r3, #0 + andeq r3, r3, #1 + cmp r3, #0 + beq .L4785 + ldr r3, [r6] + ldr r2, .L4848+40 + cmp r3, r2 + bne .L4785 + ldr r3, [sp, #68] + ldr r2, [sp, #60] + ldrb r8, [r6, #17] @ zero_extendqisi2 + add r3, r3, r2 + str r3, [sp, #68] +.L4786: + ldr r3, [sp, #60] + add r4, r3, r4 + uxth r4, r4 + b .L4773 +.L4785: + ldr r3, [sp, #60] + mov r2, r4 + ldr r1, [sp, #88] + ldr r0, .L4848+48 + add r6, r6, r3, lsl #9 + ldr r3, [sp, #116] + str r3, [sp] + ldr r3, [sp, #112] + bl rk_printk + mov r3, #0 + str r3, [sp, #56] + b .L4786 +.L4789: + add r2, r2, #1 + cmp r3, r2 + bne .L4790 + ldr r3, [sp, #36] + add r3, r3, #1 + cmp r3, #5 + str r3, [sp, #36] + bls .L4755 + b .L4794 +.L4849: + .align 2 +.L4848: + .word .LANCHOR0 + .word -52655045 + .word 1397640018 + .word 1397967698 + .word .LANCHOR2 + .word .LANCHOR3 + .word 1314014539 + .word .LC318 + .word .LC319 + .word .LC317 + .word 1179535694 + .word .LC320 + .word .LC321 + .fnend + .size write_idblock, .-write_idblock + .align 2 + .global write_loader_lba + .syntax unified + .arm + .fpu softvfp + .type write_loader_lba, %function +write_loader_lba: + .fnstart + @ args = 0, pretend = 0, frame = 40 + @ frame_needed = 0, uses_anonymous_args = 0 + cmp r0, #64 + push {r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + mov r5, r0 + .pad #48 + sub sp, sp, #48 + mov r6, r1 + mov r8, r2 + ldr r4, .L4877 + bne .L4851 + ldr r3, .L4877+4 + ldr r2, [r2] + ldr r1, .L4877+8 + cmp r2, r1 + cmpne r2, r3 + add r1, r1, #327680 + moveq r3, #1 + movne r3, #0 + cmp r2, r1 + orreq r3, r3, #1 + cmp r3, #0 + beq .L4851 + mov r3, #1 + mov r0, #256000 + strb r3, [r4, #32] + bl ftl_malloc + mov r2, #256000 + mov r1, #0 + str r0, [r4, #36] + bl ftl_memset + str r5, [r4, #40] +.L4851: + str r6, [sp] + mov r3, r5 + ldr r2, [r8] + ldr r1, [r4, #36] + ldr r0, .L4877+12 + bl rk_printk + ldrb r3, [r4, #32] @ zero_extendqisi2 + cmp r3, #0 + beq .L4850 + ldr r7, [r4, #36] + cmp r7, #0 + beq .L4850 + sub r0, r5, #64 + cmp r0, #500 + bcs .L4853 + rsb r2, r5, #564 + mov r1, r8 + cmp r6, r2 + add r0, r7, r0, lsl #9 + movcc r2, r6 + lsl r2, r2, #9 + bl ftl_memcpy +.L4854: + ldr r3, [r4, #40] + cmp r5, r3 + beq .L4863 + mov r8, #0 + mov r0, r7 + strb r8, [r4, #32] + bl ftl_free + str r8, [r4, #36] + b .L4863 +.L4853: + cmp r5, #564 + bcc .L4854 + ldr r3, .L4877+16 + ldr r0, [r4, #40] + ldr r3, [r3, #1104] + sub r0, r0, #64 + cmp r0, #500 + ldrb r3, [r3, #9] @ zero_extendqisi2 + movcs r0, #500 + cmp r3, #4 + beq .L4855 + mov r3, #2 + str r3, [sp, #8] + mov r3, #3 + str r3, [sp, #12] + mov r3, #4 + str r3, [sp, #16] + mov r3, #5 + str r3, [sp, #20] + mov r3, #6 + str r3, [sp, #24] +.L4856: + mov r3, #61952 +.L4862: + ldr r2, [r7, r3, lsl #2] + cmp r2, #0 + beq .L4860 + add r3, r3, #2048 + lsl r0, r3, #2 +.L4861: + mov r1, r7 + add r2, sp, #8 + mov r7, #0 + bl write_idblock + ldr r0, [r4, #36] + strb r7, [r4, #32] + bl ftl_free + str r7, [r4, #36] +.L4863: + add r5, r5, r6 + str r5, [r4, #40] +.L4850: + add sp, sp, #48 + @ sp needed + pop {r4, r5, r6, r7, r8, pc} +.L4855: + mov r2, #0 + add r3, sp, #8 +.L4859: + cmp r0, #256 + lslhi r1, r2, #1 + strls r2, [r3, r2, lsl #2] + strhi r1, [r3, r2, lsl #2] + add r2, r2, #1 + cmp r2, #5 + bne .L4859 + b .L4856 +.L4860: + sub r3, r3, #1 + cmp r3, #4096 + bne .L4862 + lsl r0, r0, #9 + b .L4861 +.L4878: + .align 2 +.L4877: + .word .LANCHOR3 + .word -52655045 + .word 1397640018 + .word .LC322 + .word .LANCHOR0 + .fnend + .size write_loader_lba, .-write_loader_lba + .align 2 + .global FtlWrite + .syntax unified + .arm + .fpu softvfp + .type FtlWrite, %function +FtlWrite: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, lr} + .save {r4, r5, r6, r7, r8, lr} + mov r6, r2 + sub r2, r1, #64 + mov r4, r1 + cmp r2, #1984 + mov r7, r3 + movcs r2, #0 + movcc r2, #1 + cmp r0, #0 + mov r5, r0 + movne r2, #0 + cmp r2, #0 + beq .L4880 + mov r2, r3 + mov r1, r6 + mov r0, r4 + bl write_loader_lba +.L4880: + ldr r3, .L4885 + mov r2, r6 + mov r1, r4 + mov r0, r5 + ldr r3, [r3, #-160] + ldr lr, [r3, #24] + mov r3, r7 + mov ip, lr + pop {r4, r5, r6, r7, r8, lr} + bx ip +.L4886: + .align 2 +.L4885: + .word .LANCHOR3 + .fnend + .size FtlWrite, .-FtlWrite + .align 2 + .global rknand_sys_storage_ioctl + .syntax unified + .arm + .fpu softvfp + .type rknand_sys_storage_ioctl, %function +rknand_sys_storage_ioctl: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L4896 + cmp r1, r3 + bne .L4891 + push {r4, lr} + .save {r4, lr} + bl rknand_dev_flush + mov r1, #0 + ldr r0, .L4896+4 + bl rk_printk + mov r0, #0 + pop {r4, pc} +.L4891: + mvn r0, #21 + bx lr +.L4897: + .align 2 +.L4896: + .word 1074029332 + .word .LC323 + .fnend + .size rknand_sys_storage_ioctl, .-rknand_sys_storage_ioctl + .align 2 + .global rk_ftl_storage_sys_init + .syntax unified + .arm + .fpu softvfp + .type rk_ftl_storage_sys_init, %function +rk_ftl_storage_sys_init: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + ldr r3, .L4899 + mov r2, #0 + mvn r1, #0 + strb r2, [r3, #32] + str r1, [r3, #40] + str r2, [r3, #36] + str r2, [r3, #44] + b rknand_sys_storage_init +.L4900: + .align 2 +.L4899: + .word .LANCHOR3 + .fnend + .size rk_ftl_storage_sys_init, .-rk_ftl_storage_sys_init + .align 2 + .global StorageSysDataDeInit + .syntax unified + .arm + .fpu softvfp + .type StorageSysDataDeInit, %function +StorageSysDataDeInit: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + @ link register save eliminated. + mov r0, #0 + bx lr + .fnend + .size StorageSysDataDeInit, .-StorageSysDataDeInit + .align 2 + .global rk_ftl_vendor_storage_init + .syntax unified + .arm + .fpu softvfp + .type rk_ftl_vendor_storage_init, %function +rk_ftl_vendor_storage_init: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, r7, r8, r9, r10, lr} + .save {r4, r5, r6, r7, r8, r9, r10, lr} + ldr r6, .L4913 + ldr r3, [r6, #48] + cmp r3, #0 + bne .L4903 + mov r0, #65536 + bl ftl_malloc + str r0, [r6, #48] +.L4903: + ldr r3, [r6, #48] + cmp r3, #0 + beq .L4908 + ldr r10, .L4913+4 + mov r7, #0 + ldr r9, .L4913+8 + mov r4, r7 + mov r8, r7 +.L4906: + ldr r2, [r6, #48] + mov r1, #128 + lsl r0, r8, #7 + bl FlashBootVendorRead + cmp r0, #0 + bne .L4909 + ldr r1, [r6, #48] + mov r0, r10 + add r2, r1, #61440 + ldr r3, [r1, #4] + ldr r2, [r2, #4092] + ldr r1, [r1] + bl rk_printk + ldr r5, [r6, #48] + ldr r3, [r5] + cmp r3, r9 + bne .L4905 + add r2, r5, #61440 + ldr r3, [r5, #4] + ldr r2, [r2, #4092] + cmp r3, r4 + sub r2, r2, r3 + clz r2, r2 + lsr r2, r2, #5 + movls r2, #0 + cmp r2, #0 + movne r7, r8 + movne r4, r3 +.L4905: + add r8, r8, #1 + cmp r8, #2 + bne .L4906 + cmp r4, #0 + beq .L4907 + mov r2, r5 + mov r1, #128 + lsl r0, r7, #7 + bl FlashBootVendorRead + adds r0, r0, #0 + movne r0, #1 + rsb r0, r0, #0 + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L4907: + mov r2, #65536 + mov r1, r4 + mov r0, r5 + bl memset + mov r3, #1 + add r2, r5, #61440 + str r3, [r5, #4] + mov r0, r4 + str r9, [r5] + str r3, [r2, #4092] + ldr r3, .L4913+12 + strh r4, [r5, #12] @ movhi + strh r3, [r5, #14] @ movhi + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L4908: + mvn r0, #11 + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L4909: + mvn r0, #0 + pop {r4, r5, r6, r7, r8, r9, r10, pc} +.L4914: + .align 2 +.L4913: + .word .LANCHOR3 + .word .LC324 + .word 1380668996 + .word -1032 + .fnend + .size rk_ftl_vendor_storage_init, .-rk_ftl_vendor_storage_init + .align 2 + .global rk_ftl_vendor_read + .syntax unified + .arm + .fpu softvfp + .type rk_ftl_vendor_read, %function +rk_ftl_vendor_read: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L4925 + ldr ip, [r3, #48] + cmp ip, #0 + beq .L4920 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + mov r3, #0 + ldrh r4, [ip, #10] +.L4917: + cmp r3, r4 + bcc .L4919 + mvn r0, #0 + pop {r4, r5, r6, pc} +.L4919: + add lr, ip, r3, lsl #3 + ldrh r5, [lr, #16] + cmp r5, r0 + bne .L4918 + ldrh r4, [lr, #20] + mov r0, r1 + ldrh r1, [lr, #18] + cmp r4, r2 + movcs r4, r2 + add r1, r1, #1024 + mov r2, r4 + add r1, ip, r1 + bl memcpy + mov r0, r4 + pop {r4, r5, r6, pc} +.L4918: + add r3, r3, #1 + b .L4917 +.L4920: + mvn r0, #0 + bx lr +.L4926: + .align 2 +.L4925: + .word .LANCHOR3 + .fnend + .size rk_ftl_vendor_read, .-rk_ftl_vendor_read + .align 2 + .global rk_ftl_vendor_write + .syntax unified + .arm + .fpu softvfp + .type rk_ftl_vendor_write, %function +rk_ftl_vendor_write: + .fnstart + @ args = 0, pretend = 0, frame = 24 + @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L4948 + push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .save {r4, r5, r6, r7, r8, r9, r10, fp, lr} + .pad #28 + sub sp, sp, #28 + ldr r4, [r3, #48] + cmp r4, #0 + beq .L4942 + mov r8, r2 + ldrh r2, [r4, #10] + add r6, r8, #63 + ldrh r3, [r4, #8] + mov fp, r1 + bic r6, r6, #63 + mov r7, #0 + str r3, [sp, #4] +.L4929: + cmp r7, r2 + bcc .L4937 + ldrh r1, [r4, #14] + cmp r6, r1 + bhi .L4942 + add r3, r4, r2, lsl #3 + uxth r6, r6 + strh r0, [r3, #16] @ movhi + ldrh r2, [r4, #12] + strh r8, [r3, #20] @ movhi + strh r2, [r3, #18] @ movhi + add r2, r2, r6 + sub r6, r1, r6 + strh r2, [r4, #12] @ movhi + strh r6, [r4, #14] @ movhi + mov r2, r8 + ldrh r0, [r3, #18] + mov r1, fp + add r0, r0, #1024 + add r0, r4, r0 + bl memcpy + ldrh r3, [r4, #10] + add r3, r3, #1 + strh r3, [r4, #10] @ movhi + b .L4947 +.L4937: + add r5, r4, r7, lsl #3 + ldrh r3, [r5, #16] + cmp r3, r0 + str r3, [sp, #8] + bne .L4930 + ldrh r1, [r5, #20] + add r3, r4, #1024 + add r1, r1, #63 + bic r1, r1, #63 + cmp r8, r1 + str r1, [sp, #12] + bls .L4931 + ldrh r1, [r4, #14] + cmp r6, r1 + subls r2, r2, #1 + ldrhls r10, [r5, #18] + strls r2, [sp, #16] + bls .L4932 +.L4942: + mvn r0, #0 + b .L4927 +.L4933: + ldrh r9, [r5, #20] + add r0, r3, r10 + ldrh r2, [r5, #16] + add r7, r7, #1 + ldrh r1, [r5, #18] + strh r9, [r5, #12] @ movhi + add r9, r9, #63 + bic r9, r9, #63 + strh r2, [r5, #8] @ movhi + strh r10, [r5, #10] @ movhi + add r1, r3, r1 + mov r2, r9 + str r3, [sp, #20] + bl memcpy + ldr r3, [sp, #20] + add r10, r10, r9 +.L4932: + ldr r2, [sp, #16] + add r5, r5, #8 + cmp r7, r2 + bcc .L4933 + ldrh r2, [sp, #8] + add r7, r4, r7, lsl #3 + uxth r5, r10 + uxtah r0, r3, r10 + strh r8, [r7, #20] @ movhi + strh r2, [r7, #16] @ movhi + mov r1, fp + strh r5, [r7, #18] @ movhi + mov r2, r8 + bl memcpy + uxth r3, r6 + ldrh r6, [r4, #14] + add r5, r5, r3 + sub r6, r6, r3 + ldr r3, [sp, #12] + strh r5, [r4, #12] @ movhi + add r6, r6, r3 + strh r6, [r4, #14] @ movhi +.L4947: + ldr r3, [r4, #4] + add r2, r4, #61440 + mov r1, #128 + add r3, r3, #1 + str r3, [r4, #4] + str r3, [r2, #4092] + mov r2, r4 + ldrh r3, [r4, #8] + add r3, r3, #1 + uxth r3, r3 + cmp r3, #1 + movhi r3, #0 + strh r3, [r4, #8] @ movhi + ldr r3, [sp, #4] + lsl r0, r3, #7 + bl FlashBootVendorWrite + mov r0, #0 +.L4927: + add sp, sp, #28 + @ sp needed + pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} +.L4931: + ldrh r0, [r5, #18] + mov r2, r8 + mov r1, fp + add r0, r3, r0 + bl memcpy + strh r8, [r5, #20] @ movhi + b .L4947 +.L4930: + add r7, r7, #1 + b .L4929 +.L4949: + .align 2 +.L4948: + .word .LANCHOR3 + .fnend + .size rk_ftl_vendor_write, .-rk_ftl_vendor_write + .align 2 + .global rk_ftl_vendor_storage_ioctl + .syntax unified + .arm + .fpu softvfp + .type rk_ftl_vendor_storage_ioctl, %function +rk_ftl_vendor_storage_ioctl: + .fnstart + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 0, uses_anonymous_args = 0 + push {r4, r5, r6, lr} + .save {r4, r5, r6, lr} + mov r0, #9216 + mov r5, r2 + mov r6, r1 + bl ftl_malloc + subs r4, r0, #0 + mvneq r5, #0 + beq .L4950 + ldr r3, .L4966 + cmp r6, r3 + beq .L4953 + add r3, r3, #1 + cmp r6, r3 + beq .L4954 +.L4964: + mvn r5, #13 + b .L4952 +.L4953: + mov r2, #8 + mov r1, r5 + bl rk_copy_from_user + cmp r0, #0 + bne .L4964 + ldr r2, [r4] + ldr r3, .L4966+4 + cmp r2, r3 + beq .L4956 +.L4957: + mvn r5, #0 +.L4952: + mov r0, r4 + bl kfree +.L4950: + mov r0, r5 + pop {r4, r5, r6, pc} +.L4956: + ldrh r2, [r4, #6] + add r1, r4, #8 + ldrh r0, [r4, #4] + bl rk_ftl_vendor_read + cmn r0, #1 + beq .L4957 + uxth r2, r0 + strh r0, [r4, #6] @ movhi + mov r1, r4 + mov r0, r5 + add r2, r2, #8 + bl rk_copy_to_user + subs r5, r0, #0 + beq .L4952 + b .L4964 +.L4954: + mov r2, #8 + mov r1, r5 + bl rk_copy_from_user + cmp r0, #0 + bne .L4964 + ldr r2, [r4] + ldr r3, .L4966+4 + cmp r2, r3 + bne .L4957 + ldrh r2, [r4, #6] + movw r3, #4087 + cmp r2, r3 + bhi .L4957 + add r2, r2, #8 + mov r1, r5 + mov r0, r4 + bl rk_copy_from_user + cmp r0, #0 + bne .L4964 + ldrh r2, [r4, #6] + add r1, r4, #8 + ldrh r0, [r4, #4] + bl rk_ftl_vendor_write + mov r5, r0 + b .L4952 +.L4967: + .align 2 +.L4966: + .word 1074034177 + .word 1448232273 + .fnend + .size rk_ftl_vendor_storage_ioctl, .-rk_ftl_vendor_storage_ioctl + .global SecureBootUnlockTryCount + .global SecureBootCheckOK + .global SecureBootEn + .global gpVendor1Info + .global gpVendor0Info + .global g_idb_buffer + .global gSnSectorData + .global gpDrmKeyInfo + .global gpBootConfig + .global ftl_dma32_buffer_size + .global ftl_dma32_buffer + .global gLoaderBootInfo + .global RK29_NANDC1_REG_BASE + .global RK29_NANDC_REG_BASE + .global gp_ftl_api + .global rk_zftl_enable + .global g_pm_spare + .global pm_first_write + .global pm_force_gc + .global pm_gc_enable + .global pm_last_load_ram_id + .global pm_last_update_ram_id + .global pm_ram_info + .global sblk_gc_write_completed_queue_head + .global sblk_read_completed_queue_head + .global sblk_write_completed_queue_head + .global sblk_queue_head + .global slc_cache_sblk + .global xlc_data_sblk + .global slc_data_sblk + .global free_mix_sblk + .global free_xlc_sblk + .global free_slc_sblk + .global gp_data_xlc_data_head + .global gp_data_slc_data_head + .global gp_data_slc_cache_head + .global gp_free_mix_head + .global gp_free_xlc_head + .global gp_free_slc_head + .global gp_sblk_list_tbl + .global zftl_print_list_count + .global ftl_ext_info_first_write + .global ftl_sys_info_first_write + .global ftl_low_format_cur_blk + .global ftl_power_lost_flag + .global ftl_vpn_update_count + .global ftl_sblk_update_list_offset + .global ftl_sblk_update_list + .global ftl_sblk_vpn_update_id + .global ftl_sblk_lpa_tbl + .global ftl_sblk_vpn + .global gp_ftl_ext_info + .global gp_ftl_info + .global gp_blk_info + .global ftl_tmp_buffer + .global ftl_ext_info_data_buffer + .global ftl_info_data_buffer + .global ftl_tmp_spare + .global ftl_info_spare + .global g_ftl_info_blk + .global tlc_b05a_prog_tbl + .global tlc_prog_order + .global gc_des_ppa_tbl + .global gc_valid_page_ppa + .global gc_page_buf_id + .global gc_pre_ppa_tbl + .global gc_lpa_tbl + .global g_gc_info + .global gc_xlc_search_index + .global gc_xlc_data_index + .global gc_slc_cache_index + .global gc_slc_data_index + .global gc_free_slc_sblk_th + .global gc_slc_mode_vpn_th + .global gc_slc_mode_slc_vpn_th + .global gc_slc_mode_tlc_vpn_th + .global gc_tlc_mode_tlc_vpn_th + .global gc_tlc_mode_slc_vpn_th + .global gc_state + .global gc_mode + .global p_read_ahead_ext_buf + .global discard_sector_count + .global read_ahead_lpa + .global _ftl_gc_tag_page_num + .global read_buf_count + .global read_buf_head + .global write_commit_count + .global write_commit_head + .global write_buf_count + .global write_buf_head + .global ftl_flush_jiffies + .global lpa_hash + .global lpa_hash_index + .global _c_slc_to_xlc_ec_ratio + .global _c_mix_max_xlc_ec_count + .global _c_mix_max_slc_ec_count + .global _c_swl_xlc_gc_th + .global _c_swl_slc_gc_th + .global _gc_after_discard_en + .global _last_write_time + .global _last_read_time + .global _min_slc_super_block + .global _max_xlc_super_block + .global _c_max_pm_sblk + .global _c_ftl_pm_page_num + .global _c_totle_log_page + .global _c_totle_data_density + .global _c_user_data_density + .global _c_totle_phy_density + .global _c_ftl_block_addr_log2 + .global _c_ftl_block_align_addr + .global _c_ftl_byte_pre_page + .global _c_ftl_nand_blks_per_die + .global _c_ftl_page_pre_slc_blk + .global _c_ftl_page_pre_blk + .global _c_ftl_blk_pre_plane + .global _c_ftl_nand_planes_num + .global _c_ftl_planes_per_die + .global _c_ftl_sec_per_page + .global _c_ftl_nand_die_num + .global _c_ftl_nand_type + .global zftl_debug + .global g_flash_blk_info + .global gp_flash_info + .global p_free_buf_head + .global free_buf_count + .global g_buf + .global nandc_ecc_sts + .global g_nandc_v6_master_info + .global nandc_randomizer_en + .global nandc_hw_seed + .global fill_spare_size + .global g_nandc_ecc_bits + .global g_nandc_tran_timeout + .global g_nandc_ver + .global gp_nandc + .global hy_f26_ref_value + .global sd15_tlc_rr + .global sd15_slc_rr + .global g_nand_para_info + .global gp_nand_para_info + .global g_nand_opt_para + .global g_msb_page_tbl + .global g_lsb_page_tbl + .global g_die_addr + .global g_die_cs_idx + .global IDByte + .global flash_read_retry + .global _c_ftl_cs_bits + .global g_maxRetryCount + .global g_maxRegNum + .global g_retryMode + .global g_flash_toggle_mode_en + .global g_flash_ymtc_3d_tlc_flag + .global g_flash_micron_3d_tlc_b16a + .global g_flash_micron_3d_tlc_b05a + .global g_flash_micron_3d_tlc_flag + .global g_flash_3d_mlc_flag + .global g_flash_3d_tlc_flag + .global g_flash_multi_page_prog_en + .global g_flash_multi_page_read_en + .global g_flash_interface_mode + .global g_idb_ecc_bits + .global g_idb_slc_mode_enable + .global g_one_pass_program + .global g_slc_mode_addr2 + .global g_slc_mode_enable + .global g_flash_cur_mode + .global g_flash_six_addr + .global g_flash_slc_mode + .global g_slc_page_num + .global g_totle_phy_block + .global g_block_align_addr + .global g_flash_reversd_blks + .global g_nand_max_die + .global g_flash_tmp_spare_buffer + .global g_flash_tmp_page_buffer + .global g_flash_sys_spare_buffer + .global g_flash_spare_buffer + .global g_flash_page_buffer + .section .rodata + .align 2 + .set .LANCHOR1,. + 0 + .type __func__.42945, %object + .size __func__.42945, 18 +__func__.42945: + .ascii "_list_remove_node\000" + .type __func__.42970, %object + .size __func__.42970, 23 +__func__.42970: + .ascii "_list_update_data_list\000" + .type toshiba_A19ref_value, %object + .size toshiba_A19ref_value, 45 +toshiba_A19ref_value: + .byte 4 + .byte 5 + .byte 6 + .byte 7 + .byte 13 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 4 + .byte 4 + .byte 124 + .byte 126 + .byte 0 + .byte 0 + .byte 124 + .byte 120 + .byte 120 + .byte 0 + .byte 124 + .byte 118 + .byte 116 + .byte 114 + .byte 0 + .byte 8 + .byte 8 + .byte 0 + .byte 0 + .byte 0 + .byte 11 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.byte -8 + .byte -8 + .byte -16 + .byte -8 + .byte -8 + .byte -8 + .byte -8 + .byte -24 + .byte 0 + .byte 0 + .byte 0 + .byte -8 + .byte -16 + .byte -32 + .byte 0 + .byte 8 + .byte -8 + .byte 8 + .byte 8 + .byte 0 + .byte 0 + .byte -16 + .byte -8 + .byte -8 + .byte -8 + .byte 0 + .byte -16 + .byte -24 + .byte -16 + .byte 8 + .byte 8 + .byte -8 + .byte -16 + .byte -16 + .byte 0 + .byte 8 + .byte 8 + .byte 8 + .byte 8 + .byte -8 + .byte -8 + .byte -24 + .byte 0 + .byte -16 + .byte 0 + .byte -8 + .byte -16 + .byte -8 + .byte -8 + .byte 0 + .byte 8 + .byte 0 + .byte 0 + .byte -8 + .byte 0 + .byte -24 + .byte -8 + .byte 0 + .byte 0 + .byte -8 + .byte -24 + .byte -8 + .byte 8 + .byte -8 + .byte 0 + .byte -8 + .byte 8 + .byte -16 + .byte -8 + .byte -8 + .byte -8 + .byte 8 + .byte 8 + .byte 0 + .byte 0 + .byte -8 + .byte -8 + .byte 8 + .byte -8 + .byte -8 + .byte 0 + .byte 0 + .byte -8 + .byte -16 + .byte -16 + .byte -8 + .byte 0 + .byte 0 + .byte -8 + .byte 0 + .byte -16 + .byte 8 + .byte 0 + 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.byte 0 + .byte -8 + .byte 0 + .byte -16 + .byte 0 + .byte -16 + .byte 0 + .byte 0 + .byte -16 + .byte 0 + .byte -24 + .byte 0 + .byte -24 + .byte 0 + .byte 0 + .byte -24 + .byte 0 + .byte -24 + .byte 0 + .byte -24 + .byte 0 + .byte 0 + .byte -24 + .byte 0 + .byte -16 + .byte 0 + .byte -16 + .byte 0 + .byte 0 + .byte -24 + .byte 0 + .byte -32 + .byte 0 + .byte -32 + .byte 0 + .type sd15_slc_rr, %object + .size sd15_slc_rr, 25 +sd15_slc_rr: + .byte 0 + .byte 8 + .byte -8 + .byte 16 + .byte -16 + .byte 24 + .byte -24 + .byte 32 + .byte -32 + .byte 32 + .byte -40 + .byte 48 + .byte -48 + .byte 56 + .byte -56 + .byte 64 + .byte -64 + .byte 72 + .byte -72 + .byte 80 + .byte -80 + .byte 88 + .byte 96 + .byte 104 + .byte 112 + .type hy_f26_ref_value, %object + .size hy_f26_ref_value, 28 +hy_f26_ref_value: + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 6 + .byte 10 + .byte 6 + .byte 0 + .byte -3 + .byte -7 + .byte -8 + .byte 0 + .byte -6 + .byte -13 + .byte -15 + .byte 0 + .byte -11 + .byte -20 + .byte -23 + .byte 0 + .byte 0 + .byte -26 + .byte -30 + .byte 0 + .byte 0 + .byte -32 + .byte -37 + .type zftl_nand_flash_para_tbl, %object + .size zftl_nand_flash_para_tbl, 1568 +zftl_nand_flash_para_tbl: + .byte 6 + .byte -104 + .byte 58 + .byte -104 + .byte -77 + .byte 118 + .byte 114 + .byte 1 + .byte 1 + .byte 32 + .short 768 + .byte 3 + .byte 2 + .short 758 + .short 5593 + .byte 0 + .byte 37 + .byte 60 + .byte 32 + .byte 3 + .byte 1 + .byte 4 + .byte 0 + .short 256 + .byte 1 + .byte -94 + .byte 0 + .byte 0 + .byte 6 + .byte -104 + .byte 60 + .byte -104 + .byte -77 + .byte 118 + .byte 114 + .byte 1 + .byte 1 + .byte 32 + .short 768 + .byte 3 + .byte 2 + .short 1478 + .short 5593 + .byte 0 + .byte 37 + .byte 60 + .byte 32 + .byte 3 + .byte 1 + .byte 4 + .byte 0 + .short 256 + .byte 1 + .byte -94 + .byte 0 + .byte 0 + .byte 6 + .byte -104 + .byte 58 + .byte -104 + .byte -93 + .byte 118 + .byte 81 + .byte 1 + .byte 1 + .byte 32 + .short 384 + .byte 3 + .byte 2 + .short 1446 + .short 1497 + .byte 0 + .byte 36 + .byte 60 + .byte 32 + .byte 3 + .byte 1 + .byte 4 + .byte 0 + .short 256 + .byte 1 + .byte -94 + .byte 0 + .byte 0 + .byte 6 + .byte -104 + .byte -34 + .byte -108 + .byte -109 + .byte 118 + .byte 81 + .byte 1 + .byte 1 + .byte 32 + .short 256 + .byte 2 + .byte 2 + .short 1074 + .short 17881 + .byte 2 + .byte 35 + .byte 40 + .byte 32 + .byte 3 + .byte 1 + .byte 4 + .byte 0 + .short 256 + .byte 1 + .byte -94 + .byte 0 + .byte 0 + .byte 6 + .byte -104 + .byte -34 + .byte -124 + .byte -109 + .byte 114 + .byte 87 + .byte 1 + .byte 1 + .byte 32 + .short 256 + .byte 2 + .byte 1 + .short 2092 + .short 17857 + .byte 2 + .byte 33 + .byte 40 + .byte 32 + .byte 3 + .byte 1 + .byte 1 + .byte 0 + .short 256 + .byte 1 + .byte -94 + .byte 0 + .byte 0 + .byte 6 + .byte -104 + .byte 58 + .byte -108 + .byte -109 + .byte 118 + .byte 81 + .byte 1 + .byte 1 + .byte 32 + .short 256 + .byte 2 + .byte 2 + .short 2106 + .short 17881 + .byte 2 + .byte 35 + .byte 40 + .byte 32 + .byte 3 + .byte 1 + .byte 4 + .byte 0 + .short 256 + .byte 1 + .byte -94 + .byte 0 + .byte 0 + .byte 6 + .byte -104 + .byte -41 + .byte -124 + .byte -109 + .byte 114 + .byte 81 + .byte 1 + .byte 1 + .byte 32 + .short 256 + .byte 2 + .byte 1 + .short 1056 + .short 17857 + .byte 2 + .byte 35 + .byte 40 + .byte 32 + .byte 3 + .byte 1 + .byte 4 + .byte 0 + .short 256 + .byte 1 + .byte -94 + .byte 0 + .byte 0 + .byte 6 + .byte -104 + .byte -41 + .byte -124 + .byte -109 + .byte 114 + .byte 80 + .byte 1 + .byte 1 + .byte 32 + .short 256 + .byte 2 + .byte 1 + .short 1060 + .short 17857 + .byte 2 + .byte 34 + .byte 40 + .byte 32 + .byte 3 + .byte 1 + .byte 4 + .byte 0 + .short 256 + .byte 1 + .byte -94 + .byte 0 + .byte 0 + .byte 6 + .byte -104 + .byte -34 + .byte -108 + .byte -109 + .byte 118 + .byte 80 + .byte 1 + .byte 1 + .byte 32 + .short 256 + .byte 2 + .byte 2 + .short 1066 + .short 17881 + .byte 2 + .byte 34 + .byte 40 + .byte 32 + .byte 3 + .byte 1 + .byte 1 + .byte 0 + .short 256 + .byte 1 + .byte -94 + .byte 0 + .byte 0 + .byte 6 + .byte -104 + .byte -41 + .byte -124 + .byte -109 + .byte 114 + .byte 87 + .byte 1 + .byte 1 + .byte 32 + .short 256 + .byte 2 + .byte 1 + .short 1060 + .short 17857 + .byte 2 + .byte 33 + .byte 40 + .byte 32 + .byte 3 + .byte 1 + .byte 1 + .byte 0 + .short 256 + .byte 1 + .byte -94 + .byte 0 + .byte 0 + .byte 6 + .byte -104 + .byte -34 + .byte -108 + .byte -109 + .byte 118 + .byte 87 + .byte 1 + .byte 1 + .byte 32 + .short 256 + .byte 2 + .byte 2 + .short 1058 + .short 17881 + .byte 2 + .byte 33 + .byte 40 + .byte 32 + .byte 3 + .byte 1 + .byte 1 + .byte 0 + .short 256 + .byte 1 + .byte -94 + .byte 0 + .byte 0 + .byte 6 + .byte -104 + .byte -34 + .byte -108 + .byte -109 + .byte 118 + .byte -47 + .byte 1 + .byte 1 + .byte 32 + .short 256 + .byte 2 + .byte 2 + .short 1074 + .short 17881 + .byte 2 + .byte 35 + .byte 40 + .byte 32 + .byte 3 + .byte 1 + .byte 4 + .byte 0 + .short 256 + .byte 1 + .byte -94 + .byte 0 + .byte 0 + .byte 6 + .byte 69 + .byte 58 + .byte -108 + .byte -109 + .byte 118 + .byte 81 + .byte 8 + .byte 1 + .byte 32 + .short 256 + .byte 2 + .byte 2 + .short 2106 + .short 17881 + .byte 2 + .byte 68 + .byte 40 + .byte 32 + .byte 3 + .byte 1 + .byte 4 + .byte 0 + .short 256 + .byte 1 + .byte -94 + .byte 0 + .byte 0 + .byte 6 + .byte 69 + .byte -34 + .byte -108 + .byte -109 + .byte 118 + .byte 81 + .byte 8 + .byte 1 + .byte 32 + .short 256 + .byte 2 + .byte 2 + .short 1074 + .short 17881 + .byte 2 + .byte 68 + .byte 40 + .byte 32 + .byte 3 + .byte 1 + .byte 4 + .byte 0 + .short 256 + .byte 1 + .byte -94 + .byte 0 + .byte 0 + .byte 6 + .byte 69 + .byte -34 + .byte -108 + .byte -109 + .byte 118 + .byte 87 + .byte 8 + .byte 1 + .byte 32 + .short 256 + .byte 2 + .byte 2 + .short 1058 + .short 17881 + .byte 2 + .byte 66 + .byte 40 + .byte 32 + .byte 3 + .byte 1 + .byte 4 + .byte 0 + .short 256 + .byte 1 + .byte -94 + .byte 0 + .byte 0 + .byte 6 + .byte 69 + .byte -34 + .byte -108 + .byte -109 + .byte 118 + .byte 80 + .byte 8 + .byte 1 + .byte 32 + .short 256 + .byte 2 + .byte 2 + .short 1066 + .short 17881 + .byte 2 + .byte 67 + .byte 40 + .byte 32 + .byte 3 + .byte 1 + .byte 1 + .byte 0 + .short 256 + .byte 1 + .byte -94 + .byte 0 + .byte 0 + .byte 6 + .byte 69 + .byte -41 + .byte -124 + .byte -109 + .byte 114 + .byte 87 + .byte 8 + .byte 1 + .byte 32 + .short 256 + .byte 2 + .byte 1 + .short 1060 + .short 17857 + .byte 2 + .byte 66 + .byte 40 + .byte 32 + .byte 2 + .byte 1 + .byte 1 + .byte 0 + .short 256 + .byte 1 + .byte -94 + .byte 0 + .byte 0 + .byte 5 + .byte 44 + .byte 100 + .byte 68 + .byte 50 + .byte -91 + .byte 0 + .byte 4 + .byte 1 + .byte 32 + .short 512 + .byte 2 + .byte 1 + .short 1048 + .short 9671 + .byte 5 + .byte 19 + .byte 70 + .byte 32 + .byte 1 + .byte 0 + .byte 4 + .byte 0 + .short 512 + .byte 1 + .byte -38 + .byte -33 + .byte 0 + .byte 5 + .byte 44 + .byte 100 + .byte 100 + .byte 86 + .byte -91 + .byte 0 + .byte 4 + .byte 1 + .byte 24 + .short 512 + .byte 2 + .byte 2 + .short 700 + .short 479 + .byte 4 + .byte 18 + .byte 60 + .byte 32 + .byte 1 + .byte 0 + .byte 1 + .byte 0 + .short 512 + .byte 3 + .byte 0 + .byte 0 + .byte 0 + .byte 5 + .byte 44 + .byte 68 + .byte 68 + .byte 75 + .byte -87 + .byte 0 + .byte 4 + .byte 1 + .byte 16 + .short 256 + .byte 2 + .byte 2 + .short 1064 + .short 479 + .byte 3 + .byte 17 + .byte 40 + .byte 32 + .byte 1 + .byte 0 + .byte 1 + .byte 0 + .short 256 + .byte 3 + .byte 0 + .byte 0 + .byte 0 + .byte 5 + .byte 44 + .byte -124 + .byte 100 + .byte 84 + .byte -87 + .byte 0 + .byte 4 + .byte 1 + .byte 32 + .short 512 + .byte 2 + .byte 2 + .short 1024 + .short 479 + .byte 4 + .byte 18 + .byte 60 + .byte 32 + .byte 1 + .byte 0 + .byte 1 + .byte 0 + .short 512 + .byte 0 + .byte 0 + .byte 0 + .byte 1 + .byte 5 + .byte 44 + .byte 100 + .byte 100 + .byte 84 + .byte -92 + .byte 0 + .byte 4 + .byte 1 + .byte 32 + .short 512 + .byte 2 + .byte 1 + .short 1024 + .short 455 + .byte 4 + .byte 18 + .byte 60 + .byte 32 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.short 442 + .short 435 + .short 457 + .short 450 + .short 443 + .short 465 + .short 458 + .short 451 + .short 473 + .short 466 + .short 459 + .short 481 + .short 474 + .short 467 + .short 489 + .short 482 + .short 475 + .short 497 + .short 490 + .short 483 + .short 505 + .short 498 + .short 491 + .short 513 + .short 506 + .short 499 + .short 521 + .short 514 + .short 507 + .short 529 + .short 522 + .short 515 + .short 537 + .short 530 + .short 523 + .short 545 + .short 538 + .short 531 + .short 553 + .short 546 + .short 539 + .short 561 + .short 554 + .short 547 + .short 569 + .short 562 + .short 555 + .short 577 + .short 570 + .short 563 + .short 585 + .short 578 + .short 571 + .short 593 + .short 586 + .short 579 + .short 601 + .short 594 + .short 587 + .short 609 + .short 602 + .short 595 + .short 617 + .short 610 + .short 603 + .short 625 + .short 618 + .short 611 + .short 633 + .short 626 + .short 619 + .short 641 + .short 634 + .short 627 + .short 649 + .short 642 + .short 635 + .short 657 + .short 650 + .short 643 + .short 665 + .short 658 + .short 651 + .short 673 + .short 666 + .short 659 + .short 681 + .short 674 + .short 667 + .short 689 + .short 682 + .short 675 + .short 697 + .short 690 + .short 683 + .short 705 + .short 698 + .short 691 + .short 713 + .short 706 + .short 699 + .short 721 + .short 714 + .short 707 + .short 729 + .short 722 + .short 715 + .short 737 + .short 730 + .short 723 + .short 745 + .short 738 + .short 731 + .short 753 + .short 746 + .short 739 + .short 761 + .short 754 + .short 747 + .short 769 + .short 762 + .short 755 + .short 777 + .short 770 + .short 763 + .short 785 + .short 778 + .short 771 + .short 793 + .short 786 + .short 779 + .short 801 + .short 794 + .short 787 + .short 809 + .short 802 + .short 795 + .short 817 + .short 810 + .short 803 + .short 825 + .short 818 + .short 811 + .short 833 + .short 826 + .short 819 + .short 841 + .short 834 + .short 827 + .short 849 + .short 842 + .short 835 + .short 857 + .short 850 + .short 843 + .short 865 + .short 858 + .short 851 + .short 873 + .short 866 + .short 859 + .short 881 + .short 874 + .short 867 + .short 889 + .short 882 + .short 875 + .short 897 + .short 890 + .short 883 + .short 905 + .short 898 + .short 891 + .short 913 + .short 906 + .short 899 + .short 921 + .short 914 + .short 907 + .short 929 + .short 922 + .short 915 + .short 937 + .short 930 + .short 923 + .short 945 + .short 938 + .short 931 + .short 953 + .short 946 + .short 939 + .short 961 + .short 954 + .short 947 + .short 969 + .short 962 + .short 955 + .short 977 + .short 970 + .short 963 + .short 985 + .short 978 + .short 971 + .short 993 + .short 986 + .short 979 + .short 1001 + .short 994 + .short 987 + .short 1009 + .short 1002 + .short 995 + .short 1017 + .short 1010 + .short 1003 + .short 1018 + .short 1011 + .short 1019 + .bss + .align 6 + .set .LANCHOR0,. + 0 + .set .LANCHOR3,. + 8184 + .type g_flash_slc_mode, %object + .size g_flash_slc_mode, 1 +g_flash_slc_mode: + .space 1 + .type g_slc_mode_addr2, %object + .size g_slc_mode_addr2, 1 +g_slc_mode_addr2: + .space 1 + .type g_block_align_addr, %object + .size g_block_align_addr, 2 +g_block_align_addr: + .space 2 + .type g_lsb_page_tbl, %object + .size g_lsb_page_tbl, 1024 +g_lsb_page_tbl: + .space 1024 + .type g_nandc_ver, %object + .size g_nandc_ver, 1 +g_nandc_ver: + .space 1 + .space 3 + .type _c_user_data_density, %object + .size _c_user_data_density, 4 +_c_user_data_density: + .space 4 + .type gp_sblk_list_tbl, %object + .size gp_sblk_list_tbl, 4 +gp_sblk_list_tbl: + .space 4 + .type gp_flash_info, %object + .size gp_flash_info, 4 +gp_flash_info: + .space 4 + .type gp_nandc, %object + .size gp_nandc, 4 +gp_nandc: + .space 4 + .type NANDC_FMCTL, %object + .size NANDC_FMCTL, 4 +NANDC_FMCTL: + .space 4 + .type NANDC_FMWAIT, %object + .size NANDC_FMWAIT, 4 +NANDC_FMWAIT: + .space 4 + .type NANDC_FLCTL, %object + .size NANDC_FLCTL, 4 +NANDC_FLCTL: + .space 4 + .type NANDC_BCHCTL, %object + .size NANDC_BCHCTL, 4 +NANDC_BCHCTL: + .space 4 + .type NANDC_DLL_CTL_REG0, %object + .size NANDC_DLL_CTL_REG0, 4 +NANDC_DLL_CTL_REG0: + .space 4 + .type NANDC_DLL_CTL_REG1, %object + .size NANDC_DLL_CTL_REG1, 4 +NANDC_DLL_CTL_REG1: + .space 4 + .type NANDC_RANDMZ_CFG, %object + .size NANDC_RANDMZ_CFG, 4 +NANDC_RANDMZ_CFG: + .space 4 + .type NANDC_FMWAIT_SYN, %object + .size NANDC_FMWAIT_SYN, 4 +NANDC_FMWAIT_SYN: + .space 4 + .type _c_ftl_blk_pre_plane, %object + .size _c_ftl_blk_pre_plane, 2 +_c_ftl_blk_pre_plane: + .space 2 + .space 2 + .type gp_blk_info, %object + .size gp_blk_info, 4 +gp_blk_info: + .space 4 + .type _c_slc_to_xlc_ec_ratio, %object + .size _c_slc_to_xlc_ec_ratio, 2 +_c_slc_to_xlc_ec_ratio: + .space 2 + .space 2 + .type ftl_sblk_vpn, %object + .size ftl_sblk_vpn, 4 +ftl_sblk_vpn: + .space 4 + .type gp_ftl_ext_info, %object + .size gp_ftl_ext_info, 4 +gp_ftl_ext_info: + .space 4 + .type g_retryMode, %object + .size g_retryMode, 1 +g_retryMode: + .space 1 + .type g_maxRegNum, %object + .size g_maxRegNum, 1 +g_maxRegNum: + .space 1 + .space 2 + .type gp_nand_para_info, %object + .size gp_nand_para_info, 4 +gp_nand_para_info: + .space 4 + .type g_idb_ecc_bits, %object + .size g_idb_ecc_bits, 1 +g_idb_ecc_bits: + .space 1 + .type g_nand_max_die, %object + .size g_nand_max_die, 1 +g_nand_max_die: + .space 1 + .type g_idb_slc_mode_enable, %object + .size g_idb_slc_mode_enable, 1 +g_idb_slc_mode_enable: + .space 1 + .type g_nand_opt_para, %object + .size g_nand_opt_para, 32 +g_nand_opt_para: + .space 32 + .type g_flash_toggle_mode_en, %object + .size g_flash_toggle_mode_en, 1 +g_flash_toggle_mode_en: + .space 1 + .type g_die_cs_idx, %object + .size g_die_cs_idx, 8 +g_die_cs_idx: + .space 8 + .type g_flash_six_addr, %object + .size g_flash_six_addr, 1 +g_flash_six_addr: + .space 1 + .type _c_ftl_cs_bits, %object + .size _c_ftl_cs_bits, 1 +_c_ftl_cs_bits: + .space 1 + .type g_flash_cur_mode, %object + .size g_flash_cur_mode, 4 +g_flash_cur_mode: + .space 4 + .type g_flash_micron_3d_tlc_flag, %object + .size g_flash_micron_3d_tlc_flag, 1 +g_flash_micron_3d_tlc_flag: + .space 1 + .type g_flash_ymtc_3d_tlc_flag, %object + .size g_flash_ymtc_3d_tlc_flag, 1 +g_flash_ymtc_3d_tlc_flag: + .space 1 + .type IDByte, %object + .size IDByte, 32 +IDByte: + .space 32 + .type g_flash_interface_mode, %object + .size g_flash_interface_mode, 1 +g_flash_interface_mode: + .space 1 + .type g_nandc_ecc_bits, %object + .size g_nandc_ecc_bits, 1 +g_nandc_ecc_bits: + .space 1 + .type g_flash_multi_page_prog_en, %object + .size g_flash_multi_page_prog_en, 1 +g_flash_multi_page_prog_en: + .space 1 + .type nandc_hw_seed, %object + .size nandc_hw_seed, 1 +nandc_hw_seed: + .space 1 + .type nandc_randomizer_en, %object + .size nandc_randomizer_en, 1 +nandc_randomizer_en: + .space 1 + .space 3 + .type g_nandc_v6_master_info, %object + .size g_nandc_v6_master_info, 28 +g_nandc_v6_master_info: + .space 28 + .type fill_spare_size, %object + .size fill_spare_size, 2 +fill_spare_size: + .space 2 + .space 2 + .type g_buf, %object + .size g_buf, 1536 +g_buf: + .space 1536 + .type p_free_buf_head, %object + .size p_free_buf_head, 1 +p_free_buf_head: + .space 1 + .type free_buf_count, %object + .size free_buf_count, 1 +free_buf_count: + .space 1 + .type sblk_queue_head, %object + .size sblk_queue_head, 1 +sblk_queue_head: + .space 1 + .type sblk_read_completed_queue_head, %object + .size sblk_read_completed_queue_head, 1 +sblk_read_completed_queue_head: + .space 1 + .type sblk_gc_write_completed_queue_head, %object + .size sblk_gc_write_completed_queue_head, 1 +sblk_gc_write_completed_queue_head: + .space 1 + .type sblk_write_completed_queue_head, %object + .size sblk_write_completed_queue_head, 1 +sblk_write_completed_queue_head: + .space 1 + .space 2 + .type _c_totle_phy_density, %object + .size _c_totle_phy_density, 4 +_c_totle_phy_density: + .space 4 + .type _c_totle_log_page, %object + .size _c_totle_log_page, 4 +_c_totle_log_page: + .space 4 + .type free_slc_sblk, %object + .size free_slc_sblk, 2 +free_slc_sblk: + .space 2 + .type free_xlc_sblk, %object + .size free_xlc_sblk, 2 +free_xlc_sblk: + .space 2 + .type free_mix_sblk, %object + .size free_mix_sblk, 2 +free_mix_sblk: + .space 2 + .type slc_data_sblk, %object + .size slc_data_sblk, 2 +slc_data_sblk: + .space 2 + .type slc_cache_sblk, %object + .size slc_cache_sblk, 2 +slc_cache_sblk: + .space 2 + .type xlc_data_sblk, %object + .size xlc_data_sblk, 2 +xlc_data_sblk: + .space 2 + .type write_buf_count, %object + .size write_buf_count, 1 +write_buf_count: + .space 1 + .type write_commit_count, %object + .size write_commit_count, 1 +write_commit_count: + .space 1 + .space 2 + .type gp_ftl_info, %object + .size gp_ftl_info, 4 +gp_ftl_info: + .space 4 + .type gc_free_slc_sblk_th, %object + .size gc_free_slc_sblk_th, 2 +gc_free_slc_sblk_th: + .space 2 + .type gc_tlc_mode_slc_vpn_th, %object + .size gc_tlc_mode_slc_vpn_th, 2 +gc_tlc_mode_slc_vpn_th: + .space 2 + .type gc_tlc_mode_tlc_vpn_th, %object + .size gc_tlc_mode_tlc_vpn_th, 2 +gc_tlc_mode_tlc_vpn_th: + .space 2 + .space 2 + .type _gc_after_discard_en, %object + .size _gc_after_discard_en, 4 +_gc_after_discard_en: + .space 4 + .type gc_slc_mode_tlc_vpn_th, %object + .size gc_slc_mode_tlc_vpn_th, 2 +gc_slc_mode_tlc_vpn_th: + .space 2 + .type gc_slc_mode_vpn_th, %object + .size gc_slc_mode_vpn_th, 2 +gc_slc_mode_vpn_th: + .space 2 + .type write_buf_head, %object + .size write_buf_head, 1 +write_buf_head: + .space 1 + .space 3 + .type g_gc_info, %object + .size g_gc_info, 2204 +g_gc_info: + .space 2204 + .type ftl_sblk_vpn_update_id, %object + .size ftl_sblk_vpn_update_id, 2 +ftl_sblk_vpn_update_id: + .space 2 + .type ftl_sblk_update_list, %object + .size ftl_sblk_update_list, 16 +ftl_sblk_update_list: + .space 16 + .type _c_ftl_block_addr_log2, %object + .size _c_ftl_block_addr_log2, 2 +_c_ftl_block_addr_log2: + .space 2 + .type _c_ftl_planes_per_die, %object + .size _c_ftl_planes_per_die, 1 +_c_ftl_planes_per_die: + .space 1 + .space 3 + .type gc_valid_page_ppa, %object + .size gc_valid_page_ppa, 4 +gc_valid_page_ppa: + .space 4 + .type _c_ftl_nand_type, %object + .size _c_ftl_nand_type, 1 +_c_ftl_nand_type: + .space 1 + .type _c_ftl_nand_planes_num, %object + .size _c_ftl_nand_planes_num, 1 +_c_ftl_nand_planes_num: + .space 1 + .type g_flash_3d_mlc_flag, %object + .size g_flash_3d_mlc_flag, 1 +g_flash_3d_mlc_flag: + .space 1 + .type g_one_pass_program, %object + .size g_one_pass_program, 1 +g_one_pass_program: + .space 1 + .type gc_page_buf_id, %object + .size gc_page_buf_id, 4 +gc_page_buf_id: + .space 4 + .type g_flash_3d_tlc_flag, %object + .size g_flash_3d_tlc_flag, 1 +g_flash_3d_tlc_flag: + .space 1 + .type gc_mode, %object + .size gc_mode, 1 +gc_mode: + .space 1 + .type _c_ftl_page_pre_blk, %object + .size _c_ftl_page_pre_blk, 2 +_c_ftl_page_pre_blk: + .space 2 + .type gp_data_slc_data_head, %object + .size gp_data_slc_data_head, 4 +gp_data_slc_data_head: + .space 4 + .type gc_slc_data_index, %object + .size gc_slc_data_index, 2 +gc_slc_data_index: + .space 2 + .type gc_slc_cache_index, %object + .size gc_slc_cache_index, 2 +gc_slc_cache_index: + .space 2 + .type gc_xlc_data_index, %object + .size gc_xlc_data_index, 2 +gc_xlc_data_index: + .space 2 + .space 2 + .type gp_data_slc_cache_head, %object + .size gp_data_slc_cache_head, 4 +gp_data_slc_cache_head: + .space 4 + .type gp_data_xlc_data_head, %object + .size gp_data_xlc_data_head, 4 +gp_data_xlc_data_head: + .space 4 + .type _c_ftl_page_pre_slc_blk, %object + .size _c_ftl_page_pre_slc_blk, 2 +_c_ftl_page_pre_slc_blk: + .space 2 + .type gc_xlc_search_index, %object + .size gc_xlc_search_index, 2 +gc_xlc_search_index: + .space 2 + .type _min_slc_super_block, %object + .size _min_slc_super_block, 2 +_min_slc_super_block: + .space 2 + .type _max_xlc_super_block, %object + .size _max_xlc_super_block, 2 +_max_xlc_super_block: + .space 2 + .type gp_free_slc_head, %object + .size gp_free_slc_head, 4 +gp_free_slc_head: + .space 4 + .type gp_free_xlc_head, %object + .size gp_free_xlc_head, 4 +gp_free_xlc_head: + .space 4 + .type gp_free_mix_head, %object + .size gp_free_mix_head, 4 +gp_free_mix_head: + .space 4 + .type zftl_print_list_count, %object + .size zftl_print_list_count, 2 +zftl_print_list_count: + .space 2 + .type _c_ftl_block_align_addr, %object + .size _c_ftl_block_align_addr, 2 +_c_ftl_block_align_addr: + .space 2 + .type _c_ftl_nand_die_num, %object + .size _c_ftl_nand_die_num, 1 +_c_ftl_nand_die_num: + .space 1 + .space 1 + .type lpa_hash, %object + .size lpa_hash, 512 +lpa_hash: + .space 512 + .space 2 + .type ftl_sblk_lpa_tbl, %object + .size ftl_sblk_lpa_tbl, 4 +ftl_sblk_lpa_tbl: + .space 4 + .type lpa_hash_index, %object + .size lpa_hash_index, 4 +lpa_hash_index: + .space 4 + .type ftl_vpn_update_count, %object + .size ftl_vpn_update_count, 2 +ftl_vpn_update_count: + .space 2 + .type _c_ftl_sec_per_page, %object + .size _c_ftl_sec_per_page, 1 +_c_ftl_sec_per_page: + .space 1 + .space 1 + .type ftl_sblk_update_list_offset, %object + .size ftl_sblk_update_list_offset, 2 +ftl_sblk_update_list_offset: + .space 2 + .type g_flash_micron_3d_tlc_b05a, %object + .size g_flash_micron_3d_tlc_b05a, 1 +g_flash_micron_3d_tlc_b05a: + .space 1 + .space 1 + .type _c_mix_max_xlc_ec_count, %object + .size _c_mix_max_xlc_ec_count, 2 +_c_mix_max_xlc_ec_count: + .space 2 + .type _c_mix_max_slc_ec_count, %object + .size _c_mix_max_slc_ec_count, 2 +_c_mix_max_slc_ec_count: + .space 2 + .type read_buf_head, %object + .size read_buf_head, 1 +read_buf_head: + .space 1 + .type read_buf_count, %object + .size read_buf_count, 1 +read_buf_count: + .space 1 + .space 2 + .type pm_ram_info, %object + .size pm_ram_info, 256 +pm_ram_info: + .space 256 + .type pm_last_update_ram_id, %object + .size pm_last_update_ram_id, 1 +pm_last_update_ram_id: + .space 1 + .space 3 + .type g_msb_page_tbl, %object + .size g_msb_page_tbl, 2048 +g_msb_page_tbl: + .space 2048 + .type g_slc_page_num, %object + .size g_slc_page_num, 2 +g_slc_page_num: + .space 2 + .space 2 + .type g_die_addr, %object + .size g_die_addr, 32 +g_die_addr: + .space 32 + .type g_totle_phy_block, %object + .size g_totle_phy_block, 2 +g_totle_phy_block: + .space 2 + .space 2 + .type pm_force_gc, %object + .size pm_force_gc, 4 +pm_force_gc: + .space 4 + .type _c_swl_slc_gc_th, %object + .size _c_swl_slc_gc_th, 2 +_c_swl_slc_gc_th: + .space 2 + .type _c_swl_xlc_gc_th, %object + .size _c_swl_xlc_gc_th, 2 +_c_swl_xlc_gc_th: + .space 2 + .type _c_max_pm_sblk, %object + .size _c_max_pm_sblk, 2 +_c_max_pm_sblk: + .space 2 + .space 6 + .type power_on_init_jiffies, %object + .size power_on_init_jiffies, 8 +power_on_init_jiffies: + .space 8 + .type gp_ftl_api, %object + .size gp_ftl_api, 4 +gp_ftl_api: + .space 4 + .type RK29_NANDC_REG_BASE, %object + .size RK29_NANDC_REG_BASE, 4 +RK29_NANDC_REG_BASE: + .space 4 + .type ftl_dma32_buffer_size, %object + .size ftl_dma32_buffer_size, 4 +ftl_dma32_buffer_size: + .space 4 + .type ftl_dma32_buffer, %object + .size ftl_dma32_buffer, 4 +ftl_dma32_buffer: + .space 4 + .type gc_state, %object + .size gc_state, 1 +gc_state: + .space 1 + .space 3 + .type gc_search_count, %object + .size gc_search_count, 4 +gc_search_count: + .space 4 + .type gc_slc_mode_slc_vpn_th, %object + .size gc_slc_mode_slc_vpn_th, 2 +gc_slc_mode_slc_vpn_th: + .space 2 + .space 2 + .type gc_lpa_tbl, %object + .size gc_lpa_tbl, 4 +gc_lpa_tbl: + .space 4 + .type gc_pre_ppa_tbl, %object + .size gc_pre_ppa_tbl, 4 +gc_pre_ppa_tbl: + .space 4 + .type gc_des_ppa_tbl, %object + .size gc_des_ppa_tbl, 4 +gc_des_ppa_tbl: + .space 4 + .type g_flash_tmp_page_buffer, %object + .size g_flash_tmp_page_buffer, 4 +g_flash_tmp_page_buffer: + .space 4 + .type g_nandc_tran_timeout, %object + .size g_nandc_tran_timeout, 1 +g_nandc_tran_timeout: + .space 1 + .space 3 + .type g_flash_tmp_spare_buffer, %object + .size g_flash_tmp_spare_buffer, 4 +g_flash_tmp_spare_buffer: + .space 4 + .type g_maxRetryCount, %object + .size g_maxRetryCount, 1 +g_maxRetryCount: + .space 1 + .space 3 + .type flash_ddr_tuning_sdr_read_count, %object + .size flash_ddr_tuning_sdr_read_count, 4 +flash_ddr_tuning_sdr_read_count: + .space 4 + .type flash_read_retry, %object + .size flash_read_retry, 4 +flash_read_retry: + .space 4 + .type g_flash_spare_buffer, %object + .size g_flash_spare_buffer, 4 +g_flash_spare_buffer: + .space 4 + .type g_flash_page_buffer, %object + .size g_flash_page_buffer, 4 +g_flash_page_buffer: + .space 4 + .type write_commit_head, %object + .size write_commit_head, 1 +write_commit_head: + .space 1 + .space 3 + .type ftl_flush_jiffies, %object + .size ftl_flush_jiffies, 4 +ftl_flush_jiffies: + .space 4 + .type g_flash_multi_page_read_en, %object + .size g_flash_multi_page_read_en, 1 +g_flash_multi_page_read_en: + .space 1 + .space 3 + .type ftl_info_spare, %object + .size ftl_info_spare, 4 +ftl_info_spare: + .space 4 + .space 16 + .type g_ftl_info_blk, %object + .size g_ftl_info_blk, 4 +g_ftl_info_blk: + .space 4 + .type ftl_info_data_buffer, %object + .size ftl_info_data_buffer, 4 +ftl_info_data_buffer: + .space 4 + .type ftl_sys_info_first_write, %object + .size ftl_sys_info_first_write, 1 +ftl_sys_info_first_write: + .space 1 + .type ftl_power_lost_flag, %object + .size ftl_power_lost_flag, 1 +ftl_power_lost_flag: + .space 1 + .type ftl_ext_info_first_write, %object + .size ftl_ext_info_first_write, 1 +ftl_ext_info_first_write: + .space 1 + .space 1 + .type ftl_ext_info_data_buffer, %object + .size ftl_ext_info_data_buffer, 4 +ftl_ext_info_data_buffer: + .space 4 + .type ftl_tmp_spare, %object + .size ftl_tmp_spare, 4 +ftl_tmp_spare: + .space 4 + .type pm_gc_enable, %object + .size pm_gc_enable, 4 +pm_gc_enable: + .space 4 + .type g_pm_spare, %object + .size g_pm_spare, 4 +g_pm_spare: + .space 4 + .type pm_first_write, %object + .size pm_first_write, 1 +pm_first_write: + .space 1 + .space 3 + .type g_flash_sys_spare_buffer, %object + .size g_flash_sys_spare_buffer, 4 +g_flash_sys_spare_buffer: + .space 4 + .type g_flash_blk_info, %object + .size g_flash_blk_info, 4 +g_flash_blk_info: + .space 4 + .type g_flash_reversd_blks, %object + .size g_flash_reversd_blks, 1 +g_flash_reversd_blks: + .space 1 + .type g_flash_micron_3d_tlc_b16a, %object + .size g_flash_micron_3d_tlc_b16a, 1 +g_flash_micron_3d_tlc_b16a: + .space 1 + .type _c_ftl_byte_pre_page, %object + .size _c_ftl_byte_pre_page, 2 +_c_ftl_byte_pre_page: + .space 2 + .type pm_last_load_ram_id, %object + .size pm_last_load_ram_id, 1 +pm_last_load_ram_id: + .space 1 + .type _ftl_gc_tag_page_num, %object + .size _ftl_gc_tag_page_num, 1 +_ftl_gc_tag_page_num: + .space 1 + .space 2 + .type _last_read_time, %object + .size _last_read_time, 4 +_last_read_time: + .space 4 + .type _last_write_time, %object + .size _last_write_time, 4 +_last_write_time: + .space 4 + .type read_ahead_lpa, %object + .size read_ahead_lpa, 4 +read_ahead_lpa: + .space 4 + .type _c_totle_data_density, %object + .size _c_totle_data_density, 4 +_c_totle_data_density: + .space 4 + .type _c_ftl_pm_page_num, %object + .size _c_ftl_pm_page_num, 2 +_c_ftl_pm_page_num: + .space 2 + .space 2 + .type ftl_tmp_buffer, %object + .size ftl_tmp_buffer, 4 +ftl_tmp_buffer: + .space 4 + .type rk_zftl_enable, %object + .size rk_zftl_enable, 1 +rk_zftl_enable: + .space 1 + .space 3 + .type gLoaderBootInfo, %object + .size gLoaderBootInfo, 4 +gLoaderBootInfo: + .space 4 + .type RK29_NANDC1_REG_BASE, %object + .size RK29_NANDC1_REG_BASE, 4 +RK29_NANDC1_REG_BASE: + .space 4 + .type discard_sector_count, %object + .size discard_sector_count, 4 +discard_sector_count: + .space 4 + .type idb_write_enable, %object + .size idb_write_enable, 1 +idb_write_enable: + .space 1 + .space 3 + .type idb_buf, %object + .size idb_buf, 4 +idb_buf: + .space 4 + .type idb_last_lba, %object + .size idb_last_lba, 4 +idb_last_lba: + .space 4 + .type g_idb_buffer, %object + .size g_idb_buffer, 4 +g_idb_buffer: + .space 4 + .type g_vendor, %object + .size g_vendor, 4 +g_vendor: + .space 4 + .type SecureBootUnlockTryCount, %object + .size SecureBootUnlockTryCount, 4 +SecureBootUnlockTryCount: + .space 4 + .type SecureBootCheckOK, %object + .size SecureBootCheckOK, 4 +SecureBootCheckOK: + .space 4 + .type SecureBootEn, %object + .size SecureBootEn, 4 +SecureBootEn: + .space 4 + .type gpVendor1Info, %object + .size gpVendor1Info, 4 +gpVendor1Info: + .space 4 + .type gpVendor0Info, %object + .size gpVendor0Info, 4 +gpVendor0Info: + .space 4 + .type gSnSectorData, %object + .size gSnSectorData, 512 +gSnSectorData: + .space 512 + .type gpDrmKeyInfo, %object + .size gpDrmKeyInfo, 4 +gpDrmKeyInfo: + .space 4 + .type gpBootConfig, %object + .size gpBootConfig, 4 +gpBootConfig: + .space 4 + .type ftl_low_format_cur_blk, %object + .size ftl_low_format_cur_blk, 2 +ftl_low_format_cur_blk: + .space 2 + .space 2 + .type p_read_ahead_ext_buf, %object + .size p_read_ahead_ext_buf, 4 +p_read_ahead_ext_buf: + .space 4 + .type _c_ftl_nand_blks_per_die, %object + .size _c_ftl_nand_blks_per_die, 2 +_c_ftl_nand_blks_per_die: + .space 2 + .type nandc_ecc_sts, %object + .size nandc_ecc_sts, 16 +nandc_ecc_sts: + .space 16 + .type g_slc_mode_enable, %object + .size g_slc_mode_enable, 1 +g_slc_mode_enable: + .space 1 + .section .rodata.str1.1,"aMS",%progbits,1 +.LC0: + .ascii "\012!!!!! error @ func:%s - line:%d\012\000" +.LC1: + .ascii "FTL version: 6.0.24 20210716\000" +.LC2: + .ascii "%s\012\000" +.LC3: + .ascii "zftl_debug:0x%x\012\000" +.LC4: + .ascii "...%s enter...\012\000" +.LC5: + .ascii "No.0 FLASH ID: %x %x %x %x %x %x\012\000" +.LC6: + .ascii "DiePerChip: %x\012\000" +.LC7: + .ascii "SectPerPage: %x\012\000" +.LC8: + .ascii "PagePerBlk: %x\012\000" +.LC9: + .ascii "Cell: %x\012\000" +.LC10: + .ascii "PlanePerDie: %x\012\000" +.LC11: + .ascii "BlkPerPlane: %x\012\000" +.LC12: + .ascii "die gap: %x\012\000" +.LC13: + .ascii "lsbMode: %x\012\000" +.LC14: + .ascii "ReadRetryMode: %x\012\000" +.LC15: + .ascii "ecc: %x\012\000" +.LC16: + .ascii "idb ecc: %x\012\000" +.LC17: + .ascii "OptMode: %x\012\000" +.LC18: + .ascii "g_nand_max_die: %x\012\000" +.LC19: + .ascii "Cache read enable: %x\012\000" +.LC20: + .ascii "Cache random read enable: %x\012\000" +.LC21: + .ascii "Cache prog enable: %x\012\000" +.LC22: + .ascii "multi read enable: %x\012\000" +.LC23: + .ascii "multi prog enable: %x\012\000" +.LC24: + .ascii "interleave enable: %x\012\000" +.LC25: + .ascii "read retry enable: %x\012\000" +.LC26: + .ascii "randomizer enable: %x\012\000" +.LC27: + .ascii "SDR enable: %x\012\000" +.LC28: + .ascii "ONFI enable: %x\012\000" +.LC29: + .ascii "TOGGLE enable: %x\012\000" +.LC30: + .ascii "g_flash_slc_mode: %x %x\012\000" +.LC31: + .ascii "MultiPlaneProgCmd: %x %x\012\000" +.LC32: + .ascii "MultiPlaneReadCmd: %x %x\012\000" +.LC33: + .ascii "g_flash_toggle_mode_en: %x\012\000" +.LC34: + .ascii "nand sdr mode %x\012\000" +.LC35: + .ascii "nand ddr mode %x\012\000" +.LC36: + .ascii "No.%d FLASH ID:%x %x %x %x %x %x\012\000" +.LC37: + .ascii "otp:%x %x %x %x\012\000" +.LC38: + .ascii "bad block test:%x %x\012\000" +.LC39: + .ascii "flash_erase_duplane_block %x %x %x\012\000" +.LC40: + .ascii "flash_erase_duplane_block pageadd = %x status = %x\012" + .ascii "\000" +.LC41: + .ascii "flash_erase_block %x %x %x\012\000" +.LC42: + .ascii "flash_erase_block %d block = %x status = %x\012\000" +.LC43: + .ascii "erase done: %x\012\000" +.LC44: + .ascii "sblk_queue_head = %d\012\000" +.LC45: + .ascii "sblk_read_completed_queue_head = %d\012\000" +.LC46: + .ascii "sblk_gc_write_completed_queue_head = %d\012\000" +.LC47: + .ascii "sblk_write_completed_queue_head = %d\012\000" +.LC48: + .ascii "p_free_buf_head = %d\012\000" +.LC49: + .ascii "free_buf_count = %d\012\000" +.LC50: + .ascii "buf = %d, next=%d, flag=%d gc_write_flag=%d, lun_st" + .ascii "ate=%d, op_status = %d lpa=%x, ppa=%x\012\000" +.LC51: + .ascii "flash_mask_bad_block %d %d\012\000" +.LC52: + .ascii "zftl_debug\000" +.LC53: + .ascii "FLASH ID: %x %x %x %x %x %x\012\000" +.LC54: + .ascii "density: %d MB\012\000" +.LC55: + .ascii "device density: %d MB\012\000" +.LC56: + .ascii "FTL INFO:\012\000" +.LC57: + .ascii "max_lpn = 0x%x\012\000" +.LC58: + .ascii "density = 0x%x\012\000" +.LC59: + .ascii "slc vpn = 0x%x\012\000" +.LC60: + .ascii "xlc vpn = 0x%x\012\000" +.LC61: + .ascii "free slc blk = 0x%x\012\000" +.LC62: + .ascii "free xlc blk = 0x%x\012\000" +.LC63: + .ascii "free mix blk = 0x%x\012\000" +.LC64: + .ascii "slc data blk = 0x%x\012\000" +.LC65: + .ascii "slc cache blk = 0x%x\012\000" +.LC66: + .ascii "xlc data blk = 0x%x\012\000" +.LC67: + .ascii "free buf = %d, %d, %d\012\000" +.LC68: + .ascii "bad blk = %d %d\012\000" +.LC69: + .ascii "TBW = %d MB\012\000" +.LC70: + .ascii "TBR = %d MB\012\000" +.LC71: + .ascii "POC = %d\012\000" +.LC72: + .ascii "PLC = %d\012\000" +.LC73: + .ascii "sys run time = %d S\012\000" +.LC74: + .ascii "slc mode = %x %x %x\012\000" +.LC75: + .ascii "prog err = %d\012\000" +.LC76: + .ascii "read err = %d\012\000" +.LC77: + .ascii "GC XLC page = %d\012\000" +.LC78: + .ascii "GC SLC page = %d\012\000" +.LC79: + .ascii "discard page = 0x%x\012\000" +.LC80: + .ascii "version = %d\012\000" +.LC81: + .ascii "acblk = 0x%x %d %d\012\000" +.LC82: + .ascii "tmblk = 0x%x %d %d\012\000" +.LC83: + .ascii "gcblk = 0x%x %d %d\012\000" +.LC84: + .ascii "slc ec = %d, %d, %d, %d, %d\012\000" +.LC85: + .ascii "xlc ec = %d, %d, %d, %d, %d\012\000" +.LC86: + .ascii "gc free blk th = %d\012\000" +.LC87: + .ascii "gc vpn th = %d %d %d %d %d\012\000" +.LC88: + .ascii "swl blk = %x %x %x %x\012\000" +.LC89: + .ascii "rf info = %x %x %x %x %x\012\000" +.LC90: + .ascii "gc_add_sblk = %d, %d, %d, %d, %d, %d, %d\012\000" +.LC91: + .ascii "gc_add_sblk = %d, %d, %d\012\000" +.LC92: + .ascii "gc_add_sblk = %d, %d, %d,last update:%d, %d\012\000" +.LC93: + .ascii "gc_add_sblk = %d, %d, %d, %d, %d, %d\012\000" +.LC94: + .ascii "gc_mark_bad_ppa %d %x %x\012\000" +.LC95: + .ascii "status: %x, ppa: %x\012\000" +.LC96: + .ascii "%d gc_free_temp_buf buf id= %x\012\000" +.LC97: + .ascii "gc: b:%x,p:%x,i:%x; free buf=%d %d free slc th: %d\012" + .ascii "\000" +.LC98: + .ascii "zftl_get_gc_node cache = %x index = %d vpn = %x\012" + .ascii "\000" +.LC99: + .ascii "gc_search_src_blk mode = %x, src mode = %x, count= " + .ascii "%d %d\012\000" +.LC100: + .ascii "swl_tlc_free_mini_ec_blk alloc sblk %x\012\000" +.LC101: + .ascii "zftl_get_free_sblk %x %d, %p %d %d\012\000" +.LC102: + .ascii "zftl_gc_get_free_sblk %x %x %x, %d %d %d\012\000" +.LC103: + .ascii "swl_slc_free_mini_ec_blk alloc sblk %x\012\000" +.LC104: + .ascii "list count:%p %d\012\000" +.LC105: + .ascii "%d: node:%x %x %x %x, %d %d %d %d %d\012\000" +.LC106: + .ascii "ftl_vpn_decrement %x = %d, %d\012\000" +.LC107: + .ascii "mask bad block:cs %x %x block: %x %x\012\000" +.LC108: + .ascii "gc_free_bad_sblk 0x%x\012\000" +.LC109: + .ascii "swl_slc_free_mini_ec_blk sblk %x\012\000" +.LC110: + .ascii "gc_free_src_blk = %x, vpn = %d\012\000" +.LC111: + .ascii "gc_free_src_blk %x, %d\012\000" +.LC112: + .ascii "bad blk = %x, %x free blk: s:%x,t:%x,m:%x, data blk" + .ascii ":s:%x,%x,t%x vpn: s:%x t:%x, max_vpn: %x\012\000" +.LC113: + .ascii "totle w: %d MB,r: %d MB %d dv:0x%X,poc:%d\012\000" +.LC114: + .ascii "gc xlc page: %d,gc slc page: %d, tmp w: %d MB\012\000" +.LC115: + .ascii "slc ec: %d,%d,%d,%d,%d,tlc ec: %d,%d,%d,%d,%d\012\000" +.LC116: + .ascii "gc th: tlc_tlc: %d tlc_slc: %d slc_slc: %d slc_tlc:" + .ascii "%d free_th: %d\012\000" +.LC117: + .ascii "swl : %x %x %x %x %x %x\012\000" +.LC118: + .ascii "ftl prog error =%x, lpa = %x, ppa= %x\012\000" +.LC119: + .ascii "ftl re prog: lpa = %x, ppa= %x\012\000" +.LC120: + .ascii "dump_sblk_queue: %d\012\000" +.LC121: + .ascii "buf id= %d state = %d ppa = %x\012\000" +.LC122: + .ascii "%s %d %d\012\000" +.LC123: + .ascii "gc_static_wearleveling: min blk: %x,sec=%d,xec = %d" + .ascii " ,mode=%d, func=%x, bbt=%x vpn = %d\012\000" +.LC124: + .ascii "gc_static_wearleveling: min slc blk: %x,sec=%d,xec " + .ascii "= %d ,mode=%d, func=%x, bbt=%x vpn = %d\012\000" +.LC125: + .ascii "gc_static_wearleveling: min tlc blk: %x,sec=%d,xec " + .ascii "= %d ,mode=%d, func=%x, bbt=%x vpn = %d\012\000" +.LC126: + .ascii "gc_static_wearleveling: max slc blk: %x,sec=%d,xec " + .ascii "= %d ,mode=%d, func=%x, bbt=%x vpn = %d\012\000" +.LC127: + .ascii "gc_static_wearleveling: max xlc blk: %x,sec=%d,xec " + .ascii "= %d ,mode=%d, func=%x, bbt=%x vpn = %d\012\000" +.LC128: + .ascii "gc_static_wearleveling: slc blk: %x, tlc blk: %d av" + .ascii "g slc ec: %d, avg tlc ec: %d \012\000" +.LC129: + .ascii "gc_static_wearleveling: min slc ec: %x, min tlc ec:" + .ascii " %d max slc ec: %d, max tlc ec: %d; %d %d\012\000" +.LC130: + .ascii "swl add tlc gc = %x, %d, %d, %d, %d, %d\012\000" +.LC131: + .ascii "swl add slc gc = %x, %d, %d, %d, %d, %d\012\000" +.LC132: + .ascii "free blk vpn error: %x %x\012\000" +.LC133: + .ascii "GC PM block %x %x %x %d\012\000" +.LC134: + .ascii "ftl_free_no_use_map_blk %x %x %x %d\012\000" +.LC135: + .ascii "...%d @ %s\012\000" +.LC136: + .ascii "...%s enter... %p\012\000" +.LC137: + .ascii "0:%x %x %x %x %x\012\000" +.LC138: + .ascii "g_nandc_ver...%d\012\000" +.LC139: + .ascii "rk_ftl_de_init %x\012\000" +.LC140: + .ascii "\0013\000" +.LC141: + .ascii "otp error! %d\000" +.LC142: + .ascii "rr\000" +.LC143: + .ascii "flash_abort_clear = %d\012\000" +.LC144: + .ascii "%d mtrans_cnt = %d page_num = %d\012\000" +.LC145: + .ascii "%d flReg.d32=%x %x\012\000" +.LC146: + .ascii "nandc:\000" +.LC147: + .ascii "nandc_xfer_done read error %x\012\000" +.LC148: + .ascii "dqs data abort %x\012\000" +.LC149: + .ascii "dqs data timeout %x\012\000" +.LC150: + .ascii "xfer error %x\012\000" +.LC151: + .ascii "MT %d row=%x,last status %d,status = %d\012\000" +.LC152: + .ascii "MT RR %d row=%x,count %d,status=%d\012\000" +.LC153: + .ascii "toshiba SRR %d row=%x, status=%d\012\000" +.LC154: + .ascii "toshiba TRR %d row=%x, status=%d\012\000" +.LC155: + .ascii "toshiba RR %d row=%x,count %d,status=%d\012\000" +.LC156: + .ascii "YMTC RR %d row=%x,count %d,status=%d\012\000" +.LC157: + .ascii "samsung SRR %d row=%x, status=%d\012\000" +.LC158: + .ascii "samsung TRR %d row=%x, status=%d\012\000" +.LC159: + .ascii "samsung RR %d row=%x,count %d,status=%d\012\000" +.LC160: + .ascii "hynix RR %d row=%x, count %d, status=%d\012\000" +.LC161: + .ascii "%d flash_ddr_tuning_read %x ecc=%d\012\000" +.LC162: + .ascii "sync para %d\012\000" +.LC163: + .ascii "DDR mode Read error %x %x\012\000" +.LC164: + .ascii "SDR mode Read %x %x ecc:%x\012\000" +.LC165: + .ascii "flash_read_page_en %x %x %x %x\012\000" +.LC166: + .ascii "flash_read_page_en %x %x error_ecc %d %d\012\000" +.LC167: + .ascii "flash_get_last_written_page: %x %x %x\012\000" +.LC168: + .ascii "flash_prog_page page_addr = %x status = %x\012\000" +.LC169: + .ascii "flash_prog_page %x %x %x\012\000" +.LC170: + .ascii "ymtc_flash_tlc_page_prog page_addr = %x status = %x" + .ascii "\012\000" +.LC171: + .ascii "sblk_mlc_dump_prog wl_addr= %x ppa = %x ppa = %x\012" + .ascii "\000" +.LC172: + .ascii "flash_complete_page_read %x %x error_ecc %d %d\012\000" +.LC173: + .ascii "read: %x %x %x %x\012\000" +.LC174: + .ascii "0set buf %d,status = %x, ppa = %x lun state = %d\012" + .ascii "\000" +.LC175: + .ascii "prog end %x %x error_ecc %d %d\012\000" +.LC176: + .ascii "1set buf %d,status = %x, ppa = %x lun state = %d\012" + .ascii "\000" +.LC177: + .ascii "dp prog end %x %x error_ecc %d %d\012\000" +.LC178: + .ascii "sblk_prog_page ppa = %x, count = %d\012\000" +.LC179: + .ascii "err: ppa = %x, status = %x, %x %x spare: %x %x %x %" + .ascii "x\012\000" +.LC180: + .ascii "flash_prog_page_en:%x %x %x\012\000" +.LC181: + .ascii "w d:\000" +.LC182: + .ascii "w s:\000" +.LC183: + .ascii "spare\000" +.LC184: + .ascii "data\000" +.LC185: + .ascii "write error: %x\012\000" +.LC186: + .ascii "g_ftl_info_blk blk = %x, page = %x version = %d\012" + .ascii "\000" +.LC187: + .ascii "%d %x @%d %x\012\000" +.LC188: + .ascii "ftl_info_blk_init %d %d %x\012\000" +.LC189: + .ascii "ftl info hash %x error\012\000" +.LC190: + .ascii "ink flag: %x\012\000" +.LC191: + .ascii "%s %d %d %x %x\012\000" +.LC192: + .ascii "ext info hash %x error\012\000" +.LC193: + .ascii "%s %x %x %x\012\000" +.LC194: + .ascii "ftl_sblk_dump_write = %x %d %d %d %d\012\000" +.LC195: + .ascii "blk= %x, page=%x, ppa = %x, status = %x, data:%x %x" + .ascii " %x %x, spare: %x %x %x %x\012\000" +.LC196: + .ascii "ftl_sblk_dump_write2 = %x %d %d %d\012\000" +.LC197: + .ascii "ftl_sblk_dump_write = %x %x\012\000" +.LC198: + .ascii "ftl_sblk_dump_write done = %x\012\000" +.LC199: + .ascii "%x: ink_scaned_blk_num %x\012\000" +.LC200: + .ascii "ftl_ink_check_sblk = %x %d %d\012\000" +.LC201: + .ascii "ftl_ink_check_sblk = %x %d %d end\012\000" +.LC202: + .ascii "alloc sblk %x %d\012\000" +.LC203: + .ascii "blk %x is bad block\012\000" +.LC204: + .ascii "pm_alloc_new_blk: %x %x %x %x\012\000" +.LC205: + .ascii "pm_write_page write error: %x\012\000" +.LC206: + .ascii "finfo:\000" +.LC207: + .ascii "flash_info_flush id = %x, page = %x\012\000" +.LC208: + .ascii "sys_info_flush error:%x\012\000" +.LC209: + .ascii "...%d @ %s %d %p\012\000" +.LC210: + .ascii "no sys info %x\012\000" +.LC211: + .ascii "l2p:\000" +.LC212: + .ascii "saved_active_page = %x\012\000" +.LC213: + .ascii "saved_active_plane = %x\012\000" +.LC214: + .ascii "sblk = %x\012\000" +.LC215: + .ascii "phy_blk = %x %x\012\000" +.LC216: + .ascii "num_planes = %x\012\000" +.LC217: + .ascii "recovery blk=%x, page=%x, ppa = %x, status = %x, ha" + .ascii "sh:%x\012\000" +.LC218: + .ascii "data:\000" +.LC219: + .ascii "sblk = %x, vpn0 = %d, vpn1 = %d\012\000" +.LC220: + .ascii "dump_write_lpa = %x %x %x %x\012\000" +.LC221: + .ascii "dump write new ppa = %x, last ppa = %x lpa = %x\012" + .ascii "\000" +.LC222: + .ascii "dump write = %x %x %x\012\000" +.LC223: + .ascii "dump write hash update = %x %x %x\012\000" +.LC224: + .ascii "free_buf_count: %d\012\000" +.LC225: + .ascii "g_ftl_info_blk blk:0x%x, index:0x%x, page:0x%x\012\000" +.LC226: + .ascii "ftl_ext_info_blk blk:0x%x, page:0x%x\012\000" +.LC227: + .ascii "ac_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page" + .ascii "_index:0x%x\012\000" +.LC228: + .ascii "tmp_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, pag" + .ascii "e_index:0x%x\012\000" +.LC229: + .ascii "gc_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page" + .ascii "_index:0x%x\012\000" +.LC230: + .ascii "lpa:\000" +.LC231: + .ascii "vpn:\000" +.LC232: + .ascii "sblk:\000" +.LC233: + .ascii "lpa_hash:\000" +.LC234: + .ascii "lpa_hash_index:\000" +.LC235: + .ascii "%s w error lpn = %x, max ppa = %d\012\000" +.LC236: + .ascii "region_id = %d, pm_max_region = %d\012\000" +.LC237: + .ascii "load_l2p_region no ppa = %x , %x, all setting 0xff." + .ascii "...\012\000" +.LC238: + .ascii "load_l2p_region = %x,%x,%x, %x\012\000" +.LC239: + .ascii "pm_ppa:\000" +.LC240: + .ascii "spare:\000" +.LC241: + .ascii "pm_init posr %x %x %x\012\000" +.LC242: + .ascii "pm_init recovery %x %x %x\012\000" +.LC243: + .ascii "pm_init hash %x error\012\000" +.LC244: + .ascii "pm_log2phys lpn = %d, max lpn = %d\012\000" +.LC245: + .ascii "ppa = %x, status = %x, data:%x %x %x %x, spare: %x " + .ascii "%x %x %x\012\000" +.LC246: + .ascii "ppa = %x, status = %x, %x %x spare: %x %x %x %x\012" + .ascii "\000" +.LC247: + .ascii "gc_recovery: %x vpn = %x\012\000" +.LC248: + .ascii "gc_update_l2p_map_new sblk %x\012\000" +.LC249: + .ascii "gc_update_l2p_map_new: %x %x %x\012\000" +.LC250: + .ascii "lpa: %x %x %x\012\000" +.LC251: + .ascii "gc_update_l2p_map_new: %x vpn = %x vpn1 = %x done\012" + .ascii "\000" +.LC252: + .ascii "gc_scan_src_blk = %x, vpn = %d\012\000" +.LC253: + .ascii "js hash error:%x %x %x\012\000" +.LC254: + .ascii "gc_scan_src_blk = %x, s vpn0 = %d, c vpn1 = %d\012\000" +.LC255: + .ascii "gc_block_vpn_scan = %x, s vpn0 = %d, c vpn1 = %d f:" + .ascii "%d\012\000" +.LC256: + .ascii "ftl_sblk_dump = %x %d %d %d %d\012\000" +.LC257: + .ascii "ftl_sblk_dump = %x %x %x %x\012\000" +.LC258: + .ascii "page_addr = %x, lpa=%x vpn = %d\012\000" +.LC259: + .ascii "index= %x, lpa=%x\012\000" +.LC260: + .ascii "block = %x, vpn=%x check vpn = %x\012\000" +.LC261: + .ascii "ftl_read %x %x %x\012\000" +.LC262: + .ascii "ftl_read refresh =%x, lpa = %x, ppa= %x\012\000" +.LC263: + .ascii "id=%d, status = %x, lpa = %x, ppa = %x spare = %x %" + .ascii "x %x %x\012\000" +.LC264: + .ascii "zftl debug cmd: %s\012\000" +.LC265: + .ascii "cmd:\000" +.LC266: + .ascii "dumpl2p\000" +.LC267: + .ascii "pm l2p:\000" +.LC268: + .ascii "pm blk:\000" +.LC269: + .ascii "dumppm:\000" +.LC270: + .ascii "p_cmd: %s\012\000" +.LC271: + .ascii "pm ram = %x, %x\012\000" +.LC272: + .ascii "ram:\000" +.LC273: + .ascii "pm:\000" +.LC274: + .ascii "dumpsys\000" +.LC275: + .ascii "dumplist:\000" +.LC276: + .ascii "vpncheck\000" +.LC277: + .ascii "dumpppa:\000" +.LC278: + .ascii "dumpblk:\000" +.LC279: + .ascii "setzdebug:\000" +.LC280: + .ascii "lpa2ppa:\000" +.LC281: + .ascii "lpa: %x--> ppa: %x\012\000" +.LC282: + .ascii "help:\012\000" +.LC283: + .ascii "1. echo dumpl2p > /proc/zftl_debug\012\000" +.LC284: + .ascii "2. echo dumppm:x > /proc/zftl_debug\012\000" +.LC285: + .ascii "3. echo dumpsys > /proc/zftl_debug\012\000" +.LC286: + .ascii "4. echo dumpppa:x > /proc/zftl_debug\012\000" +.LC287: + .ascii "5. echo vpncheck > /proc/zftl_debug\012\000" +.LC288: + .ascii "6. echo setzdebug:x > /proc/zftl_debug\012\000" +.LC289: + .ascii "7. echo dumplist:x > /proc/zftl_debug\012\000" +.LC290: + .ascii "8. echo lpa2ppa:x> /proc/zftl_debug\012\000" +.LC291: + .ascii "ftl_update_l2p_map: %x %x %x\012\000" +.LC292: + .ascii "ftl_update_l2p_map\000" +.LC293: + .ascii "lpa_tbl:\000" +.LC294: + .ascii "sblk %x vpn: %d %d\012\000" +.LC295: + .ascii "error gc_add_sblk: %x\012\000" +.LC296: + .ascii "%d read error: ppa:%x, lpa:%x, status:%x\012\000" +.LC297: + .ascii "gc page in buf: lpa %x ppa = %x pageindex= %x\012\000" +.LC298: + .ascii "gc_do_copy_back: lpa %x des_ppa = %x %x gc_ppa= %x " + .ascii "page_index= %d\012\000" +.LC299: + .ascii "gc %d: %d %d %d %d %d %d %d\012\000" +.LC300: + .ascii "GC_STATE_SCAN_ALL_PAGE = %x, vpn0 = %d, vpn1 = %d\012" + .ascii "\000" +.LC301: + .ascii "gc free %x, %d\012\000" +.LC302: + .ascii "_c_user_data_density := %d\012\000" +.LC303: + .ascii "_c_totle_phy_density := %d\012\000" +.LC304: + .ascii "_c_totle_log_page := %d\012\000" +.LC305: + .ascii "_c_totle_data_density := %d\012\000" +.LC306: + .ascii "_c_ftl_pm_page_num := %d\012\000" +.LC307: + .ascii "_c_ftl_byte_pre_page := %d\012\000" +.LC308: + .ascii "_c_max_pm_sblk := %d\012\000" +.LC309: + .ascii "_min_slc_super_block := %d\012\000" +.LC310: + .ascii "_max_xlc_super_block := %d\012\000" +.LC311: + .ascii "gp_ftl_ext_info %p %p %p\012\000" +.LC312: + .ascii "flash info size: %d %d %d\012\000" +.LC313: + .ascii "ftl_init %x\012\000" +.LC314: + .ascii "ftlwrite %x %x %x %x\012\000" +.LC315: + .ascii "ftl_discard:(%x, %x, %x, %x)\012\000" +.LC316: + .ascii "id_block_prog_msb_ff_data slc page = %d pageadd=%x " + .ascii "%x\012\000" +.LC317: + .ascii "write_idblock fix data %x %x\012\000" +.LC318: + .ascii "idblk:\000" +.LC319: + .ascii "write_idblock totle_sec %x %x\012\000" +.LC320: + .ascii "prog page: %x %x %x, %p %x %x %x\012\000" +.LC321: + .ascii "read page: %x %x %x %x\012\000" +.LC322: + .ascii "wl_lba %p %x %x %x\012\000" +.LC323: + .ascii "return ret = %lx\012\000" +.LC324: + .ascii "\0013vendor storage %x,%x,%x\012\000" diff --git a/drivers/rk_nand/rk_zftl_arm64.S b/drivers/rk_nand/rk_zftl_arm64.S new file mode 100644 index 00000000000..943e3711067 --- /dev/null +++ b/drivers/rk_nand/rk_zftl_arm64.S @@ -0,0 +1,35207 @@ +/* + * Copyright (c) 2016-2017, Fuzhou Rockchip Electronics Co., Ltd + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * date: 2021-07-16 + * function: rk ftl v6 for rockchip soc base on arm v8 to support 3D/2D + * TLC and MLC. + */ + .cpu generic+fp+simd + .file "rk_zftl_arm64.S" + .text + .align 2 + .type flash_mem_cmp8, %function +flash_mem_cmp8: + mov x3, 0 +.L2: + mov w4, w3 + cmp w3, w2 + bcc .L4 + mov w0, 0 + ret +.L4: + ldrb w5, [x0, x3] + add x3, x3, 1 + add x6, x1, x3 + ldrb w6, [x6, -1] + cmp w6, w5 + beq .L2 + add w0, w4, 1 + ret + .size flash_mem_cmp8, .-flash_mem_cmp8 + .align 2 + .type slc_phy_page_address_calc, %function +slc_phy_page_address_calc: + adrp x1, .LANCHOR0 + add x2, x1, :lo12:.LANCHOR0 + ldrb w3, [x1, #:lo12:.LANCHOR0] + cbz w3, .L7 + ldrb w2, [x2, 1] + cbz w2, .L8 +.L7: + add x1, x1, :lo12:.LANCHOR0 + ldrh w3, [x1, 2] + udiv w2, w0, w3 + mul w2, w2, w3 + ldrb w3, [x1, 1] + sub w0, w0, w2 + cbz w3, .L9 + add w0, w2, w0, lsl 1 + ret +.L9: + add x1, x1, 4 + ldrh w0, [x1, w0, uxtw 1] + add w0, w0, w2 +.L8: + ret + .size slc_phy_page_address_calc, .-slc_phy_page_address_calc + .align 2 + .global zftl_nandc_get_irq_status + .type zftl_nandc_get_irq_status, %function +zftl_nandc_get_irq_status: + adrp x1, .LANCHOR0+1028 + ldrb w1, [x1, #:lo12:.LANCHOR0+1028] + cmp w1, 9 + bne .L17 + ldr w0, [x0, 296] + ret +.L17: + ldr w0, [x0, 372] + ret + .size zftl_nandc_get_irq_status, .-zftl_nandc_get_irq_status + .section .text.unlikely,"ax",@progbits + .align 2 + .type isxdigit, %function +isxdigit: + and w1, w0, -33 + sub w1, w1, #65 + cmp w1, 25 + bls .L21 + sub w0, w0, #48 + cmp w0, 9 + cset w0, ls + ret +.L21: + mov w0, 1 + ret + .size isxdigit, .-isxdigit + .text + .align 2 + .global zftl_get_density + .type zftl_get_density, %function +zftl_get_density: + cbnz w0, .L23 + adrp x0, .LANCHOR0+1032 + ldr w0, [x0, #:lo12:.LANCHOR0+1032] + ret +.L23: + cmp w0, 4 + cset w0, cc + lsl w0, w0, 13 + ret + .size zftl_get_density, .-zftl_get_density + .align 2 + .type _list_remove_node, %function +_list_remove_node: + stp x29, x30, [sp, -64]! + and w1, w1, 65535 + mov w4, 6 + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x19, .LANCHOR0 + add x3, x19, :lo12:.LANCHOR0 + stp x21, x22, [sp, 32] + stp x23, x24, [sp, 48] + umull x21, w1, w4 + mov w1, 65535 + ldr x23, [x3, 1040] + add x20, x23, x21 + ldrh w4, [x23, x21] + ldrh w3, [x20, 2] + cmp w4, w1 + ldr x1, [x0] + bne .L27 + cmp w3, w4 + bne .L27 + cmp x20, x1 + bne .L26 +.L27: + mov x22, x0 + mov x24, x2 + mov w0, 65535 + cmp w3, w0 + bne .L29 + cmp x20, x1 + beq .L29 + adrp x1, .LANCHOR1 + add x1, x1, :lo12:.LANCHOR1 + mov w2, 202 + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack +.L29: + ldr x0, [x22] + ldrh w3, [x23, x21] + cmp x20, x0 + mov w0, 65535 + bne .L30 + cmp w3, w0 + bne .L31 + str xzr, [x22] +.L32: + mov w0, -1 + strh w0, [x23, x21] + strh w0, [x20, 2] + ldrh w0, [x24] + sub w0, w0, #1 + strh w0, [x24] +.L26: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x29, x30, [sp], 64 + ret +.L31: + add x19, x19, :lo12:.LANCHOR0 + mov w1, 6 + ldr x0, [x19, 1040] + umaddl x3, w3, w1, x0 + mov w0, -1 + str x3, [x22] + strh w0, [x3, 2] + b .L32 +.L30: + cmp w3, w0 + ldrh w0, [x20, 2] + bne .L33 + cmp w0, w3 + beq .L32 + add x19, x19, :lo12:.LANCHOR0 + mov w1, 6 + mov w2, -1 + umull x0, w0, w1 + ldr x1, [x19, 1040] +.L35: + strh w2, [x1, x0] + b .L32 +.L33: + add x19, x19, :lo12:.LANCHOR0 + mov w1, 6 + ldr x2, [x19, 1040] + umaddl x3, w3, w1, x2 + strh w0, [x3, 2] + ldrh w0, [x20, 2] + ldrh w2, [x23, x21] + umull x0, w0, w1 + ldr x1, [x19, 1040] + b .L35 + .size _list_remove_node, .-_list_remove_node + .align 2 + .type hynix_set_rr_para, %function +hynix_set_rr_para: + stp x29, x30, [sp, -64]! + adrp x3, .LANCHOR0 + add x3, x3, :lo12:.LANCHOR0 + and w1, w1, 255 + add x29, sp, 0 + stp x21, x22, [sp, 32] + and w0, w0, 255 + str x23, [sp, 48] + stp x19, x20, [sp, 16] + ldr x2, [x3, 1048] + ldr x19, [x3, 1056] + add x23, x2, 128 + add x21, x2, 112 + ldrb w22, [x2, 113] + ldrb w2, [x2, 112] + cmp w2, 8 + mov x2, 32 + umaddl x1, w1, w22, x2 + beq .L37 + mov w2, 160 + umaddl x1, w2, w0, x1 +.L37: + ubfiz x0, x0, 8, 8 + add x21, x21, x1 + add x19, x19, x0 + mov x20, 0 + mov w0, 54 + str w0, [x19, 2056] +.L39: + cmp w22, w20, uxtb + bhi .L40 + mov w0, 22 + str w0, [x19, 2056] + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldr x23, [sp, 48] + ldp x29, x30, [sp], 64 + ret +.L40: + ldrb w0, [x23, x20] + str w0, [x19, 2052] + mov x0, 600 + bl __const_udelay + ldrsb w0, [x21, x20] + add x20, x20, 1 + str w0, [x19, 2048] + b .L39 + .size hynix_set_rr_para, .-hynix_set_rr_para + .align 2 + .type zftl_debug_proc_open, %function +zftl_debug_proc_open: + stp x29, x30, [sp, -32]! + add x29, sp, 0 + str x19, [sp, 16] + mov x19, x1 + bl PDE_DATA + mov x2, x0 + adrp x1, zftl_debug_proc_show + mov x0, x19 + add x1, x1, :lo12:zftl_debug_proc_show + bl single_open + ldr x19, [sp, 16] + ldp x29, x30, [sp], 32 + ret + .size zftl_debug_proc_open, .-zftl_debug_proc_open + .align 2 + .type zftl_debug_proc_show, %function +zftl_debug_proc_show: + stp x29, x30, [sp, -32]! + adrp x2, .LC1 + adrp x1, .LC2 + add x2, x2, :lo12:.LC1 + add x29, sp, 0 + str x19, [sp, 16] + add x1, x1, :lo12:.LC2 + mov x19, x0 + bl seq_printf + adrp x0, .LANCHOR2 + adrp x1, .LC3 + add x1, x1, :lo12:.LC3 + ldr w2, [x0, #:lo12:.LANCHOR2] + mov x0, x19 + bl seq_printf + ldr x19, [sp, 16] + mov w0, 0 + ldp x29, x30, [sp], 32 + ret + .size zftl_debug_proc_show, .-zftl_debug_proc_show + .align 2 + .global zftl_flash_suspend + .type zftl_flash_suspend, %function +zftl_flash_suspend: + adrp x0, .LANCHOR0 + add x0, x0, :lo12:.LANCHOR0 + ldrb w1, [x0, 1028] + cmp w1, 9 + ldr x1, [x0, 1056] + ldr w2, [x1] + str w2, [x0, 1064] + ldr w2, [x1, 4] + str w2, [x0, 1068] + bne .L47 + ldr w2, [x1, 16] + str w2, [x0, 1072] + ldr w2, [x1, 32] + str w2, [x0, 1076] + ldr w2, [x1, 80] + str w2, [x0, 1080] + ldr w2, [x1, 84] + str w2, [x0, 1084] + ldr w2, [x1, 520] + ldr w1, [x1, 8] + str w2, [x0, 1088] +.L49: + str w1, [x0, 1092] + ret +.L47: + ldr w2, [x1, 8] + str w2, [x0, 1072] + ldr w2, [x1, 12] + str w2, [x0, 1076] + ldr w2, [x1, 304] + str w2, [x0, 1080] + ldr w2, [x1, 308] + str w2, [x0, 1084] + ldr w2, [x1, 336] + str w2, [x0, 1088] + ldr w1, [x1, 344] + b .L49 + .size zftl_flash_suspend, .-zftl_flash_suspend + .align 2 + .type nandc_irq_disable, %function +nandc_irq_disable: + adrp x2, .LANCHOR0+1028 + ldrb w2, [x2, #:lo12:.LANCHOR0+1028] + cmp w2, 9 + mov x2, 1 + bne .L51 + ldr w3, [x0, 292] + lsl x1, x2, x1 + orr w2, w3, w1 + str w2, [x0, 292] + ldr w2, [x0, 288] + bic w1, w2, w1 + str w1, [x0, 288] + ret +.L51: + ldr w3, [x0, 368] + lsl x1, x2, x1 + orr w2, w3, w1 + str w2, [x0, 368] + ldr w2, [x0, 364] + bic w1, w2, w1 + str w1, [x0, 364] + ret + .size nandc_irq_disable, .-nandc_irq_disable + .align 2 + .type _insert_free_list, %function +_insert_free_list: + adrp x9, .LANCHOR0 + add x3, x9, :lo12:.LANCHOR0 + and w1, w1, 65535 + ldrh w4, [x3, 1096] + cmp w4, w1 + bls .L53 + ldrh w4, [x2] + mov w6, 6 + add w4, w4, 1 + strh w4, [x2] + umull x10, w1, w6 + mov w2, -1 + ldr x11, [x3, 1040] + add x5, x11, x10 + strh w2, [x5, 2] + strh w2, [x11, x10] + ldr x2, [x0] + cbnz x2, .L55 +.L60: + str x5, [x0] + ret +.L55: + ldr x8, [x3, 1104] + ubfiz x7, x1, 2, 16 + ldrh w13, [x3, 1112] + mov w15, 65535 + ldr x14, [x3, 1040] + ldr w4, [x8, x7] + sub x3, x2, x14 + ldrh w7, [x8, x7] + asr x3, x3, 1 + and w7, w7, 2047 + ubfx x4, x4, 11, 8 + madd w4, w13, w4, w7 + mov x7, -6148914691236517206 + movk x7, 0xaaab, lsl 0 + and w4, w4, 65535 + mul x3, x3, x7 + mov w7, w6 + and w3, w3, 65535 +.L58: + ubfiz x12, x3, 2, 16 + ldr w6, [x8, x12] + ldrh w12, [x8, x12] + ubfx x6, x6, 11, 8 + and w12, w12, 2047 + madd w6, w13, w6, w12 + cmp w4, w6, uxth + bls .L56 + ldrh w6, [x2] + cmp w6, w15 + bne .L57 + strh w3, [x5, 2] + strh w1, [x2] + ret +.L57: + umaddl x2, w6, w7, x14 + mov w3, w6 + b .L58 +.L56: + ldrh w4, [x2, 2] + strh w4, [x5, 2] + strh w3, [x11, x10] + ldr x3, [x0] + cmp x2, x3 + bne .L59 + strh w1, [x2, 2] + b .L60 +.L59: + ldrh w0, [x2, 2] + add x3, x9, :lo12:.LANCHOR0 + mov w4, 6 + ldr x3, [x3, 1040] + umull x0, w0, w4 + strh w1, [x3, x0] + strh w1, [x2, 2] +.L53: + ret + .size _insert_free_list, .-_insert_free_list + .align 2 + .type _insert_data_list, %function +_insert_data_list: + adrp x9, .LANCHOR0 + add x5, x9, :lo12:.LANCHOR0 + and w1, w1, 65535 + ldrh w3, [x5, 1096] + cmp w3, w1 + bls .L83 + ldrh w3, [x2] + mov w11, 6 + add w3, w3, 1 + strh w3, [x2] + umull x11, w1, w11 + mov w2, -1 + ldr x13, [x5, 1040] + add x10, x13, x11 + strh w2, [x10, 2] + strh w2, [x13, x11] + ldr x2, [x0] + cbnz x2, .L64 + str x10, [x0] + ret +.L64: + stp x29, x30, [sp, -32]! + uxtw x4, w1 + add x29, sp, 0 + str x19, [sp, 16] + ldr x14, [x5, 1120] + ldrh w6, [x10, 4] + ldr x12, [x5, 1104] + ldrh w15, [x5, 1112] + ldrh w8, [x14, x4, lsl 1] + lsl x4, x4, 2 + ldr w3, [x12, x4] + mul w8, w8, w6 + ldrh w4, [x12, x4] + ubfx x3, x3, 11, 8 + and w4, w4, 2047 + cbz w8, .L65 + madd w3, w15, w3, w4 + add w8, w8, w3, uxth +.L65: + add x4, x9, :lo12:.LANCHOR0 + mov x5, -6148914691236517206 + movk x5, 0xaaab, lsl 0 + cmp w6, 0 + csinv w8, w8, wzr, ne + mov w19, 65535 + ldr x16, [x4, 1040] + mov w18, 6 + ldrh w30, [x4, 1096] + sub x3, x2, x16 + asr x3, x3, 1 + mul x3, x3, x5 + mov w5, 0 + and w3, w3, 65535 +.L71: + add w5, w5, 1 + and w5, w5, 65535 + cmp w5, w30 + bhi .L61 + cmp w1, w3 + beq .L61 + uxtw x7, w3 + ldrh w17, [x2, 4] + ldrh w4, [x14, x7, lsl 1] + lsl x7, x7, 2 + ldr w6, [x12, x7] + mul w4, w4, w17 + ldrh w7, [x12, x7] + ubfx x6, x6, 11, 8 + and w7, w7, 2047 + cbz w4, .L68 + madd w6, w15, w6, w7 + add w4, w4, w6, uxth +.L68: + cbz w17, .L69 + cmp w8, w4 + bls .L69 + ldrh w4, [x2] + cmp w4, w19 + bne .L70 + strh w3, [x10, 2] + strh w1, [x2] +.L61: + ldr x19, [sp, 16] + ldp x29, x30, [sp], 32 + ret +.L70: + umaddl x2, w4, w18, x16 + mov w3, w4 + b .L71 +.L69: + ldrh w4, [x2, 2] + strh w4, [x10, 2] + strh w3, [x13, x11] + ldr x3, [x0] + cmp x2, x3 + bne .L72 + strh w1, [x2, 2] + str x10, [x0] + b .L61 +.L72: + ldrh w0, [x2, 2] + add x9, x9, :lo12:.LANCHOR0 + mov w3, 6 + umull x0, w0, w3 + ldr x3, [x9, 1040] + strh w1, [x3, x0] + strh w1, [x2, 2] + b .L61 +.L83: + ret + .size _insert_data_list, .-_insert_data_list + .align 2 + .type _list_update_data_list, %function +_list_update_data_list: + stp x29, x30, [sp, -80]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + and w19, w1, 65535 + adrp x1, .LANCHOR0 + add x4, x1, :lo12:.LANCHOR0 + stp x21, x22, [sp, 32] + stp x23, x24, [sp, 48] + str x25, [sp, 64] + ldr x3, [x4, 1128] + ldrh w5, [x3, 16] + cmp w5, w19 + beq .L85 + mov x20, x1 + ldrh w1, [x3, 48] + cmp w1, w19 + beq .L85 + ldrh w1, [x3, 80] + cmp w1, w19 + beq .L85 + mov w23, 6 + ldr x25, [x4, 1040] + ldr x1, [x0] + umull x23, w19, w23 + add x24, x25, x23 + cmp x24, x1 + beq .L85 + mov x21, x0 + ldrh w0, [x24, 2] + mov w1, 65535 + mov x22, x2 + cmp w0, w1 + bne .L89 + ldrh w1, [x25, x23] + cmp w1, w0 + bne .L89 + adrp x1, .LANCHOR1 + add x1, x1, :lo12:.LANCHOR1 + add x1, x1, 24 + mov w2, 273 + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack +.L89: + ldrh w3, [x24, 2] + mov w0, 65535 + cmp w3, w0 + bne .L90 + ldrh w0, [x25, x23] + cmp w0, w3 + beq .L85 +.L90: + add x1, x20, :lo12:.LANCHOR0 + ubfiz x2, x19, 1, 16 + ldrh w4, [x24, 4] + mov x6, -6148914691236517206 + movk x6, 0xaaab, lsl 0 + mov w5, -1 + ldr x0, [x1, 1120] + cmp w4, 0 + ldr x1, [x1, 1040] + ldrh w2, [x0, x2] + mul w2, w2, w4 + mov w4, 6 + umull x3, w3, w4 + csel w2, w2, w5, ne + asr x4, x3, 1 + add x3, x1, x3 + mul x4, x4, x6 + ldrh w1, [x3, 4] + cmp w1, 0 + ldrh w0, [x0, x4, lsl 1] + mul w0, w0, w1 + csel w0, w0, w5, ne + cmp w2, w0 + bcs .L85 + mov x2, x22 + mov w1, w19 + mov x0, x21 + bl _list_remove_node + mov x2, x22 + mov w1, w19 + mov x0, x21 + bl _insert_data_list +.L85: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldr x25, [sp, 64] + ldp x29, x30, [sp], 80 + ret + .size _list_update_data_list, .-_list_update_data_list + .section .text.unlikely + .align 2 + .type rk_simple_strtoull.constprop.33, %function +rk_simple_strtoull.constprop.33: + stp x29, x30, [sp, -16]! + mov x3, x0 + mov x6, x1 + add x29, sp, 0 + ldrb w0, [x0] + cmp w0, 48 + bne .L107 + ldrb w0, [x3, 1] + add x2, x3, 1 + orr w0, w0, 32 + and w0, w0, 255 + cmp w0, 120 + bne .L109 + ldrb w0, [x3, 2] + bl isxdigit + cbz w0, .L109 + add x2, x3, 2 + mov w4, 16 +.L97: + mov w5, 0 +.L98: + ldrb w3, [x2] + mov w0, w3 + bl isxdigit + cbnz w0, .L99 +.L105: + cbnz x6, .L100 +.L96: + mov w0, w5 + ldp x29, x30, [sp], 16 + ret +.L107: + mov x2, x3 + mov w4, 10 + b .L97 +.L109: + mov w4, 8 + b .L97 +.L99: + sub w0, w3, #48 + cmp w0, 9 + bhi .L110 +.L106: + cmp w0, w4 + bcs .L105 + madd w5, w5, w4, w0 + add x2, x2, 1 + b .L98 +.L100: + str x2, [x6] + b .L96 +.L110: + orr w0, w3, 32 + sub w0, w0, #87 + b .L106 + .size rk_simple_strtoull.constprop.33, .-rk_simple_strtoull.constprop.33 + .text + .align 2 + .type nandc_de_cs.constprop.35, %function +nandc_de_cs.constprop.35: + adrp x0, .LANCHOR0+1056 + ldr x1, [x0, #:lo12:.LANCHOR0+1056] + ldr w0, [x1] + and w0, w0, -256 + and w0, w0, -131073 + str w0, [x1] + ret + .size nandc_de_cs.constprop.35, .-nandc_de_cs.constprop.35 + .align 2 + .global flash_read_status + .type flash_read_status, %function +flash_read_status: + stp x29, x30, [sp, -32]! + add x29, sp, 0 + str x19, [sp, 16] + mov x19, x0 + mov w0, 112 + str w0, [x19, 8] + mov x0, 600 + bl __const_udelay + ldr w0, [x19] + ldr x19, [sp, 16] + and w0, w0, 255 + ldp x29, x30, [sp], 32 + ret + .size flash_read_status, .-flash_read_status + .align 2 + .global toshiba_set_rr_para + .type toshiba_set_rr_para, %function +toshiba_set_rr_para: + stp x29, x30, [sp, -80]! + and w1, w1, 255 + add w2, w1, 1 + add x29, sp, 0 + stp x21, x22, [sp, 32] + mov x21, x0 + mov w0, 5 + stp x23, x24, [sp, 48] + stp x25, x26, [sp, 64] + adrp x22, .LANCHOR0 + umull x2, w2, w0 + adrp x0, .LANCHOR1 + add x0, x0, :lo12:.LANCHOR1 + stp x19, x20, [sp, 16] + add x25, x0, 48 + add x24, x0, 144 + add x25, x25, x2 + add x24, x24, x2 + add x22, x22, :lo12:.LANCHOR0 + mov x19, x0 + add x23, x0, w1, sxtw + mov x20, 0 + mov w26, 85 +.L116: + ldrb w0, [x22, 1137] + cmp w0, w20 + bhi .L120 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x29, x30, [sp], 80 + ret +.L120: + add x0, x19, 144 + str w26, [x21, 8] + ldrsb w0, [x20, x0] + str w0, [x21, 4] + mov x0, 1000 + bl __const_udelay + ldrb w0, [x22, 1136] + cmp w0, 34 + bne .L117 + ldrsb w0, [x24, x20] +.L122: + add x20, x20, 1 + str w0, [x21] + b .L116 +.L117: + cmp w0, 35 + bne .L119 + ldrsb w0, [x25, x20] + b .L122 +.L119: + ldrsb w0, [x23, 192] + b .L122 + .size toshiba_set_rr_para, .-toshiba_set_rr_para + .align 2 + .global hynix_reconfig_rr_para + .type hynix_reconfig_rr_para, %function +hynix_reconfig_rr_para: + stp x29, x30, [sp, -32]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x19, .LANCHOR0 + add x19, x19, :lo12:.LANCHOR0 + ldrb w1, [x19, 1136] + sub w1, w1, #1 + and w1, w1, 255 + cmp w1, 7 + bhi .L123 + and w0, w0, 255 + ldr x1, [x19, 1048] + sxtw x20, w0 + add x1, x1, x20 + ldrb w1, [x1, 120] + cbz w1, .L123 + mov w1, 0 + bl hynix_set_rr_para + ldr x0, [x19, 1048] + add x0, x0, x20 + strb wzr, [x0, 120] +.L123: + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 32 + ret + .size hynix_reconfig_rr_para, .-hynix_reconfig_rr_para + .align 2 + .global nand_flash_print_info + .type nand_flash_print_info, %function +nand_flash_print_info: + stp x29, x30, [sp, -32]! + add x29, sp, 0 + str x19, [sp, 16] + adrp x19, .LANCHOR2 + ldr w0, [x19, #:lo12:.LANCHOR2] + tbz x0, 12, .L130 + adrp x1, .LANCHOR1 + add x1, x1, :lo12:.LANCHOR1 + adrp x0, .LC4 + add x1, x1, 200 + add x0, x0, :lo12:.LC4 + bl printk +.L130: + ldr w0, [x19, #:lo12:.LANCHOR2] + tbz x0, 12, .L131 + adrp x0, .LANCHOR0+1144 + ldr x0, [x0, #:lo12:.LANCHOR0+1144] + ldrb w6, [x0, 6] + ldrb w5, [x0, 5] + ldrb w4, [x0, 4] + ldrb w3, [x0, 3] + ldrb w2, [x0, 2] + ldrb w1, [x0, 1] + adrp x0, .LC5 + add x0, x0, :lo12:.LC5 + bl printk +.L131: + ldr w0, [x19, #:lo12:.LANCHOR2] + tbz x0, 12, .L132 + adrp x0, .LANCHOR0+1144 + ldr x0, [x0, #:lo12:.LANCHOR0+1144] + ldrb w1, [x0, 8] + adrp x0, .LC6 + add x0, x0, :lo12:.LC6 + bl printk +.L132: + ldr w0, [x19, #:lo12:.LANCHOR2] + tbz x0, 12, .L133 + adrp x0, .LANCHOR0+1144 + ldr x0, [x0, #:lo12:.LANCHOR0+1144] + ldrb w1, [x0, 9] + adrp x0, .LC7 + add x0, x0, :lo12:.LC7 + bl printk +.L133: + ldr w0, [x19, #:lo12:.LANCHOR2] + tbz x0, 12, .L134 + adrp x0, .LANCHOR0+1144 + ldr x0, [x0, #:lo12:.LANCHOR0+1144] + ldrh w1, [x0, 10] + adrp x0, .LC8 + add x0, x0, :lo12:.LC8 + bl printk +.L134: + ldr w0, [x19, #:lo12:.LANCHOR2] + tbz x0, 12, .L135 + adrp x0, .LANCHOR0+1144 + ldr x0, [x0, #:lo12:.LANCHOR0+1144] + ldrb w1, [x0, 12] + adrp x0, .LC9 + add x0, x0, :lo12:.LC9 + bl printk +.L135: + ldr w0, [x19, #:lo12:.LANCHOR2] + tbz x0, 12, .L136 + adrp x0, .LANCHOR0+1144 + ldr x0, [x0, #:lo12:.LANCHOR0+1144] + ldrb w1, [x0, 13] + adrp x0, .LC10 + add x0, x0, :lo12:.LC10 + bl printk +.L136: + ldr w0, [x19, #:lo12:.LANCHOR2] + tbz x0, 12, .L137 + adrp x0, .LANCHOR0+1144 + ldr x0, [x0, #:lo12:.LANCHOR0+1144] + ldrh w1, [x0, 14] + adrp x0, .LC11 + add x0, x0, :lo12:.LC11 + bl printk +.L137: + ldr w0, [x19, #:lo12:.LANCHOR2] + tbz x0, 12, .L138 + adrp x0, .LANCHOR0+1144 + ldr x0, [x0, #:lo12:.LANCHOR0+1144] + ldrb w1, [x0, 23] + adrp x0, .LC12 + add x0, x0, :lo12:.LC12 + bl printk +.L138: + ldr w0, [x19, #:lo12:.LANCHOR2] + tbz x0, 12, .L139 + adrp x0, .LANCHOR0+1144 + ldr x0, [x0, #:lo12:.LANCHOR0+1144] + ldrb w1, [x0, 18] + adrp x0, .LC13 + add x0, x0, :lo12:.LC13 + bl printk +.L139: + ldr w0, [x19, #:lo12:.LANCHOR2] + tbz x0, 12, .L140 + adrp x0, .LANCHOR0+1144 + ldr x0, [x0, #:lo12:.LANCHOR0+1144] + ldrb w1, [x0, 19] + adrp x0, .LC14 + add x0, x0, :lo12:.LC14 + bl printk +.L140: + ldr w0, [x19, #:lo12:.LANCHOR2] + tbz x0, 12, .L141 + adrp x0, .LANCHOR0+1144 + ldr x0, [x0, #:lo12:.LANCHOR0+1144] + ldrb w1, [x0, 20] + adrp x0, .LC15 + add x0, x0, :lo12:.LC15 + bl printk +.L141: + ldr w0, [x19, #:lo12:.LANCHOR2] + tbz x0, 12, .L142 + adrp x0, .LANCHOR0+1152 + ldrb w1, [x0, #:lo12:.LANCHOR0+1152] + adrp x0, .LC16 + add x0, x0, :lo12:.LC16 + bl printk +.L142: + ldr w0, [x19, #:lo12:.LANCHOR2] + tbz x0, 12, .L143 + adrp x0, .LANCHOR0+1144 + ldr x0, [x0, #:lo12:.LANCHOR0+1144] + ldrb w1, [x0, 22] + adrp x0, .LC17 + add x0, x0, :lo12:.LC17 + bl printk +.L143: + ldr w0, [x19, #:lo12:.LANCHOR2] + tbz x0, 12, .L144 + adrp x0, .LANCHOR0+1153 + ldrb w1, [x0, #:lo12:.LANCHOR0+1153] + adrp x0, .LC18 + add x0, x0, :lo12:.LC18 + bl printk +.L144: + ldr w0, [x19, #:lo12:.LANCHOR2] + tbz x0, 12, .L145 + adrp x0, .LANCHOR0+1144 + ldr x0, [x0, #:lo12:.LANCHOR0+1144] + ldrb w1, [x0, 16] + adrp x0, .LC19 + add x0, x0, :lo12:.LC19 + and w1, w1, 1 + bl printk +.L145: + ldr w0, [x19, #:lo12:.LANCHOR2] + tbz x0, 12, .L146 + adrp x0, .LANCHOR0+1144 + ldr x0, [x0, #:lo12:.LANCHOR0+1144] + ldrh w1, [x0, 16] + adrp x0, .LC20 + add x0, x0, :lo12:.LC20 + ubfx x1, x1, 1, 1 + bl printk +.L146: + ldr w0, [x19, #:lo12:.LANCHOR2] + tbz x0, 12, .L147 + adrp x0, .LANCHOR0+1144 + ldr x0, [x0, #:lo12:.LANCHOR0+1144] + ldrh w1, [x0, 16] + adrp x0, .LC21 + add x0, x0, :lo12:.LC21 + ubfx x1, x1, 2, 1 + bl printk +.L147: + ldr w0, [x19, #:lo12:.LANCHOR2] + tbz x0, 12, .L148 + adrp x0, .LANCHOR0+1144 + ldr x0, [x0, #:lo12:.LANCHOR0+1144] + ldrh w1, [x0, 16] + adrp x0, .LC22 + add x0, x0, :lo12:.LC22 + ubfx x1, x1, 3, 1 + bl printk +.L148: + ldr w0, [x19, #:lo12:.LANCHOR2] + tbz x0, 12, .L149 + adrp x0, .LANCHOR0+1144 + ldr x0, [x0, #:lo12:.LANCHOR0+1144] + ldrh w1, [x0, 16] + adrp x0, .LC23 + add x0, x0, :lo12:.LC23 + ubfx x1, x1, 4, 1 + bl printk +.L149: + ldr w0, [x19, #:lo12:.LANCHOR2] + tbz x0, 12, .L150 + adrp x0, .LANCHOR0+1144 + ldr x0, [x0, #:lo12:.LANCHOR0+1144] + ldrh w1, [x0, 16] + adrp x0, .LC24 + add x0, x0, :lo12:.LC24 + ubfx x1, x1, 5, 1 + bl printk +.L150: + ldr w0, [x19, #:lo12:.LANCHOR2] + tbz x0, 12, .L151 + adrp x0, .LANCHOR0+1144 + ldr x0, [x0, #:lo12:.LANCHOR0+1144] + ldrh w1, [x0, 16] + adrp x0, .LC25 + add x0, x0, :lo12:.LC25 + ubfx x1, x1, 6, 1 + bl printk +.L151: + ldr w0, [x19, #:lo12:.LANCHOR2] + tbz x0, 12, .L152 + adrp x0, .LANCHOR0+1144 + ldr x0, [x0, #:lo12:.LANCHOR0+1144] + ldrh w1, [x0, 16] + adrp x0, .LC26 + add x0, x0, :lo12:.LC26 + ubfx x1, x1, 7, 1 + bl printk +.L152: + ldr w0, [x19, #:lo12:.LANCHOR2] + tbz x0, 12, .L153 + adrp x0, .LANCHOR0+1144 + ldr x0, [x0, #:lo12:.LANCHOR0+1144] + ldrb w1, [x0, 17] + adrp x0, .LC27 + add x0, x0, :lo12:.LC27 + and w1, w1, 1 + bl printk +.L153: + ldr w0, [x19, #:lo12:.LANCHOR2] + tbz x0, 12, .L154 + adrp x0, .LANCHOR0+1144 + ldr x0, [x0, #:lo12:.LANCHOR0+1144] + ldrh w1, [x0, 16] + adrp x0, .LC28 + add x0, x0, :lo12:.LC28 + ubfx x1, x1, 9, 1 + bl printk +.L154: + ldr w0, [x19, #:lo12:.LANCHOR2] + tbz x0, 12, .L155 + adrp x0, .LANCHOR0+1144 + ldr x0, [x0, #:lo12:.LANCHOR0+1144] + ldrh w1, [x0, 16] + adrp x0, .LC29 + add x0, x0, :lo12:.LC29 + ubfx x1, x1, 10, 1 + bl printk +.L155: + ldr w0, [x19, #:lo12:.LANCHOR2] + tbz x0, 12, .L156 + adrp x0, .LANCHOR0 + add x1, x0, :lo12:.LANCHOR0 + ldrb w2, [x1, 1154] + ldrb w1, [x0, #:lo12:.LANCHOR0] + adrp x0, .LC30 + add x0, x0, :lo12:.LC30 + bl printk +.L156: + ldr w0, [x19, #:lo12:.LANCHOR2] + tbz x0, 12, .L157 + adrp x0, .LANCHOR0 + add x0, x0, :lo12:.LANCHOR0 + ldrb w2, [x0, 1171] + ldrb w1, [x0, 1170] + adrp x0, .LC31 + add x0, x0, :lo12:.LC31 + bl printk +.L157: + ldr w0, [x19, #:lo12:.LANCHOR2] + tbz x0, 12, .L158 + adrp x0, .LANCHOR0 + add x0, x0, :lo12:.LANCHOR0 + ldrb w2, [x0, 1169] + ldrb w1, [x0, 1168] + adrp x0, .LC32 + add x0, x0, :lo12:.LC32 + bl printk +.L158: + ldr w0, [x19, #:lo12:.LANCHOR2] + tbz x0, 12, .L129 + adrp x0, .LANCHOR0+1192 + ldrb w1, [x0, #:lo12:.LANCHOR0+1192] + adrp x0, .LC33 + add x0, x0, :lo12:.LC33 + bl printk +.L129: + ldr x19, [sp, 16] + ldp x29, x30, [sp], 32 + ret + .size nand_flash_print_info, .-nand_flash_print_info + .align 2 + .global timer_delay_ns + .type timer_delay_ns, %function +timer_delay_ns: + stp x29, x30, [sp, -16]! + uxtw x0, w0 + add x29, sp, 0 + bl __ndelay + ldp x29, x30, [sp], 16 + ret + .size timer_delay_ns, .-timer_delay_ns + .align 2 + .global nandc_set_ddr_para + .type nandc_set_ddr_para, %function +nandc_set_ddr_para: + adrp x2, .LANCHOR0 + add x2, x2, :lo12:.LANCHOR0 + and w0, w0, 255 + ldrb w1, [x2, 1028] + ldr x2, [x2, 1056] + cmp w1, 9 + lsl w1, w0, 16 + lsl w0, w0, 8 + orr w1, w1, w0 + orr w1, w1, 3 + bne .L254 + str w1, [x2, 80] + ret +.L254: + str w1, [x2, 304] + ret + .size nandc_set_ddr_para, .-nandc_set_ddr_para + .align 2 + .global nandc_get_ddr_para + .type nandc_get_ddr_para, %function +nandc_get_ddr_para: + adrp x0, .LANCHOR0 + add x0, x0, :lo12:.LANCHOR0 + ldrb w1, [x0, 1028] + ldr x0, [x0, 1056] + cmp w1, 9 + bne .L257 + ldr w0, [x0, 80] +.L259: + ubfx x0, x0, 8, 8 + ret +.L257: + ldr w0, [x0, 304] + b .L259 + .size nandc_get_ddr_para, .-nandc_get_ddr_para + .align 2 + .global nandc_set_if_mode + .type nandc_set_if_mode, %function +nandc_set_if_mode: + adrp x3, .LANCHOR0 + add x3, x3, :lo12:.LANCHOR0 + and w0, w0, 255 + tst w0, 6 + ldr x2, [x3, 1056] + ldr w1, [x2] + beq .L261 + orr w1, w1, 24576 + tst x0, 4 + and w1, w1, -32769 + ldrb w0, [x3, 1028] + orr w1, w1, 196608 + mov w3, 8321 + orr w4, w1, 32768 + csel w1, w4, w1, ne + cmp w0, 9 + mov w0, 4099 + movk w0, 0x10, lsl 16 + bne .L263 + str w3, [x2, 8] + str w0, [x2, 80] + mov w0, 38 + str w0, [x2, 84] + mov w0, 39 + str w0, [x2, 84] +.L264: + str w1, [x2] + ret +.L263: + str w3, [x2, 344] + str w0, [x2, 304] + mov w0, 38 + str w0, [x2, 308] + mov w0, 39 + str w0, [x2, 308] + b .L264 +.L261: + and w1, w1, -8193 + b .L264 + .size nandc_set_if_mode, .-nandc_set_if_mode + .align 2 + .global nandc_cs + .type nandc_cs, %function +nandc_cs: + adrp x1, .LANCHOR0+1056 + mov w2, 1 + lsl w0, w2, w0 + ldr x3, [x1, #:lo12:.LANCHOR0+1056] + ldr w1, [x3] + bfi w1, w0, 0, 8 + str w1, [x3] + ret + .size nandc_cs, .-nandc_cs + .align 2 + .global flash_wait_device_ready_raw + .type flash_wait_device_ready_raw, %function +flash_wait_device_ready_raw: + stp x29, x30, [sp, -96]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + and w20, w0, 255 + stp x23, x24, [sp, 48] + mov w24, w2 + adrp x2, .LANCHOR0 + add x0, x2, :lo12:.LANCHOR0 + stp x21, x22, [sp, 32] + mov x19, x2 + stp x25, x26, [sp, 64] + mov w21, w1 + str x27, [sp, 80] + ldrb w0, [x0, 1153] + cmp w0, w20 + bhi .L269 + adrp x1, .LANCHOR1 + add x1, x1, :lo12:.LANCHOR1 + add x1, x1, 224 + mov w2, 812 + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack +.L269: + add x2, x19, :lo12:.LANCHOR0 + lsr w23, w21, 8 + add x20, x2, w20, sxtw + lsr w25, w21, 16 + lsr w26, w21, 24 + and w21, w21, 255 + ldr x19, [x2, 1056] + mov w27, 120 + ldrb w22, [x20, 1196] + mov x20, x2 + ubfiz x0, x22, 8, 8 + add x19, x19, x0 +.L275: + mov w0, w22 + bl nandc_cs + str w27, [x19, 2056] + str w21, [x19, 2052] + ldrb w0, [x20, 1204] + str w23, [x19, 2052] + str w25, [x19, 2052] + cbz w0, .L270 + str w26, [x19, 2052] +.L270: + mov x0, 600 + bl __const_udelay + ldr w2, [x19, 2048] + and w2, w2, 255 + bl nandc_de_cs.constprop.35 + bics wzr, w24, w2 + bne .L275 + cmp w2, 255 + beq .L275 + mov w0, w2 + ldr x27, [sp, 80] + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x29, x30, [sp], 96 + ret + .size flash_wait_device_ready_raw, .-flash_wait_device_ready_raw + .align 2 + .global flash_wait_device_ready + .type flash_wait_device_ready, %function +flash_wait_device_ready: + adrp x4, .LANCHOR0 + add x7, x4, :lo12:.LANCHOR0 + stp x29, x30, [sp, -16]! + mov w6, 24 + mov w5, 1 + mov w2, w1 + add x29, sp, 0 + ldrb w8, [x7, 1205] + tst x0, 50331648 + sub w6, w6, w8 + lsl w3, w5, w6 + sub w3, w3, #1 + lsl w5, w5, w8 + sub w5, w5, #1 + asr w6, w0, w6 + and w5, w5, w6 + and w1, w3, w0 + and w5, w5, 255 + bne .L280 + ldrb w0, [x4, #:lo12:.LANCHOR0] + cbz w0, .L281 + ldrb w0, [x7, 1] + cbz w0, .L280 +.L281: + add x4, x4, :lo12:.LANCHOR0 + ldrh w3, [x4, 2] + udiv w0, w1, w3 + mul w0, w0, w3 + sub w3, w1, w0 + ldrb w1, [x4, 1] + cbz w1, .L282 + add w1, w0, w3, lsl 1 +.L280: + mov w0, w5 + bl flash_wait_device_ready_raw + ldp x29, x30, [sp], 16 + ret +.L282: + add x4, x4, 4 + ldrh w3, [x4, w3, uxtw 1] + add w1, w3, w0 + b .L280 + .size flash_wait_device_ready, .-flash_wait_device_ready + .align 2 + .global nandc_de_cs + .type nandc_de_cs, %function +nandc_de_cs: + adrp x0, .LANCHOR0+1056 + ldr x1, [x0, #:lo12:.LANCHOR0+1056] + ldr w0, [x1] + and w0, w0, -256 + and w0, w0, -131073 + str w0, [x1] + ret + .size nandc_de_cs, .-nandc_de_cs + .align 2 + .global nandc_wait_flash_ready_no_delay + .type nandc_wait_flash_ready_no_delay, %function +nandc_wait_flash_ready_no_delay: + stp x29, x30, [sp, -48]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + mov w19, 34464 + adrp x20, .LANCHOR0 + add x20, x20, :lo12:.LANCHOR0 + movk w19, 0x1, lsl 16 +.L293: + ldr x0, [x20, 1056] + ldr w0, [x0] + str w0, [x29, 40] + ldr w0, [x29, 40] + tbnz x0, 9, .L294 + mov x0, 50 + bl __const_udelay + subs w19, w19, #1 + bne .L293 + mov w0, -1 +.L291: + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 48 + ret +.L294: + mov w0, 0 + b .L291 + .size nandc_wait_flash_ready_no_delay, .-nandc_wait_flash_ready_no_delay + .align 2 + .global zftl_flash_enter_slc_mode + .type zftl_flash_enter_slc_mode, %function +zftl_flash_enter_slc_mode: + stp x29, x30, [sp, -48]! + adrp x1, .LANCHOR0 + add x29, sp, 0 + stp x19, x20, [sp, 16] + and x19, x0, 255 + add x0, x1, :lo12:.LANCHOR0 + ldrb w1, [x1, #:lo12:.LANCHOR0] + str x21, [sp, 32] + cbz w1, .L297 + cmp w1, 1 + ldr x20, [x0, 1056] + bne .L300 + adrp x0, .LANCHOR2+37 + ldrb w0, [x0, #:lo12:.LANCHOR2+37] + cbz w0, .L297 +.L316: + add x19, x19, 8 + add x19, x20, x19, lsl 8 + str w0, [x19, 8] +.L297: + ldp x19, x20, [sp, 16] + ldr x21, [sp, 32] + ldp x29, x30, [sp], 48 + ret +.L300: + cmp w1, 2 + bne .L302 + add x0, x0, x19 + ldrb w1, [x0, 1208] + cbz w1, .L297 + adrp x21, .LANCHOR2 + add x21, x21, :lo12:.LANCHOR2 + strb wzr, [x0, 1208] + add x21, x21, 8 + ldrb w0, [x21, 29] + cbz w0, .L297 + bl nandc_wait_flash_ready_no_delay + ldrb w0, [x21, 29] + b .L316 +.L302: + cmp w1, 3 + bne .L297 + add x21, x0, w19, sxtw + ldrb w0, [x21, 1208] + cbz w0, .L297 + ubfiz x19, x19, 8, 8 + bl nandc_wait_flash_ready_no_delay + add x19, x20, x19 + mov w0, 239 + strb wzr, [x21, 1208] + str w0, [x19, 2056] + mov w0, 145 + str w0, [x19, 2052] + mov x0, 500 + bl __const_udelay + str wzr, [x19, 2048] + mov w0, 1 + str w0, [x19, 2048] + str wzr, [x19, 2048] + mov x0, 750 + str wzr, [x19, 2048] + bl __const_udelay + bl nandc_wait_flash_ready_no_delay + mov w0, 218 + str w0, [x19, 2056] + mov x0, 250 + bl __const_udelay + b .L297 + .size zftl_flash_enter_slc_mode, .-zftl_flash_enter_slc_mode + .align 2 + .global zftl_flash_exit_slc_mode + .type zftl_flash_exit_slc_mode, %function +zftl_flash_exit_slc_mode: + stp x29, x30, [sp, -48]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + and x19, x0, 255 + adrp x0, .LANCHOR0 + stp x21, x22, [sp, 32] + add x21, x0, :lo12:.LANCHOR0 + ldrb w0, [x0, #:lo12:.LANCHOR0] + cbz w0, .L317 + cmp w0, 1 + ldr x20, [x21, 1056] + bne .L320 + adrp x0, .LANCHOR2+38 + ldrb w0, [x0, #:lo12:.LANCHOR2+38] + cbz w0, .L317 +.L338: + add x19, x19, 8 + add x19, x20, x19, lsl 8 + str w0, [x19, 8] +.L317: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x29, x30, [sp], 48 + ret +.L320: + cmp w0, 2 + bne .L322 + add x21, x21, x19 + ldrb w0, [x21, 1208] + cbnz w0, .L317 + adrp x22, .LANCHOR2 + add x22, x22, :lo12:.LANCHOR2 + mov w1, 4 + add x22, x22, 8 + ldrb w0, [x22, 12] + cmp w0, 2 + csel w0, w0, w1, eq + strb w0, [x21, 1208] + ldrb w0, [x22, 30] + cbz w0, .L317 + bl nandc_wait_flash_ready_no_delay + ldrb w0, [x22, 30] + b .L338 +.L322: + cmp w0, 3 + bne .L317 + add x21, x21, w19, sxtw + ldrb w0, [x21, 1208] + cbnz w0, .L317 + adrp x22, .LANCHOR2 + add x22, x22, :lo12:.LANCHOR2 + bl nandc_wait_flash_ready_no_delay + ubfiz x19, x19, 8, 8 + add x19, x20, x19 + mov w1, 4 + ldrb w0, [x22, 20] + cmp w0, 2 + csel w0, w0, w1, eq + strb w0, [x21, 1208] + mov w0, 239 + str w0, [x19, 2056] + mov w0, 145 + str w0, [x19, 2052] + mov x0, 500 + bl __const_udelay + ldrb w0, [x22, 15] + cmp w0, 9 + mov w0, 1 + bne .L325 + str w0, [x19, 2048] +.L326: + str w0, [x19, 2048] + mov x0, 750 + str wzr, [x19, 2048] + str wzr, [x19, 2048] + bl __const_udelay + bl nandc_wait_flash_ready_no_delay + mov w0, 223 + str w0, [x19, 2056] + mov x0, 250 + bl __const_udelay + b .L317 +.L325: + ldrb w1, [x21, 1208] + str w1, [x19, 2048] + b .L326 + .size zftl_flash_exit_slc_mode, .-zftl_flash_exit_slc_mode + .align 2 + .global flash_start_page_read + .type flash_start_page_read, %function +flash_start_page_read: + stp x29, x30, [sp, -64]! + add x29, sp, 0 + stp x21, x22, [sp, 32] + and w21, w0, 255 + adrp x22, .LANCHOR0 + add x0, x22, :lo12:.LANCHOR0 + stp x19, x20, [sp, 16] + mov w19, 24 + stp x23, x24, [sp, 48] + mov w23, w1 + mov w20, 1 + ldrb w1, [x0, 1205] + ldrb w0, [x0, 1153] + sub w24, w19, w1 + lsl w20, w20, w1 + sub w20, w20, #1 + lsr w1, w23, w24 + and w20, w20, w1 + and w20, w20, 255 + cmp w0, w20 + bhi .L340 + adrp x1, .LANCHOR1 + add x1, x1, :lo12:.LANCHOR1 + add x1, x1, 256 + mov w2, 1013 + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack +.L340: + add x5, x22, :lo12:.LANCHOR0 + ldrb w0, [x5, 1153] + cmp w0, w20 + bls .L339 + add x20, x5, w20, sxtw + mov w19, 1 + ubfx x4, x23, 24, 2 + lsl w19, w19, w24 + sub w19, w19, #1 + and w19, w19, w23 + ldrb w23, [x20, 1196] + ldr x20, [x5, 1056] + mov w0, w23 + bl nandc_cs + cbnz w4, .L342 + mov w0, w19 + bl slc_phy_page_address_calc + mov w19, w0 + ldrb w0, [x22, #:lo12:.LANCHOR0] + cbz w0, .L343 + mov w0, w23 + bl zftl_flash_enter_slc_mode +.L343: + add x0, x22, :lo12:.LANCHOR0 + ldr x0, [x0, 1144] + ldrb w1, [x0, 7] + cmp w1, 1 + bne .L345 + ldrb w0, [x0, 12] + cmp w0, 2 + bne .L345 + sxtw x0, w23 + mov w1, 38 + add x0, x0, 8 + add x0, x20, x0, lsl 8 + str w1, [x0, 8] +.L345: + ubfiz x0, x23, 8, 8 + and w1, w19, 255 + add x0, x20, x0 + add x22, x22, :lo12:.LANCHOR0 + str wzr, [x0, 2056] + str wzr, [x0, 2052] + str wzr, [x0, 2052] + str w1, [x0, 2052] + lsr w1, w19, 8 + str w1, [x0, 2052] + lsr w1, w19, 16 + str w1, [x0, 2052] + ldrb w1, [x22, 1204] + cbz w1, .L346 + lsr w19, w19, 24 + str w19, [x0, 2052] +.L346: + str w21, [x0, 2056] +.L339: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x29, x30, [sp], 64 + ret +.L342: + ldr x0, [x5, 1144] + ldrb w0, [x0, 12] + cmp w0, 3 + bne .L344 + ldrb w0, [x5, 1212] + cbnz w0, .L344 + ldrb w0, [x5, 1213] + cbnz w0, .L344 + sxtw x0, w23 + add x0, x0, 8 + add x0, x20, x0, lsl 8 + str w4, [x0, 8] + b .L343 +.L344: + mov w0, w23 + bl zftl_flash_exit_slc_mode + b .L343 + .size flash_start_page_read, .-flash_start_page_read + .align 2 + .global nandc_wait_flash_ready + .type nandc_wait_flash_ready, %function +nandc_wait_flash_ready: + stp x29, x30, [sp, -48]! + mov x0, 750 + add x29, sp, 0 + stp x19, x20, [sp, 16] + mov w19, 34464 + adrp x20, .LANCHOR0 + add x20, x20, :lo12:.LANCHOR0 + movk w19, 0x1, lsl 16 + bl __const_udelay +.L356: + ldr x0, [x20, 1056] + ldr w0, [x0] + str w0, [x29, 40] + ldr w0, [x29, 40] + tbnz x0, 9, .L357 + mov x0, 50 + bl __const_udelay + subs w19, w19, #1 + bne .L356 + mov w0, -1 +.L354: + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 48 + ret +.L357: + mov w0, 0 + b .L354 + .size nandc_wait_flash_ready, .-nandc_wait_flash_ready + .align 2 + .global sandisk_set_rr_para + .type sandisk_set_rr_para, %function +sandisk_set_rr_para: + stp x29, x30, [sp, -32]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + mov x20, x0 + mov w0, 239 + and w19, w1, 255 + str w0, [x20, 8] + mov w0, 17 + str w0, [x20, 4] + mov x0, 1000 + bl __const_udelay + add w1, w19, 1 + mov w0, 5 + adrp x2, .LANCHOR0 + add x2, x2, :lo12:.LANCHOR0 + umull x1, w1, w0 + adrp x0, .LANCHOR1 + add x0, x0, :lo12:.LANCHOR1 + add x3, x0, 48 + add x0, x0, 144 + add x3, x3, x1 + add x0, x0, x1 + mov x1, 0 +.L361: + ldrb w4, [x2, 1137] + cmp w4, w1 + bhi .L364 + bl nandc_wait_flash_ready + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 32 + ret +.L364: + ldrb w4, [x2, 1136] + cmp w4, 67 + bne .L362 + ldrsb w4, [x0, x1] +.L366: + add x1, x1, 1 + str w4, [x20] + b .L361 +.L362: + ldrsb w4, [x3, x1] + b .L366 + .size sandisk_set_rr_para, .-sandisk_set_rr_para + .align 2 + .global toshiba_3d_set_tlc_rr_para + .type toshiba_3d_set_tlc_rr_para, %function +toshiba_3d_set_tlc_rr_para: + stp x29, x30, [sp, -48]! + and x2, x1, 255 + mov x1, 7 + add x29, sp, 0 + stp x19, x20, [sp, 16] + mov x19, x0 + str x21, [sp, 32] + mov w21, 213 + mov w0, -119 + madd x1, x2, x1, x1 + str w21, [x19, 8] + str wzr, [x19, 4] + str w0, [x19, 4] + adrp x0, .LANCHOR1 + add x0, x0, :lo12:.LANCHOR1 + add x0, x0, 280 + add x20, x0, x1 + ldrsb w0, [x0, x1] + str w0, [x19] + ldrsb w0, [x20, 1] + str w0, [x19] + ldrsb w0, [x20, 2] + str w0, [x19] + ldrsb w0, [x20, 3] + str w0, [x19] + bl nandc_wait_flash_ready + str w21, [x19, 8] + str wzr, [x19, 4] + mov w0, -118 + str w0, [x19, 4] + ldrsb w0, [x20, 4] + str w0, [x19] + ldrsb w0, [x20, 5] + str w0, [x19] + ldrsb w0, [x20, 6] + str w0, [x19] + str wzr, [x19] + bl nandc_wait_flash_ready + ldr x21, [sp, 32] + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 48 + ret + .size toshiba_3d_set_tlc_rr_para, .-toshiba_3d_set_tlc_rr_para + .align 2 + .global toshiba_3d_set_slc_rr_para + .type toshiba_3d_set_slc_rr_para, %function +toshiba_3d_set_slc_rr_para: + stp x29, x30, [sp, -16]! + mov w2, 213 + add x29, sp, 0 + str w2, [x0, 8] + mov w2, -117 + str wzr, [x0, 4] + str w2, [x0, 4] + adrp x2, .LANCHOR1 + add x2, x2, :lo12:.LANCHOR1 + add x1, x2, w1, uxtb + ldrsb w1, [x1, 681] + str w1, [x0] + str wzr, [x0] + str wzr, [x0] + str wzr, [x0] + bl nandc_wait_flash_ready + ldp x29, x30, [sp], 16 + ret + .size toshiba_3d_set_slc_rr_para, .-toshiba_3d_set_slc_rr_para + .align 2 + .global toshiba_tlc_set_rr_para + .type toshiba_tlc_set_rr_para, %function +toshiba_tlc_set_rr_para: + stp x29, x30, [sp, -48]! + uxtw x1, w1 + add x29, sp, 0 + stp x19, x20, [sp, 16] + mov x19, x0 + str x21, [sp, 32] + mov w21, 239 + adrp x0, .LANCHOR2 + str w21, [x19, 8] + cbz w2, .L372 + mov w2, 18 + str w2, [x19, 4] + mov x2, 7 + add x0, x0, :lo12:.LANCHOR2 + add x0, x0, 40 + mul x1, x1, x2 + add x20, x0, x1 + ldrb w0, [x0, x1] + str w0, [x19] + ldrb w0, [x20, 1] + str w0, [x19] + ldrb w0, [x20, 2] + str w0, [x19] + ldrb w0, [x20, 3] + str w0, [x19] + bl nandc_wait_flash_ready + str w21, [x19, 8] + mov w0, 19 + str w0, [x19, 4] + ldrb w0, [x20, 4] + str w0, [x19] + ldrb w0, [x20, 5] + str w0, [x19] + ldrb w0, [x20, 6] + str w0, [x19] +.L375: + str wzr, [x19] + bl nandc_wait_flash_ready + ldr x21, [sp, 32] + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 48 + ret +.L372: + add x0, x0, :lo12:.LANCHOR2 + mov w2, 20 + add x0, x0, 376 + str w2, [x19, 4] + ldrb w0, [x0, x1] + str w0, [x19] + str wzr, [x19] + str wzr, [x19] + b .L375 + .size toshiba_tlc_set_rr_para, .-toshiba_tlc_set_rr_para + .align 2 + .global ymtc_3d_set_tlc_rr_para + .type ymtc_3d_set_tlc_rr_para, %function +ymtc_3d_set_tlc_rr_para: + stp x29, x30, [sp, -48]! + and x1, x1, 255 + mov x2, 7 + add x29, sp, 0 + stp x19, x20, [sp, 16] + mov x19, x0 + str x21, [sp, 32] + mov w0, 160 + mov w21, 239 + mul x1, x1, x2 + str w21, [x19, 8] + str w0, [x19, 4] + adrp x0, .LANCHOR1 + add x0, x0, :lo12:.LANCHOR1 + add x0, x0, 696 + add x20, x0, x1 + ldrsb w0, [x0, x1] + str w0, [x19] + ldrsb w0, [x20, 4] + str w0, [x19] + str wzr, [x19] + str wzr, [x19] + bl nandc_wait_flash_ready + str w21, [x19, 8] + mov w0, 161 + str w0, [x19, 4] + ldrsb w0, [x20, 1] + str w0, [x19] + ldrsb w0, [x20, 3] + str w0, [x19] + ldrsb w0, [x20, 5] + str w0, [x19] + str wzr, [x19] + bl nandc_wait_flash_ready + str w21, [x19, 8] + mov w0, 162 + str w0, [x19, 4] + ldrsb w0, [x20, 2] + str w0, [x19] + ldrsb w0, [x20, 6] + str w0, [x19] + str wzr, [x19] + str wzr, [x19] + bl nandc_wait_flash_ready + ldr x21, [sp, 32] + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 48 + ret + .size ymtc_3d_set_tlc_rr_para, .-ymtc_3d_set_tlc_rr_para + .align 2 + .global ymtc_3d_set_slc_rr_para + .type ymtc_3d_set_slc_rr_para, %function +ymtc_3d_set_slc_rr_para: + stp x29, x30, [sp, -16]! + mov w2, 239 + and x1, x1, 255 + add x29, sp, 0 + str w2, [x0, 8] + mov w2, 163 + str w2, [x0, 4] + adrp x2, .LANCHOR1 + add x2, x2, :lo12:.LANCHOR1 + add x2, x2, 1056 + ldrsb w1, [x2, x1] + str w1, [x0] + str wzr, [x0] + str wzr, [x0] + str wzr, [x0] + bl nandc_wait_flash_ready + ldp x29, x30, [sp], 16 + ret + .size ymtc_3d_set_slc_rr_para, .-ymtc_3d_set_slc_rr_para + .align 2 + .global flash_start_plane_read + .type flash_start_plane_read, %function +flash_start_plane_read: + stp x29, x30, [sp, -96]! + mov w3, 24 + mov w2, 1 + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x20, .LANCHOR0 + add x4, x20, :lo12:.LANCHOR0 + stp x21, x22, [sp, 32] + stp x23, x24, [sp, 48] + ubfx x24, x0, 24, 2 + stp x25, x26, [sp, 64] + stp x27, x28, [sp, 80] + ldrb w19, [x4, 1205] + sub w3, w3, w19 + lsl w19, w2, w19 + sub w19, w19, #1 + lsl w21, w2, w3 + sub w21, w21, #1 + and w22, w21, w0 + lsr w3, w0, w3 + ldrb w0, [x4, 1153] + and w19, w19, w3 + and w19, w19, 255 + and w21, w21, w1 + cmp w0, w19 + bhi .L381 + adrp x1, .LANCHOR1 + add x1, x1, :lo12:.LANCHOR1 + add x1, x1, 1072 + mov w2, 1148 + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack +.L381: + add x4, x20, :lo12:.LANCHOR0 + add x19, x4, w19, sxtw + ldr x25, [x4, 1056] + ldrb w23, [x19, 1196] + mov w0, w23 + bl nandc_cs + cbnz w24, .L382 + mov w0, w22 + bl slc_phy_page_address_calc + mov w22, w0 + mov w0, w21 + bl slc_phy_page_address_calc + mov w21, w0 + ldrb w0, [x20, #:lo12:.LANCHOR0] + cbz w0, .L383 + mov w0, w23 + bl zftl_flash_enter_slc_mode +.L383: + add x0, x20, :lo12:.LANCHOR0 + and x19, x23, 255 + and w3, w22, 255 + lsr w2, w22, 8 + and w28, w21, 255 + lsr w27, w21, 8 + ldrb w1, [x0, 1176] + lsr w26, w21, 16 + cmp w1, 1 + lsr w1, w22, 16 + bne .L385 + add x19, x25, x19, lsl 8 + ldrb w4, [x0, 1168] + ldrb w0, [x0, 1204] + str w4, [x19, 2056] + str wzr, [x19, 2052] + str wzr, [x19, 2052] + str w3, [x19, 2052] + str w2, [x19, 2052] + str w1, [x19, 2052] + cbz w0, .L386 + lsr w22, w22, 24 + str w22, [x19, 2052] +.L386: + add x22, x20, :lo12:.LANCHOR0 + ldrb w0, [x22, 1169] + str w0, [x19, 2056] + bl nandc_wait_flash_ready + ldr x0, [x22, 1144] + ldrb w0, [x0, 12] + cmp w0, 3 + bne .L387 + cbz w24, .L387 + str w24, [x19, 2056] +.L387: + str wzr, [x19, 2056] + add x20, x20, :lo12:.LANCHOR0 + str wzr, [x19, 2052] + str wzr, [x19, 2052] + str w28, [x19, 2052] + ldrb w0, [x20, 1204] + str w27, [x19, 2052] + str w26, [x19, 2052] + cbz w0, .L408 + lsr w21, w21, 24 + str w21, [x19, 2052] +.L408: + mov w0, 48 + str w0, [x19, 2056] + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 96 + ret +.L382: + ldr x0, [x4, 1144] + ldrb w0, [x0, 12] + cmp w0, 3 + bne .L384 + ldrb w0, [x4, 1212] + cbnz w0, .L384 + ldrb w0, [x4, 1213] + cbnz w0, .L384 + sxtw x0, w23 + add x0, x0, 8 + add x0, x25, x0, lsl 8 + str w24, [x0, 8] + b .L383 +.L384: + mov w0, w23 + bl zftl_flash_exit_slc_mode + b .L383 +.L385: + ldr x0, [x0, 1144] + ldrb w4, [x0, 7] + cmp w4, 1 + bne .L390 + ldrb w4, [x0, 12] + cmp w4, 2 + bne .L390 + add x23, x23, 8 + mov w4, 38 + add x23, x25, x23, lsl 8 + str w4, [x23, 8] +.L390: + add x4, x20, :lo12:.LANCHOR0 + add x19, x25, x19, lsl 8 + ldrb w4, [x4, 1168] + str w4, [x19, 2056] + str w3, [x19, 2052] + str w2, [x19, 2052] + str w1, [x19, 2052] + ldrb w0, [x0, 12] + cmp w0, 3 + bne .L391 + cbz w24, .L391 + str w24, [x19, 2056] +.L391: + add x20, x20, :lo12:.LANCHOR0 + ldrb w0, [x20, 1169] + str w0, [x19, 2056] + str w28, [x19, 2052] + str w27, [x19, 2052] + str w26, [x19, 2052] + b .L408 + .size flash_start_plane_read, .-flash_start_plane_read + .align 2 + .global flash_set_interface_mode + .type flash_set_interface_mode, %function +flash_set_interface_mode: + stp x29, x30, [sp, -80]! + add x29, sp, 0 + str x25, [sp, 64] + adrp x25, .LANCHOR0 + add x25, x25, :lo12:.LANCHOR0 + stp x21, x22, [sp, 32] + stp x19, x20, [sp, 16] + mov w21, w0 + add x22, x25, 1216 + mov x20, x25 + stp x23, x24, [sp, 48] + mov x24, 0 +.L422: + lsl x0, x24, 3 + ldr x19, [x25, 1056] + ldrb w23, [x0, x22] + cmp w23, 69 + beq .L410 + add w0, w23, 119 + cmp w23, 44 + and w1, w0, 255 + cset w2, eq + cmp w1, 18 + bhi .L423 + mov x0, 32769 + movk x0, 0x4, lsl 16 + lsr x0, x0, x1 + mvn x0, x0 +.L411: + and w0, w0, 1 + eor w0, w0, 1 + orr w0, w2, w0 + cbz w0, .L412 +.L410: + ldrb w1, [x20, 1248] + cmp w21, 1 + bne .L413 + tbz x1, 0, .L412 + adrp x0, .LANCHOR2 + ldr w0, [x0, #:lo12:.LANCHOR2] + tbz x0, 12, .L414 + adrp x0, .LC34 + add x0, x0, :lo12:.LC34 + bl printk +.L414: + add x0, x19, x24, lsl 8 + mov w1, 239 + cmp w23, 44 + str w1, [x0, 2056] + mov w1, 137 + ccmp w23, w1, 4, ne + mov w1, 1 + bne .L415 +.L446: + str w1, [x0, 2052] + mov w1, 5 +.L445: + str w1, [x0, 2048] +.L420: + str wzr, [x0, 2048] + str wzr, [x0, 2048] + str wzr, [x0, 2048] +.L412: + add x24, x24, 1 + cmp x24, 4 + bne .L422 + bl nandc_wait_flash_ready + ldr x25, [sp, 64] + mov w0, 0 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x29, x30, [sp], 80 + ret +.L423: + mov x0, 1 + b .L411 +.L415: + cmp w23, 155 + beq .L446 + mov w2, 128 + str w2, [x0, 2052] + b .L445 +.L413: + tbz x1, 2, .L412 + adrp x0, .LANCHOR2 + ldr w0, [x0, #:lo12:.LANCHOR2] + tbz x0, 12, .L418 + adrp x0, .LC35 + add x0, x0, :lo12:.LC35 + bl printk +.L418: + add x0, x19, x24, lsl 8 + mov w1, 239 + cmp w23, 44 + str w1, [x0, 2056] + mov w1, 137 + ccmp w23, w1, 4, ne + bne .L419 + mov w1, 1 + str w1, [x0, 2052] + mov w1, 35 + b .L445 +.L419: + cmp w23, 155 + bne .L421 + mov w1, 1 + str w1, [x0, 2052] + mov w1, 37 + b .L445 +.L421: + mov w1, 128 + str w1, [x0, 2052] + str wzr, [x0, 2048] + b .L420 + .size flash_set_interface_mode, .-flash_set_interface_mode + .align 2 + .type mt_auto_read_calibration_config, %function +mt_auto_read_calibration_config: + stp x29, x30, [sp, -32]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + mov w20, w1 + and w19, w0, 255 + bl nandc_wait_flash_ready + adrp x1, .LANCHOR0+1056 + ubfiz x0, x19, 8, 8 + ldr x19, [x1, #:lo12:.LANCHOR0+1056] + add x19, x19, x0 + mov w0, 239 + str w0, [x19, 2056] + mov w0, 150 + str w0, [x19, 2052] + mov x0, 1000 + bl __const_udelay + str w20, [x19, 2048] + str wzr, [x19, 2048] + str wzr, [x19, 2048] + str wzr, [x19, 2048] + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 32 + ret + .size mt_auto_read_calibration_config, .-mt_auto_read_calibration_config + .align 2 + .global flash_reset + .type flash_reset, %function +flash_reset: + stp x29, x30, [sp, -16]! + adrp x1, .LANCHOR0+1056 + ubfiz x0, x0, 8, 8 + add x29, sp, 0 + ldr x1, [x1, #:lo12:.LANCHOR0+1056] + add x0, x0, 2048 + add x1, x1, x0 + mov w0, 255 + str w0, [x1, 8] + bl nandc_wait_flash_ready + ldp x29, x30, [sp], 16 + ret + .size flash_reset, .-flash_reset + .align 2 + .global flash_read_id + .type flash_read_id, %function +flash_read_id: + stp x29, x30, [sp, -48]! + add x29, sp, 0 + str x21, [sp, 32] + and w21, w0, 255 + adrp x0, .LANCHOR0+1056 + stp x19, x20, [sp, 16] + mov x19, x1 + ldr x20, [x0, #:lo12:.LANCHOR0+1056] + mov w0, w21 + bl flash_reset + mov w0, w21 + bl nandc_cs + ubfiz x0, x21, 8, 8 + add x20, x20, x0 + mov w0, 144 + str w0, [x20, 2056] + mov x0, 1000 + str wzr, [x20, 2052] + bl __const_udelay + ldr w0, [x20, 2048] + strb w0, [x19] + ldr w0, [x20, 2048] + strb w0, [x19, 1] + ldr w0, [x20, 2048] + strb w0, [x19, 2] + ldr w0, [x20, 2048] + strb w0, [x19, 3] + ldr w0, [x20, 2048] + strb w0, [x19, 4] + ldr w0, [x20, 2048] + strb w0, [x19, 5] + ldr w0, [x20, 2048] + strb w0, [x19, 6] + ldr w0, [x20, 2048] + strb w0, [x19, 7] + bl nandc_de_cs.constprop.35 + ldrb w2, [x19] + sub w0, w2, #1 + and w0, w0, 255 + cmp w0, 253 + bhi .L451 + ldrb w7, [x19, 5] + adrp x0, .LC36 + ldrb w6, [x19, 4] + add w1, w21, 1 + ldrb w5, [x19, 3] + add x0, x0, :lo12:.LC36 + ldrb w4, [x19, 2] + ldrb w3, [x19, 1] + bl printk +.L451: + ldp x19, x20, [sp, 16] + ldr x21, [sp, 32] + ldp x29, x30, [sp], 48 + ret + .size flash_read_id, .-flash_read_id + .align 2 + .global flash_read_spare + .type flash_read_spare, %function +flash_read_spare: + stp x29, x30, [sp, -32]! + ubfiz x0, x0, 8, 8 + add x29, sp, 0 + stp x19, x20, [sp, 16] + mov x20, x2 + adrp x2, .LANCHOR2+17 + ldrb w3, [x2, #:lo12:.LANCHOR2+17] + adrp x2, .LANCHOR0+1056 + ldr x19, [x2, #:lo12:.LANCHOR0+1056] + lsl w3, w3, 9 + add x19, x19, x0 + and w0, w1, 255 + str wzr, [x19, 2056] + str w3, [x19, 2052] + lsr w3, w3, 8 + str w3, [x19, 2052] + str w0, [x19, 2052] + lsr w0, w1, 8 + str w0, [x19, 2052] + lsr w1, w1, 16 + str w1, [x19, 2052] + mov w0, 48 + str w0, [x19, 2056] + bl nandc_wait_flash_ready + ldr w0, [x19, 2048] + strb w0, [x20] + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 32 + ret + .size flash_read_spare, .-flash_read_spare + .align 2 + .global flash_read_otp_data + .type flash_read_otp_data, %function +flash_read_otp_data: + stp x29, x30, [sp, -48]! + and w4, w0, 255 + adrp x0, .LANCHOR0+1056 + add x29, sp, 0 + stp x19, x20, [sp, 16] + mov w20, w1 + ldr x19, [x0, #:lo12:.LANCHOR0+1056] + mov w0, w4 + stp x21, x22, [sp, 32] + mov x22, x2 + bl nandc_cs + ubfiz x4, x4, 8, 8 + add x19, x19, x4 + mov w0, 239 + mov w21, 144 + str w0, [x19, 2056] + mov x0, 250 + str w21, [x19, 2052] + bl __const_udelay + mov w0, 1 + str w0, [x19, 2048] + str wzr, [x19, 2048] + str wzr, [x19, 2048] + str wzr, [x19, 2048] + bl nandc_wait_flash_ready + mov w0, 238 + str w0, [x19, 2056] + str w21, [x19, 2052] + mov w1, w20 + adrp x0, .LC37 + add x0, x0, :lo12:.LC37 + ldr w2, [x19, 2048] + ldr w3, [x19, 2048] + ldr w4, [x19, 2048] + bl printk + bl nandc_wait_flash_ready + str wzr, [x19, 2056] + str wzr, [x19, 2052] + and w0, w20, 255 + str wzr, [x19, 2052] + str w0, [x19, 2052] + lsr w0, w20, 8 + str w0, [x19, 2052] + lsr w20, w20, 16 + str w20, [x19, 2052] + mov w0, 48 + str w0, [x19, 2056] + bl nandc_wait_flash_ready + mov x0, 0 +.L457: + ldr w1, [x19, 2048] + strb w1, [x22, x0] + add x0, x0, 1 + cmp x0, 16384 + bne .L457 + mov w0, 239 + str w0, [x19, 2056] + mov w0, 144 + str w0, [x19, 2052] + mov x0, 250 + bl __const_udelay + str wzr, [x19, 2048] + str wzr, [x19, 2048] + str wzr, [x19, 2048] + str wzr, [x19, 2048] + bl nandc_de_cs.constprop.35 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x29, x30, [sp], 48 + ret + .size flash_read_otp_data, .-flash_read_otp_data + .align 2 + .global sandisk_prog_test_bad_block + .type sandisk_prog_test_bad_block, %function +sandisk_prog_test_bad_block: + stp x29, x30, [sp, -48]! + and x2, x0, 255 + mov x0, x2 + add x2, x2, 8 + add x29, sp, 0 + stp x21, x22, [sp, 32] + mov w22, w1 + adrp x1, .LANCHOR0+1056 + stp x19, x20, [sp, 16] + adrp x20, .LANCHOR2 + ldr x19, [x1, #:lo12:.LANCHOR0+1056] + add x1, x20, :lo12:.LANCHOR2 + ldrb w1, [x1, 37] + add x2, x19, x2, lsl 8 + cbz w1, .L461 +.L476: + ubfiz x0, x0, 8, 8 + str w1, [x2, 8] + add x19, x19, x0 + mov w0, 128 + str w0, [x19, 2056] + and w0, w22, 255 + str wzr, [x19, 2052] + str wzr, [x19, 2052] + str w0, [x19, 2052] + lsr w0, w22, 8 + str w0, [x19, 2052] + lsr w0, w22, 16 + str w0, [x19, 2052] + mov w0, 16 + str w0, [x19, 2056] + bl nandc_wait_flash_ready + mov w0, 112 + str w0, [x19, 2056] + mov x0, 1000 + bl __const_udelay + ldr w2, [x19, 2048] + cmp w2, 255 + bne .L463 + ldr w2, [x19, 2048] +.L463: + mov w0, 5 + ands w21, w2, w0 + beq .L464 + ldr w0, [x20, #:lo12:.LANCHOR2] + tbz x0, 12, .L464 + adrp x0, .LC38 + mov w1, w22 + add x0, x0, :lo12:.LC38 + bl printk +.L464: + add x20, x20, :lo12:.LANCHOR2 + ldrb w0, [x20, 38] + cbz w0, .L460 + str w0, [x19, 2056] +.L460: + mov w0, w21 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x29, x30, [sp], 48 + ret +.L461: + mov w1, 162 + b .L476 + .size sandisk_prog_test_bad_block, .-sandisk_prog_test_bad_block + .align 2 + .global nandc_rdy_status + .type nandc_rdy_status, %function +nandc_rdy_status: + adrp x0, .LANCHOR0+1056 + sub sp, sp, #16 + ldr x0, [x0, #:lo12:.LANCHOR0+1056] + ldr w0, [x0] + str w0, [sp, 8] + ldr w0, [sp, 8] + add sp, sp, 16 + ubfx x0, x0, 9, 1 + ret + .size nandc_rdy_status, .-nandc_rdy_status + .align 2 + .global nandc_bch_sel + .type nandc_bch_sel, %function +nandc_bch_sel: + sub sp, sp, #16 + str wzr, [sp, 8] + ldr w1, [sp, 8] + orr w1, w1, 1 + str w1, [sp, 8] + adrp x1, .LANCHOR0 + add x1, x1, :lo12:.LANCHOR0 + ldrb w2, [x1, 1028] + strb w0, [x1, 1249] + cmp w2, 9 + bne .L480 + ldr x1, [x1, 1056] + cmp w0, 70 + ldr w2, [sp, 8] + str w2, [x1, 16] + beq .L486 + cmp w0, 60 + beq .L487 + cmp w0, 40 + cset w0, eq + add w0, w0, 1 +.L481: + str wzr, [sp] + ldr w2, [sp] + bfi w2, w0, 25, 3 + str w2, [sp] + ldr w0, [sp] + orr w0, w0, 1 + str w0, [sp] + ldr w0, [sp] + str w0, [x1, 32] +.L479: + add sp, sp, 16 + ret +.L486: + mov w0, 0 + b .L481 +.L487: + mov w0, 3 + b .L481 +.L480: + ldr x2, [x1, 1056] + mov w3, 16 + ldr w1, [sp, 8] + cmp w0, w3 + str w1, [x2, 8] + str wzr, [sp] + ldr w1, [sp] + bfi w1, w3, 8, 8 + str w1, [sp] + ldr w1, [sp] + and w1, w1, -262145 + str w1, [sp] + bne .L483 +.L490: + ldr w0, [sp] + and w0, w0, -17 + b .L491 +.L483: + cmp w0, 24 + bne .L485 + ldr w0, [sp] + orr w0, w0, 16 +.L491: + str w0, [sp] + b .L484 +.L485: + ldr w1, [sp] + cmp w0, 40 + orr w1, w1, 262144 + str w1, [sp] + ldr w1, [sp] + orr w1, w1, 16 + str w1, [sp] + beq .L490 +.L484: + ldr w0, [sp] + orr w0, w0, 1 + str w0, [sp] + ldr w0, [sp] + str w0, [x2, 12] + b .L479 + .size nandc_bch_sel, .-nandc_bch_sel + .align 2 + .global zftl_flash_resume + .type zftl_flash_resume, %function +zftl_flash_resume: + stp x29, x30, [sp, -64]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x20, .LANCHOR0 + add x0, x20, :lo12:.LANCHOR0 + stp x21, x22, [sp, 32] + stp x23, x24, [sp, 48] + ldrb w1, [x0, 1028] + ldr w2, [x0, 1064] + cmp w1, 9 + ldr x1, [x0, 1056] + str w2, [x1] + ldr x1, [x0, 1056] + ldr w2, [x0, 1068] + str w2, [x1, 4] + ldr w2, [x0, 1072] + ldr x1, [x0, 1056] + bne .L493 + str w2, [x1, 16] + ldr w2, [x0, 1076] + str w2, [x1, 32] + ldr w2, [x0, 1080] + str w2, [x1, 80] + ldr w2, [x0, 1084] + str w2, [x1, 84] + ldr w2, [x0, 1088] + str w2, [x1, 520] + ldr w0, [x0, 1092] + str w0, [x1, 8] +.L495: + add x0, x20, :lo12:.LANCHOR0 + mov x19, 0 + add x23, x0, 1216 + add x21, x0, 1208 + mov w24, 2 +.L494: + lsl x0, x19, 3 + ldrb w0, [x0, x23] + sub w0, w0, #1 + and w0, w0, 255 + cmp w0, 253 + bhi .L496 + and w22, w19, 255 + mov w0, w22 + bl flash_reset + strb w24, [x19, x21] + mov w0, w22 + bl zftl_flash_enter_slc_mode +.L496: + add x19, x19, 1 + cmp x19, 4 + bne .L494 + add x20, x20, :lo12:.LANCHOR0 + ldrb w0, [x20, 1192] + cbz w0, .L497 + mov w0, 1 + bl nandc_set_if_mode + mov w0, w19 + bl flash_set_interface_mode + mov w0, w19 + bl nandc_set_if_mode + ldr w0, [x20, 1080] + lsr w0, w0, 8 + bl nandc_set_ddr_para +.L497: + adrp x0, .LANCHOR2+28 + ldrb w0, [x0, #:lo12:.LANCHOR2+28] + bl nandc_bch_sel + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x29, x30, [sp], 64 + ret +.L493: + str w2, [x1, 8] + ldr w2, [x0, 1076] + str w2, [x1, 12] + ldr w2, [x0, 1080] + str w2, [x1, 304] + ldr w2, [x0, 1084] + str w2, [x1, 308] + ldr w2, [x0, 1088] + str w2, [x1, 336] + ldr w0, [x0, 1092] + str w0, [x1, 344] + b .L495 + .size zftl_flash_resume, .-zftl_flash_resume + .align 2 + .global rk_nandc_flash_ready + .type rk_nandc_flash_ready, %function +rk_nandc_flash_ready: + stp x29, x30, [sp, -16]! + mov w1, 1 + add x29, sp, 0 + bl nandc_irq_disable + ldp x29, x30, [sp], 16 + ret + .size rk_nandc_flash_ready, .-rk_nandc_flash_ready + .align 2 + .global nandc_iqr_wait_flash_ready + .type nandc_iqr_wait_flash_ready, %function +nandc_iqr_wait_flash_ready: + stp x29, x30, [sp, -32]! + add x29, sp, 0 + str x19, [sp, 16] + adrp x19, .LANCHOR0 + add x19, x19, :lo12:.LANCHOR0 + ldr x0, [x19, 1056] + bl rk_nandc_rb_irq_flag_init + ldrb w1, [x19, 1028] + ldr x0, [x19, 1056] + cmp w1, 9 + bne .L506 + ldr w1, [x0, 292] + orr w1, w1, 2 + str w1, [x0, 292] + ldr w1, [x0, 288] + orr w1, w1, 2 + str w1, [x0, 288] +.L507: + ldr w1, [x0] + tbnz x1, 9, .L508 + bl wait_for_nand_flash_ready +.L505: + ldr x19, [sp, 16] + ldp x29, x30, [sp], 32 + ret +.L506: + ldr w1, [x0, 368] + orr w1, w1, 2 + str w1, [x0, 368] + ldr w1, [x0, 364] + orr w1, w1, 2 + str w1, [x0, 364] + b .L507 +.L508: + mov w1, 1 + bl nandc_irq_disable + b .L505 + .size nandc_iqr_wait_flash_ready, .-nandc_iqr_wait_flash_ready + .align 2 + .global flash_erase_duplane_block + .type flash_erase_duplane_block, %function +flash_erase_duplane_block: + stp x29, x30, [sp, -80]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + and w19, w0, 255 + adrp x20, .LANCHOR0 + add x0, x20, :lo12:.LANCHOR0 + stp x21, x22, [sp, 32] + mov w22, w2 + stp x25, x26, [sp, 64] + mov w21, w3 + stp x23, x24, [sp, 48] + and w25, w1, 255 + ldrb w0, [x0, 1153] + cmp w0, w19 + bhi .L512 + adrp x1, .LANCHOR1 + add x1, x1, :lo12:.LANCHOR1 + add x1, x1, 1096 + mov w2, 695 + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack +.L512: + add x0, x20, :lo12:.LANCHOR0 + ldrb w1, [x0, 1153] + cmp w1, w19 + bls .L521 + add x19, x0, w19, sxtw + ldr x26, [x0, 1056] + adrp x0, .LANCHOR2 + ldrb w23, [x19, 1196] + ldr w0, [x0, #:lo12:.LANCHOR2] + and x19, x23, 255 + add x24, x19, 8 + add x24, x26, x24, lsl 8 + tbz x0, 4, .L514 + adrp x0, .LC39 + mov w3, w21 + mov w2, w22 + mov w1, w23 + add x0, x0, :lo12:.LC39 + bl printk +.L514: + bl nandc_wait_flash_ready + mov w0, w23 + bl nandc_cs + mov w0, w23 + cbnz w25, .L515 + bl zftl_flash_enter_slc_mode +.L516: + add x19, x26, x19, lsl 8 + mov w0, 96 + str w0, [x19, 2056] + and w0, w22, 255 + str w0, [x19, 2052] + lsr w0, w22, 8 + str w0, [x19, 2052] + lsr w0, w22, 16 + str w0, [x19, 2052] + add x0, x20, :lo12:.LANCHOR0 + ldrb w0, [x0, 1204] + cbz w0, .L517 + lsr w0, w22, 24 + str w0, [x19, 2052] +.L517: + add x0, x20, :lo12:.LANCHOR0 + ldrb w0, [x0, 1250] + cbnz w0, .L522 + mov w0, 208 + str w0, [x19, 2056] + mov w23, 5 + bl nandc_wait_flash_ready + mov x0, x24 + bl flash_read_status + and w23, w0, w23 +.L518: + mov w0, 96 + add x20, x20, :lo12:.LANCHOR0 + str w0, [x19, 2056] + and w0, w21, 255 + str w0, [x19, 2052] + lsr w0, w21, 8 + str w0, [x19, 2052] + lsr w0, w21, 16 + str w0, [x19, 2052] + ldrb w0, [x20, 1204] + cbz w0, .L519 + lsr w3, w21, 24 + str w3, [x19, 2052] +.L519: + mov w0, 208 + str w0, [x19, 2056] + mov w19, 5 + bl nandc_iqr_wait_flash_ready + bl nandc_wait_flash_ready + mov x0, x24 + bl flash_read_status + mov w2, w0 + bl nandc_de_cs.constprop.35 + and w19, w2, w19 + orr w19, w19, w23 + cbz w19, .L520 + adrp x0, .LC40 + mov w1, w22 + add x0, x0, :lo12:.LC40 + bl printk +.L520: + mov w0, w19 +.L511: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x29, x30, [sp], 80 + ret +.L515: + bl zftl_flash_exit_slc_mode + b .L516 +.L522: + mov w23, 0 + b .L518 +.L521: + mov w0, -1 + b .L511 + .size flash_erase_duplane_block, .-flash_erase_duplane_block + .align 2 + .global flash_erase_block_en + .type flash_erase_block_en, %function +flash_erase_block_en: + stp x29, x30, [sp, -96]! + add x29, sp, 0 + stp x23, x24, [sp, 48] + mov w23, w2 + stp x21, x22, [sp, 32] + and w22, w0, 255 + adrp x0, .LANCHOR0 + add x2, x0, :lo12:.LANCHOR0 + stp x19, x20, [sp, 16] + mov w19, 24 + stp x25, x26, [sp, 64] + and w25, w1, 255 + str x27, [sp, 80] + mov x24, x0 + ldrb w1, [x2, 1205] + sub w1, w19, w1 + mov w19, 1 + lsl w19, w19, w1 + ldrb w1, [x2, 1153] + sub w19, w19, #1 + and w19, w19, w23 + cmp w1, w22 + bhi .L537 + adrp x1, .LANCHOR1 + add x1, x1, :lo12:.LANCHOR1 + add x1, x1, 1128 + mov w2, 757 + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack +.L537: + add x0, x24, :lo12:.LANCHOR0 + ldrb w1, [x0, 1153] + cmp w1, w22 + bls .L544 + add x1, x0, w22, sxtw + ldr x27, [x0, 1056] + adrp x0, .LANCHOR2 + ldrb w21, [x1, 1196] + ldr w0, [x0, #:lo12:.LANCHOR2] + and x20, x21, 255 + add x26, x20, 8 + add x26, x27, x26, lsl 8 + tbz x0, 4, .L539 + adrp x0, .LC41 + mov w3, w25 + mov w2, w23 + mov w1, w21 + add x0, x0, :lo12:.LC41 + bl printk +.L539: + bl nandc_wait_flash_ready + mov w0, w21 + bl nandc_cs + mov w0, w21 + cbnz w25, .L540 + bl zftl_flash_enter_slc_mode +.L541: + add x0, x27, x20, lsl 8 + mov w1, 96 + str w1, [x0, 2056] + and w1, w19, 255 + str w1, [x0, 2052] + lsr w1, w19, 8 + str w1, [x0, 2052] + lsr w1, w19, 16 + str w1, [x0, 2052] + add x1, x24, :lo12:.LANCHOR0 + ldrb w1, [x1, 1204] + cbz w1, .L542 + lsr w19, w19, 24 + str w19, [x0, 2052] +.L542: + mov w1, 208 + str w1, [x0, 2056] + bl nandc_iqr_wait_flash_ready + bl nandc_wait_flash_ready + mov x0, x26 + bl flash_read_status + mov w3, w0 + bl nandc_de_cs.constprop.35 + mov w0, 5 + ands w3, w3, w0 + beq .L543 + add x0, x24, :lo12:.LANCHOR0 + mov w1, w22 + ldrh w2, [x0, 2] + adrp x0, .LC42 + add x0, x0, :lo12:.LC42 + udiv w2, w23, w2 + bl printk + mov w3, -1 +.L543: + mov w0, w3 +.L536: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldr x27, [sp, 80] + ldp x29, x30, [sp], 96 + ret +.L540: + bl zftl_flash_exit_slc_mode + b .L541 +.L544: + mov w0, -1 + b .L536 + .size flash_erase_block_en, .-flash_erase_block_en + .align 2 + .global flash_erase_block + .type flash_erase_block, %function +flash_erase_block: + stp x29, x30, [sp, -16]! + mov w2, w1 + mov w1, 0 + add x29, sp, 0 + bl flash_erase_block_en + ldp x29, x30, [sp], 16 + ret + .size flash_erase_block, .-flash_erase_block + .align 2 + .global flash_erase_all + .type flash_erase_all, %function +flash_erase_all: + stp x29, x30, [sp, -80]! + adrp x0, .LANCHOR2 + add x0, x0, :lo12:.LANCHOR2 + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x20, .LANCHOR0 + stp x23, x24, [sp, 48] + add x20, x20, :lo12:.LANCHOR0 + stp x21, x22, [sp, 32] + add x23, x20, 1024 + str x25, [sp, 64] + mov x24, x20 + mov w19, 0 + ldrb w1, [x0, 21] + ldrh w21, [x0, 22] + mul w21, w21, w1 + and w21, w21, 65535 +.L558: + ldrb w0, [x20, 1153] + cmp w0, w19 + bhi .L561 + mov w1, 0 + adrp x0, .LC43 + add x0, x0, :lo12:.LC43 + bl printk + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldr x25, [sp, 64] + ldp x29, x30, [sp], 80 + ret +.L561: + add x0, x23, w19, sxtw + mov w22, 0 + ldrb w25, [x0, 172] +.L559: + cmp w21, w22, uxth + bhi .L560 + add w19, w19, 1 + and w19, w19, 65535 + b .L558 +.L560: + ldrh w1, [x24, 2] + mov w0, w25 + mul w1, w1, w22 + add w22, w22, 1 + bl flash_erase_block + b .L559 + .size flash_erase_all, .-flash_erase_all + .align 2 + .global rk_nandc_flash_xfer_completed + .type rk_nandc_flash_xfer_completed, %function +rk_nandc_flash_xfer_completed: + stp x29, x30, [sp, -16]! + mov w1, 0 + add x29, sp, 0 + bl nandc_irq_disable + ldp x29, x30, [sp], 16 + ret + .size rk_nandc_flash_xfer_completed, .-rk_nandc_flash_xfer_completed + .align 2 + .global nandc_xfer_start + .type nandc_xfer_start, %function +nandc_xfer_start: + stp x29, x30, [sp, -80]! + and w1, w1, 255 + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x20, .LANCHOR0 + str x21, [sp, 32] + and w21, w0, 255 + mov x0, x2 + add x2, x20, :lo12:.LANCHOR0 + and w6, w21, 1 + ldrb w4, [x2, 1028] + cmp w4, 9 + add w4, w1, 1 + bne .L566 + str wzr, [x29, 56] + mov w5, 1 + ubfx x4, x4, 1, 6 + ldr w1, [x29, 56] + bfi w1, w6, 1, 1 + str w1, [x29, 56] + ldr w1, [x29, 56] + orr w1, w1, 8 + str w1, [x29, 56] + ldr w1, [x29, 56] + bfi w1, w5, 5, 2 + str w1, [x29, 56] + ldr w1, [x29, 56] + orr w1, w1, 536870912 + str w1, [x29, 56] + ldr w1, [x29, 56] + orr w1, w1, 1024 + str w1, [x29, 56] + ldr w1, [x29, 56] + and w1, w1, -17 + str w1, [x29, 56] + ldr w1, [x29, 56] + bfi w1, w4, 22, 6 + str w1, [x29, 56] + ldr w1, [x29, 56] + orr w1, w1, 128 + str w1, [x29, 56] + ldrb w1, [x2, 1251] + cbz w1, .L567 + ldrb w1, [x2, 1252] + cbz w1, .L567 + ldr w1, [x29, 56] + orr w1, w1, 512 + str w1, [x29, 56] +.L567: + ldr w1, [x29, 56] + add x20, x20, :lo12:.LANCHOR0 + mov w2, w21 + ubfx x1, x1, 22, 6 + str x3, [x20, 1272] + lsl w1, w1, 10 + str x0, [x20, 1264] + bl rknand_dma_map_single + str w0, [x20, 1280] + ldr w1, [x29, 56] + mov w2, w21 + ldr x0, [x20, 1272] + ubfx x1, x1, 22, 6 + lsl w1, w1, 2 + bl rknand_dma_map_single + str w0, [x20, 1284] + mov w1, 1 + str w1, [x20, 1288] + ldr x1, [x20, 1056] + cmp w21, 0 + ldr w2, [x20, 1280] + str w2, [x1, 52] + mov w2, 16 + str w0, [x1, 56] + ldr w0, [x1, 48] + str w0, [x29, 64] + ldr w0, [x29, 64] + bfi w0, w2, 9, 5 + str w0, [x29, 64] + mov w2, 2 + ldr w0, [x29, 64] + orr w0, w0, 448 + str w0, [x29, 64] + ldr w0, [x29, 64] + bfi w0, w2, 3, 3 + str w0, [x29, 64] + cset w2, eq + ldr w0, [x29, 64] + orr w0, w0, 4 + str w0, [x29, 64] + ldr w0, [x29, 64] + bfi w0, w2, 1, 1 + str w0, [x29, 64] + ldrh w2, [x20, 1296] + ldr w0, [x29, 64] + orr w0, w0, 1 + str w0, [x29, 64] + ldr w0, [x29, 64] + bfi w0, w2, 16, 11 + str w0, [x29, 64] + ldr w0, [x29, 64] + str w0, [x1, 48] + ldr w0, [x29, 56] + str w0, [x1, 16] + ldr w0, [x29, 56] + orr w0, w0, 4 + str w0, [x29, 56] + ldr w0, [x29, 56] + str w0, [x1, 16] +.L565: + ldp x19, x20, [sp, 16] + ldr x21, [sp, 32] + ldp x29, x30, [sp], 80 + ret +.L566: + ldr x5, [x2, 1056] + mov w7, 16 + ubfx x4, x4, 1, 6 + ldr w5, [x5, 12] + str w5, [x29, 72] + ldr w5, [x29, 72] + bfi w5, w7, 8, 8 + str w5, [x29, 72] + ldr w5, [x29, 72] + and w5, w5, -9 + str w5, [x29, 72] + ldr w5, [x29, 72] + and w5, w5, -225 + str w5, [x29, 72] + str wzr, [x29, 56] + ldr w5, [x29, 56] + bfi w5, w6, 1, 1 + str w5, [x29, 56] + mov w6, 1 + ldr w5, [x29, 56] + orr w5, w5, 8 + str w5, [x29, 56] + ldr w5, [x29, 56] + bfi w5, w6, 5, 2 + str w5, [x29, 56] + ldr w5, [x29, 56] + orr w5, w5, 536870912 + str w5, [x29, 56] + ldr w5, [x29, 56] + orr w5, w5, 1024 + str w5, [x29, 56] + ldr w5, [x29, 56] + and w5, w5, -17 + str w5, [x29, 56] + ldr w5, [x29, 56] + bfi w5, w4, 22, 6 + str w5, [x29, 56] + cbz w21, .L569 + ldrb w4, [x2, 1249] + lsr w1, w1, 1 + mov w6, 64 + mov x5, 0 + cmp w4, 25 + mov w4, 128 + csel w6, w6, w4, cc + mov w4, 0 +.L571: + add w7, w6, w4 + cmp w1, w5 + bgt .L572 +.L573: + add x20, x20, :lo12:.LANCHOR0 + mov w2, w21 + ldr x1, [x20, 1256] + str x1, [x20, 1272] + ldr w1, [x29, 56] + str x0, [x20, 1264] + ubfx x1, x1, 22, 6 + lsl w1, w1, 10 + bl rknand_dma_map_single + ldr w1, [x29, 56] + mov w2, w21 + str w0, [x20, 1280] + ldr x0, [x20, 1272] + ubfx x1, x1, 22, 6 + lsl w1, w1, 7 + bl rknand_dma_map_single + str w0, [x20, 1284] + mov w0, 1 + str w0, [x20, 1288] + ldr x0, [x20, 1056] + mov w2, 16 + ldr w1, [x20, 1280] + cmp w21, 0 + str w1, [x0, 20] + ldr w1, [x20, 1284] + str w1, [x0, 24] + str wzr, [x29, 64] + ldr w1, [x29, 64] + bfi w1, w2, 9, 5 + str w1, [x29, 64] + mov w2, 2 + ldr w1, [x29, 64] + orr w1, w1, 448 + str w1, [x29, 64] + ldr w1, [x29, 64] + bfi w1, w2, 3, 3 + str w1, [x29, 64] + cset w2, eq + ldr w1, [x29, 64] + orr w1, w1, 4 + str w1, [x29, 64] + ldr w1, [x29, 64] + bfi w1, w2, 1, 1 + str w1, [x29, 64] + ldr w1, [x29, 64] + orr w1, w1, 1 + str w1, [x29, 64] + ldr w1, [x29, 64] + str w1, [x0, 16] + ldr w1, [x29, 72] + str w1, [x0, 12] + ldr w1, [x29, 56] + str w1, [x0, 8] + ldr w1, [x29, 56] + orr w1, w1, 4 + str w1, [x29, 56] + ldr w1, [x29, 56] + str w1, [x0, 8] + b .L565 +.L572: + ldr x8, [x2, 1256] + and x4, x4, 4294967292 + ldr w9, [x3, x5, lsl 2] + add x5, x5, 1 + str w9, [x8, x4] + mov w4, w7 + b .L571 +.L569: + ldr x1, [x2, 1256] + str w6, [x1] + b .L573 + .size nandc_xfer_start, .-nandc_xfer_start + .align 2 + .global nandc_set_seed + .type nandc_set_seed, %function +nandc_set_seed: + adrp x1, .LANCHOR1 + add x1, x1, :lo12:.LANCHOR1 + and x0, x0, 127 + add x1, x1, 1152 + ldrh w1, [x1, x0, lsl 1] + adrp x0, .LANCHOR0 + add x0, x0, :lo12:.LANCHOR0 + orr w2, w1, -1073741824 + ldrb w3, [x0, 1252] + cmp w3, 0 + csel w1, w2, w1, ne + ldrb w2, [x0, 1028] + ldr x0, [x0, 1056] + cmp w2, 9 + bne .L584 + str w1, [x0, 520] + ret +.L584: + str w1, [x0, 336] + ret + .size nandc_set_seed, .-nandc_set_seed + .align 2 + .global zftl_flash_de_init + .type zftl_flash_de_init, %function +zftl_flash_de_init: + stp x29, x30, [sp, -32]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + bl nandc_wait_flash_ready + adrp x4, .LANCHOR0 + mov x19, x4 + ldrb w1, [x4, #:lo12:.LANCHOR0] + cbz w1, .L589 + add x0, x4, :lo12:.LANCHOR0 + ldrb w1, [x0, 1154] + cbnz w1, .L589 + ldrb w0, [x0, 1028] + cmp w0, 9 + beq .L589 + mov w0, 0 + bl zftl_flash_exit_slc_mode +.L589: + add x20, x19, :lo12:.LANCHOR0 + mov w0, 0 + bl hynix_reconfig_rr_para + ldrb w0, [x20, 1192] + cbz w0, .L590 + ldrb w0, [x20, 1248] + tbz x0, 0, .L590 + mov w0, 1 + bl flash_set_interface_mode + mov w0, 1 + bl nandc_set_if_mode + strb wzr, [x20, 1192] +.L590: + add x19, x19, :lo12:.LANCHOR0 + ldrb w0, [x19, 1252] + cbz w0, .L591 + mov w0, 0 + strb wzr, [x19, 1252] + bl nandc_set_seed + mov w0, 1 + strb w0, [x19, 1252] +.L591: + mov w0, 0 + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 32 + ret + .size zftl_flash_de_init, .-zftl_flash_de_init + .align 2 + .global nandc_randomizer_enable + .type nandc_randomizer_enable, %function +nandc_randomizer_enable: + adrp x1, .LANCHOR0+1252 + strb w0, [x1, #:lo12:.LANCHOR0+1252] + ret + .size nandc_randomizer_enable, .-nandc_randomizer_enable + .align 2 + .global nandc_get_chip_if + .type nandc_get_chip_if, %function +nandc_get_chip_if: + adrp x1, .LANCHOR0+1056 + ubfiz x0, x0, 8, 8 + add x0, x0, 2048 + ldr x1, [x1, #:lo12:.LANCHOR0+1056] + add x0, x1, x0 + ret + .size nandc_get_chip_if, .-nandc_get_chip_if + .align 2 + .global buf_reinit + .type buf_reinit, %function +buf_reinit: + adrp x0, .LANCHOR0 + add x1, x0, :lo12:.LANCHOR0 + add x1, x1, 1304 + mov w2, 0 +.L611: + and w3, w2, 255 + strb wzr, [x1, 2] + add w4, w3, 1 + strb w3, [x1, 1] + strb w4, [x1] + add w2, w2, 1 + str xzr, [x1, 16] + cmp w2, 32 + add x1, x1, 64 + bne .L611 + add x0, x0, :lo12:.LANCHOR0 + mov w1, -1 + strb wzr, [x0, 3352] + strb w1, [x0, 3288] + strb w2, [x0, 3353] + ret + .size buf_reinit, .-buf_reinit + .align 2 + .global buf_add_tail + .type buf_add_tail, %function +buf_add_tail: + stp x29, x30, [sp, -48]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + mov x19, x0 + str x21, [sp, 32] + mov w0, -1 + strb w0, [x1] + mov x20, x1 + ldrb w1, [x19] + cmp w1, 255 + bne .L619 + ldrb w0, [x20, 1] + cmp w0, 255 + bne .L615 + adrp x1, .LANCHOR1 + add x1, x1, :lo12:.LANCHOR1 + add x1, x1, 1408 + mov w2, 74 + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack +.L615: + ldrb w0, [x20, 1] + strb w0, [x19] +.L613: + ldp x19, x20, [sp, 16] + ldr x21, [sp, 32] + ldp x29, x30, [sp], 48 + ret +.L619: + adrp x0, .LANCHOR0 + add x2, x0, :lo12:.LANCHOR0 + add x2, x2, 1304 + mov x19, x0 +.L620: + sbfiz x0, x1, 6, 32 + mov w21, w1 + ldrb w1, [x2, x0] + cmp w1, 255 + bne .L620 + ldrb w0, [x20, 1] + cmp w0, 255 + bne .L617 + adrp x1, .LANCHOR1 + add x1, x1, :lo12:.LANCHOR1 + add x1, x1, 1408 + mov w2, 81 + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack +.L617: + add x0, x19, :lo12:.LANCHOR0 + sbfiz x21, x21, 6, 32 + add x0, x0, 1304 + ldrb w1, [x20, 1] + strb w1, [x0, x21] + b .L613 + .size buf_add_tail, .-buf_add_tail + .align 2 + .type queue_read_cmd, %function +queue_read_cmd: + stp x29, x30, [sp, -32]! + add x29, sp, 0 + str x19, [sp, 16] + mov x19, x0 + mov w0, 48 + ldr w1, [x19, 40] + bl flash_start_page_read + strb wzr, [x19, 59] + mov w0, 1 + strb w0, [x19, 58] + mov w0, -1 + strb w0, [x19] + adrp x0, .LANCHOR0 + add x0, x0, :lo12:.LANCHOR0 + mov x1, x19 + add x0, x0, 3354 + bl buf_add_tail + ldr x19, [sp, 16] + ldp x29, x30, [sp], 32 + ret + .size queue_read_cmd, .-queue_read_cmd + .align 2 + .global zbuf_free + .type zbuf_free, %function +zbuf_free: + stp x29, x30, [sp, -32]! + add x29, sp, 0 + str x19, [sp, 16] + adrp x19, .LANCHOR0 + ldrb w1, [x0, 2] + and w1, w1, 8 + strb w1, [x0, 2] + cbz w1, .L625 + ldr w1, [x0, 36] + cmn w1, #1 + beq .L625 + mov x1, x0 + add x0, x19, :lo12:.LANCHOR0 + add x0, x0, 3352 + bl buf_add_tail +.L626: + add x19, x19, :lo12:.LANCHOR0 + ldrb w0, [x19, 3353] + add w0, w0, 1 + strb w0, [x19, 3353] + ldr x19, [sp, 16] + ldp x29, x30, [sp], 32 + ret +.L625: + add x1, x19, :lo12:.LANCHOR0 + ldrb w2, [x1, 3352] + strb w2, [x0] + ldrb w0, [x0, 1] + strb w0, [x1, 3352] + b .L626 + .size zbuf_free, .-zbuf_free + .align 2 + .global buf_alloc + .type buf_alloc, %function +buf_alloc: + stp x29, x30, [sp, -48]! + adrp x1, .LANCHOR0 + add x29, sp, 0 + stp x19, x20, [sp, 16] + add x20, x1, :lo12:.LANCHOR0 + str x21, [sp, 32] + and w21, w0, 255 + mov x19, x1 + ldrb w0, [x20, 3353] + cbz w0, .L635 +.L638: + add x1, x19, :lo12:.LANCHOR0 + add x0, x1, 1304 + ldrb w3, [x1, 3352] + ubfiz x2, x3, 6, 8 + add x0, x0, x2 + cbz w21, .L636 +.L637: + add x1, x19, :lo12:.LANCHOR0 + sbfiz x3, x3, 6, 32 + add x4, x1, 1304 + add x2, x4, x3 + ldrb w5, [x4, x3] + strb w5, [x1, 3352] + ldrb w5, [x1, 3353] + strh wzr, [x2, 50] + sub w5, w5, #1 + strb w5, [x1, 3353] + mov w1, 1 + strb w1, [x2, 2] + mov w1, -1 + strb wzr, [x2, 56] + strb w1, [x4, x3] + mov w1, -1 + strb wzr, [x2, 57] + str xzr, [x2, 16] + str w1, [x2, 36] + b .L634 +.L635: + adrp x1, .LANCHOR1 + add x1, x1, :lo12:.LANCHOR1 + add x1, x1, 1424 + mov w2, 121 + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack + ldrb w0, [x20, 3353] + cbnz w0, .L638 +.L640: + mov x0, 0 +.L634: + ldp x19, x20, [sp, 16] + ldr x21, [sp, 32] + ldp x29, x30, [sp], 48 + ret +.L636: + ldrb w1, [x1, 3353] + cmp w1, 1 + bne .L637 + b .L640 + .size buf_alloc, .-buf_alloc + .align 2 + .global buf_remove_buf + .type buf_remove_buf, %function +buf_remove_buf: + ldrb w4, [x1, 1] + ldrb w2, [x0] + cmp w4, w2 + bne .L648 + ldrb w1, [x1] + strb w1, [x0] +.L652: + mov w0, 1 + ret +.L649: + mov w3, w2 + sbfiz x2, x2, 6, 32 + ldrb w2, [x0, x2] + cmp w4, w2 + bne .L650 + sbfiz x3, x3, 6, 32 + ldrb w2, [x1] + strb w2, [x0, x3] + mov w0, -1 + strb w0, [x1] + b .L652 +.L648: + adrp x0, .LANCHOR0 + add x0, x0, :lo12:.LANCHOR0 + add x0, x0, 1304 +.L650: + cmp w2, 255 + bne .L649 + mov w0, 0 + ret + .size buf_remove_buf, .-buf_remove_buf + .align 2 + .global buf_remove_free + .type buf_remove_free, %function +buf_remove_free: + stp x29, x30, [sp, -32]! + adrp x5, .LANCHOR0 + add x29, sp, 0 + stp x19, x20, [sp, 16] + mov x20, x0 + add x0, x5, :lo12:.LANCHOR0 + mov x19, x5 + ldrb w0, [x0, 3353] + cbnz w0, .L654 + adrp x1, .LANCHOR1 + add x1, x1, :lo12:.LANCHOR1 + add x1, x1, 1440 + mov w2, 172 + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack +.L654: + add x19, x19, :lo12:.LANCHOR0 + ldrb w0, [x19, 3353] + cbz w0, .L653 + mov x1, x20 + add x0, x19, 3352 + bl buf_remove_buf + cmp w0, 1 + bne .L653 + ldrb w0, [x19, 3353] + sub w0, w0, #1 + strb w0, [x19, 3353] + ldrb w0, [x20, 2] + orr w0, w0, 1 + strb w0, [x20, 2] +.L653: + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 32 + ret + .size buf_remove_free, .-buf_remove_free + .align 2 + .global dump_buf_info + .type dump_buf_info, %function +dump_buf_info: + sub sp, sp, #64 + adrp x0, .LC44 + add x0, x0, :lo12:.LC44 + stp x29, x30, [sp, 16] + add x29, sp, 16 + stp x19, x20, [sp, 32] + adrp x19, .LANCHOR0 + add x19, x19, :lo12:.LANCHOR0 + str x21, [sp, 48] + add x20, x19, 1304 + adrp x21, .LC50 + add x19, x19, 3352 + add x21, x21, :lo12:.LC50 + ldrb w1, [x19, 2] + bl printk + ldrb w1, [x19, 3] + adrp x0, .LC45 + add x0, x0, :lo12:.LC45 + bl printk + ldrb w1, [x19, 4] + adrp x0, .LC46 + add x0, x0, :lo12:.LC46 + bl printk + ldrb w1, [x19, 5] + adrp x0, .LC47 + add x0, x0, :lo12:.LC47 + bl printk + ldrb w1, [x19] + adrp x0, .LC48 + add x0, x0, :lo12:.LC48 + bl printk + ldrb w1, [x19, 1] + adrp x0, .LC49 + add x0, x0, :lo12:.LC49 + bl printk +.L660: + ldr w0, [x20, 40] + add x20, x20, 64 + ldrb w5, [x20, -6] + ldrh w4, [x20, -14] + ldrb w3, [x20, -62] + ldrb w2, [x20, -64] + ldrb w1, [x20, -63] + str w0, [sp] + mov x0, x21 + ldr w7, [x20, -28] + ldr w6, [x20, -12] + bl printk + cmp x20, x19 + bne .L660 + ldp x19, x20, [sp, 32] + ldp x29, x30, [sp, 16] + ldr x21, [sp, 48] + add sp, sp, 64 + ret + .size dump_buf_info, .-dump_buf_info + .align 2 + .global flash_check_bad_block + .type flash_check_bad_block, %function +flash_check_bad_block: + adrp x3, .LANCHOR2 + add x3, x3, :lo12:.LANCHOR2 + and w5, w0, 255 + lsr w4, w1, 5 + ldrb w0, [x3, 21] + ldrh w2, [x3, 22] + mul w2, w2, w0 + mov x0, 912 + and w2, w2, 65535 + add w2, w2, 31 + asr w2, w2, 5 + lsl w2, w2, 2 + umaddl x0, w2, w5, x0 + adrp x2, .LANCHOR0+1048 + ldr x2, [x2, #:lo12:.LANCHOR0+1048] + add x0, x0, w4, uxtw 2 + ldr w0, [x2, x0] + lsr w0, w0, w1 + and w0, w0, 1 + ret + .size flash_check_bad_block, .-flash_check_bad_block + .align 2 + .global flash_mask_bad_block + .type flash_mask_bad_block, %function +flash_mask_bad_block: + stp x29, x30, [sp, -48]! + mov w2, w1 + add x29, sp, 0 + str x21, [sp, 32] + and w21, w0, 255 + adrp x0, .LANCHOR2 + add x0, x0, :lo12:.LANCHOR2 + stp x19, x20, [sp, 16] + mov w20, w1 + ldrh w19, [x0, 22] + ldrb w1, [x0, 21] + adrp x0, .LC51 + add x0, x0, :lo12:.LC51 + mul w19, w19, w1 + mov w1, w21 + bl printk + and w19, w19, 65535 + lsr w0, w20, 5 + add w1, w19, 31 + mov x19, 912 + asr w1, w1, 5 + mov w2, 1 + lsl w1, w1, 2 + umaddl x1, w1, w21, x19 + add x1, x1, w0, uxtw 2 + adrp x0, .LANCHOR0+1048 + ldr x3, [x0, #:lo12:.LANCHOR0+1048] + lsl w0, w2, w20 + ldr w2, [x3, x1] + orr w2, w2, w0 + str w2, [x3, x1] + ldp x19, x20, [sp, 16] + ldr x21, [sp, 32] + ldp x29, x30, [sp], 48 + ret + .size flash_mask_bad_block, .-flash_mask_bad_block + .align 2 + .global str2hex + .type str2hex, %function +str2hex: + ldrb w1, [x0] + cmp w1, 48 + bne .L667 + ldrb w1, [x0, 1] + add x2, x0, 2 + and w1, w1, -33 + and w1, w1, 255 + cmp w1, 88 + csel x0, x2, x0, eq +.L667: + mov x2, x0 + ldrb w1, [x2], 1 + and w1, w1, -33 + and w1, w1, 255 + cmp w1, 88 + mov w1, 0 + csel x0, x2, x0, eq +.L669: + ldrb w2, [x0] + cbnz w2, .L674 +.L666: + mov w0, w1 + ret +.L674: + sub w3, w2, #48 + and w3, w3, 255 + cmp w3, 9 + bhi .L670 + add w1, w2, w1, lsl 4 + sub w1, w1, #48 +.L671: + add x0, x0, 1 + b .L669 +.L670: + sub w3, w2, #97 + and w3, w3, 255 + cmp w3, 5 + bhi .L672 + add w1, w2, w1, lsl 4 + sub w1, w1, #87 + b .L671 +.L672: + sub w3, w2, #65 + and w3, w3, 255 + cmp w3, 5 + bhi .L666 + add w1, w2, w1, lsl 4 + sub w1, w1, #55 + b .L671 + .size str2hex, .-str2hex + .align 2 + .global zftl_proc_debug_init + .type zftl_proc_debug_init, %function +zftl_proc_debug_init: + stp x29, x30, [sp, -16]! + adrp x3, .LANCHOR1 + add x3, x3, :lo12:.LANCHOR1 + mov x4, 0 + add x29, sp, 0 + add x3, x3, 1456 + mov x2, 0 + mov w1, 292 + adrp x0, .LC52 + add x0, x0, :lo12:.LC52 + bl proc_create_data + ldp x29, x30, [sp], 16 + ret + .size zftl_proc_debug_init, .-zftl_proc_debug_init + .align 2 + .global ftl_print_info_to_buf + .type ftl_print_info_to_buf, %function +ftl_print_info_to_buf: + stp x29, x30, [sp, -48]! + adrp x2, .LC1 + adrp x1, .LC2 + add x2, x2, :lo12:.LC1 + add x29, sp, 0 + stp x19, x20, [sp, 16] + add x1, x1, :lo12:.LC2 + stp x21, x22, [sp, 32] + mov x20, x0 + bl sprintf + add x19, x20, w0, sxtw + adrp x0, .LANCHOR2 + add x0, x0, :lo12:.LANCHOR2 + adrp x22, .LANCHOR0 + add x21, x22, :lo12:.LANCHOR0 + adrp x1, .LC53 + add x1, x1, :lo12:.LC53 + ldrb w7, [x0, 14] + ldrb w6, [x0, 13] + ldrb w5, [x0, 12] + ldrb w4, [x0, 11] + ldrb w3, [x0, 10] + ldrb w2, [x0, 9] + mov x0, x19 + bl sprintf + add x19, x19, w0, sxtw + ldr w2, [x21, 1032] + mov x0, x19 + adrp x1, .LC54 + add x1, x1, :lo12:.LC54 + lsr w2, w2, 11 + bl sprintf + ldr w2, [x21, 3360] + add x19, x19, w0, sxtw + mov x0, x19 + adrp x1, .LC55 + add x1, x1, :lo12:.LC55 + lsr w2, w2, 11 + bl sprintf + add x19, x19, w0, sxtw + adrp x1, .LC56 + mov x0, x19 + add x1, x1, :lo12:.LC56 + bl strcpy + add x19, x19, 10 + ldr w2, [x21, 3364] + mov x0, x19 + adrp x1, .LC57 + add x1, x1, :lo12:.LC57 + bl sprintf + add x19, x19, w0, sxtw + ldr w2, [x21, 1032] + mov x0, x19 + adrp x1, .LC58 + add x1, x1, :lo12:.LC58 + bl sprintf + add x19, x19, w0, sxtw + ldr x0, [x21, 1128] + adrp x1, .LC59 + add x1, x1, :lo12:.LC59 + ldr w2, [x0, 524] + mov x0, x19 + bl sprintf + add x19, x19, w0, sxtw + ldr x0, [x21, 1128] + adrp x1, .LC60 + add x1, x1, :lo12:.LC60 + ldr w2, [x0, 528] + mov x0, x19 + bl sprintf + add x19, x19, w0, sxtw + ldrh w2, [x21, 3368] + mov x0, x19 + adrp x1, .LC61 + add x1, x1, :lo12:.LC61 + bl sprintf + add x19, x19, w0, sxtw + ldrh w2, [x21, 3370] + mov x0, x19 + adrp x1, .LC62 + add x1, x1, :lo12:.LC62 + bl sprintf + add x19, x19, w0, sxtw + ldrh w2, [x21, 3372] + mov x0, x19 + adrp x1, .LC63 + add x1, x1, :lo12:.LC63 + bl sprintf + add x19, x19, w0, sxtw + ldrh w2, [x21, 3374] + mov x0, x19 + adrp x1, .LC64 + add x1, x1, :lo12:.LC64 + bl sprintf + add x19, x19, w0, sxtw + ldrh w2, [x21, 3376] + mov x0, x19 + adrp x1, .LC65 + add x1, x1, :lo12:.LC65 + bl sprintf + add x19, x19, w0, sxtw + ldrh w2, [x21, 3378] + mov x0, x19 + adrp x1, .LC66 + add x1, x1, :lo12:.LC66 + bl sprintf + add x19, x19, w0, sxtw + ldrb w4, [x21, 3380] + mov x0, x19 + ldrb w3, [x21, 3381] + adrp x1, .LC67 + ldrb w2, [x21, 3353] + add x1, x1, :lo12:.LC67 + bl sprintf + add x19, x19, w0, sxtw + ldr x0, [x21, 3384] + adrp x1, .LC68 + add x1, x1, :lo12:.LC68 + ldrh w3, [x0, 146] + ldrh w2, [x0, 148] + mov x0, x19 + bl sprintf + add x19, x19, w0, sxtw + ldr x0, [x21, 3384] + adrp x1, .LC69 + add x1, x1, :lo12:.LC69 + ldp w2, w0, [x0, 16] + add w2, w0, w2, lsr 11 + mov x0, x19 + bl sprintf + add x19, x19, w0, sxtw + ldr x0, [x21, 3384] + adrp x1, .LC70 + add x1, x1, :lo12:.LC70 + ldp w2, w0, [x0, 24] + add w2, w0, w2, lsr 11 + mov x0, x19 + bl sprintf + add x19, x19, w0, sxtw + ldr x0, [x21, 3384] + adrp x1, .LC71 + add x1, x1, :lo12:.LC71 + ldr w2, [x0, 64] + mov x0, x19 + bl sprintf + add x19, x19, w0, sxtw + ldr x0, [x21, 3384] + adrp x1, .LC72 + add x1, x1, :lo12:.LC72 + ldr w2, [x0, 68] + mov x0, x19 + bl sprintf + add x19, x19, w0, sxtw + ldr x0, [x21, 1128] + adrp x1, .LC73 + add x1, x1, :lo12:.LC73 + ldr w2, [x0, 12] + mov w0, 10 + udiv w2, w2, w0 + mov x0, x19 + bl sprintf + add x19, x19, w0, sxtw + ldr x0, [x21, 3384] + adrp x1, .LC74 + ldrb w2, [x22, #:lo12:.LANCHOR0] + add x1, x1, :lo12:.LC74 + ldrh w4, [x0, 150] + ldr w3, [x0, 156] + mov x0, x19 + bl sprintf + add x19, x19, w0, sxtw + ldr x0, [x21, 1128] + adrp x1, .LC75 + add x1, x1, :lo12:.LC75 + ldr w2, [x0, 556] + mov x0, x19 + bl sprintf + add x19, x19, w0, sxtw + ldr x0, [x21, 1128] + adrp x1, .LC76 + add x1, x1, :lo12:.LC76 + ldr w2, [x0, 552] + mov x0, x19 + bl sprintf + add x19, x19, w0, sxtw + ldr x0, [x21, 3384] + adrp x1, .LC77 + add x1, x1, :lo12:.LC77 + ldr w2, [x0, 52] + mov x0, x19 + bl sprintf + add x19, x19, w0, sxtw + ldr x0, [x21, 3384] + adrp x1, .LC78 + add x1, x1, :lo12:.LC78 + ldr w2, [x0, 60] + mov x0, x19 + bl sprintf + add x19, x19, w0, sxtw + ldr x0, [x21, 3384] + adrp x1, .LC79 + add x1, x1, :lo12:.LC79 + ldr w2, [x0, 76] + mov x0, x19 + bl sprintf + add x19, x19, w0, sxtw + ldr x0, [x21, 3384] + adrp x1, .LC80 + add x1, x1, :lo12:.LC80 + ldr w2, [x0, 8] + mov x0, x19 + bl sprintf + add x19, x19, w0, sxtw + ldr x0, [x21, 1128] + adrp x1, .LC81 + add x1, x1, :lo12:.LC81 + ldrb w4, [x0, 25] + ldrh w3, [x0, 22] + ldrh w2, [x0, 16] + mov x0, x19 + bl sprintf + add x19, x19, w0, sxtw + ldr x0, [x21, 1128] + adrp x1, .LC82 + add x1, x1, :lo12:.LC82 + ldrb w4, [x0, 57] + ldrh w3, [x0, 54] + ldrh w2, [x0, 48] + mov x0, x19 + bl sprintf + add x19, x19, w0, sxtw + ldr x0, [x21, 1128] + adrp x1, .LC83 + add x1, x1, :lo12:.LC83 + ldrb w4, [x0, 89] + ldrh w3, [x0, 86] + ldrh w2, [x0, 80] + mov x0, x19 + bl sprintf + add x19, x19, w0, sxtw + ldr x0, [x21, 3384] + adrp x1, .LC84 + add x1, x1, :lo12:.LC84 + ldrh w6, [x0, 96] + ldrh w5, [x0, 92] + ldrh w4, [x0, 88] + ldrh w2, [x0, 74] + ldr w3, [x0, 84] + mov x0, x19 + bl sprintf + add x19, x19, w0, sxtw + ldr x0, [x21, 3384] + adrp x1, .LC85 + add x1, x1, :lo12:.LC85 + ldrh w6, [x0, 98] + ldrh w5, [x0, 94] + ldrh w4, [x0, 90] + ldr w3, [x0, 80] + ldrh w2, [x0, 72] + mov x0, x19 + bl sprintf + add x19, x19, w0, sxtw + ldrh w2, [x21, 3392] + mov x0, x19 + adrp x1, .LC86 + add x1, x1, :lo12:.LC86 + bl sprintf + add x19, x19, w0, sxtw + ldr w6, [x21, 3396] + mov x0, x19 + ldrh w5, [x21, 3400] + adrp x1, .LC87 + ldrh w4, [x21, 3402] + add x1, x1, :lo12:.LC87 + ldrh w3, [x21, 3404] + ldrh w2, [x21, 3406] + bl sprintf + add x19, x19, w0, sxtw + ldr x0, [x21, 1128] + adrp x1, .LC88 + add x1, x1, :lo12:.LC88 + ldrh w5, [x0, 590] + ldrh w4, [x0, 588] + ldrh w3, [x0, 586] + ldrh w2, [x0, 584] + mov x0, x19 + bl sprintf + add x19, x19, w0, sxtw + ldr x0, [x21, 1128] + ldr x1, [x21, 3384] + add x5, x0, 512 + mov x0, x19 + ldp w2, w3, [x5, 24] + ldp w4, w6, [x5, 32] + ldr w5, [x1, 44] + adrp x1, .LC89 + add x1, x1, :lo12:.LC89 + bl sprintf + add x0, x19, w0, sxtw + sub w0, w0, w20 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x29, x30, [sp], 48 + ret + .size ftl_print_info_to_buf, .-ftl_print_info_to_buf + .align 2 + .global zftl_proc_ftl_read + .type zftl_proc_ftl_read, %function +zftl_proc_ftl_read: + stp x29, x30, [sp, -16]! + add x29, sp, 0 + bl ftl_print_info_to_buf + ldp x29, x30, [sp], 16 + ret + .size zftl_proc_ftl_read, .-zftl_proc_ftl_read + .align 2 + .global ftl_gc_write_buf + .type ftl_gc_write_buf, %function +ftl_gc_write_buf: + stp x29, x30, [sp, -32]! + add x29, sp, 0 + str x19, [sp, 16] + adrp x19, .LANCHOR0 + add x19, x19, :lo12:.LANCHOR0 + ldrb w1, [x0, 2] + orr w1, w1, 2 + strb w1, [x0, 2] + mov x1, x0 + add x0, x19, 3408 + bl buf_add_tail + ldrb w0, [x19, 3381] + add w0, w0, 1 + and w0, w0, 255 + strb w0, [x19, 3381] + ldr x19, [sp, 16] + ldp x29, x30, [sp], 32 + ret + .size ftl_gc_write_buf, .-ftl_gc_write_buf + .align 2 + .global gc_hook + .type gc_hook, %function +gc_hook: + ret + .size gc_hook, .-gc_hook + .align 2 + .global vpn_check + .type vpn_check, %function +vpn_check: + ret + .size vpn_check, .-vpn_check + .align 2 + .global ftl_scan_all_data + .type ftl_scan_all_data, %function +ftl_scan_all_data: + ret + .size ftl_scan_all_data, .-ftl_scan_all_data + .align 2 + .global gc_add_sblk + .type gc_add_sblk, %function +gc_add_sblk: + stp x29, x30, [sp, -64]! + add x29, sp, 0 + stp x21, x22, [sp, 32] + adrp x22, .LANCHOR2 + stp x19, x20, [sp, 16] + and w19, w0, 65535 + ldr w0, [x22, #:lo12:.LANCHOR2] + adrp x21, .LANCHOR0 + stp x23, x24, [sp, 48] + and w24, w1, 65535 + and w23, w2, 65535 + tbz x0, 8, .L688 + add x1, x21, :lo12:.LANCHOR0 + uxtw x0, w19 + ldr x2, [x1, 1104] + ldr x3, [x1, 1120] + ldrh w7, [x1, 3402] + add x2, x2, x0, lsl 2 + ldrh w6, [x1, 3472] + mov w1, w19 + ldrh w5, [x3, x0, lsl 1] + adrp x0, .LC90 + ldrb w4, [x2, 2] + mov w3, w23 + mov w2, w24 + add x0, x0, :lo12:.LC90 + ubfx x4, x4, 5, 3 + bl printk +.L688: + add x0, x21, :lo12:.LANCHOR0 + ldrh w0, [x0, 1096] + cmp w0, w19 + bhi .L689 + adrp x1, .LANCHOR1 + add x1, x1, :lo12:.LANCHOR1 + add x1, x1, 1552 + mov w2, 543 + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack +.L689: + add x1, x21, :lo12:.LANCHOR0 + ldrh w0, [x1, 1096] + cmp w0, w19 + bhi .L690 + ldr w0, [x22, #:lo12:.LANCHOR2] + mov w20, 0 + tbz x0, 10, .L687 + adrp x0, .LC91 + mov w3, w23 + mov w2, w24 + mov w1, w19 + add x0, x0, :lo12:.LC91 + bl printk +.L687: + mov w0, w20 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x29, x30, [sp], 64 + ret +.L690: + ldr x2, [x1, 1120] + uxtw x0, w19 + ldrh w3, [x2, x0, lsl 1] + ldr x2, [x1, 1104] + add x0, x2, x0, lsl 2 + ldrb w2, [x0, 2] + tst w2, 224 + bne .L692 + mov w20, 0 + cbz w3, .L687 + adrp x1, .LANCHOR1 + add x1, x1, :lo12:.LANCHOR1 + add x1, x1, 1552 + mov w2, 553 + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack + b .L687 +.L692: + ldrh w0, [x1, 3416] + cmp w0, w19 + beq .L711 + ldr x0, [x1, 1128] + ldrh w5, [x0, 48] + cmp w5, w19 + beq .L711 + ldrh w5, [x0, 16] + cmp w5, w19 + beq .L711 + ldrh w5, [x0, 80] + cmp w5, w19 + beq .L711 + ldrh w5, [x1, 3472] + add x1, x1, 3474 + mov w4, 0 +.L693: + cmp w4, w5 + bcc .L694 + cbnz w24, .L698 + adrp x1, .LANCHOR3 + add x1, x1, :lo12:.LANCHOR3 + ldrh w6, [x1, 1280] + cmp w19, w6 + beq .L711 + add x1, x1, 1288 + mov x4, 0 +.L697: + ldrh w7, [x4, x1] + cmp w19, w7 + bne .L696 + ldr w0, [x22, #:lo12:.LANCHOR2] + mov w20, 0 + tbz x0, 8, .L687 + mov w5, w6 + mov w4, w19 + ubfx x2, x2, 5, 3 + mov w1, w19 + adrp x0, .LC92 + add x0, x0, :lo12:.LC92 + bl printk + b .L687 +.L694: + ldrh w6, [x1], 2 + cmp w6, w19 + beq .L711 + add w4, w4, 1 + b .L693 +.L696: + add x4, x4, 2 + cmp x4, 16 + bne .L697 + ubfiz x20, x23, 7, 16 + add x20, x20, 136 + add x20, x0, x20 +.L699: + ldr w0, [x22, #:lo12:.LANCHOR2] + tbz x0, 8, .L700 + add x0, x21, :lo12:.LANCHOR0 + mov w4, w3 + mov w1, w19 + ubfx x3, x2, 5, 3 + mov w2, w24 + ldrh w6, [x0, 3402] + adrp x0, .LC93 + add x0, x0, :lo12:.LC93 + bl printk +.L700: + mov x0, x20 + add x1, x20, 128 + mov w2, 65535 +.L703: + ldrh w3, [x0] + cmp w3, w2 + bne .L701 + strh w19, [x0] + add x21, x21, :lo12:.LANCHOR0 + cbz w24, .L702 + ldr x1, [x21, 1128] + ldrh w0, [x1, 124] + add w0, w0, 1 + strh w0, [x1, 124] +.L725: + mov w20, 1 + b .L687 +.L698: + add x20, x0, 392 + b .L699 +.L702: + ldr x0, [x21, 1128] + add x23, x0, w23, uxth 1 + ldrh w0, [x23, 120] + add w0, w0, 1 + strh w0, [x23, 120] + b .L725 +.L701: + add x0, x0, 2 + cmp x1, x0 + bne .L703 + b .L725 +.L711: + mov w20, 0 + b .L687 + .size gc_add_sblk, .-gc_add_sblk + .align 2 + .global gc_mark_bad_ppa + .type gc_mark_bad_ppa, %function +gc_mark_bad_ppa: + stp x29, x30, [sp, -64]! + adrp x1, .LANCHOR3 + add x1, x1, :lo12:.LANCHOR3 + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x20, .LANCHOR0 + stp x21, x22, [sp, 32] + add x21, x20, :lo12:.LANCHOR0 + str x23, [sp, 48] + mov w19, 24 + mov w23, 1 + ldrb w4, [x21, 1205] + add x21, x21, 3416 + ldrh w3, [x1, 1304] + sub w19, w19, w4 + ldrb w1, [x1, 1306] + sub w19, w19, w3 + lsr w2, w0, w3 + mov w3, w0 + lsl w19, w23, w19 + sub w19, w19, #1 + and w19, w19, w2 + and w22, w2, 65535 + mov w2, w22 + adrp x0, .LC94 + add x0, x0, :lo12:.LC94 + udiv w19, w19, w1 + ldr w1, [x21, 2200] + and w19, w19, 65535 + bl printk + mov w1, w23 + mov w2, 0 + mov w0, w19 + bl gc_add_sblk + ldr w0, [x21, 2200] + mov w1, 0 +.L727: + cmp w1, w0 + bcc .L729 + cmp w0, 5 + bhi .L728 + add x20, x20, :lo12:.LANCHOR0 + add w1, w0, 1 + str w1, [x20, 5616] + add x20, x20, w0, uxtw 1 + strh w22, [x20, 5620] +.L728: + mov w0, 0 + ldr x23, [sp, 48] + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x29, x30, [sp], 64 + ret +.L729: + add x2, x21, w1, sxtw 1 + ldrh w2, [x2, 2204] + cmp w2, w22 + beq .L728 + add w1, w1, 1 + and w1, w1, 65535 + b .L727 + .size gc_mark_bad_ppa, .-gc_mark_bad_ppa + .align 2 + .global gc_get_src_ppa_from_index + .type gc_get_src_ppa_from_index, %function +gc_get_src_ppa_from_index: + adrp x1, .LANCHOR3+1312 + ubfiz x0, x0, 2, 16 + ldr x1, [x1, #:lo12:.LANCHOR3+1312] + ldr w0, [x1, x0] + ret + .size gc_get_src_ppa_from_index, .-gc_get_src_ppa_from_index + .align 2 + .global gc_write_completed + .type gc_write_completed, %function +gc_write_completed: + stp x29, x30, [sp, -80]! + add x29, sp, 0 + stp x21, x22, [sp, 32] + adrp x22, .LANCHOR0 + stp x23, x24, [sp, 48] + add x24, x22, :lo12:.LANCHOR0 + stp x25, x26, [sp, 64] + add x25, x24, 1304 + stp x19, x20, [sp, 16] +.L733: + add x3, x22, :lo12:.LANCHOR0 + ldrb w0, [x3, 3356] + cmp w0, 255 + bne .L746 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x29, x30, [sp], 80 + ret +.L746: + sxtw x21, w0 + add x1, x3, 1304 + lsl x4, x21, 6 + add x2, x1, x4 + ldrb w0, [x1, x4] + ldr w1, [x2, 52] + strb w0, [x3, 3356] + ldrh w23, [x2, 48] + cbz w1, .L734 + ldr w2, [x2, 40] + mov w0, 1 + str w2, [x3, 5612] + strh w0, [x3, 5610] + adrp x0, .LC95 + add x0, x0, :lo12:.LC95 + bl printk + adrp x1, .LANCHOR1 + add x1, x1, :lo12:.LANCHOR1 + add x1, x1, 1568 + mov w2, 956 + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack +.L734: + adrp x20, .LANCHOR3 + add x1, x20, :lo12:.LANCHOR3 + ldrb w0, [x1, 1320] + cmp w0, 3 + bne .L735 + ldrb w0, [x24, 1212] + cbnz w0, .L735 + ldr x0, [x24, 1128] + ldrb w1, [x1, 1321] + ldrb w0, [x0, 89] + mov w19, w0 + cmp w1, w0 + bhi .L747 + cmp w0, 2 + mov w0, 2 + csel w19, w19, w0, ls +.L736: + add w19, w19, w19, lsl 1 +.L737: + add x0, x20, :lo12:.LANCHOR3 + and x1, x23, 65535 + ldr x2, [x0, 1328] + add x0, x25, x21, lsl 6 + ldrb w0, [x0, 1] + ldrb w1, [x2, x1] + cmp w1, w0 + beq .L738 + adrp x1, .LANCHOR1 + add x1, x1, :lo12:.LANCHOR1 + add x1, x1, 1568 + mov w2, 976 + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack +.L738: + add x0, x25, x21, lsl 6 + ldrb w0, [x0, 61] + cmp w0, 3 + beq .L739 + add x0, x20, :lo12:.LANCHOR3 + ldrb w1, [x0, 1320] + cmp w1, 3 + bne .L739 + ldrb w1, [x0, 1336] + cbnz w1, .L739 + ldrb w1, [x24, 1212] + cbnz w1, .L739 + ldrb w1, [x24, 1213] + cbnz w1, .L739 + ldrb w1, [x0, 1322] + cbz w1, .L740 + ldrb w0, [x0, 1323] + cbnz w0, .L739 +.L740: + add x20, x20, :lo12:.LANCHOR3 + mov w0, 0 + ldr x2, [x20, 1328] +.L741: + cmp w19, w0, uxth + bls .L733 + add w1, w23, w0 + add w0, w0, 1 + ldrb w1, [x2, x1] + add x1, x25, x1, lsl 6 + strb wzr, [x1, 61] + b .L741 +.L747: + mov w19, 1 + b .L736 +.L735: + add x0, x20, :lo12:.LANCHOR3 + ldrb w1, [x0, 1322] + cbz w1, .L748 + ldrb w0, [x0, 1323] + cmp w0, 0 + cset w19, ne + add w19, w19, 1 + b .L737 +.L748: + mov w19, 1 + b .L737 +.L739: + add x20, x20, :lo12:.LANCHOR3 + strh w23, [x24, 5524] + mov w21, 0 + mov w26, -1 +.L742: + cmp w19, w21, uxth + bls .L733 + ldr x2, [x20, 1328] + add w1, w23, w21 + add w21, w21, 1 + ldrb w0, [x2, x1] + strb w26, [x2, x1] + sbfiz x1, x0, 6, 32 + ubfiz x0, x0, 6, 8 + add x1, x25, x1 + add x0, x25, x0 + strb wzr, [x1, 61] + bl zbuf_free + ldrb w0, [x24, 3423] + sub w0, w0, #1 + strb w0, [x24, 3423] + b .L742 + .size gc_write_completed, .-gc_write_completed + .align 2 + .global gc_get_src_blk + .type gc_get_src_blk, %function +gc_get_src_blk: + adrp x2, .LANCHOR0 + add x0, x2, :lo12:.LANCHOR0 + ldr x1, [x0, 1128] + ldrh w0, [x1, 124] + cbz w0, .L761 + add x1, x1, 392 + mov w3, 1 +.L762: + add x4, x1, 128 + mov w5, 65535 +.L766: + ldrh w0, [x1] + cmp w0, w5 + beq .L764 + mov w4, -1 + strh w4, [x1] + add x2, x2, :lo12:.LANCHOR0 + cbz w3, .L765 + ldr x2, [x2, 1128] + ldrh w1, [x2, 124] + sub w1, w1, #1 + strh w1, [x2, 124] + ret +.L761: + adrp x0, .LANCHOR3+1337 + ldrb w0, [x0, #:lo12:.LANCHOR3+1337] + add x3, x1, w0, sxtw 1 + ldrh w3, [x3, 120] + cbz w3, .L767 + ubfiz x0, x0, 7, 8 + mov w3, 0 + add x0, x0, 136 + add x1, x1, x0 + b .L762 +.L765: + adrp x1, .LANCHOR3+1337 + ldr x2, [x2, 1128] + ldrb w1, [x1, #:lo12:.LANCHOR3+1337] + add x1, x2, x1, lsl 1 + ldrh w2, [x1, 120] + sub w2, w2, #1 + strh w2, [x1, 120] + ret +.L764: + add x1, x1, 2 + cmp x1, x4 + bne .L766 + ret +.L767: + mov w0, 65535 + ret + .size gc_get_src_blk, .-gc_get_src_blk + .align 2 + .global gc_free_temp_buf + .type gc_free_temp_buf, %function +gc_free_temp_buf: + stp x29, x30, [sp, -48]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x19, .LANCHOR0 + add x0, x19, :lo12:.LANCHOR0 + stp x21, x22, [sp, 32] + ldrb w1, [x0, 3423] + cbz w1, .L776 + ldrb w1, [x0, 3353] + cmp w1, 1 + bhi .L776 + adrp x21, .LANCHOR3 + add x2, x21, :lo12:.LANCHOR3 + ldrh w20, [x0, 5524] + add x0, x0, 1304 + ldrb w4, [x2, 1321] + add w3, w20, 24 + ldrh w1, [x2, 1338] + mul w1, w1, w4 + ldr x4, [x2, 1328] + cmp w1, w3 + csel w1, w1, w3, ls +.L771: + cmp w20, w1 + bcc .L774 +.L776: + mov w0, 0 + b .L769 +.L774: + uxtw x22, w20 + ldrb w2, [x4, x22] + cmp w2, 255 + beq .L772 + sbfiz x3, x2, 6, 32 + add x3, x0, x3 + ldrb w3, [x3, 61] + cbnz w3, .L772 + ubfiz x2, x2, 6, 8 + add x0, x0, x2 + bl zbuf_free + adrp x0, .LANCHOR2 + ldr w0, [x0, #:lo12:.LANCHOR2] + tbz x0, 8, .L773 + add x0, x21, :lo12:.LANCHOR3 + mov w1, w20 + ldr x0, [x0, 1328] + ldrb w2, [x0, x22] + adrp x0, .LC96 + add x0, x0, :lo12:.LC96 + bl printk +.L773: + add x21, x21, :lo12:.LANCHOR3 + add x19, x19, :lo12:.LANCHOR0 + mov w1, -1 + ldr x0, [x21, 1328] + strb w1, [x0, x22] + ldrb w0, [x19, 3423] + sub w0, w0, #1 + strb w0, [x19, 3423] + mov w0, 1 +.L769: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x29, x30, [sp], 48 + ret +.L772: + add w20, w20, 1 + b .L771 + .size gc_free_temp_buf, .-gc_free_temp_buf + .align 2 + .global get_ink_scaned_blk + .type get_ink_scaned_blk, %function +get_ink_scaned_blk: + adrp x1, .LANCHOR0 + add x1, x1, :lo12:.LANCHOR0 + add x0, x1, 3416 + ldrh w2, [x1, 5528] + cbz w2, .L786 + sub w2, w2, #1 + strh w2, [x1, 5528] + add x0, x0, w2, sxtw 1 + ldrh w0, [x0, 2114] + ret +.L786: + mov w0, 65535 + ret + .size get_ink_scaned_blk, .-get_ink_scaned_blk + .align 2 + .global print_gc_debug_info + .type print_gc_debug_info, %function +print_gc_debug_info: + adrp x0, .LANCHOR0 + add x0, x0, :lo12:.LANCHOR0 + stp x29, x30, [sp, -16]! + add x29, sp, 0 + ldrh w6, [x0, 3392] + ldrb w5, [x0, 3423] + ldrb w4, [x0, 3353] + ldrh w3, [x0, 5522] + ldrh w2, [x0, 3418] + ldrh w1, [x0, 3416] + adrp x0, .LC97 + add x0, x0, :lo12:.LC97 + bl printk + ldp x29, x30, [sp], 16 + ret + .size print_gc_debug_info, .-print_gc_debug_info + .align 2 + .global _list_pop_index_node + .type _list_pop_index_node, %function +_list_pop_index_node: + stp x29, x30, [sp, -32]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + ldr x20, [x0] + cbz x20, .L795 + adrp x3, .LANCHOR0+1040 + and w1, w1, 65535 + mov w4, 65535 + mov w5, 6 + ldr x19, [x3, #:lo12:.LANCHOR0+1040] +.L791: + cbnz w1, .L792 +.L794: + sub x19, x20, x19 + mov x1, -6148914691236517206 + asr x19, x19, 1 + movk x1, 0xaaab, lsl 0 + mul x19, x19, x1 + and w19, w19, 65535 + mov w1, w19 + bl _list_remove_node + mov w0, -1 + strh w0, [x20] + strh w0, [x20, 2] + mov w0, w19 +.L789: + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 32 + ret +.L792: + ldrh w3, [x20] + cmp w3, w4 + beq .L794 + sub w1, w1, #1 + umaddl x20, w3, w5, x19 + and w1, w1, 65535 + b .L791 +.L795: + mov w0, 65535 + b .L789 + .size _list_pop_index_node, .-_list_pop_index_node + .align 2 + .global _list_get_gc_head_node + .type _list_get_gc_head_node, %function +_list_get_gc_head_node: + ldr x0, [x0] + and w1, w1, 65535 + cbz x0, .L802 + adrp x2, .LANCHOR0+1040 + mov w3, 65535 + mov w4, 6 + ldr x2, [x2, #:lo12:.LANCHOR0+1040] +.L799: + cbz w1, .L800 + ldrh w0, [x0] + cmp w0, w3 + bne .L801 + ret +.L801: + sub w1, w1, #1 + umaddl x0, w0, w4, x2 + and w1, w1, 65535 + b .L799 +.L802: + mov w0, 65535 + ret +.L800: + sub x0, x0, x2 + mov x1, -6148914691236517206 + asr x0, x0, 1 + movk x1, 0xaaab, lsl 0 + mul x0, x0, x1 + and w0, w0, 65535 + ret + .size _list_get_gc_head_node, .-_list_get_gc_head_node + .align 2 + .type zftl_get_gc_node.part.10, %function +zftl_get_gc_node.part.10: + stp x29, x30, [sp, -16]! + mov w1, w0 + adrp x0, .LANCHOR3 + add x0, x0, :lo12:.LANCHOR3 + add x29, sp, 0 + add x0, x0, 1344 + bl _list_get_gc_head_node + ldp x29, x30, [sp], 16 + ret + .size zftl_get_gc_node.part.10, .-zftl_get_gc_node.part.10 + .align 2 + .global gc_search_src_blk + .type gc_search_src_blk, %function +gc_search_src_blk: + stp x29, x30, [sp, -160]! + add x29, sp, 0 + stp x21, x22, [sp, 32] + and w22, w0, 255 + and w0, w1, 255 + stp x19, x20, [sp, 16] + str w0, [x29, 144] + adrp x19, .LANCHOR0 + add x0, x19, :lo12:.LANCHOR0 + stp x23, x24, [sp, 48] + stp x25, x26, [sp, 64] + and w20, w2, 255 + stp x27, x28, [sp, 80] + ldr x2, [x0, 1128] + add x1, x2, w22, sxtw 1 + ldrh w21, [x1, 120] + cbz w21, .L807 + mov w0, w21 +.L806: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 160 + ret +.L807: + ldrh w1, [x0, 3472] + cmp w1, 1 + bhi .L809 + adrp x0, .LANCHOR3 + add x0, x0, :lo12:.LANCHOR3 + strh wzr, [x0, 1352] + strh wzr, [x0, 1354] + strh wzr, [x0, 1356] +.L809: + cbnz w22, .L810 + adrp x25, .LANCHOR3 + adrp x27, .LC98 + add x26, x25, :lo12:.LANCHOR3 + add x27, x27, :lo12:.LC98 + add x0, x26, 1360 + mov w23, 0 + mov w24, 0 + str x0, [x29, 136] +.L811: + add w28, w20, 1 + cmp w24, w28 + bge .L816 + ldrh w6, [x26, 1354] + ldr x0, [x29, 136] + mov w1, w6 + bl _list_get_gc_head_node + add w2, w6, 1 + and w2, w2, 65535 + strh w2, [x26, 1354] + and w1, w0, 65535 + mov w0, 65535 + mov w4, w1 + cmp w1, w0 + beq .L812 + adrp x0, .LANCHOR2 + uxtw x6, w1 + ldr w0, [x0, #:lo12:.LANCHOR2] + tbz x0, 8, .L813 + add x0, x19, :lo12:.LANCHOR0 + str x6, [x29, 128] + str w1, [x29, 120] + ldr x0, [x0, 1120] + ldrh w3, [x0, x6, lsl 1] + mov x0, x27 + bl printk + ldr w4, [x29, 120] + ldr x6, [x29, 128] +.L813: + add x0, x19, :lo12:.LANCHOR0 + ldr x1, [x0, 1120] + ldrh w0, [x0, 3402] + ldrh w1, [x1, x6, lsl 1] + cmp w1, w0 + bcs .L814 + mov w2, 0 + mov w1, 0 + mov w0, w4 + bl gc_add_sblk + cbz w0, .L815 + add w5, w23, 1 + and w23, w5, 65535 + cmp w23, w20 + bcc .L815 +.L816: + ldr x0, [x29, 144] + tbz x0, 1, .L818 + add x6, x19, :lo12:.LANCHOR0 + ldrh w0, [x6, 3378] + cmp w0, 32 + bls .L818 + adrp x27, .LANCHOR3 + add x25, x27, :lo12:.LANCHOR3 + add x0, x25, 1368 + mov x26, x6 + str x0, [x29, 136] + mov w24, 0 + and w0, w20, 65535 + str w0, [x29, 128] +.L819: + cmp w28, w24 + ble .L823 + ldrh w7, [x25, 1356] + ldr x0, [x29, 136] + mov w1, w7 + bl _list_get_gc_head_node + add w7, w7, 1 + strh w7, [x25, 1356] + and w1, w0, 65535 + mov w2, 65535 + cmp w1, w2 + beq .L820 + ldr x2, [x26, 1120] + ubfiz x1, x1, 1, 16 + ldrh w2, [x2, x1] + ldrh w1, [x26, 3400] + cmp w2, w1 + bcs .L820 + mov w2, 0 + mov w1, 0 + bl gc_add_sblk + cbz w0, .L822 + add w5, w23, 1 + ldr w0, [x29, 128] + and w23, w5, 65535 + cmp w23, w0 + bcc .L822 +.L823: + cmp w23, w20 + bcs .L825 + add x27, x27, :lo12:.LANCHOR3 + add x2, x19, :lo12:.LANCHOR0 + ldrh w0, [x27, 1338] + ldrb w4, [x27, 1321] + ldrh w1, [x27, 1376] + ldrh w3, [x2, 3400] + mul w0, w0, w4 + sub w0, w0, w1, lsr 2 + cmp w3, w0 + bge .L818 + add w1, w3, w1, lsr 3 + strh w1, [x2, 3400] +.L818: + ldr x0, [x29, 144] + tbz x0, 0, .L826 + and w25, w20, 65535 + cmp w23, w25 + bcs .L826 + adrp x24, .LANCHOR3 + add x27, x24, :lo12:.LANCHOR3 + mov w26, 65535 +.L831: + ldrh w6, [x27, 1352] + mov w0, w6 + bl zftl_get_gc_node.part.10 + add w6, w6, 1 + strh w6, [x27, 1352] + cmp w26, w0, uxth + beq .L827 + mov w2, 0 + mov w1, 0 + bl gc_add_sblk + cbz w0, .L828 + add w5, w23, 1 + and w23, w5, 65535 + cmp w25, w23 + bhi .L828 +.L829: + add x24, x24, :lo12:.LANCHOR3 + add x19, x19, :lo12:.LANCHOR0 + ldrh w0, [x24, 1376] + ldrh w1, [x19, 3402] + cmp w1, w0, lsr 1 + bls .L826 + sub w0, w1, w0, lsr 3 + b .L917 +.L814: + add x25, x25, :lo12:.LANCHOR3 + strh wzr, [x25, 1354] + b .L816 +.L812: + strh wzr, [x26, 1354] + b .L816 +.L815: + add w24, w24, 1 + and w24, w24, 65535 + b .L811 +.L820: + strh wzr, [x25, 1356] + b .L823 +.L822: + add w3, w24, 1 + and w24, w3, 65535 + b .L819 +.L825: + add x1, x19, :lo12:.LANCHOR0 + add x27, x27, :lo12:.LANCHOR3 + ldrh w2, [x1, 3400] + ldrh w0, [x27, 1376] + cmp w2, w0 + bls .L818 + sub w0, w2, w0, lsr 3 + strh w0, [x1, 3400] + b .L818 +.L827: + strh wzr, [x27, 1352] +.L830: + cmp w23, w25 + bcs .L829 + add x19, x19, :lo12:.LANCHOR0 + add x24, x24, :lo12:.LANCHOR3 + ldrh w1, [x19, 3402] + ldrh w0, [x24, 1376] + cmp w1, w0 + bcs .L826 + add w0, w1, w0, lsr 3 +.L917: + strh w0, [x19, 3402] +.L826: + adrp x0, .LANCHOR2 + ldr w0, [x0, #:lo12:.LANCHOR2] + tbz x0, 8, .L862 + ldr w2, [x29, 144] + adrp x0, .LC99 + mov w4, w20 + mov w3, w23 + mov w1, w22 + add x0, x0, :lo12:.LC99 + bl printk +.L862: + mov w0, w23 + b .L806 +.L828: + add w21, w21, 1 + and w21, w21, 65535 + cmp w25, w21 + bhi .L831 + b .L830 +.L810: + adrp x24, .LANCHOR3 + add x0, x24, :lo12:.LANCHOR3 + cmp w20, 1 + ldrb w25, [x0, 1321] + ldrh w0, [x0, 1338] + mul w25, w25, w0 + and w25, w25, 65535 + bne .L832 + cbz w1, .L832 + ldrh w2, [x2, 80] + mov w0, 65535 + cmp w2, w0 + beq .L865 + add x0, x19, :lo12:.LANCHOR0 + ldrh w0, [x0, 5522] + sub w25, w25, w0 + and w25, w25, 65535 +.L865: + mov w20, 8 +.L832: + ldr w0, [x29, 144] + add x2, x19, :lo12:.LANCHOR0 + add x3, x24, :lo12:.LANCHOR3 + and w0, w0, 1 + str w0, [x29, 136] + ldr x0, [x29, 144] + strh wzr, [x2, 5608] + strh wzr, [x3, 1378] + tbz x0, 0, .L866 + ldrh w0, [x2, 3374] + ldrh w3, [x3, 1380] + cmp w0, w3, lsr 2 + bhi .L834 + ldrh w2, [x2, 3376] + cmp w2, w0 + bcs .L867 +.L834: + cmp w1, 1 + bls .L836 +.L838: + mov w23, 0 +.L837: + add x27, x24, :lo12:.LANCHOR3 + add x8, x19, :lo12:.LANCHOR0 + and w0, w20, 65535 + mov w28, 0 + mov w26, 64 + str w0, [x29, 128] +.L841: + ldrh w6, [x27, 1352] + str x8, [x29, 112] + mov w0, w6 + bl zftl_get_gc_node.part.10 + and w4, w0, 65535 + str w4, [x29, 120] + mov w1, 65535 + cmp w4, w1 + beq .L839 + add w6, w6, 1 + mov w2, w22 + strh w6, [x27, 1352] + mov w1, 0 + bl gc_add_sblk + ldr x8, [x29, 112] + cbz w0, .L840 + ldr w4, [x29, 120] + add w5, w23, 1 + ldr x0, [x8, 1120] + and w23, w5, 65535 + ubfiz x4, x4, 1, 16 + ldrh w0, [x0, x4] + add w3, w28, w0 + ldr w0, [x29, 128] + and w28, w3, 65535 + cmp w23, w0 + bcs .L835 + cmp w25, w28 + bcc .L835 + ldrh w0, [x8, 3376] + ldrh w1, [x8, 3374] + cmp w0, w1, lsl 1 + ble .L840 +.L835: + add x0, x19, :lo12:.LANCHOR0 + add x2, x24, :lo12:.LANCHOR3 + ldrh w1, [x0, 3376] + ldrh w2, [x2, 1380] + cmp w1, w2, lsr 2 + bhi .L863 + ldrh w0, [x0, 3374] + add w0, w0, 8 + cmp w1, w0 + ble .L833 +.L863: + cmp w25, w28 + bls .L833 + add x27, x24, :lo12:.LANCHOR3 + mov w26, 64 + add x0, x27, 1360 + str x0, [x29, 128] + add x0, x19, :lo12:.LANCHOR0 + str x0, [x29, 120] + and w0, w20, 65535 + str w0, [x29, 112] +.L844: + ldrh w6, [x27, 1354] + ldr x0, [x29, 128] + mov w1, w6 + bl _list_get_gc_head_node + and w7, w0, 65535 + str w7, [x29, 104] + mov w1, 65535 + cmp w7, w1 + beq .L842 + add w6, w6, 1 + mov w2, w22 + strh w6, [x27, 1354] + mov w1, 0 + bl gc_add_sblk + cbz w0, .L843 + ldr x0, [x29, 120] + add w5, w23, 1 + ldr w7, [x29, 104] + and w23, w5, 65535 + ldr x0, [x0, 1120] + ubfiz x7, x7, 1, 16 + ldrh w0, [x0, x7] + add w3, w28, w0 + ldr w0, [x29, 112] + and w28, w3, 65535 + cmp w23, w0 + bcs .L833 + cmp w25, w28 + bcs .L843 +.L833: + ldr x0, [x29, 144] + tbz x0, 1, .L845 + add x7, x19, :lo12:.LANCHOR0 + ldrh w0, [x7, 3378] + cmp w0, 32 + bls .L845 + cmp w28, w25 + bcs .L845 + add x27, x24, :lo12:.LANCHOR3 + mov w26, 64 + add x0, x27, 1368 + str x0, [x29, 128] + and w0, w20, 65535 + str w0, [x29, 120] +.L851: + ldrh w8, [x27, 1356] + ldr x0, [x29, 128] + mov w1, w8 + str x7, [x29, 112] + bl _list_get_gc_head_node + and w4, w0, 65535 + mov w1, 65535 + cmp w4, w1 + beq .L846 + add w8, w8, 1 + strh w8, [x27, 1356] + cmp w20, 1 + ldr x7, [x29, 112] + bne .L847 + ldrb w1, [x27, 1321] + ldrh w2, [x27, 1338] + mul w2, w1, w2 + ldrh w1, [x27, 1376] + sub w1, w2, w1, lsr 3 + strh w1, [x7, 3406] +.L847: + ldr x1, [x7, 1120] + ubfiz x4, x4, 1, 16 + stp x4, x7, [x29, 104] + ldrh w2, [x1, x4] + ldrh w1, [x7, 3406] + cmp w2, w1 + bcs .L848 + mov w2, w22 + mov w1, 0 + bl gc_add_sblk + ldr x7, [x29, 112] + cbz w0, .L849 + ldr x0, [x7, 1120] + add w5, w23, 1 + ldr x4, [x29, 104] + add w21, w21, 1 + and w23, w5, 65535 + and w21, w21, 65535 + ldrh w0, [x0, x4] + add w3, w28, w0 + ldr w0, [x29, 120] + and w28, w3, 65535 + cmp w23, w0 + bcs .L850 + cmp w25, w28 + bcs .L849 +.L850: + cmp w23, w20 + bcc .L852 + cbnz w21, .L853 + add x1, x19, :lo12:.LANCHOR0 + add x0, x24, :lo12:.LANCHOR3 + ldrh w1, [x1, 3378] + ldrh w0, [x0, 1382] + cmp w1, w0 + bls .L853 +.L852: + add x4, x24, :lo12:.LANCHOR3 + add x6, x19, :lo12:.LANCHOR0 + ldrh w2, [x4, 1376] + ldrh w0, [x4, 1338] + ldrb w4, [x4, 1321] + ldrh w1, [x6, 3406] + lsr w2, w2, 3 + mul w0, w0, w4 + sub w0, w0, w2 + cmp w1, w0 + bge .L845 + add w1, w1, w2 + strh w1, [x6, 3406] +.L845: + ldr w0, [x29, 136] + cbz w0, .L826 + and w27, w20, 65535 + cmp w23, w27 + bcs .L826 + cmp w28, w25 + bcs .L826 + add x4, x24, :lo12:.LANCHOR3 + add x7, x19, :lo12:.LANCHOR0 + add x0, x4, 1360 + mov w26, 64 + str x0, [x29, 136] +.L861: + ldrh w6, [x4, 1354] + ldr x0, [x29, 136] + mov w1, w6 + stp x7, x4, [x29, 120] + bl _list_get_gc_head_node + and w21, w0, 65535 + mov w1, 65535 + ldr x4, [x29, 128] + cmp w21, w1 + beq .L855 + ldr x7, [x29, 120] + ubfiz x21, x21, 1, 16 + add w6, w6, 1 + strh w6, [x4, 1354] + ldr x1, [x7, 1120] + ldrh w2, [x1, x21] + ldrh w1, [x7, 3404] + cmp w2, w1 + bcs .L856 + ldrh w2, [x4, 1380] + ldrh w1, [x7, 3376] + cmp w1, w2, lsr 1 + bls .L857 +.L856: + stp x7, x4, [x29, 120] + mov w2, w22 + mov w1, 0 + bl gc_add_sblk + ldp x7, x4, [x29, 120] + cbz w0, .L858 + ldr x0, [x7, 1120] + add w5, w23, 1 + and w23, w5, 65535 + cmp w27, w23 + ldrh w0, [x0, x21] + add w3, w28, w0 + and w28, w3, 65535 + bls .L859 + cmp w25, w28 + bcs .L858 +.L860: + add x24, x24, :lo12:.LANCHOR3 + add x19, x19, :lo12:.LANCHOR0 + ldrh w0, [x24, 1376] + ldrh w1, [x19, 3404] + cmp w1, w0, lsr 1 + bls .L826 + sub w0, w1, w0, lsr 3 + strh w0, [x19, 3404] + b .L826 +.L836: + add x5, x24, :lo12:.LANCHOR3 + lsr w0, w0, 2 + strh w0, [x5, 1352] + mov w0, 0 + bl zftl_get_gc_node.part.10 + and w1, w0, 65535 + mov w2, 65535 + cmp w1, w2 + beq .L838 + add x2, x19, :lo12:.LANCHOR0 + ubfiz x1, x1, 1, 16 + ldr x3, [x2, 1120] + ldrh w2, [x5, 1376] + ldrh w1, [x3, x1] + cmp w1, w2, lsr 2 + bcs .L838 + mov w1, 1 + mov w2, w22 + strh w1, [x5, 1352] + mov w1, 0 + bl gc_add_sblk + cmp w0, 0 + cset w23, ne + b .L837 +.L839: + strh wzr, [x27, 1352] + b .L835 +.L840: + sub w26, w26, #1 + ands w26, w26, 65535 + bne .L841 + b .L835 +.L842: + cmp w6, 64 + bls .L833 + strh wzr, [x27, 1354] + b .L833 +.L843: + sub w26, w26, #1 + ands w26, w26, 65535 + bne .L844 + b .L833 +.L866: + mov w28, 0 + mov w23, 0 + b .L833 +.L848: + add x0, x24, :lo12:.LANCHOR3 + strh wzr, [x0, 1356] + b .L850 +.L846: + strh wzr, [x27, 1356] + b .L850 +.L849: + sub w26, w26, #1 + ands w26, w26, 65535 + bne .L851 + b .L850 +.L853: + add x24, x24, :lo12:.LANCHOR3 + add x19, x19, :lo12:.LANCHOR0 + ldrh w0, [x24, 1376] + ldrb w1, [x24, 1321] + ldrh w2, [x19, 3406] + mul w1, w1, w0 + cmp w2, w1 + ble .L826 + sub w0, w2, w0, lsr 3 + strh w0, [x19, 3406] + b .L826 +.L855: + cmp w6, 64 + bls .L857 + strh wzr, [x4, 1354] +.L857: + cmp w23, w27 + bcc .L860 +.L859: + add x24, x24, :lo12:.LANCHOR3 + add x19, x19, :lo12:.LANCHOR0 + ldrh w1, [x24, 1376] + ldrb w0, [x24, 1321] + ldrh w2, [x19, 3404] + mul w0, w0, w1 + sub w0, w0, #32 + cmp w2, w0 + bge .L826 + add w1, w2, w1, lsr 3 + strh w1, [x19, 3404] + b .L826 +.L858: + sub w26, w26, #1 + ands w26, w26, 65535 + bne .L861 + b .L857 +.L867: + mov w28, 0 + mov w23, 0 + b .L835 + .size gc_search_src_blk, .-gc_search_src_blk + .align 2 + .global zftl_get_gc_node + .type zftl_get_gc_node, %function +zftl_get_gc_node: + stp x29, x30, [sp, -16]! + and w1, w1, 65535 + and w0, w0, 65535 + cmp w1, 5 + add x29, sp, 0 + bne .L919 + mov w1, w0 + adrp x0, .LANCHOR3 + add x0, x0, :lo12:.LANCHOR3 + add x0, x0, 1368 +.L923: + bl _list_get_gc_head_node + b .L924 +.L919: + cmp w1, 2 + bne .L921 + bl zftl_get_gc_node.part.10 +.L924: + and w0, w0, 65535 + ldp x29, x30, [sp], 16 + ret +.L921: + mov w1, w0 + adrp x0, .LANCHOR3 + add x0, x0, :lo12:.LANCHOR3 + add x0, x0, 1360 + b .L923 + .size zftl_get_gc_node, .-zftl_get_gc_node + .align 2 + .global zftl_insert_free_list + .type zftl_insert_free_list, %function +zftl_insert_free_list: + adrp x2, .LANCHOR0 + add x2, x2, :lo12:.LANCHOR0 + stp x29, x30, [sp, -16]! + and w1, w0, 65535 + adrp x3, .LANCHOR3 + add x3, x3, :lo12:.LANCHOR3 + add x29, sp, 0 + ldr x0, [x2, 1104] + add x0, x0, w1, uxth 2 + ldrb w0, [x0, 2] + ands w0, w0, 24 + bne .L926 + add x2, x2, 3368 + add x0, x3, 1384 +.L930: + bl _insert_free_list + ldp x29, x30, [sp], 16 + ret +.L926: + cmp w0, 16 + bne .L928 + add x2, x2, 3370 + add x0, x3, 1392 + b .L930 +.L928: + add x2, x2, 3372 + add x0, x3, 1400 + b .L930 + .size zftl_insert_free_list, .-zftl_insert_free_list + .align 2 + .global zftl_insert_data_list + .type zftl_insert_data_list, %function +zftl_insert_data_list: + adrp x2, .LANCHOR0 + add x2, x2, :lo12:.LANCHOR0 + stp x29, x30, [sp, -16]! + and w1, w0, 65535 + add x29, sp, 0 + ldr x0, [x2, 1104] + add x0, x0, w1, uxth 2 + ldrb w3, [x0, 2] + and w3, w3, 224 + cmp w3, 64 + bne .L932 + adrp x0, .LANCHOR3 + add x0, x0, :lo12:.LANCHOR3 + add x2, x2, 3374 + add x0, x0, 1344 +.L936: + bl _insert_data_list +.L931: + ldp x29, x30, [sp], 16 + ret +.L932: + cmp w3, 96 + bne .L934 + adrp x0, .LANCHOR3 + add x0, x0, :lo12:.LANCHOR3 + add x2, x2, 3376 + add x0, x0, 1360 + b .L936 +.L934: + cmp w3, 160 + bne .L931 + adrp x0, .LANCHOR3 + add x0, x0, :lo12:.LANCHOR3 + add x2, x2, 3378 + add x0, x0, 1368 + b .L936 + .size zftl_insert_data_list, .-zftl_insert_data_list + .align 2 + .global zftl_gc_get_free_sblk + .type zftl_gc_get_free_sblk, %function +zftl_gc_get_free_sblk: + stp x29, x30, [sp, -64]! + add x29, sp, 0 + stp x21, x22, [sp, 32] + and w22, w0, 65535 + stp x19, x20, [sp, 16] + adrp x19, .LANCHOR0 + add x21, x19, :lo12:.LANCHOR0 + str x23, [sp, 48] + and w23, w1, 65535 + ldr x0, [x21, 1128] + ldrh w20, [x0, 588] + mov w0, 65535 + cmp w20, w0 + beq .L938 + cbnz w22, .L938 + mov w1, w20 + adrp x0, .LC100 + add x0, x0, :lo12:.LC100 + bl printk + ldr x0, [x21, 1128] + mov w1, -1 + strh w1, [x0, 588] +.L939: + mov w0, w20 + ldr x23, [sp, 48] + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x29, x30, [sp], 64 + ret +.L938: + add x2, x19, :lo12:.LANCHOR0 + adrp x21, .LANCHOR3 + ldrh w0, [x2, 3370] + ldrh w1, [x2, 3372] + cmp w0, w1 + bcc .L940 + ldrh w2, [x2, 3368] + cmp w2, w0 + bls .L941 + cbz w1, .L941 +.L940: + cbnz w22, .L942 + lsr w1, w1, 2 +.L943: + add x2, x19, :lo12:.LANCHOR0 + add x0, x21, :lo12:.LANCHOR3 + add x2, x2, 3372 + add x0, x0, 1400 +.L958: + bl _list_pop_index_node + and w20, w0, 65535 + mov w0, 65535 + cmp w20, w0 + bne .L946 + add x0, x19, :lo12:.LANCHOR0 + add x21, x21, :lo12:.LANCHOR3 + mov w2, w23 + mov w1, w20 + ldrh w5, [x0, 3372] + ldrh w4, [x0, 3368] + adrp x0, .LC101 + ldr x3, [x21, 1384] + add x0, x0, :lo12:.LC101 + bl printk +.L946: + cbz w22, .L939 + adrp x0, .LANCHOR2 + ldr w0, [x0, #:lo12:.LANCHOR2] + tbz x0, 8, .L939 + add x19, x19, :lo12:.LANCHOR0 + uxtw x3, w20 + lsl x0, x3, 2 + ldr x1, [x19, 1104] + ldr x6, [x19, 1120] + add x2, x1, x0 + ldr w4, [x1, x0] + ldrh w6, [x6, x3, lsl 1] + ldrb w2, [x2, 2] + ldrh w5, [x1, x0] + ubfx x4, x4, 11, 8 + mov w1, w20 + adrp x0, .LC102 + ubfx x3, x2, 3, 2 + and w5, w5, 2047 + ubfx x2, x2, 5, 3 + add x0, x0, :lo12:.LC102 + bl printk + b .L939 +.L942: + mov w1, 7 + mul w1, w0, w1 + lsr w1, w1, 3 + b .L943 +.L941: + lsr w1, w0, 3 + cmp w22, 0 + add x2, x19, :lo12:.LANCHOR0 + add x0, x21, :lo12:.LANCHOR3 + csel w1, w1, wzr, ne + add x2, x2, 3370 + add x0, x0, 1392 + b .L958 + .size zftl_gc_get_free_sblk, .-zftl_gc_get_free_sblk + .align 2 + .global zftl_get_free_sblk + .type zftl_get_free_sblk, %function +zftl_get_free_sblk: + stp x29, x30, [sp, -48]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x19, .LANCHOR0 + stp x21, x22, [sp, 32] + and w21, w1, 65535 + cmp w21, 5 + bne .L960 + add x2, x19, :lo12:.LANCHOR0 + adrp x0, .LANCHOR3 + ldrh w3, [x2, 3370] + ldrh w1, [x2, 3372] + cmp w3, w1 + bcc .L961 + ldrh w2, [x2, 3368] + cmp w2, w3 + bls .L962 + cbz w1, .L962 +.L961: + add x2, x19, :lo12:.LANCHOR0 + add x0, x0, :lo12:.LANCHOR3 + add x2, x2, 3372 + lsr w1, w1, 1 +.L981: + add x0, x0, 1400 + b .L980 +.L962: + add x2, x19, :lo12:.LANCHOR0 + add x0, x0, :lo12:.LANCHOR3 + add x2, x2, 3370 + add x0, x0, 1392 + mov w1, 0 +.L980: + bl _list_pop_index_node + and w20, w0, 65535 + mov w0, 65535 + cmp w20, w0 + bne .L965 + add x19, x19, :lo12:.LANCHOR0 + adrp x0, .LANCHOR3+1384 + mov w2, w21 + mov w1, w20 + ldr x3, [x0, #:lo12:.LANCHOR3+1384] + adrp x0, .LC101 + ldrh w5, [x19, 3372] + add x0, x0, :lo12:.LC101 + ldrh w4, [x19, 3368] + bl printk + b .L965 +.L960: + add x22, x19, :lo12:.LANCHOR0 + and w3, w0, 65535 + ldr x0, [x22, 1128] + ldrh w20, [x0, 590] + mov w0, 65535 + cmp w20, w0 + beq .L964 + cmp w21, 1 + beq .L964 + mov w1, w20 + adrp x0, .LC103 + add x0, x0, :lo12:.LC103 + bl printk + ldr x0, [x22, 1128] + mov w1, -1 + strh w1, [x0, 590] +.L965: + mov w0, w20 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x29, x30, [sp], 48 + ret +.L964: + add x1, x19, :lo12:.LANCHOR0 + ldrh w0, [x1, 3368] + ldrh w2, [x1, 3372] + cmp w0, w2 + bcc .L966 + ldrh w1, [x1, 3370] + cmp w1, w0 + bls .L967 + cbz w2, .L967 +.L966: + bl get_ink_scaned_blk + and w20, w0, 65535 + mov w0, 65535 + cmp w20, w0 + bne .L965 + cmp w21, 1 + bne .L968 + add x0, x19, :lo12:.LANCHOR0 + ldrh w3, [x0, 3372] + lsr w3, w3, 1 +.L968: + add x2, x19, :lo12:.LANCHOR0 + adrp x0, .LANCHOR3 + add x2, x2, 3372 + mov w1, w3 + add x0, x0, :lo12:.LANCHOR3 + b .L981 +.L967: + lsr w0, w0, 1 + cmp w21, 1 + csel w3, w0, w3, eq + add x2, x19, :lo12:.LANCHOR0 + adrp x0, .LANCHOR3 + add x0, x0, :lo12:.LANCHOR3 + add x2, x2, 3368 + mov w1, w3 + add x0, x0, 1384 + b .L980 + .size zftl_get_free_sblk, .-zftl_get_free_sblk + .align 2 + .global zftl_remove_data_node + .type zftl_remove_data_node, %function +zftl_remove_data_node: + adrp x2, .LANCHOR0 + add x2, x2, :lo12:.LANCHOR0 + stp x29, x30, [sp, -16]! + and w1, w0, 65535 + add x29, sp, 0 + ldr x0, [x2, 1104] + add x0, x0, w1, uxth 2 + ldrb w3, [x0, 2] + and w3, w3, 224 + cmp w3, 64 + bne .L983 + adrp x0, .LANCHOR3 + add x0, x0, :lo12:.LANCHOR3 + add x2, x2, 3374 + add x0, x0, 1344 +.L987: + bl _list_remove_node +.L982: + ldp x29, x30, [sp], 16 + ret +.L983: + cmp w3, 96 + bne .L985 + adrp x0, .LANCHOR3 + add x0, x0, :lo12:.LANCHOR3 + add x2, x2, 3376 + add x0, x0, 1360 + b .L987 +.L985: + cmp w3, 160 + bne .L982 + adrp x0, .LANCHOR3 + add x0, x0, :lo12:.LANCHOR3 + add x2, x2, 3378 + add x0, x0, 1368 + b .L987 + .size zftl_remove_data_node, .-zftl_remove_data_node + .align 2 + .global zftl_remove_free_node + .type zftl_remove_free_node, %function +zftl_remove_free_node: + adrp x2, .LANCHOR0 + add x2, x2, :lo12:.LANCHOR0 + stp x29, x30, [sp, -16]! + and w1, w0, 65535 + adrp x3, .LANCHOR3 + add x3, x3, :lo12:.LANCHOR3 + add x29, sp, 0 + ldr x0, [x2, 1104] + add x0, x0, w1, uxth 2 + ldrb w0, [x0, 2] + ands w0, w0, 24 + bne .L989 + add x2, x2, 3368 + add x0, x3, 1384 +.L993: + bl _list_remove_node + ldp x29, x30, [sp], 16 + ret +.L989: + cmp w0, 16 + bne .L991 + add x2, x2, 3370 + add x0, x3, 1392 + b .L993 +.L991: + add x2, x2, 3372 + add x0, x3, 1400 + b .L993 + .size zftl_remove_free_node, .-zftl_remove_free_node + .align 2 + .global zftl_list_update_data_list + .type zftl_list_update_data_list, %function +zftl_list_update_data_list: + adrp x2, .LANCHOR0 + add x2, x2, :lo12:.LANCHOR0 + stp x29, x30, [sp, -16]! + and w1, w0, 65535 + add x29, sp, 0 + ldr x0, [x2, 1104] + add x0, x0, w1, uxth 2 + ldrb w3, [x0, 2] + and w3, w3, 224 + cmp w3, 64 + bne .L995 + adrp x0, .LANCHOR3 + add x0, x0, :lo12:.LANCHOR3 + add x2, x2, 3374 + add x0, x0, 1344 +.L999: + bl _list_update_data_list +.L994: + ldp x29, x30, [sp], 16 + ret +.L995: + cmp w3, 96 + bne .L997 + adrp x0, .LANCHOR3 + add x0, x0, :lo12:.LANCHOR3 + add x2, x2, 3376 + add x0, x0, 1360 + b .L999 +.L997: + cmp w3, 160 + bne .L994 + adrp x0, .LANCHOR3 + add x0, x0, :lo12:.LANCHOR3 + add x2, x2, 3378 + add x0, x0, 1368 + b .L999 + .size zftl_list_update_data_list, .-zftl_list_update_data_list + .align 2 + .global print_list_info + .type print_list_info, %function +print_list_info: + sub sp, sp, #96 + stp x29, x30, [sp, 32] + add x29, sp, 32 + stp x19, x20, [sp, 48] + mov x19, x0 + stp x21, x22, [sp, 64] + stp x23, x24, [sp, 80] + ldrh w2, [x1] + ldr x1, [x0] + adrp x0, .LC104 + add x0, x0, :lo12:.LC104 + bl printk + ldr x19, [x19] + cbz x19, .L1000 + adrp x21, .LANCHOR0 + mov x24, -6148914691236517206 + adrp x23, .LC105 + adrp x22, .LANCHOR3 + add x21, x21, :lo12:.LANCHOR0 + add x23, x23, :lo12:.LC105 + add x22, x22, :lo12:.LANCHOR3 + mov w20, 0 + movk x24, 0xaaab, lsl 0 +.L1003: + ldr x2, [x21, 1040] + ldr x1, [x21, 1104] + sub x2, x19, x2 + ldr x8, [x21, 1120] + asr x2, x2, 1 + ldrh w5, [x19, 4] + ldrh w4, [x19, 2] + mul x2, x2, x24 + and x7, x2, 65535 + and w2, w2, 65535 + lsl x0, x7, 2 + add x3, x1, x0 + ldrh w7, [x8, x7, lsl 1] + ldrb w6, [x3, 2] + ldrh w3, [x19] + str w7, [sp, 16] + ldrh w7, [x1, x0] + and w7, w7, 2047 + str w7, [sp, 8] + ubfx x7, x6, 3, 2 + ubfx x6, x6, 5, 3 + ldr w0, [x1, x0] + mov w1, w20 + ubfx x0, x0, 11, 8 + str w0, [sp] + mov x0, x23 + bl printk + ldrh w19, [x19] + mov w0, 65535 + cmp w19, w0 + beq .L1000 + ldr x0, [x21, 1040] + mov w1, 6 + add w20, w20, 1 + and w20, w20, 65535 + umaddl x19, w19, w1, x0 + ldrh w0, [x22, 1408] + cmp w0, w20 + bcs .L1003 +.L1000: + ldp x19, x20, [sp, 48] + ldp x21, x22, [sp, 64] + ldp x23, x24, [sp, 80] + ldp x29, x30, [sp, 32] + add sp, sp, 96 + ret + .size print_list_info, .-print_list_info + .align 2 + .global dump_all_list_info + .type dump_all_list_info, %function +dump_all_list_info: + stp x29, x30, [sp, -32]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x20, .LANCHOR0 + adrp x19, .LANCHOR3 + add x20, x20, :lo12:.LANCHOR0 + add x19, x19, :lo12:.LANCHOR3 + add x1, x20, 3368 + add x0, x19, 1384 + bl print_list_info + add x1, x20, 3370 + add x0, x19, 1392 + bl print_list_info + add x1, x20, 3372 + add x0, x19, 1400 + bl print_list_info + add x1, x20, 3374 + add x0, x19, 1344 + bl print_list_info + add x1, x20, 3376 + add x0, x19, 1360 + bl print_list_info + add x1, x20, 3378 + add x0, x19, 1368 + bl print_list_info + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 32 + ret + .size dump_all_list_info, .-dump_all_list_info + .align 2 + .global ftl_tmp_into_update + .type ftl_tmp_into_update, %function +ftl_tmp_into_update: + adrp x0, .LANCHOR0+3384 + ldr x0, [x0, #:lo12:.LANCHOR0+3384] + ldr w1, [x0, 16] + cmp w1, 2048 + bls .L1008 + ldr w2, [x0, 20] + add w2, w2, w1, lsr 11 + and w1, w1, 2047 + stp w1, w2, [x0, 16] +.L1008: + ldr w1, [x0, 24] + cmp w1, 2048 + bls .L1009 + ldr w2, [x0, 28] + add w2, w2, w1, lsr 11 + and w1, w1, 2047 + stp w1, w2, [x0, 24] +.L1009: + ldr w1, [x0, 32] + cmp w1, 1024 + bls .L1010 + ldr w2, [x0, 36] + add w2, w2, w1, lsr 10 + and w1, w1, 1023 + stp w1, w2, [x0, 32] +.L1010: + ldr w1, [x0, 40] + cmp w1, 1024 + bls .L1007 + ldr w2, [x0, 44] + add w2, w2, w1, lsr 10 + and w1, w1, 1023 + stp w1, w2, [x0, 40] +.L1007: + ret + .size ftl_tmp_into_update, .-ftl_tmp_into_update + .align 2 + .global ftl_get_blk_list_in_sblk + .type ftl_get_blk_list_in_sblk, %function +ftl_get_blk_list_in_sblk: + adrp x5, .LANCHOR0 + add x5, x5, :lo12:.LANCHOR0 + and w9, w0, 65535 + mov w4, 0 + mov w0, 0 + mov w12, 24 + ldr x2, [x5, 1104] + add x2, x2, w9, uxth 2 + ldrb w11, [x2, 3] + adrp x2, .LANCHOR3 + add x7, x2, :lo12:.LANCHOR3 + mov x3, x2 +.L1013: + ldrb w2, [x7, 1321] + cmp w4, w2 + blt .L1016 + mov w4, w0 + add x2, x3, :lo12:.LANCHOR3 + mov w5, -1 +.L1017: + ldrb w3, [x2, 1321] + cmp w4, w3 + blt .L1018 + ret +.L1016: + asr w2, w11, w4 + tbnz x2, 0, .L1014 + ldrb w2, [x7, 1306] + sbfiz x10, x0, 1, 32 + ldrb w6, [x5, 1205] + ldrh w13, [x7, 1304] + sub w6, w12, w6 + sdiv w8, w4, w2 + sub w6, w6, w13 + lsl w6, w8, w6 + madd w2, w9, w2, w6 + and w2, w2, 65535 + strh w2, [x1, x10] + ldrb w6, [x7, 1306] + cmp w6, 1 + bls .L1015 + sub w6, w6, #1 + and w6, w6, w4 + add w2, w2, w6 + strh w2, [x1, x10] +.L1015: + add w0, w0, 1 +.L1014: + add w4, w4, 1 + b .L1013 +.L1018: + strh w5, [x1, w4, sxtw 1] + add w4, w4, 1 + b .L1017 + .size ftl_get_blk_list_in_sblk, .-ftl_get_blk_list_in_sblk + .align 2 + .global ftl_erase_phy_blk + .type ftl_erase_phy_blk, %function +ftl_erase_phy_blk: + stp x29, x30, [sp, -48]! + mov w2, 24 + and w0, w0, 65535 + add x29, sp, 0 + stp x21, x22, [sp, 32] + mov w22, w1 + adrp x1, .LANCHOR0+1205 + stp x19, x20, [sp, 16] + ldrb w19, [x1, #:lo12:.LANCHOR0+1205] + adrp x1, .LANCHOR3 + add x3, x1, :lo12:.LANCHOR3 + mov x20, x1 + sub w19, w2, w19 + ldrh w2, [x3, 1304] + sub w2, w19, w2 + mov w19, 1 + lsl w19, w19, w2 + sub w19, w19, #1 + and w19, w19, w0 + asr w21, w0, w2 + ldrb w0, [x3, 1322] + sxth w19, w19 + cbz w0, .L1020 + ldrb w0, [x3, 1323] + cbnz w0, .L1020 + ldrh w2, [x3, 1410] + cmp w22, 0 + cset w1, eq + mov w0, w21 + mul w2, w2, w19 + bl flash_erase_block_en +.L1020: + add x1, x20, :lo12:.LANCHOR3 + mov w0, w21 + ldrh w2, [x1, 1410] + mov w1, w22 + mul w2, w2, w19 + bl flash_erase_block_en + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x29, x30, [sp], 48 + ret + .size ftl_erase_phy_blk, .-ftl_erase_phy_blk + .align 2 + .global ftl_erase_sblk + .type ftl_erase_sblk, %function +ftl_erase_sblk: + stp x29, x30, [sp, -176]! + add x29, sp, 0 + stp x21, x22, [sp, 32] + mov w22, w1 + stp x25, x26, [sp, 64] + and w25, w0, 65535 + adrp x0, .LANCHOR0 + add x1, x0, :lo12:.LANCHOR0 + stp x19, x20, [sp, 16] + ubfiz x21, x25, 2, 16 + stp x23, x24, [sp, 48] + adrp x26, .LANCHOR3 + stp x27, x28, [sp, 80] + mov x20, x0 + add x27, x29, 112 + add x24, x26, :lo12:.LANCHOR3 + ldr x1, [x1, 1104] + mov w19, 0 + add x1, x1, x21 + ldrb w28, [x1, 3] +.L1026: + add x0, x26, :lo12:.LANCHOR3 + ldrb w1, [x0, 1412] + cmp w19, w1 + bge .L1037 + ldrb w1, [x0, 1306] + mov w23, 0 + ldrh w3, [x0, 1410] + mov w0, 0 + sub w4, w1, #1 + mul w6, w19, w1 + mul w5, w25, w1 + b .L1038 +.L1028: + add w2, w6, w0 + asr w2, w28, w2 + tbnz x2, 0, .L1027 + and w2, w0, w4 + add w2, w2, w5 + mul w2, w2, w3 + str w2, [x27, w23, sxtw 2] + add w23, w23, 1 +.L1027: + add w0, w0, 1 +.L1038: + cmp w0, w1 + blt .L1028 + cmp w1, 4 + bne .L1029 + mov x3, 0 +.L1030: + cmp w23, w3 + bgt .L1031 +.L1032: + add w19, w19, 1 + b .L1026 +.L1031: + ldr w2, [x27, x3, lsl 2] + mov w1, w22 + str x3, [x29, 104] + mov w0, w19 + bl flash_erase_block_en + ldr x3, [x29, 104] + add x3, x3, 1 + b .L1030 +.L1029: + cmp w23, 2 + bne .L1033 + ldrb w0, [x24, 1322] + cbz w0, .L1034 + ldrb w0, [x24, 1323] + cbnz w0, .L1034 + ldp w2, w3, [x29, 112] + cmp w22, 0 + cset w1, eq + mov w0, w19 + bl flash_erase_duplane_block +.L1034: + ldp w2, w3, [x29, 112] + mov w1, w22 + mov w0, w19 + bl flash_erase_duplane_block + b .L1032 +.L1033: + cmp w23, 1 + bne .L1032 + ldrb w0, [x24, 1322] + cbz w0, .L1036 + ldrb w0, [x24, 1323] + cbnz w0, .L1036 + ldr w2, [x29, 112] + cmp w22, 0 + cset w1, eq + mov w0, w19 + bl flash_erase_block_en +.L1036: + ldr w2, [x29, 112] + mov w1, w22 + mov w0, w19 + bl flash_erase_block_en + b .L1032 +.L1037: + add x0, x20, :lo12:.LANCHOR0 + cbnz w22, .L1039 + ldr x2, [x0, 1104] + ldrh w1, [x2, x21] + add w3, w1, 1 + bfi w1, w3, 0, 11 + strh w1, [x2, x21] + ldr x1, [x0, 3384] + ldr x0, [x0, 1104] + ldr w2, [x1, 84] + ldrh w3, [x1, 96] + add w2, w2, 1 + str w2, [x1, 84] + ldrh w0, [x0, x21] + ubfx x0, x0, 0, 11 + and w2, w0, 65535 + cmp w3, w2 + bge .L1041 + strh w0, [x1, 96] +.L1041: + ldp x19, x20, [sp, 16] + mov w0, 0 + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 176 + ret +.L1039: + ldr x3, [x0, 1104] + ldr w1, [x3, x21] + ubfx x2, x1, 11, 8 + add w2, w2, 1 + bfi w1, w2, 11, 8 + str w1, [x3, x21] + ldr x1, [x0, 3384] + ldr x0, [x0, 1104] + ldr w2, [x1, 80] + add w2, w2, 1 + str w2, [x1, 80] + ldrh w2, [x1, 98] + ldr w0, [x0, x21] + ubfx x0, x0, 11, 8 + cmp w2, w0, uxtb + bcs .L1041 + strh w0, [x1, 98] + b .L1041 + .size ftl_erase_sblk, .-ftl_erase_sblk + .align 2 + .global ftl_alloc_sys_blk + .type ftl_alloc_sys_blk, %function +ftl_alloc_sys_blk: + stp x29, x30, [sp, -32]! + adrp x0, .LANCHOR0 + add x1, x0, :lo12:.LANCHOR0 + add x29, sp, 0 + str x19, [sp, 16] + mov x19, x0 + ldr x1, [x1, 3384] + ldrh w2, [x1, 136] + cmp w2, 63 + bls .L1051 + strh wzr, [x1, 136] +.L1051: + ldrh w0, [x1, 112] + cbnz w0, .L1052 + adrp x1, .LANCHOR1 + add x1, x1, :lo12:.LANCHOR1 + add x1, x1, 1592 + mov w2, 1359 + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack +.L1052: + add x0, x19, :lo12:.LANCHOR0 + mov w4, 65535 + ldr x1, [x0, 3384] +.L1056: + ldrh w2, [x1, 136] + ubfiz x3, x2, 1, 16 + add x3, x3, 160 + add x3, x1, x3 +.L1053: + cmp w2, 63 + ble .L1055 + strh wzr, [x1, 136] + b .L1056 +.L1055: + ldrh w0, [x3], 2 + cmp w0, w4 + bne .L1058 + add w2, w2, 1 + b .L1053 +.L1058: + add x3, x1, w2, sxtw 1 + mov w4, -1 + strh w4, [x3, 160] + strh w2, [x1, 136] + ldrh w2, [x1, 112] + sub w2, w2, #1 + strh w2, [x1, 112] + ldr x19, [sp, 16] + ldp x29, x30, [sp], 32 + ret + .size ftl_alloc_sys_blk, .-ftl_alloc_sys_blk + .align 2 + .global ftl_free_sys_blk + .type ftl_free_sys_blk, %function +ftl_free_sys_blk: + stp x29, x30, [sp, -32]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + and w20, w0, 65535 + adrp x0, .LANCHOR0 + add x1, x0, :lo12:.LANCHOR0 + mov x19, x0 + ldr x1, [x1, 3384] + ldrh w2, [x1, 138] + cmp w2, 63 + bls .L1061 + strh wzr, [x1, 138] +.L1061: + ldrh w0, [x1, 112] + cmp w0, 63 + bls .L1062 + adrp x1, .LANCHOR1 + add x1, x1, :lo12:.LANCHOR1 + add x1, x1, 1616 + mov w2, 1386 + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack +.L1062: + add x0, x19, :lo12:.LANCHOR0 + mov w3, 65535 + ldr x0, [x0, 3384] +.L1066: + ldrh w1, [x0, 138] + ubfiz x2, x1, 1, 16 + add x2, x2, 160 + add x2, x0, x2 +.L1063: + cmp w1, 63 + ble .L1065 + strh wzr, [x0, 138] + b .L1066 +.L1065: + ldrh w4, [x2], 2 + cmp w4, w3 + bne .L1064 + add x2, x0, w1, sxtw 1 + strh w20, [x2, 160] + strh w1, [x0, 138] + ldrh w1, [x0, 112] + add w1, w1, 1 + strh w1, [x0, 112] + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 32 + ret +.L1064: + add w1, w1, 1 + b .L1063 + .size ftl_free_sys_blk, .-ftl_free_sys_blk + .align 2 + .global ftl_info_data_recovery + .type ftl_info_data_recovery, %function +ftl_info_data_recovery: + ldrh w2, [x0] + mov w1, 65535 + cmp w2, w1 + beq .L1079 + stp x29, x30, [sp, -64]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x19, .LANCHOR0 + str x23, [sp, 48] + add x23, x19, :lo12:.LANCHOR0 + stp x21, x22, [sp, 32] + ubfiz x20, x2, 2, 16 + ldr x21, [x23, 1104] + add x22, x21, x20 + ldrb w1, [x22, 2] + tst w1, 224 + bne .L1069 + ldrb w0, [x0, 4] + bfi w1, w0, 5, 3 + strb w1, [x22, 2] + mov w0, w2 + bl zftl_remove_free_node + ldrb w0, [x22, 2] + ldr x1, [x23, 3384] + tbz x0, 3, .L1073 + ldrh w0, [x1, 116] + sub w0, w0, #1 + strh w0, [x1, 116] +.L1074: + ldrb w0, [x22, 2] + and w0, w0, 224 + cmp w0, 160 + bne .L1076 + ldr w0, [x21, x20] + add x19, x19, :lo12:.LANCHOR0 + ubfx x1, x0, 11, 8 + add w1, w1, 1 + bfi w0, w1, 11, 8 + str w0, [x21, x20] + ldr x1, [x19, 3384] + ldrh w0, [x1, 120] + sub w0, w0, #1 + strh w0, [x1, 120] +.L1069: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldr x23, [sp, 48] + ldp x29, x30, [sp], 64 + ret +.L1073: + tst w0, 24 + bne .L1075 + ldrh w0, [x1, 114] + sub w0, w0, #1 + strh w0, [x1, 114] + b .L1074 +.L1075: + ldrh w0, [x1, 118] + sub w0, w0, #1 + strh w0, [x1, 118] + b .L1074 +.L1076: + ldrh w1, [x21, x20] + cmp w0, 64 + add w2, w1, 1 + bfi w1, w2, 0, 11 + strh w1, [x21, x20] + bne .L1077 + add x19, x19, :lo12:.LANCHOR0 + ldr x1, [x19, 3384] + ldrh w0, [x1, 122] + sub w0, w0, #1 + strh w0, [x1, 122] + b .L1069 +.L1077: + cmp w0, 96 + bne .L1069 + add x19, x19, :lo12:.LANCHOR0 + ldr x1, [x19, 3384] + ldrh w0, [x1, 124] + sub w0, w0, #1 + strh w0, [x1, 124] + b .L1069 +.L1079: + ret + .size ftl_info_data_recovery, .-ftl_info_data_recovery + .align 2 + .global ftl_get_ppa_from_index + .type ftl_get_ppa_from_index, %function +ftl_get_ppa_from_index: + stp x29, x30, [sp, -48]! + adrp x1, .LANCHOR0+1128 + and w0, w0, 65535 + add x29, sp, 0 + ldr x2, [x1, #:lo12:.LANCHOR0+1128] + adrp x1, .LANCHOR3 + add x4, x1, :lo12:.LANCHOR3 + stp x19, x20, [sp, 16] + str x21, [sp, 32] + mov x19, x1 + ldrh w3, [x4, 1376] + ldrb w4, [x4, 1321] + mul w3, w3, w4 + cmp w0, w3 + bge .L1083 + add x2, x2, 16 +.L1084: + ldrb w1, [x2, 9] + sdiv w20, w0, w1 + msub w0, w20, w1, w0 + add x0, x2, w0, uxth 1 + ldrh w21, [x0, 16] + mov w0, 65535 + cmp w21, w0 + bne .L1085 + adrp x1, .LANCHOR1 + add x1, x1, :lo12:.LANCHOR1 + add x1, x1, 1640 + mov w2, 1945 + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack +.L1085: + add x1, x19, :lo12:.LANCHOR3 + ldrh w0, [x1, 1410] + madd w0, w0, w21, w20 + ldr x21, [sp, 32] + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 48 + ret +.L1083: + sub w0, w0, w3 + add x2, x2, 48 + and w0, w0, 65535 + b .L1084 + .size ftl_get_ppa_from_index, .-ftl_get_ppa_from_index + .align 2 + .global lpa_hash_get_ppa + .type lpa_hash_get_ppa, %function +lpa_hash_get_ppa: + adrp x1, .LANCHOR3 + add x1, x1, :lo12:.LANCHOR3 + and x3, x0, 255 + add x2, x1, 1416 + ldr x4, [x1, 1928] + ldr x5, [x1, 1936] + ldrh w2, [x2, x3, lsl 1] + mov w3, 65535 +.L1088: + cmp w2, w3 + bne .L1091 + mov w0, -1 + ret +.L1091: + uxtw x1, w2 + ldr w6, [x4, x1, lsl 2] + cmp w0, w6 + bne .L1089 + stp x29, x30, [sp, -16]! + mov w0, w2 + add x29, sp, 0 + bl ftl_get_ppa_from_index + ldp x29, x30, [sp], 16 + ret +.L1089: + ldrh w2, [x5, x1, lsl 1] + b .L1088 + .size lpa_hash_get_ppa, .-lpa_hash_get_ppa + .align 2 + .global ftl_get_new_free_page + .type ftl_get_new_free_page, %function +ftl_get_new_free_page: + stp x29, x30, [sp, -32]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + mov x19, x0 + ldrh w1, [x0] + mov w0, 65535 + cmp w1, w0 + bne .L1097 + adrp x1, .LANCHOR1 + add x1, x1, :lo12:.LANCHOR1 + add x1, x1, 1664 + mov w2, 2088 + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack +.L1097: + adrp x20, .LANCHOR3 + add x0, x20, :lo12:.LANCHOR3 + ldrh w1, [x19, 2] + ldrh w0, [x0, 1376] + cmp w1, w0 + bne .L1098 + adrp x1, .LANCHOR1 + add x1, x1, :lo12:.LANCHOR1 + add x1, x1, 1664 + mov w2, 2089 + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack +.L1098: + ldrh w0, [x19, 6] + cbnz w0, .L1099 + adrp x1, .LANCHOR1 + add x1, x1, :lo12:.LANCHOR1 + add x1, x1, 1664 + mov w2, 2090 + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack +.L1099: + ldrb w0, [x19, 5] + mov w2, 65535 + add x0, x0, 8 + ldrh w3, [x19, x0, lsl 1] + add x0, x20, :lo12:.LANCHOR3 + ldrb w4, [x0, 1321] +.L1100: + cmp w3, w2 + ldrb w1, [x19, 5] + beq .L1102 + add x20, x20, :lo12:.LANCHOR3 + add w1, w1, 1 + and w1, w1, 255 + ldrh w2, [x19, 2] + strb w1, [x19, 5] + cmp w4, w1 + ldrh w0, [x20, 1410] + mul w0, w0, w3 + ldrh w3, [x19, 6] + sub w3, w3, #1 + strh w3, [x19, 6] + ldrh w3, [x19, 10] + orr w0, w0, w2 + add w3, w3, 1 + strh w3, [x19, 10] + bne .L1096 + add w2, w2, 1 + strb wzr, [x19, 5] + strh w2, [x19, 2] +.L1096: + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 32 + ret +.L1102: + add w1, w1, 1 + and w1, w1, 255 + strb w1, [x19, 5] + cmp w1, w4 + bne .L1101 + ldrh w0, [x19, 2] + strb wzr, [x19, 5] + add w0, w0, 1 + strh w0, [x19, 2] +.L1101: + ldrb w0, [x19, 5] + add x0, x0, 8 + ldrh w3, [x19, x0, lsl 1] + b .L1100 + .size ftl_get_new_free_page, .-ftl_get_new_free_page + .align 2 + .global ftl_ext_alloc_new_blk + .type ftl_ext_alloc_new_blk, %function +ftl_ext_alloc_new_blk: + stp x29, x30, [sp, -32]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + bl ftl_alloc_sys_blk + and w0, w0, 65535 + mov w1, 65533 + mov w20, w0 + sub w0, w0, #1 + cmp w1, w0, uxth + bcs .L1106 + adrp x1, .LANCHOR1 + add x1, x1, :lo12:.LANCHOR1 + add x1, x1, 1688 + mov w2, 2125 + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack +.L1106: + adrp x19, .LANCHOR0 + add x19, x19, :lo12:.LANCHOR0 + mov w1, 0 + mov w0, w20 + bl ftl_erase_phy_blk + ldr x0, [x19, 3384] + ldrh w0, [x0, 130] + bl ftl_free_sys_blk + ldr x0, [x19, 3384] + strh w20, [x0, 130] + strh wzr, [x0, 140] + mov w0, 0 + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 32 + ret + .size ftl_ext_alloc_new_blk, .-ftl_ext_alloc_new_blk + .align 2 + .global ftl_total_vpn_update + .type ftl_total_vpn_update, %function +ftl_total_vpn_update: + adrp x1, .LANCHOR3 + add x3, x1, :lo12:.LANCHOR3 + ldrh w2, [x3, 1944] + cmp w2, 4 + bhi .L1109 + cbnz w0, .L1109 + add w2, w2, 1 + strh w2, [x3, 1944] + ret +.L1109: + add x1, x1, :lo12:.LANCHOR3 + adrp x0, .LANCHOR0 + mov x2, 0 + mov w3, 0 + mov w9, 65535 + strh wzr, [x1, 1944] + add x1, x0, :lo12:.LANCHOR0 + ldrh w6, [x1, 1096] + ldr x8, [x1, 1104] + ldr x7, [x1, 1120] + mov w1, 0 +.L1111: + cmp w6, w2, uxth + bhi .L1114 + add x0, x0, :lo12:.LANCHOR0 + ldr x2, [x0, 1128] + ldr x0, [x0, 3384] + str w3, [x2, 524] + str w1, [x2, 528] + ldrh w0, [x0, 120] + cbz w0, .L1108 + udiv w1, w1, w0 + str w1, [x2, 532] +.L1108: + ret +.L1114: + ldrh w4, [x7, x2, lsl 1] + cmp w4, w9 + beq .L1112 + add x5, x8, x2, lsl 2 + ldrb w5, [x5, 2] + and w5, w5, 224 + cmp w5, 160 + bne .L1113 + add w1, w1, w4 +.L1112: + add x2, x2, 1 + b .L1111 +.L1113: + add w3, w3, w4 + b .L1112 + .size ftl_total_vpn_update, .-ftl_total_vpn_update + .align 2 + .global ftl_debug_info_fill + .type ftl_debug_info_fill, %function +ftl_debug_info_fill: + adrp x3, .LANCHOR3+1946 + ldrb w3, [x3, #:lo12:.LANCHOR3+1946] + cmp w3, 8 + bls .L1123 + and w0, w0, 255 + cmp x2, 0 + ccmp w0, 2, 0, ne + bne .L1121 + stp x29, x30, [sp, -32]! + mov x0, x2 + add x29, sp, 0 + str x19, [sp, 16] + mov x19, x1 + mov w1, 21320 + movk w1, 0x4841, lsl 16 + str w1, [x19] + mov w1, 1024 + bl js_hash + str w0, [x19, 4] + mov w0, 0 + ldr x19, [sp, 16] + ldp x29, x30, [sp], 32 + ret +.L1121: + stp wzr, wzr, [x1] +.L1123: + mov w0, 0 + ret + .size ftl_debug_info_fill, .-ftl_debug_info_fill + .align 2 + .global ftl_vpn_update + .type ftl_vpn_update, %function +ftl_vpn_update: + stp x29, x30, [sp, -32]! + add x29, sp, 0 + str x19, [sp, 16] + and w19, w0, 65535 + mov w0, w19 + bl zftl_list_update_data_list + adrp x1, .LANCHOR0 + add x1, x1, :lo12:.LANCHOR0 + ubfiz x19, x19, 1, 16 + ldr x0, [x1, 1120] + ldrh w0, [x0, x19] + cbnz w0, .L1128 + mov w0, 1 + str w0, [x1, 3396] +.L1126: + ldr x19, [sp, 16] + ldp x29, x30, [sp], 32 + ret +.L1128: + mov w0, 0 + b .L1126 + .size ftl_vpn_update, .-ftl_vpn_update + .align 2 + .global ftl_vpn_decrement + .type ftl_vpn_decrement, %function +ftl_vpn_decrement: + stp x29, x30, [sp, -32]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + and w20, w0, 65535 + mov w0, 65535 + cmp w20, w0 + beq .L1131 + adrp x2, .LANCHOR0 + add x2, x2, :lo12:.LANCHOR0 + uxtw x1, w20 + lsl x3, x1, 1 + ldr x4, [x2, 1120] + ldrh w0, [x4, x3] + cbnz w0, .L1132 + ldr x0, [x2, 1104] + mov w2, 0 + add x1, x0, x1, lsl 2 + adrp x0, .LC106 + add x0, x0, :lo12:.LC106 + ldrb w3, [x1, 2] + mov w1, w20 + ubfx x3, x3, 5, 3 + bl printk +.L1137: + mov w0, 0 + b .L1130 +.L1132: + sub w0, w0, #1 + strh w0, [x4, x3] +.L1131: + adrp x19, .LANCHOR3 + add x19, x19, :lo12:.LANCHOR3 + ldrh w0, [x19, 1280] + cmp w20, w0 + beq .L1137 + mov w1, 65535 + cmp w0, w1 + bne .L1134 + strh w20, [x19, 1280] + b .L1137 +.L1134: + bl ftl_vpn_update + cmp w0, 0 + ldrh w2, [x19, 1948] + cset w0, ne + add x1, x19, 1288 + ldrh w3, [x19, 1280] + add w2, w2, 1 + strh w20, [x19, 1280] + and w2, w2, 65535 + cmp w2, 7 + csel w2, w2, wzr, ls + strh w2, [x19, 1948] + and x2, x2, 65535 + strh w3, [x1, x2, lsl 1] +.L1130: + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 32 + ret + .size ftl_vpn_decrement, .-ftl_vpn_decrement + .align 2 + .global lpa_hash_update_ppa + .type lpa_hash_update_ppa, %function +lpa_hash_update_ppa: + adrp x3, .LANCHOR3 + add x6, x3, :lo12:.LANCHOR3 + add x5, x6, 1416 + and x4, x0, 255 + and w2, w2, 65535 + ldr x10, [x6, 1928] + ldrh w5, [x5, x4, lsl 1] + ldr x11, [x6, 1936] + mov w6, 65535 + mov w9, w6 +.L1140: + cmp w5, w9 + beq .L1144 + uxtw x8, w5 + lsl x7, x8, 2 + add x12, x10, x7 + ldr w7, [x10, x7] + cmp w0, w7 + lsl x7, x8, 1 + bne .L1141 + mov w5, -1 + str w5, [x12] + cmp w6, w9 + add x5, x3, :lo12:.LANCHOR3 + bne .L1142 + ldr x6, [x5, 1936] + add x5, x5, 1416 + ldrh w6, [x6, x7] + strh w6, [x5, x4, lsl 1] +.L1143: + add x5, x3, :lo12:.LANCHOR3 + mov w6, -1 + ldr x5, [x5, 1936] + strh w6, [x5, x8, lsl 1] +.L1144: + add x3, x3, :lo12:.LANCHOR3 + uxtw x5, w2 + cmn w1, #1 + ldr x6, [x3, 1928] + str w0, [x6, x5, lsl 2] + add x0, x3, 1416 + ldrh w6, [x0, x4, lsl 1] + strh w2, [x0, x4, lsl 1] + ldr x0, [x3, 1936] + strh w6, [x0, x5, lsl 1] + beq .L1151 + stp x29, x30, [sp, -16]! + adrp x0, .LANCHOR0+1205 + add x29, sp, 0 + ldrb w2, [x0, #:lo12:.LANCHOR0+1205] + mov w0, 24 + ldrh w4, [x3, 1304] + sub w0, w0, w2 + sub w2, w0, w4 + mov w0, 1 + lsr w1, w1, w4 + lsl w0, w0, w2 + sub w0, w0, #1 + and w1, w0, w1 + ldrb w0, [x3, 1306] + udiv w0, w1, w0 + bl ftl_vpn_decrement + mov w0, -1 + ldp x29, x30, [sp], 16 + ret +.L1142: + ldr x5, [x5, 1936] + ldrh w7, [x5, x7] + strh w7, [x5, w6, uxtw 1] + b .L1143 +.L1141: + mov w6, w5 + ldrh w5, [x11, x7] + b .L1140 +.L1151: + mov w0, -1 + ret + .size lpa_hash_update_ppa, .-lpa_hash_update_ppa + .align 2 + .global ftl_mask_bad_block + .type ftl_mask_bad_block, %function +ftl_mask_bad_block: + stp x29, x30, [sp, -48]! + adrp x6, .LANCHOR0 + add x1, x6, :lo12:.LANCHOR0 + adrp x3, .LANCHOR3 + add x29, sp, 0 + stp x19, x20, [sp, 16] + add x3, x3, :lo12:.LANCHOR3 + str x21, [sp, 32] + mov w7, 24 + mov w4, 1 + mov x19, x6 + ldrb w1, [x1, 1205] + ldrb w5, [x3, 1306] + ldrh w3, [x3, 1304] + sub w7, w7, w1 + lsl w1, w4, w1 + sub w1, w1, #1 + lsr w2, w0, w7 + and w1, w1, w2 + lsr w0, w0, w3 + sub w3, w7, w3 + and w1, w1, 255 + cmp w5, 1 + lsl w3, w4, w3 + sub w3, w3, #1 + and w3, w3, w0 + and w4, w3, 65535 + mul w2, w1, w5 + udiv w3, w3, w5 + and w20, w2, 255 + and w21, w3, 65535 + bls .L1155 + sub w2, w5, #1 + and w2, w2, w4 + add w2, w20, w2 + and w20, w2, 255 +.L1155: + adrp x0, .LANCHOR2 + ldr w0, [x0, #:lo12:.LANCHOR2] + tbz x0, 14, .L1156 + adrp x0, .LC107 + and w3, w3, 65535 + mov w2, w20 + add x0, x0, :lo12:.LC107 + bl printk +.L1156: + add x0, x19, :lo12:.LANCHOR0 + ldrh w1, [x0, 1096] + cmp w1, w21 + bls .L1154 + ldr x0, [x0, 1104] + mov w2, 1 + lsl w2, w2, w20 + add x21, x0, w21, uxth 2 + ldrb w20, [x21, 3] + orr w2, w2, w20 + strb w2, [x21, 3] +.L1154: + ldp x19, x20, [sp, 16] + ldr x21, [sp, 32] + ldp x29, x30, [sp], 48 + ret + .size ftl_mask_bad_block, .-ftl_mask_bad_block + .align 2 + .global gc_free_bad_sblk + .type gc_free_bad_sblk, %function +gc_free_bad_sblk: + stp x29, x30, [sp, -96]! + add x29, sp, 0 + stp x23, x24, [sp, 48] + adrp x24, .LANCHOR0 + add x24, x24, :lo12:.LANCHOR0 + stp x21, x22, [sp, 32] + and w22, w0, 65535 + stp x19, x20, [sp, 16] + stp x25, x26, [sp, 64] + ldr w0, [x24, 5616] + str x27, [sp, 80] + cbz w0, .L1177 + mov w23, 20041 + add x27, x24, 3416 + mov w26, 0 + movk w23, 0x444b, lsl 16 +.L1164: + adrp x21, .LANCHOR3 + add x2, x21, :lo12:.LANCHOR3 + ldrb w0, [x2, 1321] + cmp w0, w26 + bhi .L1174 +.L1177: + mov w0, 0 + ldr x27, [sp, 80] + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x29, x30, [sp], 96 + ret +.L1174: + ldrb w3, [x2, 1306] + mov w1, 24 + ldrb w4, [x24, 1205] + ldrh w2, [x2, 1304] + and w0, w3, 65535 + sub w1, w1, w4 + cmp w3, 1 + sdiv w19, w26, w3 + sub w1, w1, w2 + lsl w19, w19, w1 + madd w19, w22, w0, w19 + and w19, w19, 65535 + bls .L1165 + sub w0, w0, #1 + and w0, w0, w26 + add w19, w19, w0 + and w19, w19, 65535 +.L1165: + adrp x25, .LC108 + add x25, x25, :lo12:.LC108 + mov w20, 0 +.L1166: + ldr w0, [x27, 2200] + cmp w20, w0 + bcc .L1173 + add w26, w26, 1 + and w26, w26, 65535 + b .L1164 +.L1173: + add x0, x27, w20, sxtw 1 + ldrh w0, [x0, 2204] + cmp w0, w19 + bne .L1167 + mov w1, w19 + mov x0, x25 + bl printk + add x0, x21, :lo12:.LANCHOR3 + ldrb w1, [x0, 1950] + cbnz w1, .L1168 + ldrb w0, [x0, 1322] + cbz w0, .L1169 +.L1168: + ldr x0, [x24, 3384] + ldr w0, [x0, 156] + cmp w0, w23 + beq .L1170 +.L1169: + add x0, x21, :lo12:.LANCHOR3 + ldrh w0, [x0, 1304] + lsl w0, w19, w0 + bl ftl_mask_bad_block +.L1170: + ldr w1, [x27, 2200] + mov w0, w20 +.L1171: + cmp w0, w1 + bcc .L1172 + sub w1, w1, #1 + str w1, [x27, 2200] +.L1167: + add w20, w20, 1 + and w20, w20, 65535 + b .L1166 +.L1172: + add w2, w0, 1 + add x0, x27, w0, sxtw 1 + add x3, x27, w2, sxtw 1 + ldrh w3, [x3, 2204] + strh w3, [x0, 2204] + and w0, w2, 65535 + b .L1171 + .size gc_free_bad_sblk, .-gc_free_bad_sblk + .align 2 + .global ftl_free_sblk + .type ftl_free_sblk, %function +ftl_free_sblk: + stp x29, x30, [sp, -64]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x20, .LANCHOR0 + add x3, x20, :lo12:.LANCHOR0 + stp x21, x22, [sp, 32] + stp x23, x24, [sp, 48] + and x24, x0, 65535 + lsl x19, x24, 2 + mov x22, x24 + ldr x4, [x3, 1104] + add x21, x4, x19 + ldrb w0, [x21, 2] + ubfx x23, x0, 5, 3 + tbz x0, 3, .L1184 + ldr x5, [x3, 3384] + ldr w2, [x4, x19] + ldrh w1, [x4, x19] + ldrh w6, [x5, 74] + and w1, w1, 2047 + ubfx x7, x2, 11, 8 + ldrh w2, [x3, 1112] + add w6, w1, w6 + and w8, w6, 65535 + ldrh w6, [x5, 72] + adrp x5, .LANCHOR3 + add x5, x5, :lo12:.LANCHOR3 + add w6, w7, w6 + udiv w9, w8, w2 + and w6, w6, 65535 + ldrh w10, [x5, 1952] + add w9, w9, w6 + cmp w9, w10 + ble .L1185 + ldrh w6, [x3, 3370] + ldrh w8, [x3, 3378] + add w8, w8, w6 + ldrh w6, [x5, 1382] + add w6, w6, 8 + cmp w8, w6 + bge .L1186 +.L1191: + mov w3, 2 + bfi w0, w3, 3, 2 + b .L1203 +.L1186: + ldrh w6, [x3, 3374] + ldrh w8, [x3, 3368] + ldrh w5, [x5, 1380] + ldrh w3, [x3, 3376] + add w6, w6, w8 + add w5, w5, 8 + add w3, w6, w3 + cmp w3, w5 +.L1207: + bge .L1191 + b .L1205 +.L1185: + madd w6, w2, w6, w8 + ldrh w8, [x5, 1954] + cmp w6, w8 + ble .L1187 + ldrh w8, [x3, 3368] + ldrh w6, [x3, 3374] + add w6, w6, w8 + ldrh w8, [x3, 3376] + add w6, w6, w8 + ldrh w8, [x5, 1380] + add w9, w8, 8 + cmp w6, w9 + bge .L1189 +.L1205: + and w0, w0, -25 +.L1203: + strb w0, [x21, 2] +.L1187: + ldrb w0, [x21, 2] + ands w0, w0, 24 + bne .L1192 + mul w2, w7, w2 + ldrh w0, [x4, x19] + add w2, w2, w2, lsl 1 + add w1, w1, w2, lsr 2 + lsr w2, w7, 3 + bfi w0, w1, 0, 11 + strh w0, [x4, x19] + ldr w0, [x4, x19] + bfi w0, w2, 11, 8 + str w0, [x4, x19] +.L1193: + mov w0, w22 + bl zftl_remove_data_node + add x1, x20, :lo12:.LANCHOR0 + add w23, w23, 6 + and w23, w23, 7 + cmp w23, 4 + ldr x0, [x1, 1104] + add x19, x0, x19 + ldrb w0, [x19, 2] + and w0, w0, 31 + strb w0, [x19, 2] + ldr x0, [x1, 1120] + strh wzr, [x0, x24, lsl 1] + bhi .L1196 + mov w0, w22 + bl gc_free_bad_sblk +.L1196: + ldrb w0, [x21, 2] + tbz x0, 3, .L1197 + add x20, x20, :lo12:.LANCHOR0 + ldr x0, [x20, 1128] + ldrh w1, [x0, 586] + cmp w1, w22 + bne .L1197 + mov w1, -1 + ldrh w2, [x0, 590] + strh w1, [x0, 586] + mov w1, 65535 + cmp w2, w1 + bne .L1197 + strh w22, [x0, 590] + mov w1, w22 + adrp x0, .LC109 + add x0, x0, :lo12:.LC109 + bl printk +.L1183: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x29, x30, [sp], 64 + ret +.L1189: + ldrh w9, [x3, 3378] + ldrh w3, [x3, 3370] + add w9, w9, w3 + ldrh w3, [x5, 1382] + add w3, w3, 8 + cmp w9, w3 + blt .L1191 + add w8, w8, 24 + cmp w6, w8 + b .L1207 +.L1192: + cmp w0, 16 + bne .L1193 + sdiv w2, w1, w2 + ldr w0, [x4, x19] + add w2, w2, w2, lsl 1 + add w2, w7, w2, lsr 2 +.L1204: + bfi w0, w2, 11, 8 + asr w1, w1, 5 + str w0, [x4, x19] + bfi w0, w1, 0, 11 + strh w0, [x4, x19] + b .L1193 +.L1184: + tst w0, 24 + bne .L1193 + ldrh w1, [x3, 3372] + cbnz w1, .L1193 + ldrh w7, [x3, 3370] + cmp w7, 15 + bhi .L1193 + ldrh w2, [x3, 3368] + ldrh w1, [x3, 3374] + add w1, w1, w2 + ldrh w2, [x3, 3376] + add w1, w1, w2 + adrp x2, .LANCHOR3 + add x2, x2, :lo12:.LANCHOR3 + ldrh w6, [x2, 1380] + add w6, w6, 16 + cmp w1, w6 + ble .L1193 + ldrh w5, [x3, 3378] + ldrh w1, [x2, 1382] + add w5, w5, w7 + add w1, w1, 8 + cmp w5, w1 + bge .L1193 + mov w1, 2 + bfi w0, w1, 3, 2 + strb w0, [x21, 2] + ldrh w0, [x3, 1112] + ldrh w1, [x4, x19] + and w1, w1, 2047 + sdiv w0, w1, w0 + add w2, w0, w0, lsl 1 + ldr w0, [x4, x19] + ubfx x3, x0, 11, 8 + add w2, w3, w2, lsr 2 + b .L1204 +.L1197: + mov w0, w22 + bl zftl_insert_free_list + b .L1183 + .size ftl_free_sblk, .-ftl_free_sblk + .align 2 + .global gc_free_src_blk + .type gc_free_src_blk, %function +gc_free_src_blk: + stp x29, x30, [sp, -80]! + add x29, sp, 0 + stp x21, x22, [sp, 32] + adrp x22, .LANCHOR0 + stp x23, x24, [sp, 48] + add x24, x22, :lo12:.LANCHOR0 + adrp x23, .LC110 + add x21, x24, 3416 + add x23, x23, :lo12:.LC110 + stp x19, x20, [sp, 16] + stp x25, x26, [sp, 64] + mov w20, 0 +.L1209: + ldrh w0, [x21, 56] + cmp w0, w20 + bhi .L1224 + strh wzr, [x21, 56] + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x29, x30, [sp], 80 + ret +.L1224: + add x0, x21, w20, sxtw 1 + ldrh w25, [x0, 58] + ldr x0, [x24, 1120] + mov x19, x25 + lsl x26, x25, 1 + ldrh w2, [x0, x26] + cbz w2, .L1210 + mov w1, w25 + mov x0, x23 + bl printk +.L1210: + add x0, x22, :lo12:.LANCHOR0 + ldr x1, [x0, 1120] + strh wzr, [x1, x26] + ldr x1, [x0, 1120] + ldrh w1, [x1, x26] + cbnz w1, .L1211 + ldr x0, [x0, 1104] + add x25, x0, x25, lsl 2 + adrp x0, .LANCHOR2 + ldr w0, [x0, #:lo12:.LANCHOR2] + tbz x0, 8, .L1212 + ldrb w2, [x25, 2] + adrp x0, .LC111 + mov w1, w19 + add x0, x0, :lo12:.LC111 + ubfx x2, x2, 5, 3 + bl printk +.L1212: + ldrb w0, [x25, 2] + and w1, w0, 224 + cmp w1, 224 + beq .L1213 + tst w0, 192 + bne .L1214 +.L1213: + adrp x1, .LANCHOR1 + add x1, x1, :lo12:.LANCHOR1 + add x1, x1, 1712 + mov w2, 1363 + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack +.L1214: + mov w0, w19 + bl ftl_free_sblk + add x0, x22, :lo12:.LANCHOR0 + ldr x0, [x0, 1128] + ldrh w2, [x0, 124] + cbz w2, .L1215 + add x3, x0, 392 + mov w1, 0 +.L1217: + ldrh w4, [x3] + cmp w4, w19 + bne .L1216 + add x1, x0, w1, sxtw 1 + mov w3, -1 + sub w2, w2, #1 + strh w3, [x1, 392] + strh w2, [x0, 124] +.L1215: + ldrh w2, [x0, 120] + cbz w2, .L1218 + add x3, x0, 136 + mov w1, 0 +.L1220: + ldrh w4, [x3] + cmp w4, w19 + bne .L1219 + add x1, x0, w1, sxtw 1 + mov w3, -1 + sub w2, w2, #1 + strh w3, [x1, 136] + strh w2, [x0, 120] +.L1218: + ldrh w2, [x0, 122] + cbz w2, .L1221 + add x3, x0, 264 + mov w1, 0 +.L1223: + ldrh w4, [x3] + cmp w4, w19 + bne .L1222 + add x1, x0, w1, sxtw 1 + mov w3, -1 + sub w2, w2, #1 + strh w3, [x1, 264] + strh w2, [x0, 122] +.L1221: + add w20, w20, 1 + and w20, w20, 65535 + b .L1209 +.L1216: + add w1, w1, 1 + add x3, x3, 2 + cmp w1, 64 + bne .L1217 + b .L1215 +.L1219: + add w1, w1, 1 + add x3, x3, 2 + cmp w1, 64 + bne .L1220 + b .L1218 +.L1222: + add w1, w1, 1 + add x3, x3, 2 + cmp w1, 64 + bne .L1223 + b .L1221 +.L1211: + mov w2, 0 + mov w1, 1 + mov w0, w19 + bl gc_add_sblk + b .L1221 + .size gc_free_src_blk, .-gc_free_src_blk + .align 2 + .global print_ftl_debug_info + .type print_ftl_debug_info, %function +print_ftl_debug_info: + sub sp, sp, #64 + stp x29, x30, [sp, 32] + add x29, sp, 32 + str x19, [sp, 48] + adrp x19, .LANCHOR0 + add x19, x19, :lo12:.LANCHOR0 + ldr x1, [x19, 3384] + ldr x0, [x19, 1128] + ldr w8, [x19, 3364] + ldrh w7, [x19, 3376] + ldrh w2, [x1, 146] + ldrh w1, [x1, 148] + str w8, [sp, 24] + ldrh w6, [x19, 3374] + ldr w8, [x0, 528] + str w8, [sp, 16] + ldrh w5, [x19, 3372] + ldr w0, [x0, 524] + ldrh w4, [x19, 3370] + ldrh w3, [x19, 3368] + str w0, [sp, 8] + ldrh w0, [x19, 3378] + str w0, [sp] + adrp x0, .LC112 + add x0, x0, :lo12:.LC112 + bl printk + ldr x0, [x19, 3384] + ldrb w3, [x19, 3380] + ldr w4, [x0, 8] + ldr w5, [x0, 64] + ldr w1, [x0, 20] + ldr w2, [x0, 28] + adrp x0, .LC113 + add x0, x0, :lo12:.LC113 + bl printk + ldr x0, [x19, 3384] + ldr w1, [x0, 52] + ldr w2, [x0, 60] + ldr w3, [x0, 16] + adrp x0, .LC114 + add x0, x0, :lo12:.LC114 + lsr w3, w3, 11 + bl printk + ldr x0, [x19, 3384] + ldrh w2, [x0, 98] + ldrh w6, [x0, 72] + ldrh w5, [x0, 96] + ldrh w4, [x0, 92] + ldrh w3, [x0, 88] + ldrh w1, [x0, 74] + str w2, [sp, 16] + ldrh w2, [x0, 94] + str w2, [sp, 8] + ldrh w2, [x0, 90] + str w2, [sp] + ldp w7, w2, [x0, 80] + adrp x0, .LC115 + add x0, x0, :lo12:.LC115 + bl printk + ldrh w5, [x19, 3392] + adrp x0, .LC116 + ldrh w4, [x19, 3400] + add x0, x0, :lo12:.LC116 + ldrh w3, [x19, 3402] + ldrh w2, [x19, 3404] + ldrh w1, [x19, 3406] + bl printk + ldr x0, [x19, 1128] + ldr x1, [x19, 3384] + ldrh w4, [x0, 590] + ldrh w6, [x1, 150] + ldrh w3, [x0, 588] + ldrh w2, [x0, 586] + ldr w5, [x1, 156] + ldrh w1, [x0, 584] + adrp x0, .LC117 + add x0, x0, :lo12:.LC117 + bl printk + ldr x19, [sp, 48] + ldp x29, x30, [sp, 32] + add sp, sp, 64 + ret + .size print_ftl_debug_info, .-print_ftl_debug_info + .align 2 + .global ftl_write_buf + .type ftl_write_buf, %function +ftl_write_buf: + stp x29, x30, [sp, -48]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + str x21, [sp, 32] + cbnz x0, .L1250 + adrp x1, .LANCHOR1 + add x1, x1, :lo12:.LANCHOR1 + add x1, x1, 1728 + mov w2, 811 + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack + bl print_ftl_debug_info + mov w0, -1 +.L1249: + ldp x19, x20, [sp, 16] + ldr x21, [sp, 32] + ldp x29, x30, [sp], 48 + ret +.L1253: + add x19, x19, :lo12:.LANCHOR0 + mov x1, x20 + add x0, x19, 3408 + bl buf_add_tail + ldrb w3, [x20, 56] + ldr x1, [x19, 3384] + ldrb w0, [x19, 3381] + add w0, w0, 1 + ldr w2, [x1, 16] + and w0, w0, 255 + strb w0, [x19, 3381] + add w2, w2, w3 + str w2, [x1, 16] + ldr w2, [x1, 32] + add w2, w2, 1 + str w2, [x1, 32] + b .L1249 +.L1250: + mov x20, x0 + adrp x0, .LANCHOR3 + add x1, x0, :lo12:.LANCHOR3 + mov x21, x0 + ldrb w2, [x20, 56] + ldrb w1, [x1, 1946] + cmp w2, w1 + bls .L1255 + adrp x1, .LANCHOR1 + add x1, x1, :lo12:.LANCHOR1 + add x1, x1, 1728 + mov w2, 818 + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack +.L1255: + ldrb w1, [x20, 56] + adrp x19, .LANCHOR0 + cbz w1, .L1252 + add x0, x21, :lo12:.LANCHOR3 + ldrb w0, [x0, 1946] + cmp w0, w1 + bcs .L1253 +.L1252: + add x19, x19, :lo12:.LANCHOR0 + mov x0, x20 + bl zbuf_free + ldrb w0, [x19, 3381] + b .L1249 + .size ftl_write_buf, .-ftl_write_buf + .align 2 + .global ftl_write_completed + .type ftl_write_completed, %function +ftl_write_completed: + stp x29, x30, [sp, -80]! + add x29, sp, 0 + stp x21, x22, [sp, 32] + adrp x21, .LANCHOR0 + stp x19, x20, [sp, 16] + add x19, x21, :lo12:.LANCHOR0 + stp x23, x24, [sp, 48] + add x22, x19, 1304 + mov w23, 20041 + str x25, [sp, 64] + movk w23, 0x444b, lsl 16 + mov w25, 0 +.L1261: + add x1, x21, :lo12:.LANCHOR0 + ldrb w0, [x1, 3357] + cmp w0, 255 + bne .L1272 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldr x25, [sp, 64] + ldp x29, x30, [sp], 80 + ret +.L1272: + add x2, x1, 1304 + lsl x3, x0, 6 + add x24, x2, x3 + ubfiz x20, x0, 6, 8 + add x20, x2, x20 + ldrb w2, [x2, x3] + strb w2, [x1, 3357] + ldr w1, [x24, 52] + cmn w1, #1 + bne .L1262 + adrp x2, .LANCHOR3 + add x1, x2, :lo12:.LANCHOR3 + ldrb w3, [x1, 1950] + cbnz w3, .L1263 + ldrb w1, [x1, 1322] + cbz w1, .L1264 +.L1263: + ldr x1, [x19, 3384] + ldr w1, [x1, 156] + cmp w1, w23 + beq .L1265 +.L1264: + add x2, x2, :lo12:.LANCHOR3 + ldrb w3, [x19, 1205] + mov w1, 24 + add x4, x22, x0, lsl 6 + sub w1, w1, w3 + ldrh w5, [x2, 1304] + ldrb w2, [x2, 1306] + sub w3, w1, w5 + mov w1, 1 + lsl w1, w1, w3 + ldr w3, [x4, 40] + sub w1, w1, #1 + lsr w3, w3, w5 + and w1, w1, w3 + mov w3, 65535 + udiv w1, w1, w2 + ldr x2, [x19, 1128] + ldr w5, [x2, 560] + and w24, w1, 65535 + and w1, w1, w3 + cmp w5, w3 + bne .L1266 + str w1, [x2, 560] + ldr w3, [x4, 40] + str w3, [x2, 564] +.L1266: + add x0, x22, x0, lsl 6 + ldp w2, w3, [x0, 36] + adrp x0, .LC118 + add x0, x0, :lo12:.LC118 + bl printk + ldr x0, [x19, 1128] + ldr w1, [x0, 556] + add w1, w1, 1 + str w1, [x0, 556] + ldrh w1, [x0, 16] + cmp w1, w24 + bne .L1267 + strh wzr, [x0, 22] +.L1265: + mov x0, x20 + mov w25, 1 + bl ftl_write_buf + b .L1261 +.L1267: + ldrh w1, [x0, 48] + cmp w1, w24 + bne .L1265 + strh wzr, [x0, 54] + b .L1265 +.L1262: + cbz w25, .L1270 + ldp w1, w2, [x24, 36] + adrp x0, .LC119 + add x0, x0, :lo12:.LC119 + bl printk + mov x0, x20 + bl ftl_write_buf + b .L1261 +.L1270: + ldrh w2, [x24, 48] + ldr w0, [x24, 36] + ldr w1, [x24, 44] + bl lpa_hash_update_ppa + ldrb w0, [x24, 2] + tbz x0, 2, .L1271 + and w0, w0, -3 + strb w0, [x24, 2] + b .L1261 +.L1271: + mov x0, x20 + bl zbuf_free + b .L1261 + .size ftl_write_completed, .-ftl_write_completed + .align 2 + .global zftl_add_read_buf + .type zftl_add_read_buf, %function +zftl_add_read_buf: + stp x29, x30, [sp, -32]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + cbnz x0, .L1278 + adrp x1, .LANCHOR1 + add x1, x1, :lo12:.LANCHOR1 + add x1, x1, 1744 + mov w2, 1151 + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack + bl print_ftl_debug_info +.L1277: + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 32 + ret +.L1278: + mov x20, x0 + adrp x19, .LANCHOR3 + add x0, x19, :lo12:.LANCHOR3 + ldrb w1, [x20, 56] + ldrb w0, [x0, 1946] + cmp w1, w0 + bls .L1281 + adrp x1, .LANCHOR1 + add x1, x1, :lo12:.LANCHOR1 + add x1, x1, 1744 + mov w2, 1158 + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack +.L1281: + add x19, x19, :lo12:.LANCHOR3 + mov x1, x20 + add x0, x19, 1956 + bl buf_add_tail + ldrb w0, [x19, 1957] + add w0, w0, 1 + strb w0, [x19, 1957] + b .L1277 + .size zftl_add_read_buf, .-zftl_add_read_buf + .align 2 + .global sblk_init + .type sblk_init, %function +sblk_init: + adrp x0, .LANCHOR0 + add x0, x0, :lo12:.LANCHOR0 + mov w1, -1 + strb w1, [x0, 3354] + strb w1, [x0, 3357] + strb w1, [x0, 3355] + strb w1, [x0, 3356] + mov w0, 0 + ret + .size sblk_init, .-sblk_init + .align 2 + .global dump_sblk_queue + .type dump_sblk_queue, %function +dump_sblk_queue: + stp x29, x30, [sp, -48]! + adrp x0, .LC120 + add x0, x0, :lo12:.LC120 + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x20, .LANCHOR0 + add x20, x20, :lo12:.LANCHOR0 + str x21, [sp, 32] + ldrb w1, [x20, 3354] + bl printk + ldrb w19, [x20, 3354] + cmp w19, 255 + beq .L1284 + add x20, x20, 1304 + ubfiz x19, x19, 6, 8 + adrp x21, .LC121 + add x19, x20, x19 + add x21, x21, :lo12:.LC121 +.L1286: + ldrb w2, [x19, 58] + mov x0, x21 + ldrb w1, [x19, 1] + ldr w3, [x19, 40] + bl printk + ldrb w19, [x19] + cmp w19, 255 + beq .L1284 + ubfiz x19, x19, 6, 8 + add x19, x20, x19 + b .L1286 +.L1284: + ldp x19, x20, [sp, 16] + ldr x21, [sp, 32] + ldp x29, x30, [sp], 48 + ret + .size dump_sblk_queue, .-dump_sblk_queue + .align 2 + .global queue_lun_state + .type queue_lun_state, %function +queue_lun_state: + adrp x5, .LANCHOR0 + add x5, x5, :lo12:.LANCHOR0 + ldrb w2, [x5, 3354] + cmp w2, 255 + beq .L1302 + adrp x6, .LANCHOR3 + add x6, x6, :lo12:.LANCHOR3 + ldrb w3, [x5, 1205] + mov w9, 24 + mov w4, 1 + adrp x12, .L1298 + ldrh w11, [x6, 1304] + sub w9, w9, w3 + ldrb w8, [x6, 1306] + lsl w3, w4, w3 + sub w7, w9, w11 + sub w3, w3, #1 + sub w8, w8, #1 + and w3, w3, 65535 + lsl w4, w4, w7 + and w8, w8, 65535 + sub w4, w4, #1 + asr w6, w0, w11 + and w4, w4, 65535 + and w6, w6, w8 + asr w10, w0, w9 + and w6, w6, w4 + and w10, w10, w3 + add x5, x5, 1304 + add x12, x12, :lo12:.L1298 +.L1301: + add x13, x5, x2, lsl 6 + ldr w7, [x13, 40] + lsr w0, w7, w9 + and w0, w3, w0 + cmp w10, w0 + bne .L1296 + lsr w7, w7, w11 + and w7, w8, w7 + and w7, w4, w7 + ldrb w0, [x13, 58] + cmp w6, w7 + bne .L1297 + cmp w1, 1 + bne .L1294 + cmp w0, 7 + ccmp w0, 9, 4, ne + beq .L1296 + ret +.L1297: + cmp w1, 3 + bhi .L1296 + ldrb w7, [x12,w1,uxtw] + adr x13, .Lrtx1298 + add x7, x13, w7, sxtb #2 + br x7 +.Lrtx1298: + .section .rodata + .align 0 + .align 2 +.L1298: + .byte (.L1294 - .Lrtx1298) / 4 + .byte (.L1299 - .Lrtx1298) / 4 + .byte (.L1300 - .Lrtx1298) / 4 + .byte (.L1294 - .Lrtx1298) / 4 + .text +.L1299: + cmp w0, 7 + ccmp w0, 9, 4, ne + beq .L1296 + ret +.L1300: + cmp w0, 11 + bne .L1294 +.L1296: + lsl x2, x2, 6 + ldrb w2, [x5, x2] + cmp w2, 255 + bne .L1301 +.L1302: + mov w0, 0 +.L1294: + ret + .size queue_lun_state, .-queue_lun_state + .align 2 + .global queue_remove_completed_req + .type queue_remove_completed_req, %function +queue_remove_completed_req: + adrp x3, .LANCHOR0 + add x0, x3, :lo12:.LANCHOR0 + add x4, x0, 1304 + add x12, x0, 3355 + add x13, x0, 3356 + add x14, x0, 3357 + ldrb w7, [x0, 3354] + mov w5, 0 + ldrb w9, [x0, 3355] + mov w11, -1 + ldrb w10, [x0, 3357] + ldrb w8, [x0, 3356] +.L1305: + cmp w7, 255 + beq .L1306 + sbfiz x6, x7, 6, 32 + sxtw x1, w7 + add x2, x4, x6 + ldrb w2, [x2, 58] + sub w2, w2, #12 + and w2, w2, 255 + cmp w2, 1 + bls .L1307 + cbz w5, .L1304 + strb w7, [x0, 3354] + ret +.L1307: + lsl x5, x1, 6 + ldrb w7, [x4, x6] + add x2, x4, x5 + strb w11, [x4, x5] + ldrb w5, [x2, 59] + cmp w5, 1 + bne .L1310 + ldrh w2, [x2, 50] + cbnz w2, .L1318 + mov w2, w10 + mov x5, x14 +.L1311: + cmp w2, 255 + bne .L1316 + add x3, x3, :lo12:.LANCHOR0 + add x1, x3, x1, lsl 6 + strb w7, [x3, 3354] + ldrb w0, [x1, 1305] + strb w0, [x5] + ret +.L1310: + cbnz w5, .L1312 + ldr w2, [x2, 36] + cmn w2, #1 + beq .L1312 + mov w2, w9 + mov x5, x12 + b .L1311 +.L1318: + mov w2, w8 + mov x5, x13 + b .L1311 +.L1316: + mov w5, w2 + sbfiz x2, x2, 6, 32 + ldrb w2, [x4, x2] + cmp w2, 255 + bne .L1316 + add x1, x4, x1, lsl 6 + sbfiz x5, x5, 6, 32 + ldrb w1, [x1, 1] + strb w1, [x4, x5] +.L1312: + mov w5, 1 + b .L1305 +.L1306: + cbz w5, .L1304 + add x3, x3, :lo12:.LANCHOR0 + mov w0, -1 + strb w0, [x3, 3354] +.L1304: + ret + .size queue_remove_completed_req, .-queue_remove_completed_req + .align 2 + .global pm_select_ram_region + .type pm_select_ram_region, %function +pm_select_ram_region: + stp x29, x30, [sp, -32]! + adrp x1, .LANCHOR3 + add x0, x1, :lo12:.LANCHOR3 + mov x2, 0 + add x29, sp, 0 + add x3, x0, 1960 + mov w4, 65535 + str x19, [sp, 16] +.L1330: + lsl x5, x2, 4 + and w19, w2, 65535 + ldrh w5, [x5, x3] + cmp w5, w4 + beq .L1329 + add x2, x2, 1 + cmp x2, 32 + bne .L1330 + add x0, x0, 1962 + mov w19, w2 + mov x3, x0 + mov w5, 32768 + mov w2, 0 +.L1332: + ldrh w4, [x3] + tbnz x4, 15, .L1331 + cmp w4, w5 + bcs .L1331 + mov w5, w4 + mov w19, w2 +.L1331: + add w2, w2, 1 + add x3, x3, 16 + and w2, w2, 65535 + cmp w2, 32 + bne .L1332 + cmp w19, 32 + bne .L1329 + add x1, x1, :lo12:.LANCHOR3 + mov w2, -1 + ldrb w3, [x1, 2472] + mov w1, 0 +.L1334: + ldrh w5, [x0] + cmp w5, w2 + bcs .L1333 + ldrh w4, [x0, -2] + cmp w4, w3 + csel w2, w2, w5, eq + csel w19, w19, w1, eq +.L1333: + add w1, w1, 1 + add x0, x0, 16 + and w1, w1, 65535 + cmp w1, 32 + bne .L1334 + cmp w19, 32 + bne .L1329 + adrp x1, .LANCHOR4 + add x1, x1, :lo12:.LANCHOR4 + mov w2, 377 + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack +.L1329: + mov w0, w19 + ldr x19, [sp, 16] + ldp x29, x30, [sp], 32 + ret + .size pm_select_ram_region, .-pm_select_ram_region + .align 2 + .global ftl_memset + .type ftl_memset, %function +ftl_memset: + stp x29, x30, [sp, -16]! + uxtw x2, w2 + add x29, sp, 0 + bl memset + ldp x29, x30, [sp], 16 + ret + .size ftl_memset, .-ftl_memset + .align 2 + .global flash_lsb_page_tbl_build + .type flash_lsb_page_tbl_build, %function +flash_lsb_page_tbl_build: + stp x29, x30, [sp, -48]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x19, .LANCHOR0 + add x1, x19, :lo12:.LANCHOR0 + str x21, [sp, 32] + mov w20, 1024 + ldr x2, [x1, 1144] + ldrb w2, [x2, 12] + sdiv w20, w20, w2 + cbnz w0, .L1342 + add x1, x1, 4 + mov x0, 0 +.L1343: + strh w0, [x1, x0, lsl 1] + add x0, x0, 1 + cmp x0, 512 + bne .L1343 +.L1349: + adrp x21, .LANCHOR3 + add x21, x21, :lo12:.LANCHOR3 + add x21, x21, 2476 + add x19, x19, :lo12:.LANCHOR0 + mov w2, 2048 + mov w1, 255 + mov x0, x21 + add x19, x19, 4 + bl ftl_memset + mov x0, 0 +.L1344: + ldrh w1, [x19, x0, lsl 1] + add x0, x0, 1 + cmp w20, w0, uxth + strh w1, [x21, w1, sxtw 1] + bhi .L1344 + ldp x19, x20, [sp, 16] + ldr x21, [sp, 32] + ldp x29, x30, [sp], 48 + ret +.L1342: + cmp w0, 1 + bne .L1345 + add x1, x1, 4 + mov x2, 0 +.L1348: + and w0, w2, 65535 + cmp x2, 3 + bls .L1346 + ubfiz w3, w0, 1, 15 + and w0, w0, 1 + add w0, w0, 2 + sub w0, w3, w0 + and w0, w0, 65535 +.L1346: + strh w0, [x1, x2, lsl 1] + add x2, x2, 1 + cmp x2, 512 + bne .L1348 + b .L1349 +.L1345: + cmp w0, 2 + bne .L1350 + add x1, x1, 4 + mov w2, 65535 + mov x0, 0 +.L1352: + cmp x0, 2 + and w3, w0, 65535 + csel w3, w3, w2, cc + strh w3, [x1, x0, lsl 1] + add w2, w2, 2 + add x0, x0, 1 + and w2, w2, 65535 + cmp x0, 512 + bne .L1352 + b .L1349 +.L1350: + cmp w0, 3 + bne .L1353 + add x1, x1, 4 + mov x2, 0 +.L1356: + and w0, w2, 65535 + cmp x2, 5 + bls .L1354 + ubfiz w3, w0, 1, 15 + and w0, w0, 1 + add w0, w0, 4 + sub w0, w3, w0 + and w0, w0, 65535 +.L1354: + strh w0, [x1, x2, lsl 1] + add x2, x2, 1 + cmp x2, 512 + bne .L1356 + b .L1349 +.L1353: + cmp w0, 4 + bne .L1357 + mov w3, 1 + strh w0, [x1, 12] + mov w0, 5 + strh w3, [x1, 6] + strh w0, [x1, 14] + mov w3, 2 + mov w0, 7 + strh w3, [x1, 8] + strh w0, [x1, 16] + mov w3, 3 + mov w0, 8 + strh wzr, [x1, 4] + strh w0, [x1, 18] + add x1, x1, 20 + strh w3, [x1, -10] + mov w0, 8 +.L1359: + and w3, w0, 1 + ubfiz w2, w0, 1, 15 + add w3, w3, 6 + add w0, w0, 1 + sub w2, w2, w3 + strh w2, [x1], 2 + and w0, w0, 65535 + cmp w0, 512 + bne .L1359 + b .L1349 +.L1357: + cmp w0, 5 + bne .L1360 + add x2, x1, 4 + mov x0, 0 +.L1361: + strh w0, [x2, x0, lsl 1] + add x0, x0, 1 + cmp x0, 16 + bne .L1361 + add x1, x1, 36 +.L1362: + strh w0, [x1], 2 + add w0, w0, 2 + and w0, w0, 65535 + cmp w0, 1008 + bne .L1362 + b .L1349 +.L1360: + cmp w0, 8 + bne .L1363 + add x1, x1, 4 + mov x0, 0 +.L1364: + strh w0, [x0, x1] + add x0, x0, 2 + cmp x0, 1024 + bne .L1364 + b .L1349 +.L1363: + cmp w0, 9 + bne .L1365 + mov w2, 1 + strh wzr, [x1, 4] + strh w2, [x1, 6] + mov w2, 2 + add x1, x1, 10 + strh w2, [x1, -2] + mov w0, 3 +.L1366: + strh w0, [x1], 2 + add w0, w0, 2 + and w0, w0, 65535 + cmp w0, 1021 + bne .L1366 + b .L1349 +.L1365: + cmp w0, 10 + bne .L1367 + add x2, x1, 4 + mov x0, 0 +.L1368: + strh w0, [x2, x0, lsl 1] + add x0, x0, 1 + cmp x0, 63 + bne .L1368 + add x1, x1, 130 +.L1369: + strh w0, [x1], 2 + add w0, w0, 2 + and w0, w0, 65535 + cmp w0, 961 + bne .L1369 + b .L1349 +.L1367: + cmp w0, 11 + bne .L1370 + add x1, x19, :lo12:.LANCHOR0 + mov x0, 0 + add x2, x1, 4 +.L1371: + strh w0, [x2, x0, lsl 1] + add x0, x0, 1 + cmp x0, 8 + bne .L1371 + add x1, x1, 20 +.L1373: + and w3, w0, 1 + ubfiz w2, w0, 1, 15 + add w3, w3, 6 + add w0, w0, 1 + sub w2, w2, w3 + strh w2, [x1], 2 + and w0, w0, 65535 + cmp w0, 512 + bne .L1373 + b .L1349 +.L1370: + cmp w0, 13 + bne .L1349 + add x2, x19, :lo12:.LANCHOR0 + mov x1, 0 + add x2, x2, 4 + mov w0, 0 +.L1374: + strh w0, [x1, x2] + add w0, w0, 3 + and w0, w0, 65535 + add x1, x1, 2 + cmp w0, 1536 + bne .L1374 + b .L1349 + .size flash_lsb_page_tbl_build, .-flash_lsb_page_tbl_build + .align 2 + .global flash_die_info_init + .type flash_die_info_init, %function +flash_die_info_init: + stp x29, x30, [sp, -96]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x19, .LANCHOR2 + stp x21, x22, [sp, 32] + ldr w0, [x19, #:lo12:.LANCHOR2] + stp x23, x24, [sp, 48] + stp x25, x26, [sp, 64] + str x27, [sp, 80] + tbz x0, 12, .L1397 + adrp x1, .LANCHOR4 + add x1, x1, :lo12:.LANCHOR4 + adrp x0, .LC4 + add x1, x1, 24 + add x0, x0, :lo12:.LC4 + bl printk +.L1397: + add x24, x19, :lo12:.LANCHOR2 + adrp x22, .LANCHOR0 + add x20, x22, :lo12:.LANCHOR0 + adrp x21, .LANCHOR5 + add x23, x21, :lo12:.LANCHOR5 + mov w2, 8 + ldrh w0, [x24, 34] + add x25, x20, 1208 + ldrb w1, [x24, 20] + add x27, x24, 9 + strh w0, [x20, 2] + mov w26, 2 + ldrh w0, [x24, 18] + strb wzr, [x20, 1153] + sdiv w0, w0, w1 + mov w1, 0 + strh w0, [x23, 172] + add x0, x20, 1196 + bl ftl_memset + add x0, x23, 176 + mov x23, 0 + mov w2, 32 + mov w1, 0 + bl ftl_memset +.L1399: + ldrb w2, [x24, 8] + add x7, x20, 1024 + strb w26, [x23, x25] + add x1, x20, 1216 + add x1, x1, x23, lsl 3 + mov x0, x27 + bl flash_mem_cmp8 + cbnz w0, .L1398 + ldrb w2, [x20, 1153] + add x1, x21, :lo12:.LANCHOR5 + add x1, x1, 176 + add x7, x7, x2 + add w0, w2, 1 + strb w0, [x20, 1153] + and w0, w23, 255 + str wzr, [x1, x2, lsl 2] + strb w0, [x7, 172] + bl zftl_flash_enter_slc_mode +.L1398: + add x23, x23, 1 + cmp x23, 4 + bne .L1399 + add x0, x19, :lo12:.LANCHOR2 + add x1, x0, 8 + ldrb w2, [x1, 8] + cmp w2, 2 + beq .L1400 +.L1404: + add x19, x19, :lo12:.LANCHOR2 + add x22, x22, :lo12:.LANCHOR0 + add x21, x21, :lo12:.LANCHOR5 + ldr x27, [sp, 80] + ldp x23, x24, [sp, 48] + ldrb w1, [x19, 21] + ldrb w0, [x22, 1153] + ldp x25, x26, [sp, 64] + mul w0, w0, w1 + ldrh w1, [x19, 22] + ldp x19, x20, [sp, 16] + mul w0, w0, w1 + strh w0, [x21, 208] + ldp x21, x22, [sp, 32] + ldp x29, x30, [sp], 96 + ret +.L1400: + add x8, x22, :lo12:.LANCHOR0 + ldrh w7, [x1, 14] + add x11, x21, :lo12:.LANCHOR5 + ldrb w12, [x0, 8] + and w7, w7, 65280 + ldrb w13, [x1, 23] + ldrh w2, [x8, 2] + add x15, x8, 1216 + add x10, x0, 9 + add x11, x11, 176 + add x18, x8, 1024 + mov x9, 0 + mul w7, w7, w2 + ldrb w2, [x1, 13] + mul w7, w7, w2 + lsl w14, w7, 1 +.L1403: + mov w2, w12 + add x1, x15, x9, lsl 3 + mov x0, x10 + bl flash_mem_cmp8 + cbnz w0, .L1401 + ldrb w0, [x8, 1153] + cmp w13, 0 + csel w2, w7, w14, eq + add w1, w0, 1 + strb w1, [x8, 1153] + str w2, [x11, x0, lsl 2] + add x0, x18, x0 + strb w9, [x0, 172] +.L1401: + add x9, x9, 1 + cmp x9, 4 + bne .L1403 + b .L1404 + .size flash_die_info_init, .-flash_die_info_init + .align 2 + .global lpa_hash_init + .type lpa_hash_init, %function +lpa_hash_init: + stp x29, x30, [sp, -32]! + mov w2, 512 + mov w1, 255 + add x29, sp, 0 + str x19, [sp, 16] + adrp x19, .LANCHOR3 + add x19, x19, :lo12:.LANCHOR3 + add x0, x19, 1416 + bl ftl_memset + mov w1, 255 + ldrb w0, [x19, 1321] + ldrh w2, [x19, 1376] + mul w2, w2, w0 + ldr x0, [x19, 1936] + lsl w2, w2, 2 + bl ftl_memset + ldr x19, [sp, 16] + ldp x29, x30, [sp], 32 + ret + .size lpa_hash_init, .-lpa_hash_init + .align 2 + .global lpa_rebuild_hash + .type lpa_rebuild_hash, %function +lpa_rebuild_hash: + stp x29, x30, [sp, -32]! + adrp x0, .LANCHOR2 + add x29, sp, 0 + ldr w0, [x0, #:lo12:.LANCHOR2] + stp x19, x20, [sp, 16] + tbz x0, 12, .L1417 + adrp x1, .LANCHOR4 + add x1, x1, :lo12:.LANCHOR4 + adrp x0, .LC122 + mov w3, 0 + mov w2, 239 + add x1, x1, 48 + add x0, x0, :lo12:.LC122 + bl printk +.L1417: + adrp x19, .LANCHOR3 + add x19, x19, :lo12:.LANCHOR3 + add x20, x19, 1416 + mov w2, 512 + mov w1, 255 + mov x0, x20 + bl ftl_memset + ldrb w0, [x19, 1321] + mov w1, 255 + ldrh w2, [x19, 1376] + mul w2, w2, w0 + ldr x0, [x19, 1936] + lsl w2, w2, 2 + bl ftl_memset + mov w1, 0 +.L1418: + ldrh w0, [x19, 1376] + ldrb w2, [x19, 1321] + mul w0, w0, w2 + cmp w1, w0, lsl 1 + blt .L1420 + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 32 + ret +.L1420: + ldr x0, [x19, 1928] + uxtw x2, w1 + ldr w0, [x0, x2, lsl 2] + cmn w0, #1 + beq .L1419 + and x0, x0, 255 + ldrh w3, [x20, x0, lsl 1] + strh w1, [x20, x0, lsl 1] + ldr x0, [x19, 1936] + strh w3, [x0, x2, lsl 1] +.L1419: + add w1, w1, 1 + and w1, w1, 65535 + b .L1418 + .size lpa_rebuild_hash, .-lpa_rebuild_hash + .align 2 + .global zftl_read_flash_info + .type zftl_read_flash_info, %function +zftl_read_flash_info: + stp x29, x30, [sp, -32]! + mov w2, 11 + mov w1, 0 + add x29, sp, 0 + str x19, [sp, 16] + mov x19, x0 + bl ftl_memset + adrp x1, .LANCHOR2 + adrp x0, .LANCHOR0 + add x1, x1, :lo12:.LANCHOR2 + add x0, x0, :lo12:.LANCHOR0 + add x1, x1, 8 + strb wzr, [x19, 10] + mov w4, 1 + ldrb w2, [x1, 9] + ldrh w3, [x0, 2] + add x0, x0, 1196 + mul w2, w2, w3 + strh w2, [x19, 4] + ldrb w2, [x0, 53] + strb w2, [x19, 7] + ldr w2, [x0, -164] + str w2, [x19] + ldrb w2, [x1, 9] + strb w2, [x19, 6] + ldrb w3, [x0, -43] + mov w2, 32 + ldrb w1, [x1, 7] + strb w2, [x19, 8] + mov x2, 0 + strb w1, [x19, 9] +.L1429: + cmp w3, w2, uxtb + bhi .L1430 + ldr x19, [sp, 16] + ldp x29, x30, [sp], 32 + ret +.L1430: + ldrb w1, [x2, x0] + add x2, x2, 1 + ldrb w5, [x19, 10] + lsl w1, w4, w1 + orr w1, w1, w5 + strb w1, [x19, 10] + b .L1429 + .size zftl_read_flash_info, .-zftl_read_flash_info + .align 2 + .global gc_static_wearleveling + .type gc_static_wearleveling, %function +gc_static_wearleveling: + stp x29, x30, [sp, -144]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x19, .LANCHOR0 + add x0, x19, :lo12:.LANCHOR0 + stp x21, x22, [sp, 32] + stp x23, x24, [sp, 48] + stp x25, x26, [sp, 64] + stp x27, x28, [sp, 80] + ldr x0, [x0, 3384] + ldr w1, [x0, 32] + mov w0, 10240 + cmp w1, w0 + bls .L1433 + bl ftl_tmp_into_update +.L1433: + add x3, x19, :lo12:.LANCHOR0 + mov w4, 36000 + ldr x0, [x3, 1128] + ldr w1, [x0, 568] + ldr w2, [x0, 12] + add w4, w1, w4 + cmp w2, w4 + bcs .L1434 + ldr x4, [x3, 3384] + ldr w3, [x0, 572] + add w3, w3, 256 + ldr w4, [x4, 36] + cmp w4, w3 + bcc .L1486 +.L1434: + add w1, w1, 860160 + add w1, w1, 3840 + cmp w2, w1 + bhi .L1436 + add x1, x19, :lo12:.LANCHOR0 + ldr x3, [x1, 3384] + ldr w1, [x0, 572] + add w1, w1, 32 + ldr w3, [x3, 36] + cmp w3, w1 + bls .L1487 +.L1436: + add x24, x19, :lo12:.LANCHOR0 + mov w20, 65535 + adrp x8, .LC123 + mov w21, w20 + mov w9, w20 + add x8, x8, :lo12:.LC123 + ldr x1, [x24, 3384] + mov w28, 0 + mov w27, 0 + mov w26, 0 + mov w25, 0 + mov w23, 0 + adrp x10, .LANCHOR2 + stp wzr, wzr, [x29, 128] + ldr w3, [x1, 36] + str w3, [x0, 572] + str w2, [x0, 568] + str wzr, [x29, 136] + ldrh w22, [x1, 134] +.L1438: + ldrh w0, [x24, 1096] + cmp w0, w22 + bhi .L1447 + ldr x0, [x24, 1128] + mov w2, 128 + mov w1, 255 + adrp x22, .LANCHOR2 + add x0, x0, 264 + strh wzr, [x0, -142] + bl ftl_memset + ldr x0, [x24, 1128] + ldr w2, [x22, #:lo12:.LANCHOR2] + ldr x10, [x24, 1104] + ldrh w0, [x0, 586] + mov x1, x0 + lsl x9, x0, 2 + add x8, x10, x9 + tbz x2, 10, .L1448 + ldr x5, [x24, 1120] + ldrb w6, [x8, 3] + ldrb w4, [x8, 2] + ldr w3, [x10, x9] + ldrh w7, [x5, x0, lsl 1] + adrp x0, .LC124 + ldrh w2, [x10, x9] + ubfx x5, x4, 5, 3 + stp x9, x10, [x29, 104] + ubfx x3, x3, 11, 8 + str x8, [x29, 120] + and w2, w2, 2047 + ubfx x4, x4, 3, 2 + add x0, x0, :lo12:.LC124 + bl printk + ldp x9, x10, [x29, 104] + ldr x8, [x29, 120] +.L1448: + ldrb w0, [x8, 2] + adrp x24, .LANCHOR5 + and w0, w0, 224 + cmp w0, 32 + bne .L1449 + add x0, x19, :lo12:.LANCHOR0 + ldr x0, [x0, 3384] + ldrh w0, [x0, 688] + cmp w0, 2 + bls .L1449 + add x0, x24, :lo12:.LANCHOR5 + mov w1, 1 + str w1, [x0, 212] +.L1449: + ldrb w0, [x8, 2] + tbz x0, 3, .L1450 + add x3, x19, :lo12:.LANCHOR0 + ldrh w1, [x10, x9] + and w1, w1, 2047 + ldr x0, [x3, 3384] + ldrh w2, [x0, 96] + add x0, x24, :lo12:.LANCHOR5 + ldrh w0, [x0, 216] + add w0, w1, w0, lsr 2 + cmp w2, w0 + ble .L1450 + ldrb w0, [x8, 2] + and w1, w0, 192 + cmp w1, 64 + bne .L1451 + ldr x0, [x3, 1128] + mov w2, 1 + str x3, [x29, 120] + mov w1, 0 + ldrh w0, [x0, 586] + bl gc_add_sblk + ldr x3, [x29, 120] + mov w0, 1 + strh w0, [x3, 5608] +.L1450: + add x0, x19, :lo12:.LANCHOR0 + ldr w2, [x22, #:lo12:.LANCHOR2] + ldr x1, [x0, 1128] + ldr x10, [x0, 1104] + ldrh w5, [x1, 584] + mov x1, x5 + lsl x9, x5, 2 + add x8, x10, x9 + tbz x2, 10, .L1452 + ldr x0, [x0, 1120] + ldrb w6, [x8, 3] + ldrb w4, [x8, 2] + ldr w3, [x10, x9] + ldrh w7, [x0, x5, lsl 1] + adrp x0, .LC125 + ldrh w2, [x10, x9] + ubfx x5, x4, 5, 3 + stp x9, x10, [x29, 104] + ubfx x3, x3, 11, 8 + str x8, [x29, 120] + and w2, w2, 2047 + ubfx x4, x4, 3, 2 + add x0, x0, :lo12:.LC125 + bl printk + ldp x9, x10, [x29, 104] + ldr x8, [x29, 120] +.L1452: + ldrb w0, [x8, 2] + tbz x0, 3, .L1453 + add x3, x19, :lo12:.LANCHOR0 + ldr w1, [x10, x9] + ldr x0, [x3, 3384] + ubfx x1, x1, 11, 8 + ldrh w2, [x0, 98] + add x0, x24, :lo12:.LANCHOR5 + ldrh w0, [x0, 218] + add w0, w1, w0, lsr 2 + cmp w2, w0 + ble .L1453 + ldrb w0, [x8, 2] + and w1, w0, 192 + cmp w1, 64 + bne .L1454 + ldr x0, [x3, 1128] + mov w2, 1 + str x3, [x29, 120] + mov w1, 0 + ldrh w0, [x0, 584] + bl gc_add_sblk + ldr x3, [x29, 120] + mov w0, 1 + strh w0, [x3, 5608] +.L1453: + ldr w0, [x22, #:lo12:.LANCHOR2] + tbz x0, 10, .L1455 + add x0, x19, :lo12:.LANCHOR0 + uxtw x6, w28 + lsl x1, x6, 2 + ldr x2, [x0, 1104] + ldr x0, [x0, 1120] + add x5, x2, x1 + ldr w3, [x2, x1] + ldrh w7, [x0, x6, lsl 1] + adrp x0, .LC126 + ldrb w6, [x5, 3] + add x0, x0, :lo12:.LC126 + ldrb w4, [x5, 2] + ubfx x3, x3, 11, 8 + ldrh w2, [x2, x1] + mov w1, w28 + ubfx x5, x4, 5, 3 + and w2, w2, 2047 + ubfx x4, x4, 3, 2 + bl printk +.L1455: + ldr w0, [x22, #:lo12:.LANCHOR2] + tbz x0, 10, .L1456 + add x0, x19, :lo12:.LANCHOR0 + ldr w6, [x29, 128] + ldr x2, [x0, 1104] + lsl x1, x6, 2 + ldr x0, [x0, 1120] + add x5, x2, x1 + ldr w3, [x2, x1] + ldrh w7, [x0, x6, lsl 1] + adrp x0, .LC127 + ldrh w2, [x2, x1] + add x0, x0, :lo12:.LC127 + ldrb w6, [x5, 3] + ubfx x3, x3, 11, 8 + ldr w1, [x29, 128] + and w2, w2, 2047 + ldrb w4, [x5, 2] + ubfx x5, x4, 5, 3 + ubfx x4, x4, 3, 2 + bl printk +.L1456: + ldr w1, [x29, 132] + add x0, x19, :lo12:.LANCHOR0 + ldr x0, [x0, 3384] + udiv w3, w1, w26 + ldr w1, [x29, 136] + strh w25, [x0, 96] + udiv w4, w1, w27 + strh w23, [x0, 98] + strh w20, [x0, 92] + strh w21, [x0, 94] + strh w3, [x0, 88] + strh w4, [x0, 90] + ldr w0, [x22, #:lo12:.LANCHOR2] + tbz x0, 10, .L1457 + adrp x0, .LC128 + and w4, w4, 65535 + and w3, w3, 65535 + mov w2, w27 + mov w1, w26 + add x0, x0, :lo12:.LC128 + bl printk +.L1457: + ldr w0, [x22, #:lo12:.LANCHOR2] + tbz x0, 10, .L1458 + add x0, x24, :lo12:.LANCHOR5 + mov w4, w23 + mov w3, w25 + mov w2, w21 + mov w1, w20 + ldrh w6, [x0, 218] + ldrh w5, [x0, 216] + adrp x0, .LC129 + add x0, x0, :lo12:.LC129 + bl printk +.L1458: + add x1, x24, :lo12:.LANCHOR5 + sub w0, w23, w21 + str w0, [x29, 128] + ldrh w0, [x1, 218] + ldr w2, [x29, 128] + cmp w2, w0 + bgt .L1459 + ldrh w1, [x1, 216] + sub w0, w25, w20 + cmp w0, w1 + ble .L1488 +.L1459: + add x8, x19, :lo12:.LANCHOR0 + mov w26, 0 + mov x27, x8 + mov w23, 0 + ldr x0, [x8, 1128] + ldrh w28, [x0, 580] + ldr x0, [x8, 3384] + ldrh w0, [x0, 134] + str w0, [x29, 132] + add x0, x8, 3416 + str x0, [x29, 136] + adrp x0, .LC131 + add x0, x0, :lo12:.LC131 + str x0, [x29, 120] +.L1461: + ldrh w0, [x27, 1096] + ldr w1, [x29, 132] + cmp w1, w0 + bcc .L1471 +.L1470: + add x0, x19, :lo12:.LANCHOR0 + ldr x0, [x0, 1128] + str w28, [x0, 580] +.L1460: + cbz w21, .L1473 + add x0, x19, :lo12:.LANCHOR0 + ldr x1, [x0, 3384] + ldrh w1, [x1, 134] +.L1474: + ldrh w2, [x0, 1096] + cmp w2, w1 + bhi .L1476 + ldr x0, [x0, 3384] + ldrh w1, [x0, 72] + add w1, w21, w1 + strh w1, [x0, 72] + ldrh w1, [x0, 98] + cmp w21, w1 + bcs .L1473 + sub w21, w1, w21 + strh w21, [x0, 98] +.L1473: + cbz w20, .L1479 + add x0, x19, :lo12:.LANCHOR0 + ldr x1, [x0, 3384] + ldrh w1, [x1, 134] +.L1480: + ldrh w2, [x0, 1096] + cmp w2, w1 + bhi .L1482 + ldr x0, [x0, 3384] + ldrh w1, [x0, 74] + add w1, w20, w1 + strh w1, [x0, 74] + ldrh w1, [x0, 96] + cmp w20, w1 + bcs .L1479 + sub w20, w1, w20 + strh w20, [x0, 96] +.L1479: + adrp x5, .LANCHOR3 + add x5, x5, :lo12:.LANCHOR3 + mov w1, 0 + add x0, x5, 1368 + bl _list_get_gc_head_node + and w1, w0, 65535 + mov w2, 65535 + cmp w1, w2 + beq .L1437 + add x19, x19, :lo12:.LANCHOR0 + ubfiz x1, x1, 1, 16 + ldrh w2, [x5, 1376] + ldr x3, [x19, 1120] + ldrh w1, [x3, x1] + cmp w1, w2, lsr 1 + bhi .L1437 + add w23, w23, 1 + mov w2, 1 + mov w1, 0 + bl gc_add_sblk +.L1437: + add w0, w23, w26 +.L1432: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 144 + ret +.L1447: + uxtw x7, w22 + ldr x5, [x24, 1104] + lsl x2, x7, 2 + add x6, x5, x2 + ldrb w0, [x6, 2] + and w1, w0, 224 + cmp w1, 224 + beq .L1439 + tbz x0, 3, .L1440 + ldr w0, [x5, x2] + ldrh w1, [x5, x2] + ubfx x0, x0, 11, 8 + and w1, w1, 2047 +.L1441: + ldr w3, [x29, 132] + add w26, w26, 1 + and w26, w26, 65535 + cmp w20, w1 + add w3, w3, w1 + str w3, [x29, 132] + bls .L1485 + ldr x3, [x24, 1128] + mov w20, w1 + strh w22, [x3, 586] +.L1485: + cmp w25, w1 + bcs .L1444 + mov w28, w22 + mov w25, w1 +.L1444: + cmp w0, w9 + bne .L1443 +.L1445: + cmp w0, 9 + ccmp w1, 9, 0, hi + bhi .L1439 + ldr w0, [x10, #:lo12:.LANCHOR2] + tbz x0, 8, .L1439 + ldr x0, [x24, 1120] + mov w1, w22 + ldrb w4, [x6, 2] + ldrb w6, [x6, 3] + ldr w3, [x5, x2] + ldrh w7, [x0, x7, lsl 1] + mov x0, x8 + ldrh w2, [x5, x2] + ubfx x5, x4, 5, 3 + str x10, [x29, 104] + ubfx x4, x4, 3, 2 + str w9, [x29, 112] + ubfx x3, x3, 11, 8 + str x8, [x29, 120] + and w2, w2, 2047 + bl printk + ldr w9, [x29, 112] + ldr x10, [x29, 104] + ldr x8, [x29, 120] +.L1439: + add w22, w22, 1 + and w22, w22, 65535 + b .L1438 +.L1440: + tst w0, 24 + bne .L1442 + ldrh w1, [x5, x2] + mov w0, 65535 + and w1, w1, 2047 + b .L1441 +.L1442: + ldr w0, [x5, x2] + mov w1, 65535 + ubfx x0, x0, 11, 8 +.L1443: + ldr w3, [x29, 136] + add w27, w27, 1 + and w27, w27, 65535 + cmp w21, w0 + add w3, w3, w0 + str w3, [x29, 136] + bls .L1446 + ldr x3, [x24, 1128] + mov w21, w0 + strh w22, [x3, 584] +.L1446: + cmp w23, w0 + bcs .L1445 + mov w23, w0 + str w22, [x29, 128] + b .L1445 +.L1451: + tst w0, 224 + bne .L1450 + ldr x1, [x3, 1128] + mov w0, 65535 + ldrh w2, [x1, 590] + cmp w2, w0 + bne .L1450 + ldrh w0, [x1, 586] + str x3, [x29, 120] + ldrh w1, [x1, 588] + cmp w1, w0 + beq .L1450 + bl zftl_remove_free_node + ldr x3, [x29, 120] + ldr x0, [x3, 1128] + ldrh w1, [x0, 586] + strh w1, [x0, 590] + mov w1, -1 + strh w1, [x0, 586] + b .L1450 +.L1454: + and w0, w0, 248 + cmp w0, 16 + bne .L1453 + ldr x1, [x3, 1128] + mov w0, 65535 + ldrh w2, [x1, 588] + cmp w2, w0 + bne .L1453 + ldrh w0, [x1, 584] + str x3, [x29, 120] + ldrh w1, [x1, 590] + cmp w1, w0 + beq .L1453 + bl zftl_remove_free_node + ldr x3, [x29, 120] + ldr x0, [x3, 1128] + ldrh w1, [x0, 584] + strh w1, [x0, 588] + mov w1, -1 + strh w1, [x0, 584] + b .L1453 +.L1471: + add w7, w28, 1 + ldr x4, [x27, 1104] + and w28, w7, 65535 + cmp w0, w28 + csel w28, w28, wzr, hi + uxtw x9, w28 + lsl x3, x9, 2 + add x0, x4, x3 + ldrb w0, [x0, 2] + tst w0, 192 + beq .L1463 + and w2, w0, 224 + cmp w2, 224 + beq .L1463 + ubfx x0, x0, 3, 2 + and w1, w0, 1 + tbz x0, 0, .L1464 + cmp w2, 160 +.L1551: + bne .L1466 + add x0, x24, :lo12:.LANCHOR5 + ldr w2, [x29, 128] + ldrh w0, [x0, 218] + cmp w2, w0 + ble .L1467 + ldr w0, [x4, x3] + ubfx x0, x0, 11, 8 + cmp w0, w21 + bls .L1468 + cbz w1, .L1467 + ldrh w0, [x4, x3] + and w0, w0, 2047 + cmp w0, w20 + bgt .L1467 +.L1468: + mov w1, 0 + stp x4, x9, [x29, 96] + str x3, [x29, 112] + mov w2, 1 + mov w0, w28 + bl gc_add_sblk + ldr x1, [x29, 136] + mov w0, 1 + add w23, w23, 1 + ldr x3, [x29, 112] + ldp x4, x9, [x29, 96] + strh w0, [x1, 2192] + ldr w0, [x22, #:lo12:.LANCHOR2] + tbz x0, 10, .L1467 + ldr x0, [x27, 1104] + ldr w6, [x4, x3] + ldrh w5, [x4, x3] + add x3, x0, x3 + ldr x1, [x27, 1120] + ldr x0, [x29, 136] + ubfx x6, x6, 11, 8 + ldrb w2, [x3, 2] + and w5, w5, 2047 + ldrh w3, [x1, x9, lsl 1] + mov w1, w28 + ldrh w4, [x0, 56] + ubfx x2, x2, 5, 3 + adrp x0, .LC130 + add x0, x0, :lo12:.LC130 +.L1552: + bl printk +.L1467: + cmp w23, 4 + ccmp w26, 4, 2, ls + bhi .L1470 +.L1463: + ldr w0, [x29, 132] + add w0, w0, 1 + and w0, w0, 65535 + str w0, [x29, 132] + b .L1461 +.L1464: + cmp w0, 2 + b .L1551 +.L1466: + add x2, x24, :lo12:.LANCHOR5 + sub w0, w25, w20 + ldrh w2, [x2, 216] + cmp w0, w2 + ble .L1467 + ldrh w0, [x4, x3] + add w2, w20, 8 + and w0, w0, 2047 + cmp w0, w2 + ble .L1469 + cbz w1, .L1467 + ldr w0, [x4, x3] + add w1, w21, 4 + ubfx x0, x0, 11, 8 + cmp w0, w1 + bgt .L1467 +.L1469: + mov w1, 0 + stp x4, x9, [x29, 96] + str x3, [x29, 112] + mov w2, 1 + mov w0, w28 + bl gc_add_sblk + ldr x1, [x29, 136] + mov w0, 1 + add w26, w26, 1 + ldr x3, [x29, 112] + ldp x4, x9, [x29, 96] + strh w0, [x1, 2192] + ldr w0, [x22, #:lo12:.LANCHOR2] + tbz x0, 10, .L1467 + ldr x0, [x27, 1104] + ldr w6, [x4, x3] + ldrh w5, [x4, x3] + add x3, x0, x3 + ldr x1, [x27, 1120] + ldr x0, [x29, 136] + ubfx x6, x6, 11, 8 + ldrb w2, [x3, 2] + and w5, w5, 2047 + ldrh w3, [x1, x9, lsl 1] + mov w1, w28 + ldrh w4, [x0, 56] + ubfx x2, x2, 5, 3 + ldr x0, [x29, 120] + b .L1552 +.L1488: + mov w26, 0 + mov w23, 0 + b .L1460 +.L1476: + ldr x5, [x0, 1104] + ubfiz x4, x1, 2, 16 + add x6, x5, x4 + ldr w2, [x5, x4] + ubfx x3, x2, 11, 8 + cmp w21, w3 + bhi .L1475 + ldrb w6, [x6, 2] + tst w6, 24 + beq .L1475 + sub w3, w3, w21 + bfi w2, w3, 11, 8 + str w2, [x5, x4] +.L1475: + add w1, w1, 1 + and w1, w1, 65535 + b .L1474 +.L1482: + ldr x5, [x0, 1104] + ubfiz x4, x1, 2, 16 + add x6, x5, x4 + ldrh w2, [x5, x4] + and w3, w2, 2047 + cmp w3, w20 + blt .L1481 + ldrb w6, [x6, 2] + and w6, w6, 24 + cmp w6, 16 + beq .L1481 + sub w3, w3, w20 + bfi w2, w3, 0, 11 + strh w2, [x5, x4] +.L1481: + add w1, w1, 1 + and w1, w1, 65535 + b .L1480 +.L1487: + mov w26, 0 + mov w23, 0 + b .L1437 +.L1486: + mov w0, 0 + b .L1432 + .size gc_static_wearleveling, .-gc_static_wearleveling + .align 2 + .global zftl_sblk_list_init + .type zftl_sblk_list_init, %function +zftl_sblk_list_init: + stp x29, x30, [sp, -96]! + mov w0, 6 + mov w1, 0 + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x19, .LANCHOR0 + add x19, x19, :lo12:.LANCHOR0 + stp x23, x24, [sp, 48] + stp x25, x26, [sp, 64] + adrp x25, .LANCHOR4 + stp x21, x22, [sp, 32] + adrp x22, .LANCHOR3 + ldrh w2, [x19, 1096] + add x25, x25, :lo12:.LANCHOR4 + str x27, [sp, 80] + add x26, x19, 3372 + add x25, x25, 72 + mov w23, 0 + mul w2, w2, w0 + ldr x0, [x19, 1040] + bl ftl_memset + strh wzr, [x19, 3368] + add x0, x22, :lo12:.LANCHOR3 + mov w1, 32 + strh wzr, [x19, 3370] + strh wzr, [x19, 3372] + ldrb w24, [x0, 1321] + strh w1, [x0, 1408] + str xzr, [x0, 1344] + str xzr, [x0, 1360] + str xzr, [x0, 1368] + str xzr, [x0, 1384] + str xzr, [x0, 1392] + str xzr, [x0, 1400] + ldrh w0, [x0, 1338] + strh wzr, [x19, 3374] + strh wzr, [x19, 3378] + strh wzr, [x19, 3376] + mul w0, w24, w0 + mov w24, 32768 + sdiv w24, w24, w0 + ldr x0, [x19, 3384] + ldrsh w20, [x0, 134] + sxth w24, w24 + strh wzr, [x0, 146] +.L1554: + ldrh w0, [x19, 1096] + cmp w20, w0 + blt .L1571 + ldr x0, [x19, 3384] + ldrh w1, [x19, 3368] + strh w1, [x0, 114] + ldrh w1, [x19, 3370] + strh w1, [x0, 118] + ldrh w1, [x19, 3372] + strh w1, [x0, 116] + ldrh w1, [x19, 3374] + strh w1, [x0, 122] + ldrh w1, [x19, 3378] + strh w1, [x0, 120] + ldrh w1, [x19, 3376] + strh w1, [x0, 124] + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldr x27, [sp, 80] + ldp x29, x30, [sp], 96 + ret +.L1571: + ldr x21, [x19, 1104] + sxtw x27, w20 + add x21, x21, x27, lsl 2 + ldrb w0, [x21, 3] + cbz w0, .L1572 + add x0, x22, :lo12:.LANCHOR3 + ldr x3, [x19, 3384] + mov w1, 0 + ldrb w4, [x0, 1321] + ldrh w5, [x0, 1338] + mov w0, 0 +.L1556: + cmp w1, w4 + blt .L1559 + cbz w0, .L1560 + mov w1, 32768 + sdiv w0, w1, w0 + add w0, w0, 1 + sxth w0, w0 +.L1555: + mov w1, 6 + ldr x2, [x19, 1040] + smull x1, w20, w1 + add x2, x2, x1 + strh w0, [x2, 4] + mov w2, -1 + ldr x0, [x19, 1040] + add x3, x0, x1 + strh w2, [x3, 2] + strh w2, [x0, x1] + mov w1, 224 + ldrb w0, [x21, 2] + and w0, w0, 224 + cmp w0, 32 + ccmp w0, w1, 4, ne + beq .L1561 + ldr x1, [x19, 1128] + ldrh w2, [x1, 16] + cmp w20, w2 + beq .L1561 + ldrh w2, [x1, 48] + cmp w20, w2 + beq .L1561 + ldrh w1, [x1, 80] + cmp w20, w1 + beq .L1561 + cmp w0, 64 + bne .L1562 + and w21, w20, 65535 + add x0, x22, :lo12:.LANCHOR3 + add x2, x19, 3374 + mov w1, w21 + add x0, x0, 1344 +.L1583: + bl _insert_data_list + ldr x0, [x19, 1120] + ldrh w0, [x0, x27, lsl 1] + cmp w0, 7 + bhi .L1561 + mov w0, w21 + mov w2, 0 + mov w1, 1 +.L1581: + bl gc_add_sblk +.L1561: + add w20, w20, 1 + sxth w20, w20 + b .L1554 +.L1559: + ldrb w2, [x21, 3] + asr w2, w2, w1 + tbnz x2, 0, .L1557 + add w0, w5, w0 + sxth w0, w0 +.L1558: + add w1, w1, 1 + b .L1556 +.L1557: + ldrh w2, [x3, 146] + add w2, w2, 1 + strh w2, [x3, 146] + b .L1558 +.L1560: + ldrb w1, [x21, 2] + mov w2, -1 + orr w1, w1, -32 + strb w1, [x21, 2] + ldr x1, [x19, 1120] + strh w2, [x1, x27, lsl 1] + b .L1555 +.L1572: + mov w0, w24 + b .L1555 +.L1562: + cmp w0, 96 + bne .L1563 + and w21, w20, 65535 + add x0, x22, :lo12:.LANCHOR3 + add x2, x19, 3376 + mov w1, w21 + add x0, x0, 1360 + b .L1583 +.L1563: + cmp w0, 160 + bne .L1564 + and w21, w20, 65535 + add x0, x22, :lo12:.LANCHOR3 + add x2, x19, 3378 + mov w1, w21 + add x0, x0, 1368 + b .L1583 +.L1564: + cbnz w0, .L1561 + ldr x0, [x19, 1120] + ldrh w2, [x0, x27, lsl 1] + cbz w2, .L1565 + cmp w23, 2 + bgt .L1566 + mov w1, w20 + adrp x0, .LC132 + add x0, x0, :lo12:.LC132 + bl printk + ldrb w0, [x21, 2] + add w23, w23, 1 + sxth w23, w23 + tbz x0, 4, .L1567 + mov w1, 5 +.L1577: + bfi w0, w1, 5, 3 + mov w2, 0 + strb w0, [x21, 2] + mov w1, 1 + mov w0, w20 + b .L1581 +.L1567: + mov w1, 2 + b .L1577 +.L1566: + mov x1, x25 + mov w2, 656 + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack +.L1565: + ldrb w0, [x21, 2] + ands w0, w0, 24 + bne .L1569 + add x0, x22, :lo12:.LANCHOR3 + add x2, x19, 3368 + mov w1, w20 + add x0, x0, 1384 +.L1579: + bl _insert_free_list + b .L1561 +.L1569: + cmp w0, 16 + add x0, x22, :lo12:.LANCHOR3 + bne .L1570 + add x2, x19, 3370 + mov w1, w20 + add x0, x0, 1392 + b .L1579 +.L1570: + mov x2, x26 + mov w1, w20 + add x0, x0, 1400 + b .L1579 + .size zftl_sblk_list_init, .-zftl_sblk_list_init + .align 2 + .global pm_free_sblk + .type pm_free_sblk, %function +pm_free_sblk: + stp x29, x30, [sp, -368]! + adrp x0, .LANCHOR5 + add x1, x0, :lo12:.LANCHOR5 + add x29, sp, 0 + stp x19, x20, [sp, 16] + mov x19, x0 + stp x21, x22, [sp, 32] + stp x23, x24, [sp, 48] + stp x25, x26, [sp, 64] + stp x27, x28, [sp, 80] + ldrh w1, [x1, 220] + cmp w1, 128 + bls .L1586 + adrp x1, .LANCHOR4 + add x1, x1, :lo12:.LANCHOR4 + add x1, x1, 96 + mov w2, 94 + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack +.L1586: + adrp x21, .LANCHOR0 + add x0, x21, :lo12:.LANCHOR0 + add x19, x19, :lo12:.LANCHOR5 + mov w1, 0 + mov w4, 65535 + ldr x0, [x0, 3384] + ldrh w3, [x19, 220] + mov w19, 0 + add x0, x0, 416 + ldrh w2, [x0, 272] +.L1589: + ldrh w5, [x0] + cmp w5, w4 + beq .L1587 + add w1, w1, 1 + and w1, w1, 65535 +.L1587: + cmp w1, w2 + bcs .L1588 + cmp w1, w3 + bcs .L1588 + add w19, w19, 1 + add x0, x0, 2 + and w19, w19, 65535 + cmp w19, 128 + bne .L1589 +.L1588: + add w19, w19, 1 + mov w0, 128 + and w19, w19, 65535 + add x22, x29, 112 + cmp w19, 129 + mov w2, 256 + csel w19, w19, w0, ne + mov w1, 0 + mov x0, x22 + adrp x23, .LANCHOR3 + bl ftl_memset + str x23, [x29, 104] + add x0, x21, :lo12:.LANCHOR0 + add x1, x23, :lo12:.LANCHOR3 + mov w2, 24 + ldr x5, [x0, 3384] + ldrb w0, [x0, 1205] + ldrh w8, [x1, 1304] + add x4, x5, 704 + sub w2, w2, w0 + ldrb w9, [x1, 1306] + ldrh w1, [x5, 698] + sub w0, w2, w8 + mov w2, 1 + add x1, x1, 176 + lsl w2, w2, w0 + add x1, x5, x1, lsl 2 + sub w2, w2, #1 +.L1591: + cmp x1, x4 + bne .L1594 + ldr x0, [x29, 104] + adrp x27, .LC133 + adrp x28, .LC134 + add x21, x21, :lo12:.LANCHOR0 + add x0, x0, :lo12:.LANCHOR3 + add x27, x27, :lo12:.LC133 + add x28, x28, :lo12:.LC134 + mov x20, 0 + mov w23, 65535 + mov w26, 0 + ldrb w24, [x0, 1321] + ldrh w0, [x0, 1376] + mul w24, w24, w0 + and w24, w24, 65535 +.L1600: + ldr x0, [x21, 3384] + and w25, w20, 65535 + ldr x2, [x29, 104] + mov w6, w20 + add x1, x0, w20, sxtw 1 + add x2, x2, :lo12:.LANCHOR3 + ldrh w3, [x1, 416] + ldrb w4, [x2, 1306] + ldrh w1, [x0, 692] + sdiv w1, w1, w4 + cmp w1, w3 + bne .L1595 + ldrb w1, [x2, 1321] + ldrh w2, [x2, 1376] + mul w1, w1, w2 + strh w1, [x22, x20, lsl 1] +.L1595: + ldrh w2, [x22, x20, lsl 1] + cmp w2, w24 + bcs .L1596 + cmp w2, 0 + csel w26, w26, w25, eq + csel w24, w24, w2, eq +.L1596: + ldrh w1, [x0, 74] + cmp w1, 2 + bls .L1597 + mov w1, 65535 + cmp w3, w1 + beq .L1597 + ldr x4, [x21, 1104] + ubfiz x1, x3, 2, 16 + ldrh w0, [x0, 92] + add w0, w0, 4 + ldrh w4, [x4, x1] + and w4, w4, 2047 + cmp w4, w0 + bgt .L1597 + mov w1, w6 + str w6, [x29, 100] + mov x0, x27 + bl printk + ldr w6, [x29, 100] + mov w23, w25 +.L1597: + ldrh w0, [x22, x20, lsl 1] + cbnz w0, .L1598 + sxtw x25, w6 + ldr x0, [x21, 3384] + add x1, x25, 208 + ldrh w3, [x0, x1, lsl 1] + mov w1, 65535 + cmp w3, w1 + beq .L1598 + adrp x1, .LANCHOR2 + ldr w1, [x1, #:lo12:.LANCHOR2] + tbz x1, 12, .L1599 + ldrh w4, [x0, 688] + mov w2, 0 + mov w1, w6 + mov x0, x28 + bl printk +.L1599: + ldr x0, [x21, 3384] + add x25, x25, 208 + ldrh w0, [x0, x25, lsl 1] + bl ftl_free_sblk + ldr x0, [x21, 3384] + mov w1, -1 + strh w1, [x0, x25, lsl 1] + ldrh w1, [x0, 688] + sub w1, w1, #1 + strh w1, [x0, 688] +.L1598: + add x20, x20, 1 + cmp w19, w20, uxth + bhi .L1600 + mov w0, 65535 + cmp w23, w0 + csel w0, w26, w23, eq + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 368 + ret +.L1594: + ldr w0, [x4] + add x6, x5, 416 + mov x3, 0 + lsr w0, w0, w8 + and w0, w0, w2 + udiv w0, w0, w9 + and w0, w0, 65535 +.L1593: + ldrh w7, [x6] + cmp w7, w0 + bne .L1592 + ldrh w7, [x22, x3, lsl 1] + add w7, w7, 1 + strh w7, [x22, x3, lsl 1] +.L1592: + add x3, x3, 1 + add x6, x6, 2 + cmp w19, w3, uxth + bhi .L1593 + add x4, x4, 4 + b .L1591 + .size pm_free_sblk, .-pm_free_sblk + .align 2 + .global ftl_memcpy + .type ftl_memcpy, %function +ftl_memcpy: + stp x29, x30, [sp, -16]! + uxtw x2, w2 + add x29, sp, 0 + bl memcpy + ldp x29, x30, [sp], 16 + ret + .size ftl_memcpy, .-ftl_memcpy + .align 2 + .global flash_info_data_init + .type flash_info_data_init, %function +flash_info_data_init: + stp x29, x30, [sp, -32]! + adrp x1, .LANCHOR2 + add x29, sp, 0 + ldr w0, [x1, #:lo12:.LANCHOR2] + stp x19, x20, [sp, 16] + mov x20, x1 + tbz x0, 12, .L1614 + adrp x2, .LANCHOR4 + add x2, x2, :lo12:.LANCHOR4 + adrp x0, .LC135 + add x2, x2, 112 + mov w1, 120 + add x0, x0, :lo12:.LC135 + bl printk +.L1614: + adrp x19, .LANCHOR0 + add x19, x19, :lo12:.LANCHOR0 + mov w2, 2048 + mov w1, 0 + ldr x0, [x19, 1048] + bl ftl_memset + ldr x0, [x19, 1048] + mov w1, 21321 + movk w1, 0x5359, lsl 16 + mov w2, 32 + str w1, [x0] + mov w1, 2032 + ldr x0, [x19, 1048] + add x0, x0, 80 + str w1, [x0, -72] + mov w1, 1 + strh w1, [x0, -64] + add x1, x19, 1160 + bl ftl_memcpy + ldr x0, [x19, 1048] + add x1, x20, :lo12:.LANCHOR2 + mov w2, 32 + add x1, x1, 8 + add x0, x0, 48 + bl ftl_memcpy + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 32 + ret + .size flash_info_data_init, .-flash_info_data_init + .align 2 + .global ftl_memcpy32 + .type ftl_memcpy32, %function +ftl_memcpy32: + mov x3, 0 +.L1620: + cmp w2, w3 + bhi .L1621 + ret +.L1621: + ldr w4, [x1, x3, lsl 2] + str w4, [x0, x3, lsl 2] + add x3, x3, 1 + b .L1620 + .size ftl_memcpy32, .-ftl_memcpy32 + .align 2 + .global ftl_memcmp + .type ftl_memcmp, %function +ftl_memcmp: + stp x29, x30, [sp, -16]! + uxtw x2, w2 + add x29, sp, 0 + bl memcmp + ldp x29, x30, [sp], 16 + ret + .size ftl_memcmp, .-ftl_memcmp + .align 2 + .global timer_get_time + .type timer_get_time, %function +timer_get_time: + stp x29, x30, [sp, -16]! + adrp x0, jiffies + add x29, sp, 0 + ldr x1, [x0, #:lo12:jiffies] + adrp x0, .LANCHOR5+224 + ldr x0, [x0, #:lo12:.LANCHOR5+224] + sub x0, x1, x0 + bl jiffies_to_msecs + ldp x29, x30, [sp], 16 + ret + .size timer_get_time, .-timer_get_time + .align 2 + .global StorageSysDataLoad + .type StorageSysDataLoad, %function +StorageSysDataLoad: + stp x29, x30, [sp, -32]! + mov w2, 512 + add x29, sp, 0 + stp x19, x20, [sp, 16] + mov x19, x1 + mov w1, 0 + mov w20, w0 + mov x0, x19 + bl ftl_memset + bl rknand_device_lock + adrp x0, .LANCHOR5+232 + mov x2, x19 + mov w1, 1 + ldr x0, [x0, #:lo12:.LANCHOR5+232] + ldr x3, [x0, 24] + mov w0, w20 + blr x3 + mov w19, w0 + bl rknand_device_unlock + mov w0, w19 + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 32 + ret + .size StorageSysDataLoad, .-StorageSysDataLoad + .align 2 + .global StorageSysDataStore + .type StorageSysDataStore, %function +StorageSysDataStore: + stp x29, x30, [sp, -32]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + mov w19, w0 + mov x20, x1 + bl rknand_device_lock + adrp x0, .LANCHOR5+232 + mov x2, x20 + mov w1, 1 + ldr x0, [x0, #:lo12:.LANCHOR5+232] + ldr x3, [x0, 32] + mov w0, w19 + blr x3 + mov w19, w0 + bl rknand_device_unlock + mov w0, w19 + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 32 + ret + .size StorageSysDataStore, .-StorageSysDataStore + .align 2 + .global FlashBootVendorRead + .type FlashBootVendorRead, %function +FlashBootVendorRead: + stp x29, x30, [sp, -48]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + mov w19, w0 + mov w20, w1 + str x21, [sp, 32] + mov x21, x2 + bl rknand_device_lock + adrp x0, .LANCHOR5+232 + mov x2, x21 + mov w1, w20 + ldr x0, [x0, #:lo12:.LANCHOR5+232] + ldr x3, [x0, 8] + mov w0, w19 + blr x3 + mov w19, w0 + bl rknand_device_unlock + ldr x21, [sp, 32] + mov w0, w19 + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 48 + ret + .size FlashBootVendorRead, .-FlashBootVendorRead + .align 2 + .global FlashBootVendorWrite + .type FlashBootVendorWrite, %function +FlashBootVendorWrite: + stp x29, x30, [sp, -48]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + mov w19, w0 + mov w20, w1 + str x21, [sp, 32] + mov x21, x2 + bl rknand_device_lock + adrp x0, .LANCHOR5+232 + mov x2, x21 + mov w1, w20 + ldr x0, [x0, #:lo12:.LANCHOR5+232] + ldr x3, [x0, 16] + mov w0, w19 + blr x3 + mov w19, w0 + bl rknand_device_unlock + ldr x21, [sp, 32] + mov w0, w19 + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 48 + ret + .size FlashBootVendorWrite, .-FlashBootVendorWrite + .align 2 + .global flash_sram_load_store + .type flash_sram_load_store, %function +flash_sram_load_store: + stp x29, x30, [sp, -16]! + adrp x4, .LANCHOR5+240 + uxtw x5, w1 + add x29, sp, 0 + ldr x4, [x4, #:lo12:.LANCHOR5+240] + add x4, x4, 4096 + cbnz w2, .L1635 + mov w2, w3 + add x1, x4, x5 +.L1638: + bl ftl_memcpy + ldp x29, x30, [sp], 16 + ret +.L1635: + mov x1, x0 + mov w2, w3 + add x0, x4, x5 + b .L1638 + .size flash_sram_load_store, .-flash_sram_load_store + .align 2 + .global FlashCs123Init + .type FlashCs123Init, %function +FlashCs123Init: + ret + .size FlashCs123Init, .-FlashCs123Init + .align 2 + .global ftl_dma32_malloc + .type ftl_dma32_malloc, %function +ftl_dma32_malloc: + stp x29, x30, [sp, -48]! + cmp w0, 8192 + add x29, sp, 0 + stp x19, x20, [sp, 16] + str x21, [sp, 32] + ble .L1641 + bl ftl_malloc +.L1640: + ldp x19, x20, [sp, 16] + ldr x21, [sp, 32] + ldp x29, x30, [sp], 48 + ret +.L1641: + adrp x1, .LANCHOR5 + add x21, x1, :lo12:.LANCHOR5 + add w19, w0, 63 + mov x20, x1 + and w19, w19, -64 + ldr w0, [x21, 248] + cmp w19, w0 + ble .L1643 + mov w0, 16384 + bl ftl_malloc + str x0, [x21, 256] + mov w0, 16384 + str w0, [x21, 248] +.L1643: + add x1, x20, :lo12:.LANCHOR5 + ldr w0, [x1, 248] + sub w0, w0, w19 + str w0, [x1, 248] + ldr x0, [x1, 256] + add x19, x0, w19, sxtw + str x19, [x1, 256] + b .L1640 + .size ftl_dma32_malloc, .-ftl_dma32_malloc + .align 2 + .global nandc_init + .type nandc_init, %function +nandc_init: + stp x29, x30, [sp, -64]! + add x29, sp, 0 + stp x21, x22, [sp, 32] + adrp x21, .LANCHOR2 + mov x22, x0 + stp x19, x20, [sp, 16] + ldr w0, [x21, #:lo12:.LANCHOR2] + str wzr, [x29, 56] + tbz x0, 12, .L1646 + adrp x1, .LANCHOR4 + add x1, x1, :lo12:.LANCHOR4 + adrp x0, .LC136 + mov x2, x22 + add x1, x1, 136 + add x0, x0, :lo12:.LC136 + bl printk +.L1646: + adrp x0, .LANCHOR0 + add x1, x0, :lo12:.LANCHOR0 + ldr w3, [x22, 352] + mov w2, 6 + mov x20, x0 + strb w2, [x1, 1028] + mov w2, 12336 + str x22, [x1, 1056] + movk w2, 0x5638, lsl 16 + cmp w3, w2 + bne .L1647 + mov w0, 8 + strb w0, [x1, 1028] +.L1647: + ldr w1, [x22, 128] + mov w0, 12336 + movk w0, 0x5639, lsl 16 + cmp w1, w0 + bne .L1648 + add x0, x20, :lo12:.LANCHOR0 + mov w1, 9 + strb w1, [x0, 1028] +.L1648: + add x19, x20, :lo12:.LANCHOR0 + ldrb w0, [x19, 1028] + cmp w0, 9 + bne .L1649 + mov w0, 1 + strb w0, [x19, 1251] + ldr w0, [x29, 56] + mov w1, 2 + orr w0, w0, 256 + str w0, [x29, 56] + ldr w0, [x29, 56] + bfi w0, w1, 18, 3 + str w0, [x29, 56] + mov w1, 4161 + ldr w0, [x29, 56] + str w0, [x22] + ldr x0, [x19, 1056] + str wzr, [x0, 520] + str w1, [x0, 4] + mov w1, 8321 + ldr x0, [x19, 1056] + str w1, [x0, 8] + mov w1, 4099 + movk w1, 0x10, lsl 16 + str w1, [x0, 80] + mov w1, 38 + str w1, [x0, 84] + mov w1, 39 + str w1, [x0, 84] + ldr w1, [x21, #:lo12:.LANCHOR2] + tbz x1, 12, .L1651 + ldr w1, [x0] + ldr w2, [x0, 8] + ldr w3, [x0, 80] + ldr w4, [x0, 84] + ldr w5, [x0, 88] +.L1664: + adrp x0, .LC137 + add x0, x0, :lo12:.LC137 + bl printk +.L1651: + add x0, x20, :lo12:.LANCHOR0 + mov w1, 1 + strb w1, [x0, 1252] + ldr w1, [x21, #:lo12:.LANCHOR2] + strh wzr, [x0, 1296] + strb wzr, [x0, 1249] + tbz x1, 12, .L1645 + ldrb w1, [x0, 1028] + adrp x0, .LC138 + add x0, x0, :lo12:.LC138 + bl printk +.L1645: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x29, x30, [sp], 64 + ret +.L1649: + ldr w0, [x29, 56] + mov w1, 1 + strb wzr, [x19, 1251] + orr w0, w0, 256 + str w0, [x29, 56] + ldr w0, [x29, 56] + bfi w0, w1, 24, 3 + str w0, [x29, 56] + mov w1, 4193 + ldr w0, [x29, 56] + str w0, [x22] + ldr x0, [x19, 1056] + str wzr, [x0, 336] + str w1, [x0, 4] + mov w1, 8321 + ldr x0, [x19, 1056] + str w1, [x0, 344] + mov w1, 4099 + movk w1, 0x10, lsl 16 + str w1, [x0, 304] + mov w1, 38 + str w1, [x0, 308] + mov w1, 39 + str w1, [x0, 308] + mov w0, 2048 + bl ftl_dma32_malloc + str x0, [x19, 1256] + ldr w0, [x21, #:lo12:.LANCHOR2] + tbz x0, 12, .L1651 + ldr x0, [x19, 1056] + ldr w1, [x0] + ldr w2, [x0, 344] + ldr w3, [x0, 304] + ldr w4, [x0, 308] + ldr w5, [x0, 312] + b .L1664 + .size nandc_init, .-nandc_init + .align 2 + .global zbuf_init + .type zbuf_init, %function +zbuf_init: + stp x29, x30, [sp, -48]! + adrp x0, .LANCHOR0 + add x29, sp, 0 + stp x19, x20, [sp, 16] + add x19, x0, :lo12:.LANCHOR0 + stp x21, x22, [sp, 32] + add x19, x19, 1304 + adrp x22, .LANCHOR3 + mov x20, x0 + add x22, x22, :lo12:.LANCHOR3 + mov w21, 0 +.L1666: + and w0, w21, 255 + strb w0, [x19, 1] + add w1, w0, 1 + ldrb w0, [x22, 1946] + strb w1, [x19] + add w21, w21, 1 + strb wzr, [x19, 2] + add x19, x19, 64 + str xzr, [x19, -48] + lsl w0, w0, 9 + bl ftl_dma32_malloc + str x0, [x19, -56] + mov w0, 64 + bl ftl_dma32_malloc + str x0, [x19, -40] + cmp w21, 32 + bne .L1666 + add x0, x20, :lo12:.LANCHOR0 + mov w1, -1 + strb wzr, [x0, 3352] + strb w1, [x0, 3288] + strb w21, [x0, 3353] + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x29, x30, [sp], 48 + ret + .size zbuf_init, .-zbuf_init + .align 2 + .global gc_init + .type gc_init, %function +gc_init: + stp x29, x30, [sp, -48]! + mov w2, 2216 + mov w1, 0 + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x19, .LANCHOR3 + stp x21, x22, [sp, 32] + add x19, x19, :lo12:.LANCHOR3 + adrp x21, .LANCHOR5 + add x21, x21, :lo12:.LANCHOR5 + adrp x20, .LANCHOR0 + add x20, x20, :lo12:.LANCHOR0 + add x22, x20, 3416 + strb wzr, [x19, 1337] + strb wzr, [x21, 264] + mov x0, x22 + strh wzr, [x19, 1378] + str wzr, [x21, 268] + bl ftl_memset + ldrh w1, [x19, 1376] + mov w0, -1 + ldrb w3, [x19, 1321] + strh w0, [x20, 3416] + lsr w0, w1, 2 + lsr w2, w1, 1 + strh w0, [x20, 3452] + strh w0, [x20, 3402] + ldrh w0, [x19, 1338] + strh w2, [x20, 3454] + mul w2, w1, w3 + strh w1, [x20, 3400] + mov w1, 4 + and w2, w2, 65535 + strh w1, [x21, 272] + sub w4, w2, #32 + mul w0, w0, w3 + strh w4, [x20, 3404] + strh w2, [x20, 3406] + strh wzr, [x19, 1352] + lsl w0, w0, 2 + strh wzr, [x19, 1354] + strh wzr, [x19, 1356] + str xzr, [x20, 3424] + bl ftl_dma32_malloc + ldrb w1, [x19, 1321] + str x0, [x21, 280] + ldrh w0, [x19, 1338] + mul w0, w0, w1 + lsl w0, w0, 2 + bl ftl_dma32_malloc + ldrh w1, [x19, 1338] + str x0, [x21, 288] + ldrb w0, [x19, 1321] + mul w0, w1, w0 + bl ftl_dma32_malloc + str x0, [x19, 1328] + ldrb w1, [x19, 1321] + ldrh w0, [x19, 1338] + mul w0, w0, w1 + lsl w0, w0, 2 + bl ftl_dma32_malloc + ldrb w1, [x19, 1321] + str x0, [x19, 1312] + ldrh w0, [x19, 1338] + mul w0, w0, w1 + lsl w0, w0, 2 + bl ftl_dma32_malloc + str x0, [x21, 296] + ldrh w0, [x19, 1380] + ldp x21, x22, [sp, 32] + lsr w0, w0, 2 + strh w0, [x20, 3392] + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 48 + ret + .size gc_init, .-gc_init + .align 2 + .global rk_ftl_de_init + .type rk_ftl_de_init, %function +rk_ftl_de_init: + stp x29, x30, [sp, -16]! + mov w1, 0 + adrp x0, .LC139 + add x0, x0, :lo12:.LC139 + add x29, sp, 0 + bl printk + adrp x0, .LANCHOR5+232 + ldr x0, [x0, #:lo12:.LANCHOR5+232] + ldr x0, [x0, 80] + blr x0 + ldp x29, x30, [sp], 16 + ret + .size rk_ftl_de_init, .-rk_ftl_de_init + .align 2 + .global rk_ftl_cache_write_back + .type rk_ftl_cache_write_back, %function +rk_ftl_cache_write_back: + stp x29, x30, [sp, -16]! + adrp x0, .LANCHOR5+232 + add x29, sp, 0 + ldr x0, [x0, #:lo12:.LANCHOR5+232] + ldr x1, [x0, 64] + mov w0, 0 + blr x1 + ldp x29, x30, [sp], 16 + ret + .size rk_ftl_cache_write_back, .-rk_ftl_cache_write_back + .align 2 + .global rk_nand_suspend + .type rk_nand_suspend, %function +rk_nand_suspend: + stp x29, x30, [sp, -16]! + adrp x0, .LANCHOR5+232 + add x29, sp, 0 + ldr x0, [x0, #:lo12:.LANCHOR5+232] + ldr x0, [x0, 88] + blr x0 + ldp x29, x30, [sp], 16 + ret + .size rk_nand_suspend, .-rk_nand_suspend + .align 2 + .global rk_nand_resume + .type rk_nand_resume, %function +rk_nand_resume: + stp x29, x30, [sp, -16]! + adrp x0, .LANCHOR5+232 + add x29, sp, 0 + ldr x0, [x0, #:lo12:.LANCHOR5+232] + ldr x0, [x0, 96] + blr x0 + ldp x29, x30, [sp], 16 + ret + .size rk_nand_resume, .-rk_nand_resume + .align 2 + .global rk_ftl_get_capacity + .type rk_ftl_get_capacity, %function +rk_ftl_get_capacity: + stp x29, x30, [sp, -16]! + adrp x0, .LANCHOR5+232 + add x29, sp, 0 + ldr x0, [x0, #:lo12:.LANCHOR5+232] + ldr x1, [x0, 72] + mov w0, 0 + blr x1 + ldp x29, x30, [sp], 16 + ret + .size rk_ftl_get_capacity, .-rk_ftl_get_capacity + .align 2 + .global rk_nandc_get_irq_status + .type rk_nandc_get_irq_status, %function +rk_nandc_get_irq_status: + stp x29, x30, [sp, -16]! + adrp x1, .LANCHOR5+232 + add x29, sp, 0 + ldr x1, [x1, #:lo12:.LANCHOR5+232] + ldr x1, [x1, 120] + blr x1 + ldp x29, x30, [sp], 16 + ret + .size rk_nandc_get_irq_status, .-rk_nandc_get_irq_status + .align 2 + .global rknand_proc_ftlread + .type rknand_proc_ftlread, %function +rknand_proc_ftlread: + stp x29, x30, [sp, -16]! + adrp x1, .LANCHOR5+232 + add x29, sp, 0 + ldr x1, [x1, #:lo12:.LANCHOR5+232] + ldr x1, [x1, 128] + blr x1 + ldp x29, x30, [sp], 16 + ret + .size rknand_proc_ftlread, .-rknand_proc_ftlread + .align 2 + .global FtlRead + .type FtlRead, %function +FtlRead: + stp x29, x30, [sp, -16]! + adrp x4, .LANCHOR5+232 + and w0, w0, 255 + add x29, sp, 0 + ldr x4, [x4, #:lo12:.LANCHOR5+232] + ldr x4, [x4, 40] + blr x4 + ldp x29, x30, [sp], 16 + ret + .size FtlRead, .-FtlRead + .align 2 + .global FtlDiscard + .type FtlDiscard, %function +FtlDiscard: + stp x29, x30, [sp, -16]! + adrp x2, .LANCHOR5+232 + add x29, sp, 0 + ldr x2, [x2, #:lo12:.LANCHOR5+232] + ldr x2, [x2, 56] + blr x2 + ldp x29, x30, [sp], 16 + ret + .size FtlDiscard, .-FtlDiscard + .align 2 + .global rk_ftl_garbage_collect + .type rk_ftl_garbage_collect, %function +rk_ftl_garbage_collect: + stp x29, x30, [sp, -16]! + adrp x2, .LANCHOR5+232 + add x29, sp, 0 + ldr x2, [x2, #:lo12:.LANCHOR5+232] + ldr x2, [x2, 104] + blr x2 + ldp x29, x30, [sp], 16 + ret + .size rk_ftl_garbage_collect, .-rk_ftl_garbage_collect + .align 2 + .global ReadFlashInfo + .type ReadFlashInfo, %function +ReadFlashInfo: + stp x29, x30, [sp, -16]! + adrp x1, .LANCHOR5+232 + add x29, sp, 0 + ldr x1, [x1, #:lo12:.LANCHOR5+232] + ldr x1, [x1, 112] + blr x1 + ldp x29, x30, [sp], 16 + ret + .size ReadFlashInfo, .-ReadFlashInfo + .align 2 + .global rknand_print_hex + .type rknand_print_hex, %function +rknand_print_hex: + mul w6, w2, w3 + stp x29, x30, [sp, -16]! + mov x5, x1 + mov w4, w2 + add x29, sp, 0 + mov x1, x0 + mov w7, 0 + mov w3, 16 + mov w2, 0 + adrp x0, .LC140 + add x0, x0, :lo12:.LC140 + bl print_hex_dump + ldp x29, x30, [sp], 16 + ret + .size rknand_print_hex, .-rknand_print_hex + .align 2 + .global hynix_get_read_retry_default + .type hynix_get_read_retry_default, %function +hynix_get_read_retry_default: + stp x29, x30, [sp, -144]! + mov w4, -83 + mov w1, -82 + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x20, .LANCHOR0 + stp x23, x24, [sp, 48] + mov w23, w0 + add x0, x20, :lo12:.LANCHOR0 + stp x25, x26, [sp, 64] + stp x21, x22, [sp, 32] + cmp w23, 2 + stp x27, x28, [sp, 80] + ldr x26, [x0, 1048] + add x0, x26, 112 + str x0, [x29, 136] + mov w0, -84 + add x25, x26, 128 + strb w0, [x26, 128] + mov w0, -81 + strb w23, [x26, 112] + strb w4, [x26, 129] + strb w1, [x26, 130] + strb w0, [x26, 131] + bne .L1696 + mov w0, -89 + strb w0, [x26, 128] + adrp x0, .LANCHOR2+425 + mov w1, -9 + strb w1, [x0, #:lo12:.LANCHOR2+425] +.L1761: + mov w28, 7 + b .L1806 +.L1696: + cmp w23, 3 + bne .L1698 + mov x4, 0 +.L1699: + sub w0, w4, #80 + strb w0, [x25, x4] + add x4, x4, 1 + cmp x4, 8 + bne .L1699 + mov w28, w4 + mov w27, w4 +.L1697: + sub w0, w23, #1 + cmp w0, 1 + bhi .L1705 + add x20, x20, :lo12:.LANCHOR0 + adrp x21, .LANCHOR2 + add x21, x21, :lo12:.LANCHOR2 + add x23, x20, 1024 + add x21, x21, 408 + mov w26, 0 +.L1706: + ldrb w0, [x20, 1153] + cmp w0, w26 + bhi .L1712 +.L1713: + ldr x0, [x29, 136] + strb w27, [x0, 1] + strb w28, [x0, 2] + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 144 + ret +.L1698: + cmp w23, 4 + bne .L1700 + mov w5, -52 + strb w5, [x26, 128] + mov w5, -65 + strb w5, [x26, 129] + mov w5, -86 + strb w5, [x26, 130] + mov w5, -85 + mov w28, 8 + strb w5, [x26, 131] + mov w27, w28 + mov w5, -51 + strb w4, [x26, 133] + strb w5, [x26, 132] + strb w1, [x26, 134] + strb w0, [x26, 135] + b .L1697 +.L1700: + cmp w23, 5 + bne .L1701 + mov w0, 56 + strb w0, [x26, 128] + mov w0, 57 + strb w0, [x26, 129] + mov w0, 58 + mov w28, 8 + strb w0, [x26, 130] + mov w0, 59 + strb w0, [x26, 131] +.L1806: + mov w27, 4 + b .L1697 +.L1701: + cmp w23, 6 + bne .L1702 + mov w0, 14 + strb w0, [x26, 128] + mov w0, 15 + strb w0, [x26, 129] + mov w0, 16 + mov w28, 12 + strb w0, [x26, 130] + mov w0, 17 + strb w0, [x26, 131] + b .L1806 +.L1702: + cmp w23, 7 + bne .L1703 + mov x0, 0 +.L1704: + sub w1, w0, #80 + strb w1, [x25, x0] + add x0, x0, 1 + cmp x0, 8 + bne .L1704 + mov w0, -44 + mov w28, 12 + strb w0, [x26, 136] + mov w27, 10 + mov w0, -43 + strb w0, [x26, 137] + b .L1697 +.L1703: + cmp w23, 8 + bne .L1761 + mov w0, 6 + strb w0, [x26, 128] + mov w0, 7 + strb w0, [x26, 129] + mov w0, 9 + strb w23, [x26, 130] + strb w0, [x26, 131] + mov w28, 50 + mov w0, 10 + mov w27, 5 + strb w0, [x26, 132] + b .L1697 +.L1712: + add x0, x23, w26, sxtw + mov x1, 32 + mov w19, 160 + ldr x24, [x20, 1056] + mov x22, 0 + ldrb w0, [x0, 172] + umaddl x19, w19, w0, x1 + ldr x1, [x29, 136] + ubfiz x0, x0, 8, 8 + add x24, x24, x0 + add x19, x1, x19 + mov w1, 55 +.L1707: + str w1, [x24, 2056] + str w1, [x29, 132] + ldrb w0, [x25, x22] + str w0, [x24, 2052] + mov x0, 1000 + bl __const_udelay + ldr w0, [x24, 2048] + strb w0, [x19, x22] + add x22, x22, 1 + cmp w27, w22, uxtb + ldr w1, [x29, 132] + bhi .L1707 + mov x0, 0 +.L1710: + add x1, x0, 4 + add x2, x0, 28 + add w3, w0, 8 + add x1, x21, x1 + add x2, x21, x2 +.L1709: + ldrb w7, [x1], 4 + ldrb w6, [x19, x0] + cmp x2, x1 + add w6, w6, w7 + strb w6, [x19, w3, sxtw] + add w3, w3, 8 + bne .L1709 + add x0, x0, 1 + cmp x0, 4 + bne .L1710 + add w26, w26, 1 + strb wzr, [x19, 16] + strb wzr, [x19, 24] + and w26, w26, 255 + strb wzr, [x19, 32] + strb wzr, [x19, 40] + strb wzr, [x19, 48] + strb wzr, [x19, 41] + strb wzr, [x19, 49] + b .L1706 +.L1705: + sub w0, w23, #3 + cmp w0, 5 + bhi .L1713 + mul w0, w27, w28 + add x20, x20, :lo12:.LANCHOR0 + sub w25, w27, #1 + mov w21, 0 + and x25, x25, 255 + asr w24, w0, 1 + lsl w0, w0, 4 + str w0, [x29, 128] + lsl w0, w24, 1 + str w0, [x29, 132] + add x0, x20, 1024 + str x0, [x29, 120] + add x0, x25, 1 + str x0, [x29, 112] +.L1714: + ldrb w0, [x20, 1153] + cmp w0, w21 + bls .L1713 + ldr x0, [x29, 120] + mov w22, 160 + sub w25, w23, #5 + add x0, x0, w21, sxtw + ldrb w19, [x0, 172] + mov w0, w19 + bl zftl_flash_exit_slc_mode + mov x0, 32 + mov w1, 255 + str w1, [x29, 108] + nop // between mem op and mult-accumulate + umaddl x22, w22, w19, x0 + ldr x0, [x29, 136] + ubfiz x19, x19, 8, 8 + add x22, x0, x22 + ldr x0, [x20, 1056] + add x19, x0, x19 + str w1, [x19, 2056] + bl nandc_wait_flash_ready + cmp w23, 8 + ldr w1, [x29, 108] + bne .L1715 + mov w0, 120 + str w0, [x19, 2056] + str wzr, [x19, 2052] + mov w0, 23 + str wzr, [x19, 2052] + mov w1, 25 + str wzr, [x19, 2052] + add x22, x26, 144 + str w0, [x19, 2056] + mov w0, 4 + str w0, [x19, 2056] + str w1, [x19, 2056] + mov w1, 218 + str w1, [x19, 2056] + mov w1, 21 + str wzr, [x19, 2056] + str wzr, [x19, 2052] + str wzr, [x19, 2052] + str w1, [x19, 2052] +.L1809: + str w0, [x19, 2052] + mov w0, 48 + str wzr, [x19, 2052] + str w0, [x19, 2056] + bl nandc_wait_flash_ready + cmp w25, 1 + ccmp w23, 8, 4, hi + beq .L1762 + cmp w23, 7 + mov w0, 32 + mov w1, 2 + csel w1, w1, w0, ne +.L1722: + adrp x8, .LANCHOR5 + add x0, x8, :lo12:.LANCHOR5 + mov x7, 0 + ldr x0, [x0, 304] +.L1723: + ldr w9, [x19, 2048] + strb w9, [x0, x7] + add x7, x7, 1 + cmp w1, w7, uxtb + bhi .L1723 + cmp w23, 8 + bne .L1724 + mov w1, 0 +.L1726: + ldrb w7, [x0] + cmp w7, 50 + beq .L1725 + ldrb w7, [x0, 1] + cmp w7, 5 + beq .L1725 + add w1, w1, 1 + add x0, x0, 4 + and w1, w1, 255 + cmp w1, 8 + bne .L1726 +.L1727: + adrp x0, .LC141 + mov w1, 0 + add x0, x0, :lo12:.LC141 + bl printk +.L1729: + b .L1729 +.L1715: + mov w0, 54 + str w0, [x19, 2056] + cmp w23, 4 + bne .L1717 + mov w0, 64 + str w1, [x19, 2052] + str w0, [x19, 2048] + mov w0, 204 +.L1807: + str w0, [x19, 2052] + mov w0, 77 + b .L1808 +.L1717: + cmp w25, 1 + bhi .L1719 + ldrb w0, [x26, 128] + str w0, [x19, 2052] + mov w0, 82 +.L1808: + str w0, [x19, 2048] +.L1718: + mov w0, 22 + str w0, [x19, 2056] + mov w0, 23 + str w0, [x19, 2056] + mov w0, 4 + str w0, [x19, 2056] + mov w0, 25 + str w0, [x19, 2056] + str wzr, [x19, 2056] + cmp w23, 6 + str wzr, [x19, 2052] + str wzr, [x19, 2052] + bne .L1720 + mov w0, 31 + str w0, [x19, 2052] +.L1721: + mov w0, 2 + b .L1809 +.L1719: + cmp w23, 7 + bne .L1718 + mov w0, 174 + str w0, [x19, 2052] + str wzr, [x19, 2048] + mov w0, 176 + b .L1807 +.L1720: + str wzr, [x19, 2052] + b .L1721 +.L1762: + mov w1, 16 + b .L1722 +.L1725: + cmp w1, 6 + bhi .L1727 +.L1728: + add x0, x8, :lo12:.LANCHOR5 + ldr x10, [x0, 304] + mov x0, 0 +.L1738: + ldr w1, [x29, 128] + cmp w1, w0 + bgt .L1739 + add x0, x8, :lo12:.LANCHOR5 + mov w9, w24 + mov w7, 8 + ldr x11, [x0, 304] +.L1741: + mov w0, 0 +.L1740: + add w1, w0, w9 + add w0, w0, 1 + sbfiz x1, x1, 1, 32 + cmp w24, w0 + ldrh w12, [x11, x1] + mvn w12, w12 + strh w12, [x11, x1] + bgt .L1740 + ldr w0, [x29, 132] + subs w7, w7, #1 + add w9, w9, w0 + bne .L1741 + mov x7, 0 + mov w15, 1 +.L1747: + mov w1, 0 + mov w0, 0 +.L1746: + mov w13, w7 + lsl w14, w15, w0 + mov w9, 16 + mov w12, 0 +.L1744: + ldrh w16, [x11, w13, sxtw 1] + add w13, w13, w24 + bics wzr, w14, w16 + cinc w12, w12, eq + subs w9, w9, #1 + bne .L1744 + cmp w12, 8 + bls .L1745 + orr w1, w1, w14 + and w1, w1, 65535 +.L1745: + add w0, w0, 1 + cmp w0, 16 + bne .L1746 + strh w1, [x11, x7, lsl 1] + add x7, x7, 1 + cmp w24, w7 + bgt .L1747 + add x0, x8, :lo12:.LANCHOR5 + mov w7, 0 + ldr x1, [x0, 304] + mov x0, 0 +.L1750: + ldr w8, [x1, x0] + add x0, x0, 4 + cmp w8, 0 + cinc w7, w7, eq + cmp x0, 32 + bne .L1750 + cmp w7, 7 + ble .L1751 + mov w3, 1024 + mov w2, 1 + adrp x0, .LC142 + add x0, x0, :lo12:.LC142 + bl rknand_print_hex + adrp x0, .LC141 + mov w1, 0 + add x0, x0, :lo12:.LC141 + bl printk +.L1752: + b .L1752 +.L1724: + cmp w23, 7 + bne .L1730 + mov w1, 0 +.L1732: + ldrb w7, [x0] + cmp w7, 12 + beq .L1731 + ldrb w7, [x0, 1] + cmp w7, 10 + beq .L1731 + add w1, w1, 1 + add x0, x0, 4 + and w1, w1, 255 + cmp w1, 8 + bne .L1732 +.L1733: + adrp x0, .LC141 + mov w1, 0 + add x0, x0, :lo12:.LC141 + bl printk +.L1734: + b .L1734 +.L1731: + cmp w1, 6 + bls .L1728 + b .L1733 +.L1730: + cmp w23, 6 + bne .L1728 + mov x1, 0 +.L1735: + ldrb w7, [x0, x1] + cmp w7, 12 + beq .L1728 + add x7, x0, x1 + ldrb w7, [x7, 8] + cmp w7, 4 + beq .L1728 + add x1, x1, 1 + cmp x1, 8 + bne .L1735 + adrp x0, .LC141 + mov w1, 0 + add x0, x0, :lo12:.LC141 + bl printk +.L1737: + b .L1737 +.L1739: + ldr w1, [x19, 2048] + strb w1, [x10, x0] + add x0, x0, 1 + b .L1738 +.L1751: + cmp w23, 6 + beq .L1764 + cmp w23, 7 + beq .L1765 + cmp w23, 8 + mov w0, 5 + mov w1, 8 + csel w1, w1, w0, ne +.L1753: + mov w7, 0 +.L1754: + mov x0, 0 +.L1755: + add w8, w9, w0 + ldrb w11, [x10, x0] + add x0, x0, 1 + cmp w27, w0, uxtb + strb w11, [x22, w8, sxtw] + bhi .L1755 + ldr x0, [x29, 112] + add w7, w7, 1 + add w9, w9, w1 + cmp w28, w7 + add x10, x10, x0 + bgt .L1754 + mov w22, 255 + str w22, [x19, 2056] + bl nandc_wait_flash_ready + cmp w25, 1 + bhi .L1757 + mov w0, 54 + str w0, [x19, 2056] + ldrb w0, [x26, 128] + str w0, [x19, 2052] + str wzr, [x19, 2048] + mov w0, 22 + str w0, [x19, 2056] + mov w0, 48 + str wzr, [x19, 2056] + str wzr, [x19, 2052] + str wzr, [x19, 2052] + str w22, [x19, 2052] + str w22, [x19, 2052] + str w22, [x19, 2052] +.L1810: + str w0, [x19, 2056] + add w21, w21, 1 + and w21, w21, 255 + bl nandc_wait_flash_ready + b .L1714 +.L1764: + mov w1, 4 + b .L1753 +.L1765: + mov w1, 10 + b .L1753 +.L1757: + cmp w23, 8 + bne .L1759 + mov w0, 190 + b .L1810 +.L1759: + mov w0, 56 + b .L1810 + .size hynix_get_read_retry_default, .-hynix_get_read_retry_default + .align 2 + .global flash_get_read_retry_tbl + .type flash_get_read_retry_tbl, %function +flash_get_read_retry_tbl: + adrp x0, .LANCHOR2+27 + ldrb w0, [x0, #:lo12:.LANCHOR2+27] + sub w1, w0, #1 + and w1, w1, 255 + cmp w1, 7 + bhi .L1814 + stp x29, x30, [sp, -16]! + add x29, sp, 0 + bl hynix_get_read_retry_default + ldp x29, x30, [sp], 16 + ret +.L1814: + ret + .size flash_get_read_retry_tbl, .-flash_get_read_retry_tbl + .align 2 + .global nandc_xfer_done + .type nandc_xfer_done, %function +nandc_xfer_done: + stp x29, x30, [sp, -80]! + add x29, sp, 0 + stp x21, x22, [sp, 32] + adrp x21, .LANCHOR5 + add x0, x21, :lo12:.LANCHOR5 + stp x19, x20, [sp, 16] + stp x23, x24, [sp, 48] + adrp x20, .LANCHOR0 + strb wzr, [x0, 312] + add x0, x20, :lo12:.LANCHOR0 + ldrb w1, [x0, 1028] + cmp w1, 9 + bne .L1818 + ldr x22, [x0, 1056] + ldr w1, [x22, 16] + str w1, [x29, 64] + ldr w1, [x22, 48] + tbnz x1, 1, .L1819 + adrp x23, .LC145 + adrp x24, .LC146 + mov x19, x0 + add x23, x23, :lo12:.LC145 + add x24, x24, :lo12:.LC146 + mov w21, 0 +.L1820: + ldr w0, [x29, 64] + tbz x0, 20, .L1830 + add x19, x20, :lo12:.LANCHOR0 + add x19, x19, 1256 + ldr w0, [x19, 32] + cbz w0, .L1828 + ldr w1, [x29, 64] + mov w2, 1 + ldr w0, [x19, 24] + ubfx x1, x1, 22, 6 + lsl w1, w1, 10 + bl rknand_dma_unmap_single + ldr w1, [x29, 64] + mov w2, 1 + ubfx x1, x1, 22, 6 + b .L1865 +.L1819: + mov x19, x0 + mov w23, 0 +.L1821: + ldr w1, [x22, 64] + ldr w0, [x29, 64] + ubfx x1, x1, 16, 6 + ubfx x0, x0, 22, 6 + cmp w1, w0 + bge .L1823 + ldr x0, [x19, 1056] + ldr w0, [x0] + str w0, [x29, 72] + ldr w0, [x29, 72] + tbz x0, 13, .L1822 + ldr w0, [x29, 72] + tbz x0, 17, .L1822 + ldr w1, [x29, 72] + adrp x0, .LC143 + add x0, x0, :lo12:.LC143 + ubfx x1, x1, 17, 1 + bl printk +.L1823: + add x19, x20, :lo12:.LANCHOR0 + add x19, x19, 1256 + ldr w0, [x19, 32] + cbz w0, .L1828 + ldr w1, [x29, 64] + mov w2, 0 + ldr w0, [x19, 24] + ubfx x1, x1, 22, 6 + lsl w1, w1, 10 + bl rknand_dma_unmap_single + ldr w1, [x29, 64] + mov w2, 0 + ubfx x1, x1, 22, 6 +.L1865: + lsl w1, w1, 2 +.L1863: + ldr w0, [x19, 28] + bl rknand_dma_unmap_single +.L1828: + add x20, x20, :lo12:.LANCHOR0 + ldp x21, x22, [sp, 32] + str wzr, [x20, 1288] + ldp x23, x24, [sp, 48] + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 80 + ret +.L1822: + ldr w0, [x29, 64] + add w23, w23, 1 + ubfx x0, x0, 22, 6 + cmp w23, w0, lsl 12 + bne .L1824 + ldr w2, [x22, 64] + mov w1, w23 + ldr w3, [x29, 64] + adrp x0, .LC144 + add x21, x21, :lo12:.LANCHOR5 + add x0, x0, :lo12:.LC144 + ubfx x2, x2, 16, 5 + ubfx x3, x3, 22, 6 + bl printk + ldr w1, [x29, 72] + mov w0, 1 + strb w0, [x21, 312] + tbnz x1, 13, .L1823 + mov x0, 35160 + movk x0, 0x41, lsl 16 + bl __const_udelay + b .L1823 +.L1824: + mov x1, 10 + mov x0, 5 + bl usleep_range + b .L1821 +.L1830: + ldr x0, [x19, 1056] + add w21, w21, 1 + tst x21, 16777215 + ldr w0, [x0, 16] + str w0, [x29, 64] + bne .L1829 + ldr w2, [x29, 64] + mov w1, w21 + ldr w3, [x22, 64] + mov x0, x23 + ubfx x3, x3, 16, 6 + bl printk + ldr x1, [x19, 1056] + mov w3, 64 + mov w2, 4 + mov x0, x24 + bl rknand_print_hex +.L1829: + mov x1, 10 + mov x0, 5 + bl usleep_range + b .L1820 +.L1818: + ldr x21, [x0, 1056] + mov w22, 0 + mov x19, x0 + ldr w1, [x21, 8] + str w1, [x29, 64] + ldr w1, [x21, 16] + tbnz x1, 1, .L1832 + adrp x23, .LC145 + adrp x24, .LC146 + add x23, x23, :lo12:.LC145 + add x24, x24, :lo12:.LC146 +.L1833: + ldr w0, [x29, 64] + tbz x0, 20, .L1840 + add x19, x20, :lo12:.LANCHOR0 + add x19, x19, 1256 + ldr w0, [x19, 32] + cbz w0, .L1828 + ldr w1, [x29, 64] + mov w2, 1 + ldr w0, [x19, 24] + ubfx x1, x1, 22, 6 + lsl w1, w1, 10 + bl rknand_dma_unmap_single + ldr w1, [x29, 64] + mov w2, 1 + ubfx x1, x1, 22, 6 + b .L1864 +.L1832: + adrp x23, .LC144 + adrp x24, .LC146 + add x23, x23, :lo12:.LC144 + add x24, x24, :lo12:.LC146 +.L1834: + ldr w1, [x21, 28] + ldr w0, [x29, 64] + ubfx x1, x1, 16, 5 + ubfx x0, x0, 22, 6 + cmp w1, w0 + bge .L1836 + ldr x0, [x19, 1056] + ldr w0, [x0] + str w0, [x29, 72] + ldr w0, [x29, 72] + tbz x0, 13, .L1835 + ldr w0, [x29, 72] + tbz x0, 17, .L1835 + ldr w1, [x29, 72] + adrp x0, .LC147 + add x0, x0, :lo12:.LC147 + bl printk +.L1836: + add x19, x20, :lo12:.LANCHOR0 + add x19, x19, 1256 + ldr w0, [x19, 32] + cbz w0, .L1828 + ldr w1, [x29, 64] + mov w2, 0 + ldr w0, [x19, 24] + ubfx x1, x1, 22, 6 + lsl w1, w1, 10 + bl rknand_dma_unmap_single + ldr w1, [x29, 64] + mov w2, 0 + ubfx x1, x1, 22, 6 +.L1864: + lsl w1, w1, 7 + b .L1863 +.L1835: + add w22, w22, 1 + tst x22, 16777215 + bne .L1837 + ldr w2, [x21, 28] + mov w1, w22 + ldr w3, [x29, 64] + mov x0, x23 + ubfx x2, x2, 16, 5 + ubfx x3, x3, 22, 6 + bl printk + ldr x1, [x19, 1056] + mov w3, 64 + mov w2, 4 + mov x0, x24 + bl rknand_print_hex +.L1837: + mov x1, 10 + mov x0, 5 + bl usleep_range + b .L1834 +.L1840: + ldr x0, [x19, 1056] + add w22, w22, 1 + tst x22, 16777215 + ldr w0, [x0, 8] + str w0, [x29, 64] + bne .L1839 + ldr w2, [x29, 64] + mov w1, w22 + ldr w3, [x21, 28] + mov x0, x23 + ubfx x3, x3, 16, 5 + bl printk + ldr x1, [x19, 1056] + mov w3, 64 + mov w2, 4 + mov x0, x24 + bl rknand_print_hex +.L1839: + mov x1, 10 + mov x0, 5 + bl usleep_range + b .L1833 + .size nandc_xfer_done, .-nandc_xfer_done + .align 2 + .global nandc_xfer + .type nandc_xfer, %function +nandc_xfer: + stp x29, x30, [sp, -64]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + and w20, w2, 255 + stp x21, x22, [sp, 32] + mov x21, x3 + and w19, w1, 255 + mov x3, x4 + mov x2, x21 + mov w1, w20 + mov w0, w19 + mov x22, x4 + bl nandc_xfer_start + mov w0, w19 + bl nandc_xfer_done + cbnz w19, .L1885 + adrp x19, .LANCHOR0 + add x0, x19, :lo12:.LANCHOR0 + ldrb w1, [x0, 1028] + cmp w1, 9 + bne .L1868 + lsr w20, w20, 2 + ldr x5, [x0, 1056] + mov w3, 1 + mov w2, 0 + mov w0, 0 +.L1869: + cmp w2, w20 + bcc .L1873 + ldr w20, [x5] + cmp w3, 0 + mov w1, 512 + csel w0, w0, w1, eq + mov w1, 8192 + movk w1, 0x2, lsl 16 + and w1, w20, w1 + cmp w1, 139264 + bne .L1875 + mov w1, w20 + adrp x0, .LC148 + add x0, x0, :lo12:.LC148 + bl printk + add x0, x19, :lo12:.LANCHOR0 + orr w20, w20, 131072 + ldr x0, [x0, 1056] + str w20, [x0] + mov w0, -1 +.L1875: + tbz x20, 13, .L1876 + adrp x1, .LANCHOR5+312 + ldrb w1, [x1, #:lo12:.LANCHOR5+312] + cbz w1, .L1876 + add x19, x19, :lo12:.LANCHOR0 + mov w1, w20 + adrp x0, .LC149 + add x0, x0, :lo12:.LC149 + bl printk + ldr x0, [x19, 1056] + mov w1, 1 + str w1, [x0, 16] +.L1904: + mov w0, -1 +.L1867: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x29, x30, [sp], 64 + ret +.L1873: + uxtw x1, w2 + add x1, x1, 84 + ldr w1, [x5, x1, lsl 2] + str w1, [x29, 56] + ldr w1, [x29, 56] + ldr w4, [x29, 56] + ubfx x4, x4, 26, 1 + and w1, w4, w1, lsr 10 + and w3, w3, w1 + ldr w1, [x29, 56] + tbnz x1, 2, .L1887 + ldr w1, [x29, 56] + tbnz x1, 18, .L1887 + ldr w4, [x29, 56] + ldr w1, [x29, 56] + ubfx x4, x4, 3, 7 + ubfx x1, x1, 19, 7 + cmp w4, w1 + ldr w1, [x29, 56] + ble .L1871 + ubfx x1, x1, 3, 7 +.L1872: + cmp w0, w1 + csel w0, w0, w1, cs +.L1870: + add w2, w2, 1 + b .L1869 +.L1871: + ubfx x1, x1, 19, 7 + b .L1872 +.L1887: + mov w0, -1 + b .L1870 +.L1868: + ldrb w1, [x0, 1249] + lsr w5, w20, 1 + mov w4, 64 + mov w2, 1 + cmp w1, 25 + mov w1, 128 + mov w3, 0 + csel w4, w4, w1, cc + mov w1, 0 +.L1878: + add w6, w4, w1 + cmp w3, w5 + bcc .L1879 + add x0, x19, :lo12:.LANCHOR0 + lsr w20, w20, 2 + mov w3, 0 + ldr x4, [x0, 1056] + mov w0, 0 +.L1880: + cmp w3, w20 + bcc .L1884 + str wzr, [x4, 16] + mov w1, 8192 + movk w1, 0x2, lsl 16 + ldr w20, [x4] + and w1, w20, w1 + cmp w1, 139264 + bne .L1876 + add x19, x19, :lo12:.LANCHOR0 + mov w1, w20 + adrp x0, .LC150 + add x0, x0, :lo12:.LC150 + bl printk + orr w20, w20, 131072 + ldr x0, [x19, 1056] + str w20, [x0] + b .L1904 +.L1879: + ldr x7, [x0, 1256] + and x1, x1, 4294967292 + ldr w1, [x7, x1] + lsl w7, w3, 2 + add w3, w3, 1 + strb w1, [x22, x7] + lsr w7, w1, 8 + strb w7, [x22, w2, uxtw] + add w7, w2, 1 + lsr w8, w1, 16 + lsr w1, w1, 24 + strb w8, [x22, x7] + add w7, w2, 2 + add w2, w2, 4 + strb w1, [x22, x7] + mov w1, w6 + b .L1878 +.L1884: + uxtw x1, w3 + add x1, x1, 8 + ldr w1, [x4, x1, lsl 2] + str w1, [x29, 56] + ldr w1, [x29, 56] + tbnz x1, 2, .L1890 + ldr w1, [x29, 56] + tbnz x1, 15, .L1890 + ldr w2, [x29, 56] + ubfx x6, x2, 3, 5 + ldr w2, [x29, 56] + ldr w1, [x29, 56] + ubfx x2, x2, 27, 1 + ubfx x5, x1, 16, 5 + ldr w1, [x29, 56] + orr w2, w6, w2, lsl 5 + ubfx x1, x1, 29, 1 + orr w1, w5, w1, lsl 5 + cmp w2, w1 + ldr w1, [x29, 56] + bls .L1882 + ubfx x2, x1, 3, 5 + ldr w1, [x29, 56] + ubfx x1, x1, 27, 1 +.L1903: + orr w1, w2, w1, lsl 5 + cmp w0, w1 + csel w0, w0, w1, cs +.L1881: + add w3, w3, 1 + b .L1880 +.L1882: + ubfx x2, x1, 16, 5 + ldr w1, [x29, 56] + ubfx x1, x1, 29, 1 + b .L1903 +.L1890: + mov w0, -1 + b .L1881 +.L1876: + cmn w0, #1 + beq .L1867 + ldr w1, [x22] + cmn w1, #1 + bne .L1867 + ldr w1, [x22, 4] + cmn w1, #1 + bne .L1867 + ldr w1, [x21] + cmn w1, #1 + mov w1, 512 + csel w0, w0, w1, ne + b .L1867 +.L1885: + mov w0, 0 + b .L1867 + .size nandc_xfer, .-nandc_xfer + .align 2 + .global flash_read_page + .type flash_read_page, %function +flash_read_page: + stp x29, x30, [sp, -96]! + add x29, sp, 0 + stp x21, x22, [sp, 32] + adrp x21, .LANCHOR0 + str x27, [sp, 80] + add x27, x21, :lo12:.LANCHOR0 + and w22, w0, 255 + stp x19, x20, [sp, 16] + mov w19, 24 + stp x23, x24, [sp, 48] + ldrb w0, [x27, 1205] + ubfx x23, x1, 24, 2 + stp x25, x26, [sp, 64] + mov w24, w4 + sub w0, w19, w0 + mov w19, 1 + mov x25, x2 + mov x26, x3 + lsl w19, w19, w0 + sub w19, w19, #1 + and w19, w19, w1 + ldr x20, [x27, 1056] + bl nandc_wait_flash_ready + mov w0, w22 + bl nandc_cs + cbnz w23, .L1906 + mov w0, w22 + bl zftl_flash_enter_slc_mode +.L1907: + add x0, x21, :lo12:.LANCHOR0 + ldr x1, [x0, 1144] + ldrb w0, [x1, 7] + cmp w0, 1 + bne .L1909 + ldrb w0, [x1, 12] + cmp w0, 2 + bne .L1909 + sxtw x0, w22 + mov w2, 38 + add x0, x0, 8 + add x0, x20, x0, lsl 8 + str w2, [x0, 8] +.L1909: + ubfiz x0, x22, 8, 8 + add x20, x20, x0 + and w0, w19, 255 + str wzr, [x20, 2056] + str wzr, [x20, 2052] + str wzr, [x20, 2052] + str w0, [x20, 2052] + lsr w0, w19, 8 + str w0, [x20, 2052] + lsr w0, w19, 16 + str w0, [x20, 2052] + add x0, x21, :lo12:.LANCHOR0 + ldrb w0, [x0, 1204] + cbz w0, .L1910 + lsr w0, w19, 24 + str w0, [x20, 2052] +.L1910: + mov w0, 48 + str w0, [x20, 2056] + ldrb w0, [x1, 12] + cmp w0, 3 + bne .L1911 + cbz w23, .L1911 + add x21, x21, :lo12:.LANCHOR0 + ldrb w0, [x21, 1212] + cbnz w0, .L1911 + ldrb w0, [x21, 1213] + cbnz w0, .L1911 + add w19, w19, w19, lsl 1 + sub w0, w19, #1 + add w0, w0, w23 +.L1920: + bl nandc_set_seed + bl nandc_wait_flash_ready + mov w0, 5 + str w0, [x20, 2056] + str wzr, [x20, 2052] + mov w0, 224 + str wzr, [x20, 2052] + mov w2, w24 + str w0, [x20, 2056] + mov x4, x26 + mov x3, x25 + mov w1, 0 + mov w0, w22 + bl nandc_xfer + mov w2, w0 + bl nandc_de_cs.constprop.35 + mov w0, w2 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldr x27, [sp, 80] + ldp x29, x30, [sp], 96 + ret +.L1906: + ldr x0, [x27, 1144] + ldrb w0, [x0, 12] + cmp w0, 3 + bne .L1908 + ldrb w0, [x27, 1212] + cbnz w0, .L1908 + ldrb w0, [x27, 1213] + cbnz w0, .L1908 + sxtw x0, w22 + add x0, x0, 8 + add x0, x20, x0, lsl 8 + str w23, [x0, 8] + b .L1907 +.L1908: + mov w0, w22 + bl zftl_flash_exit_slc_mode + b .L1907 +.L1911: + mov w0, w19 + b .L1920 + .size flash_read_page, .-flash_read_page + .align 2 + .global micron_read_retrial + .type micron_read_retrial, %function +micron_read_retrial: + stp x29, x30, [sp, -128]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x19, .LANCHOR0 + add x19, x19, :lo12:.LANCHOR0 + stp x21, x22, [sp, 32] + stp x23, x24, [sp, 48] + and w20, w0, 255 + stp x25, x26, [sp, 64] + mov w24, w1 + stp x27, x28, [sp, 80] + mov x26, x3 + str x2, [x29, 112] + mov w22, 0 + ldrb w0, [x19, 1249] + add w0, w0, w0, lsl 1 + asr w1, w0, 2 + stp w4, w1, [x29, 120] + bl nandc_wait_flash_ready + ldr x19, [x19, 1056] + ubfiz x0, x20, 8, 8 + add x19, x19, x0 +.L1922: + adrp x23, .LANCHOR5 + add x23, x23, :lo12:.LANCHOR5 + mov x27, x23 + mov w21, 0 + mov w25, -1 + mov w0, w20 + bl zftl_flash_enter_slc_mode + mov w0, w20 + bl zftl_flash_exit_slc_mode +.L1923: + ldrb w0, [x23, 328] + cmp w21, w0 + bcc .L1928 +.L1927: + mov w0, 239 + str w0, [x19, 2056] + mov w0, 137 + str w0, [x19, 2052] + mov x0, 1000 + bl __const_udelay + str wzr, [x19, 2048] + str wzr, [x19, 2048] + str wzr, [x19, 2048] + ldr w0, [x29, 124] + str wzr, [x19, 2048] + cmp w25, w0 + bcc .L1929 + cmn w25, #1 + mov w0, 256 + csel w25, w25, w0, eq +.L1929: + cmn w25, #1 + cset w23, eq + cmp w25, 256 + cset w0, eq + orr w0, w23, w0 + cbz w0, .L1930 + mov w4, w25 + mov w3, w21 + mov w2, w24 + mov w1, w20 + adrp x0, .LC152 + add x0, x0, :lo12:.LC152 + bl printk + eor w0, w22, 1 + tst w23, w0 + beq .L1931 + mov w1, 3 + mov w0, w20 + mov w22, 1 + bl mt_auto_read_calibration_config + b .L1922 +.L1928: + mov w0, 239 + str w0, [x19, 2056] + mov w0, 137 + str w0, [x19, 2052] + add w28, w21, 1 + mov x0, 1000 + bl __const_udelay + str w28, [x19, 2048] + str wzr, [x19, 2048] + mov x3, x26 + ldr w4, [x29, 120] + mov w1, w24 + ldr x2, [x29, 112] + mov w0, w20 + str wzr, [x19, 2048] + str wzr, [x19, 2048] + bl flash_read_page + mov w6, w0 + adrp x0, .LANCHOR2 + ldr w0, [x0, #:lo12:.LANCHOR2] + tbz x0, 12, .L1924 + mov w4, w6 + str w6, [x29, 108] + mov w3, w25 + mov w2, w24 + mov w1, w21 + adrp x0, .LC151 + add x0, x0, :lo12:.LC151 + bl printk + ldr w6, [x29, 108] +.L1924: + cmn w6, #1 + beq .L1925 + ldr x0, [x27, 304] + cmn w25, #1 + str x0, [x29, 112] + csel w25, w25, w6, ne + ldr w0, [x29, 124] + ldr x26, [x27, 320] + cmp w6, w0 + bcc .L1934 +.L1925: + mov w21, w28 + b .L1923 +.L1934: + mov w25, w6 + b .L1927 +.L1931: + cbz w22, .L1932 + mov w0, w20 + mov w1, 0 + bl mt_auto_read_calibration_config + cmn w25, #1 + mov w0, 256 + csel w25, w25, w0, eq +.L1932: + bl nandc_wait_flash_ready + mov w0, w25 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 128 + ret +.L1930: + cbz w22, .L1932 + mov w1, 0 + mov w0, w20 + mov w25, 256 + bl mt_auto_read_calibration_config + b .L1932 + .size micron_read_retrial, .-micron_read_retrial + .align 2 + .global toshiba_3d_read_retrial + .type toshiba_3d_read_retrial, %function +toshiba_3d_read_retrial: + stp x29, x30, [sp, -144]! + add x29, sp, 0 + stp x21, x22, [sp, 32] + adrp x22, .LANCHOR0 + stp x23, x24, [sp, 48] + mov w24, w1 + stp x25, x26, [sp, 64] + and w23, w0, 255 + stp x27, x28, [sp, 80] + mov x26, x2 + stp x19, x20, [sp, 16] + mov x27, x3 + mov w28, w4 + bl nandc_wait_flash_ready + add x0, x22, :lo12:.LANCHOR0 + and x1, x23, 255 + add x21, x1, 8 + str x1, [x29, 120] + mov w2, 46 + mov w3, 56 + ldrb w1, [x0, 1136] + ubfx x19, x24, 24, 2 + ldr x25, [x0, 1056] + cmp w1, 36 + mov w1, 26 + csel w2, w3, w2, ne + str w2, [x29, 112] + mov w2, 10 + csel w1, w2, w1, ne + str w1, [x29, 128] + add x21, x25, x21, lsl 8 + cbnz w19, .L1952 + str x0, [x29, 136] + sxtw x0, w23 + add x0, x0, 8 + mov w19, -1 + add x0, x25, x0, lsl 8 + mov w20, 1 + str x0, [x29, 112] +.L1959: + ldr x0, [x29, 136] + ldrb w0, [x0, 1136] + cmp w0, 36 + bne .L1953 + mov w1, w20 + mov x0, x21 + mov w2, 0 + bl toshiba_tlc_set_rr_para + ldr x1, [x29, 112] + mov w0, 93 + str w0, [x1, 8] +.L1954: + mov w4, w28 + mov x3, x27 + mov x2, x26 + mov w1, w24 + mov w0, w23 + bl flash_read_page + mov w4, w0 + adrp x0, .LANCHOR2 + ldr w0, [x0, #:lo12:.LANCHOR2] + tbz x0, 4, .L1955 + mov w3, w4 + str w4, [x29, 108] + mov w2, w24 + mov w1, w20 + adrp x0, .LC153 + add x0, x0, :lo12:.LC153 + bl printk + ldr w4, [x29, 108] +.L1955: + cmn w4, #1 + beq .L1956 + adrp x0, .LANCHOR5 + add x0, x0, :lo12:.LANCHOR5 + cmn w19, #1 + csel w19, w19, w4, ne + ldr x26, [x0, 304] + ldr x27, [x0, 320] + ldr x0, [x29, 136] + ldrb w0, [x0, 1249] + add w0, w0, w0, lsl 1 + cmp w4, w0, lsr 2 + bcc .L1974 +.L1956: + ldr w0, [x29, 128] + add w20, w20, 1 + cmp w0, w20 + bne .L1959 +.L1958: + add x0, x22, :lo12:.LANCHOR0 + ldrb w0, [x0, 1136] + cmp w0, 36 + bne .L1960 + mov w2, 0 +.L1997: + mov w1, 0 + mov x0, x21 + bl toshiba_tlc_set_rr_para + b .L1961 +.L1953: + mov w1, w20 + mov x0, x21 + bl toshiba_3d_set_slc_rr_para + b .L1954 +.L1974: + mov w19, w4 + b .L1958 +.L1960: + mov w1, 0 + mov x0, x21 + bl toshiba_3d_set_slc_rr_para +.L1961: + add x0, x22, :lo12:.LANCHOR0 + ldrb w0, [x0, 1136] + cmp w0, 36 + bne .L1970 + ldr x0, [x29, 120] + add x25, x25, x0, lsl 8 + mov w0, 85 + str w0, [x25, 2056] + mov w0, 255 + str wzr, [x25, 2052] + str wzr, [x25, 2048] + str w0, [x25, 2056] +.L1970: + add x22, x22, :lo12:.LANCHOR0 + ldrb w0, [x22, 1249] + add w0, w0, w0, lsl 1 + cmp w19, w0, lsr 2 + bcc .L1971 + cmn w19, #1 + mov w0, 256 + csel w19, w19, w0, eq +.L1971: + cmp w19, 256 + ccmn w19, #1, 4, ne + bne .L1972 + adrp x0, .LC155 + mov w4, w19 + mov w3, w20 + mov w2, w24 + mov w1, w23 + add x0, x0, :lo12:.LC155 + bl printk +.L1972: + bl nandc_wait_flash_ready + mov w0, w19 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 144 + ret +.L1952: + str x0, [x29, 136] + sxtw x0, w23 + add x0, x0, 8 + mov w19, -1 + add x0, x25, x0, lsl 8 + mov w20, 1 + str x0, [x29, 128] +.L1968: + ldr x0, [x29, 136] + ldrb w0, [x0, 1136] + cmp w0, 36 + bne .L1962 + mov x0, x21 + mov w2, 1 + mov w1, w20 + bl toshiba_tlc_set_rr_para + mov w0, 93 +.L1996: + ldr x1, [x29, 128] + mov w4, w28 + mov x3, x27 + mov x2, x26 + str w0, [x1, 8] + mov w1, w24 + mov w0, w23 + bl flash_read_page + mov w4, w0 + adrp x0, .LANCHOR2 + ldr w0, [x0, #:lo12:.LANCHOR2] + tbz x0, 4, .L1964 + mov w3, w4 + str w4, [x29, 108] + mov w2, w24 + mov w1, w20 + adrp x0, .LC154 + add x0, x0, :lo12:.LC154 + bl printk + ldr w4, [x29, 108] +.L1964: + cmn w4, #1 + beq .L1965 + adrp x0, .LANCHOR5 + add x0, x0, :lo12:.LANCHOR5 + cmn w19, #1 + csel w19, w19, w4, ne + ldr x26, [x0, 304] + ldr x27, [x0, 320] + ldr x0, [x29, 136] + ldrb w0, [x0, 1249] + add w0, w0, w0, lsl 1 + cmp w4, w0, lsr 2 + bcc .L1975 +.L1965: + ldr w0, [x29, 112] + add w20, w20, 1 + cmp w0, w20 + bne .L1968 +.L1967: + add x0, x22, :lo12:.LANCHOR0 + ldrb w0, [x0, 1136] + cmp w0, 36 + bne .L1969 + mov w2, 1 + b .L1997 +.L1962: + mov x0, x21 + mov w1, w20 + bl toshiba_3d_set_tlc_rr_para + mov w0, 38 + b .L1996 +.L1975: + mov w19, w4 + b .L1967 +.L1969: + mov w1, 0 + mov x0, x21 + bl toshiba_3d_set_tlc_rr_para + b .L1961 + .size toshiba_3d_read_retrial, .-toshiba_3d_read_retrial + .align 2 + .global toshiba_read_retrial + .type toshiba_read_retrial, %function +toshiba_read_retrial: + stp x29, x30, [sp, -128]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + and w19, w0, 255 + stp x27, x28, [sp, 80] + mov x27, x2 + stp w4, w1, [x29, 120] + mov x28, x3 + stp x21, x22, [sp, 32] + adrp x20, .LANCHOR0 + stp x23, x24, [sp, 48] + stp x25, x26, [sp, 64] + bl nandc_wait_flash_ready + mov w0, w19 + bl zftl_flash_enter_slc_mode + mov w0, w19 + bl zftl_flash_exit_slc_mode + add x1, x20, :lo12:.LANCHOR0 + and x0, x19, 255 + add x22, x0, 8 + str x0, [x29, 112] + ldrb w0, [x1, 1136] + ldr x23, [x1, 1056] + sub w0, w0, #67 + and w0, w0, 255 + add x22, x23, x22, lsl 8 + cmp w0, 1 + bls .L2016 + ldrb w0, [x1, 1192] + cbz w0, .L2017 + mov w24, 1 + mov w0, 1 + bl nandc_set_if_mode +.L2000: + and x0, x19, 255 + mov w1, 92 + add x0, x23, x0, lsl 8 + str w1, [x0, 2056] + mov w1, 197 + str w1, [x0, 2056] +.L1999: + sxtw x0, w19 + mov w21, 1 + add x0, x0, 8 + mov w25, -1 + add x0, x23, x0, lsl 8 + str x0, [x29, 104] +.L2001: + adrp x0, .LANCHOR5 + add x0, x0, :lo12:.LANCHOR5 + ldrb w0, [x0, 328] + add w0, w0, 1 + cmp w21, w0 + bcc .L2010 + mov w26, w25 +.L2009: + add x0, x20, :lo12:.LANCHOR0 + mov w1, 0 + ldrb w0, [x0, 1136] + sub w0, w0, #67 + and w0, w0, 255 + cmp w0, 1 + mov x0, x22 + bhi .L2011 + bl sandisk_set_rr_para +.L2012: + sxtw x19, w19 + add x20, x20, :lo12:.LANCHOR0 + add x19, x19, 8 + mov w0, 255 + add x23, x23, x19, lsl 8 + str w0, [x23, 8] + ldrb w0, [x20, 1249] + add w0, w0, w0, lsl 1 + cmp w26, w0, lsr 2 + bcc .L2013 + cmn w26, #1 + mov w0, 256 + csel w26, w26, w0, eq +.L2013: + cmp w26, 256 + ccmn w26, #1, 4, ne + bne .L2014 + ldr w2, [x29, 124] + adrp x0, .LC155 + mov w4, w26 + mov w3, w21 + mov w1, w21 + add x0, x0, :lo12:.LC155 + bl printk +.L2014: + bl nandc_wait_flash_ready + cbz w24, .L1998 + mov w0, 4 + bl nandc_set_if_mode +.L1998: + mov w0, w26 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 128 + ret +.L2017: + mov w24, 0 + b .L2000 +.L2016: + mov w24, 0 + b .L1999 +.L2010: + add x0, x20, :lo12:.LANCHOR0 + mov w1, w21 + ldrb w0, [x0, 1136] + sub w0, w0, #67 + and w0, w0, 255 + cmp w0, 1 + mov x0, x22 + bhi .L2002 + bl sandisk_set_rr_para +.L2003: + add x0, x20, :lo12:.LANCHOR0 + ldrb w0, [x0, 1136] + cmp w0, 34 + bne .L2004 + adrp x0, .LANCHOR5 + add x0, x0, :lo12:.LANCHOR5 + ldrb w0, [x0, 328] + sub w0, w0, #3 + cmp w21, w0 + bne .L2004 + ldr x1, [x29, 104] + mov w0, 179 + str w0, [x1, 8] +.L2004: + ldr x0, [x29, 112] + mov w1, 38 + ldr w4, [x29, 120] + mov x3, x28 + mov x2, x27 + add x0, x23, x0, lsl 8 + str w1, [x0, 2056] + mov w1, 93 + str w1, [x0, 2056] + mov w0, w19 + ldr w1, [x29, 124] + bl flash_read_page + mov w26, w0 + cmn w0, #1 + beq .L2007 + cmn w25, #1 + csel w25, w25, w0, ne + adrp x0, .LANCHOR5 + add x0, x0, :lo12:.LANCHOR5 + ldr x27, [x0, 304] + ldr x28, [x0, 320] + add x0, x20, :lo12:.LANCHOR0 + ldrb w0, [x0, 1249] + add w0, w0, w0, lsl 1 + cmp w26, w0, lsr 2 + bcc .L2009 +.L2007: + add w21, w21, 1 + b .L2001 +.L2002: + bl toshiba_set_rr_para + b .L2003 +.L2011: + bl toshiba_set_rr_para + b .L2012 + .size toshiba_read_retrial, .-toshiba_read_retrial + .align 2 + .global ymtc_3d_read_retrial + .type ymtc_3d_read_retrial, %function +ymtc_3d_read_retrial: + stp x29, x30, [sp, -112]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + mov w19, -1 + stp x21, x22, [sp, 32] + adrp x22, .LANCHOR0 + stp x23, x24, [sp, 48] + mov w24, w1 + and w23, w0, 255 + stp x25, x26, [sp, 64] + stp x27, x28, [sp, 80] + mov x25, x2 + mov x26, x3 + mov w27, w4 + bl nandc_wait_flash_ready + ubfiz x28, x23, 8, 8 + mov w0, w23 + bl zftl_flash_enter_slc_mode + mov w0, w23 + bl zftl_flash_exit_slc_mode + add x1, x22, :lo12:.LANCHOR0 + add x0, x28, 2048 + adrp x5, .LANCHOR5 + mov w20, 1 + add x5, x5, :lo12:.LANCHOR5 + mov x21, x1 + ldr x28, [x1, 1056] + tst x24, 50331648 + add x28, x28, x0 + bne .L2040 +.L2035: + str x5, [x29, 104] + mov w1, w20 + mov x0, x28 + bl ymtc_3d_set_slc_rr_para + mov w4, w27 + mov x3, x26 + mov x2, x25 + mov w1, w24 + mov w0, w23 + bl flash_read_page + ldr x5, [x29, 104] + cmn w0, #1 + beq .L2032 + ldrb w1, [x21, 1249] + cmn w19, #1 + csel w19, w19, w0, ne + ldr x25, [x5, 304] + ldr x26, [x5, 320] + add w1, w1, w1, lsl 1 + cmp w0, w1, lsr 2 + bcc .L2043 +.L2032: + add w20, w20, 1 + cmp w20, 10 + bne .L2035 +.L2034: + mov w1, 0 + mov x0, x28 + bl ymtc_3d_set_slc_rr_para +.L2036: + add x22, x22, :lo12:.LANCHOR0 + ldrb w0, [x22, 1249] + add w0, w0, w0, lsl 1 + cmp w19, w0, lsr 2 + bcc .L2041 + cmn w19, #1 + mov w0, 256 + csel w19, w19, w0, eq +.L2041: + cmp w19, 256 + ccmn w19, #1, 4, ne + bne .L2042 + adrp x0, .LC156 + mov w4, w19 + mov w3, w20 + mov w2, w24 + mov w1, w20 + add x0, x0, :lo12:.LC156 + bl printk +.L2042: + bl nandc_wait_flash_ready + mov w0, w19 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 112 + ret +.L2043: + mov w19, w0 + b .L2034 +.L2040: + str x5, [x29, 104] + mov w1, w20 + mov x0, x28 + bl ymtc_3d_set_tlc_rr_para + mov w4, w27 + mov x3, x26 + mov x2, x25 + mov w1, w24 + mov w0, w23 + bl flash_read_page + ldr x5, [x29, 104] + cmn w0, #1 + beq .L2037 + ldrb w1, [x21, 1249] + cmn w19, #1 + csel w19, w19, w0, ne + ldr x25, [x5, 304] + ldr x26, [x5, 320] + add w1, w1, w1, lsl 1 + cmp w0, w1, lsr 2 + bcc .L2044 +.L2037: + add w20, w20, 1 + cmp w20, 51 + bne .L2040 +.L2039: + mov w1, 0 + mov x0, x28 + bl ymtc_3d_set_tlc_rr_para + b .L2036 +.L2044: + mov w19, w0 + b .L2039 + .size ymtc_3d_read_retrial, .-ymtc_3d_read_retrial + .align 2 + .global samsung_read_retrial + .type samsung_read_retrial, %function +samsung_read_retrial: + stp x29, x30, [sp, -112]! + add x29, sp, 0 + stp x21, x22, [sp, 32] + and w22, w0, 255 + mov w21, w1 + stp x23, x24, [sp, 48] + str w4, [x29, 108] + mov x23, x2 + mov x24, x3 + stp x19, x20, [sp, 16] + stp x25, x26, [sp, 64] + adrp x20, .LANCHOR0 + stp x27, x28, [sp, 80] + bl nandc_wait_flash_ready + mov w0, w22 + bl zftl_flash_enter_slc_mode + mov w0, w22 + bl zftl_flash_exit_slc_mode + add x0, x20, :lo12:.LANCHOR0 + tst x21, 50331648 + and x5, x22, 255 + adrp x7, .LANCHOR4 + ldr x0, [x0, 1056] + bne .L2060 + add x7, x7, :lo12:.LANCHOR4 + adrp x25, .LC157 + add x25, x25, :lo12:.LC157 + add x27, x0, x5, lsl 8 + mov x28, 0 + add x0, x7, 152 + mov w26, -1 + str x0, [x29, 96] +.L2065: + mov w0, 239 + str w0, [x27, 2056] + mov w0, 141 + str w0, [x27, 2052] + ldr x0, [x29, 96] + add w19, w28, 1 + add x0, x0, x28 + ldrsb w0, [x0, 1] + str w0, [x27, 2048] + str wzr, [x27, 2048] + str wzr, [x27, 2048] + str wzr, [x27, 2048] + bl nandc_wait_flash_ready + ldr w4, [x29, 108] + mov x3, x24 + mov x2, x23 + mov w1, w21 + mov w0, w22 + bl flash_read_page + mov w4, w0 + adrp x0, .LANCHOR2 + ldr w0, [x0, #:lo12:.LANCHOR2] + tbz x0, 4, .L2061 + mov w3, w4 + str w4, [x29, 104] + mov w2, w21 + mov w1, w19 + mov x0, x25 + bl printk + ldr w4, [x29, 104] +.L2061: + cmn w4, #1 + beq .L2062 + adrp x0, .LANCHOR5 + add x0, x0, :lo12:.LANCHOR5 + cmn w26, #1 + csel w26, w26, w4, ne + ldr x23, [x0, 304] + ldr x24, [x0, 320] + add x0, x20, :lo12:.LANCHOR0 + ldrb w0, [x0, 1249] + add w0, w0, w0, lsl 1 + cmp w4, w0, lsr 2 + bcc .L2074 +.L2062: + add x28, x28, 1 + cmp x28, 25 + bne .L2065 + mov w19, 26 +.L2064: + mov w0, 239 + str w0, [x27, 2056] + mov w0, 141 + str w0, [x27, 2052] + str wzr, [x27, 2048] + str wzr, [x27, 2048] + str wzr, [x27, 2048] + str wzr, [x27, 2048] +.L2096: + add x20, x20, :lo12:.LANCHOR0 + bl nandc_wait_flash_ready + ldrb w0, [x20, 1249] + add w0, w0, w0, lsl 1 + cmp w26, w0, lsr 2 + bcc .L2072 + cmn w26, #1 + mov w0, 256 + csel w26, w26, w0, eq +.L2072: + cmp w26, 256 + ccmn w26, #1, 4, ne + bne .L2073 + adrp x0, .LC159 + mov w4, w26 + mov w3, w19 + mov w2, w21 + mov w1, w19 + add x0, x0, :lo12:.LC159 + bl printk +.L2073: + bl nandc_wait_flash_ready + mov w0, w26 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 112 + ret +.L2074: + mov w26, w4 + b .L2064 +.L2060: + add x7, x7, :lo12:.LANCHOR4 + adrp x25, .LC158 + add x27, x7, 188 + add x28, x0, x5, lsl 8 + add x25, x25, :lo12:.LC158 + mov w26, -1 + mov w19, 1 +.L2071: + mov w0, 239 + str w0, [x28, 2056] + mov w0, 137 + str w0, [x28, 2052] + ldrb w0, [x27] + str w0, [x28, 2048] + ldrb w0, [x27, 1] + str w0, [x28, 2048] + ldrb w0, [x27, 2] + str w0, [x28, 2048] + ldrb w0, [x27, 3] + str w0, [x28, 2048] + bl nandc_wait_flash_ready + ldr w4, [x29, 108] + mov x3, x24 + mov x2, x23 + mov w1, w21 + mov w0, w22 + bl flash_read_page + mov w4, w0 + adrp x0, .LANCHOR2 + ldr w0, [x0, #:lo12:.LANCHOR2] + tbz x0, 4, .L2067 + mov w3, w4 + str w4, [x29, 96] + mov w2, w21 + mov w1, w19 + mov x0, x25 + bl printk + ldr w4, [x29, 96] +.L2067: + cmn w4, #1 + beq .L2068 + adrp x0, .LANCHOR5 + add x0, x0, :lo12:.LANCHOR5 + cmn w26, #1 + csel w26, w26, w4, ne + ldr x23, [x0, 304] + ldr x24, [x0, 320] + add x0, x20, :lo12:.LANCHOR0 + ldrb w0, [x0, 1249] + add w0, w0, w0, lsl 1 + cmp w4, w0, lsr 2 + bcc .L2075 +.L2068: + add w19, w19, 1 + add x27, x27, 4 + cmp w19, 26 + bne .L2071 +.L2070: + mov w0, 239 + str w0, [x28, 2056] + mov w0, 137 + str w0, [x28, 2052] + str wzr, [x28, 2048] + str wzr, [x28, 2048] + str wzr, [x28, 2048] + str wzr, [x28, 2048] + b .L2096 +.L2075: + mov w26, w4 + b .L2070 + .size samsung_read_retrial, .-samsung_read_retrial + .align 2 + .global hynix_read_retrial + .type hynix_read_retrial, %function +hynix_read_retrial: + stp x29, x30, [sp, -128]! + adrp x5, .LANCHOR0 + add x8, x5, :lo12:.LANCHOR0 + add x29, sp, 0 + stp x21, x22, [sp, 32] + mov w22, w1 + stp x25, x26, [sp, 64] + mov x25, x2 + stp x19, x20, [sp, 16] + mov x26, x3 + stp x23, x24, [sp, 48] + and x23, x0, 255 + stp x27, x28, [sp, 80] + mov w27, w4 + stp x5, x8, [x29, 112] + mov x21, x23 + ldr x28, [x8, 1048] + mov w19, -1 + add x28, x28, 112 + add x0, x28, x23 + ldrb w24, [x28, 2] + ldrb w20, [x0, 8] + bl nandc_wait_flash_ready + mov w0, w23 + bl zftl_flash_enter_slc_mode + mov w0, w23 + bl zftl_flash_exit_slc_mode + ldp x5, x8, [x29, 112] + adrp x7, .LANCHOR5 + add x7, x7, :lo12:.LANCHOR5 + mov w6, 0 +.L2098: + cmp w6, w24 + bcc .L2103 +.L2102: + add x1, x5, :lo12:.LANCHOR0 + add x23, x28, x23 + ldrb w0, [x1, 1249] + strb w20, [x23, 8] + add w0, w0, w0, lsl 1 + cmp w19, w0, lsr 2 + bcc .L2104 + cmn w19, #1 + mov w0, 256 + csel w19, w19, w0, eq +.L2104: + cmp w19, 256 + ccmn w19, #1, 4, ne + bne .L2105 + adrp x0, .LC160 + mov w4, w19 + mov w3, w6 + mov w2, w22 + mov w1, w6 + add x0, x0, :lo12:.LC160 + bl printk +.L2105: + bl nandc_wait_flash_ready + mov w0, w19 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 128 + ret +.L2103: + add w20, w20, 1 + stp x8, x7, [x29, 96] + and w20, w20, 255 + str x5, [x29, 112] + cmp w24, w20 + str w6, [x29, 120] + csel w20, w20, wzr, hi + mov w0, w21 + mov w1, w20 + bl hynix_set_rr_para + mov w4, w27 + mov x3, x26 + mov x2, x25 + mov w1, w22 + mov w0, w21 + bl flash_read_page + ldr w6, [x29, 120] + cmn w0, #1 + ldp x8, x7, [x29, 96] + ldr x5, [x29, 112] + beq .L2100 + ldrb w1, [x8, 1249] + cmn w19, #1 + csel w19, w19, w0, ne + ldr x25, [x7, 304] + ldr x26, [x7, 320] + add w1, w1, w1, lsl 1 + cmp w0, w1, lsr 2 + bcc .L2106 +.L2100: + add w6, w6, 1 + b .L2098 +.L2106: + mov w19, w0 + b .L2102 + .size hynix_read_retrial, .-hynix_read_retrial + .align 2 + .global flash_ddr_tuning_read + .type flash_ddr_tuning_read, %function +flash_ddr_tuning_read: + stp x29, x30, [sp, -128]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + and w20, w0, 255 + stp x21, x22, [sp, 32] + mov w22, w1 + stp x23, x24, [sp, 48] + mov x24, x2 + stp x25, x26, [sp, 64] + adrp x23, .LANCHOR5 + stp x27, x28, [sp, 80] + mov x25, x3 + str w4, [x29, 120] + add x23, x23, :lo12:.LANCHOR5 + bl nandc_get_ddr_para + mov w28, 0 + str w0, [x29, 116] + mov w26, 0 + adrp x0, .LC161 + mov w27, 0 + add x0, x0, :lo12:.LC161 + mov w19, 1024 + mov w21, -1 + mov w7, 6 + str wzr, [x29, 124] + str x0, [x29, 104] +.L2122: + mov w0, w7 + str w7, [x29, 112] + bl nandc_set_ddr_para + ldr w4, [x29, 120] + mov x3, x25 + mov x2, x24 + mov w1, w22 + mov w0, w20 + bl flash_read_page + mov w4, w0 + adrp x0, .LANCHOR2 + ldr w7, [x29, 112] + ldr w0, [x0, #:lo12:.LANCHOR2] + tbz x0, 4, .L2117 + ldr x0, [x29, 104] + mov w3, w4 + mov w1, w7 + str w4, [x29, 100] + str w7, [x29, 112] + mov w2, w22 + bl printk + ldr w4, [x29, 100] + ldr w7, [x29, 112] +.L2117: + add w0, w19, 1 + cmp w4, w0 + bhi .L2118 + adrp x0, .LANCHOR0+1249 + ldr x24, [x23, 304] + ldr x25, [x23, 320] + ldrb w0, [x0, #:lo12:.LANCHOR0+1249] + cmp w4, w0, lsr 2 + bcs .L2128 + add w27, w27, 1 + cmp w27, 7 + bls .L2128 + sub w28, w7, w27 + mov w19, w4 + mov w21, 0 +.L2120: + ldr w0, [x29, 124] + cmp w27, w26 + csel w28, w28, w0, cs +.L2121: + cbz w28, .L2123 + adrp x0, .LANCHOR0+1249 + mov w1, 3 + ldrb w0, [x0, #:lo12:.LANCHOR0+1249] + udiv w0, w0, w1 + cmp w0, w19 + bls .L2123 + mov w1, w28 + adrp x0, .LC162 + add x0, x0, :lo12:.LC162 + bl printk + mov w0, w28 +.L2142: + bl nandc_set_ddr_para + cbz w21, .L2116 + adrp x0, .LANCHOR0 + add x27, x0, :lo12:.LANCHOR0 + mov x23, x0 + ldrb w1, [x27, 1248] + tbz x1, 0, .L2116 + mov w2, w22 + mov w1, w20 + adrp x0, .LC163 + add x0, x0, :lo12:.LC163 + bl printk + mov w0, w20 + bl flash_reset + mov w0, 1 + bl flash_set_interface_mode + mov w0, 1 + bl nandc_set_if_mode + add x0, x27, w20, sxtw + mov w1, 2 + strb w1, [x0, 1208] + mov w0, w20 + bl zftl_flash_enter_slc_mode + ldr w4, [x29, 120] + mov x3, x25 + mov x2, x24 + mov w1, w22 + mov w0, w20 + bl flash_read_page + mov w19, w0 + mov w3, w0 + mov w2, w22 + mov w1, w20 + adrp x0, .LC164 + add x0, x0, :lo12:.LC164 + bl printk + ldrb w0, [x27, 1249] + cmp w19, w0 + bhi .L2130 + adrp x1, .LANCHOR5 + add x1, x1, :lo12:.LANCHOR5 + ldr w0, [x1, 332] + add w0, w0, 1 + str w0, [x1, 332] + cmp w0, 100 + bls .L2126 + strb wzr, [x27, 1192] +.L2116: + mov w0, w19 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 128 + ret +.L2118: + cmp w27, w26 + bls .L2129 + sub w0, w28, w27 + str w0, [x29, 124] + cmp w27, 7 + bhi .L2121 + mov w26, w27 +.L2129: + mov w27, 0 + b .L2119 +.L2128: + mov w28, w7 + mov w19, w4 + mov w21, 0 +.L2119: + add w7, w7, 2 + cmp w7, 50 + bne .L2122 + b .L2120 +.L2123: + ldrb w0, [x29, 116] + b .L2142 +.L2130: + mov w19, w21 +.L2126: + add x23, x23, :lo12:.LANCHOR0 + ldrb w0, [x23, 1248] + bl flash_set_interface_mode + ldrb w0, [x23, 1248] + bl nandc_set_if_mode + b .L2116 + .size flash_ddr_tuning_read, .-flash_ddr_tuning_read + .align 2 + .global flash_read_page_en + .type flash_read_page_en, %function +flash_read_page_en: + stp x29, x30, [sp, -80]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x20, .LANCHOR0 + stp x25, x26, [sp, 64] + and w25, w0, 255 + add x0, x20, :lo12:.LANCHOR0 + stp x23, x24, [sp, 48] + stp x21, x22, [sp, 32] + mov w19, w1 + mov x22, x2 + mov x23, x3 + ldrb w0, [x0, 1153] + mov w24, w4 + cmp w0, w25 + bhi .L2144 + adrp x1, .LANCHOR4 + add x1, x1, :lo12:.LANCHOR4 + add x1, x1, 288 + mov w2, 431 + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack +.L2144: + add x0, x20, :lo12:.LANCHOR0 + add x1, x0, w25, sxtw + ldrb w4, [x0, 1153] + ldrb w21, [x1, 1196] + cmp w25, w4 + bcc .L2145 + adrp x0, .LANCHOR2 + ldr w0, [x0, #:lo12:.LANCHOR2] + tbnz x0, 6, .L2146 +.L2170: + mov w0, -1 +.L2143: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x29, x30, [sp], 80 + ret +.L2146: + mov w3, w19 + mov w2, w25 + mov w1, w21 + adrp x0, .LC165 + add x0, x0, :lo12:.LC165 + bl printk + b .L2170 +.L2145: + tst x19, 50331648 + bne .L2148 + ldrb w1, [x20, #:lo12:.LANCHOR0] + cbz w1, .L2149 + ldrb w0, [x0, 1] + cbz w0, .L2148 +.L2149: + add x1, x20, :lo12:.LANCHOR0 + ldrh w2, [x1, 2] + udiv w0, w19, w2 + mul w0, w0, w2 + ldrb w2, [x1, 1] + sub w19, w19, w0 + cbz w2, .L2150 + add w19, w0, w19, lsl 1 +.L2148: + mov w4, w24 + mov x3, x23 + mov x2, x22 + mov w1, w19 + mov w0, w21 + bl flash_read_page + cmn w0, #1 + bne .L2143 + add x25, x20, :lo12:.LANCHOR0 + ldrb w26, [x25, 1252] + cbnz w26, .L2151 +.L2154: + adrp x0, .LANCHOR5+336 + ldr x5, [x0, #:lo12:.LANCHOR5+336] + cbnz x5, .L2152 +.L2153: + add x20, x20, :lo12:.LANCHOR0 + mov w3, -1 + mov w2, w19 + mov w1, 0 + adrp x0, .LC166 + add x0, x0, :lo12:.LC166 + ldrb w4, [x20, 1252] + bl printk + ldrb w0, [x20, 1192] + cbz w0, .L2170 + mov w4, w24 + mov x3, x23 + mov x2, x22 + mov w1, w19 + mov w0, w21 + bl flash_ddr_tuning_read + b .L2143 +.L2150: + add x1, x1, 4 + ldrh w19, [x1, w19, uxtw 1] + add w19, w19, w0 + b .L2148 +.L2151: + strb wzr, [x25, 1252] + mov w4, w24 + mov x3, x23 + mov x2, x22 + mov w1, w19 + mov w0, w21 + bl flash_read_page + strb w26, [x25, 1252] + cmn w0, #1 + beq .L2154 + b .L2143 +.L2152: + mov w4, w24 + mov x3, x23 + mov x2, x22 + mov w1, w19 + mov w0, w21 + blr x5 + cmn w0, #1 + bne .L2143 + b .L2153 + .size flash_read_page_en, .-flash_read_page_en + .align 2 + .global flash_get_last_written_page + .type flash_get_last_written_page, %function +flash_get_last_written_page: + stp x29, x30, [sp, -112]! + add x29, sp, 0 + stp x23, x24, [sp, 48] + and w23, w0, 255 + adrp x0, .LANCHOR5+172 + stp x19, x20, [sp, 16] + stp x27, x28, [sp, 80] + adrp x27, .LANCHOR2 + ldrh w19, [x0, #:lo12:.LANCHOR5+172] + add x0, x27, :lo12:.LANCHOR2 + stp x21, x22, [sp, 32] + and w21, w1, 65535 + stp x25, x26, [sp, 64] + sub w19, w19, #1 + sxth w19, w19 + mov x24, x2 + ldrh w26, [x0, 34] + mov x22, x3 + mov w25, w4 + mov w0, w23 + mul w26, w26, w21 + add w1, w19, w26 + bl flash_read_page_en + cmp w0, 512 + bne .L2172 + mov w28, 0 + mov w5, 2 +.L2173: + cmp w28, w19 + ble .L2176 +.L2172: + ldr w0, [x27, #:lo12:.LANCHOR2] + tbz x0, 12, .L2177 + ldr w3, [x22] + adrp x0, .LC167 + mov w2, w19 + mov w1, w21 + add x0, x0, :lo12:.LC167 + bl printk +.L2177: + mov w0, w19 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 112 + ret +.L2176: + add w20, w28, w19 + str w5, [x29, 108] + mov w4, w25 + mov x3, x22 + mov x2, x24 + mov w0, w23 + sdiv w20, w20, w5 + add w1, w26, w20, sxth + bl flash_read_page_en + ldr w5, [x29, 108] + cmp w0, 512 + bne .L2174 + sub w19, w20, #1 + sxth w19, w19 + b .L2173 +.L2174: + add w20, w20, 1 + sxth w28, w20 + b .L2173 + .size flash_get_last_written_page, .-flash_get_last_written_page + .align 2 + .global flash_get_last_written_page_ext + .type flash_get_last_written_page_ext, %function +flash_get_last_written_page_ext: + stp x29, x30, [sp, -16]! + adrp x4, .LANCHOR0+1205 + mov w5, 24 + mov w6, 1 + add x29, sp, 0 + ldrb w4, [x4, #:lo12:.LANCHOR0+1205] + and w0, w0, 65535 + sub w5, w5, w4 + adrp x4, .LANCHOR3+1304 + ldrh w4, [x4, #:lo12:.LANCHOR3+1304] + sub w5, w5, w4 + mov w4, w3 + mov x3, x2 + mov x2, x1 + lsl w6, w6, w5 + sub w6, w6, #1 + and w1, w6, w0 + asr w0, w0, w5 + bl flash_get_last_written_page + ldp x29, x30, [sp], 16 + ret + .size flash_get_last_written_page_ext, .-flash_get_last_written_page_ext + .align 2 + .global flash_ddr_para_scan + .type flash_ddr_para_scan, %function +flash_ddr_para_scan: + stp x29, x30, [sp, -64]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x19, .LANCHOR0 + stp x21, x22, [sp, 32] + add x21, x19, :lo12:.LANCHOR0 + stp x23, x24, [sp, 48] + and w23, w0, 255 + mov w24, w1 + mov w22, 1 + ldrb w0, [x21, 1248] + adrp x20, .LANCHOR5 + strb w22, [x21, 1192] + add x20, x20, :lo12:.LANCHOR5 + bl flash_set_interface_mode + ldrb w0, [x21, 1248] + bl nandc_set_if_mode + ldp x3, x2, [x20, 344] + mov w4, 4 + mov w1, w24 + mov w0, w23 + bl flash_ddr_tuning_read + ldp x3, x2, [x20, 344] + mov w4, 4 + mov w1, w24 + mov w0, w23 + bl flash_read_page + cmn w0, #1 + bne .L2185 + ldrb w0, [x21, 1248] + tbz x0, 0, .L2185 + mov w0, 1 + bl flash_set_interface_mode + mov w0, w22 + bl nandc_set_if_mode + strb wzr, [x21, 1192] +.L2186: + mov w0, 0 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x29, x30, [sp], 64 + ret +.L2185: + add x19, x19, :lo12:.LANCHOR0 + mov w0, 1 + strb w0, [x19, 1192] + b .L2186 + .size flash_ddr_para_scan, .-flash_ddr_para_scan + .align 2 + .global flash_prog_page + .type flash_prog_page, %function +flash_prog_page: + stp x29, x30, [sp, -96]! + add x29, sp, 0 + stp x21, x22, [sp, 32] + and w21, w0, 255 + str x27, [sp, 80] + adrp x27, .LANCHOR0 + add x0, x27, :lo12:.LANCHOR0 + stp x19, x20, [sp, 16] + stp x23, x24, [sp, 48] + mov w22, w1 + stp x25, x26, [sp, 64] + mov w20, 24 + mov x24, x2 + mov x25, x3 + ldrb w1, [x0, 1205] + and x19, x21, 255 + ldr x26, [x0, 1056] + add x23, x19, 8 + sub w1, w20, w1 + mov w20, 1 + lsl w20, w20, w1 + sub w20, w20, #1 + bl nandc_wait_flash_ready + and w20, w20, w22 + mov w0, w21 + bl hynix_reconfig_rr_para + mov w0, w21 + bl nandc_cs + add x23, x26, x23, lsl 8 + mov w0, w21 + tst x22, 50331648 + bne .L2192 + bl zftl_flash_enter_slc_mode +.L2193: + add x19, x26, x19, lsl 8 + mov w0, 128 + str w0, [x19, 2056] + and w0, w20, 255 + str wzr, [x19, 2052] + str wzr, [x19, 2052] + str w0, [x19, 2052] + lsr w0, w20, 8 + str w0, [x19, 2052] + lsr w0, w20, 16 + str w0, [x19, 2052] + add x0, x27, :lo12:.LANCHOR0 + ldrb w0, [x0, 1204] + cbz w0, .L2194 + lsr w0, w20, 24 + str w0, [x19, 2052] +.L2194: + mov w0, w20 + bl nandc_set_seed + adrp x0, .LANCHOR2+17 + mov x4, x25 + mov x3, x24 + mov w1, 1 + ldrb w2, [x0, #:lo12:.LANCHOR2+17] + mov w0, w21 + bl nandc_xfer + mov w0, 16 + str w0, [x19, 2056] + bl nandc_iqr_wait_flash_ready + bl nandc_wait_flash_ready + mov x0, x23 + bl flash_read_status + mov w3, w0 + bl nandc_de_cs.constprop.35 + and w2, w3, 4 + tbz x3, 2, .L2191 + mov w1, w22 + adrp x0, .LC168 + add x0, x0, :lo12:.LC168 + bl printk + mov w2, -1 +.L2191: + mov w0, w2 + ldr x27, [sp, 80] + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x29, x30, [sp], 96 + ret +.L2192: + bl zftl_flash_exit_slc_mode + b .L2193 + .size flash_prog_page, .-flash_prog_page + .align 2 + .global flash_test_blk + .type flash_test_blk, %function +flash_test_blk: + stp x29, x30, [sp, -48]! + mov w2, 32 + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x19, .LANCHOR5 + add x19, x19, :lo12:.LANCHOR5 + stp x21, x22, [sp, 32] + and w22, w0, 255 + and w20, w1, 65535 + mov w1, 165 + ldr x0, [x19, 304] + bl ftl_memset + ldr x0, [x19, 320] + mov w2, 8 + mov w1, 90 + bl ftl_memset + adrp x0, .LANCHOR0+2 + ldrh w0, [x0, #:lo12:.LANCHOR0+2] + mul w20, w0, w20 + mov w0, w22 + mov w1, w20 + bl flash_erase_block + cmn w0, #1 + bne .L2204 +.L2206: + mov w19, -1 +.L2205: + mov w1, w20 + mov w0, w22 + bl flash_erase_block + mov w0, w19 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x29, x30, [sp], 48 + ret +.L2204: + adrp x21, .LANCHOR2 + add x21, x21, :lo12:.LANCHOR2 + ldr x2, [x19, 304] + mov w1, w20 + ldr x3, [x19, 320] + mov w0, w22 + ldrb w4, [x21, 17] + add x21, x21, 8 + bl flash_prog_page + cmn w0, #1 + beq .L2206 + ldrb w4, [x21, 9] + mov w1, w20 + ldr x2, [x19, 304] + mov w0, w22 + ldr x3, [x19, 320] + bl flash_read_page_en + cmn w0, #1 + beq .L2206 + ldr x0, [x19, 304] + ldr w1, [x0] + mov w0, 42405 + movk w0, 0xa5a5, lsl 16 + cmp w1, w0 + bne .L2206 + ldr x0, [x19, 320] + ldr w1, [x0] + mov w0, 23130 + movk w0, 0x5a5a, lsl 16 + cmp w1, w0 + csetm w19, ne + b .L2205 + .size flash_test_blk, .-flash_test_blk + .align 2 + .global flash_start_one_pass_page_prog + .type flash_start_one_pass_page_prog, %function +flash_start_one_pass_page_prog: + stp x29, x30, [sp, -32]! + and w9, w0, 255 + and w8, w3, 255 + adrp x7, .LANCHOR0 + add x29, sp, 0 + add x0, x7, :lo12:.LANCHOR0 + stp x19, x20, [sp, 16] + and w20, w2, 255 + ldr x19, [x0, 1056] + mov w0, w8 + bl nandc_cs + cbz w9, .L2215 + sxtw x0, w8 + add x0, x0, 8 + add x0, x19, x0, lsl 8 + str w9, [x0, 8] +.L2215: + ubfiz x0, x8, 8, 8 + add x7, x7, :lo12:.LANCHOR0 + add x19, x19, x0 + mov w0, 128 + str w0, [x19, 2056] + and w0, w4, 255 + str wzr, [x19, 2052] + str wzr, [x19, 2052] + str w0, [x19, 2052] + lsr w0, w4, 8 + str w0, [x19, 2052] + lsr w0, w4, 16 + str w0, [x19, 2052] + ldrb w0, [x7, 1204] + cbz w0, .L2216 + lsr w0, w4, 24 + str w0, [x19, 2052] +.L2216: + mov w0, w4 + bl nandc_set_seed + adrp x0, .LANCHOR2+17 + mov x4, x6 + mov x3, x5 + mov w1, 1 + ldrb w2, [x0, #:lo12:.LANCHOR2+17] + mov w0, w8 + bl nandc_xfer + str w20, [x19, 2056] + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 32 + ret + .size flash_start_one_pass_page_prog, .-flash_start_one_pass_page_prog + .align 2 + .global flash_dual_page_prog + .type flash_dual_page_prog, %function +flash_dual_page_prog: + stp x29, x30, [sp, -96]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + and w20, w0, 255 + adrp x0, .LANCHOR0 + add x0, x0, :lo12:.LANCHOR0 + stp x21, x22, [sp, 32] + ubfiz x22, x20, 8, 8 + stp x23, x24, [sp, 48] + mov w19, 24 + stp x25, x26, [sp, 64] + mov x25, x2 + stp x27, x28, [sp, 80] + add x2, x22, 2048 + adrp x27, .LANCHOR2 + mov w21, w1 + ldr x22, [x0, 1056] + mov x26, x3 + ldrb w0, [x0, 1205] + mov x23, x4 + mov x24, x5 + ubfx x28, x21, 24, 2 + sub w0, w19, w0 + mov w19, 1 + add x22, x22, x2 + lsl w19, w19, w0 + ldr w0, [x27, #:lo12:.LANCHOR2] + sub w19, w19, #1 + and w19, w19, w1 + tbz x0, 4, .L2225 + adrp x0, .LC169 + mov w3, w6 + mov w2, w28 + add x0, x0, :lo12:.LC169 + bl printk +.L2225: + bl nandc_wait_flash_ready + mov w0, w20 + bl nandc_cs + mov w0, w20 + cbnz w28, .L2226 + bl zftl_flash_enter_slc_mode +.L2227: + mov x6, x26 + mov x5, x25 + mov w4, w19 + mov w3, w20 + mov w2, 16 + mov w1, 0 + mov w0, 0 + bl flash_start_one_pass_page_prog + bl nandc_wait_flash_ready + mov x6, x24 + mov x5, x23 + add w4, w19, 1 + mov w3, w20 + mov w2, 16 + mov w1, 0 + mov w0, 0 + bl flash_start_one_pass_page_prog + bl nandc_wait_flash_ready + mov x0, x22 + bl flash_read_status + mov w3, w0 + bl nandc_de_cs.constprop.35 + and w2, w3, 4 + tbz x3, 2, .L2224 + ldr w0, [x27, #:lo12:.LANCHOR2] + tbz x0, 12, .L2229 + adrp x0, .LC168 + mov w1, w21 + add x0, x0, :lo12:.LC168 + bl printk +.L2229: + mov w2, -1 +.L2224: + mov w0, w2 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 96 + ret +.L2226: + bl zftl_flash_exit_slc_mode + b .L2227 + .size flash_dual_page_prog, .-flash_dual_page_prog + .align 2 + .global ymtc_flash_tlc_page_prog + .type ymtc_flash_tlc_page_prog, %function +ymtc_flash_tlc_page_prog: + stp x29, x30, [sp, -80]! + add x29, sp, 0 + str x25, [sp, 64] + mov w25, w1 + adrp x1, .LANCHOR0 + add x1, x1, :lo12:.LANCHOR0 + stp x19, x20, [sp, 16] + and w20, w0, 255 + stp x21, x22, [sp, 32] + mov w19, 24 + stp x23, x24, [sp, 48] + ubfiz x24, x20, 8, 8 + add x0, x24, 2048 + mov x22, x2 + ldr x24, [x1, 1056] + mov x23, x3 + mov w21, 1 + add x24, x24, x0 + ldrb w0, [x1, 1205] + sub w19, w19, w0 + bl nandc_wait_flash_ready + lsl w19, w21, w19 + mov w0, w20 + sub w19, w19, #1 + bl nandc_cs + and w19, w19, w25 + mov w0, w20 + bl zftl_flash_exit_slc_mode + mov x6, x23 + mov x5, x22 + mov w4, w19 + mov w3, w20 + mov w1, w21 + mov w2, 26 + mov w0, 0 + bl flash_start_one_pass_page_prog + bl nandc_wait_flash_ready + mov x6, x23 + mov x5, x22 + add w4, w19, w21 + mov w3, w20 + mov w1, w21 + mov w2, 26 + mov w0, 0 + bl flash_start_one_pass_page_prog + bl nandc_wait_flash_ready + mov x6, x23 + mov x5, x22 + add w4, w19, 2 + mov w3, w20 + mov w1, w21 + mov w2, 16 + mov w0, 0 + bl flash_start_one_pass_page_prog + bl nandc_iqr_wait_flash_ready + bl nandc_wait_flash_ready + mov x0, x24 + bl flash_read_status + mov w3, w0 + bl nandc_de_cs.constprop.35 + and w2, w3, 4 + tbz x3, 2, .L2237 + adrp x0, .LANCHOR2 + ldr w0, [x0, #:lo12:.LANCHOR2] + tbz x0, 12, .L2239 + adrp x0, .LC170 + mov w1, w25 + add x0, x0, :lo12:.LC170 + bl printk +.L2239: + mov w2, -1 +.L2237: + mov w0, w2 + ldr x25, [sp, 64] + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x29, x30, [sp], 80 + ret + .size ymtc_flash_tlc_page_prog, .-ymtc_flash_tlc_page_prog + .section .text.unlikely + .align 2 + .type fw_flash_page_prog.constprop.29, %function +fw_flash_page_prog.constprop.29: + stp x29, x30, [sp, -64]! + adrp x4, .LANCHOR0 + add x4, x4, :lo12:.LANCHOR0 + add x29, sp, 0 + stp x21, x22, [sp, 32] + mov x21, x1 + str x23, [sp, 48] + mov x23, x2 + stp x19, x20, [sp, 16] + ldr x1, [x4, 1144] + ldrb w22, [x4, 1249] + ldrb w19, [x1, 9] + udiv w19, w0, w19 + ldrb w0, [x4, 1152] + bl nandc_bch_sel + adrp x0, .LANCHOR2 + add x0, x0, :lo12:.LANCHOR2 + ldrb w1, [x0, 15] + cmp w1, 9 + bne .L2245 + ldrb w1, [x4, 1154] + cbnz w1, .L2245 + add x0, x0, 8 + ldrb w0, [x0, 12] + cmp w0, 3 + bne .L2246 + mov x3, x23 + mov x2, x21 + mov w1, w19 + mov w0, 0 + bl ymtc_flash_tlc_page_prog +.L2249: + mov w4, w0 + mov w0, w22 + bl nandc_bch_sel + mov w0, w4 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldr x23, [sp, 48] + ldp x29, x30, [sp], 64 + ret +.L2246: + adrp x20, .LANCHOR5 + add x20, x20, :lo12:.LANCHOR5 + mov w2, 16384 + mov w1, 255 + ldr x0, [x20, 304] + bl ftl_memset + ldr x5, [x20, 304] + mov w6, 4 + mov x3, x23 + mov x2, x21 + mov w1, w19 + mov x4, x5 + mov w0, 0 + bl flash_dual_page_prog + b .L2249 +.L2245: + mov w4, 4 + mov x3, x23 + mov x2, x21 + mov w1, w19 + mov w0, 0 + bl flash_prog_page + b .L2249 + .size fw_flash_page_prog.constprop.29, .-fw_flash_page_prog.constprop.29 + .text + .align 2 + .global flash_start_tlc_page_prog + .type flash_start_tlc_page_prog, %function +flash_start_tlc_page_prog: + stp x29, x30, [sp, -80]! + add x29, sp, 0 + stp x21, x22, [sp, 32] + and w21, w1, 255 + stp x25, x26, [sp, 64] + and w25, w0, 255 + adrp x0, .LANCHOR0 + add x1, x0, :lo12:.LANCHOR0 + stp x19, x20, [sp, 16] + and w26, w3, 255 + stp x23, x24, [sp, 48] + and w22, w2, 255 + mov w20, w4 + mov x23, x5 + ldrb w1, [x1, 1153] + mov x24, x6 + mov x19, x0 + cmp w1, w26 + bhi .L2251 + adrp x1, .LANCHOR4 + add x1, x1, :lo12:.LANCHOR4 + add x1, x1, 312 + mov w2, 868 + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack +.L2251: + add x0, x19, :lo12:.LANCHOR0 + ldrb w1, [x0, 1153] + cmp w1, w26 + bls .L2250 + add x26, x0, w26, sxtw + ldr x19, [x0, 1056] + ldrb w5, [x26, 1196] + mov w0, w5 + bl nandc_cs + cbz w25, .L2253 + sxtw x0, w5 + add x0, x0, 8 + add x0, x19, x0, lsl 8 + str w25, [x0, 8] +.L2253: + ubfiz x0, x5, 8, 8 + add x19, x19, x0 + mov w0, 128 + str w21, [x19, 2056] + str w0, [x19, 2056] + and w0, w20, 255 + str wzr, [x19, 2052] + str wzr, [x19, 2052] + str w0, [x19, 2052] + lsr w0, w20, 8 + str w0, [x19, 2052] + lsr w0, w20, 16 + add w20, w20, w20, lsl 1 + str w0, [x19, 2052] + sub w0, w20, #1 + add w0, w0, w21 + bl nandc_set_seed + adrp x0, .LANCHOR2+17 + mov x4, x24 + mov x3, x23 + mov w1, 1 + ldrb w2, [x0, #:lo12:.LANCHOR2+17] + mov w0, w5 + bl nandc_xfer + str w22, [x19, 2056] + bl nandc_de_cs.constprop.35 +.L2250: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x29, x30, [sp], 80 + ret + .size flash_start_tlc_page_prog, .-flash_start_tlc_page_prog + .align 2 + .type queue_tlc_prog_cmd, %function +queue_tlc_prog_cmd: + stp x29, x30, [sp, -64]! + mov w3, 24 + add x29, sp, 0 + stp x19, x20, [sp, 16] + stp x21, x22, [sp, 32] + mov x21, x0 + stp x23, x24, [sp, 48] + adrp x22, .LANCHOR0 + mov w24, w1 + mov w23, 1 + ldr x7, [x0] + add x0, x22, :lo12:.LANCHOR0 + ldrb w1, [x0, 1205] + ldr w2, [x7, 40] + sub w3, w3, w1 + ldrb w0, [x0, 1213] + lsl w19, w23, w1 + sub w19, w19, #1 + lsl w20, w23, w3 + sub w20, w20, #1 + and w20, w20, w2 + lsr w2, w2, w3 + and w19, w19, w2 + and w19, w19, 255 + cbz w0, .L2259 + mov w0, w19 + bl zftl_flash_exit_slc_mode + ldr x0, [x21] + mov w4, w20 + mov w3, w19 + mov w1, w23 + mov w2, 26 + ldr x5, [x0, 8] + ldr x6, [x0, 24] + mov w0, 0 + bl flash_start_one_pass_page_prog + bl nandc_iqr_wait_flash_ready + bl nandc_wait_flash_ready + ldr x0, [x21, 8] + add w4, w20, w23 + mov w3, w19 + mov w1, w23 + mov w2, 26 + ldr x5, [x0, 8] + ldr x6, [x0, 24] + mov w0, 0 + bl flash_start_one_pass_page_prog + bl nandc_iqr_wait_flash_ready + bl nandc_wait_flash_ready + ldr x0, [x21, 16] + add w4, w20, 2 + mov w3, w19 + mov w2, 16 + mov w1, w23 + ldr x5, [x0, 8] + ldr x6, [x0, 24] + mov w0, 0 + bl flash_start_one_pass_page_prog +.L2260: + cbz w24, .L2258 + ldr x1, [x21] + mov w0, 4 + strb w0, [x1, 58] + mov w0, 1 + strb w0, [x1, 59] + mov w0, -1 + strb w0, [x1] + add x0, x22, :lo12:.LANCHOR0 + add x0, x0, 3354 + bl buf_add_tail +.L2258: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x29, x30, [sp], 64 + ret +.L2259: + ldr x5, [x7, 8] + mov w4, w20 + ldr x6, [x7, 24] + mov w3, w19 + ldrb w0, [x7, 60] + mov w1, w23 + mov w2, 26 + bl flash_start_tlc_page_prog + bl nandc_iqr_wait_flash_ready + bl nandc_wait_flash_ready + ldp x7, x0, [x21] + mov w4, w20 + mov w3, w19 + mov w2, 26 + mov w1, 2 + ldr x5, [x0, 8] + ldr x6, [x0, 24] + ldrb w0, [x7, 60] + bl flash_start_tlc_page_prog + bl nandc_iqr_wait_flash_ready + bl nandc_wait_flash_ready + ldr x0, [x21, 16] + mov w4, w20 + ldr x7, [x21] + mov w3, w19 + mov w2, 16 + mov w1, 3 + ldr x5, [x0, 8] + ldr x6, [x0, 24] + ldrb w0, [x7, 60] + bl flash_start_tlc_page_prog + b .L2260 + .size queue_tlc_prog_cmd, .-queue_tlc_prog_cmd + .align 2 + .global sblk_3d_tlc_dump_prog + .type sblk_3d_tlc_dump_prog, %function +sblk_3d_tlc_dump_prog: + stp x29, x30, [sp, -48]! + adrp x1, .LANCHOR0 + add x1, x1, :lo12:.LANCHOR0 + mov w3, 24 + add x29, sp, 0 + stp x19, x20, [sp, 16] + mov x20, x0 + stp x21, x22, [sp, 32] + mov w22, 1 + ldr w2, [x0, 40] + ldrb w0, [x1, 1205] + sub w3, w3, w0 + lsl w19, w22, w0 + ldrb w0, [x1, 1213] + lsl w21, w22, w3 + sub w19, w19, #1 + sub w21, w21, #1 + and w21, w21, w2 + lsr w2, w2, w3 + and w19, w19, w2 + and w19, w19, 255 + cbz w0, .L2267 + mov w0, w19 + bl zftl_flash_exit_slc_mode + ldr x5, [x20, 8] + mov w4, w21 + ldr x6, [x20, 24] + mov w3, w19 + mov w1, w22 + mov w2, 26 + mov w0, 0 + bl flash_start_one_pass_page_prog + bl nandc_iqr_wait_flash_ready + bl nandc_wait_flash_ready + ldr x5, [x20, 8] + add w4, w21, w22 + ldr x6, [x20, 24] + mov w3, w19 + mov w1, w22 + mov w2, 26 + mov w0, 0 + bl flash_start_one_pass_page_prog + bl nandc_iqr_wait_flash_ready + bl nandc_wait_flash_ready + ldr x5, [x20, 8] + add w4, w21, 2 + ldr x6, [x20, 24] + mov w3, w19 + mov w2, 16 + mov w1, w22 + mov w0, 0 + bl flash_start_one_pass_page_prog +.L2268: + bl nandc_iqr_wait_flash_ready + bl nandc_wait_flash_ready + ldr w0, [x20, 40] + mov w1, 64 + bl flash_wait_device_ready + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x29, x30, [sp], 48 + ret +.L2267: + ldr x5, [x20, 8] + mov w4, w21 + ldr x6, [x20, 24] + mov w3, w19 + mov w1, w22 + mov w2, 26 + mov w0, 0 + bl flash_start_tlc_page_prog + bl nandc_iqr_wait_flash_ready + bl nandc_wait_flash_ready + ldr x5, [x20, 8] + mov w4, w21 + ldr x6, [x20, 24] + mov w3, w19 + mov w2, 26 + mov w1, 2 + mov w0, 0 + bl flash_start_tlc_page_prog + bl nandc_iqr_wait_flash_ready + bl nandc_wait_flash_ready + ldr x5, [x20, 8] + mov w4, w21 + ldr x6, [x20, 24] + mov w3, w19 + mov w2, 16 + mov w1, 3 + mov w0, 0 + bl flash_start_tlc_page_prog + b .L2268 + .size sblk_3d_tlc_dump_prog, .-sblk_3d_tlc_dump_prog + .align 2 + .global flash_start_3d_mlc_page_prog + .type flash_start_3d_mlc_page_prog, %function +flash_start_3d_mlc_page_prog: + stp x29, x30, [sp, -64]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + and w20, w1, 255 + stp x21, x22, [sp, 32] + and w21, w0, 255 + adrp x0, .LANCHOR0 + add x1, x0, :lo12:.LANCHOR0 + stp x23, x24, [sp, 48] + mov x22, x3 + mov w24, w2 + mov x23, x4 + ldrb w1, [x1, 1153] + mov x19, x0 + cmp w1, w20 + bhi .L2271 + adrp x1, .LANCHOR4 + add x1, x1, :lo12:.LANCHOR4 + add x1, x1, 344 + mov w2, 903 + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack +.L2271: + add x0, x19, :lo12:.LANCHOR0 + ldrb w1, [x0, 1153] + cmp w1, w20 + bls .L2270 + add x20, x0, w20, sxtw + ldr x19, [x0, 1056] + ldrb w5, [x20, 1196] + mov w0, w5 + bl nandc_cs + ubfiz x0, x5, 8, 8 + add x19, x19, x0 + mov w0, 128 + str w0, [x19, 2056] + and w0, w24, 255 + str wzr, [x19, 2052] + str wzr, [x19, 2052] + str w0, [x19, 2052] + lsr w0, w24, 8 + str w0, [x19, 2052] + lsr w0, w24, 16 + str w0, [x19, 2052] + mov w0, w24 + bl nandc_set_seed + adrp x0, .LANCHOR2+17 + mov x4, x23 + mov x3, x22 + mov w1, 1 + ldrb w2, [x0, #:lo12:.LANCHOR2+17] + mov w0, w5 + bl nandc_xfer + str w21, [x19, 2056] +.L2270: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x29, x30, [sp], 64 + ret + .size flash_start_3d_mlc_page_prog, .-flash_start_3d_mlc_page_prog + .align 2 + .global sblk_mlc_dump_prog + .type sblk_mlc_dump_prog, %function +sblk_mlc_dump_prog: + stp x29, x30, [sp, -48]! + mov w2, 24 + add x29, sp, 0 + stp x19, x20, [sp, 16] + mov x20, x0 + str x21, [sp, 32] + ldr w1, [x0, 40] + adrp x0, .LANCHOR0+1205 + ldrb w19, [x0, #:lo12:.LANCHOR0+1205] + mov w0, 1 + sub w2, w2, w19 + lsl w19, w0, w19 + sub w19, w19, #1 + lsl w21, w0, w2 + sub w21, w21, #1 + and w21, w21, w1 + lsr w1, w1, w2 + and w19, w19, w1 + and w19, w19, 255 + mov w0, w19 + bl zftl_flash_exit_slc_mode + adrp x0, .LANCHOR2 + ldr w0, [x0, #:lo12:.LANCHOR2] + tbz x0, 12, .L2275 + ldr w2, [x20, 40] + adrp x0, .LC171 + mov w1, w21 + add x0, x0, :lo12:.LC171 + add w3, w2, 1 + bl printk +.L2275: + ldr x3, [x20, 8] + mov w2, w21 + ldr x4, [x20, 24] + mov w1, w19 + mov w0, 16 + bl flash_start_3d_mlc_page_prog + bl nandc_iqr_wait_flash_ready + bl nandc_wait_flash_ready + ldr x3, [x20, 8] + add w2, w21, 1 + ldr x4, [x20, 24] + mov w1, w19 + mov w0, 16 + bl flash_start_3d_mlc_page_prog + bl nandc_iqr_wait_flash_ready + bl nandc_wait_flash_ready + ldr w0, [x20, 40] + mov w1, 64 + bl flash_wait_device_ready + mov w2, w0 + bl nandc_de_cs.constprop.35 + mov w0, w2 + ldp x19, x20, [sp, 16] + ldr x21, [sp, 32] + ldp x29, x30, [sp], 48 + ret + .size sblk_mlc_dump_prog, .-sblk_mlc_dump_prog + .align 2 + .global flash_start_page_prog + .type flash_start_page_prog, %function +flash_start_page_prog: + stp x29, x30, [sp, -96]! + add x29, sp, 0 + stp x21, x22, [sp, 32] + and w21, w0, 255 + stp x25, x26, [sp, 64] + adrp x26, .LANCHOR0 + add x0, x26, :lo12:.LANCHOR0 + stp x19, x20, [sp, 16] + stp x23, x24, [sp, 48] + mov w24, w1 + str x27, [sp, 80] + mov w19, 24 + mov w20, 1 + mov x22, x2 + ldrb w1, [x0, 1205] + mov x23, x3 + ldrb w0, [x0, 1153] + sub w25, w19, w1 + lsl w20, w20, w1 + sub w20, w20, #1 + lsr w1, w24, w25 + and w20, w20, w1 + and w20, w20, 255 + cmp w0, w20 + bhi .L2281 + adrp x1, .LANCHOR4 + add x1, x1, :lo12:.LANCHOR4 + add x1, x1, 376 + mov w2, 956 + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack +.L2281: + add x1, x26, :lo12:.LANCHOR0 + ldrb w0, [x1, 1153] + cmp w0, w20 + bls .L2280 + add x0, x1, w20, sxtw + mov w19, 1 + lsl w19, w19, w25 + sub w19, w19, #1 + and w19, w19, w24 + ldr x25, [x1, 1056] + ldrb w27, [x0, 1196] + bl nandc_rdy_status + cbnz w0, .L2283 + ldrb w0, [x1, 1153] + cmp w0, 1 + bne .L2284 + bl nandc_wait_flash_ready +.L2283: + mov w0, w27 + bl hynix_reconfig_rr_para + mov w0, w27 + bl nandc_cs + tst x24, 50331648 + bne .L2285 + mov w0, w19 + bl slc_phy_page_address_calc + mov w19, w0 + ldrb w0, [x26, #:lo12:.LANCHOR0] + cbz w0, .L2286 + mov w0, w27 + bl zftl_flash_enter_slc_mode +.L2286: + ubfiz x20, x27, 8, 8 + mov w0, 128 + add x20, x25, x20 + add x26, x26, :lo12:.LANCHOR0 + str w0, [x20, 2056] + and w0, w19, 255 + str wzr, [x20, 2052] + str wzr, [x20, 2052] + str w0, [x20, 2052] + lsr w0, w19, 8 + str w0, [x20, 2052] + lsr w0, w19, 16 + str w0, [x20, 2052] + ldrb w0, [x26, 1204] + cbz w0, .L2287 + lsr w0, w19, 24 + str w0, [x20, 2052] +.L2287: + mov w0, w19 + bl nandc_set_seed + adrp x0, .LANCHOR2+17 + mov x4, x23 + mov x3, x22 + mov w1, 1 + ldrb w2, [x0, #:lo12:.LANCHOR2+17] + mov w0, w27 + bl nandc_xfer + str w21, [x20, 2056] + bl nandc_de_cs.constprop.35 +.L2280: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldr x27, [sp, 80] + ldp x29, x30, [sp], 96 + ret +.L2284: + mov w2, 64 + mov w1, w19 + mov w0, w20 + bl flash_wait_device_ready_raw + b .L2283 +.L2285: + mov w0, w27 + bl zftl_flash_exit_slc_mode + b .L2286 + .size flash_start_page_prog, .-flash_start_page_prog + .align 2 + .type queue_prog_cmd, %function +queue_prog_cmd: + stp x29, x30, [sp, -32]! + add x29, sp, 0 + str x19, [sp, 16] + mov x19, x0 + ldr w1, [x0, 40] + ldr x3, [x0, 24] + ldr x2, [x0, 8] + mov w0, 16 + bl flash_start_page_prog + adrp x0, .LANCHOR0 + add x3, x0, :lo12:.LANCHOR0 + ldr w4, [x19, 40] + ldrb w1, [x3, 3354] + cmp w1, 255 + beq .L2296 + ldrb w5, [x3, 1205] + mov w2, 1 + mov w6, 24 + add x3, x3, 1304 + sub w6, w6, w5 + lsl w2, w2, w5 + sub w2, w2, #1 + and w2, w2, 65535 + asr w4, w4, w6 + and w4, w4, w2 +.L2298: + add x7, x3, x1, lsl 6 + ldr w5, [x7, 40] + lsr w5, w5, w6 + and w5, w2, w5 + cmp w4, w5 + bne .L2297 + ldrb w5, [x7, 58] + cmp w5, 7 + bne .L2297 + mov w1, 3 + strb w1, [x7, 58] +.L2296: + mov w1, 3 + strb w1, [x19, 58] + mov w1, 1 + strb w1, [x19, 59] + mov w1, -1 + strb w1, [x19] + add x0, x0, :lo12:.LANCHOR0 + mov x1, x19 + add x0, x0, 3354 + bl buf_add_tail + ldr x19, [sp, 16] + ldp x29, x30, [sp], 32 + ret +.L2297: + lsl x1, x1, 6 + ldrb w1, [x3, x1] + cmp w1, 255 + bne .L2298 + b .L2296 + .size queue_prog_cmd, .-queue_prog_cmd + .align 2 + .global flash_complete_plane_page_read + .type flash_complete_plane_page_read, %function +flash_complete_plane_page_read: + stp x29, x30, [sp, -64]! + mov w4, 24 + add x29, sp, 0 + stp x21, x22, [sp, 32] + adrp x22, .LANCHOR0 + stp x23, x24, [sp, 48] + mov w24, w0 + add x0, x22, :lo12:.LANCHOR0 + stp x19, x20, [sp, 16] + mov x20, x1 + mov w19, 1 + mov x21, x2 + ldrb w1, [x0, 1205] + ldrb w0, [x0, 1153] + sub w23, w4, w1 + lsl w19, w19, w1 + sub w19, w19, #1 + lsr w1, w24, w23 + and w19, w19, w1 + and w19, w19, 255 + cmp w0, w19 + bhi .L2305 + adrp x1, .LANCHOR4 + add x1, x1, :lo12:.LANCHOR4 + add x1, x1, 400 + mov w2, 1070 + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack +.L2305: + add x2, x22, :lo12:.LANCHOR0 + ldrb w0, [x2, 1153] + cmp w0, w19 + bls .L2316 + add x19, x2, w19, sxtw + mov w4, 1 + lsl w4, w4, w23 + ldr x7, [x2, 1056] + sub w4, w4, #1 + ldrb w9, [x19, 1196] + and w4, w4, w24 + ubfx x24, x24, 24, 2 + mov w0, w9 + bl nandc_cs + cbnz w24, .L2307 + mov w0, w4 + bl slc_phy_page_address_calc + mov w4, w0 +.L2307: + add x8, x22, :lo12:.LANCHOR0 + and x1, x9, 255 + and w6, w4, 255 + lsr w5, w4, 8 + lsr w3, w4, 16 + ldrb w0, [x8, 1176] + ldrb w2, [x8, 1204] + cmp w0, 1 + bne .L2308 + add x1, x7, x1, lsl 8 + mov w0, 6 +.L2334: + str w0, [x1, 2056] + str wzr, [x1, 2052] + str wzr, [x1, 2052] + str w6, [x1, 2052] + str w5, [x1, 2052] + str w3, [x1, 2052] + cbz w2, .L2330 + lsr w0, w4, 24 + str w0, [x1, 2052] +.L2330: + add x22, x22, :lo12:.LANCHOR0 + mov w0, 224 + str w0, [x1, 2056] + ldr x0, [x22, 1144] + ldrb w0, [x0, 12] + cmp w0, 3 + bne .L2314 + cbz w24, .L2314 + ldrb w0, [x22, 1212] + cbnz w0, .L2314 + ldrb w0, [x22, 1213] + cbnz w0, .L2314 + add w4, w4, w4, lsl 1 + sub w0, w24, #1 + add w0, w4, w0 +.L2331: + bl nandc_set_seed + adrp x0, .LANCHOR2+17 + mov x4, x21 + mov x3, x20 + mov w1, 0 + ldrb w2, [x0, #:lo12:.LANCHOR2+17] + mov w0, w9 + bl nandc_xfer + mov w2, w0 + bl nandc_de_cs.constprop.35 + mov w0, w2 +.L2304: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x29, x30, [sp], 64 + ret +.L2308: + ldr x0, [x8, 1144] + add x1, x7, x1, lsl 8 + ldrb w0, [x0, 12] + cmp w0, 3 + bne .L2311 + mov w0, 5 + b .L2334 +.L2311: + str wzr, [x1, 2056] + str wzr, [x1, 2052] + str wzr, [x1, 2052] + str w6, [x1, 2052] + str w5, [x1, 2052] + str w3, [x1, 2052] + cbz w2, .L2313 + lsr w0, w4, 24 + str w0, [x1, 2052] +.L2313: + mov w0, 5 + str w0, [x1, 2056] + str wzr, [x1, 2052] + str wzr, [x1, 2052] + b .L2330 +.L2314: + mov w0, w4 + b .L2331 +.L2316: + mov w0, -1 + b .L2304 + .size flash_complete_plane_page_read, .-flash_complete_plane_page_read + .align 2 + .global flash_complete_page_read + .type flash_complete_page_read, %function +flash_complete_page_read: + stp x29, x30, [sp, -112]! + add x29, sp, 0 + stp x23, x24, [sp, 48] + mov x23, x2 + adrp x24, .LANCHOR0 + add x2, x24, :lo12:.LANCHOR0 + stp x21, x22, [sp, 32] + mov w21, w0 + stp x19, x20, [sp, 16] + mov w0, 1 + stp x25, x26, [sp, 64] + mov x22, x1 + stp x27, x28, [sp, 80] + mov w1, 24 + ubfx x25, x21, 24, 2 + ldrb w20, [x2, 1205] + sub w1, w1, w20 + lsl w20, w0, w20 + sub w20, w20, #1 + lsl w19, w0, w1 + ldrb w0, [x2, 1153] + lsr w1, w21, w1 + and w20, w20, w1 + sub w19, w19, #1 + and w20, w20, 255 + and w19, w19, w21 + cmp w0, w20 + bhi .L2336 + adrp x1, .LANCHOR4 + add x1, x1, :lo12:.LANCHOR4 + add x1, x1, 432 + mov w2, 1232 + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack +.L2336: + add x0, x24, :lo12:.LANCHOR0 + add x20, x0, w20, sxtw + ldr x4, [x0, 1056] + ldrb w26, [x20, 1196] + mov w0, w26 + bl nandc_cs + cbnz w25, .L2337 + mov w0, w19 + bl slc_phy_page_address_calc + mov w19, w0 +.L2337: + adrp x20, .LANCHOR2 + add x0, x20, :lo12:.LANCHOR2 + ldrb w0, [x0, 20] + cmp w0, 3 + bne .L2338 + ubfiz x0, x26, 8, 8 + mov w1, 5 + add x0, x4, x0 + str w1, [x0, 2056] + and w1, w19, 255 + str wzr, [x0, 2052] + str wzr, [x0, 2052] + str w1, [x0, 2052] + lsr w1, w19, 8 + str w1, [x0, 2052] + lsr w1, w19, 16 + str w1, [x0, 2052] + mov w1, 224 + str w1, [x0, 2056] +.L2338: + add x0, x24, :lo12:.LANCHOR0 + ldr x1, [x0, 1144] + ldrb w1, [x1, 12] + cmp w1, 3 + bne .L2339 + cbz w25, .L2339 + ldrb w1, [x0, 1212] + cbnz w1, .L2339 + ldrb w0, [x0, 1213] + cbnz w0, .L2339 + sub w0, w25, #1 + add w1, w19, w19, lsl 1 + add w0, w0, w1 +.L2366: + add x27, x20, :lo12:.LANCHOR2 + bl nandc_set_seed + mov x4, x23 + mov x3, x22 + mov w1, 0 + mov w0, w26 + ldrb w2, [x27, 17] + add x27, x27, 8 + bl nandc_xfer + cmn w0, #1 + bne .L2341 + add x28, x24, :lo12:.LANCHOR0 + ldrb w5, [x28, 1252] + cbz w5, .L2342 + ldrb w4, [x27, 9] + mov x3, x23 + str w5, [x29, 108] + mov x2, x22 + strb wzr, [x28, 1252] + orr w1, w19, w25, lsl 24 + mov w0, w26 + bl flash_read_page + ldr w5, [x29, 108] + strb w5, [x28, 1252] + cbnz w25, .L2343 +.L2348: + ldrb w2, [x24, #:lo12:.LANCHOR0] + add x1, x24, :lo12:.LANCHOR0 + cbz w2, .L2343 + ldrb w1, [x1, 1249] + add w1, w1, w1, lsl 1 + cmp w0, w1, lsr 2 + blt .L2343 + add x20, x20, :lo12:.LANCHOR2 + ldrb w1, [x20, 27] + sub w1, w1, #4 + and w1, w1, 255 + cmp w1, 4 + mov w1, 256 + csel w0, w0, w1, hi +.L2335: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 112 + ret +.L2339: + mov w0, w19 + b .L2366 +.L2343: + cmn w0, #1 + bne .L2335 +.L2349: + adrp x0, .LANCHOR5+336 + ldr x5, [x0, #:lo12:.LANCHOR5+336] + cbnz x5, .L2345 +.L2347: + add x24, x24, :lo12:.LANCHOR0 + mov w3, -1 + mov w2, w21 + mov w1, 0 + adrp x0, .LC172 + add x0, x0, :lo12:.LC172 + ldrb w4, [x24, 1252] + bl printk + ldrb w0, [x24, 1192] + cbnz w0, .L2346 + mov w0, -1 + b .L2335 +.L2345: + add x0, x20, :lo12:.LANCHOR2 + mov x3, x23 + mov x2, x22 + orr w1, w19, w25, lsl 24 + ldrb w4, [x0, 17] + mov w0, w26 + blr x5 + cmn w0, #1 + bne .L2335 + b .L2347 +.L2346: + add x20, x20, :lo12:.LANCHOR2 + mov x3, x23 + mov x2, x22 + orr w1, w19, w25, lsl 24 + mov w0, w26 + ldrb w4, [x20, 17] + bl flash_ddr_tuning_read + b .L2335 +.L2342: + cbz w25, .L2348 + b .L2349 +.L2341: + cbnz w25, .L2335 + b .L2348 + .size flash_complete_page_read, .-flash_complete_page_read + .align 2 + .type queue_wait_first_req_completed, %function +queue_wait_first_req_completed: + stp x29, x30, [sp, -96]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x19, .LANCHOR0 + add x1, x19, :lo12:.LANCHOR0 + stp x21, x22, [sp, 32] + stp x23, x24, [sp, 48] + stp x25, x26, [sp, 64] + str x27, [sp, 80] + ldrb w0, [x1, 3354] + cmp w0, 255 + bne .L2368 +.L2401: + mov w21, 0 + b .L2367 +.L2368: + add x1, x1, 1304 + sxtw x20, w0 + add x1, x1, x20, lsl 6 + ldrb w2, [x1, 58] + ldr w21, [x1, 40] + sub w3, w2, #1 + cmp w3, 10 + bhi .L2401 + adrp x1, .L2371 + add x1, x1, :lo12:.L2371 + ldrh w1, [x1,w3,uxtw #1] + adr x3, .Lrtx2371 + add x1, x3, w1, sxth #2 + br x1 +.Lrtx2371: + .section .rodata + .align 0 + .align 2 +.L2371: + .2byte (.L2370 - .Lrtx2371) / 4 + .2byte (.L2372 - .Lrtx2371) / 4 + .2byte (.L2373 - .Lrtx2371) / 4 + .2byte (.L2373 - .Lrtx2371) / 4 + .2byte (.L2373 - .Lrtx2371) / 4 + .2byte (.L2373 - .Lrtx2371) / 4 + .2byte (.L2374 - .Lrtx2371) / 4 + .2byte (.L2375 - .Lrtx2371) / 4 + .2byte (.L2376 - .Lrtx2371) / 4 + .2byte (.L2373 - .Lrtx2371) / 4 + .2byte (.L2376 - .Lrtx2371) / 4 + .text +.L2370: + bl nandc_wait_flash_ready + add x0, x19, :lo12:.LANCHOR0 + add x0, x0, 1304 + add x0, x0, x20, lsl 6 + ldp x1, x2, [x0, 8] + cbz x2, .L2377 + ldrb w3, [x0, 56] + adrp x0, .LANCHOR3+1946 + ldrb w0, [x0, #:lo12:.LANCHOR3+1946] + cmp w3, w0 + csel x1, x1, x2, ne +.L2377: + add x19, x19, :lo12:.LANCHOR0 + mov w0, w21 + add x19, x19, 1304 + add x20, x19, x20, lsl 6 + ldr x2, [x20, 24] + bl flash_complete_page_read + str w0, [x20, 52] + mov w0, 13 + strb w0, [x20, 58] + ldrb w0, [x20, 2] + orr w0, w0, 8 + strb w0, [x20, 2] + b .L2401 +.L2372: + bl nandc_wait_flash_ready + add x0, x19, :lo12:.LANCHOR0 + lsl x2, x20, 6 + add x0, x0, 1304 + add x1, x0, x2 + ldrb w21, [x0, x2] + add x0, x0, x21, lsl 6 + ldr x23, [x0, 8] + ldp x26, x0, [x1, 8] + cbz x0, .L2378 + ldrb w2, [x1, 56] + adrp x1, .LANCHOR3+1946 + ldrb w1, [x1, #:lo12:.LANCHOR3+1946] + cmp w2, w1 + csel x26, x26, x0, ne +.L2378: + add x0, x19, :lo12:.LANCHOR0 + add x0, x0, 1304 + add x0, x0, x21, lsl 6 + ldr x1, [x0, 16] + cbz x1, .L2379 + ldrb w2, [x0, 56] + adrp x0, .LANCHOR3+1946 + ldrb w0, [x0, #:lo12:.LANCHOR3+1946] + cmp w2, w0 + csel x23, x23, x1, ne +.L2379: + add x24, x19, :lo12:.LANCHOR0 + mov x1, x26 + add x24, x24, 1304 + add x27, x24, x20, lsl 6 + add x24, x24, x21, lsl 6 + ldr x2, [x27, 24] + ldr w0, [x27, 40] + bl flash_complete_plane_page_read + mov w22, w0 + ldr x2, [x24, 24] + mov x1, x23 + ldr w0, [x24, 40] + bl flash_complete_plane_page_read + mov w25, w0 + cmn w22, #1 + beq .L2380 + ldr w0, [x27, 36] + cmn w0, #1 + beq .L2381 + ldr x1, [x27, 24] + ldr w1, [x1, 4] + cmp w0, w1 + beq .L2381 +.L2380: + add x0, x19, :lo12:.LANCHOR0 + mov w5, 1 + add x24, x0, 1304 + add x24, x24, x20, lsl 6 + ldrb w2, [x0, 1205] + mov w0, 24 + sub w0, w0, w2 + ldr x3, [x24, 24] + lsl w5, w5, w2 + adrp x2, .LANCHOR3+1946 + sub w5, w5, #1 + ldr w1, [x24, 40] + ldrb w4, [x2, #:lo12:.LANCHOR3+1946] + mov x2, x26 + lsl w6, w5, w0 + lsr w0, w1, w0 + bic w1, w1, w6 + and w0, w0, w5 + bl flash_read_page_en + mov w22, w0 + ldr w2, [x24, 36] + cmn w2, #1 + beq .L2382 + ldr x0, [x24, 24] + ldr w4, [x0, 4] + cmp w2, w4 + beq .L2382 + adrp x1, .LANCHOR2 + ldr w1, [x1, #:lo12:.LANCHOR2] + tbz x1, 6, .L2382 + ldr w3, [x0] + adrp x0, .LC173 + ldr w1, [x24, 40] + add x0, x0, :lo12:.LC173 + bl printk +.L2382: + add x0, x19, :lo12:.LANCHOR0 + add x0, x0, 1304 + add x0, x0, x20, lsl 6 + ldr w1, [x0, 36] + cmn w1, #1 + beq .L2381 + ldr x0, [x0, 24] + ldr w0, [x0, 4] + cmp w1, w0 + beq .L2381 + adrp x1, .LANCHOR4 + add x1, x1, :lo12:.LANCHOR4 + add x1, x1, 464 + mov w2, 431 + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack +.L2381: + add x0, x19, :lo12:.LANCHOR0 + mov w1, 13 + add x0, x0, 1304 + cmn w25, #1 + add x20, x0, x20, lsl 6 + strb w1, [x20, 58] + ldrb w1, [x20, 2] + str w22, [x20, 52] + orr w1, w1, 8 + strb w1, [x20, 2] + beq .L2383 + add x0, x0, x21, lsl 6 + ldr w1, [x0, 36] + cmn w1, #1 + beq .L2385 + ldr x0, [x0, 24] + ldr w0, [x0, 4] + cmp w1, w0 + beq .L2385 +.L2383: + add x0, x19, :lo12:.LANCHOR0 + mov w5, 1 + add x20, x0, 1304 + add x20, x20, x21, lsl 6 + ldrb w2, [x0, 1205] + mov w0, 24 + sub w0, w0, w2 + ldr x3, [x20, 24] + lsl w5, w5, w2 + adrp x2, .LANCHOR3+1946 + sub w5, w5, #1 + ldr w1, [x20, 40] + ldrb w4, [x2, #:lo12:.LANCHOR3+1946] + mov x2, x23 + lsl w6, w5, w0 + lsr w0, w1, w0 + bic w1, w1, w6 + and w0, w0, w5 + bl flash_read_page_en + ldr w2, [x20, 36] + cmn w2, #1 + beq .L2387 + ldr x0, [x20, 24] + ldr w4, [x0, 4] + cmp w2, w4 + beq .L2387 + adrp x1, .LANCHOR2 + ldr w1, [x1, #:lo12:.LANCHOR2] + tbz x1, 6, .L2387 + ldr w3, [x0] + adrp x0, .LC173 + ldr w1, [x20, 40] + add x0, x0, :lo12:.LC173 + bl printk +.L2387: + add x0, x19, :lo12:.LANCHOR0 + add x0, x0, 1304 + add x0, x0, x21, lsl 6 + ldr w1, [x0, 36] + cmn w1, #1 + beq .L2385 + ldr x0, [x0, 24] + ldr w0, [x0, 4] + cmp w1, w0 + beq .L2385 + adrp x1, .LANCHOR4 + add x1, x1, :lo12:.LANCHOR4 + add x1, x1, 464 + mov w2, 450 + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack +.L2385: + add x19, x19, :lo12:.LANCHOR0 + mov w0, 13 + add x19, x19, 1304 + add x21, x19, x21, lsl 6 + strb w0, [x21, 58] + ldrb w0, [x21, 2] + str w22, [x21, 52] + orr w0, w0, 8 + strb w0, [x21, 2] + b .L2401 +.L2373: + bl nandc_iqr_wait_flash_ready + mov w0, w21 + mov w1, 64 + bl flash_wait_device_ready + mov w21, w0 + tbz x21, 6, .L2401 + mov w0, 5 + tst w21, w0 + beq .L2389 + add x19, x19, :lo12:.LANCHOR0 + mov w0, 12 + add x19, x19, 1304 + mov w4, 12 + add x20, x19, x20, lsl 6 + mov w2, w21 + ldrb w1, [x20, 1] + ldr w3, [x20, 40] + strb w0, [x20, 58] + adrp x0, .LC174 + add x0, x0, :lo12:.LC174 + bl printk +.L2459: + mov w0, -1 + str w0, [x20, 52] + b .L2367 +.L2389: + add x0, x19, :lo12:.LANCHOR0 + mov w1, 13 + add x21, x0, 1304 + add x21, x21, x20, lsl 6 + strb w1, [x21, 58] + ldr x1, [x0, 3384] + str wzr, [x21, 52] + ldr w2, [x1, 156] + mov w1, 20041 + movk w1, 0x444b, lsl 16 + cmp w2, w1 + bne .L2401 + ldrh w1, [x21, 50] + cbnz w1, .L2401 + ldrb w2, [x0, 1205] + mov w5, 1 + adrp x22, .LANCHOR5 + add x22, x22, :lo12:.LANCHOR5 + mov w0, 24 + sub w0, w0, w2 + lsl w5, w5, w2 + adrp x2, .LANCHOR3+1946 + sub w5, w5, #1 + ldr w1, [x21, 40] + ldrb w4, [x2, #:lo12:.LANCHOR3+1946] + ldp x3, x2, [x22, 344] + lsl w6, w5, w0 + lsr w0, w1, w0 + bic w1, w1, w6 + and w0, w0, w5 + bl flash_read_page_en + cmn w0, #1 + beq .L2390 + ldr x2, [x21, 24] + ldr x1, [x22, 344] + ldr w2, [x2] + ldr w1, [x1] + cmp w2, w1 + beq .L2401 +.L2390: + add x19, x19, :lo12:.LANCHOR0 + mov w3, w0 + add x1, x19, 1304 + adrp x0, .LC175 + add x20, x1, x20, lsl 6 + add x0, x0, :lo12:.LC175 + ldrb w4, [x19, 1252] + ldrb w1, [x20, 1] + ldr w2, [x20, 40] + bl printk + mov w0, -1 + str w0, [x20, 52] + b .L2401 +.L2376: + cmp w2, 11 + mov w1, 3 + mov w5, 10 + csel w5, w5, w1, eq + add x1, x19, :lo12:.LANCHOR0 + mov w4, 24 + mov w2, 1 + add x22, x1, 1304 + ubfiz x0, x0, 6, 8 + mov x24, x1 + ldrb w3, [x1, 1205] + add x0, x22, x0 + sub w4, w4, w3 + lsl w2, w2, w3 + sub w2, w2, #1 + lsr w3, w21, w4 + and w3, w3, w2 + and w3, w3, 65535 +.L2392: + ldrb w1, [x0] + cmp w1, 255 + bne .L2399 + mov w21, -1 + b .L2367 +.L2399: + sxtw x23, w1 + ubfiz x0, x1, 6, 8 + add x1, x22, x23, lsl 6 + add x0, x22, x0 + ldrb w6, [x1, 58] + cmp w6, w5 + bne .L2392 + ldr w1, [x1, 40] + lsr w1, w1, w4 + and w1, w1, w2 + cmp w3, w1 + bne .L2392 + bl nandc_iqr_wait_flash_ready + mov w0, w21 + mov w1, 64 + bl flash_wait_device_ready + mov w21, w0 + tbnz x21, 6, .L2394 +.L2458: + mov w21, 0 + b .L2395 +.L2394: + tst x21, 15 + beq .L2396 + add x22, x22, x20, lsl 6 + mov w2, w0 + mov w4, 12 + adrp x0, .LC176 + add x0, x0, :lo12:.LC176 + ldrb w1, [x22, 1] + ldr w3, [x22, 40] + bl printk + mov w0, 12 + strb w0, [x22, 58] + mov w0, -1 + str w0, [x22, 52] +.L2395: + add x1, x19, :lo12:.LANCHOR0 + add x1, x1, 1304 + add x20, x1, x20, lsl 6 + add x1, x1, x23, lsl 6 + ldrb w0, [x20, 58] + strb w0, [x1, 58] + ldr w0, [x20, 52] + str w0, [x1, 52] +.L2367: + mov w0, w21 + ldr x27, [sp, 80] + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x29, x30, [sp], 96 + ret +.L2396: + add x21, x22, x20, lsl 6 + mov w0, 13 + strb w0, [x21, 58] + ldr x0, [x24, 3384] + str wzr, [x21, 52] + ldr w1, [x0, 156] + mov w0, 20041 + movk w0, 0x444b, lsl 16 + cmp w1, w0 + bne .L2458 + ldrh w0, [x21, 50] + cbnz w0, .L2458 + ldrb w2, [x24, 1205] + mov w5, 1 + adrp x22, .LANCHOR5 + add x22, x22, :lo12:.LANCHOR5 + mov w0, 24 + sub w0, w0, w2 + lsl w5, w5, w2 + adrp x2, .LANCHOR3+1946 + sub w5, w5, #1 + ldr w1, [x21, 40] + ldrb w4, [x2, #:lo12:.LANCHOR3+1946] + ldp x3, x2, [x22, 344] + lsl w6, w5, w0 + lsr w0, w1, w0 + bic w1, w1, w6 + and w0, w0, w5 + bl flash_read_page_en + cmn w0, #1 + beq .L2398 + ldr x2, [x21, 24] + ldr x1, [x22, 344] + ldr w2, [x2] + ldr w1, [x1] + cmp w2, w1 + beq .L2458 +.L2398: + add x1, x19, :lo12:.LANCHOR0 + mov w3, w0 + add x21, x1, 1304 + adrp x0, .LC177 + add x21, x21, x20, lsl 6 + add x0, x0, :lo12:.LC177 + ldrb w4, [x1, 1252] + ldr w2, [x21, 40] + ldrb w1, [x21, 1] + bl printk + mov w0, -1 + str w0, [x21, 52] + b .L2458 +.L2374: + mov w0, w21 + mov w1, 32 + bl flash_wait_device_ready + mov w21, w0 + tbz x21, 5, .L2401 + add x19, x19, :lo12:.LANCHOR0 + tst x21, 15 + add x19, x19, 1304 + add x20, x19, x20, lsl 6 + beq .L2400 + mov w0, 12 + strb w0, [x20, 58] + b .L2459 +.L2400: + mov w0, 13 + str wzr, [x20, 52] + strb w0, [x20, 58] + b .L2401 +.L2375: + mov w1, 64 + mov w0, w21 + bl flash_wait_device_ready + tbz x0, 6, .L2401 + add x19, x19, :lo12:.LANCHOR0 + add x19, x19, 1304 + add x19, x19, x20, lsl 6 + str w0, [x19, 52] + mov w0, 7 + strb w0, [x19, 58] + b .L2401 + .size queue_wait_first_req_completed, .-queue_wait_first_req_completed + .align 2 + .global sblk_prog_page + .type sblk_prog_page, %function +sblk_prog_page: + stp x29, x30, [sp, -96]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + mov x19, x0 + stp x21, x22, [sp, 32] + and w20, w1, 255 + stp x23, x24, [sp, 48] + stp x25, x26, [sp, 64] + stp x27, x28, [sp, 80] + ldrh w0, [x0, 50] + cbz w0, .L2461 + adrp x0, .LANCHOR2 + ldr w0, [x0, #:lo12:.LANCHOR2] + tbz x0, 8, .L2461 + ldr w1, [x19, 40] + adrp x0, .LC178 + mov w2, w20 + add x0, x0, :lo12:.LC178 + bl printk +.L2461: + adrp x24, .LANCHOR0 + add x25, x24, :lo12:.LANCHOR0 + add x27, x25, 1304 + mov w21, 0 + mov w23, 1 +.L2462: + cbnz w20, .L2473 +.L2489: + mov w0, 0 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 96 + ret +.L2473: + ldrb w26, [x19] + ldr w22, [x19, 40] +.L2463: + mov w1, 1 + mov w0, w22 + bl queue_lun_state + cbnz w0, .L2464 + cmp w20, 1 + beq .L2465 + add x0, x24, :lo12:.LANCHOR0 + ldrb w1, [x0, 1250] + cbz w1, .L2465 + ldrb w1, [x0, 1213] + cbz w1, .L2466 +.L2465: + mov x0, x19 + bl queue_prog_cmd +.L2467: + subs w20, w20, #1 + beq .L2489 + add x19, x24, :lo12:.LANCHOR0 + ubfiz x26, x26, 6, 8 + add x19, x19, 1304 + add x19, x19, x26 + b .L2462 +.L2464: + bl queue_wait_first_req_completed + bl queue_remove_completed_req + b .L2463 +.L2466: + ldrb w0, [x0, 1205] + mov w28, 24 + sub w28, w28, w0 + lsl w0, w23, w0 + sub w0, w0, #1 + lsr w28, w22, w28 + and w28, w28, w0 + ldrb w0, [x19] + and w28, w28, 65535 + cmp w0, 255 + bne .L2468 + adrp x1, .LANCHOR4 + add x1, x1, :lo12:.LANCHOR4 + add x1, x1, 496 + mov w2, 697 + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack +.L2468: + ldrb w0, [x19] + mov w1, 24 + add x0, x27, x0, lsl 6 + ldr w4, [x0, 40] + ldrb w0, [x25, 1205] + sub w1, w1, w0 + lsl w0, w23, w0 + sub w0, w0, #1 + lsr w2, w4, w1 + and w0, w0, w2 + cmp w28, w0, uxth + bne .L2469 + adrp x0, .LANCHOR3 + add x0, x0, :lo12:.LANCHOR3 + ldrh w2, [x0, 1304] + ldrb w3, [x0, 1306] + sub w0, w1, w2 + sub w3, w3, #1 + lsl w1, w23, w2 + lsl w0, w23, w0 + sub w0, w0, #1 + and w0, w0, w3 + sub w1, w1, #1 + and w0, w0, 65535 + lsr w5, w22, w2 + and w1, w1, 65535 + and w5, w0, w5 + lsr w2, w4, w2 + and w0, w0, w2 + and w22, w1, w22 + cmp w5, w0 + and w1, w1, w4 + ccmp w22, w1, 0, ne + bne .L2469 + cmp w21, w3 + beq .L2469 + ldr w1, [x19, 40] + mov w0, 17 + ldr x2, [x19, 8] + add w21, w21, 1 + ldr x3, [x19, 24] + bl flash_start_page_prog + strb w23, [x19, 59] + mov w0, 9 + strb w0, [x19, 58] + mov w0, -1 + strb w0, [x19] + mov x1, x19 + add x0, x25, 3354 + bl buf_add_tail + b .L2467 +.L2469: + mov x0, x19 + mov w21, 0 + bl queue_prog_cmd + b .L2467 + .size sblk_prog_page, .-sblk_prog_page + .align 2 + .global sblk_wait_write_queue_completed + .type sblk_wait_write_queue_completed, %function +sblk_wait_write_queue_completed: + stp x29, x30, [sp, -32]! + add x29, sp, 0 + str x19, [sp, 16] + adrp x19, .LANCHOR0 + add x19, x19, :lo12:.LANCHOR0 +.L2492: + ldrb w0, [x19, 3354] + cmp w0, 255 + bne .L2493 + ldr x19, [sp, 16] + ldp x29, x30, [sp], 32 + ret +.L2493: + bl queue_wait_first_req_completed + bl queue_remove_completed_req + b .L2492 + .size sblk_wait_write_queue_completed, .-sblk_wait_write_queue_completed + .align 2 + .global ftl_flush + .type ftl_flush, %function +ftl_flush: + stp x29, x30, [sp, -32]! + adrp x2, .LANCHOR0 + add x0, x2, :lo12:.LANCHOR0 + add x29, sp, 0 + stp x19, x20, [sp, 16] + mov x19, x2 + adrp x20, .LANCHOR5 + ldrb w1, [x0, 3380] + cbz w1, .L2496 + add x2, x20, :lo12:.LANCHOR5 + add x0, x0, 1304 + ldrb w2, [x2, 360] + add x0, x0, x2, lsl 6 + bl sblk_prog_page +.L2496: + add x2, x19, :lo12:.LANCHOR0 + add x20, x20, :lo12:.LANCHOR5 + mov w0, -1 + strb wzr, [x2, 3380] + strb w0, [x20, 360] + bl sblk_wait_write_queue_completed + bl ftl_write_completed + mov w0, -1 + bl ftl_vpn_decrement + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 32 + ret + .size ftl_flush, .-ftl_flush + .align 2 + .global zftl_cache_flush + .type zftl_cache_flush, %function +zftl_cache_flush: + adrp x0, .LANCHOR0+3380 + ldrb w0, [x0, #:lo12:.LANCHOR0+3380] + cbz w0, .L2506 + stp x29, x30, [sp, -16]! + add x29, sp, 0 + bl timer_get_time + adrp x1, .LANCHOR5+364 + ldr w1, [x1, #:lo12:.LANCHOR5+364] + add w1, w1, 100 + cmp w0, w1 + bls .L2501 + bl ftl_flush +.L2501: + ldp x29, x30, [sp], 16 + ret +.L2506: + ret + .size zftl_cache_flush, .-zftl_cache_flush + .align 2 + .global ftl_read_page + .type ftl_read_page, %function +ftl_read_page: + stp x29, x30, [sp, -64]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + and w19, w0, 255 + stp x21, x22, [sp, 32] + mov w20, w1 + mov x21, x2 + mov x22, x3 + str x23, [sp, 48] + mov w23, w4 + bl sblk_wait_write_queue_completed + mov w4, w23 + mov x3, x22 + mov x2, x21 + mov w1, w20 + mov w0, w19 + bl flash_read_page_en + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldr x23, [sp, 48] + ldp x29, x30, [sp], 64 + ret + .size ftl_read_page, .-ftl_read_page + .align 2 + .global ftl_read_ppa_page + .type ftl_read_ppa_page, %function +ftl_read_ppa_page: + stp x29, x30, [sp, -64]! + mov w5, 1 + add x29, sp, 0 + stp x19, x20, [sp, 16] + mov w20, w0 + adrp x0, .LANCHOR0+1205 + mov w19, 24 + stp x21, x22, [sp, 32] + mov x21, x1 + ldrb w0, [x0, #:lo12:.LANCHOR0+1205] + mov x22, x2 + str x23, [sp, 48] + mov w23, w3 + sub w19, w19, w0 + lsl w5, w5, w0 + sub w5, w5, #1 + lsr w19, w20, w19 + and w19, w19, w5 + and w19, w19, 255 + bl sblk_wait_write_queue_completed + mov w4, w23 + mov x3, x22 + mov x2, x21 + mov w1, w20 + mov w0, w19 + bl flash_read_page_en + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldr x23, [sp, 48] + ldp x29, x30, [sp], 64 + ret + .size ftl_read_ppa_page, .-ftl_read_ppa_page + .align 2 + .global sblk_read_page + .type sblk_read_page, %function +sblk_read_page: + stp x29, x30, [sp, -128]! + add x29, sp, 0 + stp x21, x22, [sp, 32] + and w21, w1, 255 + stp x25, x26, [sp, 64] + adrp x25, .LANCHOR0 + add x26, x25, :lo12:.LANCHOR0 + stp x19, x20, [sp, 16] + stp x23, x24, [sp, 48] + mov x22, x0 + mov x19, x0 + mov w20, w21 + add x23, x26, 1304 + stp x27, x28, [sp, 80] + adrp x28, .LANCHOR5 +.L2514: + cbnz w20, .L2524 +.L2537: + adrp x19, .LANCHOR0 + add x19, x19, :lo12:.LANCHOR0 + add x19, x19, 1304 +.L2525: + cbnz w21, .L2527 + ldp x19, x20, [sp, 16] + mov w0, 0 + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 128 + ret +.L2524: + ldrb w24, [x19] + ldr w27, [x19, 40] +.L2515: + mov w1, 0 + mov w0, w27 + bl queue_lun_state + cbnz w0, .L2516 + cmp w20, 1 + beq .L2521 + add x0, x28, :lo12:.LANCHOR5 + ldrb w0, [x0, 368] + cbnz w0, .L2518 +.L2521: + mov x0, x19 + bl queue_read_cmd + b .L2519 +.L2516: + bl queue_wait_first_req_completed + bl queue_remove_completed_req + b .L2515 +.L2518: + add x0, x25, :lo12:.LANCHOR0 + mov w3, 24 + ldrb w1, [x0, 1205] + mov w0, 1 + sub w3, w3, w1 + lsl w0, w0, w1 + sub w0, w0, #1 + lsr w3, w27, w3 + and w3, w3, w0 + ldrb w0, [x19] + and w3, w3, 65535 + cmp w0, 255 + bne .L2520 + adrp x1, .LANCHOR4 + add x1, x1, :lo12:.LANCHOR4 + add x1, x1, 512 + mov w2, 782 + str w3, [x29, 124] + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack + ldr w3, [x29, 124] +.L2520: + ldrb w4, [x19] + mov w0, 24 + ldrb w7, [x26, 1205] + mov w2, 1 + sbfiz x5, x4, 6, 32 + sub w0, w0, w7 + add x6, x23, x5 + lsl w2, w2, w7 + sub w2, w2, #1 + ldr w1, [x6, 40] + lsr w0, w1, w0 + and w0, w0, w2 + cmp w3, w0, uxth + bne .L2521 + adrp x0, .LANCHOR3+1410 + ldrh w0, [x0, #:lo12:.LANCHOR3+1410] + add w27, w0, w27 + cmp w1, w27 + bne .L2521 + ldr w0, [x19, 40] + mov w27, -1 + ldrb w24, [x23, x5] + sub w20, w20, #1 + stp x6, x5, [x29, 104] + str w4, [x29, 120] + bl flash_start_plane_read + strb wzr, [x19, 59] + mov w2, 2 + strb w27, [x19] + strb w2, [x19, 58] + add x0, x26, 3354 + mov x1, x19 + str w2, [x29, 124] + mov x19, x0 + bl buf_add_tail + ldp x6, x5, [x29, 104] + strb wzr, [x6, 59] + ldp w4, w2, [x29, 120] + strb w2, [x6, 58] + strb w27, [x23, x5] + mov x0, x19 + ubfiz x1, x4, 6, 8 + add x1, x23, x1 + bl buf_add_tail +.L2519: + subs w20, w20, #1 + beq .L2537 + add x19, x25, :lo12:.LANCHOR0 + ubfiz x24, x24, 6, 8 + add x19, x19, 1304 + add x19, x19, x24 + b .L2514 +.L2527: + ldrb w0, [x22, 58] + cmp w0, 13 + bne .L2526 + ldrb w0, [x22] + sub w21, w21, #1 + cmp w0, 255 + beq .L2526 + ubfiz x22, x0, 6, 8 + add x22, x19, x22 +.L2526: + bl queue_wait_first_req_completed + bl queue_remove_completed_req + b .L2525 + .size sblk_read_page, .-sblk_read_page + .align 2 + .global gc_check_data_one_wl + .type gc_check_data_one_wl, %function +gc_check_data_one_wl: + sub sp, sp, #128 + stp x29, x30, [sp, 16] + add x29, sp, 16 + stp x19, x20, [sp, 32] + adrp x19, .LANCHOR0 + add x20, x19, :lo12:.LANCHOR0 + stp x21, x22, [sp, 48] + stp x23, x24, [sp, 64] + stp x25, x26, [sp, 80] + stp x27, x28, [sp, 96] + ldr x0, [x20, 3424] + ldr x21, [x20, 1128] + cbnz x0, .L2540 + add x20, x20, 3416 + mov w0, 1 + bl buf_alloc + str x0, [x20, 8] +.L2540: + add x0, x19, :lo12:.LANCHOR0 + ldr x22, [x0, 3424] + cbnz x22, .L2541 + adrp x1, .LANCHOR4 + add x1, x1, :lo12:.LANCHOR4 + add x1, x1, 528 + mov w2, 729 + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack +.L2541: + add x27, x19, :lo12:.LANCHOR0 + adrp x4, .LANCHOR3 + add x23, x27, 3416 + mov x20, x4 + mov w25, 0 +.L2542: + add x28, x21, 80 + ldrb w0, [x28, 9] + cmp w25, w0 + bge .L2553 + sxtw x26, w25 + mov w24, 1 + add x26, x26, 8 + b .L2554 +.L2552: + add x1, x4, :lo12:.LANCHOR3 + ldrh w0, [x28, x26, lsl 1] + ldrh w2, [x1, 1410] + ldrb w1, [x1, 1320] + cmp w1, 2 + mul w2, w0, w2 + beq .L2543 + ldrb w0, [x27, 1212] + cbz w0, .L2544 +.L2543: + ldrh w0, [x23, 16] + sub w3, w0, #1 + add w0, w24, w2 + add w0, w3, w0 + orr w1, w0, w1, lsl 24 + str w1, [x22, 40] +.L2545: + str x4, [x29, 104] + mov w1, 1 + mov x0, x22 + bl sblk_read_page + ldr w2, [x22, 52] + adrp x0, .LANCHOR5 + ldr x4, [x29, 104] + cmn w2, #1 + beq .L2548 + add x5, x0, :lo12:.LANCHOR5 + ldrh w1, [x23, 22] + ldr x3, [x22, 24] + ldr x6, [x5, 280] + lsl x1, x1, 2 + ldr w7, [x6, x1] + ldr w6, [x3, 4] + cmp w7, w6 + bne .L2548 + ldr x5, [x5, 288] + ldr w5, [x5, x1] + ldr w1, [x3, 8] + cmp w5, w1 + beq .L2549 +.L2548: + add x0, x0, :lo12:.LANCHOR5 + ldrh w1, [x23, 22] + ldr x3, [x0, 280] + lsl x1, x1, 2 + ldr w3, [x3, x1] + cmn w3, #1 + beq .L2549 + adrp x4, .LANCHOR2 + ldr w4, [x4, #:lo12:.LANCHOR2] + tbz x4, 10, .L2550 + ldr x4, [x22, 24] + ldr x0, [x0, 288] + ldr w5, [x4, 12] + str w5, [sp] + ldp w5, w6, [x4] + ldr w7, [x4, 8] + ldr w4, [x0, x1] + adrp x0, .LC179 + ldr w1, [x22, 40] + add x0, x0, :lo12:.LC179 + bl printk +.L2550: + add x19, x19, :lo12:.LANCHOR0 + ldrh w1, [x21, 80] + ldr x0, [x19, 1120] + strh wzr, [x0, x1, lsl 1] + ldr x1, [x19, 1128] + ldr w0, [x1, 556] + add w0, w0, 1 + str w0, [x1, 556] + ldr x0, [x19, 3384] + ldr w1, [x0, 156] + mov w0, 20041 + movk w0, 0x444b, lsl 16 + cmp w1, w0 + bne .L2557 + add x20, x20, :lo12:.LANCHOR3 + ldrb w0, [x20, 1950] + cbnz w0, .L2557 + ldrb w0, [x20, 1322] + cbnz w0, .L2557 + ldr w0, [x22, 40] + bl ftl_mask_bad_block +.L2557: + mov w0, -1 +.L2539: + ldp x19, x20, [sp, 32] + ldp x21, x22, [sp, 48] + ldp x23, x24, [sp, 64] + ldp x25, x26, [sp, 80] + ldp x27, x28, [sp, 96] + ldp x29, x30, [sp, 16] + add sp, sp, 128 + ret +.L2544: + cmp w1, 3 + ldrh w0, [x23, 16] + bne .L2546 + ldrb w1, [x27, 1213] + cbz w1, .L2547 + add w0, w0, w0, lsl 1 + sub w1, w0, #1 + add w0, w24, w2 + add w0, w1, w0 + orr w0, w0, 50331648 +.L2572: + str w0, [x22, 40] + b .L2545 +.L2547: + add w0, w0, w2 + orr w0, w0, w24, lsl 24 + b .L2572 +.L2546: + add w0, w0, w2 + b .L2572 +.L2549: + ldrh w0, [x23, 22] + add w24, w24, 1 + add w0, w0, 1 + strh w0, [x23, 22] +.L2554: + ldrh w0, [x23, 20] + cmp w24, w0 + ble .L2552 + add w25, w25, 1 + b .L2542 +.L2553: + add x19, x19, :lo12:.LANCHOR0 + add x19, x19, 3416 + ldrh w0, [x19, 16] + add w1, w0, 1 + strh w1, [x19, 16] + adrp x1, .LANCHOR3+1322 + ldrb w1, [x1, #:lo12:.LANCHOR3+1322] + cbz w1, .L2558 + add w0, w0, 2 + strh w0, [x19, 16] +.L2558: +.L2551: + mov w0, 0 + b .L2539 + .size gc_check_data_one_wl, .-gc_check_data_one_wl + .align 2 + .global sblk_tlc_prog_one_page + .type sblk_tlc_prog_one_page, %function +sblk_tlc_prog_one_page: + stp x29, x30, [sp, -32]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + mov x19, x0 + ldr x0, [x0] + ldr w20, [x0, 40] +.L2574: + mov w1, 1 + mov w0, w20 + bl queue_lun_state + cbnz w0, .L2575 + mov x0, x19 + mov w1, 1 + bl queue_tlc_prog_cmd + mov w0, 0 + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 32 + ret +.L2575: + bl queue_wait_first_req_completed + bl queue_remove_completed_req + b .L2574 + .size sblk_tlc_prog_one_page, .-sblk_tlc_prog_one_page + .align 2 + .global sblk_xlc_prog_pages + .type sblk_xlc_prog_pages, %function +sblk_xlc_prog_pages: + stp x29, x30, [sp, -80]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + mov x20, x0 + stp x21, x22, [sp, 32] + mov x22, x1 + stp x25, x26, [sp, 64] + mov w25, w2 + stp x23, x24, [sp, 48] + ldr x0, [x0] + ldr w19, [x0, 40] +.L2578: + mov w1, 1 + mov w0, w19 + bl queue_lun_state + cbnz w0, .L2579 + cmp w25, 2 + bne .L2580 + adrp x23, .LANCHOR0 + add x4, x23, :lo12:.LANCHOR0 + ldr x5, [x22] + ldrb w0, [x4, 1250] + cbz w0, .L2581 + ldr x0, [x20] + mov w26, 1 + ldrb w1, [x4, 1205] + mov w3, 24 + ldr w5, [x5, 40] + sub w3, w3, w1 + lsl w19, w26, w1 + ldr w2, [x0, 40] + ldrb w1, [x4, 1213] + lsl w21, w26, w3 + sub w19, w19, #1 + sub w21, w21, #1 + and w24, w2, w21 + lsr w2, w2, w3 + and w19, w19, w2 + and w21, w21, w5 + and w19, w19, 255 + cbz w1, .L2582 + mov w0, w19 + bl zftl_flash_exit_slc_mode + ldr x0, [x20] + mov w4, w24 + mov w3, w19 + mov w1, w26 + mov w2, 17 + ldr x5, [x0, 8] + ldr x6, [x0, 24] + mov w0, 0 + bl flash_start_one_pass_page_prog + bl nandc_wait_flash_ready + ldr x0, [x22] + mov w4, w21 + mov w3, w19 + mov w1, w26 + mov w2, 26 + ldr x5, [x0, 8] + ldr x6, [x0, 24] + mov w0, 0 + bl flash_start_one_pass_page_prog + bl nandc_wait_flash_ready + ldr x0, [x20, 8] + add w4, w24, w26 + mov w3, w19 + mov w1, w25 + mov w2, 17 + ldr x5, [x0, 8] + ldr x6, [x0, 24] + mov w0, 0 + bl flash_start_one_pass_page_prog + bl nandc_wait_flash_ready + ldr x0, [x22, 8] + add w4, w21, w26 + mov w3, w19 + mov w1, w25 + mov w2, 26 + ldr x5, [x0, 8] + ldr x6, [x0, 24] + mov w0, 0 + bl flash_start_one_pass_page_prog + bl nandc_wait_flash_ready + ldr x0, [x20, 16] + add w4, w24, 2 + mov w3, w19 + mov w2, 17 + mov w1, 3 + ldr x5, [x0, 8] + ldr x6, [x0, 24] + mov w0, 0 + bl flash_start_one_pass_page_prog + bl nandc_wait_flash_ready + ldr x0, [x22, 16] + add w4, w21, 2 + mov w3, w19 + mov w2, 16 + mov w1, 3 + ldr x5, [x0, 8] + ldr x6, [x0, 24] + mov w0, 0 + bl flash_start_one_pass_page_prog +.L2583: + ldr x1, [x20] + mov w0, 5 + strb w0, [x1, 58] + mov w0, 1 + strb w0, [x1, 59] + mov w0, -1 + strb w0, [x1] + add x0, x23, :lo12:.LANCHOR0 + add x0, x0, 3354 + bl buf_add_tail +.L2584: + mov w0, 0 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x29, x30, [sp], 80 + ret +.L2579: + bl queue_wait_first_req_completed + bl queue_remove_completed_req + b .L2578 +.L2582: + ldr x5, [x0, 8] + mov w4, w24 + ldr x6, [x0, 24] + mov w3, w19 + ldrb w0, [x0, 60] + mov w1, w26 + mov w2, 17 + bl flash_start_tlc_page_prog + bl nandc_wait_flash_ready + ldr x7, [x20] + mov w4, w21 + ldr x0, [x22] + mov w3, w19 + mov w1, w26 + mov w2, 26 + ldr x5, [x0, 8] + ldr x6, [x0, 24] + ldrb w0, [x7, 60] + bl flash_start_tlc_page_prog + bl nandc_wait_flash_ready + ldp x7, x0, [x20] + mov w4, w24 + mov w3, w19 + mov w1, w25 + mov w2, 17 + ldr x5, [x0, 8] + ldr x6, [x0, 24] + ldrb w0, [x7, 60] + bl flash_start_tlc_page_prog + bl nandc_wait_flash_ready + ldr x7, [x20] + mov w4, w21 + ldr x0, [x22, 8] + mov w3, w19 + mov w1, w25 + mov w2, 26 + ldr x5, [x0, 8] + ldr x6, [x0, 24] + ldrb w0, [x7, 60] + bl flash_start_tlc_page_prog + bl nandc_wait_flash_ready + ldr x7, [x20] + mov w4, w24 + ldr x0, [x20, 16] + mov w3, w19 + mov w2, 17 + mov w1, 3 + ldr x5, [x0, 8] + ldr x6, [x0, 24] + ldrb w0, [x7, 60] + bl flash_start_tlc_page_prog + bl nandc_wait_flash_ready + ldr x0, [x22, 16] + mov w4, w21 + ldr x7, [x20] + mov w3, w19 + mov w2, 16 + mov w1, 3 + ldr x5, [x0, 8] + ldr x6, [x0, 24] + ldrb w0, [x7, 60] + bl flash_start_tlc_page_prog + b .L2583 +.L2581: + ldr w19, [x5, 40] +.L2585: + mov w1, 1 + mov w0, w19 + bl queue_lun_state + cbnz w0, .L2586 + mov w1, 1 + mov x0, x20 + bl queue_tlc_prog_cmd + mov w1, 0 + mov x0, x22 + bl queue_tlc_prog_cmd +.L2587: + mov w1, 1 + mov w0, w19 + bl queue_lun_state + cbz w0, .L2584 + bl queue_wait_first_req_completed + bl queue_remove_completed_req + b .L2587 +.L2586: + bl queue_wait_first_req_completed + bl queue_remove_completed_req + b .L2585 +.L2580: + mov w1, 1 + mov x0, x20 + bl queue_tlc_prog_cmd + b .L2584 + .size sblk_xlc_prog_pages, .-sblk_xlc_prog_pages + .align 2 + .global sblk_3d_mlc_prog_pages + .type sblk_3d_mlc_prog_pages, %function +sblk_3d_mlc_prog_pages: + stp x29, x30, [sp, -80]! + ubfiz x1, x1, 4, 32 + add x1, x1, 8 + add x29, sp, 0 + stp x21, x22, [sp, 32] + adrp x22, .LANCHOR0 + add x22, x22, :lo12:.LANCHOR0 + stp x25, x26, [sp, 64] + add x21, x0, x1 + add x26, x0, 8 + add x25, x22, 3354 + stp x23, x24, [sp, 48] + stp x19, x20, [sp, 16] + mov w23, 1 + mov w24, 24 +.L2591: + cmp x21, x26 + bne .L2594 + mov w0, 0 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x29, x30, [sp], 80 + ret +.L2594: + ldr x0, [x26, -8] + ldr w19, [x0, 40] +.L2592: + mov w1, 1 + mov w0, w19 + bl queue_lun_state + cbnz w0, .L2593 + ldr x0, [x26, -8] + add x26, x26, 16 + ldrb w1, [x22, 1205] + sub w2, w24, w1 + ldr w0, [x0, 40] + lsl w19, w23, w1 + lsl w20, w23, w2 + sub w19, w19, #1 + sub w20, w20, #1 + and w20, w20, w0 + lsr w0, w0, w2 + and w19, w19, w0 + and w19, w19, 255 + mov w0, w19 + bl zftl_flash_exit_slc_mode + ldr x0, [x26, -24] + mov w2, w20 + mov w1, w19 + ldr x3, [x0, 8] + ldr x4, [x0, 24] + mov w0, 16 + bl flash_start_3d_mlc_page_prog + bl nandc_wait_flash_ready + ldr x0, [x26, -16] + add w2, w20, 1 + mov w1, w19 + ldr x3, [x0, 8] + ldr x4, [x0, 24] + mov w0, 16 + bl flash_start_3d_mlc_page_prog + bl nandc_de_cs.constprop.35 + ldr x1, [x26, -24] + mov w0, 4 + strb w23, [x1, 59] + strb w0, [x1, 58] + mov w0, -1 + strb w0, [x1] + mov x0, x25 + bl buf_add_tail + b .L2591 +.L2593: + bl queue_wait_first_req_completed + bl queue_remove_completed_req + b .L2592 + .size sblk_3d_mlc_prog_pages, .-sblk_3d_mlc_prog_pages + .align 2 + .global flash_prog_page_en + .type flash_prog_page_en, %function +flash_prog_page_en: + stp x29, x30, [sp, -112]! + add x29, sp, 0 + stp x21, x22, [sp, 32] + and w21, w0, 255 + and w0, w5, 255 + stp x19, x20, [sp, 16] + str w0, [x29, 108] + adrp x19, .LANCHOR0 + add x0, x19, :lo12:.LANCHOR0 + stp x23, x24, [sp, 48] + stp x27, x28, [sp, 80] + mov w20, w1 + stp x25, x26, [sp, 64] + mov x23, x2 + mov x22, x3 + mov w27, w4 + ldrb w0, [x0, 1153] + ubfx x24, x20, 24, 2 + cmp w0, w21 + bhi .L2597 + adrp x1, .LANCHOR4 + add x1, x1, :lo12:.LANCHOR4 + add x1, x1, 552 + mov w2, 642 + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack +.L2597: + add x0, x19, :lo12:.LANCHOR0 + ldrb w1, [x0, 1153] + cmp w1, w21 + bls .L2608 + add x1, x0, w21, sxtw + ldrb w26, [x1, 1196] + cbnz w24, .L2610 + ldrb w1, [x19, #:lo12:.LANCHOR0] + cbz w1, .L2600 + ldrb w0, [x0, 1] + cbz w0, .L2610 +.L2600: + add x0, x19, :lo12:.LANCHOR0 + ldrh w1, [x0, 2] + ldrb w2, [x0, 1] + udiv w19, w20, w1 + mul w19, w19, w1 + sub w1, w20, w19 + cbz w2, .L2601 + add w19, w19, w1, lsl 1 +.L2599: + adrp x24, .LC180 + adrp x28, .LANCHOR5 + add x24, x24, :lo12:.LC180 + add x25, x28, :lo12:.LANCHOR5 +.L2605: + adrp x0, .LANCHOR2 + ldr w0, [x0, #:lo12:.LANCHOR2] + tbz x0, 4, .L2602 + mov w3, w19 + mov w2, w20 + mov w1, w26 + mov x0, x24 + bl printk +.L2602: + mov w4, w27 + mov x3, x22 + mov x2, x23 + mov w1, w19 + mov w0, w26 + bl flash_prog_page + mov w5, w0 + ldr w0, [x29, 108] + cbz w0, .L2603 + add x6, x28, :lo12:.LANCHOR5 + mov w4, w27 + mov w1, w20 + mov w0, w21 + str x6, [x29, 96] + ldp x3, x2, [x6, 344] + str w5, [x29, 104] + bl flash_read_page_en + cmp w0, 512 + mov w4, w0 + ccmn w0, #1, 4, ne + beq .L2604 + ldr x6, [x29, 96] + ldr w1, [x23] + ldr w5, [x29, 104] + ldr x0, [x6, 352] + ldr w0, [x0] + cmp w1, w0 + bne .L2604 + ldr x0, [x6, 344] + ldr w1, [x22] + ldr w0, [x0] + cmp w1, w0 + beq .L2603 +.L2604: + str w4, [x29, 96] + mov w3, 4 + mov x1, x23 + mov w2, w3 + adrp x0, .LC181 + add x0, x0, :lo12:.LC181 + bl rknand_print_hex + mov w3, 4 + mov x1, x22 + mov w2, w3 + adrp x0, .LC182 + add x0, x0, :lo12:.LC182 + bl rknand_print_hex + ldr x1, [x25, 344] + mov w3, 4 + adrp x0, .LC183 + mov w2, w3 + add x0, x0, :lo12:.LC183 + bl rknand_print_hex + ldr x1, [x25, 352] + mov w3, 4 + adrp x0, .LC184 + mov w2, w3 + add x0, x0, :lo12:.LC184 + bl rknand_print_hex + ldr w4, [x29, 96] + cmp w4, 512 + beq .L2605 +.L2607: + mov w1, w20 + adrp x0, .LC185 + add x0, x0, :lo12:.LC185 + bl printk + adrp x1, .LANCHOR4 + add x1, x1, :lo12:.LANCHOR4 + add x1, x1, 552 + mov w2, 685 + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack +.L2608: + mov w0, -1 + b .L2596 +.L2601: + add x0, x0, 4 + ldrh w0, [x0, w1, uxtw 1] + add w19, w0, w19 + b .L2599 +.L2610: + mov w19, w20 + b .L2599 +.L2603: + mov w0, w5 + cmn w5, #1 + beq .L2607 +.L2596: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 112 + ret + .size flash_prog_page_en, .-flash_prog_page_en + .align 2 + .global ftl_prog_page + .type ftl_prog_page, %function +ftl_prog_page: + stp x29, x30, [sp, -64]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + and w19, w0, 255 + stp x21, x22, [sp, 32] + mov w20, w1 + mov x21, x2 + mov x22, x3 + str x23, [sp, 48] + mov w23, w4 + bl sblk_wait_write_queue_completed + mov w0, w19 + mov w5, 1 + mov w4, w23 + mov x3, x22 + mov x2, x21 + mov w1, w20 + bl flash_prog_page_en + mov w19, w0 + cmn w0, #1 + bne .L2626 + adrp x1, .LANCHOR4 + add x1, x1, :lo12:.LANCHOR4 + add x1, x1, 576 + mov w2, 2678 + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack + adrp x0, .LC185 + mov w1, w20 + add x0, x0, :lo12:.LC185 + bl printk +.L2626: + mov w0, w19 + ldr x23, [sp, 48] + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x29, x30, [sp], 64 + ret + .size ftl_prog_page, .-ftl_prog_page + .align 2 + .global ftl_info_flush + .type ftl_info_flush, %function +ftl_info_flush: + stp x29, x30, [sp, -112]! + mov w1, 0 + add x29, sp, 0 + stp x21, x22, [sp, 32] + adrp x21, .LANCHOR3 + stp x25, x26, [sp, 64] + mov w26, w0 + add x0, x21, :lo12:.LANCHOR3 + stp x23, x24, [sp, 48] + stp x19, x20, [sp, 16] + adrp x22, .LANCHOR5 + stp x27, x28, [sp, 80] + adrp x23, .LANCHOR0 + ldrb w2, [x0, 1946] + add x0, x22, :lo12:.LANCHOR5 + ldr x0, [x0, 376] + lsl w2, w2, 1 + bl ftl_memset + add x0, x23, :lo12:.LANCHOR0 + ldr x0, [x0, 3384] + ldrh w1, [x0, 74] + cmp w1, 1 + bls .L2630 + strh wzr, [x0, 150] +.L2630: + adrp x24, .LANCHOR4 + add x24, x24, :lo12:.LANCHOR4 + add x19, x22, :lo12:.LANCHOR5 + add x24, x24, 592 + mov w25, 0 +.L2643: + add x2, x23, :lo12:.LANCHOR0 + add x1, x21, :lo12:.LANCHOR3 + ldrb w20, [x19, 384] + ldrh w27, [x19, 386] + ldr x3, [x2, 3384] + ldrh w28, [x1, 1410] + ldr w0, [x3, 4] + add w0, w0, 1 + str w0, [x3, 4] + ldr x0, [x19, 376] + str w26, [x0] + ldr x3, [x2, 3384] + ldr x0, [x19, 376] + ldrb w1, [x1, 1946] + ldr w3, [x3, 4] + str w3, [x0, 4] + lsl w1, w1, 9 + ldr x3, [x19, 376] + ldr x0, [x19, 392] + stp x2, x3, [x29, 96] + bl js_hash + ldp x2, x3, [x29, 96] + str w0, [x3, 8] + adrp x0, .LANCHOR2 + ldr w0, [x0, #:lo12:.LANCHOR2] + tbz x0, 12, .L2631 + ldr x0, [x2, 3384] + ldrb w1, [x19, 384] + ldrh w2, [x19, 386] + ldr w3, [x0, 4] + adrp x0, .LC186 + add x0, x0, :lo12:.LC186 + bl printk +.L2631: + add x1, x21, :lo12:.LANCHOR3 + ldrh w0, [x19, 386] + ldrh w1, [x1, 1376] + cmp w1, w0 + bhi .L2632 + add x20, x23, :lo12:.LANCHOR0 +.L2639: + ldrb w0, [x19, 385] + add w0, w0, 1 + and w0, w0, 255 + strb w0, [x19, 385] + cmp w0, 7 + bls .L2633 + mov x0, 0 +.L2638: + ldr x2, [x20, 1048] + add w1, w0, 8 + and w25, w0, 65535 + add x1, x2, w1, sxtw + ldrb w2, [x1, 32] + add w1, w2, 127 + and w1, w1, 255 + cmp w1, 125 + bhi .L2634 + mov x1, x24 + mov w2, 846 + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack +.L2637: + strb w25, [x19, 385] + mov w25, 1 +.L2633: + ldrb w1, [x19, 385] + ldr x0, [x20, 1048] + add x0, x0, x1 + ldrb w0, [x0, 40] + strb w0, [x19, 384] + cmp w0, 255 + beq .L2639 + add x27, x21, :lo12:.LANCHOR3 + ldrh w20, [x27, 1410] + mul w20, w20, w0 + mov w0, 0 + mov w1, w20 + bl flash_erase_block + ldrb w4, [x27, 1946] + mov w1, w20 + ldr x3, [x19, 376] + mov w0, 0 + ldr x2, [x19, 392] + add w20, w20, 1 + bl ftl_prog_page + mov w0, 1 + strh w0, [x19, 386] +.L2640: + add x0, x21, :lo12:.LANCHOR3 + ldr x3, [x19, 376] + ldr x2, [x19, 392] + mov w1, w20 + ldrb w4, [x0, 1946] + mov w0, 0 + bl ftl_prog_page + cmn w0, #1 + ldrh w1, [x19, 386] + add w1, w1, 1 + strh w1, [x19, 386] + beq .L2641 + ldrb w0, [x19, 400] + cbz w0, .L2642 +.L2641: + strb wzr, [x19, 400] + b .L2643 +.L2634: + cmp w2, 255 + bne .L2637 + add x0, x0, 1 + cmp x0, 8 + bne .L2638 + mov w25, w0 + b .L2637 +.L2632: + madd w20, w20, w28, w27 + cbnz w0, .L2640 + mov w1, w20 + bl flash_erase_block + b .L2640 +.L2642: + cbnz w25, .L2644 +.L2652: + add x22, x22, :lo12:.LANCHOR5 + ldrb w0, [x22, 384] + cmp w0, 255 + bne .L2646 + adrp x1, .LANCHOR4 + add x1, x1, :lo12:.LANCHOR4 + add x1, x1, 592 + mov w2, 890 + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack +.L2646: + ldp x19, x20, [sp, 16] + mov w0, 0 + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 112 + ret +.L2644: + ldrb w19, [x19, 385] + adrp x20, .LANCHOR4 + add x20, x20, :lo12:.LANCHOR4 + adrp x24, .LC0 + add w19, w19, 1 + add x20, x20, 592 + add x24, x24, :lo12:.LC0 +.L2647: + cmp w19, 7 + bhi .L2652 + add x0, x23, :lo12:.LANCHOR0 + ldr x1, [x0, 1048] + add w0, w19, 8 + add x0, x1, w0, sxtw + ldrb w25, [x0, 32] + add w0, w25, 127 + and w0, w0, 255 + cmp w0, 125 + bhi .L2648 + mov x1, x20 + mov w2, 881 + mov x0, x24 + bl printk + bl dump_stack +.L2649: + add x0, x21, :lo12:.LANCHOR3 + ldrh w1, [x0, 1410] + mov w0, 0 + mul w1, w1, w25 + bl flash_erase_block + b .L2650 +.L2648: + cmp w25, 255 + bne .L2649 +.L2650: + add w19, w19, 1 + and w19, w19, 65535 + b .L2647 + .size ftl_info_flush, .-ftl_info_flush + .align 2 + .global ftl_info_blk_init + .type ftl_info_blk_init, %function +ftl_info_blk_init: + stp x29, x30, [sp, -112]! + mov w0, 1 + mov w2, 16384 + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x19, .LANCHOR0 + stp x21, x22, [sp, 32] + add x22, x19, :lo12:.LANCHOR0 + adrp x21, .LANCHOR5 + add x20, x21, :lo12:.LANCHOR5 + stp x25, x26, [sp, 64] + adrp x26, .LC187 + stp x27, x28, [sp, 80] + add x26, x26, :lo12:.LC187 + stp x23, x24, [sp, 48] + mov w27, 21574 + strb w0, [x20, 400] + movk w27, 0x494c, lsl 16 + strb w0, [x20, 402] + ldrh w1, [x22, 1096] + ldr x0, [x20, 392] + strb wzr, [x20, 401] + str x0, [x22, 1104] + add x1, x0, x1, lsl 2 + str x1, [x22, 3384] + mov w1, 0 + bl ftl_memset + ldr x0, [x20, 408] + mov w2, 16384 + mov w1, 0 + bl ftl_memset + strb wzr, [x20, 385] + ldr x0, [x22, 1048] + adrp x22, .LANCHOR3 + add x22, x22, :lo12:.LANCHOR3 + strh wzr, [x20, 386] + ldrb w0, [x0, 40] + strb w0, [x20, 384] + mov w20, 7 +.L2668: + add x0, x19, :lo12:.LANCHOR0 + sxth w24, w20 + ldr x1, [x0, 1048] + add w0, w20, 8 + add x0, x1, w0, sxtw + ldrb w0, [x0, 32] + cmp w0, 255 + bne .L2667 +.L2672: + sub w20, w20, #1 + cmn w20, #1 + bne .L2668 + mov w24, 0 +.L2669: + adrp x23, .LANCHOR2 + ldr w0, [x23, #:lo12:.LANCHOR2] + tbz x0, 12, .L2673 + add x0, x19, :lo12:.LANCHOR0 + mov w2, 4800 + mov w1, w20 + ldr x0, [x0, 3384] + ldr w3, [x0] + adrp x0, .LC188 + add x0, x0, :lo12:.LC188 + bl printk +.L2673: + cmn w20, #1 + bne .L2674 + add x21, x21, :lo12:.LANCHOR5 + add x19, x19, :lo12:.LANCHOR0 + mov w1, 0 + mov w2, 16384 + ldr x0, [x21, 392] + bl ftl_memset + ldr x0, [x19, 3384] + mov w1, 21574 + movk w1, 0x494c, lsl 16 + str w1, [x0] + mov w1, 36 + movk w1, 0x6, lsl 16 + ldr x0, [x19, 3384] + str w1, [x0, 12] + mov w0, w20 +.L2666: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 112 + ret +.L2667: + add x28, x21, :lo12:.LANCHOR5 + ldrh w25, [x22, 1410] + ldrb w4, [x22, 1946] + ldr x3, [x28, 376] + ldr x2, [x28, 392] + mul w25, w25, w0 + mov w0, 0 + mov w1, w25 + bl ftl_read_page + mov w23, w0 + cmn w0, #1 + bne .L2670 + ldrb w4, [x22, 1946] + add w1, w25, 1 + ldr x3, [x28, 376] + mov w0, 0 + ldr x2, [x28, 392] + bl ftl_read_page + mov w23, w0 +.L2670: + adrp x0, .LANCHOR2 + ldr w0, [x0, #:lo12:.LANCHOR2] + tbz x0, 12, .L2671 + add x0, x19, :lo12:.LANCHOR0 + mov w3, 749 + mov w2, w23 + mov w1, w20 + ldr x0, [x0, 3384] + ldr w4, [x0] + mov x0, x26 + bl printk +.L2671: + cmn w23, #1 + beq .L2672 + add x0, x19, :lo12:.LANCHOR0 + ldr x0, [x0, 3384] + ldr w0, [x0] + cmp w0, w27 + bne .L2672 + mov w20, w24 + b .L2669 +.L2674: + add x0, x19, :lo12:.LANCHOR0 + add x20, x21, :lo12:.LANCHOR5 + adrp x22, .LANCHOR3 + add x22, x22, :lo12:.LANCHOR3 + mov w4, 4 + mov w28, 21574 + ldr x1, [x0, 1048] + add w0, w24, 8 + ldr x3, [x20, 376] + adrp x27, .LC189 + ldr x2, [x20, 392] + add x27, x27, :lo12:.LC189 + add x0, x1, w0, sxtw + strb w24, [x20, 385] + movk w28, 0x494c, lsl 16 + ldrb w1, [x0, 32] + mov w0, 0 + strb w1, [x20, 384] + bl flash_get_last_written_page + sxth w25, w0 + add w0, w0, 1 + ldrb w26, [x20, 384] + and w24, w0, 65535 + ldrh w0, [x22, 1410] + madd w26, w26, w0, w25 +.L2676: + tbnz w25, #31, .L2680 + ldrb w4, [x22, 1946] + mov w1, w26 + ldr x3, [x20, 376] + mov w0, 0 + ldr x2, [x20, 392] + bl ftl_read_page + cmn w0, #1 + beq .L2677 + add x0, x19, :lo12:.LANCHOR0 + ldr x0, [x0, 3384] + ldr w0, [x0] + cmp w0, w28 + bne .L2677 + ldr x0, [x20, 376] + ldr w2, [x0, 8] + cbnz w2, .L2678 +.L2680: + add x21, x21, :lo12:.LANCHOR5 + add x19, x19, :lo12:.LANCHOR0 + strh w24, [x21, 386] + bl ftl_tmp_into_update + ldr x1, [x19, 3384] + ldr w0, [x1, 64] + add w0, w0, 1 + str w0, [x1, 64] + mov w0, 0 + bl ftl_info_flush + mov w0, 0 + bl ftl_info_flush + ldr w0, [x23, #:lo12:.LANCHOR2] + tbnz x0, 14, .L2679 +.L2696: + mov w0, 0 + b .L2666 +.L2678: + ldr x0, [x20, 392] + ldrb w1, [x22, 1946] + str w2, [x29, 108] + lsl w1, w1, 9 + bl js_hash + ldr w2, [x29, 108] + cmp w2, w0 + beq .L2680 + ldr x0, [x20, 376] + ldr w1, [x0, 8] + mov x0, x27 + bl printk +.L2677: + sub w25, w25, #1 + sub w26, w26, #1 + sxth w25, w25 + b .L2676 +.L2679: + ldr x0, [x19, 3384] + ldr w1, [x0, 156] + adrp x0, .LC190 + add x0, x0, :lo12:.LC190 + bl printk + b .L2696 + .size ftl_info_blk_init, .-ftl_info_blk_init + .align 2 + .global ftl_ext_info_flush + .type ftl_ext_info_flush, %function +ftl_ext_info_flush: + stp x29, x30, [sp, -96]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x19, .LANCHOR0 + stp x21, x22, [sp, 32] + stp x23, x24, [sp, 48] + stp x25, x26, [sp, 64] + str x27, [sp, 80] + bl timer_get_time + mov w1, 100 + udiv w0, w0, w1 + add x1, x19, :lo12:.LANCHOR0 + ldr x1, [x1, 1128] + ldr w3, [x1, 520] + cmp w0, w3 + bls .L2698 + ldr w2, [x1, 12] + sub w2, w2, w3 + add w2, w2, w0 + str w2, [x1, 12] +.L2712: + str w0, [x1, 520] + b .L2699 +.L2698: + bcc .L2712 +.L2699: + adrp x22, .LANCHOR4 + add x22, x22, :lo12:.LANCHOR4 + add x19, x19, :lo12:.LANCHOR0 + add x22, x22, 608 + mov w0, 0 + bl ftl_total_vpn_update +.L2700: + adrp x23, .LANCHOR3 +.L2703: + ldr x1, [x19, 3384] + ldr w0, [x1, 56] + add w0, w0, 1 + str w0, [x1, 56] + add x0, x23, :lo12:.LANCHOR3 + ldrh w1, [x1, 140] + ldrh w0, [x0, 1376] + cmp w1, w0 + bcc .L2701 + bl ftl_ext_alloc_new_blk +.L2701: + ldr x0, [x19, 3384] + ldrh w1, [x0, 130] + mov w0, 65535 + cmp w1, w0 + bne .L2702 + mov x1, x22 + mov w2, 2211 + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack +.L2702: + add x25, x23, :lo12:.LANCHOR3 + ldr x1, [x19, 3384] + ldrb w20, [x19, 1205] + mov w0, 24 + adrp x24, .LANCHOR5 + add x21, x24, :lo12:.LANCHOR5 + sub w20, w0, w20 + ldrh w0, [x25, 1304] + ldrh w2, [x1, 130] + sub w0, w20, w0 + mov w20, 1 + lsl w20, w20, w0 + sub w20, w20, #1 + asr w26, w2, w0 + and w20, w20, w2 + ldrh w0, [x1, 140] + sxth w20, w20 + ldrh w2, [x25, 1410] + mov w1, 0 + madd w20, w20, w2, w0 + ldr x0, [x21, 376] + ldrb w2, [x25, 1946] + lsl w2, w2, 1 + bl ftl_memset + ldr x0, [x21, 376] + str wzr, [x0] + ldr x1, [x19, 3384] + ldr x0, [x21, 376] + ldr w1, [x1, 56] + str w1, [x0, 4] + ldrb w1, [x25, 1946] + ldr x0, [x21, 408] + ldr x27, [x21, 376] + lsl w1, w1, 9 + bl js_hash + ldr x2, [x21, 408] + mov w1, w20 + ldrb w4, [x25, 1946] + ldr x3, [x21, 376] + str w0, [x27, 8] + mov w0, w26 + bl ftl_prog_page + ldr x2, [x19, 3384] + ldrh w1, [x2, 140] + add w1, w1, 1 + and w1, w1, 65535 + strh w1, [x2, 140] + cmp w1, 1 + beq .L2703 + cmn w0, #1 + beq .L2704 + ldrb w0, [x21, 402] + cbz w0, .L2705 +.L2704: + add x24, x24, :lo12:.LANCHOR5 + strb wzr, [x24, 402] + b .L2700 +.L2705: + mov w0, 0 + ldr x27, [sp, 80] + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x29, x30, [sp], 96 + ret + .size ftl_ext_info_flush, .-ftl_ext_info_flush + .align 2 + .global ftl_ext_info_init + .type ftl_ext_info_init, %function +ftl_ext_info_init: + stp x29, x30, [sp, -128]! + mov w4, 4 + add x29, sp, 0 + stp x21, x22, [sp, 32] + adrp x21, .LANCHOR3 + stp x19, x20, [sp, 16] + adrp x19, .LANCHOR0 + add x22, x19, :lo12:.LANCHOR0 + stp x23, x24, [sp, 48] + stp x25, x26, [sp, 64] + add x2, x21, :lo12:.LANCHOR3 + stp x27, x28, [sp, 80] + adrp x25, .LANCHOR5 + ldr x0, [x22, 3384] + ldrb w20, [x22, 1205] + strh wzr, [x2, 1944] + ldrh w1, [x0, 130] + mov w0, 24 + sub w0, w0, w20 + ldrh w20, [x2, 1304] + sub w0, w0, w20 + mov w20, 1 + asr w24, w1, w0 + and w27, w24, 255 + lsl w20, w20, w0 + add x0, x25, :lo12:.LANCHOR5 + sub w20, w20, #1 + and w20, w20, w1 + ldr x3, [x0, 376] + mov w1, w20 + ldr x2, [x0, 408] + mov w0, w27 + bl flash_get_last_written_page + sxth w23, w0 + adrp x0, .LANCHOR2 + stp x0, x25, [x29, 112] + ldr w1, [x0, #:lo12:.LANCHOR2] + tbz x1, 12, .L2714 + ldr x0, [x22, 3384] + adrp x1, .LANCHOR4 + add x1, x1, :lo12:.LANCHOR4 + and w4, w24, 65535 + mov w3, w23 + mov w2, 2256 + add x1, x1, 632 + ldrh w5, [x0, 130] + adrp x0, .LC191 + add x0, x0, :lo12:.LC191 + bl printk +.L2714: + adrp x26, .LC192 + and w22, w23, 65535 + add x25, x21, :lo12:.LANCHOR3 + add x26, x26, :lo12:.LC192 + mov w24, 0 +.L2715: + sub w0, w22, w24 + tbnz x0, 15, .L2720 + ldr x0, [x29, 120] + sub w1, w23, w24 + ldrb w4, [x25, 1946] + add x28, x0, :lo12:.LANCHOR5 + ldrh w0, [x25, 1410] + ldr x3, [x28, 376] + madd w1, w0, w20, w1 + ldr x2, [x28, 408] + mov w0, w27 + bl flash_read_page_en + cmp w0, 512 + ccmn w0, #1, 4, ne + beq .L2716 + add x0, x19, :lo12:.LANCHOR0 + mov w1, 20038 + movk w1, 0x4549, lsl 16 + ldr x0, [x0, 1128] + ldr w0, [x0] + cmp w0, w1 + bne .L2716 + ldr x0, [x28, 376] + ldr w2, [x0, 8] + cbnz w2, .L2717 +.L2720: + bl zftl_sblk_list_init + add x0, x19, :lo12:.LANCHOR0 + ldr x0, [x0, 3384] + ldrh w1, [x0, 140] + cmp w1, w23 + bgt .L2719 + add w22, w22, 1 + strh w22, [x0, 140] + bl ftl_ext_info_flush +.L2719: + add x19, x19, :lo12:.LANCHOR0 + ldr x20, [x19, 1128] + bl timer_get_time + mov w1, 100 + udiv w0, w0, w1 + str w0, [x20, 520] + ldr x20, [x19, 1128] + bl timer_get_time + mov w1, -1 + str w0, [x20, 604] + ldr x0, [x19, 1128] + strh w1, [x0, 584] + strh w1, [x0, 586] + strh w1, [x0, 588] + strh w1, [x0, 590] + mov w1, 65535 + str w1, [x0, 560] + mov w1, -1 + str w1, [x0, 564] + ldr x1, [x29, 112] + str wzr, [x0, 608] + ldr w1, [x1, #:lo12:.LANCHOR2] + tbz x1, 12, .L2722 + ldr w20, [x0, 12] + ldr w19, [x0, 520] + bl timer_get_time + adrp x1, .LANCHOR4 + add x1, x1, :lo12:.LANCHOR4 + mov w4, w0 + mov w3, w20 + adrp x0, .LC193 + mov w2, w19 + add x1, x1, 632 + add x0, x0, :lo12:.LC193 + bl printk +.L2722: + add x21, x21, :lo12:.LANCHOR3 + mov w0, -1 + ldp x19, x20, [sp, 16] + strh w0, [x21, 1280] + mov w0, 0 + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 128 + ret +.L2717: + ldr x0, [x28, 408] + ldrb w1, [x25, 1946] + str w2, [x29, 108] + lsl w1, w1, 9 + bl js_hash + ldr w2, [x29, 108] + cmp w2, w0 + beq .L2720 + ldr x0, [x28, 376] + ldr w1, [x0, 8] + mov x0, x26 + bl printk +.L2716: + add w24, w24, 1 + b .L2715 + .size ftl_ext_info_init, .-ftl_ext_info_init + .align 2 + .global ftl_prog_ppa_page + .type ftl_prog_ppa_page, %function +ftl_prog_ppa_page: + stp x29, x30, [sp, -16]! + adrp x4, .LANCHOR0+1205 + mov w5, 1 + add x29, sp, 0 + ldrb w6, [x4, #:lo12:.LANCHOR0+1205] + mov w4, 24 + sub w4, w4, w6 + lsl w7, w5, w4 + sub w7, w7, #1 + lsl w5, w5, w6 + sub w6, w5, #1 + lsr w5, w0, w4 + mov w4, w3 + mov x3, x2 + mov x2, x1 + and w1, w7, w0 + and w0, w6, w5 + bl ftl_prog_page + ldp x29, x30, [sp], 16 + ret + .size ftl_prog_ppa_page, .-ftl_prog_ppa_page + .align 2 + .global ftl_write_last_log_page + .type ftl_write_last_log_page, %function +ftl_write_last_log_page: + ldrh w1, [x0, 6] + cmp w1, 1 + bne .L2737 + stp x29, x30, [sp, -64]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x20, .LANCHOR3 + add x20, x20, :lo12:.LANCHOR3 + stp x21, x22, [sp, 32] + str x23, [sp, 48] + mov x19, x0 + ldr x21, [x20, 1928] + ldrh w23, [x0, 12] + bl ftl_get_new_free_page + mov w22, w0 + cmn w0, #1 + beq .L2738 + ldrh w0, [x19] + adrp x19, .LANCHOR5 + add x19, x19, :lo12:.LANCHOR5 + add x21, x21, w23, uxth 2 + bl ftl_vpn_decrement + ldr x0, [x19, 416] + mov w1, 15555 + movk w1, 0xf55f, lsl 16 + str w1, [x0] + ldrb w0, [x20, 1321] + ldrh w1, [x20, 1376] + ldr x23, [x19, 416] + mul w1, w1, w0 + mov x0, x21 + lsl w1, w1, 2 + bl js_hash + str w0, [x23, 4] + mov x2, 0 + mov w0, 2 + ldr x1, [x19, 416] + stp wzr, wzr, [x1, 8] + str wzr, [x1, 16]! + bl ftl_debug_info_fill + ldrb w3, [x20, 1946] + mov x1, x21 + ldr x2, [x19, 416] + mov w0, w22 + bl ftl_prog_ppa_page +.L2738: + mov w0, 0 + ldr x23, [sp, 48] + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x29, x30, [sp], 64 + ret +.L2737: + mov w0, -1 + ret + .size ftl_write_last_log_page, .-ftl_write_last_log_page + .align 2 + .global ftl_dump_write_open_sblk + .type ftl_dump_write_open_sblk, %function +ftl_dump_write_open_sblk: + sub sp, sp, #224 + stp x29, x30, [sp, 48] + add x29, sp, 48 + stp x19, x20, [sp, 64] + and w20, w0, 65535 + stp x21, x22, [sp, 80] + adrp x21, .LANCHOR0 + add x0, x21, :lo12:.LANCHOR0 + stp x23, x24, [sp, 96] + stp x25, x26, [sp, 112] + stp x27, x28, [sp, 128] + ldrh w0, [x0, 1096] + cmp w0, w20 + bls .L2743 + adrp x23, .LANCHOR3 + add x0, x23, :lo12:.LANCHOR3 + ldrb w1, [x0, 1336] + cbnz w1, .L2745 + ldrb w0, [x0, 1322] + cbz w0, .L2743 +.L2745: + add x0, x21, :lo12:.LANCHOR0 + ldrb w1, [x0, 1212] + cbnz w1, .L2743 + ldr x0, [x0, 1104] + ubfiz x14, x20, 2, 16 + add x0, x0, x14 + ldrb w0, [x0, 2] + and w0, w0, 224 + cmp w0, 160 + bne .L2767 + add x0, x23, :lo12:.LANCHOR3 + ldrb w26, [x0, 1320] +.L2746: + add x22, x29, 176 + add x24, x23, :lo12:.LANCHOR3 + mov w0, w20 + adrp x27, .LC195 + add x27, x27, :lo12:.LC195 + mov w28, 0 + strh w20, [x22, -32]! + add x1, x22, 16 + bl ftl_get_blk_list_in_sblk + ldrh w1, [x24, 1376] + and w0, w0, 255 + strb w0, [x29, 153] + strh wzr, [x29, 146] + strb wzr, [x29, 149] + mul w0, w0, w1 + strh wzr, [x29, 154] + strh w0, [x29, 150] + add x0, x21, :lo12:.LANCHOR0 + ldr x0, [x0, 1104] + add x1, x0, x14 + ldr w5, [x0, x14] + ldrb w2, [x1, 2] + mov w1, w20 + ldrh w4, [x0, x14] + adrp x0, .LC194 + ubfx x5, x5, 11, 8 + add x0, x0, :lo12:.LC194 + ubfx x3, x2, 3, 2 + and w4, w4, 2047 + ubfx x2, x2, 5, 3 + bl printk + mov w0, 1 + bl buf_alloc + mov x19, x0 + mov x11, x24 + mov w9, 0 + mov w10, 0 +.L2747: + ldrh w0, [x11, 1376] + cmp w0, w28 + bls .L2755 + lsl w24, w28, 1 + mov w10, 0 + sub w0, w24, #1 + add w24, w24, w28 + sub w24, w24, #1 + str w0, [x29, 136] + b .L2758 +.L2767: + mov w26, 1 + b .L2746 +.L2756: + ldrh w12, [x22, x25] + mov w0, 65535 + cmp w12, w0 + bne .L2748 +.L2754: + add w9, w9, 1 + and w9, w9, 65535 +.L2749: + cmp w26, w9 + bcs .L2756 + add w10, w10, 1 + and w10, w10, 65535 +.L2758: + ldrb w0, [x29, 153] + cmp w0, w10 + bls .L2757 + sxtw x25, w10 + mov w9, 1 + add x25, x25, 8 + lsl x25, x25, 1 + b .L2749 +.L2748: + ldrh w3, [x11, 1410] + cmp w26, 3 + mul w3, w3, w12 + add w0, w3, w9 + bne .L2750 + add x1, x21, :lo12:.LANCHOR0 + ldrb w1, [x1, 1213] + cbz w1, .L2751 + ldrb w3, [x11, 1320] + add w0, w0, w24 +.L2781: + orr w3, w0, w3, lsl 24 + b .L2752 +.L2751: + add w3, w28, w3 + orr w3, w3, w9, lsl 24 +.L2752: + str w3, [x19, 40] + mov w1, 1 + str x11, [x29, 104] + mov x0, x19 + str w9, [x29, 112] + stp w12, w10, [x29, 124] + str w3, [x29, 132] + bl sblk_read_page + ldr w13, [x19, 52] + ldr w9, [x29, 112] + cmp w13, 512 + ldr w3, [x29, 132] + ccmn w13, #1, 4, ne + ldr x11, [x29, 104] + ldp w12, w10, [x29, 124] + bne .L2754 + ldr x1, [x19, 24] + mov w4, w13 + ldr x0, [x19, 8] + str x11, [x29, 112] + stp w9, w10, [x29, 124] + ldr w2, [x1, 12] + str w2, [sp, 32] + str w13, [x29, 132] + ldr w2, [x1, 8] + str w2, [sp, 24] + ldr w2, [x1, 4] + str w2, [sp, 16] + mov w2, w28 + ldr w1, [x1] + str w1, [sp, 8] + ldr w1, [x0, 12] + str w1, [sp] + mov w1, w12 + ldp w5, w6, [x0] + ldr w7, [x0, 8] + mov x0, x27 + bl printk + ldr w13, [x29, 132] + ldp w9, w10, [x29, 124] + cmp w13, 512 + ldr x11, [x29, 112] + bne .L2754 +.L2755: + add x24, x23, :lo12:.LANCHOR3 + mov w4, w9 + mov w3, w10 + mov w2, w28 + mov w1, w20 + adrp x0, .LC196 + add x0, x0, :lo12:.LC196 + bl printk + ldr x0, [x19, 8] + mov w1, 0 + ldrb w2, [x24, 1946] + adrp x26, .LC197 + add x26, x26, :lo12:.LC197 + lsl w2, w2, 9 + bl ftl_memset + ldr x0, [x19, 24] + mov w1, 0 + ldrb w2, [x24, 1946] + lsl w2, w2, 1 + bl ftl_memset +.L2759: + add x24, x23, :lo12:.LANCHOR3 + ldrh w0, [x24, 1376] + cmp w0, w28 + bls .L2765 + add x0, x21, :lo12:.LANCHOR0 + lsl w27, w28, 1 + mov w25, 0 + str x0, [x29, 136] + b .L2766 +.L2750: + cmp w26, 2 + bne .L2753 + ldr w1, [x29, 136] + ldrb w3, [x11, 1320] + add w0, w1, w0 + b .L2781 +.L2753: + add w3, w28, w3 + b .L2752 +.L2757: + add w8, w28, 1 + and w28, w8, 65535 + b .L2747 +.L2764: + adrp x0, .LANCHOR2 + ldr w0, [x0, #:lo12:.LANCHOR2] + tbz x0, 12, .L2760 + mov w2, w25 + mov w1, w28 + mov x0, x26 + bl printk +.L2760: + ldrb w1, [x24, 1336] + sxtw x0, w25 + ldrh w2, [x24, 1410] + cbz w1, .L2761 + add x0, x0, 8 + ldrh w1, [x22, x0, lsl 1] + mov x0, x19 + mul w1, w1, w2 + orr w1, w1, w28 + str w1, [x19, 40] + bl sblk_3d_tlc_dump_prog +.L2762: + add w25, w25, 1 + and w25, w25, 65535 +.L2766: + ldrb w0, [x29, 153] + cmp w0, w25 + bhi .L2764 + add w8, w28, 1 + and w28, w8, 65535 + b .L2759 +.L2761: + add x0, x0, 8 + ldrb w1, [x24, 1320] + cmp w1, 2 + ldrh w1, [x22, x0, lsl 1] + mul w1, w1, w2 + bne .L2763 + orr w1, w1, w27 + mov x0, x19 + orr w1, w1, 33554432 + str w1, [x19, 40] + bl sblk_mlc_dump_prog + b .L2762 +.L2763: + ldr x0, [x29, 136] + mov w6, 1 + ldrb w4, [x24, 1946] + orr w1, w1, w28 + ldr x3, [x19, 24] + mov w5, 0 + str w1, [x19, 40] + ldrb w2, [x0, 1205] + mov w0, 24 + sub w0, w0, w2 + lsl w6, w6, w2 + ldr x2, [x19, 8] + sub w6, w6, #1 + lsl w7, w6, w0 + lsr w0, w1, w0 + bic w1, w1, w7 + and w0, w0, w6 + bl flash_prog_page_en + b .L2762 +.L2765: + mov x0, x19 + bl zbuf_free + adrp x0, .LC198 + mov w1, w20 + add x0, x0, :lo12:.LC198 + bl printk +.L2743: + ldp x19, x20, [sp, 64] + ldp x21, x22, [sp, 80] + ldp x23, x24, [sp, 96] + ldp x25, x26, [sp, 112] + ldp x27, x28, [sp, 128] + ldp x29, x30, [sp, 48] + add sp, sp, 224 + ret + .size ftl_dump_write_open_sblk, .-ftl_dump_write_open_sblk + .align 2 + .global gc_ink_check_sblk + .type gc_ink_check_sblk, %function +gc_ink_check_sblk: + stp x29, x30, [sp, -80]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x19, .LANCHOR0 + add x0, x19, :lo12:.LANCHOR0 + stp x21, x22, [sp, 32] + stp x23, x24, [sp, 48] + stp x25, x26, [sp, 64] + ldrh w1, [x0, 5526] + ldr x21, [x0, 5600] + cmp w1, 3 + bhi .L2783 + adrp x0, .L2785 + mov x20, x19 + add x0, x0, :lo12:.L2785 + ldrh w0, [x0,w1,uxtw #1] + adr x1, .Lrtx2785 + add x0, x1, w0, sxth #2 + br x0 +.Lrtx2785: + .section .rodata + .align 0 + .align 2 +.L2785: + .2byte (.L2784 - .Lrtx2785) / 4 + .2byte (.L2786 - .Lrtx2785) / 4 + .2byte (.L2787 - .Lrtx2785) / 4 + .2byte (.L2788 - .Lrtx2785) / 4 + .text +.L2784: + add x19, x19, :lo12:.LANCHOR0 + ldrh w0, [x19, 3372] + cmp w0, 7 + bls .L2782 + ldrb w0, [x19, 3353] + cmp w0, 2 + bls .L2782 + adrp x20, .LANCHOR3 + add x20, x20, :lo12:.LANCHOR3 + add x23, x20, 1400 + mov w1, 0 + mov x0, x23 + bl _list_get_gc_head_node + and w0, w0, 65535 + mov w22, 65535 + cmp w0, w22 + beq .L2782 + ldr x1, [x19, 1104] + ubfiz x0, x0, 2, 16 + ldrh w0, [x1, x0] + and w0, w0, 2047 + cmp w0, 2 + bgt .L2782 + mov w0, 1 + bl buf_alloc + str x0, [x19, 5600] + add x21, x19, 3416 + cbz x0, .L2782 + add x2, x19, 3372 + mov w1, 0 + mov x0, x23 + bl _list_pop_index_node + and w14, w0, 65535 + cmp w14, w22 + bne .L2792 + ldr x0, [x19, 5600] + bl zbuf_free + str xzr, [x19, 5600] +.L2782: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x29, x30, [sp], 80 + ret +.L2792: + mov w0, w14 + add x1, x21, 2162 + bl ftl_get_blk_list_in_sblk + strb w0, [x21, 2155] + mov w0, 1 + strh w0, [x19, 5526] + ldr x0, [x19, 1104] + strh w14, [x19, 5562] + ubfiz x14, x14, 2, 16 + strh wzr, [x19, 5564] + ldrb w2, [x20, 1946] + ldrh w0, [x0, x14] + tbz x0, 0, .L2793 + ldr x0, [x19, 5600] + lsl w2, w2, 9 + mov w1, 85 +.L2808: + ldr x0, [x0, 8] + bl ftl_memset + b .L2782 +.L2793: + lsl w2, w2, 9 + mov w1, 170 + ldr x0, [x19, 5600] + b .L2808 +.L2786: + add x20, x19, :lo12:.LANCHOR0 + mov w1, 0 + ldrh w0, [x20, 5562] + bl ftl_erase_sblk + mov w0, 2 + strh w0, [x20, 5526] + b .L2782 +.L2787: + add x19, x19, :lo12:.LANCHOR0 + adrp x24, .LANCHOR3 + mov w20, 65280 + add x22, x19, 3416 + add x24, x24, :lo12:.LANCHOR3 + mov w23, 0 + movk w20, 0x55aa, lsl 16 + bl sblk_wait_write_queue_completed +.L2794: + ldrb w0, [x22, 2155] + cmp w0, w23 + bhi .L2796 + ldrh w0, [x22, 2148] + adrp x1, .LANCHOR3+1376 + add w0, w0, 1 + ldrh w1, [x1, #:lo12:.LANCHOR3+1376] + and w0, w0, 65535 + strh w0, [x22, 2148] + cmp w1, w0 + bhi .L2782 + mov w0, 3 + strh wzr, [x22, 2148] + strh w0, [x22, 2110] + b .L2782 +.L2796: + add x0, x22, w23, sxtw 1 + mov w1, 65535 + ldrh w0, [x0, 2162] + cmp w0, w1 + beq .L2795 + ldrh w2, [x22, 2148] + mov w6, 1 + ldrh w1, [x24, 1410] + mov w5, 0 + madd w1, w1, w0, w2 + ldr x0, [x21, 8] + str w1, [x0] + ldr x0, [x21, 8] + str w20, [x0, 4] + ldr x0, [x21, 24] + str wzr, [x0] + mov w0, 24 + ldrb w2, [x19, 1205] + ldrb w4, [x24, 1946] + sub w0, w0, w2 + ldr x3, [x21, 24] + lsl w6, w6, w2 + ldr x2, [x21, 8] + sub w6, w6, #1 + lsl w7, w6, w0 + lsr w0, w1, w0 + bic w1, w1, w7 + and w0, w0, w6 + bl flash_prog_page_en +.L2795: + add w23, w23, 1 + and w23, w23, 65535 + b .L2794 +.L2788: + add x19, x19, :lo12:.LANCHOR0 + adrp x25, .LANCHOR3 + add x19, x19, 3416 + add x25, x25, :lo12:.LANCHOR3 + mov w22, 0 + mov w26, 65535 + bl sblk_wait_write_queue_completed +.L2797: + ldrb w0, [x19, 2155] + cmp w0, w22 + bhi .L2801 + ldrh w0, [x19, 2148] + adrp x1, .LANCHOR3+1376 + add w0, w0, 1 + ldrh w1, [x1, #:lo12:.LANCHOR3+1376] + and w0, w0, 65535 + strh w0, [x19, 2148] + cmp w1, w0 + bhi .L2782 + ldr x0, [x19, 2184] + strh wzr, [x19, 2110] + bl zbuf_free + str xzr, [x19, 2184] + ldrh w0, [x19, 2112] + cmp w0, 15 + bhi .L2802 + add w1, w0, 1 + add x0, x19, w0, sxtw 1 + strh w1, [x19, 2112] + ldrh w1, [x19, 2146] + strh w1, [x0, 2114] +.L2803: + add x19, x20, :lo12:.LANCHOR0 + adrp x0, .LC199 + add x0, x0, :lo12:.LC199 + ldrh w2, [x19, 5528] + ldrh w1, [x19, 5562] + bl printk + b .L2782 +.L2801: + add x24, x19, w22, sxtw 1 + add x24, x24, 16 + ldrh w0, [x24, 2146] + cmp w0, w26 + beq .L2799 + ldrh w1, [x19, 2148] + ldrh w23, [x25, 1410] + madd w23, w23, w0, w1 + mov w1, 1 + str w23, [x21, 40] + mov x0, x21 + bl sblk_read_page + ldr x0, [x21, 8] + ldr w0, [x0] + cmp w23, w0 + beq .L2799 + mov w0, w23 + bl ftl_mask_bad_block + mov w0, -1 + strh w0, [x24, 2146] +.L2799: + add w22, w22, 1 + and w22, w22, 65535 + b .L2797 +.L2802: + ldrh w0, [x19, 2146] + bl zftl_insert_free_list + b .L2803 +.L2783: + strh wzr, [x0, 5526] + b .L2782 + .size gc_ink_check_sblk, .-gc_ink_check_sblk + .align 2 + .global ftl_ink_check_sblk + .type ftl_ink_check_sblk, %function +ftl_ink_check_sblk: + stp x29, x30, [sp, -144]! + add x29, sp, 0 + stp x21, x22, [sp, 32] + adrp x21, .LANCHOR0 + add x22, x21, :lo12:.LANCHOR0 + stp x19, x20, [sp, 16] + stp x25, x26, [sp, 64] + and w20, w0, 65535 + stp x23, x24, [sp, 48] + ubfiz x25, x20, 2, 16 + stp x27, x28, [sp, 80] + mov w1, w20 + ldr x0, [x22, 1104] + ldr w3, [x0, x25] + ldrh w2, [x0, x25] + adrp x0, .LC200 + add x0, x0, :lo12:.LC200 + ubfx x3, x3, 11, 8 + and w2, w2, 2047 + bl printk + mov w0, 65535 + cmp w20, w0 + beq .L2809 + ldrh w0, [x22, 1096] + cmp w0, w20 + bls .L2809 + add x24, x29, 144 + mov w1, 0 + mov w0, w20 + bl ftl_erase_sblk + mov w0, w20 + strh w20, [x24, -32]! + add x1, x24, 16 + bl ftl_get_blk_list_in_sblk + strb w0, [x29, 121] + mov w0, 1 + bl buf_alloc + mov x19, x0 + ldr x0, [x22, 1104] + adrp x22, .LANCHOR3 + ldrh w0, [x0, x25] + and w0, w0, 2047 + cmp w0, 1 + add x0, x22, :lo12:.LANCHOR3 + ldrb w2, [x0, 1946] + lsl w2, w2, 9 + bgt .L2811 + mov w1, 85 +.L2827: + ldr x0, [x19, 8] + add x27, x22, :lo12:.LANCHOR3 + mov w26, 0 + bl ftl_memset + bl sblk_wait_write_queue_completed + mov w9, 65280 + mov w8, 65535 + movk w9, 0x55aa, lsl 16 +.L2813: + ldrh w0, [x27, 1376] + cmp w0, w26 + bls .L2816 + mov w23, 0 + add x7, x21, :lo12:.LANCHOR0 + mov w28, 24 + b .L2817 +.L2811: + mov w1, 170 + b .L2827 +.L2815: + add x0, x24, w23, sxtw 1 + ldrh w0, [x0, 16] + cmp w0, w8 + beq .L2814 + ldrh w1, [x27, 1410] + mov w6, 1 + stp w8, w9, [x29, 96] + mov w5, 0 + str x7, [x29, 104] + madd w1, w1, w0, w26 + ldr x0, [x19, 8] + str w1, [x0] + ldr x0, [x19, 8] + str w9, [x0, 4] + ldr x0, [x19, 24] + str wzr, [x0] + ldrb w2, [x7, 1205] + ldrb w4, [x27, 1946] + sub w0, w28, w2 + ldr x3, [x19, 24] + lsl w6, w6, w2 + ldr x2, [x19, 8] + sub w6, w6, #1 + lsl w10, w6, w0 + lsr w0, w1, w0 + bic w1, w1, w10 + and w0, w0, w6 + bl flash_prog_page_en + ldp w8, w9, [x29, 96] + ldr x7, [x29, 104] +.L2814: + add w23, w23, 1 + and w23, w23, 65535 +.L2817: + ldrb w0, [x29, 121] + cmp w0, w23 + bhi .L2815 + add w26, w26, 1 + and w26, w26, 65535 + b .L2813 +.L2816: + add x22, x22, :lo12:.LANCHOR3 + mov w26, 0 + mov w27, 65535 +.L2818: + ldrh w0, [x22, 1376] + cmp w0, w26 + bls .L2823 + mov w23, 0 + b .L2824 +.L2822: + sxtw x28, w23 + add x28, x28, 8 + lsl x28, x28, 1 + ldrh w0, [x24, x28] + cmp w0, w27 + beq .L2820 + ldrh w3, [x22, 1410] + mov w1, 1 + madd w3, w3, w0, w26 + mov x0, x19 + str w3, [x19, 40] + str w3, [x29, 104] + bl sblk_read_page + ldr x0, [x19, 8] + ldr w3, [x29, 104] + ldr w0, [x0] + cmp w3, w0 + beq .L2820 + mov w0, w3 + bl ftl_mask_bad_block + mov w0, -1 + strh w0, [x24, x28] +.L2820: + add w23, w23, 1 + and w23, w23, 65535 +.L2824: + ldrb w0, [x29, 121] + cmp w0, w23 + bhi .L2822 + add w2, w26, 1 + and w26, w2, 65535 + b .L2818 +.L2823: + add x21, x21, :lo12:.LANCHOR0 + mov x0, x19 + bl zbuf_free + mov w1, w20 + ldr x0, [x21, 1104] + ldr w3, [x0, x25] + ldrh w2, [x0, x25] + adrp x0, .LC201 + add x0, x0, :lo12:.LC201 + ubfx x3, x3, 11, 8 + and w2, w2, 2047 + bl printk +.L2809: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 144 + ret + .size ftl_ink_check_sblk, .-ftl_ink_check_sblk + .align 2 + .global ftl_alloc_sblk + .type ftl_alloc_sblk, %function +ftl_alloc_sblk: + stp x29, x30, [sp, -80]! + cmp w0, 5 + add x29, sp, 0 + stp x21, x22, [sp, 32] + and w21, w0, 65535 + stp x19, x20, [sp, 16] + mov w22, w0 + stp x23, x24, [sp, 48] + mov w1, w21 + cset w23, eq + mov w0, 0 + str x25, [sp, 64] + bl zftl_get_free_sblk + and w20, w0, 65535 + mov w0, 65535 + cmp w20, w0 + beq .L2830 + adrp x0, .LANCHOR0 + add x1, x0, :lo12:.LANCHOR0 + ubfiz x25, x20, 2, 16 + lsl w23, w23, 1 + mov w24, w20 + mov x19, x0 + ldr x21, [x1, 1104] + add x21, x21, x25 + ldrb w1, [x21, 2] + tst w1, 224 + beq .L2831 + adrp x1, .LANCHOR4 + add x1, x1, :lo12:.LANCHOR4 + add x1, x1, 656 + mov w2, 1012 + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack +.L2831: + ldrb w0, [x21, 2] + bfi w0, w22, 5, 3 + ubfx x1, x0, 3, 2 + orr w1, w23, w1 + bfi w0, w1, 3, 2 + strb w0, [x21, 2] + and w1, w0, 24 + cmp w1, 24 + bne .L2832 + cbnz w23, .L2832 + mov w1, 1 + bfi w0, w1, 3, 2 + strb w0, [x21, 2] +.L2832: + add x0, x19, :lo12:.LANCHOR0 + ldr x1, [x0, 3384] + ldrh w1, [x1, 150] + cbz w1, .L2833 + ldr x0, [x0, 1104] + ldrh w0, [x0, x25] + tst x0, 2047 + bne .L2833 + cbnz w23, .L2833 + mov w0, w24 + bl ftl_ink_check_sblk +.L2833: + mov w0, w20 + ldr x25, [sp, 64] + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x29, x30, [sp], 80 + ret +.L2830: + bl print_ftl_debug_info + adrp x19, .LC202 + mov w2, w22 + add x19, x19, :lo12:.LC202 + mov w1, w20 + mov x0, x19 + bl printk + mov w1, w21 + mov w0, 0 + bl zftl_get_free_sblk + and w20, w0, 65535 + mov w2, w22 + mov w1, w20 + mov x0, x19 + bl printk + bl dump_all_list_info + adrp x1, .LANCHOR4 + add x1, x1, :lo12:.LANCHOR4 + add x1, x1, 656 + mov w2, 1031 + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack + b .L2833 + .size ftl_alloc_sblk, .-ftl_alloc_sblk + .align 2 + .global ftl_open_sblk_init + .type ftl_open_sblk_init, %function +ftl_open_sblk_init: + stp x29, x30, [sp, -80]! + add x29, sp, 0 + stp x21, x22, [sp, 32] + adrp x21, .LANCHOR0 + stp x23, x24, [sp, 48] + adrp x22, .LC203 + stp x19, x20, [sp, 16] + adrp x24, .LANCHOR3 + stp x25, x26, [sp, 64] + mov x19, x0 + mov w23, w1 + add x25, x24, :lo12:.LANCHOR3 + add x21, x21, :lo12:.LANCHOR0 + add x22, x22, :lo12:.LC203 +.L2843: + mov w26, 65535 +.L2844: + mov w0, w23 + bl ftl_alloc_sblk + and w20, w0, 65535 + cmp w20, w26 + beq .L2844 + mov w1, 0 + mov w0, w20 + bl ftl_erase_sblk + add x1, x19, 16 + mov w0, w20 + bl ftl_get_blk_list_in_sblk + strh w20, [x19] + add x2, x24, :lo12:.LANCHOR3 + and w0, w0, 255 + strb w0, [x19, 9] + cmp w23, 2 + strh wzr, [x19, 2] + ldrh w1, [x2, 1376] + strb wzr, [x19, 5] + strh wzr, [x19, 10] + strb w23, [x19, 4] + mul w0, w1, w0 + strh w0, [x19, 6] + beq .L2847 + ldrb w0, [x2, 1321] + mul w0, w1, w0 + and w0, w0, 65535 +.L2845: + ldrb w2, [x25, 1321] + ubfiz x26, x20, 1, 16 + ldr x3, [x25, 1928] + strh w0, [x19, 12] + mul w2, w2, w1 + add x0, x3, w0, uxth 2 + mov w1, 255 + lsl w2, w2, 2 + bl ftl_memset + ldr x0, [x21, 1120] + ldrh w1, [x19, 6] + strh w1, [x0, x26] + ldrb w0, [x19, 9] + cbnz w0, .L2842 + mov w1, w20 + mov x0, x22 + bl printk + ldr x0, [x21, 1120] + mov w1, -1 + strh w1, [x0, x26] + mov w0, 7 + strb w0, [x19, 4] + b .L2843 +.L2847: + mov w0, 0 + b .L2845 +.L2842: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x29, x30, [sp], 80 + ret + .size ftl_open_sblk_init, .-ftl_open_sblk_init + .align 2 + .global pm_alloc_new_blk + .type pm_alloc_new_blk, %function +pm_alloc_new_blk: + stp x29, x30, [sp, -64]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x19, .LANCHOR0 + add x0, x19, :lo12:.LANCHOR0 + stp x21, x22, [sp, 32] + stp x23, x24, [sp, 48] + adrp x22, .LANCHOR3 + add x2, x22, :lo12:.LANCHOR3 + ldr x1, [x0, 3384] + ldrb w2, [x2, 1321] + ldrh w0, [x1, 690] + add w0, w0, 1 + and w0, w0, 65535 + strh w0, [x1, 690] + cmp w2, w0 + bls .L2851 + add x0, x1, w0, sxtw 1 + ldrh w1, [x0, 672] + mov w0, 65535 + cmp w1, w0 + bne .L2852 +.L2851: + adrp x23, .LC203 + add x20, x19, :lo12:.LANCHOR0 + add x23, x23, :lo12:.LC203 + mov w24, 65535 +.L2853: + mov w0, 1 + bl ftl_alloc_sblk + and w21, w0, 65535 + cmp w21, w24 + beq .L2853 + mov w1, 0 + mov w0, w21 + bl ftl_erase_sblk + ldr x1, [x20, 3384] + mov w0, w21 + add x1, x1, 672 + bl ftl_get_blk_list_in_sblk + tst w0, 65535 + bne .L2854 + mov w1, w21 + mov x0, x23 + bl printk + ldr x0, [x20, 1104] + add x21, x0, w21, uxth 2 + ldrb w0, [x21, 2] + orr w0, w0, -32 + strb w0, [x21, 2] + b .L2853 +.L2854: + ldr x0, [x20, 3384] + adrp x1, .LANCHOR5+424 + mov w2, 1 + mov w20, 0 + add x0, x0, 416 + str w2, [x1, #:lo12:.LANCHOR5+424] + mov w1, 65535 + strh wzr, [x0, 274] +.L2856: + ldrh w2, [x0] + cmp w2, w1 + beq .L2855 + add w20, w20, 1 + add x0, x0, 2 + and w20, w20, 65535 + cmp w20, 128 + bne .L2856 + adrp x1, .LANCHOR4 + add x1, x1, :lo12:.LANCHOR4 + add x1, x1, 672 + mov w2, 264 + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack +.L2855: + add x0, x19, :lo12:.LANCHOR0 + ldr x0, [x0, 3384] + add x20, x0, w20, sxtw 1 + strh w21, [x20, 416] + ldrh w1, [x0, 688] + add w1, w1, 1 + strh w1, [x0, 688] +.L2852: + add x0, x19, :lo12:.LANCHOR0 + ldr x1, [x0, 3384] + ldrh w0, [x1, 690] + add x0, x0, 336 + ldrh w20, [x1, x0, lsl 1] + mov w0, 65533 + sub w1, w20, #1 + cmp w0, w1, uxth + bcs .L2858 + adrp x1, .LANCHOR4 + add x1, x1, :lo12:.LANCHOR4 + add x1, x1, 672 + mov w2, 270 + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack +.L2858: + add x19, x19, :lo12:.LANCHOR0 + add x22, x22, :lo12:.LANCHOR3 + mov w2, 24 + ldrb w1, [x19, 1205] + ldr x0, [x19, 3384] + sub w2, w2, w1 + ldrh w1, [x22, 1304] + sub w2, w2, w1 + strh wzr, [x0, 696] + asr w4, w20, w2 + strh w20, [x0, 692] + strh w4, [x0, 694] + adrp x0, .LANCHOR2 + ldr w0, [x0, #:lo12:.LANCHOR2] + tbz x0, 12, .L2861 + mov w0, 1 + and w4, w4, 65535 + lsl w2, w0, w2 + mov w3, w20 + adrp x0, .LC204 + sub w2, w2, #1 + mov w1, w20 + add x0, x0, :lo12:.LC204 + bl printk +.L2861: + mov w0, 0 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x29, x30, [sp], 64 + ret + .size pm_alloc_new_blk, .-pm_alloc_new_blk + .align 2 + .global pm_write_page + .type pm_write_page, %function +pm_write_page: + stp x29, x30, [sp, -96]! + add x29, sp, 0 + stp x21, x22, [sp, 32] + mov w21, w0 + stp x23, x24, [sp, 48] + mov x24, x1 + stp x25, x26, [sp, 64] + adrp x25, .LANCHOR0 + adrp x26, .LANCHOR3 + add x22, x25, :lo12:.LANCHOR0 + add x23, x26, :lo12:.LANCHOR3 + stp x19, x20, [sp, 16] + stp x27, x28, [sp, 80] +.L2869: + add x0, x25, :lo12:.LANCHOR0 + ldr x0, [x0, 3384] + ldr w1, [x0, 48] + ldrh w2, [x0, 696] + add w1, w1, 1 + str w1, [x0, 48] + add x1, x26, :lo12:.LANCHOR3 + ldrh w1, [x1, 1376] + cmp w2, w1 + bcs .L2870 + ldrh w1, [x0, 692] + mov w0, 65535 + cmp w1, w0 + bne .L2871 +.L2870: + bl pm_alloc_new_blk + mov w0, 0 + bl ftl_info_flush +.L2871: + ldr x0, [x22, 3384] + ldrh w1, [x0, 692] + mov w0, 65535 + cmp w1, w0 + bne .L2872 + adrp x1, .LANCHOR4 + add x1, x1, :lo12:.LANCHOR4 + add x1, x1, 696 + mov w2, 303 + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack +.L2872: + ldr x0, [x22, 3384] + adrp x19, .LANCHOR5 + ldrh w1, [x23, 1410] + add x20, x19, :lo12:.LANCHOR5 + mov w2, 64 + ldrh w27, [x0, 692] + ldrh w0, [x0, 696] + madd w27, w27, w1, w0 + ldr x0, [x20, 432] + mov w1, 0 + bl ftl_memset + ldr x0, [x20, 432] + str w21, [x0] + ldr x1, [x22, 3384] + ldr x0, [x20, 432] + ldr w1, [x1, 48] + str w1, [x0, 4] + mov x0, x24 + ldrb w1, [x23, 1946] + ldr x28, [x20, 432] + lsl w1, w1, 9 + bl js_hash + ldrb w4, [x23, 1946] + mov x2, x24 + str w0, [x28, 8] + mov w1, w27 + ldr x0, [x22, 3384] + ldr x3, [x20, 432] + ldrb w0, [x0, 694] + bl ftl_prog_page + ldr x2, [x22, 3384] + ldrh w1, [x2, 696] + add w1, w1, 1 + and w1, w1, 65535 + strh w1, [x2, 696] + cmp w1, 1 + beq .L2873 + ldrb w1, [x20, 440] + cbz w1, .L2874 +.L2873: + add x19, x19, :lo12:.LANCHOR5 + strb wzr, [x19, 440] + b .L2869 +.L2874: + cmn w0, #1 + bne .L2876 + mov w1, w27 + adrp x0, .LC205 + add x0, x0, :lo12:.LC205 + bl printk + b .L2869 +.L2876: + ldrh w0, [x2, 698] + cmp w21, w0 + bcs .L2877 + add x21, x2, w21, uxtw 2 + str w27, [x21, 704] +.L2877: + mov w0, 0 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 96 + ret + .size pm_write_page, .-pm_write_page + .align 2 + .global flash_info_flush + .type flash_info_flush, %function +flash_info_flush: + stp x29, x30, [sp, -80]! + adrp x0, .LANCHOR2 + add x29, sp, 0 + ldr w0, [x0, #:lo12:.LANCHOR2] + stp x19, x20, [sp, 16] + stp x21, x22, [sp, 32] + stp x23, x24, [sp, 48] + stp x25, x26, [sp, 64] + tbz x0, 12, .L2883 + adrp x2, .LANCHOR4 + add x2, x2, :lo12:.LANCHOR4 + adrp x0, .LC135 + add x2, x2, 712 + mov w1, 365 + add x0, x0, :lo12:.LC135 + bl printk +.L2883: + adrp x19, .LANCHOR5 + add x19, x19, :lo12:.LANCHOR5 + adrp x20, .LANCHOR0 + add x22, x20, :lo12:.LANCHOR0 + mov w2, 64 + mov w1, 0 + ldr x0, [x19, 448] + adrp x23, .LC207 + mov w25, 21321 + add x23, x23, :lo12:.LC207 + mov w24, 0 + movk w25, 0x5359, lsl 16 + bl ftl_memset + ldr x1, [x22, 1048] + mov w3, 16 + mov w2, 4 + adrp x0, .LC206 + add x0, x0, :lo12:.LC206 + bl rknand_print_hex + ldr x21, [x22, 1048] + add x0, x21, 16 + ldr w1, [x21, 8] + bl js_hash + str w0, [x21, 12] +.L2884: + ldrb w26, [x19, 456] + mov x0, x23 + ldrh w21, [x19, 458] + mov w1, w26 + ldrh w20, [x22, 2] + mov w2, w21 + bl printk + ldrh w0, [x19, 172] + ldrh w1, [x19, 458] + sub w0, w0, #1 + cmp w1, w0 + blt .L2885 + ldr x1, [x22, 1048] + strh wzr, [x19, 458] + ldr w0, [x1, 4] + add w0, w0, 1 + str w0, [x1, 4] + ldrb w0, [x19, 456] + ldr x21, [x22, 1048] + ldrb w1, [x19, 457] + strb w0, [x19, 457] + mov x0, x21 + strb w1, [x19, 456] + ldrh w1, [x21, 16] + add w1, w1, 1 + strh w1, [x0, 16]! + ldr w1, [x21, 8] + bl js_hash + ldrb w20, [x19, 456] + str w0, [x21, 12] + ldrh w0, [x22, 2] + mul w20, w20, w0 +.L2894: + mov w1, w20 + mov w0, 0 + bl flash_erase_block + b .L2886 +.L2889: + mov w24, 1 + b .L2884 +.L2885: + madd w20, w20, w26, w21 + cbz w1, .L2894 +.L2886: + ldr x1, [x22, 1048] + mov w5, 1 + ldr x0, [x19, 448] + mov w4, 4 + ldr w1, [x1, 4] + str w1, [x0] + mov w1, w20 + ldr x0, [x19, 448] + str w25, [x0, 4] + mov w0, 0 + ldr x3, [x19, 448] + ldr x2, [x22, 1048] + bl flash_prog_page_en + cmn w0, #1 + ldrh w1, [x19, 458] + add w1, w1, 1 + strh w1, [x19, 458] + bne .L2887 + mov w1, w20 + adrp x0, .LC208 + add x0, x0, :lo12:.LC208 + bl printk + b .L2884 +.L2887: + cbz w24, .L2889 + mov w0, 0 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x29, x30, [sp], 80 + ret + .size flash_info_flush, .-flash_info_flush + .align 2 + .global flash_info_blk_init + .type flash_info_blk_init, %function +flash_info_blk_init: + stp x29, x30, [sp, -80]! + adrp x0, .LANCHOR2 + add x29, sp, 0 + ldr w0, [x0, #:lo12:.LANCHOR2] + stp x21, x22, [sp, 32] + adrp x22, .LANCHOR0 + stp x19, x20, [sp, 16] + stp x23, x24, [sp, 48] + stp x25, x26, [sp, 64] + tbz x0, 12, .L2896 + add x0, x22, :lo12:.LANCHOR0 + adrp x2, .LANCHOR4 + add x2, x2, :lo12:.LANCHOR4 + mov w3, 2048 + add x2, x2, 736 + mov w1, 50 + ldr x4, [x0, 1048] + adrp x0, .LC209 + add x0, x0, :lo12:.LC209 + bl printk +.L2896: + adrp x20, .LANCHOR5 + mov w25, 21321 + add x21, x20, :lo12:.LANCHOR5 + add x19, x22, :lo12:.LANCHOR0 + mov w24, 4 + movk w25, 0x5359, lsl 16 +.L2900: + mov w23, 0 +.L2899: + ldrh w1, [x19, 2] + mov w4, 4 + ldr x2, [x19, 1048] + mov w0, 0 + ldr x3, [x21, 448] + madd w1, w1, w24, w23 + bl flash_read_page_en + cmn w0, #1 + beq .L2897 + ldr x2, [x19, 1048] + ldr w0, [x2] + cmp w0, w25 + beq .L2898 +.L2897: + add w23, w23, 1 + cmp w23, 4 + bne .L2899 + add w24, w24, 1 + cmp w24, 16 + bne .L2900 +.L2926: + mov w0, -1 +.L2895: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x29, x30, [sp], 80 + ret +.L2908: + ldr x0, [x19, 1048] + ldr w1, [x0] + cmp w1, w25 + bne .L2909 + ldr w21, [x0, 4] +.L2902: + add x19, x20, :lo12:.LANCHOR5 + add x23, x22, :lo12:.LANCHOR0 + mov w4, 4 + ldrh w0, [x23, 2] + ldrb w1, [x19, 457] + ldr x3, [x19, 448] + ldr x2, [x23, 1048] + mul w1, w1, w0 + mov w0, 0 + bl flash_read_page_en + cmn w0, #1 + beq .L2903 + ldr x0, [x23, 1048] + mov w1, 21321 + movk w1, 0x5359, lsl 16 + ldr w2, [x0] + cmp w2, w1 + bne .L2903 + ldr w1, [x0, 4] + cmp w21, w1 + bcs .L2903 + ldrb w1, [x0, 37] + ldrb w0, [x0, 36] + strb w1, [x19, 456] + strb w0, [x19, 457] +.L2903: + add x21, x20, :lo12:.LANCHOR5 + add x19, x22, :lo12:.LANCHOR0 + mov w4, 4 + mov w0, 0 + mov w26, 21321 + mov x20, x19 + ldrb w1, [x21, 456] + mov w23, 0 + ldr x2, [x19, 1048] + movk w26, 0x5359, lsl 16 + ldr x3, [x21, 448] + bl flash_get_last_written_page + and w25, w0, 65535 + add w1, w25, 1 + ldrb w24, [x21, 456] + strh w1, [x21, 458] + ldrh w1, [x19, 2] + mul w24, w24, w1 + add w24, w24, w0, sxth +.L2904: + sub w0, w25, w23 + sxth w19, w0 + tbz w19, #31, .L2907 + cmn w19, #1 + bne .L2906 + add x22, x22, :lo12:.LANCHOR0 + ldr x0, [x22, 1048] + ldr w1, [x0] + adrp x0, .LC210 + add x0, x0, :lo12:.LC210 + bl printk + b .L2926 +.L2907: + ldr x2, [x20, 1048] + mov w4, 4 + ldr x3, [x21, 448] + sub w1, w24, w23 + mov w0, 0 + bl flash_read_page_en + cmn w0, #1 + beq .L2905 + ldr x0, [x20, 1048] + ldr w0, [x0] + cmp w0, w26 + beq .L2906 +.L2905: + add w23, w23, 1 + b .L2904 +.L2906: + cmp w23, 1 + bls .L2910 + bl flash_info_flush +.L2910: + mov w0, 0 + b .L2895 +.L2898: + ldrb w1, [x2, 37] + mov w4, 4 + ldrb w0, [x2, 36] + strb w1, [x21, 457] + ldrh w1, [x19, 2] + ldr x3, [x21, 448] + strb w0, [x21, 456] + mul w1, w1, w0 + mov w0, 0 + bl flash_read_page_en + cmn w0, #1 + bne .L2908 +.L2909: + mov w21, 0 + b .L2902 + .size flash_info_blk_init, .-flash_info_blk_init + .align 2 + .global nand_flash_init + .type nand_flash_init, %function +nand_flash_init: + stp x29, x30, [sp, -80]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x20, .LANCHOR2 + mov x19, x0 + stp x21, x22, [sp, 32] + ldr w0, [x20, #:lo12:.LANCHOR2] + stp x23, x24, [sp, 48] + str x25, [sp, 64] + tbz x0, 12, .L2928 + adrp x2, .LANCHOR4 + add x2, x2, :lo12:.LANCHOR4 + adrp x0, .LC135 + add x2, x2, 760 + mov w1, 3450 + add x0, x0, :lo12:.LC135 + bl printk +.L2928: + adrp x21, .LANCHOR5 + add x23, x21, :lo12:.LANCHOR5 + mov x0, x19 + adrp x19, .LANCHOR0 + add x22, x19, :lo12:.LANCHOR0 + mov w25, 44 + str wzr, [x23, 332] + bl nandc_init + add x0, x20, :lo12:.LANCHOR2 + mov w2, 8 + add x0, x0, 8 + str x0, [x22, 1144] + mov w0, 1 + strb w0, [x22, 1153] + mov w0, 3 + strb w0, [x22, 1205] + add x0, x22, 1196 + add x22, x22, 1216 + mov w1, 0 + mov x24, x22 + bl ftl_memset + add x0, x23, 176 + mov w23, 0 + mov w2, 32 + mov w1, 0 + bl ftl_memset +.L2934: + mov x1, x22 + mov w0, w23 + bl flash_read_id + cbnz w23, .L2929 + ldrb w0, [x24] + sub w0, w0, #1 + and w0, w0, 255 + cmp w0, 253 + bls .L2930 +.L2932: + mov w22, -2 +.L2927: + mov w0, w22 + ldr x25, [sp, 64] + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x29, x30, [sp], 80 + ret +.L2930: + ldrb w0, [x24, 1] + cmp w0, 255 + beq .L2932 +.L2929: + ldrb w0, [x22] + cmp w0, 181 + bne .L2933 + strb w25, [x22] +.L2933: + add w23, w23, 1 + add x22, x22, 8 + and w23, w23, 255 + cmp w23, 4 + bne .L2934 + add x7, x20, :lo12:.LANCHOR2 + add x9, x19, :lo12:.LANCHOR0 + add x7, x7, 441 + add x9, x9, 1216 + mov x8, 0 +.L2937: + ldrb w2, [x7, -1] + mov w10, w8 + lsl x24, x8, 5 + mov x1, x9 + mov x0, x7 + bl flash_mem_cmp8 + cbnz w0, .L2935 + add x2, x20, :lo12:.LANCHOR2 + ubfiz x10, x10, 5, 32 + add x0, x2, 440 + add x1, x2, 2008 + add x24, x0, x24 + add x0, x0, x10 + ldrb w3, [x0, 22] + mov x0, 0 +.L2936: + lsl x4, x0, 5 + mov w2, w0 + ldrb w4, [x4, x1] + cmp w4, w3 + beq .L2938 + add x0, x0, 1 + cmp x0, 4 + bne .L2936 + mov w2, w0 +.L2938: + add x22, x20, :lo12:.LANCHOR2 + ubfiz x1, x2, 5, 32 + add x0, x22, 2008 + add x23, x19, :lo12:.LANCHOR0 + add x1, x0, x1 + mov w2, 32 + add x0, x23, 1160 + add x22, x22, 8 + bl ftl_memcpy + mov w2, 32 + mov x1, x24 + mov x0, x22 + bl ftl_memcpy + ldrb w0, [x23, 1028] + cmp w0, 8 + bhi .L2939 + ldrb w1, [x22, 20] + cmp w1, 60 + bls .L2940 + mov w1, 60 + strb w1, [x22, 20] +.L2940: + cmp w0, 6 + beq .L2932 +.L2939: + ldr w0, [x20, #:lo12:.LANCHOR2] + tbz x0, 12, .L2941 + adrp x2, .LANCHOR4 + add x2, x2, :lo12:.LANCHOR4 + adrp x0, .LC135 + add x2, x2, 760 + mov w1, 3480 + add x0, x0, :lo12:.LC135 + bl printk +.L2941: + add x0, x19, :lo12:.LANCHOR0 + ldr x1, [x0, 1144] + ldrh w1, [x1, 10] + cmp w1, 1023 + bls .L2942 + mov w1, 2 + strb w1, [x0, 1205] +.L2942: + add x23, x21, :lo12:.LANCHOR5 + add x22, x19, :lo12:.LANCHOR0 + mov w0, 16384 + bl ftl_malloc + add x24, x20, :lo12:.LANCHOR2 + str x0, [x23, 352] + mov w0, 16384 + bl ftl_malloc + str x0, [x23, 304] + mov w0, 2048 + bl ftl_dma32_malloc + str x0, [x22, 1048] + mov w0, 64 + bl ftl_dma32_malloc + str x0, [x23, 344] + mov w0, 64 + bl ftl_dma32_malloc + str x0, [x23, 320] + mov w0, 64 + bl ftl_dma32_malloc + strb wzr, [x23, 460] + str x0, [x23, 448] + bl flash_die_info_init + ldrb w0, [x24, 26] + bl flash_lsb_page_tbl_build + ldrb w0, [x24, 28] + bl nandc_bch_sel + str xzr, [x23, 336] + ldr x3, [x22, 1144] + adrp x2, .LANCHOR3 + add x2, x2, :lo12:.LANCHOR3 + ldrh w0, [x3, 16] + ubfx x1, x0, 8, 3 + strb w1, [x22, 1248] + ubfx x1, x0, 3, 1 + strb w1, [x23, 368] + ubfx x1, x0, 4, 1 + strb w1, [x22, 1250] + ubfx x1, x0, 12, 1 + strb w1, [x2, 1336] + ubfx x1, x0, 13, 1 + strb w1, [x2, 1322] + ubfx x1, x0, 11, 1 + strb w1, [x22, 1212] + ldrb w1, [x3, 31] + ubfx x4, x1, 1, 1 + strb w4, [x2, 1950] + ubfx x4, x1, 2, 1 + strb w4, [x23, 461] + ubfx x4, x0, 14, 1 + lsr w0, w0, 15 + strb w0, [x2, 1323] + ubfx x2, x1, 3, 1 + ldrb w0, [x3, 28] + ubfx x1, x1, 4, 1 + strb w2, [x22, 1204] + strb w1, [x22, 1213] + mov w1, 60 + ldrb w2, [x22, 1028] + strb w4, [x22, 1] + strb w0, [x19, #:lo12:.LANCHOR0] + cmp w2, 9 + strb w1, [x22, 1152] + bne .L2943 + mov w1, 70 + strb w1, [x22, 1152] +.L2943: + add x1, x19, :lo12:.LANCHOR0 + strb w0, [x1, 1154] + add x0, x20, :lo12:.LANCHOR2 + add x0, x0, 8 + ldrb w3, [x0, 31] + tbz x3, 0, .L2944 + ldrb w0, [x0, 29] + cbz w0, .L2945 + mov w0, 2 +.L3007: + strb w0, [x1, 1154] +.L2944: + cmp w2, 8 + bne .L2946 + add x0, x19, :lo12:.LANCHOR0 + mov w2, 137 + ldrb w1, [x0, 1216] + cmp w1, 44 + ccmp w1, w2, 4, ne + bne .L2946 + add x1, x20, :lo12:.LANCHOR2 + ldrb w1, [x1, 36] + cmp w1, 3 + bne .L2946 + strb wzr, [x0, 1154] +.L2946: + add x1, x20, :lo12:.LANCHOR2 + add x2, x19, :lo12:.LANCHOR0 + add x1, x1, 8 + ldrb w0, [x1, 19] + ldrh w1, [x1, 16] + strb w0, [x2, 1136] + tbz x1, 6, .L2948 + sub w1, w0, #17 + and w1, w1, 255 + cmp w1, 2 + ccmp w0, 21, 4, hi + bne .L2949 + add x1, x21, :lo12:.LANCHOR5 + adrp x2, micron_read_retrial + add x2, x2, :lo12:micron_read_retrial + cmp w0, 21 + str x2, [x1, 336] + beq .L2950 + mov w0, 15 +.L3009: + strb w0, [x1, 328] +.L2948: + ldr w0, [x20, #:lo12:.LANCHOR2] + tbz x0, 12, .L2959 + adrp x2, .LANCHOR4 + add x2, x2, :lo12:.LANCHOR4 + adrp x0, .LC135 + add x2, x2, 760 + mov w1, 3573 + add x0, x0, :lo12:.LC135 + bl printk +.L2959: + add x0, x19, :lo12:.LANCHOR0 + ldrb w1, [x0, 1248] + strb wzr, [x0, 1192] + tbz x1, 0, .L2960 + ldrb w0, [x0, 1216] + cmp w0, 155 + beq .L2961 + mov w0, 4 + bl flash_set_interface_mode + mov w0, 4 + bl nandc_set_if_mode +.L2961: + mov w0, 1 + bl flash_set_interface_mode + mov w0, 1 +.L3012: + bl nandc_set_if_mode + bl flash_info_blk_init + mov w22, w0 + cmn w0, #1 + bne .L2963 + add x19, x19, :lo12:.LANCHOR0 + mov w1, 17 + ldr x0, [x19, 1048] + strb wzr, [x19, 1208] + strb w1, [x0, 32] + mov w0, 0 + bl zftl_flash_exit_slc_mode + b .L2927 +.L2935: + add x8, x8, 1 + add x7, x7, 32 + cmp x8, 49 + bne .L2937 + b .L2932 +.L2945: + mov w0, 3 + b .L3007 +.L2950: + mov w0, 4 + b .L3009 +.L2949: + sub w1, w0, #65 + cmp w0, 33 + and w1, w1, 255 + ccmp w1, 1, 0, ne + bhi .L2952 + add x0, x21, :lo12:.LANCHOR5 + adrp x1, toshiba_read_retrial + add x1, x1, :lo12:toshiba_read_retrial + str x1, [x0, 336] + mov w1, 4 + strb w1, [x2, 1137] +.L3013: + mov w1, 7 +.L3011: + strb w1, [x0, 328] + b .L2948 +.L2952: + sub w3, w0, #34 + sub w1, w0, #67 + and w3, w3, 255 + and w1, w1, 255 + cmp w3, 1 + ccmp w1, 1, 0, hi + bhi .L2953 + add x2, x21, :lo12:.LANCHOR5 + adrp x3, toshiba_read_retrial + add x3, x3, :lo12:toshiba_read_retrial + cmp w0, 35 + str x3, [x2, 336] + mov w3, 68 + ccmp w0, w3, 4, ne + beq .L2954 + mov w0, 7 +.L3008: + strb w0, [x2, 328] + cmp w1, 1 + add x0, x19, :lo12:.LANCHOR0 + bhi .L2956 + mov w1, 4 +.L3010: + strb w1, [x0, 1137] + b .L2948 +.L2954: + mov w0, 17 + b .L3008 +.L2956: + mov w1, 5 + b .L3010 +.L2953: + sub w1, w0, #36 + and w1, w1, 255 + cmp w1, 1 + bhi .L2957 + add x0, x21, :lo12:.LANCHOR5 + adrp x1, toshiba_3d_read_retrial + add x1, x1, :lo12:toshiba_3d_read_retrial + str x1, [x0, 336] + b .L3013 +.L2957: + cmp w0, 50 + bne .L2958 + add x0, x21, :lo12:.LANCHOR5 + adrp x1, samsung_read_retrial + add x1, x1, :lo12:samsung_read_retrial + str x1, [x0, 336] + mov w1, 25 + b .L3011 +.L2958: + cmp w0, 81 + bne .L2948 + add x0, x21, :lo12:.LANCHOR5 + adrp x1, ymtc_3d_read_retrial + add x1, x1, :lo12:ymtc_3d_read_retrial + strb wzr, [x2, 1251] + str x1, [x0, 336] + mov w1, 7 + strb w1, [x0, 328] + b .L2948 +.L2960: + mov w0, 4 + b .L3012 +.L2963: + add x0, x20, :lo12:.LANCHOR2 + ldrb w0, [x0, 15] + cmp w0, 9 + bne .L2964 + add x0, x19, :lo12:.LANCHOR0 + ldr x1, [x0, 1048] + ldrb w1, [x1, 20] + cmp w1, 1 + beq .L2964 + strb wzr, [x0, 1154] +.L2964: + add x0, x19, :lo12:.LANCHOR0 + ldrb w0, [x0, 1136] + sub w0, w0, #1 + and w0, w0, 255 + cmp w0, 7 + bhi .L2965 + add x0, x21, :lo12:.LANCHOR5 + adrp x1, hynix_read_retrial + add x1, x1, :lo12:hynix_read_retrial + str x1, [x0, 336] +.L2965: + add x19, x19, :lo12:.LANCHOR0 + ldrb w0, [x19, 1248] + tbz x0, 2, .L2967 + ldr x0, [x19, 1048] + ldrb w0, [x0, 19] + cbz w0, .L2967 + add x21, x21, :lo12:.LANCHOR5 + ldrh w0, [x19, 2] + ldrb w1, [x21, 456] + mul w1, w1, w0 + mov w0, 0 + bl flash_ddr_para_scan + ldrb w0, [x19, 1192] + cbnz w0, .L2967 + ldr x0, [x19, 1048] + strb wzr, [x0, 19] + bl flash_info_flush +.L2967: + ldr w0, [x20, #:lo12:.LANCHOR2] + tbz x0, 12, .L2969 + adrp x2, .LANCHOR4 + add x2, x2, :lo12:.LANCHOR4 + adrp x0, .LC135 + add x2, x2, 760 + mov w1, 3676 + add x0, x0, :lo12:.LC135 + bl printk +.L2969: + bl nand_flash_print_info + mov w22, 0 + b .L2927 + .size nand_flash_init, .-nand_flash_init + .align 2 + .global ftl_sysblk_dump + .type ftl_sysblk_dump, %function +ftl_sysblk_dump: + sub sp, sp, #144 + stp x29, x30, [sp, 48] + add x29, sp, 48 + stp x19, x20, [sp, 64] + mov w20, 0 + stp x25, x26, [sp, 112] + adrp x26, .LANCHOR3 + stp x27, x28, [sp, 128] + add x26, x26, :lo12:.LANCHOR3 + stp x21, x22, [sp, 80] + adrp x22, .LC195 + stp x23, x24, [sp, 96] + and w24, w0, 65535 + mov w0, 1 + bl buf_alloc + ldr x27, [x0, 8] + mov x25, x0 + add x22, x22, :lo12:.LC195 + mov w19, 0 + mov w28, 1 +.L3015: + ldrh w0, [x26, 1376] + cmp w0, w19 + bhi .L3017 + add x1, x27, 704 + mov w3, 32 + mov w2, 4 + adrp x0, .LC211 + add x0, x0, :lo12:.LC211 + bl rknand_print_hex + mov x0, x25 + bl zbuf_free + cbz w20, .L3018 + adrp x1, .LANCHOR4 + add x1, x1, :lo12:.LANCHOR4 + add x1, x1, 776 + mov w2, 1619 + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack +.L3018: + mov w0, w20 + ldp x19, x20, [sp, 64] + ldp x21, x22, [sp, 80] + ldp x23, x24, [sp, 96] + ldp x25, x26, [sp, 112] + ldp x27, x28, [sp, 128] + ldp x29, x30, [sp, 48] + add sp, sp, 144 + ret +.L3017: + ldrh w21, [x26, 1410] + ldrb w3, [x26, 1946] + ldr x1, [x25, 8] + ldr x2, [x25, 24] + madd w21, w21, w24, w19 + mov w0, w21 + bl ftl_read_ppa_page + mov w23, w0 + ldr x1, [x25, 24] + mov w4, w0 + ldr x0, [x25, 8] + mov w3, w21 + ldr w2, [x1, 12] + str w2, [sp, 32] + ldr w2, [x1, 8] + str w2, [sp, 24] + ldr w2, [x1, 4] + str w2, [sp, 16] + mov w2, w19 + add w19, w19, 1 + ldr w1, [x1] + and w19, w19, 65535 + str w1, [sp, 8] + ldr w1, [x0, 12] + str w1, [sp] + mov w1, w24 + ldp w5, w6, [x0] + ldr w7, [x0, 8] + mov x0, x22 + bl printk + cmp w23, 512 + ccmn w23, #1, 4, ne + csel w20, w20, w28, ne + b .L3015 + .size ftl_sysblk_dump, .-ftl_sysblk_dump + .align 2 + .global ftl_open_sblk_recovery + .type ftl_open_sblk_recovery, %function +ftl_open_sblk_recovery: + stp x29, x30, [sp, -352]! + add x29, sp, 0 + stp x21, x22, [sp, 32] + adrp x21, .LANCHOR2 + stp x19, x20, [sp, 16] + mov x19, x0 + ldr w0, [x21, #:lo12:.LANCHOR2] + stp x23, x24, [sp, 48] + stp x25, x26, [sp, 64] + stp x27, x28, [sp, 80] + str x1, [x29, 112] + tbz x0, 12, .L3026 + ldrh w1, [x19, 2] + adrp x0, .LC212 + add x0, x0, :lo12:.LC212 + bl printk +.L3026: + ldr w0, [x21, #:lo12:.LANCHOR2] + tbz x0, 12, .L3027 + ldrb w1, [x19, 5] + adrp x0, .LC213 + add x0, x0, :lo12:.LC213 + bl printk +.L3027: + ldr w0, [x21, #:lo12:.LANCHOR2] + tbz x0, 12, .L3028 + ldrh w1, [x19] + adrp x0, .LC214 + add x0, x0, :lo12:.LC214 + bl printk +.L3028: + ldr w0, [x21, #:lo12:.LANCHOR2] + tbz x0, 12, .L3029 + ldrh w2, [x19, 18] + adrp x0, .LC215 + ldrh w1, [x19, 16] + add x0, x0, :lo12:.LC215 + bl printk +.L3029: + ldr w0, [x21, #:lo12:.LANCHOR2] + tbz x0, 12, .L3030 + ldrb w1, [x19, 9] + adrp x0, .LC216 + add x0, x0, :lo12:.LC216 + bl printk +.L3030: + ldrh w0, [x19, 10] + adrp x24, .LANCHOR0 + strh w0, [x19, 14] + add x0, x24, :lo12:.LANCHOR0 + ldrh w1, [x19] + ldrh w0, [x0, 1096] + cmp w1, w0 + bcs .L3025 + mov w0, 1 + bl buf_alloc + adrp x20, .LANCHOR3 + mov x27, x0 + add x0, x20, :lo12:.LANCHOR3 + add x25, x29, 160 + mov w2, 64 + add x28, x29, 288 + ldr x1, [x27, 8] + ldrb w0, [x0, 1946] + sub w0, w0, #2 + sbfiz x0, x0, 9, 32 + add x0, x1, x0 + mov w1, 255 + str x0, [x29, 144] + mov x0, x25 + bl ftl_memset + mov w2, 64 + mov w1, 255 + add x0, x29, 224 + bl ftl_memset + mov w2, 64 + mov w1, 255 + mov x0, x28 + bl ftl_memset + ldrb w22, [x19, 5] + mov w0, 2 + ldrh w23, [x19, 2] + str w0, [x29, 152] + adrp x0, .LANCHOR5 + str wzr, [x29, 120] + add x0, x0, :lo12:.LANCHOR5 + str x0, [x29, 104] +.L3032: + add x0, x20, :lo12:.LANCHOR3 + ldrh w0, [x0, 1376] + cmp w0, w23 + bhi .L3049 +.L3035: + add x2, x20, :lo12:.LANCHOR3 + ldrh w0, [x19, 10] + ldrh w1, [x19, 6] + strh w23, [x19, 2] + add w1, w1, w0 + ldrh w2, [x2, 1376] + ldrb w0, [x19, 9] + strb w22, [x19, 5] + mul w0, w0, w2 + cmp w1, w0 + beq .L3050 + adrp x1, .LANCHOR4 + add x1, x1, :lo12:.LANCHOR4 + add x1, x1, 792 + mov w2, 1802 + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack +.L3050: + add x0, x20, :lo12:.LANCHOR3 + ldrh w3, [x19, 10] + mov w1, 0 + ldr x4, [x0, 1928] + mov w0, 0 +.L3051: + cmp w1, w3 + bcc .L3053 + add x1, x20, :lo12:.LANCHOR3 + ldrb w22, [x19, 9] + ldrh w1, [x1, 1376] + madd w22, w22, w1, w0 + ldr w0, [x21, #:lo12:.LANCHOR2] + sub w22, w22, w3 + and w22, w22, 65535 + tbz x0, 12, .L3054 + add x0, x24, :lo12:.LANCHOR0 + ldrh w1, [x19] + ldr x0, [x0, 1120] + ubfiz x2, x1, 1, 16 + ldrh w3, [x0, x2] + adrp x0, .LC219 + mov w2, w22 + add x0, x0, :lo12:.LC219 + bl printk +.L3054: + add x0, x24, :lo12:.LANCHOR0 + ldrh w1, [x19] + ldr x0, [x0, 1120] + strh w22, [x0, x1, lsl 1] + ldr w0, [x21, #:lo12:.LANCHOR2] + tbz x0, 14, .L3055 + ldp w1, w2, [x29, 160] + adrp x0, .LC220 + ldp w3, w4, [x29, 168] + add x0, x0, :lo12:.LC220 + bl printk +.L3055: + add x0, x20, :lo12:.LANCHOR3 + mov w1, 0 + mov x23, 0 + ldrb w2, [x0, 1946] + ldr x0, [x27, 8] + lsl w2, w2, 9 + bl ftl_memset + adrp x0, .LC221 + add x0, x0, :lo12:.LC221 + str x0, [x29, 128] + adrp x0, .LC222 + add x0, x0, :lo12:.LC222 + str x0, [x29, 112] +.L3056: + add x1, x20, :lo12:.LANCHOR3 + ldr w2, [x29, 152] + str w23, [x29, 140] + ldrb w0, [x1, 1321] + mul w0, w0, w2 + cmp w23, w0 + bcc .L3068 + adrp x22, .LC223 + adrp x23, .LC222 + mov x20, x1 + add x22, x22, :lo12:.LC223 + add x23, x23, :lo12:.LC222 + mov x24, 0 +.L3069: + ldrb w0, [x20, 1321] + ldr w1, [x29, 152] + mul w0, w0, w1 + cmp w0, w24 + bhi .L3075 + mov x0, x27 + bl zbuf_free + ldrh w1, [x19, 12] + ldrh w0, [x20, 1376] + ldrb w2, [x19, 9] + madd w0, w0, w2, w1 + mov x1, -4 + add x0, x1, w0, sxtw 2 + ldr x1, [x20, 1928] + ldr w0, [x1, x0] + cmn w0, #1 + beq .L3076 + adrp x1, .LANCHOR4 + add x1, x1, :lo12:.LANCHOR4 + add x1, x1, 792 + mov w2, 1917 + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack +.L3076: + ldrh w0, [x19, 6] + cmp w0, 1 + bne .L3025 + mov x0, x19 + bl ftl_write_last_log_page +.L3025: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 352 + ret +.L3049: + ldrb w22, [x19, 5] +.L3033: + ldrb w0, [x19, 9] + cmp w0, w22 + bhi .L3048 + add w23, w23, 1 + strb wzr, [x19, 5] + and w23, w23, 65535 + b .L3032 +.L3048: + add x0, x19, w22, sxtw 1 + ldrh w0, [x0, 16] + str w0, [x29, 140] + mov w0, 65535 + ldr w1, [x29, 140] + cmp w1, w0 + beq .L3034 + add x0, x20, :lo12:.LANCHOR3 + ldr w2, [x29, 140] + ldrh w1, [x0, 1410] + ldrb w3, [x0, 1946] + madd w1, w1, w2, w23 + ldr x2, [x27, 24] + str w1, [x29, 128] + ldr x1, [x27, 8] + ldr w0, [x29, 128] + bl ftl_read_ppa_page + mov w26, w0 + cmp w0, 512 + beq .L3035 + cmn w0, #1 + beq .L3036 + ldr x0, [x27, 24] + ldr w1, [x0] + cmn w1, #1 + bne .L3036 + ldr w0, [x0, 4] + cmn w0, #1 + bne .L3036 + ldr x0, [x27, 8] + ldr w0, [x0] + cmn w0, #1 + beq .L3035 +.L3036: + adrp x0, .LANCHOR5 + add x0, x0, :lo12:.LANCHOR5 + mov w1, 1 + strb w1, [x0, 401] + ldrb w0, [x19, 9] + ldrh w1, [x19, 10] + madd w0, w0, w23, w22 + cmp w1, w0 + beq .L3037 + adrp x1, .LANCHOR4 + add x1, x1, :lo12:.LANCHOR4 + add x1, x1, 792 + mov w2, 1694 + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack +.L3037: + ldrh w0, [x19, 10] + ldrh w1, [x19, 6] + ldrb w2, [x19, 9] + add w1, w1, w0 + add x0, x20, :lo12:.LANCHOR3 + ldrh w0, [x0, 1376] + mul w0, w0, w2 + cmp w1, w0 + beq .L3038 + adrp x1, .LANCHOR4 + add x1, x1, :lo12:.LANCHOR4 + add x1, x1, 792 + mov w2, 1695 + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack +.L3038: + add x0, x20, :lo12:.LANCHOR3 + str x0, [x29, 152] + ldrb w0, [x0, 1946] + cmp w0, 8 + bls .L3039 + ldr x0, [x27, 24] + mov w2, 15555 + movk w2, 0xf55f, lsl 16 + ldr w1, [x0] + cmp w1, w2 + beq .L3039 + cmn w26, #1 + beq .L3041 + ldr w1, [x0, 4] + cmn w1, #1 + bne .L3042 +.L3045: + ldr x1, [x27, 24] + ldr w0, [x1, 4] + cmn w0, #1 + bne .L3043 +.L3041: + ldrh w0, [x19, 6] + sub w0, w0, #1 + strh w0, [x19, 6] + ldrh w0, [x19, 10] + add w0, w0, 1 + strh w0, [x19, 10] + mov w0, 4 + str w0, [x29, 152] + mov w0, 1 + str w0, [x29, 120] +.L3034: + add w22, w22, 1 + and w22, w22, 65535 + b .L3033 +.L3042: + ldr w1, [x0, 16] + mov w2, 21320 + movk w2, 0x4841, lsl 16 + cmp w1, w2 + bne .L3045 + ldr w2, [x0, 20] + mov w1, 1024 + ldr x0, [x29, 144] + str w2, [x29, 152] + bl js_hash + ldr w2, [x29, 152] + cmp w2, w0 + beq .L3045 + ldr x0, [x29, 144] + mov w1, 1024 + bl js_hash + mov w5, w0 + ldr w3, [x29, 128] + mov w4, w26 + ldr w1, [x29, 140] + mov w2, w23 + adrp x0, .LC217 + add x0, x0, :lo12:.LC217 + bl printk + ldr x1, [x29, 144] + mov w3, 16 + mov w2, 4 + adrp x0, .LC218 + add x0, x0, :lo12:.LC218 + bl rknand_print_hex + add x0, x20, :lo12:.LANCHOR3 + ldr x1, [x27, 24] + mov w2, 4 + ldrb w0, [x0, 1946] + lsr w3, w0, 1 + adrp x0, .LC183 + add x0, x0, :lo12:.LC183 + bl rknand_print_hex + b .L3041 +.L3039: + cmn w26, #1 + bne .L3045 + b .L3041 +.L3043: + ldr w1, [x1] + mov w2, 15555 + movk w2, 0xf55f, lsl 16 + cmp w1, w2 + beq .L3041 + bl lpa_hash_get_ppa + ldr x1, [x29, 112] + cbz x1, .L3046 + ldr x3, [x27, 24] + ldr w1, [x3, 8] + cmp w0, w1 + beq .L3046 + cmn w0, #1 + beq .L3046 + add x7, x24, :lo12:.LANCHOR0 + add x4, x20, :lo12:.LANCHOR3 + mov w5, 24 + mov w26, 1 + ldrb w1, [x7, 1205] + ldrh w8, [x4, 1304] + sub w1, w5, w1 + sub w1, w1, w8 + lsr w2, w0, w8 + lsl w1, w26, w1 + sub w1, w1, #1 + and w1, w1, w2 + ldrb w2, [x4, 1306] + udiv w1, w1, w2 + ldr x2, [x29, 112] + ldrh w2, [x2] + cmp w2, w1, uxth + bne .L3046 + ldr x1, [x29, 104] + ldr w8, [x3] + ldrb w3, [x4, 1946] + stp w5, w8, [x29, 136] + ldr x2, [x1, 376] + ldr x1, [x27, 8] + str x7, [x29, 120] + str x4, [x29, 152] + bl ftl_read_ppa_page + ldr x0, [x29, 104] + ldr w8, [x29, 140] + ldr x0, [x0, 376] + ldr w0, [x0] + cmp w8, w0 + bhi .L3046 + ldr x0, [x27, 24] + ldr w3, [x0, 8] + cmn w3, #1 + beq .L3041 + ldr x7, [x29, 120] + ldr x4, [x29, 152] + ldr w5, [x29, 136] + ldrb w2, [x7, 1205] + ldrh w1, [x4, 1304] + sub w5, w5, w2 + sub w5, w5, w1 + lsr w0, w3, w1 + lsl w26, w26, w5 + sub w26, w26, #1 + and w26, w26, w0 + ldrb w0, [x4, 1306] + udiv w0, w26, w0 + bl ftl_vpn_decrement + b .L3041 +.L3053: + ldrh w2, [x19, 12] + add w2, w2, w1 + ldr w2, [x4, x2, lsl 2] + cmn w2, #1 + beq .L3052 + add w22, w0, 1 + and w0, w22, 65535 +.L3052: + add w1, w1, 1 + b .L3051 +.L3068: + ldr w0, [x25, x23, lsl 2] + cmn w0, #1 + bne .L3057 +.L3061: + add x1, x24, :lo12:.LANCHOR0 + ldr x0, [x27, 24] + mov w22, -1 + mov x2, 0 + ldr x1, [x1, 3384] + ldr w1, [x1, 8] + str w1, [x0] + ldr x0, [x27, 24] + str w22, [x0, 4] + ldr x0, [x27, 24] + str w22, [x0, 8] + ldr x0, [x27, 24] + str wzr, [x0, 12] + ldr x0, [x27, 24] + str wzr, [x0, 16] + ldr x0, [x27, 8] + str wzr, [x0] + mov w0, 2 + ldr x1, [x27, 24] + add x1, x1, 16 + bl ftl_debug_info_fill +.L3058: + ldr w0, [x29, 120] + cbz w0, .L3063 + ldrh w0, [x19, 6] + cmp w0, 1 + bls .L3063 + add x0, x20, :lo12:.LANCHOR3 + str x0, [x29, 144] +.L3122: + mov x0, x19 + bl ftl_get_new_free_page + mov w26, w0 + ldr w0, [x21, #:lo12:.LANCHOR2] + tbz x0, 14, .L3065 + ldrh w0, [x19, 12] + mov w1, w26 + ldrh w3, [x19, 10] + add w3, w3, w0 + ldr x0, [x27, 24] + sub w3, w3, #1 + ldr w2, [x0, 4] + ldr x0, [x29, 112] + bl printk +.L3065: + ldr x0, [x29, 144] + ldr w2, [x29, 152] + ldrh w1, [x19, 6] + ldrb w0, [x0, 1321] + mul w0, w0, w2 + ldr w2, [x29, 140] + add w0, w0, 1 + sub w0, w0, w2 + cmp w1, w0 + bls .L3063 + ldr x0, [x29, 144] + ldr x1, [x27, 8] + ldr x2, [x27, 24] + ldrb w3, [x0, 1946] + mov w0, w26 + bl ftl_prog_ppa_page + mov w1, w0 + ldrh w0, [x19] + str w1, [x29, 104] + bl ftl_vpn_decrement + ldr w1, [x29, 104] + cmn w22, #1 + ccmn w1, #1, 4, ne + beq .L3066 + add x0, x29, 224 + ldrh w1, [x19, 12] + str w26, [x0, x23, lsl 2] + ldrh w0, [x19, 10] + add w0, w0, w1 + sub w0, w0, #1 + str w0, [x28, x23, lsl 2] +.L3063: + add x23, x23, 1 + b .L3056 +.L3057: + ldrb w3, [x1, 1946] + ldr x2, [x27, 24] + ldr x1, [x27, 8] + bl ftl_read_ppa_page + mov w22, w0 + ldr x0, [x27, 24] + ldr w0, [x0, 4] + bl lpa_hash_get_ppa + mov w26, w0 + ldr w0, [x21, #:lo12:.LANCHOR2] + tbz x0, 14, .L3059 + ldr x0, [x27, 24] + mov w1, w26 + ldr w2, [x25, x23, lsl 2] + ldr w3, [x0, 4] + ldr x0, [x29, 128] + bl printk +.L3059: + ldr w0, [x25, x23, lsl 2] + mov w1, 1 + mov x2, 0 + cmp w26, w0 + ldr x0, [x27, 24] + csinv w22, w22, wzr, eq + str w26, [x0, 8] + ldr x0, [x27, 24] + str w1, [x0, 12] + ldr x0, [x27, 24] + str wzr, [x0, 16] + mov w0, 2 + ldr x1, [x27, 24] + add x1, x1, 16 + bl ftl_debug_info_fill + cmn w22, #1 + bne .L3058 + b .L3061 +.L3066: + ldrh w0, [x19, 6] + cmp w0, 1 + bls .L3063 + cmn w22, #1 + bne .L3122 + b .L3063 +.L3075: + add x0, x29, 224 + ldr w0, [x0, x24, lsl 2] + cmn w0, #1 + beq .L3071 + ldrb w3, [x20, 1946] + ldr w0, [x25, x24, lsl 2] + ldr x1, [x27, 8] + ldr x2, [x27, 24] + bl ftl_read_ppa_page + cmp w0, 256 + ccmn w0, #1, 4, ne + bne .L3071 + add x0, x29, 224 + ldrb w3, [x20, 1946] + ldr x1, [x27, 8] + ldr x2, [x27, 24] + ldr w0, [x0, x24, lsl 2] + bl ftl_read_ppa_page + mov w26, w0 + ldr w0, [x21, #:lo12:.LANCHOR2] + tbz x0, 14, .L3073 + ldr x0, [x27, 24] + mov w1, w26 + ldr w3, [x25, x24, lsl 2] + ldr w2, [x0, 8] + mov x0, x23 + bl printk +.L3073: + cmn w26, #1 + beq .L3071 + ldr x0, [x27, 24] + ldr w2, [x25, x24, lsl 2] + ldr w1, [x0, 8] + cmp w2, w1 + bne .L3071 + ldr w1, [x21, #:lo12:.LANCHOR2] + tbz x1, 14, .L3074 + ldr w1, [x0, 4] + mov x0, x22 + ldr w3, [x28, x24, lsl 2] + bl printk +.L3074: + ldr x0, [x27, 24] + lsl x1, x24, 2 + ldrh w2, [x28, x1] + ldr w1, [x0, 8] + ldr w0, [x0, 4] + bl lpa_hash_update_ppa +.L3071: + add x24, x24, 1 + b .L3069 +.L3046: + ldr x2, [x27, 24] + add x1, x24, :lo12:.LANCHOR0 + ldr w0, [x1, 3364] + ldr w3, [x2, 4] + cmp w3, w0 + bcs .L3041 + add x4, x20, :lo12:.LANCHOR3 + ldrb w0, [x19, 9] + ldrh w3, [x19, 10] + ldrh w4, [x4, 1376] + mul w0, w0, w4 + sub w0, w0, #1 + cmp w3, w0 + bge .L3041 + ldr x0, [x1, 3384] + ldr w2, [x2] + ldr w1, [x0, 8] + cmp w2, w1 + bls .L3047 + str w2, [x0, 8] +.L3047: + ldr x0, [x27, 24] + ldrh w1, [x19, 12] + ldrh w2, [x19, 10] + add w2, w2, w1 + ldr w1, [x0, 8] + ldr w0, [x0, 4] + bl lpa_hash_update_ppa + ldr w0, [x29, 164] + str w0, [x29, 160] + ldr w0, [x29, 168] + str w0, [x29, 164] + ldr w0, [x29, 172] + str w0, [x29, 168] + ldr w0, [x29, 128] + str w0, [x29, 172] + b .L3041 + .size ftl_open_sblk_recovery, .-ftl_open_sblk_recovery + .align 2 + .global dump_ftl_info + .type dump_ftl_info, %function +dump_ftl_info: + stp x29, x30, [sp, -32]! + adrp x0, .LC224 + add x0, x0, :lo12:.LC224 + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x19, .LANCHOR0 + add x19, x19, :lo12:.LANCHOR0 + adrp x20, .LANCHOR3 + add x20, x20, :lo12:.LANCHOR3 + ldrb w1, [x19, 3353] + bl printk + adrp x0, .LANCHOR5 + add x0, x0, :lo12:.LANCHOR5 + ldrh w3, [x0, 386] + ldrb w2, [x0, 385] + ldrb w1, [x0, 384] + adrp x0, .LC225 + add x0, x0, :lo12:.LC225 + bl printk + ldr x0, [x19, 3384] + ldrh w2, [x0, 140] + ldrh w1, [x0, 130] + adrp x0, .LC226 + add x0, x0, :lo12:.LC226 + bl printk + ldr x1, [x19, 1128] + adrp x0, .LC227 + add x0, x0, :lo12:.LC227 + ldrh w5, [x1, 26] + ldrh w4, [x1, 22] + ldrb w3, [x1, 21] + ldrh w2, [x1, 18] + ldrh w1, [x1, 16] + bl printk + ldr x1, [x19, 1128] + adrp x0, .LC228 + add x0, x0, :lo12:.LC228 + ldrh w5, [x1, 58] + ldrh w4, [x1, 54] + ldrb w3, [x1, 53] + ldrh w2, [x1, 50] + ldrh w1, [x1, 48] + bl printk + ldr x1, [x19, 1128] + adrp x0, .LC229 + add x0, x0, :lo12:.LC229 + ldrh w5, [x1, 90] + ldrh w4, [x1, 86] + ldrb w3, [x1, 85] + ldrh w2, [x1, 82] + ldrh w1, [x1, 80] + bl printk + ldrb w0, [x20, 1321] + mov w2, 4 + ldrh w3, [x20, 1376] + ldr x1, [x20, 1928] + mul w3, w3, w0 + adrp x0, .LC230 + add x0, x0, :lo12:.LC230 + lsl w3, w3, 1 + bl rknand_print_hex + ldrh w3, [x19, 1096] + mov w2, 2 + ldr x1, [x19, 1120] + adrp x0, .LC231 + add x0, x0, :lo12:.LC231 + bl rknand_print_hex + ldr x1, [x19, 3384] + mov w2, 4 + adrp x0, .LC211 + add x0, x0, :lo12:.LC211 + add x1, x1, 704 + ldrh w3, [x1, -6] + bl rknand_print_hex + ldrh w3, [x19, 1096] + mov w2, 4 + ldr x1, [x19, 1104] + adrp x0, .LC232 + add x0, x0, :lo12:.LC232 + bl rknand_print_hex + add x1, x20, 1416 + mov w3, 256 + mov w2, 2 + adrp x0, .LC233 + add x0, x0, :lo12:.LC233 + bl rknand_print_hex + ldrb w0, [x20, 1321] + mov w2, 2 + ldrh w3, [x20, 1376] + ldr x1, [x20, 1936] + mul w3, w3, w0 + adrp x0, .LC234 + add x0, x0, :lo12:.LC234 + lsl w3, w3, 1 + bl rknand_print_hex + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 32 + ret + .size dump_ftl_info, .-dump_ftl_info + .align 2 + .global pm_ppa_update_check + .type pm_ppa_update_check, %function +pm_ppa_update_check: + adrp x3, .LANCHOR0 + add x3, x3, :lo12:.LANCHOR0 + adrp x6, .LANCHOR3 + add x6, x6, :lo12:.LANCHOR3 + mov w5, 24 + ldrb w4, [x3, 1205] + ldrh w7, [x6, 1304] + sub w4, w5, w4 + ldr x3, [x3, 1104] + sub w5, w4, w7 + mov w4, 1 + lsr w7, w2, w7 + lsl w4, w4, w5 + ldrb w5, [x6, 1306] + sub w4, w4, #1 + and w4, w4, w7 + udiv w4, w4, w5 + add x4, x3, w4, uxth 2 + ldrb w3, [x4, 2] + ubfx x3, x3, 5, 3 + cmp w3, 1 + ccmp w3, 7, 4, ne + bne .L3151 + mov w3, w2 + mov w2, w1 + mov x1, x0 + stp x29, x30, [sp, -16]! + adrp x0, .LC235 + add x0, x0, :lo12:.LC235 + add x29, sp, 0 + bl printk + bl dump_ftl_info + mov w0, -1 + ldp x29, x30, [sp], 16 + ret +.L3151: + mov w0, 0 + ret + .size pm_ppa_update_check, .-pm_ppa_update_check + .align 2 + .type load_l2p_region, %function +load_l2p_region: + stp x29, x30, [sp, -80]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + and w20, w0, 65535 + stp x21, x22, [sp, 32] + and x21, x1, 65535 + stp x23, x24, [sp, 48] + cmp w21, 31 + stp x25, x26, [sp, 64] + bls .L3157 + adrp x1, .LANCHOR4 + add x1, x1, :lo12:.LANCHOR4 + add x1, x1, 816 + mov w2, 32 + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack +.L3157: + adrp x23, .LANCHOR0 + add x22, x23, :lo12:.LANCHOR0 + adrp x19, .LANCHOR5 + ldr x0, [x22, 3384] + ldrh w2, [x0, 698] + cmp w2, w20 + bcs .L3158 + mov w1, w20 + adrp x0, .LC236 + add x19, x19, :lo12:.LANCHOR5 + add x0, x0, :lo12:.LC236 + bl printk + mov x0, 0 + mov w1, 255 + ldrh w2, [x19, 462] + ldr x0, [x0, 8] + bl ftl_memset + ldr x0, [x22, 3384] + ldrh w0, [x0, 698] + cmp w0, w20 + bcc .L3159 +.L3169: + mov w0, 0 +.L3156: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x29, x30, [sp], 80 + ret +.L3159: + mov w2, 37 +.L3170: + adrp x1, .LANCHOR4 + add x1, x1, :lo12:.LANCHOR4 + add x1, x1, 816 + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack + b .L3169 +.L3158: + add x0, x0, w20, sxtw 2 + adrp x22, .LANCHOR3 + lsl x1, x21, 4 + ldr w24, [x0, 704] + add x0, x22, :lo12:.LANCHOR3 + add x2, x0, 1960 + add x26, x2, x1 + strh w20, [x2, x1] + strh wzr, [x26, 2] + cbnz w24, .L3161 + add x19, x19, :lo12:.LANCHOR5 + mov w1, w20 + mov w2, 0 + adrp x0, .LC237 + add x0, x0, :lo12:.LC237 + bl printk + ldrh w2, [x19, 462] + mov w1, 255 + ldr x0, [x26, 8] + bl ftl_memset + b .L3169 +.L3161: + add x25, x19, :lo12:.LANCHOR5 + ldrb w3, [x0, 1946] + ldr x1, [x26, 8] + mov w0, w24 + ldr x2, [x25, 432] + bl ftl_read_ppa_page + ldr x1, [x25, 432] + ldr w2, [x1] + cmp w2, w20 + bne .L3162 + cmp w0, 512 + ccmn w0, #1, 4, ne + beq .L3162 +.L3166: + add x19, x19, :lo12:.LANCHOR5 + ldr x0, [x19, 432] + ldr w0, [x0] + cmp w20, w0 + beq .L3169 + mov w2, 73 + b .L3170 +.L3162: + add x23, x23, :lo12:.LANCHOR0 + mov w4, w24 + mov w3, w0 + mov w1, w20 + adrp x0, .LC238 + add x0, x0, :lo12:.LC238 + bl printk + add x22, x22, :lo12:.LANCHOR3 + ldr x1, [x23, 3384] + mov w2, 4 + adrp x0, .LC239 + add x0, x0, :lo12:.LC239 + add x1, x1, 704 + add x23, x19, :lo12:.LANCHOR5 + ldrh w3, [x1, -6] + bl rknand_print_hex + add x0, x22, 1960 + ldrb w3, [x22, 1946] + add x21, x0, x21, lsl 4 + mov w2, 4 + adrp x0, .LC218 + add x0, x0, :lo12:.LC218 + lsl w3, w3, 7 + ldr x1, [x21, 8] + bl rknand_print_hex + ldr x1, [x23, 432] + mov w3, 16 + mov w2, 4 + adrp x0, .LC240 + add x0, x0, :lo12:.LC240 + bl rknand_print_hex + ldrb w3, [x22, 1946] + mov w0, w24 + ldr x1, [x21, 8] + ldr x2, [x23, 432] + bl ftl_read_ppa_page + cmp w0, 512 + ccmn w0, #1, 4, ne + bne .L3165 + ldrh w2, [x23, 462] + mov w1, 255 + ldr x0, [x21, 8] + bl ftl_memset +.L3167: + mov w0, -1 + b .L3156 +.L3165: + ldr x0, [x23, 432] + ldr w0, [x0] + cmp w20, w0 + beq .L3166 + b .L3167 + .size load_l2p_region, .-load_l2p_region + .align 2 + .global pm_gc + .type pm_gc, %function +pm_gc: + stp x29, x30, [sp, -64]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x19, .LANCHOR0 + add x0, x19, :lo12:.LANCHOR0 + stp x21, x22, [sp, 32] + stp x23, x24, [sp, 48] + adrp x20, .LANCHOR5 + add x1, x20, :lo12:.LANCHOR5 + ldr x0, [x0, 3384] + ldrh w2, [x0, 688] + ldrh w0, [x1, 220] + sub w0, w0, #1 + cmp w2, w0 + bge .L3172 + ldr w0, [x1, 212] + cbz w0, .L3173 +.L3172: + bl pm_free_sblk + add x1, x19, :lo12:.LANCHOR0 + add x3, x20, :lo12:.LANCHOR5 + ldr x2, [x1, 3384] + ldrh w1, [x3, 220] + sub w1, w1, #1 + ldrh w4, [x2, 688] + cmp w4, w1 + bge .L3174 + ldr w1, [x3, 212] + cbz w1, .L3173 +.L3174: + add x20, x20, :lo12:.LANCHOR5 + add x0, x2, w0, uxth 1 + str wzr, [x20, 212] + mov w20, 65535 + ldrh w22, [x0, 416] + cmp w22, w20 + bne .L3176 + adrp x1, .LANCHOR4 + add x1, x1, :lo12:.LANCHOR4 + add x1, x1, 832 + mov w2, 182 + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack + bl pm_free_sblk + add x1, x19, :lo12:.LANCHOR0 + ldr x1, [x1, 3384] + add x0, x1, w0, uxth 1 + ldrh w22, [x0, 416] + cmp w22, w20 + beq .L3173 +.L3176: + bl pm_select_ram_region + adrp x24, .LANCHOR3 + and x21, x0, 65535 + add x0, x24, :lo12:.LANCHOR3 + lsl x1, x21, 4 + add x0, x0, 1960 + add x20, x0, x1 + mov x23, x21 + ldrh w0, [x0, x1] + mov w1, 65535 + cmp w0, w1 + beq .L3177 + ldr x1, [x20, 8] + cbz x1, .L3177 + ldrsh w2, [x20, 2] + tbz w2, #31, .L3177 + bl pm_write_page + ldrh w0, [x20, 2] + and w0, w0, 32767 + strh w0, [x20, 2] +.L3177: + add x24, x24, :lo12:.LANCHOR3 + add x19, x19, :lo12:.LANCHOR0 + add x0, x24, 1960 + mov w20, 0 + add x21, x0, x21, lsl 4 +.L3178: + ldr x2, [x19, 3384] + ldrh w0, [x2, 698] + cmp w0, w20 + bhi .L3181 + bl pm_free_sblk +.L3173: + mov w0, 0 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x29, x30, [sp], 64 + ret +.L3181: + ldrb w1, [x19, 1205] + mov w0, 24 + ldrh w3, [x24, 1304] + add x2, x2, w20, sxtw 2 + sub w0, w0, w1 + sub w1, w0, w3 + mov w0, 1 + lsl w0, w0, w1 + ldr w1, [x2, 704] + sub w0, w0, #1 + lsr w1, w1, w3 + and w0, w0, w1 + ldrb w1, [x24, 1306] + udiv w0, w0, w1 + cmp w22, w0, uxth + bne .L3179 + mov w1, w23 + mov w0, w20 + bl load_l2p_region + cbnz w0, .L3180 + ldr x1, [x21, 8] + mov w0, w20 + bl pm_write_page +.L3180: + mov w0, -1 + strh w0, [x21] +.L3179: + add w20, w20, 1 + and w20, w20, 65535 + b .L3178 + .size pm_gc, .-pm_gc + .align 2 + .global pm_flush_id + .type pm_flush_id, %function +pm_flush_id: + stp x29, x30, [sp, -32]! + adrp x2, .LANCHOR3 + add x2, x2, :lo12:.LANCHOR3 + ubfiz x0, x0, 4, 16 + add x2, x2, 1960 + add x29, sp, 0 + str x19, [sp, 16] + add x19, x2, x0 + ldrh w0, [x2, x0] + ldr x1, [x19, 8] + bl pm_write_page + ldrh w0, [x19, 2] + and w0, w0, 32767 + strh w0, [x19, 2] + adrp x19, .LANCHOR5 + add x19, x19, :lo12:.LANCHOR5 + ldr w0, [x19, 424] + cbz w0, .L3190 + bl pm_gc + str wzr, [x19, 424] +.L3190: + mov w0, 0 + ldr x19, [sp, 16] + ldp x29, x30, [sp], 32 + ret + .size pm_flush_id, .-pm_flush_id + .align 2 + .global pm_flush + .type pm_flush, %function +pm_flush: + stp x29, x30, [sp, -32]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x19, .LANCHOR3 + add x19, x19, :lo12:.LANCHOR3 + mov w20, 0 + add x19, x19, 1962 +.L3197: + ldrsh w0, [x19] + tbz w0, #31, .L3196 + mov w0, w20 + bl pm_flush_id +.L3196: + add w20, w20, 1 + add x19, x19, 16 + and w20, w20, 65535 + cmp w20, 32 + bne .L3197 + mov w0, 0 + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 32 + ret + .size pm_flush, .-pm_flush + .align 2 + .global flt_sys_flush + .type flt_sys_flush, %function +flt_sys_flush: + stp x29, x30, [sp, -16]! + add x29, sp, 0 + bl ftl_flush + bl pm_flush + bl ftl_ext_info_flush + mov w0, 0 + bl ftl_info_flush + ldp x29, x30, [sp], 16 + ret + .size flt_sys_flush, .-flt_sys_flush + .align 2 + .global zftl_deinit + .type zftl_deinit, %function +zftl_deinit: + stp x29, x30, [sp, -16]! + add x29, sp, 0 + bl zftl_flash_de_init + bl flt_sys_flush + bl zftl_flash_de_init + ldp x29, x30, [sp], 16 + ret + .size zftl_deinit, .-zftl_deinit + .align 2 + .global pm_init + .type pm_init, %function +pm_init: + stp x29, x30, [sp, -128]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x20, .LANCHOR5 + add x19, x20, :lo12:.LANCHOR5 + stp x21, x22, [sp, 32] + stp x23, x24, [sp, 48] + mov w24, w0 + stp x25, x26, [sp, 64] + mov w0, 1 + stp x27, x28, [sp, 80] + mov w25, -1 + strb w0, [x19, 440] + mov w0, 64 + str wzr, [x19, 212] + str wzr, [x19, 424] + bl ftl_dma32_malloc + str x0, [x19, 432] + adrp x19, .LANCHOR3 + add x0, x19, :lo12:.LANCHOR3 + add x21, x0, 1960 + add x23, x0, 2472 + mov x22, x0 +.L3206: + strh w25, [x21] + strh wzr, [x21, 2] + cbz w24, .L3205 + ldrb w0, [x22, 1946] + lsl w0, w0, 9 + bl ftl_dma32_malloc + str x0, [x21, 8] +.L3205: + add x21, x21, 16 + cmp x21, x23 + bne .L3206 + add x0, x19, :lo12:.LANCHOR3 + adrp x21, .LANCHOR0 + add x23, x21, :lo12:.LANCHOR0 + mov w4, 4 + ldr x26, [x0, 1968] + add x0, x20, :lo12:.LANCHOR5 + mov x2, x26 + ldr x22, [x0, 432] + ldr x0, [x23, 3384] + mov x3, x22 + ldrh w1, [x0, 692] + ldrb w0, [x0, 694] + bl flash_get_last_written_page + sxth w24, w0 + ldr x0, [x23, 3384] + mov w25, w24 + ldrh w2, [x0, 696] + cmp w2, w24 + bgt .L3207 + ldrh w1, [x0, 692] + mov w3, w24 + adrp x0, .LC241 + add x0, x0, :lo12:.LC241 + adrp x28, .LC243 + add x28, x28, :lo12:.LC243 + adrp x27, .LC242 + bl printk + ldr x0, [x23, 3384] + ldrsh w23, [x0, 696] + add w0, w24, 1 + str w0, [x29, 124] + add x0, x27, :lo12:.LC242 + str x0, [x29, 112] +.L3208: + ldr w0, [x29, 124] + cmp w23, w0 + blt .L3211 + add x0, x20, :lo12:.LANCHOR5 + add x21, x21, :lo12:.LANCHOR0 + mov w1, 1 + add w25, w25, 1 + strb w1, [x0, 401] + ldr x0, [x21, 3384] + strh w25, [x0, 696] + bl pm_free_sblk +.L3207: + add x19, x19, :lo12:.LANCHOR3 + add x20, x20, :lo12:.LANCHOR5 + mov w1, 255 + add x19, x19, 1960 + ldrh w2, [x20, 462] + ldr x0, [x19, 8] + bl ftl_memset + ldr x1, [x19, 8] + mov w0, -1 + bl pm_write_page + ldrb w0, [x20, 401] + cbz w0, .L3212 + ldr x1, [x19, 8] + mov w0, -1 + bl pm_write_page + ldr x1, [x19, 8] + mov w0, -1 + bl pm_write_page + ldr x1, [x19, 8] + mov w0, -1 + bl pm_write_page +.L3212: + bl pm_free_sblk + bl pm_gc + mov w0, 0 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 128 + ret +.L3211: + add x27, x21, :lo12:.LANCHOR0 + add x5, x19, :lo12:.LANCHOR3 + mov x3, x22 + mov x2, x26 + str x5, [x29, 104] + ldr x0, [x27, 3384] + ldrh w1, [x5, 1410] + ldrb w4, [x5, 1946] + ldrh w24, [x0, 692] + ldrb w0, [x0, 694] + madd w24, w24, w1, w23 + mov w1, w24 + bl flash_read_page_en + mov w4, w0 + ldr x0, [x27, 3384] + str w4, [x29, 120] + mov w2, w24 + ldr w1, [x0, 48] + ldrh w3, [x0, 694] + add w1, w1, 1 + str w1, [x0, 48] + ldr x0, [x29, 112] + ldr w1, [x22] + bl printk + ldr w4, [x29, 120] + cmp w4, 512 + ccmn w4, #1, 4, ne + beq .L3209 + ldr x0, [x27, 3384] + ldr w1, [x22] + ldrh w0, [x0, 698] + cmp w1, w0 + bcs .L3209 + ldr w2, [x22, 8] + ldr x5, [x29, 104] + cbz w2, .L3210 + ldrb w1, [x5, 1946] + mov x0, x26 + str w2, [x29, 120] + lsl w1, w1, 9 + bl js_hash + ldr w2, [x29, 120] + cmp w2, w0 + beq .L3210 + ldr w1, [x22, 8] + mov x0, x28 + bl printk +.L3209: + add w23, w23, 1 + sxth w23, w23 + b .L3208 +.L3210: + add x0, x21, :lo12:.LANCHOR0 + ldr x1, [x0, 3384] + ldr w0, [x22] + add x0, x0, 176 + str w24, [x1, x0, lsl 2] + b .L3209 + .size pm_init, .-pm_init + .align 2 + .global pm_log2phys + .type pm_log2phys, %function +pm_log2phys: + stp x29, x30, [sp, -96]! + add x29, sp, 0 + stp x21, x22, [sp, 32] + adrp x21, .LANCHOR3 + stp x23, x24, [sp, 48] + mov x23, x1 + add x1, x21, :lo12:.LANCHOR3 + stp x25, x26, [sp, 64] + stp x19, x20, [sp, 16] + mov w24, w2 + str x27, [sp, 80] + adrp x22, .LANCHOR0 + add x2, x22, :lo12:.LANCHOR0 + ldrb w20, [x1, 1946] + ldr w2, [x2, 3364] + lsl w25, w20, 7 + ubfiz w20, w20, 7, 9 + cmp w0, w2 + udiv w25, w0, w25 + and w26, w25, 65535 + msub w20, w26, w20, w0 + bcc .L3228 + mov w1, w0 + adrp x0, .LC244 + add x0, x0, :lo12:.LC244 + bl printk + mov w0, -1 + cbnz w24, .L3227 + str w0, [x23] +.L3227: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldr x27, [sp, 80] + ldp x29, x30, [sp], 96 + ret +.L3228: + and x20, x20, 65535 + add x0, x1, 1968 + mov x19, 0 +.L3234: + ldr x1, [x0] + cbz x1, .L3230 + ldrh w1, [x0, -8] + cmp w1, w26 + bne .L3230 +.L3231: + cbnz w24, .L3232 + add x3, x21, :lo12:.LANCHOR3 + add x22, x22, :lo12:.LANCHOR0 + add x0, x3, x19, lsl 4 + mov w2, 24 + mov w1, 1 + ldr x0, [x0, 1968] + ldr w0, [x0, x20, lsl 2] + str w0, [x23] + ldrb w4, [x22, 1205] + sub w2, w2, w4 + lsl w1, w1, w4 + sub w1, w1, #1 + lsr w0, w0, w2 + and w0, w0, w1 + ldrb w1, [x3, 1412] + cmp w0, w1 + bcc .L3233 + mov w0, -1 + str w0, [x23] +.L3233: + add x21, x21, :lo12:.LANCHOR3 + add x21, x21, 1960 + add x19, x21, x19, lsl 4 + ldrh w0, [x19, 2] + mvn x1, x0 + tst x1, 32767 + beq .L3237 + add w0, w0, 1 + strh w0, [x19, 2] +.L3237: + mov w0, 0 + b .L3227 +.L3232: + add x2, x21, :lo12:.LANCHOR3 + ldr w3, [x23] + add x0, x2, 1960 + add x0, x0, x19, lsl 4 + ldr x1, [x0, 8] + str w3, [x1, x20, lsl 2] + strb w25, [x2, 2472] + ldrh w1, [x0, 2] + orr w1, w1, -32768 + strh w1, [x0, 2] + b .L3233 +.L3230: + add w19, w19, 1 + add x0, x0, 16 + and x19, x19, 65535 + cmp w19, 32 + bne .L3234 + bl pm_select_ram_region + and x19, x0, 65535 + add x2, x21, :lo12:.LANCHOR3 + sbfiz x1, x19, 4, 32 + add x2, x2, 1960 + mov w27, w0 + add x3, x2, x1 + ldrh w2, [x2, x1] + mov w1, 65535 + cmp w2, w1 + beq .L3235 + ldrsh w1, [x3, 2] + tbz w1, #31, .L3235 + bl pm_flush_id +.L3235: + adrp x0, .LANCHOR5+464 + mov w1, w27 + strb w19, [x0, #:lo12:.LANCHOR5+464] + mov w0, w26 + bl load_l2p_region + b .L3231 + .size pm_log2phys, .-pm_log2phys + .align 2 + .global gc_recovery + .type gc_recovery, %function +gc_recovery: + sub sp, sp, #224 + stp x29, x30, [sp, 32] + add x29, sp, 32 + stp x21, x22, [sp, 64] + adrp x22, .LANCHOR3 + stp x19, x20, [sp, 48] + adrp x19, .LANCHOR0 + add x21, x19, :lo12:.LANCHOR0 + stp x23, x24, [sp, 80] + stp x25, x26, [sp, 96] + adrp x23, .LANCHOR5 + stp x27, x28, [sp, 112] + add x0, x23, :lo12:.LANCHOR5 + add x25, x22, :lo12:.LANCHOR3 + ldr x20, [x21, 1128] + strb wzr, [x0, 264] + mov w0, 65535 + strb wzr, [x25, 1337] + ldrh w1, [x20, 80] + cmp w1, w0 + beq .L3244 + add x24, x20, 80 + mov w0, -1 + strh w0, [x20, 130] + mov w0, 1 + bl buf_alloc + mov x28, x0 + ldrb w0, [x24, 9] + ldrh w1, [x25, 1410] + sub w0, w0, #1 + ldrb w2, [x25, 1320] + add x0, x24, w0, sxtw 1 + cmp w2, 2 + ldrh w0, [x0, 16] + mul w1, w0, w1 + str w1, [x29, 184] + beq .L3245 + ldrb w0, [x21, 1212] + cbnz w0, .L3245 + ldrb w0, [x21, 1213] + cbz w0, .L3246 +.L3245: + add x0, x22, :lo12:.LANCHOR3 + ldrh w0, [x0, 1338] + sub w0, w0, #1 + add w0, w0, w1 + orr w2, w0, w2, lsl 24 + str w2, [x28, 40] +.L3247: + mov w1, 1 + mov x0, x28 + bl sblk_read_page + ldr w0, [x28, 52] + cmp w0, 512 + ccmn w0, #1, 4, ne + beq .L3248 + ldr x0, [x28, 24] + ldr w1, [x0] + mov w0, 15555 + movk w0, 0xf55f, lsl 16 + cmp w1, w0 + beq .L3249 +.L3248: + mov x0, x28 + bl zbuf_free + ldr x1, [x28, 24] + ldr x0, [x28, 8] + ldr w2, [x1, 12] + str w2, [sp, 16] + ldr w2, [x1, 8] + str w2, [sp, 8] + ldr w2, [x1, 4] + str w2, [sp] + ldp w3, w4, [x0] + ldp w5, w6, [x0, 8] + adrp x0, .LC245 + ldr w7, [x1] + add x0, x0, :lo12:.LC245 + ldr w1, [x28, 40] + ldr w2, [x28, 52] + bl printk +.L3338: + add x0, x19, :lo12:.LANCHOR0 + ldrh w2, [x20, 80] + mov w21, 0 + ldr x1, [x0, 1120] + strh wzr, [x1, x2, lsl 1] + ldr x0, [x0, 1128] + ldrh w1, [x20, 80] + strh w1, [x0, 130] +.L3250: + add x1, x19, :lo12:.LANCHOR0 + ldrh w0, [x20, 80] + ldr x1, [x1, 1120] + ubfiz x2, x0, 1, 16 + ldrh w1, [x1, x2] + cbnz w1, .L3294 + bl ftl_dump_write_open_sblk +.L3294: + ldrh w1, [x20, 80] + mov w2, w21 + adrp x0, .LC247 + add x0, x0, :lo12:.LC247 + bl printk + mov w0, -1 + strh w0, [x20, 80] + bl pm_flush + bl ftl_ext_info_flush + add x1, x19, :lo12:.LANCHOR0 + mov w2, 65535 + ldr x0, [x1, 1128] + ldrh w0, [x0, 130] + cmp w0, w2 + beq .L3295 + ldrh w1, [x1, 1096] + cmp w1, w0 + bhi .L3296 + adrp x1, .LANCHOR4 + add x1, x1, :lo12:.LANCHOR4 + add x1, x1, 840 + mov w2, 517 + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack +.L3296: + add x0, x19, :lo12:.LANCHOR0 + ldr x0, [x0, 1128] + ldrh w0, [x0, 130] + bl ftl_free_sblk +.L3295: + add x19, x19, :lo12:.LANCHOR0 + mov w0, -1 + ldr x1, [x19, 3384] + strh w0, [x1, 126] + ldr x1, [x19, 1128] + strh w0, [x1, 130] + mov w0, 0 + bl ftl_info_flush +.L3243: + ldp x19, x20, [sp, 48] + ldp x21, x22, [sp, 64] + ldp x23, x24, [sp, 80] + ldp x25, x26, [sp, 96] + ldp x27, x28, [sp, 112] + ldp x29, x30, [sp, 32] + add sp, sp, 224 + ret +.L3246: + cmp w2, 3 + bne .L3247 + ldrh w0, [x25, 1376] + sub w0, w0, #1 + add w0, w0, w1 + orr w0, w0, 50331648 + str w0, [x28, 40] + b .L3247 +.L3249: + add x1, x23, :lo12:.LANCHOR5 + ldrb w0, [x1, 465] + cmp w0, 2 + bne .L3251 + add x21, x22, :lo12:.LANCHOR3 + ldrb w0, [x21, 1320] + cmp w0, 3 + bne .L3251 + ldrh w2, [x21, 1338] + ldrb w3, [x21, 1321] + ldrh w0, [x1, 462] + ubfiz w2, w2, 2, 14 + mul w2, w2, w3 + ldr x3, [x1, 280] + ldr x1, [x28, 8] + sub w2, w2, w0 + and x0, x0, 65532 + and w2, w2, 65535 + add x0, x3, x0 + bl ftl_memcpy + add x0, x19, :lo12:.LANCHOR0 + ldrb w1, [x0, 1212] + cbnz w1, .L3252 + ldrb w0, [x0, 1213] + cbz w0, .L3253 +.L3252: + ldr w0, [x28, 40] + sub w0, w0, #1 +.L3332: + str w0, [x28, 40] + mov w1, 1 + mov x0, x28 + bl sblk_read_page + ldr w0, [x28, 52] + cmp w0, 512 + ccmn w0, #1, 4, ne + beq .L3255 + ldr x0, [x28, 24] + ldr w1, [x0] + mov w0, 15555 + movk w0, 0xf55f, lsl 16 + cmp w1, w0 + beq .L3256 +.L3255: + mov x0, x28 + bl zbuf_free + b .L3338 +.L3253: + ldr w0, [x29, 184] + ldrh w1, [x21, 1376] + sub w0, w0, #1 + add w0, w0, w1 + orr w0, w0, 33554432 + b .L3332 +.L3256: + add x0, x23, :lo12:.LANCHOR5 + ldrh w2, [x0, 462] +.L3333: + ldr x1, [x28, 8] + add x21, x22, :lo12:.LANCHOR3 + ldr x0, [x0, 280] + bl ftl_memcpy + ldrb w1, [x21, 1321] + ldrh w0, [x21, 1338] + mul w0, w0, w1 + ldrb w1, [x21, 1946] + lsl w2, w0, 2 + cmp w1, w0, lsr 6 + bge .L3258 + add x25, x23, :lo12:.LANCHOR5 + mov w1, 0 + ldr x0, [x25, 288] + bl ftl_memset + ldrb w26, [x25, 465] + cmp w26, 1 + bne .L3299 + ldrb w1, [x21, 1321] + ldrh w0, [x21, 1338] + ldrh w21, [x25, 462] + mul w0, w0, w1 + ldr x1, [x28, 8] + sub w21, w21, w0, lsl 2 + add x1, x1, w0, sxtw 2 + ldr x0, [x25, 288] + mov w2, w21 + bl ftl_memcpy + mov w10, w26 +.L3259: + add x0, x22, :lo12:.LANCHOR3 + ldrh w1, [x0, 1376] + ldrb w25, [x0, 1320] + str w1, [x29, 168] + cmp w25, 2 + bne .L3260 + ldrb w0, [x0, 1322] + cbz w0, .L3261 +.L3260: + add x0, x19, :lo12:.LANCHOR0 + ldrb w0, [x0, 1212] + cbz w0, .L3262 +.L3261: + ldr w0, [x29, 168] + mul w0, w0, w25 + mov w25, 1 + str w0, [x29, 168] +.L3262: + add x14, x22, :lo12:.LANCHOR3 + adrp x26, .LC246 + mov w9, 0 + add x0, x26, :lo12:.LC246 + mov w13, 0 + str x0, [x29, 152] +.L3263: + sub w0, w9, #1 + str w0, [x29, 164] + ldr w0, [x29, 168] + cmp w0, w9 + bls .L3276 + add w0, w9, w9, lsl 1 + mov w26, 0 + sub w0, w0, #1 + str w0, [x29, 172] + b .L3277 +.L3251: + add x0, x22, :lo12:.LANCHOR3 + ldrh w2, [x0, 1338] + ldrb w0, [x0, 1321] + mul w2, w2, w0 + add x0, x23, :lo12:.LANCHOR5 + lsl w2, w2, 2 + b .L3333 +.L3258: + add x3, x23, :lo12:.LANCHOR5 + ldr x1, [x28, 8] + add x1, x1, w0, sxtw 2 + ldr x0, [x3, 288] + bl ftl_memcpy + mov w10, 0 +.L3334: + mov w21, 0 + b .L3259 +.L3299: + mov w10, 1 + b .L3334 +.L3272: + ldrh w1, [x14, 1410] + ldrh w0, [x24, x27, lsl 1] + ldrb w2, [x14, 1320] + cmp w2, 2 + mul w0, w0, w1 + str w0, [x29, 184] + add w1, w11, w0 + beq .L3264 + add x3, x19, :lo12:.LANCHOR0 + ldrb w4, [x3, 1212] + cbz w4, .L3265 +.L3264: + ldr w0, [x29, 164] + add w1, w1, w0 + orr w1, w1, w2, lsl 24 +.L3335: + str w1, [x28, 40] +.L3266: + str x14, [x29, 120] + mov w1, 1 + str w10, [x29, 128] + mov x0, x28 + str w9, [x29, 136] + str w13, [x29, 144] + str w11, [x29, 160] + bl sblk_read_page + ldr w10, [x29, 128] + ldr w13, [x29, 144] + ldr w9, [x29, 136] + ldr w11, [x29, 160] + sxtw x15, w13 + ldr x14, [x29, 120] + cbz w10, .L3269 + add x0, x23, :lo12:.LANCHOR5 + lsl x1, x15, 2 + ldr x0, [x0, 288] + ldr w2, [x0, x1] + cbnz w2, .L3269 + ldr x2, [x28, 24] + ldr w2, [x2, 8] + str w2, [x0, x1] +.L3269: + add x1, x23, :lo12:.LANCHOR5 + lsl x15, x15, 2 + ldr x0, [x1, 280] + ldr w3, [x0, x15] + ldr x0, [x28, 24] + ldr w6, [x0, 4] + cmp w3, w6 + bne .L3270 + ldr x1, [x1, 288] + ldr w2, [x1, x15] + ldr w1, [x0, 8] + cmp w2, w1 + beq .L3271 +.L3270: + add x18, x23, :lo12:.LANCHOR5 + ldr w2, [x0, 12] + str x14, [x29, 104] + stp w10, w11, [x29, 116] + ldr x1, [x18, 288] + str w2, [sp] + str w9, [x29, 128] + ldr w5, [x0] + ldr w4, [x1, x15] + ldr w7, [x0, 8] + ldr w1, [x28, 40] + ldr w2, [x28, 52] + ldr x0, [x29, 152] + stp x18, x15, [x29, 136] + str w13, [x29, 160] + bl printk + ldp x18, x15, [x29, 136] + ldp w10, w11, [x29, 116] + ldr x0, [x18, 280] + ldr w9, [x29, 128] + ldr w13, [x29, 160] + ldr x14, [x29, 104] + ldr w0, [x0, x15] + cmn w0, #1 + beq .L3271 + mov x0, x28 + bl zbuf_free + add x0, x19, :lo12:.LANCHOR0 + ldrh w2, [x20, 80] + ldr x1, [x0, 1120] + strh wzr, [x1, x2, lsl 1] + ldr x0, [x0, 1128] + ldrh w1, [x20, 80] + strh w1, [x0, 130] + b .L3250 +.L3265: + cmp w2, 3 + bne .L3267 + ldrb w2, [x3, 1213] + cbz w2, .L3268 + ldr w0, [x29, 172] + add w1, w1, w0 + orr w1, w1, 50331648 + b .L3335 +.L3268: + add w0, w9, w0 + orr w0, w0, w11, lsl 24 +.L3336: + str w0, [x28, 40] + b .L3266 +.L3267: + add w0, w9, w0 + b .L3336 +.L3271: + add w13, w13, 1 + add w11, w11, 1 +.L3274: + cmp w25, w11 + bcs .L3272 + add w26, w26, 1 +.L3277: + ldrb w0, [x24, 9] + cmp w26, w0 + bge .L3273 + sxtw x27, w26 + mov w11, 1 + add x27, x27, 8 + b .L3274 +.L3273: + ldrb w0, [x14, 1322] + cmp w0, 0 + cinc w9, w9, ne + add w9, w9, 1 + b .L3263 +.L3276: + mov x0, x28 + bl zbuf_free + add x0, x19, :lo12:.LANCHOR0 + add x3, x22, :lo12:.LANCHOR3 + ldrh w2, [x20, 80] + mov w21, 0 + mov w27, 0 + str wzr, [x29, 164] + ldrh w3, [x3, 1338] + ldr x1, [x0, 1120] + ldrb w0, [x24, 9] + mul w0, w0, w3 + strh w0, [x1, x2, lsl 1] +.L3278: + sub w0, w27, #1 + str w0, [x29, 136] + ldr w0, [x29, 168] + cmp w0, w27 + bls .L3292 + add w0, w27, w27, lsl 1 + add x28, x23, :lo12:.LANCHOR5 + sub w0, w0, #1 + str wzr, [x29, 172] + str w0, [x29, 160] + b .L3293 +.L3288: + ldr w0, [x29, 164] + ldr x1, [x28, 280] + sbfiz x0, x0, 2, 32 + ldr w5, [x1, x0] + cmn w5, #1 + beq .L3279 + ldr x1, [x28, 288] + str w5, [x29, 144] + ldr w0, [x1, x0] + str w0, [x29, 152] + mov w0, w5 + bl lpa_hash_get_ppa + str w0, [x29, 188] + cmn w0, #1 + ldr w5, [x29, 144] + bne .L3280 + mov w0, w5 + str w5, [x29, 144] + mov w2, 0 + add x1, x29, 188 + bl pm_log2phys + ldr w5, [x29, 144] +.L3280: + ldr x0, [x29, 128] + add x2, x22, :lo12:.LANCHOR3 + ldrh w1, [x2, 1410] + ldrh w0, [x24, x0, lsl 1] + ldrb w2, [x2, 1320] + cmp w2, 2 + mul w0, w0, w1 + add w1, w26, w0 + beq .L3281 + add x6, x19, :lo12:.LANCHOR0 + ldrb w7, [x6, 1212] + cbz w7, .L3282 +.L3281: + ldr w0, [x29, 136] + add w1, w0, w1 + orr w1, w1, w2, lsl 24 + str w1, [x29, 184] +.L3283: + add x0, x19, :lo12:.LANCHOR0 + add x6, x22, :lo12:.LANCHOR3 + ldr w3, [x29, 152] + ldrb w2, [x0, 1205] + mov w0, 24 + ldrh w1, [x6, 1304] + sub w0, w0, w2 + mov w2, 1 + sub w0, w0, w1 + lsr w1, w3, w1 + lsl w0, w2, w0 + sub w0, w0, #1 + and w0, w0, w1 + ldrb w1, [x6, 1306] + udiv w0, w0, w1 + and w0, w0, 65535 + str w0, [x29, 144] + ldr w0, [x29, 188] + cmp w3, w0 + bne .L3286 + add x1, x29, 184 + mov w0, w5 + bl pm_log2phys + add w21, w21, 1 + ldrh w0, [x29, 144] + bl ftl_vpn_decrement +.L3287: + ldr w0, [x29, 164] + add x2, x19, :lo12:.LANCHOR0 + add w0, w0, 1 + str w0, [x29, 164] + ldr x1, [x2, 1104] + ldr w0, [x29, 144] + add x1, x1, x0, lsl 2 + ldrb w1, [x1, 2] + tst w1, 224 + bne .L3279 + ldr x1, [x2, 1120] + lsl x0, x0, 1 + ldrh w2, [x1, x0] + cbz w2, .L3279 + strh wzr, [x1, x0] +.L3279: + add w26, w26, 1 +.L3290: + cmp w25, w26 + bcs .L3288 + ldr w0, [x29, 172] + add w0, w0, 1 + str w0, [x29, 172] +.L3293: + ldrb w0, [x24, 9] + ldr w1, [x29, 172] + cmp w1, w0 + bge .L3289 + ldrsw x0, [x29, 172] + mov w26, 1 + add x0, x0, 8 + str x0, [x29, 128] + b .L3290 +.L3282: + cmp w2, 3 + bne .L3284 + ldrb w6, [x6, 1213] + lsl w2, w26, 24 + cbz w6, .L3285 + ldr w0, [x29, 160] + add w1, w0, w1 + orr w0, w1, w2 +.L3337: + str w0, [x29, 184] + b .L3283 +.L3285: + add w0, w27, w0 + orr w0, w0, w2 + b .L3337 +.L3284: + add w0, w27, w0 + b .L3337 +.L3286: + ldr w1, [x29, 184] + cmp w0, w1 + cinc w21, w21, eq + b .L3287 +.L3289: + add x0, x22, :lo12:.LANCHOR3 + ldrb w0, [x0, 1322] + cmp w0, 0 + cinc w27, w27, ne + add w27, w27, 1 + b .L3278 +.L3292: + add x0, x19, :lo12:.LANCHOR0 + ldrh w1, [x20, 80] + ldr x0, [x0, 1120] + strh w21, [x0, x1, lsl 1] + ldrh w0, [x20, 80] + bl zftl_insert_data_list + b .L3250 +.L3244: + ldrh w0, [x20, 130] + cmp w0, w1 + beq .L3243 + ldr x1, [x21, 3384] + ldrh w1, [x1, 126] + cmp w1, w0 + bne .L3298 + bl pm_flush + ldr x0, [x21, 1128] + ldrh w0, [x0, 130] + bl ftl_free_sblk + ldr x0, [x21, 3384] + mov w1, -1 + strh w1, [x0, 126] + mov w0, 0 + bl ftl_info_flush +.L3298: + add x19, x19, :lo12:.LANCHOR0 + mov w1, -1 + ldr x0, [x19, 1128] + strh w1, [x0, 130] + b .L3243 + .size gc_recovery, .-gc_recovery + .align 2 + .global gc_update_l2p_map_new + .type gc_update_l2p_map_new, %function +gc_update_l2p_map_new: + stp x29, x30, [sp, -160]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x19, .LANCHOR0 + add x0, x19, :lo12:.LANCHOR0 + stp x21, x22, [sp, 32] + stp x23, x24, [sp, 48] + adrp x22, .LANCHOR3 + stp x25, x26, [sp, 64] + stp x27, x28, [sp, 80] + ldr x20, [x0, 1128] + add x0, x22, :lo12:.LANCHOR3 + ldrh w24, [x0, 1338] + add x0, x20, 80 + str x0, [x29, 112] + ldrb w0, [x0, 9] + mul w24, w24, w0 + adrp x0, .LANCHOR2 + str x0, [x29, 136] + ldr w1, [x0, #:lo12:.LANCHOR2] + tbz x1, 8, .L3340 + ldrh w1, [x20, 80] + adrp x0, .LC248 + add x0, x0, :lo12:.LC248 + bl printk +.L3340: + add x0, x19, :lo12:.LANCHOR0 + adrp x1, .LANCHOR5 + ldrh w3, [x20, 80] + mov w23, 0 + mov w21, 0 + str x1, [x29, 120] + ldr x2, [x0, 1120] + add x0, x1, :lo12:.LANCHOR5 + ldrb w0, [x0, 465] + sub w0, w24, w0 + strh w0, [x2, x3, lsl 1] + adrp x0, .LC250 + add x0, x0, :lo12:.LC250 + str x0, [x29, 104] +.L3341: + cmp w21, w24 + bne .L3350 + ldr x0, [x29, 136] + ldr w0, [x0, #:lo12:.LANCHOR2] + tbz x0, 8, .L3351 + add x0, x19, :lo12:.LANCHOR0 + ldrh w2, [x20, 80] + mov w3, w23 + ldr x1, [x0, 1120] + ldr x0, [x0, 1128] + ldrh w2, [x1, x2, lsl 1] + ldrh w1, [x0, 80] + adrp x0, .LC251 + add x0, x0, :lo12:.LC251 + bl printk +.L3351: + add x0, x19, :lo12:.LANCHOR0 + ldrh w1, [x20, 80] + ldr x0, [x0, 1120] + ldrh w0, [x0, x1, lsl 1] + cmp w23, w0 + beq .L3352 + adrp x1, .LANCHOR4 + add x1, x1, :lo12:.LANCHOR4 + add x1, x1, 856 + mov w2, 898 + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack +.L3352: + add x19, x19, :lo12:.LANCHOR0 + ldrh w1, [x20, 80] + ldr x0, [x19, 1120] + strh w23, [x0, x1, lsl 1] + ldrh w0, [x20, 80] + bl zftl_insert_data_list + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 160 + ret +.L3350: + ldr x0, [x29, 120] + add x0, x0, :lo12:.LANCHOR5 + ldr x0, [x0, 280] + ldr w2, [x0, w21, sxtw 2] + cmn w2, #1 + beq .L3342 + add x0, x22, :lo12:.LANCHOR3 + ldrb w0, [x0, 1946] + lsl w0, w0, 7 + udiv w0, w2, w0 + and w0, w0, 65535 + str w0, [x29, 132] + ldr x0, [x29, 136] + ldr w0, [x0, #:lo12:.LANCHOR2] + tbz x0, 8, .L3343 + ldr w1, [x29, 132] + adrp x0, .LC249 + mov w3, w21 + add x0, x0, :lo12:.LC249 + bl printk +.L3343: + ldr x0, [x29, 120] + mov w25, w21 + add x26, x0, :lo12:.LANCHOR5 +.L3349: + ldr x0, [x26, 280] + sbfiz x27, x25, 2, 32 + ldr w4, [x0, x27] + cmn w4, #1 + beq .L3344 + add x0, x22, :lo12:.LANCHOR3 + ldr w1, [x29, 132] + ldrb w0, [x0, 1946] + lsl w0, w0, 7 + udiv w0, w4, w0 + cmp w1, w0, uxth + bne .L3344 + ldr x0, [x26, 288] + str w4, [x29, 128] + ldr w28, [x0, x27] + mov w0, w4 + bl lpa_hash_get_ppa + str w0, [x29, 156] + cmn w0, #1 + ldr w4, [x29, 128] + bne .L3345 + mov w0, w4 + str w4, [x29, 128] + mov w2, 0 + add x1, x29, 156 + bl pm_log2phys + ldr w4, [x29, 128] +.L3345: + ldr w3, [x29, 156] + cmp w28, w3 + bne .L3346 + ldr x0, [x26, 296] + mov w2, 1 + add x1, x29, 152 + add w23, w23, 1 + ldr w0, [x0, x27] + str w0, [x29, 152] + mov w0, w4 + bl pm_log2phys + add x0, x19, :lo12:.LANCHOR0 + add x3, x22, :lo12:.LANCHOR3 + ldrb w1, [x0, 1205] + mov w0, 24 + ldrh w2, [x3, 1304] + sub w0, w0, w1 + sub w1, w0, w2 + mov w0, 1 + lsr w28, w28, w2 + lsl w0, w0, w1 + sub w0, w0, #1 + and w28, w0, w28 + ldrb w0, [x3, 1306] + udiv w0, w28, w0 +.L3373: + bl ftl_vpn_decrement + ldr x0, [x26, 280] + mov w1, -1 + str w1, [x0, x27] +.L3344: + add w25, w25, 1 + cmp w24, w25 + bne .L3349 +.L3342: + add w21, w21, 1 + b .L3341 +.L3346: + ldr x0, [x29, 136] + ldr w0, [x0, #:lo12:.LANCHOR2] + tbz x0, 8, .L3348 + ldr x0, [x29, 104] + mov w2, w28 + mov w1, w4 + bl printk +.L3348: + ldr x0, [x29, 112] + ldrh w0, [x0] + b .L3373 + .size gc_update_l2p_map_new, .-gc_update_l2p_map_new + .align 2 + .global gc_scan_src_blk_one_page + .type gc_scan_src_blk_one_page, %function +gc_scan_src_blk_one_page: + stp x29, x30, [sp, -96]! + mov w3, 0 + mov w4, 0 + mov w5, 65535 + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x20, .LANCHOR0 + add x1, x20, :lo12:.LANCHOR0 + stp x21, x22, [sp, 32] + add x1, x1, 3416 + stp x23, x24, [sp, 48] + stp x25, x26, [sp, 64] + adrp x21, .LANCHOR3 + ldrb w0, [x1, 4] + add x2, x1, w0, sxtw 1 + ldrh w22, [x2, 40] + add x2, x21, :lo12:.LANCHOR3 + ldrb w6, [x2, 1321] + ldrh w2, [x1, 2] +.L3375: + cmp w22, w5 + beq .L3377 + cbz w4, .L3378 + add x1, x20, :lo12:.LANCHOR0 + strh w2, [x1, 3418] +.L3378: + cbz w3, .L3379 + add x1, x20, :lo12:.LANCHOR0 + strb w0, [x1, 3420] +.L3379: + add x20, x20, :lo12:.LANCHOR0 + mov w0, 1 + add x19, x20, 3416 + bl buf_alloc + add x25, x21, :lo12:.LANCHOR3 + mov x23, x0 + mov w24, 1 +.L3380: + ldrb w1, [x19, 6] + cmp w24, w1 + ble .L3390 + mov x0, x23 + bl zbuf_free + ldrb w0, [x19, 4] + add x21, x21, :lo12:.LANCHOR3 + add w0, w0, 1 + and w0, w0, 255 + ldrb w1, [x21, 1321] + strb w0, [x19, 4] + cmp w1, w0 + bne .L3374 + ldrh w0, [x19, 2] + strb wzr, [x19, 4] + add w0, w0, 1 + strh w0, [x19, 2] +.L3374: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x29, x30, [sp], 96 + ret +.L3377: + add w0, w0, 1 + and w0, w0, 255 + cmp w0, w6 + bne .L3376 + add w2, w2, 1 + mov w0, 0 + and w2, w2, 65535 + mov w4, 1 +.L3376: + add x3, x1, w0, sxtw 1 + ldrh w22, [x3, 40] + mov w3, 1 + b .L3375 +.L3390: + ldrh w0, [x25, 1410] + cmp w1, 2 + mul w0, w0, w22 + bne .L3381 + ldrh w1, [x19, 2] + lsl w1, w1, 1 +.L3400: + sub w1, w1, #1 + add w0, w24, w0 + add w0, w1, w0 + ldrb w1, [x25, 1320] + orr w0, w0, w1, lsl 24 +.L3399: + str w0, [x23, 40] + mov w1, 1 + mov x0, x23 + bl sblk_read_page + ldr w0, [x23, 52] + cmp w0, 512 + ccmn w0, #1, 4, ne + beq .L3387 + ldr x0, [x23, 24] + ldr w26, [x0, 4] + mov w0, w26 + bl lpa_hash_get_ppa + str w0, [x29, 92] + cmn w0, #1 + bne .L3388 + ldr w0, [x20, 3364] + cmp w26, w0 + bcs .L3388 + mov w2, 0 + add x1, x29, 92 + mov w0, w26 + bl pm_log2phys +.L3388: + ldr w0, [x23, 40] + ldr w1, [x29, 92] + cmp w0, w1 + bne .L3387 + ldrh w2, [x19, 24] + ldr x1, [x25, 1312] + str w0, [x1, x2, lsl 2] + ldrh w0, [x19, 24] + add w0, w0, 1 + strh w0, [x19, 24] +.L3387: + ldrh w0, [x19, 26] + add w24, w24, 1 + add w0, w0, 1 + strh w0, [x19, 26] + b .L3380 +.L3381: + cmp w1, 3 + bne .L3383 + ldrb w1, [x20, 1212] + cbnz w1, .L3384 + ldrb w1, [x20, 1213] + cbz w1, .L3385 +.L3384: + ldrh w1, [x19, 2] + add w1, w1, w1, lsl 1 + b .L3400 +.L3385: + ldrh w1, [x19, 2] + add w0, w1, w0 + orr w0, w0, w24, lsl 24 + b .L3399 +.L3383: + ldrh w1, [x19, 2] + add w0, w1, w0 + b .L3399 + .size gc_scan_src_blk_one_page, .-gc_scan_src_blk_one_page + .align 2 + .global gc_scan_src_blk + .type gc_scan_src_blk, %function +gc_scan_src_blk: + stp x29, x30, [sp, -112]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x20, .LANCHOR0 + add x0, x20, :lo12:.LANCHOR0 + stp x21, x22, [sp, 32] + stp x23, x24, [sp, 48] + stp x25, x26, [sp, 64] + str x27, [sp, 80] + ldrh w1, [x0, 3416] + mov w0, 65535 + cmp w1, w0 + bne .L3402 + adrp x1, .LANCHOR4 + add x1, x1, :lo12:.LANCHOR4 + add x1, x1, 880 + mov w2, 1505 + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack +.L3402: + add x0, x20, :lo12:.LANCHOR0 + mov w2, 65535 + ldrh w1, [x0, 3416] + cmp w1, w2 + beq .L3432 + adrp x2, .LANCHOR2 + ldr w2, [x2, #:lo12:.LANCHOR2] + tbz x2, 8, .L3404 + ldr x0, [x0, 1120] + ubfiz x2, x1, 1, 16 + ldrh w2, [x0, x2] + adrp x0, .LC252 + add x0, x0, :lo12:.LC252 + bl printk +.L3404: + bl timer_get_time + add x14, x20, :lo12:.LANCHOR0 + add x15, x14, 3416 + add x1, x14, 3456 + ldrh w0, [x14, 3416] + bl ftl_get_blk_list_in_sblk + and w1, w0, 255 + strb w1, [x15, 5] + cbnz w1, .L3405 + mov w0, -1 + strh w0, [x14, 3416] +.L3432: + mov w0, 0 + b .L3401 +.L3405: + ldrh w3, [x14, 3416] + ldr x1, [x14, 1104] + mov x2, x3 + add x1, x1, x3, lsl 2 + ldrb w1, [x1, 2] + and w1, w1, 224 + cmp w1, 32 + beq .L3406 + cmp w1, 224 + beq .L3406 + cbz w1, .L3407 + ldr x1, [x14, 1128] + ldrh w3, [x1, 16] + cmp w3, w2 + beq .L3406 + ldrh w3, [x1, 48] + cmp w3, w2 + beq .L3406 + ldrh w1, [x1, 80] + cmp w1, w2 + bne .L3452 +.L3406: + add x20, x20, :lo12:.LANCHOR0 + mov w0, -1 + strh wzr, [x20, 3440] + strh w0, [x20, 3416] + b .L3432 +.L3407: + ldr x0, [x14, 1120] + ldrh w0, [x0, x3, lsl 1] + cbz w0, .L3409 + adrp x1, .LANCHOR4 + add x1, x1, :lo12:.LANCHOR4 + add x1, x1, 880 + mov w2, 1530 + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack +.L3409: + add x0, x20, :lo12:.LANCHOR0 + ldrh w1, [x0, 3416] + ldr x0, [x0, 1120] + strh wzr, [x0, x1, lsl 1] + b .L3406 +.L3452: + and w0, w0, 255 + sub w0, w0, #1 + add x0, x15, w0, sxtw 1 + ldrh w22, [x0, 40] + mov w0, 65535 + cmp w22, w0 + bne .L3410 + adrp x1, .LANCHOR4 + add x1, x1, :lo12:.LANCHOR4 + add x1, x1, 880 + mov w2, 1540 + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack +.L3410: + add x3, x20, :lo12:.LANCHOR0 + adrp x23, .LANCHOR3 + add x1, x23, :lo12:.LANCHOR3 + ldrh w2, [x3, 3416] + ldr x3, [x3, 1104] + ldrh w21, [x1, 1410] + ldrh w0, [x1, 1376] + add x2, x3, x2, lsl 2 + sub w0, w0, #1 + and w0, w0, 65535 + mul w21, w21, w22 + ldrb w2, [x2, 2] + and w2, w2, 224 + cmp w2, 160 + bne .L3433 + ldrb w2, [x1, 1320] + and w27, w2, 65535 + cmp w2, 2 + orr w21, w21, w2, lsl 24 + bne .L3412 + ldrh w0, [x1, 1338] + sub w0, w0, #1 + and w0, w0, 65535 +.L3412: + add x1, x20, :lo12:.LANCHOR0 + ldrb w2, [x1, 1212] + cbnz w2, .L3413 + ldrb w1, [x1, 1213] + cbz w1, .L3411 +.L3413: + add x0, x23, :lo12:.LANCHOR3 + ldrh w0, [x0, 1338] + sub w0, w0, #1 + and w0, w0, 65535 +.L3411: + add x24, x20, :lo12:.LANCHOR0 + orr w21, w0, w21 + mov w0, 1 + strb w27, [x24, 3422] + strh wzr, [x24, 3418] + strb wzr, [x24, 3420] + strh wzr, [x24, 3442] + strh wzr, [x24, 3444] + bl buf_alloc + mov x19, x0 + str w21, [x0, 40] + mov w1, 1 + bl sblk_read_page + strh wzr, [x24, 3440] + ldr w0, [x19, 52] + cmp w0, 512 + ccmn w0, #1, 4, ne + bne .L3414 +.L3457: + mov x0, x19 + bl zbuf_free +.L3455: + mov w0, -1 +.L3401: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldr x27, [sp, 80] + ldp x29, x30, [sp], 112 + ret +.L3433: + mov w27, 1 + b .L3411 +.L3414: + ldr x0, [x19, 24] + mov w1, 15555 + movk w1, 0xf55f, lsl 16 + ldr w2, [x0] + cmp w2, w1 + beq .L3415 + mov w2, 1578 +.L3458: + adrp x1, .LANCHOR4 + add x1, x1, :lo12:.LANCHOR4 + add x1, x1, 880 + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack + b .L3457 +.L3415: + add x1, x23, :lo12:.LANCHOR3 + adrp x26, .LANCHOR5 + add x2, x26, :lo12:.LANCHOR5 + ldrb w24, [x1, 1321] + ldrh w25, [x1, 1376] + ldrb w3, [x2, 465] + cmp w3, 2 + mul w25, w24, w25 + mul w25, w27, w25 + and w25, w25, 65535 + bne .L3416 + cmp w27, 3 + bne .L3416 + ldrh w0, [x2, 462] + ldrh w2, [x1, 1338] + ldr x3, [x1, 1312] + ldr x1, [x19, 8] + ubfiz w2, w2, 2, 14 + mul w24, w24, w2 + sub w24, w24, w0 + and x0, x0, 65532 + and w24, w24, 65535 + add x0, x3, x0 + mov w2, w24 + bl ftl_memcpy + ldr x0, [x19, 24] + ldr w27, [x0, 4] + cbz w27, .L3417 + ldr x0, [x19, 8] + mov w1, w24 + bl js_hash + cmp w27, w0 + beq .L3417 + mov x0, x19 + bl zbuf_free + ldr x0, [x19, 24] + mov w3, w24 +.L3456: + ldr w1, [x0, 4] + adrp x0, .LC253 + ldr w2, [x19, 40] + add x0, x0, :lo12:.LC253 + bl printk + b .L3455 +.L3417: + add x0, x20, :lo12:.LANCHOR0 + ldrb w1, [x0, 1212] + cbnz w1, .L3418 + ldrb w0, [x0, 1213] + cbz w0, .L3419 +.L3418: + sub w0, w21, #1 + str w0, [x19, 40] +.L3420: + mov w1, 1 + mov x0, x19 + bl sblk_read_page + ldr w0, [x19, 52] + cmp w0, 512 + ccmn w0, #1, 4, ne + beq .L3457 + ldr x0, [x19, 24] + ldr w1, [x0] + mov w0, 15555 + movk w0, 0xf55f, lsl 16 + cmp w1, w0 + beq .L3422 + mov w2, 1619 + b .L3458 +.L3419: + add x1, x23, :lo12:.LANCHOR3 + ldrh w0, [x1, 1376] + ldrh w1, [x1, 1410] + sub w0, w0, #1 + and w0, w0, 65535 + orr w0, w0, 33554432 + mul w22, w1, w22 + orr w22, w0, w22 + str w22, [x19, 40] + b .L3420 +.L3422: + add x26, x26, :lo12:.LANCHOR5 + add x0, x23, :lo12:.LANCHOR3 + ldrh w2, [x26, 462] +.L3454: + ldr x0, [x0, 1312] + add x23, x23, :lo12:.LANCHOR3 + ldr x1, [x19, 8] + add x24, x20, :lo12:.LANCHOR0 + add x21, x24, 3416 + mov x27, 0 + mov w26, 24 + bl ftl_memcpy + ldr x22, [x23, 1312] +.L3425: + cmp w25, w27 + bgt .L3430 + mov x0, x19 + bl zbuf_free + add x0, x20, :lo12:.LANCHOR0 + ldrh w1, [x0, 3416] + ldr x3, [x0, 1120] + ubfiz x2, x1, 1, 16 + ldrh w2, [x3, x2] + ldrh w3, [x0, 3440] + cmp w2, w3 + beq .L3431 + adrp x0, .LC254 + add x0, x0, :lo12:.LC254 + bl printk +.L3431: + add x20, x20, :lo12:.LANCHOR0 + ldrh w2, [x20, 3416] + ldr x1, [x20, 1120] + ldrh w3, [x20, 3440] + strh w3, [x1, x2, lsl 1] + strh wzr, [x20, 3444] + ldrh w0, [x20, 3440] + b .L3401 +.L3416: + ldr w22, [x0, 4] + lsl w21, w25, 2 + ldr x0, [x19, 8] + mov w1, w21 + bl js_hash + cmp w22, w0 + beq .L3424 + mov x0, x19 + bl zbuf_free + mov w3, w21 + ldr x0, [x19, 24] + b .L3456 +.L3424: + add x0, x23, :lo12:.LANCHOR3 + mov w2, w21 + b .L3454 +.L3430: + ldr w0, [x22, x27, lsl 2] + cmn w0, #1 + beq .L3427 + bl lpa_hash_get_ppa + str w0, [x29, 108] + cmn w0, #1 + bne .L3428 + ldr w0, [x22, x27, lsl 2] + mov w2, 0 + add x1, x29, 108 + bl pm_log2phys +.L3428: + ldrb w1, [x24, 1205] + ldrh w2, [x23, 1304] + sub w0, w26, w1 + ldr w3, [x29, 108] + sub w1, w0, w2 + mov w0, 1 + lsl w0, w0, w1 + ldrb w1, [x23, 1306] + sub w0, w0, #1 + lsr w2, w3, w2 + and w0, w0, w2 + udiv w0, w0, w1 + ldrh w1, [x21] + cmp w0, w1 + bne .L3427 + ldrh w1, [x21, 24] + ldr x0, [x23, 1312] + str w3, [x0, x1, lsl 2] + ldrh w0, [x21, 24] + add w0, w0, 1 + strh w0, [x21, 24] +.L3427: + bl timer_get_time + add x27, x27, 1 + b .L3425 + .size gc_scan_src_blk, .-gc_scan_src_blk + .align 2 + .global gc_scan_static_data + .type gc_scan_static_data, %function +gc_scan_static_data: + stp x29, x30, [sp, -64]! + adrp x1, .LANCHOR0 + add x29, sp, 0 + stp x19, x20, [sp, 16] + add x19, x1, :lo12:.LANCHOR0 + stp x21, x22, [sp, 32] + ldr x0, [x19, 1128] + ldr w2, [x0, 544] + cmn w2, #1 + beq .L3460 + adrp x20, .LANCHOR4 + add x20, x20, :lo12:.LANCHOR4 + add x20, x20, 896 + mov w21, 0 +.L3468: + ldr x0, [x19, 1128] + mov w2, 0 + add x1, x29, 60 + ldr w0, [x0, 544] + bl pm_log2phys + ldr w0, [x29, 60] + cmn w0, #1 + beq .L3461 + mov w0, 1 + bl buf_alloc + ldr w1, [x29, 60] + mov x22, x0 + str w1, [x0, 40] + mov w1, 1 + bl sblk_read_page + ldr w0, [x22, 52] + cmp w0, 256 + bne .L3462 + adrp x2, .LANCHOR3 + add x2, x2, :lo12:.LANCHOR3 + ldrb w1, [x19, 1205] + mov w0, 24 + ldr w3, [x29, 60] + ldrh w4, [x2, 1304] + sub w0, w0, w1 + mov w1, 1 + sub w0, w0, w4 + lsr w3, w3, w4 + lsl w0, w1, w0 + sub w0, w0, #1 + and w0, w0, w3 + ldrb w3, [x2, 1306] + mov w2, 0 + udiv w0, w0, w3 + bl gc_add_sblk +.L3462: + ldr x0, [x19, 1128] + ldr x1, [x22, 24] + ldr w0, [x0, 544] + ldr w1, [x1, 4] + cmp w1, w0 + beq .L3463 + mov x1, x20 + mov w2, 2163 + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack +.L3463: + mov x0, x22 + bl zbuf_free +.L3461: + ldr x0, [x19, 1128] + ldr w2, [x19, 3364] + ldr w1, [x0, 544] + add w1, w1, 1 + str w1, [x0, 544] + cmp w1, w2 + bcc .L3464 + mov w1, -1 + str w1, [x0, 544] + ldr w1, [x0, 548] + add w1, w1, 1 + str w1, [x0, 548] + bl ftl_flush + bl pm_flush + bl ftl_ext_info_flush + mov w0, 0 + bl ftl_info_flush +.L3459: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x29, x30, [sp], 64 + ret +.L3464: + ldr w0, [x29, 60] + cmn w0, #1 + bne .L3459 + adrp x1, .LANCHOR5+462 + add w0, w21, 1 + and w0, w0, 65535 + ldrh w1, [x1, #:lo12:.LANCHOR5+462] + cmp w21, w1, lsr 2 + bcs .L3459 + mov w21, w0 + b .L3468 +.L3460: + ldr w2, [x0, 536] + ldr w3, [x0, 12] + add w2, w2, 12959744 + add w2, w2, 256 + cmp w3, w2 + bhi .L3470 + ldr w2, [x0, 540] + mov w4, 5000 + add w2, w2, w4 + ldr x4, [x19, 3384] + ldr w4, [x4, 44] + cmp w4, w2 + bls .L3459 +.L3470: + add x1, x1, :lo12:.LANCHOR0 + ldr x1, [x1, 3384] + ldr w1, [x1, 44] + str w1, [x0, 540] + str w3, [x0, 536] + str wzr, [x0, 544] + b .L3459 + .size gc_scan_static_data, .-gc_scan_static_data + .align 2 + .global gc_block_vpn_scan + .type gc_block_vpn_scan, %function +gc_block_vpn_scan: + stp x29, x30, [sp, -144]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x19, .LANCHOR0 + add x20, x19, :lo12:.LANCHOR0 + stp x21, x22, [sp, 32] + stp x23, x24, [sp, 48] + stp x25, x26, [sp, 64] + stp x27, x28, [sp, 80] + ldr x1, [x20, 1128] + ldrh w0, [x20, 1096] + ldr w1, [x1, 608] + cmp w1, w0 + bcs .L3476 + bl timer_get_time + ldr x21, [x20, 1128] + mov w2, 30000 + ldr w1, [x21, 604] + add w1, w1, w2 + cmp w0, w1 + bls .L3476 + bl timer_get_time + str w0, [x21, 604] + ldr x0, [x20, 1128] + ldrh w2, [x20, 1096] + ldr w1, [x0, 600] + cmp w1, w2 + bcs .L3478 + ldr x2, [x20, 3384] + ldrh w2, [x2, 134] + cmp w1, w2 + bcs .L3479 +.L3478: + add x1, x19, :lo12:.LANCHOR0 + ldr x1, [x1, 3384] + ldrh w1, [x1, 134] + str w1, [x0, 600] +.L3479: + ldr w25, [x0, 600] + mov w0, 65535 + and w21, w25, 65535 + cmp w21, w0 + bne .L3480 + adrp x1, .LANCHOR4 + add x1, x1, :lo12:.LANCHOR4 + add x1, x1, 920 + mov w2, 2504 + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack +.L3480: + add x14, x19, :lo12:.LANCHOR0 + add x15, x29, 128 + ldr x0, [x14, 1128] + ldr w1, [x0, 600] + add w1, w1, 1 + str w1, [x0, 600] + ldr w1, [x0, 608] + add w1, w1, 1 + str w1, [x0, 608] + mov x1, x15 + mov w0, w21 + bl ftl_get_blk_list_in_sblk + mov w1, w0 + tst w0, 65535 + beq .L3476 + ldr x24, [x14, 1104] + uxtw x23, w21 + mov w2, 224 + add x24, x24, x23, lsl 2 + ldrb w0, [x24, 2] + and w0, w0, 224 + cmp w0, 32 + ccmp w0, w2, 4, ne + beq .L3481 + cbz w0, .L3482 + ldr x0, [x14, 1128] + ldrh w2, [x0, 16] + cmp w2, w21 + beq .L3476 + ldrh w2, [x0, 48] + cmp w2, w21 + beq .L3476 + ldrh w0, [x0, 80] + cmp w0, w21 + bne .L3512 +.L3476: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 144 + ret +.L3481: + cbnz w0, .L3476 +.L3482: + add x0, x19, :lo12:.LANCHOR0 + lsl x23, x23, 1 + ldr x0, [x0, 1120] + ldrh w0, [x0, x23] + cbz w0, .L3484 + adrp x1, .LANCHOR4 + add x1, x1, :lo12:.LANCHOR4 + add x1, x1, 920 + mov w2, 2521 + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack +.L3484: + add x19, x19, :lo12:.LANCHOR0 + ldr x0, [x19, 1120] + strh wzr, [x0, x23] + b .L3476 +.L3512: + and w1, w1, 65535 + mov w0, 65535 + sub w1, w1, #1 + ldrh w26, [x15, w1, sxtw 1] + cmp w26, w0 + bne .L3486 + adrp x1, .LANCHOR4 + add x1, x1, :lo12:.LANCHOR4 + add x1, x1, 920 + mov w2, 2529 + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack +.L3486: + adrp x20, .LANCHOR3 + add x2, x20, :lo12:.LANCHOR3 + ldrb w1, [x24, 2] + ldrh w22, [x2, 1410] + and w1, w1, 224 + ldrh w0, [x2, 1376] + cmp w1, 160 + sub w0, w0, #1 + and w0, w0, 65535 + mul w22, w22, w26 + bne .L3496 + ldrb w1, [x2, 1320] + cmp w1, 2 + orr w22, w22, w1, lsl 24 + beq .L3488 + and w26, w1, 65535 +.L3487: + add x20, x20, :lo12:.LANCHOR3 + orr w22, w0, w22 + mov w0, 1 + bl buf_alloc + str w22, [x0, 40] + mov x27, x0 + mov w1, 1 + bl sblk_read_page + ldrb w0, [x20, 1321] + mov w1, 255 + ldrh w2, [x20, 1338] + mul w2, w2, w0 + ldr x0, [x20, 1312] + lsl w2, w2, 2 + bl ftl_memset + ldr w0, [x27, 52] + cmp w0, 512 + ccmn w0, #1, 4, ne + bne .L3489 +.L3514: + mov w2, 0 + mov w1, 1 + mov w0, w21 + bl gc_add_sblk + mov x0, x27 + bl zbuf_free + b .L3476 +.L3488: + ldrh w0, [x2, 1338] + mov w26, w1 + sub w0, w0, #1 + and w0, w0, 65535 + b .L3487 +.L3496: + mov w26, 1 + b .L3487 +.L3489: + ldr x0, [x27, 24] + ldr w1, [x0] + mov w0, 15555 + movk w0, 0xf55f, lsl 16 + cmp w1, w0 + bne .L3514 + ldrh w0, [x20, 1376] + mov x28, 0 + ldrb w1, [x20, 1321] + mov w22, 0 + mul w1, w1, w0 + mul w1, w26, w1 + ldr x26, [x27, 8] + and w0, w1, 65535 + str w0, [x29, 108] + and w0, w25, 65535 + str w0, [x29, 104] + add x0, x19, :lo12:.LANCHOR0 + str x0, [x29, 96] +.L3491: + ldr w0, [x29, 108] + cmp w0, w28 + bgt .L3494 + mov x0, x27 + bl zbuf_free + adrp x0, .LANCHOR2 + ldr w0, [x0, #:lo12:.LANCHOR2] + tbz x0, 8, .L3495 + add x0, x19, :lo12:.LANCHOR0 + ldrb w4, [x24, 2] + mov w3, w22 + and w1, w25, 65535 + ldr x0, [x0, 1120] + ubfx x4, x4, 5, 3 + ldrh w2, [x0, x23, lsl 1] + adrp x0, .LC255 + add x0, x0, :lo12:.LC255 + bl printk +.L3495: + add x19, x19, :lo12:.LANCHOR0 + cmp w22, 31 + ldr x0, [x19, 1120] + strh w22, [x0, x23, lsl 1] + bhi .L3476 + mov w2, 0 + mov w1, 1 + mov w0, w21 + bl gc_add_sblk + b .L3476 +.L3494: + ldr w0, [x26, x28, lsl 2] + cmn w0, #1 + beq .L3492 + bl lpa_hash_get_ppa + str w0, [x29, 124] + cmn w0, #1 + bne .L3493 + ldr w0, [x26, x28, lsl 2] + mov w2, 0 + add x1, x29, 124 + bl pm_log2phys +.L3493: + ldr x0, [x29, 96] + mov w1, 24 + ldrh w2, [x20, 1304] + ldrb w0, [x0, 1205] + sub w0, w1, w0 + sub w1, w0, w2 + mov w0, 1 + lsl w0, w0, w1 + ldr w1, [x29, 124] + sub w0, w0, #1 + lsr w1, w1, w2 + and w0, w0, w1 + ldrb w1, [x20, 1306] + udiv w0, w0, w1 + ldr w1, [x29, 104] + cmp w1, w0 + bne .L3492 + add w22, w22, 1 + and w22, w22, 65535 +.L3492: + add x28, x28, 1 + b .L3491 + .size gc_block_vpn_scan, .-gc_block_vpn_scan + .align 2 + .global ftl_sblk_dump + .type ftl_sblk_dump, %function +ftl_sblk_dump: + sub sp, sp, #288 + and x0, x0, 65535 + stp x29, x30, [sp, 48] + add x29, sp, 48 + stp x19, x20, [sp, 64] + mov x20, x0 + stp x21, x22, [sp, 80] + adrp x21, .LANCHOR0 + add x19, x21, :lo12:.LANCHOR0 + stp x23, x24, [sp, 96] + stp x25, x26, [sp, 112] + lsl x23, x0, 2 + stp x27, x28, [sp, 128] + str x0, [x29, 136] + ldr x0, [x19, 1104] + str x1, [x29, 152] + add x1, x0, x23 + ldr w5, [x0, x23] + ldrb w2, [x1, 2] + mov w1, w20 + ldrh w4, [x0, x23] + adrp x0, .LC256 + ubfx x5, x5, 11, 8 + add x0, x0, :lo12:.LC256 + ubfx x3, x2, 3, 2 + and w4, w4, 2047 + ubfx x2, x2, 5, 3 + bl printk + str x21, [x29, 160] + mov w0, 65535 + cmp w20, w0 + beq .L3537 + ldrh w1, [x19, 1096] + mov w0, 0 + cmp w1, w20 + bls .L3515 + ldr x0, [x19, 1104] + adrp x28, .LANCHOR3 + add x0, x0, x23 + ldrb w0, [x0, 2] + and w0, w0, 224 + cmp w0, 160 + bne .L3539 + add x0, x28, :lo12:.LANCHOR3 + ldrb w24, [x0, 1320] +.L3517: + add x27, x29, 240 + mov w0, w20 + mov w19, 0 + strh w20, [x27, -32]! + add x1, x27, 16 + bl ftl_get_blk_list_in_sblk + add x2, x28, :lo12:.LANCHOR3 + and w1, w0, 255 + strb w1, [x29, 217] + and w4, w0, 255 + strh wzr, [x29, 210] + mov w3, w24 + ldrh w2, [x2, 1376] + adrp x0, .LC257 + strb wzr, [x29, 213] + add x0, x0, :lo12:.LC257 + strh wzr, [x29, 218] + mul w1, w1, w2 + strh w1, [x29, 214] + ldr x1, [x29, 160] + add x1, x1, :lo12:.LANCHOR0 + ldr x1, [x1, 1104] + add x1, x1, x23 + ldrb w2, [x1, 2] + mov w1, w20 + ubfx x2, x2, 5, 3 + bl printk + mov w0, 1 + bl buf_alloc + stp wzr, wzr, [x29, 168] + mov x25, x0 + str wzr, [x29, 176] + adrp x0, .LC195 + add x0, x0, :lo12:.LC195 + str x0, [x29, 120] +.L3518: + add x0, x28, :lo12:.LANCHOR3 + ldrh w0, [x0, 1376] + cmp w0, w19 + bls .L3535 + lsl w0, w19, 1 + mov w22, 0 + sub w1, w0, #1 + add w0, w0, w19 + sub w0, w0, #1 + stp w1, w0, [x29, 144] + b .L3536 +.L3539: + mov w24, 1 + b .L3517 +.L3532: + ldr x0, [x29, 128] + ldrh w10, [x27, x0] + mov w0, 65535 + cmp w10, w0 + beq .L3519 + add x2, x28, :lo12:.LANCHOR3 + cmp w24, 3 + ldrh w8, [x2, 1410] + mul w1, w8, w10 + add w0, w21, w1 + bne .L3520 + ldr x3, [x29, 160] + add x3, x3, :lo12:.LANCHOR0 + ldrb w4, [x3, 1212] + cbz w4, .L3521 + ldrb w8, [x2, 1320] + ldr w1, [x29, 148] +.L3548: + add w0, w0, w1 + orr w26, w0, w8, lsl 24 + b .L3522 +.L3521: + ldrb w2, [x3, 1213] + lsl w8, w21, 24 + cbz w2, .L3523 + ldr w1, [x29, 148] + add w0, w0, w1 + orr w26, w0, w8 +.L3522: + str w26, [x25, 40] + mov w1, 1 + str w10, [x29, 108] + mov x0, x25 + bl sblk_read_page + ldr x1, [x25, 24] + mov w3, w26 + ldr x0, [x25, 8] + ldr w11, [x25, 52] + ldr w10, [x29, 108] + ldr w2, [x1, 12] + mov w4, w11 + str w2, [sp, 32] + str w11, [x29, 112] + ldr w2, [x1, 8] + str w2, [sp, 24] + ldr w2, [x1, 4] + str w2, [sp, 16] + mov w2, w19 + ldr w1, [x1] + str w1, [sp, 8] + ldr w1, [x0, 12] + str w1, [sp] + mov w1, w10 + ldp w5, w6, [x0] + ldr w7, [x0, 8] + ldr x0, [x29, 120] + bl printk + ldr w11, [x29, 112] + ldr w0, [x29, 168] + cmp w11, 512 + ccmn w11, #1, 4, ne + csinc w0, w0, wzr, ne + str w0, [x29, 168] + mov x0, 35160 + movk x0, 0x41, lsl 16 + bl __const_udelay + ldr x0, [x29, 160] + mov w1, 32 + add x0, x0, :lo12:.LANCHOR0 + ldr x0, [x0, 1104] + add x0, x0, x23 + ldrb w0, [x0, 2] + and w0, w0, 224 + cmp w0, 224 + ccmp w0, w1, 4, ne + beq .L3519 + ldr x0, [x25, 24] + ldr w0, [x0, 4] + bl lpa_hash_get_ppa + str w0, [x29, 204] + cmn w0, #1 + bne .L3526 + ldr x0, [x25, 24] + mov w2, 0 + add x1, x29, 204 + ldr w0, [x0, 4] + bl pm_log2phys +.L3526: + ldr w0, [x29, 204] + cmp w26, w0 + bne .L3527 + ldr w0, [x29, 172] + mov w1, w26 + add w0, w0, 1 + str w0, [x29, 172] + ldr x0, [x25, 24] + ldr w3, [x29, 172] + ldr w2, [x0, 4] + adrp x0, .LC258 + add x0, x0, :lo12:.LC258 + bl printk +.L3527: + ldr x0, [x29, 152] + cbz x0, .L3529 + ldr x0, [x29, 176] + ubfiz x3, x0, 2, 32 + ldr x0, [x29, 152] + ldr w2, [x0, x3] + ldr x0, [x25, 24] + ldr w0, [x0, 4] + cmp w0, w2 + beq .L3530 + adrp x0, .LANCHOR2 + ldr w0, [x0, #:lo12:.LANCHOR2] + tbz x0, 12, .L3530 + ldr w1, [x29, 176] + adrp x0, .LC259 + str x3, [x29, 112] + add x0, x0, :lo12:.LC259 + bl printk + ldr x3, [x29, 112] +.L3530: + ldr x1, [x25, 24] + ldr x0, [x29, 152] + ldr w1, [x1, 4] + ldr w0, [x0, x3] + cmp w1, w0 + beq .L3529 + cmn w0, #1 + beq .L3529 + adrp x1, .LANCHOR4 + add x1, x1, :lo12:.LANCHOR4 + add x1, x1, 944 + mov w2, 1575 + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack +.L3529: + ldr w0, [x29, 176] + add w0, w0, 1 + str w0, [x29, 176] +.L3519: + add w21, w21, 1 + and w21, w21, 65535 +.L3534: + cmp w24, w21 + bcs .L3532 + add w22, w22, 1 + and w22, w22, 65535 +.L3536: + ldrb w0, [x29, 217] + cmp w0, w22 + bls .L3533 + sxtw x0, w22 + mov w21, 1 + add x0, x0, 8 + lsl x0, x0, 1 + str x0, [x29, 128] + b .L3534 +.L3523: + add w1, w19, w1 + orr w26, w8, w1 + b .L3522 +.L3520: + cmp w24, 2 + bne .L3524 + ldrb w8, [x2, 1320] + ldr w1, [x29, 144] + b .L3548 +.L3524: + add w26, w19, w1 + b .L3522 +.L3533: + add w19, w19, 1 + and w19, w19, 65535 + b .L3518 +.L3535: + mov x0, x25 + bl zbuf_free + ldr x0, [x29, 160] + ldr x1, [x29, 136] + add x0, x0, :lo12:.LANCHOR0 + ldr w3, [x29, 172] + ldr x0, [x0, 1120] + ldrh w2, [x0, x1, lsl 1] + mov w1, w20 + adrp x0, .LC260 + add x0, x0, :lo12:.LC260 + bl printk + ldr w0, [x29, 168] +.L3515: + ldp x19, x20, [sp, 64] + ldp x21, x22, [sp, 80] + ldp x23, x24, [sp, 96] + ldp x25, x26, [sp, 112] + ldp x27, x28, [sp, 128] + ldp x29, x30, [sp, 48] + add sp, sp, 288 + ret +.L3537: + mov w0, 0 + b .L3515 + .size ftl_sblk_dump, .-ftl_sblk_dump + .align 2 + .global zftl_read + .type zftl_read, %function +zftl_read: + sub sp, sp, #176 + stp x29, x30, [sp, 16] + add x29, sp, 16 + stp x19, x20, [sp, 32] + mov w20, w0 + adrp x0, .LANCHOR2 + stp x23, x24, [sp, 64] + stp x21, x22, [sp, 48] + mov w19, w1 + ldr w0, [x0, #:lo12:.LANCHOR2] + mov w24, w2 + stp x25, x26, [sp, 80] + mov x23, x3 + stp x27, x28, [sp, 96] + tbz x0, 12, .L3550 + mov w3, w2 + adrp x0, .LC261 + mov w2, w1 + add x0, x0, :lo12:.LC261 + mov w1, w20 + bl printk +.L3550: + cbnz w20, .L3551 + adrp x0, .LANCHOR0+1032 + mov w20, 24576 + ldr w0, [x0, #:lo12:.LANCHOR0+1032] +.L3552: + cmp w0, w19 + ccmp w0, w24, 0, hi + bcc .L3585 + add w1, w19, w24 + cmp w0, w1 + bcc .L3585 + add w20, w20, w19 + adrp x19, .LANCHOR0 + add x0, x19, :lo12:.LANCHOR0 + adrp x21, .LANCHOR3 + ldr x1, [x0, 3384] + ldr w0, [x1, 24] + add w0, w0, w24 + str w0, [x1, 24] + add x0, x21, :lo12:.LANCHOR3 + add w1, w24, w20 + stp w1, wzr, [x29, 136] + sub w1, w1, #1 + ldrb w0, [x0, 1946] + udiv w26, w20, w0 + udiv w0, w1, w0 + mov w22, w26 + sub w25, w0, w26 + str w0, [x29, 132] + add w25, w25, 1 + adrp x0, .LANCHOR4 + add x0, x0, :lo12:.LANCHOR4 + add x0, x0, 960 + str x0, [x29, 112] +.L3554: + cbnz w25, .L3582 + bl timer_get_time + adrp x1, .LANCHOR5+468 + str w0, [x1, #:lo12:.LANCHOR5+468] + ldr w0, [x29, 140] +.L3549: + ldp x19, x20, [sp, 32] + ldp x21, x22, [sp, 48] + ldp x23, x24, [sp, 64] + ldp x25, x26, [sp, 80] + ldp x27, x28, [sp, 96] + ldp x29, x30, [sp, 16] + add sp, sp, 176 + ret +.L3551: + cmp w20, 3 + bhi .L3585 + lsl w20, w20, 13 + mov w0, 8192 + b .L3552 +.L3582: + add x0, x21, :lo12:.LANCHOR3 + cmp w22, w26 + ldrb w1, [x0, 1946] + ldr w0, [x29, 132] + and w27, w1, 65535 + ccmp w22, w0, 4, ne + bne .L3586 + cmp w22, w26 + bne .L3556 + udiv w3, w20, w1 + and w0, w24, 65535 + msub w1, w3, w1, w20 + and w28, w1, 65535 + sub w27, w27, w28 + and w27, w27, 65535 + cmp w24, w27 + csel w27, w0, w27, cc +.L3555: + add x1, x19, :lo12:.LANCHOR0 + mov w0, 0 + add x1, x1, 1306 +.L3559: + ldr w2, [x1, 34] + cmp w22, w2 + bne .L3557 + ldrb w2, [x1] + tbz x2, 3, .L3557 + add x1, x19, :lo12:.LANCHOR0 + ubfiz x0, x0, 6, 32 + add x0, x1, x0 + lsl w2, w27, 9 + ubfiz x27, x27, 9, 16 + ubfiz x28, x28, 9, 16 + ldr x1, [x0, 1312] + mov x0, x23 + add x23, x23, x27 + add x1, x1, x28 + bl ftl_memcpy +.L3558: + add w22, w22, 1 + sub w25, w25, #1 +.L3565: + add x0, x19, :lo12:.LANCHOR0 + ldrb w0, [x0, 3353] + cmp w0, 2 + bls .L3566 + cbnz w25, .L3554 +.L3566: + add x2, x21, :lo12:.LANCHOR3 + ldrb w1, [x2, 1957] + cbz w1, .L3554 + ldrb w2, [x2, 1956] + add x0, x19, :lo12:.LANCHOR0 + add x0, x0, 1304 + add x0, x0, x2, lsl 6 + bl sblk_read_page + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + str x0, [x29, 120] +.L3568: + add x0, x21, :lo12:.LANCHOR3 + ldrb w1, [x0, 1957] + cbnz w1, .L3581 + mov w1, -1 + strb wzr, [x0, 1957] + strb w1, [x0, 1956] + b .L3554 +.L3556: + ldr w0, [x29, 136] + msub w27, w1, w22, w0 + and w27, w27, 255 +.L3586: + mov w28, 0 + b .L3555 +.L3557: + add w0, w0, 1 + add x1, x1, 64 + cmp w0, 32 + bne .L3559 + mov w0, w22 + bl lpa_hash_get_ppa + str w0, [x29, 156] + cmn w0, #1 + bne .L3560 + mov w2, 0 + add x1, x29, 156 + mov w0, w22 + bl pm_log2phys +.L3560: + ldr w0, [x29, 156] + cmn w0, #1 + bne .L3561 + add x28, x21, :lo12:.LANCHOR3 + mov w27, 0 +.L3562: + ldrb w0, [x28, 1946] + cmp w27, w0 + bcs .L3558 + madd w0, w22, w0, w27 + cmp w20, w0 + bhi .L3563 + ldr w1, [x29, 136] + cmp w1, w0 + bls .L3563 + mov x0, x23 + add x23, x23, 512 + mov w2, 512 + mov w1, 0 + bl ftl_memset +.L3563: + add w27, w27, 1 + b .L3562 +.L3561: + mov w0, 0 + bl buf_alloc + cbz x0, .L3565 + add x2, x19, :lo12:.LANCHOR0 + ldr x4, [x2, 3384] + ldr w2, [x4, 40] + add w2, w2, 1 + str w2, [x4, 40] + ldr w2, [x29, 156] + strb w27, [x0, 56] + ubfiz x27, x27, 9, 16 + str x23, [x0, 16] + add x23, x23, x27 + strb w28, [x0, 57] + stp w22, w2, [x0, 36] + str w2, [x0, 44] + bl zftl_add_read_buf + b .L3558 +.L3581: + ldrb w0, [x0, 1956] + cmp w0, 255 + bne .L3569 + ldp x1, x0, [x29, 112] + mov w2, 1284 + bl printk + bl dump_stack +.L3569: + add x0, x21, :lo12:.LANCHOR3 + add x4, x19, :lo12:.LANCHOR0 + add x1, x4, 1304 + ldrb w8, [x0, 1956] + ubfiz x27, x8, 6, 8 + add x28, x1, x27 + sxtw x27, w8 + lsl x3, x27, 6 + add x2, x1, x3 + ldrb w1, [x1, x3] + ldr w9, [x2, 52] + strb w1, [x0, 1956] + cmn w9, #1 + bne .L3570 + ldr x1, [x4, 1128] + str w9, [x29, 140] + ldr w0, [x1, 552] + add w0, w0, 1 + str w0, [x1, 552] +.L3571: + add x0, x19, :lo12:.LANCHOR0 + add x0, x0, 1304 + add x0, x0, x27, lsl 6 + ldr x3, [x0, 24] + ldr w0, [x0, 36] + ldr w1, [x3, 4] + cmp w1, w0 + bne .L3572 + cmn w9, #1 + bne .L3573 +.L3572: + add x0, x21, :lo12:.LANCHOR3 + add x5, x19, :lo12:.LANCHOR0 + ldrb w4, [x0, 1946] + add x0, x5, 1304 + add x0, x0, x27, lsl 6 + ldrb w6, [x5, 1205] + mov w5, 1 + ldrb w1, [x0, 56] + lsl w5, w5, w6 + ldp x2, x7, [x0, 8] + cmp w1, w4 + sub w5, w5, #1 + ldr w1, [x0, 40] + mov w0, 24 + sub w0, w0, w6 + csel x2, x7, x2, cs + lsl w6, w5, w0 + lsr w0, w1, w0 + bic w1, w1, w6 + and w0, w0, w5 + bl flash_read_page_en + mov w9, w0 +.L3573: + add x0, x19, :lo12:.LANCHOR0 + add x0, x0, 1304 + add x0, x0, x27, lsl 6 + ldr x1, [x0, 24] + ldr w0, [x0, 36] + ldr w1, [x1, 4] + cmp w1, w0 + bne .L3575 + cmn w9, #1 + bne .L3576 +.L3575: + add x11, x19, :lo12:.LANCHOR0 + str w9, [x29, 128] + add x10, x11, 1304 + add x10, x10, x27, lsl 6 + stp x11, x10, [x29, 96] + ldr x1, [x11, 1128] + ldr w0, [x1, 552] + add w0, w0, 1 + str w0, [x1, 552] + ldr x0, [x10, 24] + ldrb w1, [x10, 1] + ldr w2, [x0, 12] + str w2, [sp] + mov w2, w9 + ldp w3, w4, [x10, 36] + ldp w5, w6, [x0] + ldr w7, [x0, 8] + adrp x0, .LC263 + add x0, x0, :lo12:.LC263 + bl printk + ldp x11, x10, [x29, 96] + add x2, x21, :lo12:.LANCHOR3 + mov w0, 24 + ldrb w1, [x11, 1205] + ldrh w3, [x2, 1304] + sub w0, w0, w1 + ldrb w2, [x2, 1306] + sub w1, w0, w3 + mov w0, 1 + lsl w0, w0, w1 + ldr w1, [x10, 40] + sub w0, w0, #1 + lsr w1, w1, w3 + and w0, w0, w1 + mov x1, 0 + udiv w0, w0, w2 + bl ftl_sblk_dump + ldr w9, [x29, 128] +.L3576: + add x0, x19, :lo12:.LANCHOR0 + add x0, x0, 1304 + add x0, x0, x27, lsl 6 + ldr x1, [x0, 24] + ldr w0, [x0, 36] + ldr w1, [x1, 4] + cmp w1, w0 + bne .L3577 + cmn w9, #1 + bne .L3578 +.L3577: + ldp x1, x0, [x29, 112] + mov w2, 1320 + bl printk + bl dump_stack +.L3578: + add x0, x19, :lo12:.LANCHOR0 + add x0, x0, 1304 + add x8, x0, x27, lsl 6 + add x0, x21, :lo12:.LANCHOR3 + ldrb w2, [x8, 56] + ldrb w0, [x0, 1946] + cmp w0, w2 + bls .L3579 + ldr x0, [x8, 8] + lsl w2, w2, 9 + ldrb w1, [x8, 57] + add x1, x0, x1, lsl 9 + ldr x0, [x8, 16] + bl ftl_memcpy +.L3580: + mov x1, x28 + add x0, x19, :lo12:.LANCHOR0 + add x0, x0, 3355 + bl buf_remove_buf + mov x0, x28 + bl zbuf_free + add x1, x21, :lo12:.LANCHOR3 + ldrb w0, [x1, 1957] + sub w0, w0, #1 + strb w0, [x1, 1957] + b .L3568 +.L3570: + cmp w9, 256 + bne .L3571 + ldrb w5, [x4, 1205] + mov w4, 24 + ldrh w1, [x0, 1304] + sub w4, w4, w5 + ldr w3, [x2, 40] + sub w4, w4, w1 + mov w5, 1 + ldrb w0, [x0, 1306] + lsl w4, w5, w4 + sub w4, w4, #1 + lsr w1, w3, w1 + and w4, w4, w1 + ldr w2, [x2, 36] + str w9, [x29, 96] + udiv w4, w4, w0 + str w5, [x29, 104] + adrp x0, .LC262 + add x0, x0, :lo12:.LC262 + and w1, w4, 65535 + str w4, [x29, 128] + bl printk + ldr w5, [x29, 104] + mov w2, 0 + ldr w4, [x29, 128] + mov w1, w5 + mov w0, w4 + bl gc_add_sblk + ldr w9, [x29, 96] + b .L3571 +.L3579: + ldrb w0, [x8, 2] + and w0, w0, -9 + strb w0, [x8, 2] + b .L3580 +.L3585: + mov w0, -1 + b .L3549 + .size zftl_read, .-zftl_read + .align 2 + .global zftl_vendor_read + .type zftl_vendor_read, %function +zftl_vendor_read: + stp x29, x30, [sp, -16]! + mov x3, x2 + mov w2, w1 + add w1, w0, 512 + add x29, sp, 0 + mov w0, 2 + bl zftl_read + ldp x29, x30, [sp], 16 + ret + .size zftl_vendor_read, .-zftl_vendor_read + .align 2 + .global zftl_sys_read + .type zftl_sys_read, %function +zftl_sys_read: + stp x29, x30, [sp, -16]! + mov x3, x2 + mov w2, w1 + mov w1, w0 + add x29, sp, 0 + mov w0, 2 + bl zftl_read + ldp x29, x30, [sp], 16 + ret + .size zftl_sys_read, .-zftl_sys_read + .align 2 + .type zftl_debug_proc_write, %function +zftl_debug_proc_write: + sub sp, sp, #224 + cmp x2, 79 + stp x29, x30, [sp, 32] + add x29, sp, 32 + stp x19, x20, [sp, 48] + add x19, x29, 112 + stp x21, x22, [sp, 64] + stp x23, x24, [sp, 80] + stp x25, x26, [sp, 96] + stp x27, x28, [sp, 112] + str x19, [x29, 104] + bhi .L3623 + mov x21, x2 + mov x0, x19 + bl rk_copy_from_user + mov x1, -14 + cbnz x0, .L3605 + mov x1, x19 + strb wzr, [x19, x21] + adrp x0, .LC264 + add x0, x0, :lo12:.LC264 + bl printk + mov x1, x19 + adrp x0, .LC265 + add x0, x0, :lo12:.LC265 + mov w3, 16 + mov w2, 1 + bl rknand_print_hex + bl rknand_device_lock + mov x2, 7 + adrp x1, .LC266 + mov x0, x19 + add x1, x1, :lo12:.LC266 + bl memcmp + mov w22, w0 + cbnz w0, .L3607 + adrp x19, .LANCHOR0 + add x19, x19, :lo12:.LANCHOR0 + adrp x20, .LANCHOR5 + add x20, x20, :lo12:.LANCHOR5 + mov w2, 4 + adrp x0, .LC267 + ldr x1, [x19, 3384] + add x0, x0, :lo12:.LC267 + mov w23, 65535 + add x1, x1, 704 + ldrh w3, [x1, -6] + bl rknand_print_hex + ldrh w3, [x20, 220] + adrp x0, .LC268 + ldr x1, [x19, 3384] + mov w2, 2 + add x0, x0, :lo12:.LC268 + add x1, x1, 416 + bl rknand_print_hex +.L3608: + ldrh w0, [x20, 220] + cmp w22, w0 + blt .L3610 +.L3611: + bl rknand_device_unlock + mov x1, x21 +.L3605: + ldp x19, x20, [sp, 48] + mov x0, x1 + ldp x21, x22, [sp, 64] + ldp x23, x24, [sp, 80] + ldp x25, x26, [sp, 96] + ldp x27, x28, [sp, 112] + ldp x29, x30, [sp, 32] + add sp, sp, 224 + ret +.L3610: + mov w0, 300 + bl msleep + ldr x0, [x19, 3384] + add x0, x0, w22, sxtw 1 + ldrh w0, [x0, 416] + cmp w0, w23 + beq .L3609 + mov x1, 0 + bl ftl_sblk_dump +.L3609: + add w22, w22, 1 + b .L3608 +.L3607: + adrp x1, .LC269 + mov x2, 7 + add x1, x1, :lo12:.LC269 + mov x0, x19 + bl memcmp + cbnz w0, .L3612 + adrp x22, .LANCHOR0 + add x20, x22, :lo12:.LANCHOR0 + mov w2, 4 + adrp x0, .LC267 + add x0, x0, :lo12:.LC267 + adrp x25, .LC271 + ldr x1, [x20, 3384] + adrp x24, .LC272 + add x25, x25, :lo12:.LC271 + add x24, x24, :lo12:.LC272 + add x1, x1, 704 + ldrh w3, [x1, -6] + bl rknand_print_hex + adrp x0, .LANCHOR5+220 + ldr x1, [x20, 3384] + mov w2, 2 + add x20, x29, 192 + ldrh w3, [x0, #:lo12:.LANCHOR5+220] + add x1, x1, 416 + adrp x0, .LC268 + add x0, x0, :lo12:.LC268 + bl rknand_print_hex + mov w0, 50 + bl msleep + add x1, x19, 7 + adrp x0, .LC270 + str x1, [x20, -88]! + add x0, x0, :lo12:.LC270 + bl printk + ldr x0, [x29, 104] + mov x1, x20 + adrp x20, .LANCHOR3 + bl rk_simple_strtoull.constprop.33 + mov w23, w0 + add x1, x20, :lo12:.LANCHOR3 + and w27, w0, 65535 + add x19, x1, 1960 + add x26, x1, 2472 + mov x28, x1 + str w0, [x29, 100] +.L3614: + ldrh w2, [x19, 2] + mov x0, x25 + ldrh w1, [x19] + bl printk + ldrh w0, [x19] + cmp w0, w27 + bne .L3613 + ldrb w3, [x28, 1946] + mov w2, 4 + ldr x1, [x19, 8] + mov x0, x24 + lsl w3, w3, 7 + bl rknand_print_hex + mov w0, 50 + bl msleep +.L3613: + add x19, x19, 16 + cmp x19, x26 + bne .L3614 + add x22, x22, :lo12:.LANCHOR0 + mov w0, 300 + bl msleep + add x20, x20, :lo12:.LANCHOR3 + mov w0, 1 + bl buf_alloc + ldr x1, [x22, 3384] + mov x19, x0 + add x1, x1, w23, uxth 2 + ldr w1, [x1, 704] + str w1, [x0, 40] + str w1, [x29, 100] + mov w1, 1 + bl sblk_read_page + ldr x1, [x19, 24] + ldr x0, [x19, 8] + ldr w2, [x1, 12] + str w2, [sp, 16] + ldr w2, [x1, 8] + str w2, [sp, 8] + ldr w2, [x1, 4] + str w2, [sp] + ldp w3, w4, [x0] + ldp w5, w6, [x0, 8] + adrp x0, .LC245 + ldr w7, [x1] + add x0, x0, :lo12:.LC245 + ldr w2, [x19, 52] + ldr w1, [x29, 100] + bl printk + ldrb w3, [x20, 1946] + adrp x0, .LC273 + ldr x1, [x19, 8] + add x0, x0, :lo12:.LC273 + mov w2, 4 + lsl w3, w3, 7 +.L3630: + bl rknand_print_hex + mov x0, x19 + bl zbuf_free + b .L3611 +.L3612: + adrp x1, .LC274 + mov x2, 7 + add x1, x1, :lo12:.LC274 + mov x0, x19 + bl memcmp + cbnz w0, .L3615 + bl dump_ftl_info + b .L3611 +.L3615: + adrp x1, .LC275 + mov x2, 9 + add x1, x1, :lo12:.LC275 + mov x0, x19 + bl memcmp + cbnz w0, .L3616 + add x1, x29, 192 + add x0, x19, 9 + str x0, [x1, -88]! + bl rk_simple_strtoull.constprop.33 + str w0, [x29, 100] + adrp x1, .LANCHOR3+1408 + strh w0, [x1, #:lo12:.LANCHOR3+1408] + bl dump_all_list_info + b .L3611 +.L3616: + adrp x1, .LC276 + mov x2, 8 + add x1, x1, :lo12:.LC276 + mov x0, x19 + bl memcmp + cbz w0, .L3611 + adrp x1, .LC277 + mov x2, 8 + add x1, x1, :lo12:.LC277 + mov x0, x19 + bl memcmp + cbnz w0, .L3618 + add x20, x29, 192 + add x1, x19, 8 + adrp x0, .LC270 + add x0, x0, :lo12:.LC270 + str x1, [x20, -88]! + bl printk + ldr x0, [x29, 104] + mov x1, x20 + adrp x20, .LANCHOR3 + add x20, x20, :lo12:.LANCHOR3 + bl rk_simple_strtoull.constprop.33 + str w0, [x29, 100] + mov w0, 1 + bl buf_alloc + ldr w1, [x29, 100] + mov x19, x0 + str w1, [x0, 40] + mov w1, 1 + bl sblk_read_page + ldr x1, [x19, 24] + ldr x0, [x19, 8] + ldr w2, [x1, 12] + str w2, [sp, 16] + ldr w2, [x1, 8] + str w2, [sp, 8] + ldr w2, [x1, 4] + str w2, [sp] + ldp w3, w4, [x0] + ldp w5, w6, [x0, 8] + adrp x0, .LC245 + ldr w7, [x1] + add x0, x0, :lo12:.LC245 + ldr w2, [x19, 52] + ldr w1, [x29, 100] + bl printk + ldr x1, [x19, 8] + mov w2, 4 + ldrb w3, [x20, 1946] + adrp x0, .LC218 + add x0, x0, :lo12:.LC218 + lsl w3, w3, 7 + bl rknand_print_hex + ldrb w3, [x20, 1946] + adrp x0, .LC240 + mov w2, 4 + add x0, x0, :lo12:.LC240 + ldr x1, [x19, 24] + lsl w3, w3, 1 + b .L3630 +.L3618: + adrp x1, .LC278 + mov x2, 8 + add x1, x1, :lo12:.LC278 + mov x0, x19 + bl memcmp + cbnz w0, .L3619 + add x20, x29, 192 + add x1, x19, 8 + adrp x0, .LC270 + add x0, x0, :lo12:.LC270 + str x1, [x20, -88]! + bl printk + ldr x0, [x29, 104] + mov x1, x20 + bl rk_simple_strtoull.constprop.33 + str w0, [x29, 100] + mov x1, 0 + bl ftl_sblk_dump + b .L3611 +.L3619: + adrp x1, .LC279 + mov x2, 10 + add x1, x1, :lo12:.LC279 + mov x0, x19 + bl memcmp + cbnz w0, .L3620 + add x20, x29, 192 + add x1, x19, 10 + adrp x0, .LC270 + add x0, x0, :lo12:.LC270 + str x1, [x20, -88]! + bl printk + ldr x0, [x29, 104] + mov x1, x20 + bl rk_simple_strtoull.constprop.33 + str w0, [x29, 100] + adrp x1, .LANCHOR2 + str w0, [x1, #:lo12:.LANCHOR2] + b .L3611 +.L3620: + adrp x1, .LC280 + mov x2, 8 + add x1, x1, :lo12:.LC280 + mov x0, x19 + bl memcmp + cbnz w0, .L3621 + add x1, x19, 8 + add x19, x29, 192 + adrp x0, .LC270 + add x0, x0, :lo12:.LC270 + str x1, [x19, -88]! + bl printk + ldr x0, [x29, 104] + mov x1, x19 + bl rk_simple_strtoull.constprop.33 + mov w19, w0 + bl lpa_hash_get_ppa + str w0, [x29, 100] + cmn w0, #1 + bne .L3622 + mov w2, 0 + add x1, x29, 100 + mov w0, w19 + bl pm_log2phys +.L3622: + ldr w2, [x29, 100] + mov w1, w19 + adrp x0, .LC281 + add x0, x0, :lo12:.LC281 + bl printk + b .L3611 +.L3621: + adrp x0, .LC282 + add x0, x0, :lo12:.LC282 + bl printk + adrp x0, .LC283 + add x0, x0, :lo12:.LC283 + bl printk + adrp x0, .LC284 + add x0, x0, :lo12:.LC284 + bl printk + adrp x0, .LC285 + add x0, x0, :lo12:.LC285 + bl printk + adrp x0, .LC286 + add x0, x0, :lo12:.LC286 + bl printk + adrp x0, .LC287 + add x0, x0, :lo12:.LC287 + bl printk + adrp x0, .LC288 + add x0, x0, :lo12:.LC288 + bl printk + adrp x0, .LC289 + add x0, x0, :lo12:.LC289 + bl printk + adrp x0, .LC290 + add x0, x0, :lo12:.LC290 + bl printk + b .L3611 +.L3623: + mov x1, -22 + b .L3605 + .size zftl_debug_proc_write, .-zftl_debug_proc_write + .align 2 + .global ftl_update_l2p_map + .type ftl_update_l2p_map, %function +ftl_update_l2p_map: + stp x29, x30, [sp, -128]! + add x29, sp, 0 + stp x21, x22, [sp, 32] + mov x22, x0 + stp x25, x26, [sp, 64] + adrp x26, .LANCHOR3 + add x0, x26, :lo12:.LANCHOR3 + stp x19, x20, [sp, 16] + stp x23, x24, [sp, 48] + stp x27, x28, [sp, 80] + ldrh w23, [x0, 1376] + ldrb w1, [x22, 9] + ldr x0, [x0, 1928] + ldrh w19, [x22, 12] + mul w23, w23, w1 + add x19, x0, x19, lsl 2 + add x0, x19, w23, sxtw 2 + ldr w0, [x0, -4] + cmn w0, #1 + beq .L3632 + adrp x1, .LANCHOR4 + add x1, x1, :lo12:.LANCHOR4 + add x1, x1, 976 + mov w2, 1998 + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack +.L3632: + adrp x27, .LC292 + mov w21, 0 + add x0, x27, :lo12:.LC292 + mov w25, 0 + str x0, [x29, 104] +.L3633: + cmp w25, w23 + bne .L3639 + adrp x0, .LANCHOR2 + adrp x19, .LANCHOR0 + ldr w0, [x0, #:lo12:.LANCHOR2] + tbz x0, 12, .L3640 + add x0, x19, :lo12:.LANCHOR0 + ldrh w1, [x22] + ldr x0, [x0, 1120] + ubfiz x2, x1, 1, 16 + ldrh w3, [x0, x2] + adrp x0, .LC294 + mov w2, w21 + add x0, x0, :lo12:.LC294 + bl printk +.L3640: + add x19, x19, :lo12:.LANCHOR0 + ldrh w1, [x22] + ldr x0, [x19, 1120] + strh w21, [x0, x1, lsl 1] + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 128 + ret +.L3639: + ldr w2, [x19] + cmn w2, #1 + beq .L3634 + add x0, x26, :lo12:.LANCHOR3 + ldrb w20, [x0, 1946] + adrp x0, .LANCHOR2 + ldr w0, [x0, #:lo12:.LANCHOR2] + lsl w20, w20, 7 + udiv w20, w2, w20 + and w20, w20, 65535 + tbz x0, 12, .L3635 + adrp x0, .LC291 + mov w3, w25 + mov w1, w20 + add x0, x0, :lo12:.LC291 + bl printk +.L3635: + adrp x28, .LC293 + mov x24, x19 + mov w27, w25 + add x28, x28, :lo12:.LC293 +.L3638: + ldr w0, [x24] + cmn w0, #1 + beq .L3636 + add x5, x26, :lo12:.LANCHOR3 + ldrb w1, [x5, 1946] + lsl w1, w1, 7 + udiv w0, w0, w1 + cmp w20, w0, uxth + bne .L3636 + ldrb w0, [x22, 9] + str x5, [x29, 96] + sdiv w1, w27, w0 + msub w0, w1, w0, w27 + add x0, x22, w0, sxtw 1 + ldrh w2, [x0, 16] + ldrh w0, [x5, 1410] + madd w2, w2, w0, w1 + ldr x0, [x29, 104] + str w2, [x29, 124] + ldr w1, [x24] + bl pm_ppa_update_check + ldr x5, [x29, 96] + cbz w0, .L3637 + ldr x1, [x5, 1928] + mov w3, w23 + mov w2, 4 + mov x0, x28 + bl rknand_print_hex +.L3637: + ldr w0, [x24] + add w21, w21, 1 + mov w2, 1 + add x1, x29, 124 + and w21, w21, 65535 + bl pm_log2phys + mov w0, -1 + str w0, [x24] +.L3636: + add w27, w27, 1 + add x24, x24, 4 + cmp w23, w27 + bne .L3638 +.L3634: + add w25, w25, 1 + add x19, x19, 4 + b .L3633 + .size ftl_update_l2p_map, .-ftl_update_l2p_map + .align 2 + .global ftl_alloc_new_data_sblk + .type ftl_alloc_new_data_sblk, %function +ftl_alloc_new_data_sblk: + stp x29, x30, [sp, -48]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + mov x20, x0 + str x21, [sp, 32] + ldrh w21, [x0] + bl ftl_update_l2p_map + bl pm_flush + ldrh w0, [x20] + mov w1, 65535 + cmp w0, w1 + beq .L3662 + bl zftl_insert_data_list +.L3662: + adrp x19, .LANCHOR0 + add x19, x19, :lo12:.LANCHOR0 + ldr x0, [x19, 1128] + add x0, x0, 16 + cmp x20, x0 + mov x0, x20 + cset w1, ne + add w1, w1, 2 + bl ftl_open_sblk_init + ldr x0, [x19, 1128] + ldr w0, [x0, 560] + cmp w0, w21 + bne .L3664 + mov w20, 65535 + cmp w21, w20 + beq .L3664 + mov w1, w21 + adrp x0, .LC295 + add x0, x0, :lo12:.LC295 + bl printk + ldr x0, [x19, 1128] + ldr w0, [x0, 564] + bl gc_mark_bad_ppa + ldr x0, [x19, 1128] + mov w1, -1 + str w20, [x0, 560] + str w1, [x0, 564] +.L3664: + bl ftl_ext_info_flush + mov w0, 0 + bl ftl_info_flush + bl lpa_rebuild_hash + ldr x21, [sp, 32] + mov w0, 0 + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 48 + ret + .size ftl_alloc_new_data_sblk, .-ftl_alloc_new_data_sblk + .align 2 + .global ftl_write_commit + .type ftl_write_commit, %function +ftl_write_commit: + stp x29, x30, [sp, -144]! + adrp x0, .LANCHOR0 + add x29, sp, 0 + stp x19, x20, [sp, 16] + add x20, x0, :lo12:.LANCHOR0 + stp x27, x28, [sp, 80] + add x28, x20, 1304 + stp x21, x22, [sp, 32] + stp x23, x24, [sp, 48] + stp x25, x26, [sp, 64] +.L3668: + adrp x0, .LANCHOR0 + add x0, x0, :lo12:.LANCHOR0 + ldrb w1, [x0, 3381] + cbz w1, .L3670 + ldrb w3, [x0, 3408] + add x2, x0, 1304 + sub w1, w1, #1 + strb w1, [x0, 3381] + ubfiz x4, x3, 6, 8 + add x4, x2, x4 + stp x3, x4, [x29, 104] + lsl x3, x3, 6 + add x4, x2, x3 + ldrb w2, [x2, x3] + strb w2, [x0, 3408] + ldr w1, [x4, 36] + ldr w0, [x0, 3364] + cmp w1, w0 + bcc .L3672 + adrp x1, .LANCHOR4 + add x1, x1, :lo12:.LANCHOR4 + add x1, x1, 1000 + mov w2, 607 + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack +.L3672: + ldr x0, [x29, 104] + ldr w1, [x20, 3364] + add x0, x28, x0, lsl 6 + ldr w23, [x0, 36] + cmp w23, w1 + bcc .L3673 + ldr x0, [x29, 112] + bl zbuf_free + mov w0, -1 +.L3667: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 144 + ret +.L3673: + ldrb w22, [x0, 57] + ldrb w21, [x0, 56] + ldr x27, [x0, 8] + ldr x24, [x0, 24] + ldrb w0, [x20, 3380] + cbz w0, .L3675 + adrp x0, .LANCHOR5+360 + ldrb w19, [x0, #:lo12:.LANCHOR5+360] + add x19, x28, x19, lsl 6 +.L3676: + ldrb w0, [x19] + cmp w0, 255 + bne .L3677 + ldr w0, [x19, 36] + cmp w23, w0 + bne .L3675 + ldr x0, [x19, 8] + ubfiz x22, x22, 9, 8 + lsl w2, w21, 9 + add x1, x27, x22 + add x0, x0, x22 + bl ftl_memcpy + adrp x0, .LANCHOR3+1946 + ldr x2, [x19, 8] + ldr x1, [x19, 24] + ldrb w0, [x0, #:lo12:.LANCHOR3+1946] + add x1, x1, 16 + sub w0, w0, #2 + sbfiz x0, x0, 9, 32 + add x2, x2, x0 + mov w0, 2 + bl ftl_debug_info_fill + ldr x0, [x29, 112] + bl zbuf_free + b .L3668 +.L3677: + ubfiz x19, x0, 6, 8 + add x19, x28, x19 + b .L3676 +.L3675: + mov w0, w23 + bl lpa_hash_get_ppa + str w0, [x29, 140] + cmn w0, #1 + bne .L3679 + mov w2, 0 + add x1, x29, 140 + mov w0, w23 + bl pm_log2phys +.L3679: + ldr x19, [x20, 1128] + add x0, x20, 1306 + ldr w2, [x29, 140] + add x4, x20, 3354 + add x19, x19, 16 + mov w3, 0 + mov x26, 0 +.L3681: + ldr w1, [x0, 34] + cmp w23, w1 + bne .L3680 + ldrb w1, [x0] + tbz x1, 3, .L3680 + ldr w2, [x0, 38] + and w1, w1, -9 + ldr x26, [x0, 6] + mov w3, 1 + strb w1, [x0] +.L3680: + add x0, x0, 64 + cmp x0, x4 + bne .L3681 + cbz w3, .L3682 + str w2, [x29, 140] +.L3682: + adrp x25, .LANCHOR3 + add x0, x25, :lo12:.LANCHOR3 + str x25, [x29, 120] + ldrb w0, [x0, 1946] + cmp w21, w0 + bcs .L3708 + add w21, w22, w21 + cbz x26, .L3684 + cbz w22, .L3685 + lsl w2, w22, 9 + mov x1, x26 + mov x0, x27 + bl ftl_memcpy + ldr x19, [x20, 1128] + add x19, x19, 48 +.L3685: + ldr x0, [x29, 120] + add x0, x0, :lo12:.LANCHOR3 + ldrb w2, [x0, 1946] + cmp w21, w2 + bcc .L3686 + ldr x19, [x20, 1128] + add x19, x19, 16 +.L3708: + mov w26, 0 + b .L3683 +.L3686: + ubfiz x0, x21, 9, 9 + sub w2, w2, w21 + add x1, x26, x0 + lsl w2, w2, 9 + add x0, x27, x0 + bl ftl_memcpy + b .L3708 +.L3684: + ldr w0, [x29, 140] + cmn w0, #1 + beq .L3687 + mov w0, 1 + bl buf_alloc + ldr w1, [x29, 140] + mov x25, x0 + stp w23, w1, [x0, 36] + mov w1, 1 + bl sblk_read_page + ldr x3, [x25, 24] + ldr w0, [x3, 4] + ldr w26, [x3, 12] + cmp w23, w0 + add w26, w26, 1 + bne .L3688 + ldr w0, [x25, 52] + cmn w0, #1 + bne .L3689 +.L3688: + ldrb w2, [x20, 1205] + mov w6, 1 + mov w0, 24 + ldr w1, [x25, 40] + sub w0, w0, w2 + lsl w6, w6, w2 + ldr x2, [x29, 120] + sub w6, w6, #1 + add x2, x2, :lo12:.LANCHOR3 + lsl w7, w6, w0 + lsr w0, w1, w0 + bic w1, w1, w7 + ldrb w4, [x2, 1946] + and w0, w0, w6 + ldr x2, [x25, 8] + bl flash_read_page_en + str w0, [x25, 52] +.L3689: + ldr x0, [x25, 24] + ldr w0, [x0, 4] + cmp w23, w0 + bne .L3690 + ldr w0, [x25, 52] + cmn w0, #1 + bne .L3691 +.L3690: + ldr x1, [x20, 1128] + mov w3, w23 + ldr w2, [x29, 140] + ldr w0, [x1, 552] + add w0, w0, 1 + str w0, [x1, 552] + adrp x0, .LC296 + add x0, x0, :lo12:.LC296 + ldrb w1, [x25, 1] + ldr w4, [x25, 52] + bl printk + ldr x1, [x25, 24] + mov w3, 4 + adrp x0, .LC240 + mov w2, w3 + add x0, x0, :lo12:.LC240 + bl rknand_print_hex +.L3691: + ldr x0, [x25, 24] + ldr w0, [x0, 4] + cmp w23, w0 + bne .L3692 + ldr w0, [x25, 52] + cmn w0, #1 + bne .L3693 +.L3692: + adrp x1, .LANCHOR4 + add x1, x1, :lo12:.LANCHOR4 + add x1, x1, 1000 + mov w2, 699 + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack +.L3693: + cbz w22, .L3694 + ldr w0, [x29, 140] + lsl w2, w22, 9 + cmn w0, #1 + beq .L3695 + ldr x1, [x25, 8] + mov x0, x27 + bl ftl_memcpy +.L3696: + ldr x19, [x20, 1128] + add x19, x19, 48 +.L3694: + ldr x0, [x29, 120] + add x0, x0, :lo12:.LANCHOR3 + ldrb w2, [x0, 1946] + cmp w21, w2 + bcc .L3697 + bls .L3698 + ldr x19, [x20, 1128] + add x19, x19, 16 +.L3698: + cbz x25, .L3683 + ldrb w0, [x25, 2] + mov x1, x25 + and w0, w0, -9 + strb w0, [x25, 2] + add x0, x20, 3355 + bl buf_remove_buf + mov x0, x25 + bl zbuf_free +.L3683: + ldrh w0, [x19, 6] + cbnz w0, .L3700 + bl ftl_flush + mov x0, x19 + bl ftl_alloc_new_data_sblk +.L3700: + mov x0, x19 + bl ftl_get_new_free_page + mov w3, w0 + ldr x0, [x29, 104] + mov x1, x24 + str w3, [x29, 100] + lsl x22, x0, 6 + add x21, x28, x22 + ldr w0, [x21, 32] + stp w0, w23, [x24] + str w26, [x24, 12] + ldr w0, [x29, 140] + str w0, [x24, 8] + ldr x0, [x29, 120] + str wzr, [x1, 16]! + add x25, x0, :lo12:.LANCHOR3 + mov w0, 2 + ldrb w2, [x25, 1946] + sub w2, w2, #2 + sbfiz x2, x2, 9, 32 + add x2, x27, x2 + bl ftl_debug_info_fill + ldr w0, [x29, 140] + mov w1, 10 + ldr w3, [x29, 100] + stp w3, w0, [x21, 40] + mov w0, -1 + strb w0, [x28, x22] + ldrb w0, [x21, 2] + orr w0, w0, w1 + strb w0, [x21, 2] + ldrh w1, [x19, 12] + ldrh w0, [x19, 10] + add w0, w0, w1 + ldr x1, [x29, 112] + sub w0, w0, #1 + strh w0, [x21, 48] + adrp x21, .LANCHOR5 + add x22, x21, :lo12:.LANCHOR5 + add x0, x22, 360 + bl buf_add_tail + ldrb w0, [x20, 3380] + add w0, w0, 1 + strb w0, [x20, 3380] + bl timer_get_time + str w0, [x22, 364] + ldrb w2, [x20, 3380] + ldrh w0, [x19, 6] + cmp w2, 2 + bhi .L3701 + cmp w0, 1 + bne .L3671 +.L3701: + ldrb w1, [x19, 5] + cmp w1, 0 + mov w1, 0 + cset w4, ne + cmp w0, 1 + add x0, x21, :lo12:.LANCHOR5 + csinc w4, w2, w4, eq + ldrb w0, [x0, 360] + mov w3, w0 +.L3705: + cmp w1, w4 + bne .L3706 + and w1, w1, 255 + add x21, x21, :lo12:.LANCHOR5 + sub w2, w2, w1 + ubfiz x0, x0, 6, 8 + strb w2, [x20, 3380] + add x0, x28, x0 + strb w3, [x21, 360] + bl sblk_prog_page + ldrh w0, [x19, 6] + cmp w0, 1 + bne .L3671 + bl sblk_wait_write_queue_completed + bl ftl_write_completed + mov x0, x19 + bl ftl_write_last_log_page + mov x0, x19 + bl ftl_alloc_new_data_sblk +.L3671: + ldrb w0, [x20, 3381] + cbnz w0, .L3668 +.L3670: + bl ftl_write_completed + mov w0, 0 + b .L3667 +.L3697: + ldr w0, [x29, 140] + sub w2, w2, w21 + lsl w2, w2, 9 + cmn w0, #1 + ubfiz x0, x21, 7, 9 + beq .L3699 + ldr x1, [x25, 8] + lsl x0, x0, 2 + add x1, x1, x0 + add x0, x27, x0 + bl ftl_memcpy + b .L3698 +.L3699: + mov w1, 0 + add x0, x27, x0, lsl 2 + bl ftl_memset + b .L3698 +.L3706: + ubfiz x3, x3, 6, 8 + add w1, w1, 1 + ldrb w3, [x28, x3] + b .L3705 +.L3707: + lsl w2, w22, 9 + mov x25, 0 + mov w26, 0 +.L3695: + mov w1, 0 + mov x0, x27 + bl ftl_memset + b .L3696 +.L3687: + cbnz w22, .L3707 + mov w26, 0 + mov x25, 0 + b .L3694 + .size ftl_write_commit, .-ftl_write_commit + .align 2 + .global gc_do_copy_back + .type gc_do_copy_back, %function +gc_do_copy_back: + stp x29, x30, [sp, -240]! + add x29, sp, 0 + stp x21, x22, [sp, 32] + adrp x22, .LANCHOR3 + add x1, x22, :lo12:.LANCHOR3 + stp x19, x20, [sp, 16] + stp x23, x24, [sp, 48] + stp x25, x26, [sp, 64] + stp x27, x28, [sp, 80] + ldrb w0, [x1, 1337] + cbnz w0, .L3734 + bl buf_alloc + mov x20, x0 + cbz x0, .L3733 + adrp x19, .LANCHOR0 + add x2, x19, :lo12:.LANCHOR0 + ldrh w3, [x2, 3442] + mov w0, w3 + bl gc_get_src_ppa_from_index + add w3, w3, 1 + mov w23, w0 + str w23, [x20, 40] + strh w3, [x2, 3442] + mov w1, 1 + mov x0, x20 + bl sblk_read_page + ldr w0, [x20, 52] + cmp w0, 512 + ccmn w0, #1, 4, ne + bne .L3736 + adrp x1, .LANCHOR4 + add x1, x1, :lo12:.LANCHOR4 + add x1, x1, 1024 + mov w2, 1032 + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack +.L3736: + ldr x0, [x20, 24] + ldr w21, [x0, 4] + mov w0, w21 + bl lpa_hash_get_ppa + str w0, [x29, 192] + cmn w0, #1 + bne .L3737 + mov w2, 0 + add x1, x29, 192 + mov w0, w21 + bl pm_log2phys +.L3737: + ldr w24, [x29, 192] + cmp w23, w24 + bne .L3738 + add x1, x19, :lo12:.LANCHOR0 + add x0, x1, 1306 + add x1, x1, 3354 +.L3741: + ldr w2, [x0, 34] + cmp w21, w2 + bne .L3739 + ldrb w2, [x0] + tbz x2, 1, .L3739 + mov x0, x20 + bl zbuf_free + adrp x0, .LANCHOR2 + ldr w0, [x0, #:lo12:.LANCHOR2] + tbz x0, 8, .L3733 + add x19, x19, :lo12:.LANCHOR0 + adrp x0, .LC297 + mov w2, w23 + mov w1, w21 + add x0, x0, :lo12:.LC297 + ldrh w3, [x19, 3442] + bl printk +.L3733: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 240 + ret +.L3739: + add x0, x0, 64 + cmp x1, x0 + bne .L3741 + add x22, x22, :lo12:.LANCHOR3 + strb wzr, [x20, 57] + str w21, [x20, 36] + ldrb w0, [x22, 1946] + strb w0, [x20, 56] + ldr x0, [x20, 24] + ldr w1, [x0] + str w1, [x20, 32] + str wzr, [x0, 16] + adrp x0, .LANCHOR2 + ldr w0, [x0, #:lo12:.LANCHOR2] + tbz x0, 8, .L3742 + mov w0, w21 + bl lpa_hash_get_ppa + add x1, x19, :lo12:.LANCHOR0 + mov w3, w0 + mov w4, w23 + adrp x0, .LC298 + mov w2, w24 + add x0, x0, :lo12:.LC298 + ldrh w5, [x1, 3442] + mov w1, w21 + bl printk +.L3742: + add x19, x19, :lo12:.LANCHOR0 + mov x0, x20 + bl ftl_gc_write_buf + bl ftl_write_commit + ldr x1, [x19, 3384] + ldr w0, [x1, 60] + add w0, w0, 1 + str w0, [x1, 60] + ldrh w0, [x19, 3444] + add w0, w0, 1 + strh w0, [x19, 3444] + b .L3733 +.L3738: + adrp x0, .LANCHOR2 + ldr w0, [x0, #:lo12:.LANCHOR2] + tbz x0, 8, .L3743 + add x19, x19, :lo12:.LANCHOR0 + mov w0, w21 + bl lpa_hash_get_ppa + mov w3, w0 + mov w4, w23 + adrp x0, .LC298 + ldrh w5, [x19, 3442] + mov w2, w24 + mov w1, w21 + add x0, x0, :lo12:.LC298 + bl printk +.L3743: + mov x0, x20 + bl zbuf_free + b .L3733 +.L3734: + adrp x21, .LANCHOR0 + add x0, x21, :lo12:.LANCHOR0 + ldrb w1, [x1, 1321] + ldr x26, [x0, 1128] + add x0, x26, 80 + str x0, [x29, 184] + ldrb w0, [x0, 9] + and w19, w0, 65535 + cmp w1, w19 + bhi .L3798 + cmp w19, 2 + mov w23, 2 + csel w23, w19, w23, ls + and w23, w23, 65535 +.L3744: + add x1, x22, :lo12:.LANCHOR3 + ldrb w20, [x1, 1320] + cmp w20, 3 + bne .L3745 + add x3, x21, :lo12:.LANCHOR0 + ldrb w2, [x3, 1212] + ldrh w5, [x3, 5522] + cbz w2, .L3746 + sdiv w0, w5, w0 + ldrb w1, [x1, 1950] + mov w24, w5 + and w26, w0, 65535 + cbz w1, .L3747 + adrp x1, .LANCHOR2 + add x1, x1, :lo12:.LANCHOR2 + add x1, x1, 2136 + ldrh w0, [x1, w0, sxtw 1] + cmp w0, 0 + cset w20, ne +.L3865: + add w20, w20, 1 +.L3748: + msub w19, w19, w26, w5 + and w19, w19, 65535 +.L3749: + adrp x8, .LANCHOR5 + adrp x0, .LANCHOR2 + add x8, x8, :lo12:.LANCHOR5 + add x0, x0, :lo12:.LANCHOR2 + add x7, x21, :lo12:.LANCHOR0 + mul w11, w20, w23 + add x10, x22, :lo12:.LANCHOR3 + add x6, x0, 2136 + sxtw x12, w26 + mov x13, x8 + add x7, x7, 3416 + mov w5, 0 +.L3753: + cmp w5, w11 + bge .L3806 + ldr x1, [x29, 184] + add w2, w24, w5 + ldrh w0, [x10, 1338] + ldrb w1, [x1, 9] + mul w0, w0, w1 + ldrb w1, [x8, 465] + sub w0, w0, w1 + cmp w2, w0 + blt .L3754 + ldrb w0, [x10, 1950] + cbz w0, .L3806 + ldrh w0, [x6, x12, lsl 1] + cmp w0, w26 + bcc .L3755 +.L3806: + mov w0, 1 + str w0, [x29, 180] + b .L3751 +.L3798: + mov w23, 1 + b .L3744 +.L3747: + adrp x0, .LANCHOR5+461 + ldrb w0, [x0, #:lo12:.LANCHOR5+461] + cbz w0, .L3800 + sub w0, w26, #62 + and w0, w0, 65535 + cmp w0, 2159 + bhi .L3801 + udiv w20, w26, w20 + add w20, w20, w20, lsl 1 + sub w20, w26, w20 + and w20, w20, 65535 + cmp w20, 0 + cset w20, eq + b .L3865 +.L3800: + mov w20, 1 + b .L3748 +.L3801: + mov w20, 2 + b .L3748 +.L3746: + ldrb w1, [x1, 1336] + cbz w1, .L3750 + add w19, w0, w0, lsl 1 + mov w24, w5 + sdiv w19, w5, w19 + mul w0, w0, w19 + and w26, w19, 65535 + sub w0, w0, w0, lsl 2 + add w19, w0, w5 + ldrb w0, [x3, 1213] + sdiv w19, w19, w20 + and w19, w19, 65535 + cbz w0, .L3749 + add w4, w26, w26, lsl 1 + and w26, w4, 65535 + b .L3749 +.L3750: + sdiv w2, w5, w0 + adrp x1, .LANCHOR2 + add x1, x1, :lo12:.LANCHOR2 + add x1, x1, 3672 + msub w19, w19, w2, w5 + ldrh w25, [x1, w2, sxtw 1] + and w19, w19, 65535 + and w1, w25, 7 + str w1, [x29, 180] + lsr w26, w25, 3 + madd w0, w26, w0, w19 + add w0, w0, w0, lsl 1 + and w24, w0, 65535 + uxtw x0, w1 + cmp w0, 1 + beq .L3749 +.L3751: + mul w0, w20, w23 + str wzr, [x29, 160] + str w0, [x29, 176] + ubfiz w0, w23, 1, 15 + strh w0, [x29, 128] + str w0, [x29, 156] + msub w0, w0, w20, w24 + and w0, w0, 65535 + str w0, [x29, 152] + ldrh w0, [x29, 152] + str x0, [x29, 120] + adrp x0, .LANCHOR5 + add x28, x0, :lo12:.LANCHOR5 + adrp x0, .LANCHOR4 + add x0, x0, :lo12:.LANCHOR4 + str x0, [x29, 112] +.L3756: + ldr w0, [x29, 160] + ldr w1, [x29, 176] + and w0, w0, 65535 + str w0, [x29, 164] + ldrh w27, [x29, 160] + cmp w0, w1 + blt .L3780 + add x1, x22, :lo12:.LANCHOR3 + ldrb w0, [x1, 1320] + cmp w0, 3 + add x0, x29, 192 + bne .L3781 + add x2, x21, :lo12:.LANCHOR0 + ldrb w2, [x2, 1212] + cbz w2, .L3782 + ldr w2, [x29, 176] + mov w1, 0 + sub w2, w2, #1 +.L3783: + cmp w1, w2 + blt .L3784 +.L3870: + ldr x0, [x0, w2, sxtw 3] + mov w1, -1 + strb w1, [x0] + ldrb w1, [x29, 176] + ldr x0, [x29, 192] + bl sblk_prog_page + b .L3785 +.L3745: + ldrb w1, [x1, 1322] + cbnz w1, .L3752 + add x1, x21, :lo12:.LANCHOR0 + mov w20, 1 + ldrh w24, [x1, 5522] + sdiv w26, w24, w0 + msub w19, w19, w26, w24 + and w19, w19, 65535 + b .L3749 +.L3752: + add x1, x21, :lo12:.LANCHOR0 + mov w20, 2 + ldrh w24, [x1, 5522] + sdiv w26, w24, w0 + msub w19, w19, w26, w24 + and w19, w19, 65535 + b .L3749 +.L3755: + tbz x5, 0, .L3806 +.L3754: + ldr x9, [x13, 288] + sbfiz x2, x2, 2, 32 + ldr w0, [x9, x2] + cmn w0, #1 + bne .L3757 + ldrh w3, [x7, 26] + ldrh w0, [x7, 24] + cmp w0, w3 + bls .L3733 + ldrb w0, [x10, 1950] + cbz w0, .L3758 + ldrh w0, [x6, x12, lsl 1] + cmp w0, w26 + bcs .L3758 + tbz x5, 0, .L3758 + ubfiz x0, x0, 2, 16 + ldr w0, [x9, x0] +.L3866: + str w0, [x9, x2] +.L3757: + add w5, w5, 1 + and w5, w5, 65535 + b .L3753 +.L3758: + mov w0, w3 + bl gc_get_src_ppa_from_index + add w3, w3, 1 + strh w3, [x7, 26] + b .L3866 +.L3780: + ldr w0, [x29, 164] + add w1, w24, w0 + sxtw x0, w1 + str x0, [x29, 168] + add x0, x22, :lo12:.LANCHOR3 + sxtw x2, w1 + ldr x0, [x0, 1328] + ldrb w0, [x0, x2] + cmp w0, 255 + bne .L3760 + str w1, [x29, 144] + mov w0, 0 + bl buf_alloc + mov x25, x0 + ldr w1, [x29, 144] + cbnz x0, .L3761 + str w1, [x29, 144] + bl sblk_wait_write_queue_completed + bl ftl_write_completed + bl gc_write_completed + bl gc_free_temp_buf + mov w0, 0 + bl buf_alloc + ldr w1, [x29, 144] + mov x25, x0 + cbz x0, .L3733 +.L3761: + add x2, x22, :lo12:.LANCHOR3 + ldr x3, [x29, 168] + ldrb w5, [x25, 1] + ldr x0, [x2, 1328] + strb w5, [x0, x3] + add x0, x21, :lo12:.LANCHOR0 + ldr x3, [x29, 184] + ldrb w5, [x0, 3423] + add w5, w5, 1 + strb w5, [x0, 3423] + add w0, w27, w24 + strh w0, [x25, 48] + ldrb w0, [x29, 180] + strb w0, [x25, 61] + ldrh w0, [x2, 1338] + ldrb w5, [x3, 9] + adrp x3, .LANCHOR5 + mul w0, w0, w5 + add x5, x3, :lo12:.LANCHOR5 + ldrb w5, [x5, 465] + sub w0, w0, w5 + cmp w1, w0 + blt .L3762 + ldrb w0, [x2, 1950] + cbz w0, .L3763 + adrp x0, .LANCHOR2 + add x0, x0, :lo12:.LANCHOR2 + add x0, x0, 2136 + ldrh w0, [x0, w26, sxtw 1] + cmp w0, w26 + bcs .L3763 + tbnz x27, 0, .L3762 +.L3763: + ldr x0, [x28, 280] + mov w2, -1 + ldr x3, [x29, 168] + str w2, [x0, x3, lsl 2] + ldrb w0, [x28, 465] + cmp w0, 2 + bne .L3764 + ldr x0, [x29, 184] + add x7, x22, :lo12:.LANCHOR3 + ldrh w2, [x28, 462] + ldrh w6, [x7, 1338] + ldrb w0, [x0, 9] + mul w0, w0, w6 + sub w0, w0, #2 + cmp w1, w0 + bne .L3765 + ldr x1, [x28, 280] + ldr x0, [x25, 8] + str x7, [x29, 144] + bl ftl_memcpy + ldr x7, [x29, 144] + mov w1, 0 + ldr x0, [x25, 24] + ldrb w2, [x7, 1946] + lsl w2, w2, 1 + bl ftl_memset + ldr x0, [x25, 24] + mov w1, 15555 + movk w1, 0xf55f, lsl 16 + str w1, [x0] + ldr x2, [x25, 24] + ldrh w1, [x28, 462] + ldr x0, [x25, 8] + str x2, [x29, 144] + bl js_hash + ldr x2, [x29, 144] + add x1, x21, :lo12:.LANCHOR0 + str w0, [x2, 4] + ldr x1, [x1, 1128] + ldr x0, [x25, 24] + ldr w1, [x1, 132] + str w1, [x0, 8] + ldr x0, [x25, 24] + str wzr, [x0, 12] +.L3766: + ldr x0, [x25, 24] + str wzr, [x0, 16] +.L3760: + add x5, x22, :lo12:.LANCHOR3 + ldr x1, [x29, 168] + ldrsw x2, [x29, 164] + add x3, x29, 192 + add x7, x21, :lo12:.LANCHOR0 + ldr x0, [x5, 1328] + add x6, x7, 1304 + ldrb w1, [x0, x1] + ubfiz x0, x1, 6, 8 + add x0, x6, x0 + add x6, x6, x1, lsl 6 + str x0, [x3, x2, lsl 3] + ldrb w0, [x29, 180] + strb w0, [x6, 61] + mov w0, 2 + strh w0, [x6, 50] + ldrb w0, [x5, 1320] + cmp w0, 3 + bne .L3771 + ldrb w8, [x7, 1212] + cbz w8, .L3772 + ldrb w0, [x5, 1950] + and w6, w27, 1 + add w7, w6, w26 + cbz w0, .L3773 + adrp x5, .LANCHOR2 + add x5, x5, :lo12:.LANCHOR2 + add x5, x5, 2136 + ldrh w0, [x5, w26, sxtw 1] + cmp w0, w26 + bcs .L3773 + cmp w6, 0 + csel w7, w7, w0, eq +.L3773: + udiv w5, w27, w20 + ldr x0, [x29, 184] + add x6, x21, :lo12:.LANCHOR0 + add x6, x6, x1, lsl 6 + add w5, w5, w19 + add x5, x0, w5, sxtw 1 + ldrh w0, [x5, 16] + add x5, x22, :lo12:.LANCHOR3 + ldrh w5, [x5, 1410] + madd w0, w0, w5, w7 + orr w0, w0, 50331648 + str w0, [x6, 1344] +.L3778: + add x0, x21, :lo12:.LANCHOR0 + add x0, x0, 1304 + add x1, x0, x1, lsl 6 + adrp x0, .LANCHOR5 + add x0, x0, :lo12:.LANCHOR5 + ldr w5, [x1, 40] + ldr x0, [x0, 296] + ldrh w1, [x1, 48] + str w5, [x0, x1, lsl 2] + b .L3797 +.L3765: + ldrb w5, [x7, 1321] + and x1, x2, 65532 + ldr x0, [x28, 280] + str x7, [x29, 144] + add x1, x0, x1 + ldr x0, [x25, 8] + mul w5, w5, w6 + lsl w5, w5, 2 + sub w5, w5, w2 + str w5, [x29, 104] + mov w2, w5 + bl ftl_memcpy + ldr x7, [x29, 144] + mov w1, 0 + ldr x0, [x25, 24] + ldrb w2, [x7, 1946] + lsl w2, w2, 1 + bl ftl_memset + ldr x0, [x25, 24] + mov w1, 15555 + movk w1, 0xf55f, lsl 16 + ldr w5, [x29, 104] + str w1, [x0] + mov w1, w5 + ldr x2, [x25, 24] + ldr x0, [x25, 8] + str x2, [x29, 144] + bl js_hash + ldr x2, [x29, 144] + add x1, x21, :lo12:.LANCHOR0 + str w0, [x2, 4] + ldr x1, [x1, 1128] + ldr x0, [x25, 24] + ldr w1, [x1, 132] + str w1, [x0, 8] + mov w1, 1 + ldr x0, [x25, 24] + str w1, [x0, 12] + b .L3766 +.L3764: + add x5, x22, :lo12:.LANCHOR3 + ldr x1, [x28, 280] + str x5, [x29, 144] + ldrb w0, [x5, 1321] + ldrh w2, [x5, 1338] + mul w2, w2, w0 + ldr x0, [x25, 8] + lsl w2, w2, 2 + bl ftl_memcpy + ldr x5, [x29, 144] + ldrb w1, [x5, 1321] + ldrh w0, [x5, 1338] + mul w0, w0, w1 + ldrb w1, [x5, 1946] + lsl w2, w0, 2 + cmp w1, w0, lsr 6 + bge .L3767 + ldrh w1, [x28, 462] + sub w2, w1, w2 +.L3767: + ldr x5, [x25, 8] + ldr x1, [x28, 288] + add x0, x5, w0, sxtw 2 + bl ftl_memcpy + add x5, x22, :lo12:.LANCHOR3 + ldr x0, [x25, 24] + mov w1, 0 + str x5, [x29, 104] + ldrb w2, [x5, 1946] + lsl w2, w2, 1 + bl ftl_memset + ldr x0, [x25, 24] + mov w1, 15555 + ldr x5, [x29, 104] + movk w1, 0xf55f, lsl 16 + str w1, [x0] + ldrb w0, [x5, 1321] + ldrh w1, [x5, 1338] + ldr x2, [x25, 24] + str x2, [x29, 144] + mul w1, w1, w0 + ldr x0, [x25, 8] + lsl w1, w1, 2 + bl js_hash + ldr x2, [x29, 144] + add x1, x21, :lo12:.LANCHOR0 + str w0, [x2, 4] + ldr x1, [x1, 1128] + ldr x0, [x25, 24] + ldr w1, [x1, 132] +.L3867: + str w1, [x0, 8] + b .L3766 +.L3762: + ldr x0, [x29, 168] + lsl x0, x0, 2 + str x0, [x29, 144] + ldr x0, [x28, 288] + ldr x1, [x29, 144] + ldr w0, [x0, x1] + mov w1, 1 + str w0, [x25, 40] + mov x0, x25 + bl sblk_read_page + ldr w0, [x25, 52] + cmp w0, 512 + ccmn w0, #1, 4, ne + bne .L3769 + add x0, x21, :lo12:.LANCHOR0 + add x2, x22, :lo12:.LANCHOR3 + ldrb w1, [x0, 1205] + mov w0, 24 + ldrh w5, [x2, 1304] + sub w0, w0, w1 + ldrb w2, [x2, 1306] + sub w1, w0, w5 + mov w0, 1 + lsl w0, w0, w1 + ldr w1, [x25, 40] + sub w0, w0, #1 + lsr w1, w1, w5 + and w0, w0, w1 + mov x1, 0 + udiv w0, w0, w2 + bl ftl_sblk_dump + ldr w0, [x25, 52] + cmp w0, 512 + ccmn w0, #1, 4, ne + bne .L3769 + ldr x0, [x25, 24] + mov w1, -1 + str w1, [x0, 4] + ldr w0, [x25, 52] + cmp w0, 512 + ccmp w0, w1, 4, ne + bne .L3769 + ldr x0, [x29, 112] + mov w2, 1223 + add x1, x0, 1024 + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack +.L3769: + ldr x1, [x25, 24] + add x0, x21, :lo12:.LANCHOR0 + ldr w0, [x0, 3364] + ldr w2, [x1, 4] + cmp w2, w0 + bcc .L3770 + mov w0, -1 + str w0, [x1, 4] +.L3770: + ldr x0, [x25, 24] + ldr x2, [x29, 144] + ldr w1, [x0, 4] + ldr x0, [x28, 280] + str w1, [x0, x2] + ldr w1, [x25, 40] + ldr x0, [x25, 24] + b .L3867 +.L3772: + udiv w0, w27, w0 + ldrb w7, [x7, 1213] + ldrh w8, [x5, 1410] + cbz w7, .L3775 + ldr x4, [x29, 184] + add w7, w0, w19 + add w0, w0, w0, lsl 1 + sub w0, w27, w0 + add x7, x4, w7, sxtw 1 + ldrh w5, [x7, 16] + madd w5, w5, w8, w26 + add w0, w5, w0, uxth +.L3871: + str w0, [x6, 40] + adrp x0, .LANCHOR5 + add x0, x0, :lo12:.LANCHOR5 + add x5, x21, :lo12:.LANCHOR0 + add x5, x5, 1304 + add x1, x5, x1, lsl 6 + ldr x5, [x0, 296] + mov w0, 3 + udiv w0, w27, w0 + ldrh w6, [x1, 48] + ldr w1, [x1, 40] + add w0, w0, w0, lsl 1 + sub w0, w27, w0 + and w0, w0, 65535 + add w0, w0, 1 + orr w0, w1, w0, lsl 24 + str w0, [x5, x6, lsl 2] +.L3797: + add x1, x22, :lo12:.LANCHOR3 + ldrb w0, [x1, 1950] + cbz w0, .L3779 + adrp x0, .LANCHOR2 + add x0, x0, :lo12:.LANCHOR2 + add x0, x0, 2136 + ldrh w0, [x0, w26, sxtw 1] + cmp w0, w26 + bcs .L3779 + tbz x27, 0, .L3779 + ldr x0, [x1, 1328] + mov w5, -1 + ldr x4, [x29, 168] + strb w5, [x0, x4] + ldr x0, [x3, x2, lsl 3] + ldrh w2, [x29, 152] + strh w2, [x0, 48] + ldrb w2, [x0, 1] + ldr x0, [x1, 1328] + ldr x1, [x29, 120] + strb w2, [x0, x1] + adrp x0, .LANCHOR5 + add x0, x0, :lo12:.LANCHOR5 + mov w1, -1 + ldr x0, [x0, 288] + str w1, [x0, x4, lsl 2] +.L3779: + ldr w0, [x29, 160] + add w0, w0, 1 + str w0, [x29, 160] + b .L3756 +.L3775: + ldr x4, [x29, 184] + add w0, w0, w19 + add x0, x4, w0, sxtw 1 + ldrh w0, [x0, 16] + madd w0, w0, w8, w26 + b .L3871 +.L3771: + cmp w0, 2 + bne .L3778 + ldrb w0, [x5, 1322] + ldrh w7, [x5, 1410] + cbnz w0, .L3777 + ldr w0, [x29, 164] + add w5, w19, w0 + ldr x0, [x29, 184] + add x5, x0, w5, sxtw 1 + ldrh w0, [x5, 16] + madd w0, w0, w7, w26 +.L3868: + orr w0, w0, 33554432 + str w0, [x6, 40] + b .L3778 +.L3777: + ldr x0, [x29, 184] + add w5, w19, w27, lsr 1 + add x5, x0, w5, sxtw 1 + ldrh w0, [x5, 16] + and w5, w27, 1 + madd w0, w0, w7, w26 + add w0, w0, w5 + b .L3868 +.L3784: + ldr x3, [x0, w1, sxtw 3] + add w1, w1, 1 + ldr x5, [x0, w1, sxtw 3] + and w1, w1, 65535 + ldrb w5, [x5, 1] + strb w5, [x3] + b .L3783 +.L3782: + ldrb w2, [x1, 1336] + ldr x1, [x29, 192] + cbz w2, .L3786 +.L3789: + strb wzr, [x1, 60] + b .L3788 +.L3786: + ldr w2, [x29, 180] + cmp w2, 1 + bne .L3787 + mov w2, 9 +.L3869: + strb w2, [x1, 60] +.L3788: + mov w2, w23 + add x1, x0, 24 + bl sblk_xlc_prog_pages +.L3785: + add x0, x22, :lo12:.LANCHOR3 + ldrb w1, [x0, 1336] + cbz w1, .L3794 + ldr w0, [x29, 128] + add w23, w23, w0 + and w23, w23, 65535 +.L3795: + add x21, x21, :lo12:.LANCHOR0 + add x22, x22, :lo12:.LANCHOR3 + ldr x1, [x21, 3384] + ldr w0, [x1, 52] + add w0, w0, w23 + str w0, [x1, 52] + ldr x1, [x29, 184] + ldrh w0, [x21, 5522] + add w23, w23, w0 + ldrh w0, [x22, 1338] + and w23, w23, 65535 + strh w23, [x21, 5522] + ldrb w1, [x1, 9] + mul w0, w0, w1 + cmp w23, w0 + blt .L3796 + ldr x0, [x21, 1128] + strh wzr, [x0, 86] +.L3796: + bl gc_write_completed + b .L3733 +.L3787: + ldr w2, [x29, 180] + cmp w2, 2 + bne .L3789 + mov w2, 13 + b .L3869 +.L3781: + ldrb w2, [x1, 1322] + cbz w2, .L3807 + ldrb w1, [x1, 1323] + cbnz w1, .L3791 +.L3790: + ldr w2, [x29, 176] + sub w2, w2, #1 +.L3792: + cmp w1, w2 + bge .L3870 + ldr x3, [x0, w1, sxtw 3] + add w1, w1, 1 + ldr x5, [x0, w1, sxtw 3] + and w1, w1, 65535 + ldrb w5, [x5, 1] + strb w5, [x3] + b .L3792 +.L3807: + mov w1, 0 + b .L3790 +.L3791: + mov w1, w23 + bl sblk_3d_mlc_prog_pages + b .L3785 +.L3794: + ldrb w1, [x0, 1322] + cbnz w1, .L3808 + add x1, x21, :lo12:.LANCHOR0 + ldrb w1, [x1, 1212] + cbz w1, .L3795 + ldrb w0, [x0, 1950] + ldrh w1, [x29, 176] + cbz w0, .L3809 + adrp x0, .LANCHOR2 + add x0, x0, :lo12:.LANCHOR2 + add x0, x0, 2136 + ldrh w0, [x0, w26, sxtw 1] + cmp w0, w26 + csel w23, w23, w1, cc + b .L3795 +.L3808: + ldr w23, [x29, 156] + b .L3795 +.L3809: + mov w23, w1 + b .L3795 + .size gc_do_copy_back, .-gc_do_copy_back + .align 2 + .global zftl_do_gc + .type zftl_do_gc, %function +zftl_do_gc: + sub sp, sp, #128 + stp x29, x30, [sp, 16] + add x29, sp, 16 + stp x19, x20, [sp, 32] + adrp x19, .LANCHOR0 + stp x27, x28, [sp, 96] + mov w27, w0 + add x0, x19, :lo12:.LANCHOR0 + stp x21, x22, [sp, 48] + stp x23, x24, [sp, 64] + cmp w27, 1 + stp x25, x26, [sp, 80] + adrp x20, .LANCHOR5 + ldrh w24, [x0, 3372] + ldrh w22, [x0, 3368] + ldrh w23, [x0, 3370] + add w22, w24, w22 + ldr x25, [x0, 1128] + and w22, w22, 65535 + beq .L3873 +.L3885: + add x0, x20, :lo12:.LANCHOR5 + ldrb w1, [x0, 264] + cmp w1, 6 + bhi .L4000 + adrp x0, .L3876 + add x0, x0, :lo12:.L3876 + ldrh w0, [x0,w1,uxtw #1] + adr x1, .Lrtx3876 + add x0, x1, w0, sxth #2 + br x0 +.Lrtx3876: + .section .rodata + .align 0 + .align 2 +.L3876: + .2byte (.L3875 - .Lrtx3876) / 4 + .2byte (.L3877 - .Lrtx3876) / 4 + .2byte (.L3878 - .Lrtx3876) / 4 + .2byte (.L3879 - .Lrtx3876) / 4 + .2byte (.L3880 - .Lrtx3876) / 4 + .2byte (.L3881 - .Lrtx3876) / 4 + .2byte (.L3882 - .Lrtx3876) / 4 + .text +.L3881: + add x21, x19, :lo12:.LANCHOR0 + mov w23, 0 + add x21, x21, 3416 +.L3883: + bl gc_check_data_one_wl + cbz w0, .L3996 + add x19, x19, :lo12:.LANCHOR0 + add x20, x20, :lo12:.LANCHOR5 + ldr x0, [x19, 1128] + strh wzr, [x19, 3472] + ldrh w0, [x0, 80] + bl ftl_free_sblk + ldr x1, [x19, 1128] + mov w0, -1 + ldr x2, [x19, 3384] + strh w0, [x1, 80] + strh w0, [x2, 126] + strh w0, [x1, 130] + ldr x0, [x19, 3424] + bl zbuf_free + strb wzr, [x20, 264] + str xzr, [x19, 3424] + b .L4090 +.L3873: + add x0, x20, :lo12:.LANCHOR5 + ldr w21, [x0, 468] + cbnz w21, .L3884 + ldr w0, [x0, 472] + cbz w0, .L3885 +.L3884: + adrp x0, .LANCHOR3+1380 + ldrh w0, [x0, #:lo12:.LANCHOR3+1380] + cmp w22, w0, lsr 2 + bls .L3885 + add x0, x19, :lo12:.LANCHOR0 + ldrh w0, [x0, 3392] + cmp w0, w22 + bcs .L3885 + add w21, w21, 20 + bl timer_get_time + cmp w21, w0 + bcs .L3886 + add x0, x20, :lo12:.LANCHOR5 + str wzr, [x0, 468] +.L3886: + add x26, x20, :lo12:.LANCHOR5 + ldr w21, [x26, 472] + bl timer_get_time + add w21, w21, 20 + cmp w21, w0 + bcs .L3887 + str wzr, [x26, 472] +.L3887: + add x0, x19, :lo12:.LANCHOR0 + ldr x0, [x0, 1128] + ldrh w0, [x0, 124] + cbnz w0, .L3885 +.L4000: + mov w23, 16 + b .L3872 +.L3875: + add x0, x19, :lo12:.LANCHOR0 + ldrh w2, [x25, 80] + add w24, w24, w23 + and w24, w24, 65535 + ldrh w1, [x0, 3376] + ldrh w26, [x0, 3374] + add w26, w26, w1 + mov w1, 65535 + and w26, w26, 65535 + cmp w2, w1 + beq .L3888 + cbnz w27, .L3889 + ldrh w0, [x0, 3392] + cmp w22, w0, lsl 1 + bge .L4000 +.L3889: + adrp x21, .LANCHOR3 + add x5, x21, :lo12:.LANCHOR3 + add x0, x5, 1368 + ldrh w1, [x5, 1378] + add w1, w1, 1 + and w1, w1, 65535 + strh w1, [x5, 1378] + bl _list_get_gc_head_node + and w2, w0, 65535 + mov w1, 65535 + cmp w2, w1 + beq .L3891 + add x3, x20, :lo12:.LANCHOR5 + ubfiz x2, x2, 1, 16 + ldr w1, [x3, 268] + add w1, w1, 1 + str w1, [x3, 268] + add x3, x19, :lo12:.LANCHOR0 + ldr x4, [x3, 1120] + ldrh w2, [x4, x2] + ldrh w4, [x5, 1376] + cmp w4, w2 + bcs .L3892 + ldrh w4, [x3, 1096] + cmp w1, w4, lsr 4 + bls .L3891 + ldrh w1, [x3, 3406] + cmp w1, w2 + bls .L3891 +.L3892: + add x1, x21, :lo12:.LANCHOR3 + ldrb w2, [x1, 1337] + mov w1, 0 + bl gc_add_sblk + cbz w0, .L3893 + add x20, x20, :lo12:.LANCHOR5 + mov w0, 1 + str wzr, [x20, 268] + strb w0, [x20, 264] + b .L4000 +.L3891: + add x0, x21, :lo12:.LANCHOR3 + strh wzr, [x0, 1378] +.L3893: + cmp w24, 15 + bls .L4002 + add x1, x19, :lo12:.LANCHOR0 + add x0, x21, :lo12:.LANCHOR3 + ldrh w1, [x1, 3378] + ldrh w0, [x0, 1382] + cmp w1, w0 + bhi .L4002 + cmp w26, 0 + cset w23, eq + add w23, w23, 1 +.L3894: + adrp x0, .LANCHOR2 + ldr w0, [x0, #:lo12:.LANCHOR2] + tbz x0, 8, .L3895 + add x19, x19, :lo12:.LANCHOR0 + mov w4, w24 + mov w3, w22 + mov w1, 2807 + ldr x0, [x19, 1128] + ldrh w7, [x0, 122] + ldrh w6, [x0, 120] + ldrh w5, [x0, 124] + add x0, x21, :lo12:.LANCHOR3 + ldrb w2, [x0, 1337] + ldrh w0, [x25, 80] + str w0, [sp] + adrp x0, .LC299 + add x0, x0, :lo12:.LC299 + bl printk +.L3895: + add x21, x21, :lo12:.LANCHOR3 + mov w2, 1 + mov w1, w23 + ldrb w0, [x21, 1337] + bl gc_search_src_blk + cmp w0, 0 + ble .L3896 +.L3897: + add x20, x20, :lo12:.LANCHOR5 + mov w0, 1 +.L4092: + strb w0, [x20, 264] + b .L4000 +.L4002: + mov w23, 2 + b .L3894 +.L3896: + ldrb w0, [x21, 1337] + mov w2, 1 + mov w1, 3 + bl gc_search_src_blk + cmp w0, 0 + bgt .L3897 + b .L4000 +.L3888: + cmp w27, 1 + bne .L3898 + ldr x1, [x0, 3384] + ldrh w1, [x1, 150] + cbz w1, .L3899 + ldrh w0, [x0, 3372] + cmp w0, 8 + bls .L3899 + bl gc_ink_check_sblk +.L3899: + bl gc_scan_static_data + adrp x21, .LANCHOR3 + add x0, x19, :lo12:.LANCHOR0 + ldr x0, [x0, 1128] + ldrh w0, [x0, 122] + cbz w0, .L3900 +.L3901: + add x21, x21, :lo12:.LANCHOR3 + mov w0, 1 + add x20, x20, :lo12:.LANCHOR5 + strb w0, [x21, 1337] + b .L4092 +.L3900: + bl gc_static_wearleveling + mov w23, w0 + cbnz w0, .L3901 + bl gc_block_vpn_scan + cbz w24, .L3902 + cmp w22, w26 + bcs .L3903 + add x0, x21, :lo12:.LANCHOR3 + ldrh w0, [x0, 1380] + cmp w0, w22 + bhi .L3904 +.L3903: + add x1, x21, :lo12:.LANCHOR3 + add w0, w22, w26 + ldrh w2, [x1, 1380] + cmp w0, w2 + blt .L3904 + add x0, x19, :lo12:.LANCHOR0 + ldrh w2, [x0, 3378] + ldrh w0, [x1, 1382] + cmp w2, w0 + bcc .L3902 +.L3904: + add x5, x21, :lo12:.LANCHOR3 + mov w0, 1 + strb w0, [x5, 1337] + mov w0, 16 + bl zftl_get_gc_node.part.10 + and w1, w0, 65535 + mov w2, 65535 + cmp w1, w2 + beq .L3905 + add x2, x19, :lo12:.LANCHOR0 + ubfiz x1, x1, 1, 16 + ldr x3, [x2, 1120] + add x2, x20, :lo12:.LANCHOR5 + ldrh w3, [x3, x1] + ldrh w1, [x2, 272] + cmp w3, w1 + bcs .L3905 + cmp w22, 2 + bls .L3905 + str wzr, [x2, 268] + mov w1, 1 + strb wzr, [x5, 1337] + mov w2, 0 + bl gc_add_sblk + cbnz w0, .L3897 +.L3905: + add x5, x21, :lo12:.LANCHOR3 + mov w1, 0 + add x0, x5, 1360 + bl _list_get_gc_head_node + and w1, w0, 65535 + mov w2, 65535 + cmp w1, w2 + beq .L3906 + add x2, x19, :lo12:.LANCHOR0 + ubfiz x1, x1, 1, 16 + ldr x3, [x2, 1120] + add x2, x20, :lo12:.LANCHOR5 + ldrh w3, [x3, x1] + ldrh w1, [x2, 272] + cmp w3, w1 + bcs .L3906 + cmp w22, 2 + bls .L3906 + str wzr, [x2, 268] + mov w1, 1 + strb wzr, [x5, 1337] + mov w2, 0 + bl gc_add_sblk + cbnz w0, .L3897 +.L3906: + add x1, x20, :lo12:.LANCHOR5 + add x2, x21, :lo12:.LANCHOR3 + ldrh w0, [x1, 272] + ldrh w8, [x2, 1376] + add w0, w0, 1 + and w0, w0, 65535 + strh w0, [x1, 272] + cmp w0, w8, lsr 5 + bls .L3907 + mov w0, 4 + strh w0, [x1, 272] +.L3907: + add x6, x20, :lo12:.LANCHOR5 + add x7, x19, :lo12:.LANCHOR0 + add x5, x21, :lo12:.LANCHOR3 + ldr w0, [x6, 268] + ldrh w1, [x7, 1096] + add w0, w0, 1 + strh wzr, [x5, 1352] + strh wzr, [x5, 1354] + strh wzr, [x5, 1356] + cmp w0, w1, lsr 5 + str w0, [x6, 268] + bls .L3908 + ldrh w0, [x7, 3378] + cmp w0, w24 + bls .L3908 + mov w1, 0 + add x0, x5, 1368 + bl _list_get_gc_head_node + and w0, w0, 65535 + mov w1, 65535 + cmp w0, w1 + bne .L3909 +.L4082: + mov w23, 16 + b .L3910 +.L3909: + ldr x1, [x7, 1120] + ubfiz x0, x0, 1, 16 + ldrh w1, [x1, x0] + ldrb w0, [x5, 1321] + mul w0, w0, w8 + cmp w1, w0 + bgt .L4082 + ldrb w0, [x5, 1337] + mov w2, 4 + mov w1, 2 + str wzr, [x6, 268] +.L4081: + bl gc_search_src_blk + and w0, w0, 65535 + cbz w0, .L4082 + b .L3897 +.L3908: + add x0, x19, :lo12:.LANCHOR0 + add x3, x21, :lo12:.LANCHOR3 + ldrh w2, [x0, 3378] + ldrh w1, [x3, 1382] + cmp w2, w1 + bcc .L3913 + mov w2, 1 + mov w1, 2 + ldrb w0, [x3, 1337] + b .L4081 +.L3913: + ldrh w1, [x0, 3374] + cbnz w1, .L3914 + ldrh w1, [x0, 3376] + cmp w1, 8 + bls .L3915 +.L3914: + add x21, x21, :lo12:.LANCHOR3 + mov w2, 4 + mov w1, 1 + ldrb w0, [x21, 1337] + b .L4081 +.L3915: + ldrh w0, [x0, 5526] + cbnz w0, .L4082 +.L3910: + add x0, x19, :lo12:.LANCHOR0 + adrp x21, .LANCHOR3 + ldr w1, [x0, 3396] + cbz w1, .L3916 + str wzr, [x0, 3396] + cmp w24, 0 + ccmp w22, 15, 2, ne + add x0, x21, :lo12:.LANCHOR3 + bls .L3917 + strb wzr, [x0, 1337] +.L3918: + add x5, x21, :lo12:.LANCHOR3 + mov w1, 0 + add x0, x5, 1368 + bl _list_get_gc_head_node + and w1, w0, 65535 + mov w2, 65535 + cmp w1, w2 + beq .L3919 + add x2, x19, :lo12:.LANCHOR0 + ubfiz x1, x1, 1, 16 + ldr x3, [x2, 1120] + ldrh w1, [x3, x1] + cmp w1, 8 + bhi .L3919 + mov w1, 1 + str w1, [x2, 3396] + ldrb w2, [x5, 1337] + mov w1, 0 + bl gc_add_sblk + cbnz w0, .L3897 +.L3919: + add x5, x21, :lo12:.LANCHOR3 + mov w1, 0 + add x0, x5, 1360 + bl _list_get_gc_head_node + and w1, w0, 65535 + mov w2, 65535 + cmp w1, w2 + beq .L3920 + add x2, x19, :lo12:.LANCHOR0 + ubfiz x1, x1, 1, 16 + ldr x3, [x2, 1120] + ldrh w1, [x3, x1] + cmp w1, 4 + bhi .L3920 + mov w1, 1 + str w1, [x2, 3396] + ldrb w2, [x5, 1337] + mov w1, 0 + bl gc_add_sblk + cbnz w0, .L3897 +.L3920: + mov w0, 0 + bl zftl_get_gc_node.part.10 + and w1, w0, 65535 + mov w2, 65535 + cmp w1, w2 + beq .L3916 + add x2, x19, :lo12:.LANCHOR0 + ubfiz x1, x1, 1, 16 + ldr x3, [x2, 1120] + ldrh w1, [x3, x1] + cmp w1, 4 + bhi .L3916 + mov w1, 1 + str w1, [x2, 3396] + add x2, x21, :lo12:.LANCHOR3 + ldrb w2, [x2, 1337] + bl gc_add_sblk + cbnz w0, .L3897 +.L3916: + add x28, x19, :lo12:.LANCHOR0 + add x25, x21, :lo12:.LANCHOR3 + mov w1, 1 + ldr x0, [x28, 1128] + strb w1, [x25, 1337] + ldrh w0, [x0, 124] + cbz w0, .L3921 + add x20, x20, :lo12:.LANCHOR5 + strb wzr, [x25, 1337] + strb w1, [x20, 264] +.L3872: + mov w0, w23 + ldp x19, x20, [sp, 32] + ldp x21, x22, [sp, 48] + ldp x23, x24, [sp, 64] + ldp x25, x26, [sp, 80] + ldp x27, x28, [sp, 96] + ldp x29, x30, [sp, 16] + add sp, sp, 128 + ret +.L3902: + add x21, x21, :lo12:.LANCHOR3 + add x0, x20, :lo12:.LANCHOR5 + ldrh w2, [x21, 1376] + ldrh w1, [x0, 272] + cmp w1, w2, lsr 5 + bcc .L4082 + mov w1, 4 + strh w1, [x0, 272] + b .L4082 +.L3898: + ldrh w1, [x0, 3392] + cmp w1, w22 + bcs .L4082 + ldr x0, [x0, 1128] + ldrh w0, [x0, 124] + cbz w0, .L4000 + b .L4082 +.L3917: + mov w1, 1 + strb w1, [x0, 1337] + b .L3918 +.L3921: + ldrh w0, [x28, 3392] + cmp w22, w0 + bcs .L3922 + cbz w24, .L3923 + cmp w24, 16 + bls .L3924 + ldrh w2, [x28, 3378] + ldrh w0, [x25, 1382] + cmp w2, w0 + bhi .L3924 + mov w2, 4 + mov w0, w1 + bl gc_search_src_blk + tst w0, 65535 + bne .L3925 +.L4089: + mov w2, 4 + mov w1, 3 + ldrb w0, [x25, 1337] + b .L4084 +.L3925: + mov w1, 0 + add x0, x25, 1368 + bl _list_get_gc_head_node + and w2, w0, 65535 + mov w1, 65535 + cmp w2, w1 + beq .L3928 + add x3, x20, :lo12:.LANCHOR5 + ubfiz x2, x2, 1, 16 + ldr w1, [x3, 268] + add w1, w1, 1 + str w1, [x3, 268] + ldr x3, [x28, 1120] + ldrh w2, [x3, x2] + ldrh w3, [x25, 1376] + cmp w3, w2 + bcs .L3929 + ldrh w3, [x28, 1096] + cmp w1, w3, lsr 4 + bls .L3928 + ldrh w1, [x28, 3406] + cmp w1, w2 + bls .L3928 +.L3929: + add x21, x21, :lo12:.LANCHOR3 + add x19, x19, :lo12:.LANCHOR0 + mov w1, 0 + ldrb w2, [x21, 1337] + bl gc_add_sblk + mov w0, 1 + str w0, [x19, 3396] + add x0, x20, :lo12:.LANCHOR5 + str wzr, [x0, 268] +.L3928: + add x20, x20, :lo12:.LANCHOR5 + mov w0, 1 + strb w0, [x20, 264] + b .L3872 +.L3924: + mov w2, 1 + mov w1, 2 + mov w0, w2 + bl gc_search_src_blk + tst w0, 65535 + bne .L3928 + add x21, x21, :lo12:.LANCHOR3 + mov w2, 4 + mov w1, 3 + ldrb w0, [x21, 1337] +.L4084: + bl gc_search_src_blk + and w0, w0, 65535 +.L3926: + cbnz w0, .L3928 + b .L3872 +.L3923: + strb wzr, [x25, 1337] + cmp w22, 16 + bls .L3931 + mov w2, 4 + mov w1, 3 + mov w0, 0 + b .L4084 +.L3931: + mov w2, w1 + mov w0, 0 + bl gc_search_src_blk + tst w0, 65535 + bne .L3928 + b .L4089 +.L3922: + cmp w27, 1 + bne .L3872 + cmp w22, w0, lsl 1 + bge .L3932 + cmp w26, w24, lsr 1 + bcs .L3933 + ldrh w1, [x28, 3378] + ldrh w0, [x25, 1382] + cmp w1, w0 + bcs .L3933 + ldrh w0, [x25, 1380] + lsr w0, w0, 2 + strh w0, [x28, 3392] + b .L3872 +.L3933: + mov w0, 8 + bl zftl_get_gc_node.part.10 + and w1, w0, 65535 + mov w2, 65535 + cmp w1, w2 + beq .L3934 + add x2, x19, :lo12:.LANCHOR0 + ubfiz x1, x1, 1, 16 + ldr x2, [x2, 1120] + ldrh w1, [x2, x1] + cmp w1, 3 + bhi .L3934 + cbz w22, .L3934 + add x1, x21, :lo12:.LANCHOR3 + mov w2, 0 + strb wzr, [x1, 1337] + mov w1, 1 + bl gc_add_sblk + cbnz w0, .L3928 +.L3934: + add x5, x21, :lo12:.LANCHOR3 + mov w1, 0 + add x0, x5, 1368 + bl _list_get_gc_head_node + and w25, w0, 65535 + mov w1, 65535 + mov w28, w25 + cmp w25, w1 + bne .L3935 +.L3940: + cmp w24, 1 + bhi .L3936 +.L3937: + cmp w22, w26 + bcs .L3944 + add x21, x21, :lo12:.LANCHOR3 + mov w0, 4 + add x19, x19, :lo12:.LANCHOR0 + strb wzr, [x21, 1337] + bl zftl_get_gc_node.part.10 + and w0, w0, 65535 + mov w1, 65535 + cmp w0, w1 + beq .L4088 + ldr x1, [x19, 1120] + ubfiz x0, x0, 1, 16 + ldrb w2, [x21, 1321] + ldrh w1, [x1, x0] + ldrh w0, [x21, 1376] + mul w0, w0, w2 + cmp w1, w0, lsr 1 + ble .L3946 +.L4088: + ldrh w0, [x21, 1380] + lsr w0, w0, 2 + strh w0, [x19, 3392] + b .L3872 +.L3935: + add x27, x20, :lo12:.LANCHOR5 + add x2, x19, :lo12:.LANCHOR0 + uxtw x25, w25 + ldr w1, [x27, 268] + ldrh w3, [x2, 1096] + add w1, w1, 1 + str w1, [x27, 268] + cmp w1, w3, lsr 4 + bls .L3938 + ldr x1, [x2, 1120] + str wzr, [x27, 268] + ldrh w3, [x1, x25, lsl 1] + ldrh w1, [x2, 3406] + cmp w3, w1 + bcs .L3938 + mov w3, 1 + mov w2, 1 + strb w3, [x5, 1337] + mov w1, 0 + str w3, [x29, 108] + bl gc_add_sblk + ldr w3, [x29, 108] + cbz w0, .L3938 + strb w3, [x27, 264] + b .L3872 +.L3938: + add x0, x19, :lo12:.LANCHOR0 + add x3, x21, :lo12:.LANCHOR3 + ldr x1, [x0, 1120] + ldrh w2, [x1, x25, lsl 1] + ldrh w1, [x3, 1376] + cmp w2, w1, lsr 1 + bhi .L3939 + mov w2, 0 + mov w1, 1 + mov w0, w28 + bl gc_add_sblk + b .L3928 +.L3939: + ldrh w1, [x0, 3374] + ldrh w4, [x0, 3376] + ldrh w3, [x3, 1380] + add w1, w1, w4 + cmp w1, w3, lsl 1 + ble .L3940 + ldrh w0, [x0, 3406] + cmp w0, w2 + bcc .L3937 + b .L3940 +.L3936: + add x25, x21, :lo12:.LANCHOR3 + mov w1, 1 + cmp w24, 16 + strb w1, [x25, 1337] + bls .L3941 + add x0, x19, :lo12:.LANCHOR0 + ldrh w2, [x0, 3378] + ldrh w0, [x25, 1382] + cmp w2, w0 + bhi .L3941 + mov w2, 4 + mov w0, w1 + bl gc_search_src_blk + ands w0, w0, 65535 + bne .L3942 + ldrb w0, [x25, 1337] + mov w2, 4 + mov w1, 3 +.L4083: + bl gc_search_src_blk + and w0, w0, 65535 +.L3942: + add x21, x21, :lo12:.LANCHOR3 + add x19, x19, :lo12:.LANCHOR0 + cmp w22, w26, lsr 1 + ldrh w1, [x21, 1380] + bls .L4085 + lsr w1, w1, 2 +.L4086: + strh w1, [x19, 3392] + b .L3926 +.L3941: + mov w2, 1 + mov w1, 2 + mov w0, w2 + bl gc_search_src_blk + ands w0, w0, 65535 + bne .L3942 + add x0, x21, :lo12:.LANCHOR3 + mov w2, 4 + mov w1, 3 + ldrb w0, [x0, 1337] + b .L4083 +.L3946: + mov w1, 3 + mov w2, 4 + mov w0, 0 + bl gc_search_src_blk + ldrh w1, [x21, 1380] + and w0, w0, 65535 +.L4085: + lsr w1, w1, 1 + b .L4086 +.L3944: + add x19, x19, :lo12:.LANCHOR0 + add x21, x21, :lo12:.LANCHOR3 + b .L4088 +.L3932: + ldrh w0, [x25, 1380] + lsr w0, w0, 2 + strh w0, [x28, 3392] + ldrh w0, [x28, 5526] + cmp w0, 0 + csel w23, w23, wzr, ne + b .L3872 +.L3877: + add x6, x19, :lo12:.LANCHOR0 + mov w0, 65535 + ldrh w1, [x6, 3416] + cmp w1, w0 + bne .L3947 + bl gc_get_src_blk + strh w0, [x6, 3416] +.L3947: + add x0, x19, :lo12:.LANCHOR0 + mov w2, 65535 + ldrh w1, [x0, 3416] + cmp w1, w2 + beq .L3948 + ldrh w2, [x0, 1096] + cmp w2, w1 + bhi .L3948 + mov w1, -1 + strh w1, [x0, 3416] +.L3948: + add x0, x19, :lo12:.LANCHOR0 + mov w2, 65535 + ldrh w3, [x0, 3416] + cmp w3, w2 + beq .L4091 + ldrh w5, [x0, 3472] + uxtw x4, w3 + ldr x2, [x0, 1104] + add x2, x2, x4, lsl 2 + cbz w5, .L3950 + add x0, x0, 3474 + mov w1, 0 +.L3952: + ldrh w6, [x0], 2 + cmp w6, w3 + bne .L3951 +.L3956: + add x19, x19, :lo12:.LANCHOR0 + mov w0, -1 + strh w0, [x19, 3416] + b .L4000 +.L3951: + add w1, w1, 1 + and w1, w1, 65535 + cmp w5, w1 + bne .L3952 +.L3950: + ldrb w0, [x2, 2] + and w1, w0, 224 + cmp w1, 224 + beq .L3953 + tst w0, 192 + bne .L3954 +.L3953: + add x0, x19, :lo12:.LANCHOR0 + ldr x0, [x0, 1120] + ldrh w0, [x0, x4, lsl 1] + cbz w0, .L3956 + adrp x1, .LANCHOR4 + add x1, x1, :lo12:.LANCHOR4 + add x1, x1, 1040 + mov w2, 3306 + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack + b .L3956 +.L3954: + add x20, x20, :lo12:.LANCHOR5 + mov w0, 2 + b .L4092 +.L3878: + bl gc_scan_src_blk + cmn w0, #1 + bne .L3957 + add x20, x20, :lo12:.LANCHOR5 + mov w0, 3 + b .L4092 +.L3957: + add x1, x19, :lo12:.LANCHOR0 + mov w3, 65535 + ldrh w0, [x1, 3416] + cmp w0, w3 + beq .L3897 + ldrh w3, [x1, 3440] + add x20, x20, :lo12:.LANCHOR5 + cbz w3, .L3958 + mov w0, 4 + strh wzr, [x1, 3442] + strb w0, [x20, 264] + b .L4000 +.L3958: + ldr x1, [x1, 1120] + ubfiz x0, x0, 1, 16 + mov w2, 1 + strb w2, [x20, 264] + ldrh w0, [x1, x0] + cbz w0, .L3959 + adrp x1, .LANCHOR4 + add x1, x1, :lo12:.LANCHOR4 + add x1, x1, 1040 + mov w2, 3336 + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack +.L3959: + add x20, x19, :lo12:.LANCHOR0 + add x21, x20, 3416 + ldrh w0, [x20, 3416] + bl ftl_free_sblk + ldr x0, [x20, 1120] + ldrh w1, [x20, 3416] + strh wzr, [x0, x1, lsl 1] + ldrh w0, [x21, 30] + add w0, w0, 1 + and w0, w0, 65535 + cmp w0, 8 + bhi .L3960 + strh w0, [x21, 30] + b .L3956 +.L3960: + strh wzr, [x21, 30] + bl ftl_flush + bl pm_flush + bl ftl_ext_info_flush + mov w0, 0 + bl ftl_info_flush + b .L3956 +.L3879: + add x23, x19, :lo12:.LANCHOR0 + adrp x24, .LANCHOR3 + add x21, x23, 3416 + add x24, x24, :lo12:.LANCHOR3 +.L4053: + bl gc_scan_src_blk_one_page + ldrh w1, [x21, 2] + ldrh w0, [x24, 1376] + cmp w1, w0 + bcs .L3962 + cmp w22, 7 + bls .L4053 + b .L4000 +.L3962: + ldrh w3, [x21, 24] + ldrh w1, [x21] + cbz w3, .L3963 + add x20, x20, :lo12:.LANCHOR5 + mov w0, 4 + ldr x2, [x23, 1120] + strh wzr, [x21, 26] + strb w0, [x20, 264] + ubfiz x0, x1, 1, 16 + ldrh w2, [x2, x0] + cmp w3, w2 + beq .L3964 + adrp x0, .LANCHOR2 + ldr w0, [x0, #:lo12:.LANCHOR2] + tbz x0, 10, .L3964 + adrp x0, .LC300 + add x0, x0, :lo12:.LC300 + bl printk +.L3964: + add x0, x19, :lo12:.LANCHOR0 + ldrh w2, [x0, 3416] + ldr x1, [x0, 1120] + ldrh w0, [x0, 3440] + ldrh w1, [x1, x2, lsl 1] + cmp w1, w0 + beq .L3965 + adrp x1, .LANCHOR4 + add x1, x1, :lo12:.LANCHOR4 + add x1, x1, 1040 + mov w2, 3379 + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack +.L3965: + add x19, x19, :lo12:.LANCHOR0 + ldrh w1, [x19, 3416] + ldr x0, [x19, 1120] + ldrh w2, [x19, 3440] + strh w2, [x0, x1, lsl 1] + b .L4000 +.L3963: + add x20, x20, :lo12:.LANCHOR5 + mov w0, 1 + ldr x21, [x23, 1104] + strb w0, [x20, 264] + adrp x0, .LANCHOR2 + add x21, x21, w1, uxth 2 + ldr w0, [x0, #:lo12:.LANCHOR2] + tbz x0, 8, .L3966 + ldrb w2, [x21, 2] + adrp x0, .LC301 + add x0, x0, :lo12:.LC301 + ubfx x2, x2, 5, 3 + bl printk +.L3966: + ldrb w0, [x21, 2] + and w1, w0, 224 + cmp w1, 224 + beq .L3967 + tst w0, 192 + bne .L3968 +.L3967: + adrp x1, .LANCHOR4 + add x1, x1, :lo12:.LANCHOR4 + add x1, x1, 1040 + mov w2, 3389 + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack +.L3968: + add x19, x19, :lo12:.LANCHOR0 + add x20, x19, 3416 + ldrh w0, [x19, 3416] + bl ftl_free_sblk + mov w0, -1 + strh w0, [x19, 3416] + ldrh w0, [x20, 30] + add w0, w0, 1 + and w0, w0, 65535 + cmp w0, 8 + bhi .L3969 + strh w0, [x20, 30] + b .L4000 +.L3969: + strh wzr, [x20, 30] +.L4090: + bl flt_sys_flush + b .L4000 +.L3880: + cbnz w27, .L3970 + add x0, x19, :lo12:.LANCHOR0 + ldrh w0, [x0, 3392] + cmp w0, w22 + bcc .L4000 +.L3970: + ldrh w1, [x25, 80] + mov w0, 65535 + cmp w1, w0 + bne .L3971 + adrp x21, .LANCHOR3 + add x0, x21, :lo12:.LANCHOR3 + ldrb w23, [x0, 1337] + cmp w23, 1 + bne .L3971 + bl ftl_flush + add x0, x19, :lo12:.LANCHOR0 + mov w1, 5 + ldrh w0, [x0, 5608] + cbz w0, .L3972 + mov w0, w23 +.L4087: + bl zftl_gc_get_free_sblk + and w22, w0, 65535 + mov w0, 65535 + cmp w22, w0 + beq .L3974 + add x0, x19, :lo12:.LANCHOR0 + ldr x23, [x0, 1104] + add x23, x23, w22, uxth 2 + ldrb w0, [x23, 2] + tst w0, 224 + beq .L3975 + adrp x1, .LANCHOR4 + add x1, x1, :lo12:.LANCHOR4 + add x1, x1, 1040 + mov w2, 3423 + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack +.L3975: + ldrb w0, [x23, 2] + mov w1, 5 + bfi w0, w1, 5, 3 + orr w0, w0, 16 + strb w0, [x23, 2] +.L3999: + mov w1, 1 + mov w0, w22 + bl ftl_erase_sblk + add x21, x21, :lo12:.LANCHOR3 + mov w0, 5 + strb w0, [x25, 84] + add x1, x25, 96 + mov w0, w22 + bl ftl_get_blk_list_in_sblk + and w0, w0, 255 + ldrh w1, [x21, 1376] + add x20, x20, :lo12:.LANCHOR5 + strb w0, [x25, 89] + add x19, x19, :lo12:.LANCHOR0 + ldrh w2, [x21, 1338] + strh w22, [x25, 80] + mul w0, w0, w1 + strh wzr, [x25, 82] + strh w0, [x25, 86] + mov w1, 255 + ldrb w0, [x21, 1321] + strb wzr, [x25, 85] + strh wzr, [x25, 90] + mul w2, w2, w0 + ldr x0, [x20, 280] + lsl w2, w2, 2 + bl ftl_memset + ldrb w0, [x21, 1321] + mov w1, 255 + ldrh w2, [x21, 1338] + mul w2, w2, w0 + ldr x0, [x20, 288] + lsl w2, w2, 2 + bl ftl_memset + ldrb w0, [x21, 1321] + mov w1, 255 + ldrh w2, [x21, 1338] + mul w2, w2, w0 + ldr x0, [x21, 1328] + bl ftl_memset + ldr x0, [x19, 1128] + mov w1, -1 + str w22, [x0, 132] + strh w1, [x0, 128] + strh w1, [x0, 130] + bl pm_flush + bl ftl_ext_info_flush + strh wzr, [x19, 3472] + ldr x0, [x19, 3384] + strh w22, [x0, 126] + mov w0, -1 + strh wzr, [x19, 5522] + str w0, [x19, 5612] + mov w0, 0 + strh wzr, [x19, 5524] + strh wzr, [x19, 5610] + bl ftl_info_flush + b .L4000 +.L3972: + mov w0, 0 + b .L4087 +.L3971: + cmp w27, 1 + mov w23, 4 + csinc w23, w23, wzr, eq + add x26, x19, :lo12:.LANCHOR0 + cmp w22, 15 + mov w0, w23 + add w23, w23, 4 + adrp x22, .LANCHOR3 + csel w23, w23, w0, ls + add x24, x22, :lo12:.LANCHOR3 + add x21, x26, 3416 +.L3978: + sub w23, w23, #1 + and w23, w23, 255 + cmp w23, 255 + beq .L4000 + bl gc_do_copy_back + ldrb w0, [x24, 1337] + cbnz w0, .L3979 + ldrb w0, [x26, 3353] + cmp w0, 3 + bhi .L3980 + bl ftl_write_commit +.L3980: + ldrh w1, [x21, 26] + ldrh w0, [x21, 24] + cmp w1, w0 + bcc .L3978 + add x20, x20, :lo12:.LANCHOR5 + mov w0, 1 + strb w0, [x20, 264] + bl ftl_write_commit + bl ftl_flush + ldrh w1, [x21] + ldr x0, [x26, 1120] + ldrh w0, [x0, x1, lsl 1] + cbz w0, .L3982 + adrp x1, .LANCHOR4 + add x1, x1, :lo12:.LANCHOR4 + add x1, x1, 1040 + mov w2, 3507 + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack +.L3982: + add x1, x19, :lo12:.LANCHOR0 + ldrh w0, [x1, 3416] + ldr x1, [x1, 1120] + ubfiz x2, x0, 1, 16 + ldrh w1, [x1, x2] + cbnz w1, .L3983 + bl ftl_free_sblk + b .L3956 +.L3983: + mov w2, 1 + mov w1, 0 + bl gc_add_sblk + b .L3956 +.L3979: + ldrh w0, [x21, 2194] + cbz w0, .L3984 + strh wzr, [x21, 2194] + bl sblk_wait_write_queue_completed + bl gc_write_completed + ldr w0, [x21, 2196] + cmn w0, #1 + beq .L3985 + ldrb w1, [x24, 1950] + cbnz w1, .L3986 + ldrb w1, [x24, 1322] + cbz w1, .L3987 +.L3986: + add x4, x19, :lo12:.LANCHOR0 + ldr x1, [x4, 3384] + ldr w2, [x1, 156] + mov w1, 20041 + movk w1, 0x444b, lsl 16 + cmp w2, w1 + bne .L3987 + add x22, x22, :lo12:.LANCHOR3 + ldrb w2, [x4, 1205] + mov w1, 24 + sub w1, w1, w2 + ldrh w3, [x22, 1304] + sub w2, w1, w3 + mov w1, 1 + lsr w0, w0, w3 + lsl w1, w1, w2 + sub w1, w1, #1 + and w0, w1, w0 + ldrb w1, [x22, 1306] + ldr x2, [x4, 1104] + udiv w0, w0, w1 + lsl x0, x0, 2 + add x5, x2, x0 + ldrb w1, [x5, 2] + tbz x1, 3, .L3985 + ldrh w3, [x4, 3368] + ldrh w6, [x22, 1380] + add w3, w3, 8 + cmp w3, w6 + bge .L3985 + and w1, w1, -25 + strb w1, [x5, 2] + ldrh w1, [x4, 1112] + ldr w3, [x2, x0] + ldrh w4, [x2, x0] + ubfx x3, x3, 11, 8 + and w5, w4, 2047 + mul w1, w1, w3 + lsr w3, w3, 3 + add w1, w1, w1, lsl 1 + add w1, w5, w1, lsr 2 + bfi w4, w1, 0, 11 + strh w4, [x2, x0] + ldr w1, [x2, x0] + bfi w1, w3, 11, 8 + str w1, [x2, x0] +.L3985: + add x21, x19, :lo12:.LANCHOR0 + ldr x0, [x21, 1128] + str wzr, [x21, 5612] + strh wzr, [x21, 3472] + ldrh w0, [x0, 80] + bl ftl_free_sblk + ldr x1, [x21, 1128] + mov w0, -1 + ldr x2, [x21, 3384] + strh w0, [x1, 80] + strh w0, [x2, 126] + strh w0, [x1, 130] + ldr x0, [x21, 3424] + cbz x0, .L3988 + bl zbuf_free +.L3988: + add x19, x19, :lo12:.LANCHOR0 + add x20, x20, :lo12:.LANCHOR5 + str xzr, [x19, 3424] + bl flt_sys_flush + adrp x1, .LANCHOR4 + add x1, x1, :lo12:.LANCHOR4 + add x1, x1, 1040 + mov w2, 3567 + strb wzr, [x20, 264] + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack + b .L4000 +.L3987: + bl ftl_mask_bad_block + b .L3985 +.L3984: + ldrh w0, [x25, 86] + ldrh w1, [x21, 26] + cmp w0, 1 + ldrh w0, [x21, 24] + bls .L3989 + cmp w1, w0 + bcc .L3978 + add x20, x20, :lo12:.LANCHOR5 + mov w0, 1 + strb w0, [x20, 264] + ldrh w0, [x21, 56] + add w1, w0, 1 + strh w1, [x21, 56] + add x0, x21, w0, sxtw 1 + ldrh w1, [x21] + strh w1, [x0, 58] + mov w0, -1 + strh w0, [x21] + b .L4000 +.L3989: + add x20, x20, :lo12:.LANCHOR5 + mov w2, 5 + cmp w1, w0 + strb w2, [x20, 264] + bcc .L3990 + ldrh w0, [x21, 56] + add w1, w0, 1 + strh w1, [x21, 56] + add x0, x21, w0, sxtw 1 + ldrh w1, [x21] + strh w1, [x0, 58] + mov w0, -1 + strh w0, [x21] +.L3990: + add x20, x19, :lo12:.LANCHOR0 + bl ftl_flush + bl sblk_wait_write_queue_completed + bl gc_write_completed + ldr x0, [x20, 1128] + ldrh w1, [x25, 80] + strh w1, [x0, 128] + bl pm_flush + bl ftl_ext_info_flush + strh wzr, [x20, 3432] + add x1, x22, :lo12:.LANCHOR3 + ldrb w3, [x20, 1212] + ldrh w2, [x1, 1376] + strh w2, [x20, 3434] + ldrb w2, [x1, 1320] + strh w2, [x20, 3436] + cbz w3, .L3991 + ldrh w1, [x1, 1338] + strh w1, [x20, 3434] + mov w1, 1 + strh w1, [x20, 3436] +.L3991: + cmp w2, 2 + bne .L3993 + add x0, x19, :lo12:.LANCHOR0 + add x22, x22, :lo12:.LANCHOR3 + add x0, x0, 3416 + ldrh w1, [x0, 18] + ubfiz w1, w1, 1, 15 + strh w1, [x0, 18] + ldrb w1, [x22, 1322] + cbnz w1, .L3993 + mov w1, 1 + strh w1, [x0, 20] +.L3993: + add x19, x19, :lo12:.LANCHOR0 + strh wzr, [x19, 3438] + b .L4000 +.L3996: + ldrh w1, [x21, 16] + ldrh w0, [x21, 18] + cmp w1, w0 + bcc .L3997 + add x20, x20, :lo12:.LANCHOR5 + mov w0, 6 + strb w0, [x20, 264] + ldr x0, [x21, 8] + bl zbuf_free + str xzr, [x21, 8] + b .L4000 +.L3997: + cmp w22, 15 + bls .L3883 + cmp w27, 1 + bne .L4000 + add w23, w23, 1 + and w23, w23, 255 + cmp w23, 4 + bls .L3883 + b .L4000 +.L3882: + bl gc_update_l2p_map_new + mov w21, -1 + bl gc_free_src_blk + add x19, x19, :lo12:.LANCHOR0 + bl ftl_flush + bl pm_flush + strh w21, [x25, 80] + bl ftl_ext_info_flush + ldr x0, [x19, 3384] + strh w21, [x0, 126] + mov w0, 0 + bl ftl_info_flush +.L4091: + add x20, x20, :lo12:.LANCHOR5 + strb wzr, [x20, 264] + b .L4000 +.L3974: + adrp x1, .LANCHOR4 + add x1, x1, :lo12:.LANCHOR4 + add x1, x1, 1040 + mov w2, 3430 + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack + b .L3999 + .size zftl_do_gc, .-zftl_do_gc + .align 2 + .global zftl_init + .type zftl_init, %function +zftl_init: + stp x29, x30, [sp, -80]! + mov w0, -1 + adrp x1, .LC1 + add x1, x1, :lo12:.LC1 + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x19, .LANCHOR0 + stp x21, x22, [sp, 32] + adrp x20, .LANCHOR5 + stp x23, x24, [sp, 48] + adrp x21, .LANCHOR3 + str x25, [sp, 64] + add x23, x21, :lo12:.LANCHOR3 + add x24, x19, :lo12:.LANCHOR0 + add x25, x20, :lo12:.LANCHOR5 + adrp x22, .LANCHOR2 + strb w0, [x23, 1956] + strb w0, [x24, 3408] + strb w0, [x25, 360] + mov w0, -1 + strb wzr, [x24, 3381] + str w0, [x25, 476] + adrp x0, .LC2 + strb wzr, [x23, 1957] + add x0, x0, :lo12:.LC2 + strb wzr, [x24, 3380] + bl printk + add x1, x22, :lo12:.LANCHOR2 + ldrb w2, [x24, 1153] + strb w2, [x23, 1412] + ldrh w4, [x24, 2] + ldrb w9, [x1, 20] + ldrh w5, [x1, 18] + ldrb w3, [x1, 21] + ldrb w0, [x1, 17] + ldrh w6, [x1, 22] + mov w1, 0 + sdiv w10, w5, w9 + strb w3, [x23, 1306] + mul w2, w2, w3 + ubfiz w8, w0, 9, 7 + strb w9, [x23, 1320] + mov w3, 1 + and w2, w2, 255 + strb w0, [x23, 1946] + strh w5, [x23, 1338] + strh w10, [x23, 1376] + strb w2, [x23, 1321] + strh w6, [x24, 1096] + strh w8, [x25, 462] + strh w4, [x23, 1410] +.L4094: + cmp w4, w3 + bcs .L4095 + mul w7, w0, w5 + add x3, x21, :lo12:.LANCHOR3 + sub w1, w1, #1 + mov w4, 0 + strh w1, [x3, 1304] + mov w1, 1 + mul w3, w6, w7 + lsr w11, w3, 21 +.L4096: + cmp w11, w1 + bcs .L4097 + mov w1, 57344 + add x11, x19, :lo12:.LANCHOR0 + movk w1, 0x1c, lsl 16 + sub w4, w4, #1 + mul w3, w3, w2 + lsr w6, w6, 4 + mul w1, w2, w1 + str w3, [x11, 3360] + mul w10, w10, w2 + cmp w6, 79 + mul w7, w7, w2 + lsl w1, w1, w4 + add w3, w1, 24576 + str w1, [x11, 1032] + add x4, x20, :lo12:.LANCHOR5 + sub w7, w7, #1 + udiv w0, w3, w0 + str w3, [x4, 480] + udiv w3, w3, w7 + str w0, [x11, 3364] + sub w11, w8, #1 + add w0, w11, w0, lsl 2 + add w3, w3, 8 + udiv w0, w0, w8 + strh w0, [x4, 484] + ubfiz w0, w0, 4, 16 + sdiv w0, w0, w10 + strh w0, [x4, 220] + add x0, x21, :lo12:.LANCHOR3 + strh w3, [x0, 1382] + strh w6, [x0, 1380] + bhi .L4098 + mov w3, 80 + strh w3, [x0, 1380] +.L4098: + add x0, x21, :lo12:.LANCHOR3 + mov w3, 2000 + add x6, x19, :lo12:.LANCHOR0 + mov w4, 256 + cmp w9, 2 + strh w3, [x0, 1954] + mov w3, 50 + strh w3, [x0, 1952] + add x3, x20, :lo12:.LANCHOR5 + strh w4, [x3, 216] + mov w4, 48 + strh w4, [x3, 218] + mov w4, 32 + strh w4, [x6, 1112] + beq .L4099 + ldrb w7, [x0, 1336] + cbz w7, .L4100 +.L4099: + add x3, x21, :lo12:.LANCHOR3 + mov w0, 150 + mov w4, 64 + mov w6, 12 + strh w0, [x3, 1952] + add x0, x20, :lo12:.LANCHOR5 + strh w4, [x0, 218] + add x4, x19, :lo12:.LANCHOR0 + strh w6, [x4, 1112] + ldrb w6, [x19, #:lo12:.LANCHOR0] + cbnz w6, .L4101 + mov w6, 4 + strh w6, [x4, 1112] + mov w4, 600 + strh w4, [x3, 1954] + mov w3, 128 + strh w3, [x0, 216] +.L4101: + add x0, x19, :lo12:.LANCHOR0 + ldrb w0, [x0, 1213] + cbz w0, .L4103 + add x0, x21, :lo12:.LANCHOR3 + mov w3, 200 + strh w3, [x0, 1952] + mov w3, 2000 + strh w3, [x0, 1954] +.L4103: + add x0, x19, :lo12:.LANCHOR0 + mul w2, w5, w2 + mov w3, 1 + str wzr, [x0, 3396] + add x0, x20, :lo12:.LANCHOR5 + cmp w8, w2, lsl 2 + strb w3, [x0, 465] + bge .L4105 + mov w2, 2 + strb w2, [x0, 465] +.L4105: + ldr w0, [x22, #:lo12:.LANCHOR2] + tbz x0, 12, .L4106 + adrp x0, .LC302 + add x0, x0, :lo12:.LC302 + bl printk +.L4106: + ldr w0, [x22, #:lo12:.LANCHOR2] + tbz x0, 12, .L4107 + add x0, x19, :lo12:.LANCHOR0 + ldr w1, [x0, 3360] + adrp x0, .LC303 + add x0, x0, :lo12:.LC303 + bl printk +.L4107: + ldr w0, [x22, #:lo12:.LANCHOR2] + tbz x0, 12, .L4108 + add x0, x19, :lo12:.LANCHOR0 + ldr w1, [x0, 3364] + adrp x0, .LC304 + add x0, x0, :lo12:.LC304 + bl printk +.L4108: + ldr w0, [x22, #:lo12:.LANCHOR2] + tbz x0, 12, .L4109 + add x0, x20, :lo12:.LANCHOR5 + ldr w1, [x0, 480] + adrp x0, .LC305 + add x0, x0, :lo12:.LC305 + bl printk +.L4109: + ldr w0, [x22, #:lo12:.LANCHOR2] + tbz x0, 12, .L4110 + add x0, x20, :lo12:.LANCHOR5 + ldrh w1, [x0, 484] + adrp x0, .LC306 + add x0, x0, :lo12:.LC306 + bl printk +.L4110: + ldr w0, [x22, #:lo12:.LANCHOR2] + tbz x0, 12, .L4111 + add x0, x20, :lo12:.LANCHOR5 + ldrh w1, [x0, 462] + adrp x0, .LC307 + add x0, x0, :lo12:.LC307 + bl printk +.L4111: + ldr w0, [x22, #:lo12:.LANCHOR2] + tbz x0, 12, .L4112 + add x0, x20, :lo12:.LANCHOR5 + ldrh w1, [x0, 220] + adrp x0, .LC308 + add x0, x0, :lo12:.LC308 + bl printk +.L4112: + ldr w0, [x22, #:lo12:.LANCHOR2] + tbz x0, 12, .L4113 + add x0, x21, :lo12:.LANCHOR3 + ldrh w1, [x0, 1380] + adrp x0, .LC309 + add x0, x0, :lo12:.LC309 + bl printk +.L4113: + ldr w0, [x22, #:lo12:.LANCHOR2] + tbz x0, 12, .L4114 + add x0, x21, :lo12:.LANCHOR3 + ldrh w1, [x0, 1382] + adrp x0, .LC310 + add x0, x0, :lo12:.LC310 + bl printk +.L4114: + add x24, x20, :lo12:.LANCHOR5 + bl zbuf_init + mov w0, 16384 + bl ftl_malloc + add x25, x19, :lo12:.LANCHOR0 + add x23, x21, :lo12:.LANCHOR3 + str x0, [x24, 392] + mov w0, 16384 + bl ftl_malloc + str x0, [x24, 408] + mov w0, 16384 + bl ftl_malloc + str x0, [x24, 488] + mov w0, 256 + bl ftl_dma32_malloc + str x0, [x24, 376] + mov w0, 256 + bl ftl_dma32_malloc + ldrh w1, [x25, 1096] + str x0, [x24, 416] + mov w0, 6 + mul w0, w1, w0 + bl ftl_dma32_malloc + str x0, [x25, 1040] + ldrb w1, [x23, 1321] + ldrh w0, [x23, 1376] + mul w0, w0, w1 + lsl w0, w0, 2 + bl ftl_dma32_malloc + ldrb w1, [x23, 1321] + str x0, [x23, 1936] + ldrh w0, [x23, 1376] + ldr x2, [x24, 408] + str x2, [x23, 1928] + mul w0, w0, w1 + ldrh w1, [x25, 1096] + add x3, x2, w0, sxtw 3 + lsl w0, w0, 1 + add w1, w0, w1, lsr 1 + ldr w0, [x22, #:lo12:.LANCHOR2] + add x1, x2, w1, sxtw 2 + str x3, [x25, 1120] + str x1, [x25, 1128] + tbz x0, 12, .L4115 + adrp x0, .LC311 + add x0, x0, :lo12:.LC311 + bl printk +.L4115: + add x0, x19, :lo12:.LANCHOR0 + add x21, x21, :lo12:.LANCHOR3 + ldrh w1, [x0, 1096] + ldrh w0, [x21, 1376] + ldrb w21, [x21, 1321] + mul w21, w0, w21 + add x0, x20, :lo12:.LANCHOR5 + ldrh w23, [x0, 484] + add w21, w1, w21, lsl 2 + lsl w1, w1, 2 + lsl w21, w21, 1 + add w21, w21, 632 + add w23, w1, w23, lsl 2 + ldr w1, [x22, #:lo12:.LANCHOR2] + add w23, w23, 704 + tbz x1, 12, .L4116 + ldrh w3, [x0, 462] + mov w2, w23 + adrp x0, .LC312 + mov w1, w21 + add x0, x0, :lo12:.LC312 + bl printk +.L4116: + add x20, x20, :lo12:.LANCHOR5 + ldrh w0, [x20, 462] + cmp w21, w0 + bhi .L4117 + cmp w23, w0 + bls .L4118 +.L4117: +.L4171: + b .L4171 +.L4095: + add w1, w1, 1 + lsl w3, w3, 1 + and w1, w1, 65535 + b .L4094 +.L4097: + add w4, w4, 1 + lsl w1, w1, 1 + and w4, w4, 65535 + b .L4096 +.L4100: + ldrb w6, [x6, 1212] + cbz w6, .L4103 + mov w6, 1200 + strh w4, [x0, 1952] + strh w6, [x0, 1954] + strh w4, [x3, 218] + b .L4103 +.L4118: + bl sblk_init + bl gc_init + bl ftl_info_blk_init + cmn w0, #1 + beq .L4093 + add x21, x19, :lo12:.LANCHOR0 + bl ftl_ext_info_init + mov w0, 1 + bl pm_init + bl lpa_rebuild_hash + ldr x0, [x21, 1128] + mov x1, 0 + add x0, x0, 16 + bl ftl_open_sblk_recovery + ldr x0, [x21, 1128] + add x1, x0, 16 + add x0, x0, 48 + bl ftl_open_sblk_recovery + ldr x1, [x21, 3384] + ldr w0, [x1, 8] + add w0, w0, 16 + str w0, [x1, 8] + ldr x0, [x21, 1128] + add x0, x0, 16 + bl ftl_info_data_recovery + ldr x0, [x21, 1128] + add x0, x0, 48 + bl ftl_info_data_recovery + ldr x0, [x21, 1128] + add x0, x0, 80 + bl ftl_info_data_recovery + bl gc_recovery + bl pm_flush + mov w0, 1 + bl ftl_total_vpn_update + ldrb w0, [x20, 401] + cbz w0, .L4120 + ldr x1, [x21, 3384] + ldr w0, [x1, 68] + add w0, w0, 1 + str w0, [x1, 68] +.L4120: + bl ftl_ext_info_flush + mov w0, 0 + bl ftl_info_flush + bl print_ftl_debug_info + add x1, x19, :lo12:.LANCHOR0 + ldr x0, [x1, 1128] + ldrh w0, [x0, 124] + cbnz w0, .L4127 + ldrh w0, [x1, 3368] + ldrh w1, [x1, 3372] + add w0, w0, w1 + cmp w0, 7 + ble .L4127 +.L4123: + mov w0, 0 +.L4093: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldr x25, [sp, 64] + ldp x29, x30, [sp], 80 + ret +.L4127: + add x19, x19, :lo12:.LANCHOR0 + mov w20, 16384 + mov w21, 65535 +.L4124: + mov w1, 1 + mov w0, 0 + bl zftl_do_gc + mov w1, 1 + mov w0, w1 + bl zftl_do_gc + ldr x0, [x19, 1128] + ldrh w1, [x0, 124] + cbnz w1, .L4122 + ldrh w0, [x0, 80] + cmp w0, w21 + bne .L4122 + ldrh w0, [x19, 3368] + ldrh w1, [x19, 3372] + add w0, w0, w1 + cmp w0, 7 + bgt .L4123 +.L4122: + subs w20, w20, #1 + bne .L4124 + b .L4123 + .size zftl_init, .-zftl_init + .align 2 + .global rk_ftl_init + .type rk_ftl_init, %function +rk_ftl_init: + stp x29, x30, [sp, -48]! + adrp x0, jiffies + add x29, sp, 0 + stp x19, x20, [sp, 16] + stp x21, x22, [sp, 32] + adrp x21, .LANCHOR5 + add x19, x21, :lo12:.LANCHOR5 + ldr x0, [x0, #:lo12:jiffies] + str x0, [x19, 224] + mov w0, 136 + strb wzr, [x19, 496] + str wzr, [x19, 248] + bl ftl_dma32_malloc + str x0, [x19, 232] + cbnz x0, .L4174 +.L4176: + mov w20, -1 +.L4173: + mov w0, w20 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x29, x30, [sp], 48 + ret +.L4174: + mov w0, 2048 + bl ftl_dma32_malloc + add x1, x19, 512 + stp x0, xzr, [x19, 504] + str xzr, [x19, 240] + add x0, x19, 240 + bl rknand_get_reg_addr + ldr x0, [x19, 240] + cbz x0, .L4176 + bl rk_nandc_irq_init + ldr x0, [x19, 504] + mov w3, 2048 + mov w2, 0 + mov w1, 0 + bl flash_sram_load_store + bl rknand_flash_cs_init + ldr x0, [x19, 232] + adrp x1, zftl_deinit + add x1, x1, :lo12:zftl_deinit + str x1, [x0, 80] + adrp x1, zftl_cache_flush + add x1, x1, :lo12:zftl_cache_flush + str x1, [x0, 64] + adrp x1, zftl_flash_suspend + add x1, x1, :lo12:zftl_flash_suspend + str x1, [x0, 88] + adrp x1, zftl_flash_resume + add x1, x1, :lo12:zftl_flash_resume + str x1, [x0, 96] + adrp x1, zftl_get_density + add x1, x1, :lo12:zftl_get_density + str x1, [x0, 72] + adrp x1, zftl_read_flash_info + add x1, x1, :lo12:zftl_read_flash_info + str x1, [x0, 112] + adrp x1, zftl_read + add x1, x1, :lo12:zftl_read + str x1, [x0, 40] + adrp x1, zftl_write + add x1, x1, :lo12:zftl_write + str x1, [x0, 48] + adrp x1, zftl_sys_read + add x1, x1, :lo12:zftl_sys_read + str x1, [x0, 24] + adrp x1, zftl_sys_write + add x1, x1, :lo12:zftl_sys_write + str x1, [x0, 32] + adrp x1, zftl_vendor_read + add x1, x1, :lo12:zftl_vendor_read + str x1, [x0, 8] + adrp x1, zftl_vendor_write + add x1, x1, :lo12:zftl_vendor_write + str x1, [x0, 16] + adrp x1, zftl_nandc_get_irq_status + add x1, x1, :lo12:zftl_nandc_get_irq_status + str x1, [x0, 120] + adrp x1, zftl_proc_ftl_read + add x1, x1, :lo12:zftl_proc_ftl_read + str x1, [x0, 128] + adrp x1, zftl_do_gc + add x1, x1, :lo12:zftl_do_gc + str x1, [x0, 104] + adrp x1, zftl_discard + add x1, x1, :lo12:zftl_discard + str x1, [x0, 56] + ldr x0, [x19, 240] + bl nand_flash_init + mov w22, w0 + cbnz w0, .L4177 + bl zftl_init + mov w20, w0 + bl zftl_proc_debug_init + mov w0, 1 + strb w0, [x19, 496] +.L4178: + mov w1, w20 + adrp x0, .LC313 + add x0, x0, :lo12:.LC313 + bl printk + b .L4173 +.L4177: + ldr x0, [x19, 232] + adrp x1, ftl_deinit + add x1, x1, :lo12:ftl_deinit + str x1, [x0, 80] + adrp x1, ftl_cache_flush + add x1, x1, :lo12:ftl_cache_flush + str x1, [x0, 64] + adrp x1, ftl_flash_suspend + add x1, x1, :lo12:ftl_flash_suspend + str x1, [x0, 88] + adrp x1, ftl_flash_resume + add x1, x1, :lo12:ftl_flash_resume + str x1, [x0, 96] + adrp x1, ftl_get_density + add x1, x1, :lo12:ftl_get_density + str x1, [x0, 72] + adrp x1, ftl_read_flash_info + add x1, x1, :lo12:ftl_read_flash_info + str x1, [x0, 112] + adrp x1, ftl_read + add x1, x1, :lo12:ftl_read + str x1, [x0, 40] + adrp x1, ftl_write + add x1, x1, :lo12:ftl_write + str x1, [x0, 48] + adrp x1, ftl_sys_read + add x1, x1, :lo12:ftl_sys_read + str x1, [x0, 24] + adrp x1, ftl_sys_write + add x1, x1, :lo12:ftl_sys_write + str x1, [x0, 32] + adrp x1, ftl_vendor_read + add x1, x1, :lo12:ftl_vendor_read + str x1, [x0, 8] + adrp x1, ftl_vendor_write + add x1, x1, :lo12:ftl_vendor_write + str x1, [x0, 16] + adrp x1, ftl_nandc_get_irq_status + add x1, x1, :lo12:ftl_nandc_get_irq_status + str x1, [x0, 120] + adrp x1, ftl_proc_ftl_read + add x1, x1, :lo12:ftl_proc_ftl_read + str x1, [x0, 128] + adrp x1, ftl_do_gc + add x1, x1, :lo12:ftl_do_gc + str x1, [x0, 104] + adrp x1, ftl_discard + add x1, x1, :lo12:ftl_discard + str x1, [x0, 56] + ldr x0, [x19, 240] + bl FlashInit + mov w20, w0 + cmn w22, #2 + adrp x22, .LANCHOR2 + bne .L4179 + add x19, x22, :lo12:.LANCHOR2 + mov w2, 32 + add x19, x19, 8 + adrp x1, gNandParaInfo + mov x0, x19 + add x1, x1, :lo12:gNandParaInfo + bl ftl_memcpy + ldrb w0, [x19, 18] + bl flash_lsb_page_tbl_build + ldrh w0, [x19, 10] + strh w0, [x19, 26] +.L4179: + adrp x0, g_nandc_version_data + ldr w1, [x0, #:lo12:g_nandc_version_data] + mov w0, 12336 + movk w0, 0x5638, lsl 16 + cmp w1, w0 + adrp x1, .LANCHOR0 + bne .L4180 + adrp x0, gFlashSlcMode + ldrb w0, [x0, #:lo12:gFlashSlcMode] + cbnz w0, .L4181 +.L4180: + add x0, x1, :lo12:.LANCHOR0 + strb wzr, [x1, #:lo12:.LANCHOR0] + strb wzr, [x0, 1154] +.L4181: + adrp x2, gNandFlashIDBEccBits + add x0, x1, :lo12:.LANCHOR0 + add x22, x22, :lo12:.LANCHOR2 + add x21, x21, :lo12:.LANCHOR5 + ldrb w2, [x2, #:lo12:gNandFlashIDBEccBits] + strb w2, [x0, 1152] + adrp x2, gNandFlashEccBits + ldrh w3, [x22, 18] + str xzr, [x21, 336] + ldrb w2, [x2, #:lo12:gNandFlashEccBits] + strb w2, [x0, 1249] + mov w0, 0 + mov w2, 1 +.L4182: + cmp w3, w2 + bcs .L4183 + add x1, x1, :lo12:.LANCHOR0 + adrp x2, .LANCHOR3+1304 + sub w0, w0, #1 + strh w0, [x2, #:lo12:.LANCHOR3+1304] + strb wzr, [x1, 1192] + cbnz w20, .L4178 + bl FtlInit + mov w20, w0 + b .L4178 +.L4183: + add w0, w0, 1 + lsl w2, w2, 1 + and w0, w0, 65535 + b .L4182 + .size rk_ftl_init, .-rk_ftl_init + .align 2 + .global zftl_write + .type zftl_write, %function +zftl_write: + stp x29, x30, [sp, -112]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + mov w19, w0 + adrp x0, .LANCHOR2 + stp x21, x22, [sp, 32] + stp x25, x26, [sp, 64] + mov w20, w1 + ldr w0, [x0, #:lo12:.LANCHOR2] + mov w21, w2 + stp x23, x24, [sp, 48] + mov x26, x3 + stp x27, x28, [sp, 80] + tbz x0, 12, .L4189 + ldr w4, [x26] + mov w3, w2 + adrp x0, .LC314 + mov w2, w1 + add x0, x0, :lo12:.LC314 + mov w1, w19 + bl printk +.L4189: + cbnz w19, .L4190 + adrp x0, .LANCHOR0+1032 + mov w19, 24576 + ldr w0, [x0, #:lo12:.LANCHOR0+1032] +.L4191: + cmp w0, w20 + ccmp w0, w21, 0, hi + bcc .L4209 + add w1, w20, w21 + cmp w0, w1 + bcc .L4209 + adrp x0, .LANCHOR3 + add x0, x0, :lo12:.LANCHOR3 + add w19, w19, w20 + sub w23, w21, #1 + add w23, w23, w19 + adrp x22, .LANCHOR0 + ldrb w1, [x0, 1946] + add x27, x22, :lo12:.LANCHOR0 + str x0, [x29, 104] + add w0, w19, w21 + str w0, [x29, 100] + udiv w25, w19, w1 + udiv w23, w23, w1 + mov w20, w25 + sub w24, w23, w25 + add w24, w24, 1 +.L4193: + cbnz w24, .L4202 + bl ftl_write_commit + mov w1, 1 + mov w0, 0 + bl zftl_do_gc + add x1, x22, :lo12:.LANCHOR0 + ldr x0, [x1, 1128] + ldrh w0, [x0, 124] + cbnz w0, .L4203 + ldrh w0, [x1, 3368] + ldrh w1, [x1, 3372] + add w0, w0, w1 + cmp w0, 11 + bgt .L4204 +.L4203: + mov w1, 1 + mov w0, 0 + bl zftl_do_gc +.L4204: + add x22, x22, :lo12:.LANCHOR0 +.L4205: + ldrh w0, [x22, 3368] + ldrh w1, [x22, 3372] + add w0, w0, w1 + cmp w0, 7 + ble .L4206 + bl timer_get_time + adrp x1, .LANCHOR5+472 + str w0, [x1, #:lo12:.LANCHOR5+472] + mov w0, 0 +.L4188: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 112 + ret +.L4190: + cmp w19, 3 + bhi .L4209 + lsl w19, w19, 13 + mov w0, 8192 + b .L4191 +.L4202: + ldrb w0, [x27, 3381] + cbz w0, .L4194 + ldrb w0, [x27, 3353] + cmp w0, 2 + bhi .L4194 + bl ftl_write_commit +.L4194: + mov w0, 0 + bl buf_alloc + mov x28, x0 + cbnz x0, .L4195 + bl ftl_write_commit + b .L4193 +.L4195: + strb wzr, [x0, 57] + cmp w20, w25 + ldr x0, [x29, 104] + ccmp w20, w23, 4, ne + ldrb w0, [x0, 1946] + strb w0, [x28, 56] + bne .L4198 + cmp w20, w25 + bne .L4199 + udiv w1, w19, w0 + msub w1, w1, w0, w19 + and w1, w1, 255 + strb w1, [x28, 57] + sub w0, w0, w1 + and w0, w0, 255 + cmp w21, w0 + csel w0, w21, w0, cc +.L4217: + strb w0, [x28, 56] +.L4198: + ldrb w4, [x28, 57] + mov x1, x26 + ldrb w2, [x28, 56] + sub w24, w24, #1 + ldr x0, [x28, 8] + lsl w2, w2, 9 + add x0, x0, x4, lsl 9 + bl ftl_memcpy + ldr x1, [x27, 3384] + str w20, [x28, 36] + add w20, w20, 1 + ldr w0, [x1, 8] + add w2, w0, 1 + str w2, [x1, 8] + str w0, [x28, 32] + mov x0, x28 + bl ftl_write_buf + ldrb w0, [x28, 56] + add x26, x26, x0, lsl 9 + b .L4193 +.L4199: + ldr w1, [x29, 100] + msub w0, w0, w20, w1 + b .L4217 +.L4206: + mov w1, 1 + mov w0, 0 + bl zftl_do_gc + mov w1, 1 + mov w0, w1 + bl zftl_do_gc + b .L4205 +.L4209: + mov w0, -1 + b .L4188 + .size zftl_write, .-zftl_write + .align 2 + .global zftl_vendor_write + .type zftl_vendor_write, %function +zftl_vendor_write: + stp x29, x30, [sp, -16]! + mov x3, x2 + mov w2, w1 + add w1, w0, 512 + add x29, sp, 0 + mov w0, 2 + bl zftl_write + ldp x29, x30, [sp], 16 + ret + .size zftl_vendor_write, .-zftl_vendor_write + .align 2 + .global zftl_sys_write + .type zftl_sys_write, %function +zftl_sys_write: + stp x29, x30, [sp, -16]! + mov x3, x2 + mov w2, w1 + mov w1, w0 + add x29, sp, 0 + mov w0, 2 + bl zftl_write + ldp x29, x30, [sp], 16 + ret + .size zftl_sys_write, .-zftl_sys_write + .align 2 + .global zftl_discard + .type zftl_discard, %function +zftl_discard: + stp x29, x30, [sp, -128]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + mov w19, w1 + stp x21, x22, [sp, 32] + adrp x21, .LANCHOR0 + add x1, x21, :lo12:.LANCHOR0 + stp x23, x24, [sp, 48] + stp x25, x26, [sp, 64] + stp x27, x28, [sp, 80] + ldr w1, [x1, 1032] + cmp w0, w1 + ccmp w19, w1, 2, cc + bhi .L4244 + add w2, w0, w19 + cmp w1, w2 + bcc .L4244 + add w23, w0, 24576 + adrp x24, .LANCHOR5 + add x0, x24, :lo12:.LANCHOR5 + ldr w1, [x0, 520] + add w1, w19, w1 + str w1, [x0, 520] + adrp x0, .LANCHOR2 + str x0, [x29, 104] + ldr w2, [x0, #:lo12:.LANCHOR2] + tbz x2, 12, .L4224 + adrp x0, .LC315 + mov w4, 0 + mov w3, w19 + mov w2, w23 + add x0, x0, :lo12:.LC315 + bl printk +.L4224: + add x0, x21, :lo12:.LANCHOR0 + adrp x25, .LANCHOR3 + ldr x0, [x0, 3384] + ldr w27, [x0, 8] + add w1, w27, 1 + str w1, [x0, 8] + bl ftl_write_commit + bl ftl_flush + add x0, x25, :lo12:.LANCHOR3 + ldrb w22, [x0, 1946] + udiv w20, w23, w22 + msub w26, w20, w22, w23 + cbz w26, .L4225 + sub w22, w22, w26 + mov w0, w20 + cmp w22, w19 + csel w22, w22, w19, ls + bl lpa_hash_get_ppa + str w0, [x29, 120] + cmn w0, #1 + bne .L4226 + mov w2, 0 + add x1, x29, 120 + mov w0, w20 + bl pm_log2phys +.L4226: + ldr w0, [x29, 120] + and w28, w22, 65535 + cmn w0, #1 + beq .L4228 + mov w0, 0 + bl buf_alloc + mov x3, x0 + cbz x0, .L4228 + strb w26, [x0, 57] + ubfiz x26, x26, 9, 25 + strb w22, [x0, 56] + mov w1, 0 + ldr x0, [x0, 8] + lsl w2, w28, 9 + stp w27, w20, [x3, 32] + str x3, [x29, 96] + add x0, x0, x26 + bl ftl_memset + ldr x3, [x29, 96] + mov x0, x3 + bl ftl_write_buf + bl ftl_write_commit + add x0, x21, :lo12:.LANCHOR0 + ldr x1, [x0, 3384] + ldr w0, [x1, 76] + add w0, w0, 1 + str w0, [x1, 76] +.L4228: + add w20, w20, 1 + sub w19, w19, w28 +.L4225: + cbz w19, .L4230 + bl ftl_flush +.L4230: + add x22, x25, :lo12:.LANCHOR3 + add x26, x21, :lo12:.LANCHOR0 + mov w0, -1 + mov w28, 1 + str w0, [x29, 124] +.L4231: + ldrb w0, [x22, 1946] + cmp w19, w0 + bcs .L4236 + cbz w19, .L4238 + mov w0, w20 + bl lpa_hash_get_ppa + str w0, [x29, 120] + cmn w0, #1 + bne .L4239 + mov w2, 0 + add x1, x29, 120 + mov w0, w20 + bl pm_log2phys +.L4239: + ldr w0, [x29, 120] + cmn w0, #1 + beq .L4238 + mov w0, 0 + bl buf_alloc + mov x22, x0 + cbz x0, .L4238 + add x25, x25, :lo12:.LANCHOR3 + strb wzr, [x0, 57] + strb w19, [x0, 56] + stp w27, w20, [x22, 32] + ldrb w0, [x25, 1946] + cmp w19, w0 + bcc .L4241 + adrp x1, .LANCHOR4 + add x1, x1, :lo12:.LANCHOR4 + add x1, x1, 1056 + mov w2, 1496 + adrp x0, .LC0 + add x0, x0, :lo12:.LC0 + bl printk + bl dump_stack +.L4241: + ldr x0, [x22, 8] + lsl w2, w19, 9 + mov w1, 0 + bl ftl_memset + mov x0, x22 + bl ftl_write_buf + bl ftl_write_commit + add x0, x21, :lo12:.LANCHOR0 + ldr x1, [x0, 3384] + ldr w0, [x1, 76] + add w0, w0, 1 + str w0, [x1, 76] +.L4238: + add x0, x24, :lo12:.LANCHOR5 + ldr w1, [x0, 520] + cmp w1, 8192 + bls .L4245 + ldr x0, [x29, 104] + ldr w0, [x0, #:lo12:.LANCHOR2] + tbz x0, 12, .L4242 + adrp x0, .LC315 + mov w4, 0 + mov w3, w19 + mov w2, w23 + add x0, x0, :lo12:.LC315 + bl printk +.L4242: + add x24, x24, :lo12:.LANCHOR5 + add x21, x21, :lo12:.LANCHOR0 + str wzr, [x24, 520] + bl flt_sys_flush + mov w0, 1 + str w0, [x21, 3396] +.L4245: + mov w0, 0 + b .L4222 +.L4236: + mov w0, w20 + bl lpa_hash_get_ppa + str w0, [x29, 120] + cmn w0, #1 + beq .L4232 + mov w0, 0 + bl buf_alloc + mov x3, x0 + cbz x0, .L4234 + ldrb w2, [x22, 1946] + mov w1, 0 + strb w2, [x0, 56] + strb wzr, [x0, 57] + ldr x0, [x0, 8] + lsl w2, w2, 9 + stp w27, w20, [x3, 32] + str x3, [x29, 96] + bl ftl_memset + ldr x3, [x29, 96] + mov x0, x3 + bl ftl_write_buf + bl ftl_write_commit +.L4271: + ldr x1, [x26, 3384] + ldr w0, [x1, 76] + add w0, w0, 1 + str w0, [x1, 76] +.L4234: + ldrb w0, [x22, 1946] + add w20, w20, 1 + sub w19, w19, w0 + b .L4231 +.L4232: + mov w2, 0 + add x1, x29, 120 + mov w0, w20 + bl pm_log2phys + ldr w0, [x29, 120] + cmn w0, #1 + beq .L4234 + add x1, x29, 124 + mov w2, 1 + mov w0, w20 + bl pm_log2phys + ldrb w1, [x26, 1205] + mov w0, 24 + ldrh w2, [x22, 1304] + sub w0, w0, w1 + ldr w1, [x29, 120] + sub w0, w0, w2 + lsr w1, w1, w2 + lsl w0, w28, w0 + sub w0, w0, #1 + and w0, w0, w1 + ldrb w1, [x22, 1306] + udiv w0, w0, w1 + bl ftl_vpn_decrement + b .L4271 +.L4244: + mov w0, -1 +.L4222: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 128 + ret + .size zftl_discard, .-zftl_discard + .align 2 + .global dump_pm_blk + .type dump_pm_blk, %function +dump_pm_blk: + stp x29, x30, [sp, -48]! + mov w2, 4 + adrp x0, .LC267 + add x0, x0, :lo12:.LC267 + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x19, .LANCHOR0 + add x19, x19, :lo12:.LANCHOR0 + stp x21, x22, [sp, 32] + adrp x21, .LANCHOR5 + add x21, x21, :lo12:.LANCHOR5 + mov w20, 0 + mov w22, 65535 + ldr x1, [x19, 3384] + add x1, x1, 704 + ldrh w3, [x1, -6] + bl rknand_print_hex + ldrh w3, [x21, 220] + adrp x0, .LC268 + ldr x1, [x19, 3384] + mov w2, 2 + add x0, x0, :lo12:.LC268 + add x1, x1, 416 + bl rknand_print_hex +.L4273: + ldrh w0, [x21, 220] + cmp w0, w20 + bhi .L4275 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x29, x30, [sp], 48 + ret +.L4275: + ldr x0, [x19, 3384] + add x0, x0, w20, sxtw 1 + ldrh w0, [x0, 416] + cmp w0, w22 + beq .L4274 + mov x1, 0 + bl ftl_sblk_dump +.L4274: + add w20, w20, 1 + and w20, w20, 65535 + b .L4273 + .size dump_pm_blk, .-dump_pm_blk + .align 2 + .global id_block_prog_msb_ff_data + .type id_block_prog_msb_ff_data, %function +id_block_prog_msb_ff_data: + stp x29, x30, [sp, -96]! + add x29, sp, 0 + stp x21, x22, [sp, 32] + adrp x21, .LANCHOR0 + stp x23, x24, [sp, 48] + and w24, w0, 255 + add x0, x21, :lo12:.LANCHOR0 + stp x19, x20, [sp, 16] + stp x25, x26, [sp, 64] + and w19, w2, 65535 + str x27, [sp, 80] + ldrb w2, [x0, 1154] + cbnz w2, .L4277 + ldr x0, [x0, 1144] + ldrb w0, [x0, 19] + sub w0, w0, #5 + and w0, w0, 255 + cmp w0, 63 + bhi .L4277 + mov x2, 16391 + movk x2, 0x4000, lsl 16 + movk x2, 0x8000, lsl 48 + lsr x0, x2, x0 + tbz x0, 0, .L4277 + adrp x20, .LANCHOR3 + add x20, x20, :lo12:.LANCHOR3 + adrp x23, .LC316 + mov w25, w1 + add x20, x20, 2476 + add x23, x23, :lo12:.LC316 +.L4279: + add x26, x21, :lo12:.LANCHOR0 + ldr x0, [x26, 1144] + ldrh w0, [x0, 10] + cmp w0, w19 + bhi .L4280 +.L4277: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldr x27, [sp, 80] + ldp x29, x30, [sp], 96 + ret +.L4280: + sxtw x22, w19 + add w27, w19, w25 + mov w1, w19 + mov w2, w27 + mov x0, x23 + ldrh w3, [x20, x22, lsl 1] + bl printk + ldrh w1, [x20, x22, lsl 1] + mov w0, 65535 + cmp w1, w0 + bne .L4277 + adrp x22, .LANCHOR5 + add x22, x22, :lo12:.LANCHOR5 + mov w2, 16384 + mov w1, 255 + add w19, w19, 1 + ldr x0, [x22, 304] + and w19, w19, 65535 + bl ftl_memset + ldr x0, [x26, 1144] + mov w1, w27 + ldr x3, [x22, 304] + mov x2, x3 + ldrb w4, [x0, 9] + mov w0, w24 + bl flash_prog_page + b .L4279 + .size id_block_prog_msb_ff_data, .-id_block_prog_msb_ff_data + .align 2 + .global write_idblock + .type write_idblock, %function +write_idblock: + stp x29, x30, [sp, -304]! + mov w4, 35899 + movk w4, 0xfcdc, lsl 16 + add x29, sp, 0 + stp x23, x24, [sp, 48] + adrp x23, .LANCHOR0 + stp x19, x20, [sp, 16] + ldrb w3, [x23, #:lo12:.LANCHOR0] + str w3, [x29, 160] + stp x21, x22, [sp, 32] + stp x25, x26, [sp, 64] + stp x27, x28, [sp, 80] + ldrh w3, [x29, 160] + str w3, [x29, 212] + ldr w3, [x1] + cmp w3, w4 + mov w4, 19282 + movk w4, 0x534e, lsl 16 + ccmp w3, w4, 4, ne + beq .L4283 + add w4, w4, 327680 + cmp w3, w4 + beq .L4283 +.L4401: + mov w0, -1 +.L4282: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 304 + ret +.L4283: + cmp w0, 15 + bls .L4401 + add x25, x23, :lo12:.LANCHOR0 + mov w19, w0 + str x2, [x29, 168] + str x1, [x29, 216] + ldr x0, [x25, 1144] + ldrb w20, [x0, 9] + ldrh w24, [x0, 10] + adrp x0, .LANCHOR2+34 + ldrh w21, [x0, #:lo12:.LANCHOR2+34] + ldrb w0, [x25, 1154] + str w0, [x29, 144] + mov w0, 59392 + movk w0, 0x3, lsl 16 + bl ftl_malloc + mov x22, x0 + cbz x0, .L4401 + adrp x0, .LANCHOR5+496 + ldrb w0, [x0, #:lo12:.LANCHOR5+496] + cbz w0, .L4340 + ldrb w1, [x23, #:lo12:.LANCHOR0] + ldrb w0, [x25, 1154] + cbz w1, .L4287 + cmp w0, 0 + cset w0, eq +.L4398: + str w0, [x29, 236] + b .L4286 +.L4287: + cmp w0, 3 + beq .L4341 + ldr w2, [x29, 212] + cmp w0, 2 + mov w1, 2 + mov w0, 3 + csel w1, w2, w1, ne + csel w0, wzr, w0, ne + str w1, [x29, 212] + b .L4398 +.L4340: + str wzr, [x29, 236] +.L4286: + add w19, w19, 511 + lsr w19, w19, 9 + cmp w19, 8 + bls .L4343 + cmp w19, 500 + bhi .L4289 +.L4288: + ldr x0, [x29, 216] + mov w1, 35899 + movk w1, 0xfcdc, lsl 16 + ldr w0, [x0] + cmp w0, w1 + mov w1, 19282 + movk w1, 0x534e, lsl 16 + ccmp w0, w1, 4, ne + beq .L4290 + add w1, w1, 327680 + cmp w0, w1 + beq .L4290 +.L4289: + mov x0, x22 + bl ftl_free + b .L4401 +.L4341: + str w0, [x29, 212] + mov w0, 2 + b .L4398 +.L4343: + mov w19, 8 + b .L4288 +.L4290: + mov w0, 0 + bl zftl_flash_exit_slc_mode + add x0, x23, :lo12:.LANCHOR0 + mul w24, w24, w20 + mov w4, 17739 + mov w2, 63871 + movk w4, 0x4e52, lsl 16 + ldrb w0, [x0, 1154] + strb w0, [x23, #:lo12:.LANCHOR0] + sub w0, w24, #1 + add w0, w0, w19 + udiv w0, w0, w24 + str w0, [x29, 132] + ldr x0, [x29, 216] + add x3, x0, 253952 + mov w0, 0 + add x3, x3, 1532 +.L4296: + ldr w1, [x3] + cbnz w1, .L4291 + cbnz w0, .L4292 + str w4, [x3, 512] +.L4293: + add w0, w0, 1 + sub w2, w2, #1 + cmp w0, 4095 + sub x3, x3, #4 + csel w0, w0, wzr, cc + cmp w2, 4096 + bne .L4296 +.L4295: + ldr x1, [x29, 168] + mul w0, w21, w20 + mov w3, 5 + mov w2, 4 + str w0, [x29, 164] + adrp x0, .LC318 + add x0, x0, :lo12:.LC318 + bl rknand_print_hex + mov w2, w19 + mov w1, w19 + adrp x0, .LC319 + add x0, x0, :lo12:.LC319 + bl printk + str xzr, [x29, 224] + adrp x0, .LANCHOR2 + add x0, x0, :lo12:.LANCHOR2 + add x0, x0, 8 + str wzr, [x29, 232] + str x0, [x29, 136] +.L4337: + adrp x27, .LANCHOR5 + add x1, x27, :lo12:.LANCHOR5 + ldr w0, [x29, 224] + ldrb w1, [x1, 496] + cbnz w1, .L4297 + ldr x2, [x29, 224] + cmp w0, 0 + ldr x1, [x29, 168] + ldr w1, [x1, x2, lsl 2] + ldr w2, [x29, 164] + mul w21, w2, w1 + ldr w2, [x29, 132] + ccmp w2, 1, 0, ne + bls .L4298 + ldr x2, [x29, 168] + sub w0, w0, #1 + ldr w0, [x2, x0, lsl 2] + add w0, w0, 1 + cmp w1, w0 + bne .L4298 +.L4299: + ldr x0, [x29, 224] + add x0, x0, 1 + str x0, [x29, 224] + cmp x0, 4 + bne .L4337 +.L4339: + mov w0, 0 + bl zftl_flash_exit_slc_mode + adrp x0, .LANCHOR0 + ldrb w2, [x29, 160] + add x1, x0, :lo12:.LANCHOR0 + strb w2, [x0, #:lo12:.LANCHOR0] + ldr w2, [x29, 236] + cbz w2, .L4338 + ldrb w2, [x29, 144] + strb w2, [x1, 1154] +.L4338: + add x0, x0, :lo12:.LANCHOR0 + mov w1, 2 + strb w1, [x0, 1208] + mov w0, 0 + bl zftl_flash_enter_slc_mode + mov x0, x22 + bl ftl_free + ldr w0, [x29, 232] + cmp w0, 0 + csetm w0, eq + b .L4282 +.L4292: + ldr x1, [x29, 216] + ldr w1, [x1, w0, uxtw 2] + str w1, [x3, 512] + b .L4293 +.L4291: + adrp x0, .LC317 + add x0, x0, :lo12:.LC317 + bl printk + b .L4295 +.L4297: + adrp x20, .LANCHOR0 + add x23, x20, :lo12:.LANCHOR0 + ldr w2, [x29, 224] + ldr x1, [x23, 1048] + add x1, x1, w2, uxtw + ldrb w21, [x1, 32] + mov x1, x20 + cmp w21, 255 + beq .L4299 + ldr w2, [x29, 164] + mul w21, w21, w2 + ldr w2, [x29, 236] + cbz w2, .L4298 + and w0, w0, -3 + cmp w0, 1 + beq .L4300 + cmp w2, 3 + bne .L4301 +.L4300: + add x2, x1, :lo12:.LANCHOR0 + ldrb w0, [x29, 212] + strb w0, [x1, #:lo12:.LANCHOR0] + strb w0, [x2, 1154] +.L4298: + mov w2, 512 + mov w1, 0 + mov x0, x22 + bl ftl_memset + adrp x20, .LANCHOR0 + add x0, x20, :lo12:.LANCHOR0 + ldr x1, [x0, 1144] + ldrb w24, [x1, 9] + ldrh w23, [x1, 10] + adrp x1, .LANCHOR2 + add x1, x1, :lo12:.LANCHOR2 + ldrh w25, [x1, 34] + mul w23, w23, w24 + ldrb w1, [x0, 1252] + str w1, [x29, 128] + udiv w1, w21, w24 + strb wzr, [x0, 1252] + mov w0, 0 + mul w25, w25, w24 + bl flash_erase_block + cmp w23, w19 + bcs .L4344 + add w1, w21, w25 + mov w0, 0 + bl flash_erase_block + mov w1, 2 +.L4302: + add x28, x20, :lo12:.LANCHOR0 + ldr x0, [x28, 1144] + ldrh w23, [x0, 10] + ldrb w0, [x0, 12] + lsl w23, w23, 2 + mul w23, w23, w1 + sdiv w0, w23, w0 + str w0, [x29, 176] + udiv w0, w21, w25 + msub w0, w0, w25, w21 + str w0, [x29, 208] + sub w26, w21, w0 + cmp w21, w26 + bne .L4346 + ldrb w0, [x28, 1028] + cmp w0, 9 + bne .L4346 + add x27, x27, :lo12:.LANCHOR5 + mov w2, 1024 + mov w1, 0 + ldr x27, [x27, 352] + mov x0, x27 + bl ftl_memset + mov w0, 18766 + movk w0, 0x464e, lsl 16 + str w0, [x27] + mov w0, 12 + str w0, [x27, 4] + ldrb w0, [x28, 1154] + strb wzr, [x27, 16] + str wzr, [x27, 12] + cbz w0, .L4304 + ldr x0, [x28, 1144] + ldrb w0, [x0, 29] + strb w0, [x27, 16] +.L4304: + add x20, x20, :lo12:.LANCHOR0 + mov w0, 4 + strb w0, [x27, 17] + cmp w24, 8 + sub w28, w19, #4 + ldr x1, [x20, 1144] + ldrh w0, [x1, 10] + ldrb w1, [x1, 12] + strb wzr, [x27, 20] + strh wzr, [x27, 22] + sdiv w0, w0, w1 + mov w1, 16 + strh w0, [x27, 18] + mov w0, 70 + csel w0, w0, w1, hi + strb w0, [x27, 21] + mov w1, 12 + add x0, x27, 12 + bl js_hash + str w0, [x27, 8] +.L4303: + ldr x20, [x29, 216] + adrp x0, .LANCHOR0 + add x25, x0, :lo12:.LANCHOR0 + mov w23, 0 + add x0, x25, 4 + str x0, [x29, 200] +.L4306: + ldr w0, [x29, 176] + cmp w0, w23 + bhi .L4317 + ldr x0, [x29, 136] + mov x23, x22 + mov w24, 4 + mov w25, 0 + stp w28, wzr, [x29, 192] + ldrb w0, [x0, 9] + str w0, [x29, 156] + ldr x0, [x29, 136] + ldr w1, [x29, 156] + ldrh w0, [x0, 26] + mul w0, w0, w1 + adrp x1, .LANCHOR0 + add x20, x1, :lo12:.LANCHOR0 + udiv w1, w21, w0 + strb wzr, [x20, 1252] + msub w0, w1, w0, w21 + str w0, [x29, 208] + sub w0, w21, w0 + str w0, [x29, 152] + ldr w0, [x29, 208] + and w0, w0, 3 + str w0, [x29, 200] + add x0, x20, 4 + str x0, [x29, 104] +.L4318: + ldr w0, [x29, 192] + cmp w25, w0 + bcc .L4332 + adrp x0, .LANCHOR0 + add x20, x0, :lo12:.LANCHOR0 + ldrb w0, [x29, 128] + strb w0, [x20, 1252] + ldr w0, [x29, 236] + cbz w0, .L4333 + mov w0, 0 + bl zftl_flash_exit_slc_mode + adrp x0, .LANCHOR0 + strb wzr, [x20, 1154] + strb wzr, [x0, #:lo12:.LANCHOR0] +.L4333: + lsl w0, w28, 7 + mov x1, 0 +.L4334: + cmp w0, w1 + bhi .L4335 + ldr w0, [x29, 232] + add w0, w0, 1 + str w0, [x29, 232] + cmp w0, 5 + bls .L4299 + b .L4339 +.L4301: + mov w0, 0 + bl zftl_flash_exit_slc_mode + strb wzr, [x20, #:lo12:.LANCHOR0] + strb wzr, [x23, 1154] + b .L4298 +.L4344: + mov w1, 1 + b .L4302 +.L4346: + mov w28, w19 + mov x27, 0 + b .L4303 +.L4317: + ldr w0, [x29, 208] + ldrb w2, [x25, 1154] + add w8, w0, w23 + ldr x0, [x29, 200] + ubfx x8, x8, 2, 16 + add w1, w8, 1 + ldrh w0, [x0, w1, sxtw 1] + cbz w2, .L4308 + ldrb w4, [x25, 1] + lsl w0, w1, 1 + cmp w4, 0 + csel w0, w0, w1, ne +.L4308: + ldrb w1, [x25, 1028] + cmp w1, 9 + bne .L4310 +.L4399: + str w0, [x29, 240] + mov w0, 61424 + str w0, [x29, 244] + ldr x0, [x29, 200] + ldrh w0, [x0, w8, sxtw 1] + cbnz w2, .L4312 + mov w8, w0 +.L4313: + mul w0, w24, w8 + cbnz x27, .L4314 + ldr w5, [x20] + mov x4, x20 + ldr w6, [x29, 240] + mov w3, w19 + add w27, w0, w26 + mov w7, 61424 + str w8, [x29, 196] + mov w2, w23 + mov w1, w27 + adrp x0, .LC320 + add x0, x0, :lo12:.LC320 + bl printk + add x2, x29, 240 + mov x1, x20 + mov w0, w27 + bl fw_flash_page_prog.constprop.29 + ldrb w0, [x25, 1154] + ldr w8, [x29, 196] + cbnz w0, .L4315 + udiv w1, w26, w24 + add w2, w8, 1 + bl id_block_prog_msb_ff_data +.L4315: + add w0, w28, 16 + add x20, x20, 2048 + cmp w23, w0 + bcc .L4316 + ldr x0, [x29, 216] + add w1, w28, 20 + cmp w23, w1 + add x0, x0, 2048 + csel x20, x0, x20, cc +.L4316: + add w9, w23, 4 + mov x27, 0 + and w23, w9, 65535 + b .L4306 +.L4310: + sub w0, w0, #1 + lsl w0, w0, 2 + b .L4399 +.L4312: + ldrb w1, [x25, 1] + lsl w0, w8, 1 + cmp w1, 0 + csel w8, w0, w8, ne + b .L4313 +.L4314: + add x2, x29, 240 + mov x1, x27 + add w0, w0, w26 + bl fw_flash_page_prog.constprop.29 + b .L4316 +.L4332: + ldr w0, [x29, 200] + ldr x1, [x29, 104] + sub w0, w24, w0 + ldrb w2, [x20, 1154] + and w0, w0, 65535 + str w0, [x29, 176] + ldr w0, [x29, 208] + add w0, w0, w25 + udiv w0, w0, w24 + and w0, w0, 65535 + ldrh w1, [x1, w0, sxtw 1] + cbnz w2, .L4319 + mov w0, w1 +.L4320: + ldp w2, w1, [x29, 152] + ldrb w27, [x20, 1152] + madd w0, w1, w0, w2 + str w0, [x29, 148] + ldr w0, [x29, 200] + ldr w1, [x29, 148] + add w26, w0, w1 + ldr x0, [x20, 1144] + ldrb w0, [x0, 9] + udiv w26, w26, w0 + ldrb w0, [x20, 1249] + str w0, [x29, 124] + mov w0, w27 + bl nandc_bch_sel + adrp x0, .LANCHOR5 + add x0, x0, :lo12:.LANCHOR5 + str x0, [x29, 112] +.L4321: + mov w4, w24 + add x3, x29, 240 + mov x2, x23 + mov w1, w26 + mov w0, 0 + bl flash_read_page + mov w5, w0 + cmn w0, #1 + bne .L4322 + ldrb w6, [x20, 1252] + cbnz w6, .L4323 +.L4326: + ldr x0, [x29, 112] + ldr x6, [x0, 336] + cbnz x6, .L4324 +.L4325: + ldrb w0, [x20, 1192] + cbz w0, .L4322 + mov w4, w24 + add x3, x29, 240 + mov x2, x23 + mov w1, w26 + mov w0, 0 + bl flash_ddr_tuning_read + b .L4400 +.L4319: + ldrb w2, [x20, 1] + lsl w1, w0, 1 + cmp w2, 0 + csel w0, w1, w0, ne + b .L4320 +.L4323: + str w6, [x29, 100] + mov w4, w24 + str w5, [x29, 120] + add x3, x29, 240 + strb wzr, [x20, 1252] + mov x2, x23 + mov w1, w26 + mov w0, 0 + bl flash_read_page + cmn w0, #1 + ldr w6, [x29, 100] + strb w6, [x20, 1252] + ldr w5, [x29, 120] + beq .L4326 +.L4400: + mov w5, w0 +.L4322: + cmn w5, #1 + cset w4, eq + cmp w27, 16 + cset w0, ne + tst w4, w0 + beq .L4328 + mov w0, 16 + mov w27, 16 + bl nandc_bch_sel + b .L4321 +.L4324: + str w5, [x29, 120] + mov w4, w24 + add x3, x29, 240 + mov x2, x23 + mov w1, w26 + mov w0, 0 + blr x6 + cmn w0, #1 + ldr w5, [x29, 120] + beq .L4325 + b .L4400 +.L4328: + ldr w0, [x29, 124] + bl nandc_bch_sel + cmp w4, 0 + ldr w0, [x29, 196] + csinv w0, w0, wzr, eq + str w0, [x29, 196] + ldr w0, [x29, 152] + cmp w25, 0 + ccmp w21, w0, 0, eq + bne .L4330 + ldr w0, [x29, 196] + cbnz w0, .L4330 + ldr w0, [x23] + mov w1, 18766 + movk w1, 0x464e, lsl 16 + cmp w0, w1 + bne .L4330 + ldr w0, [x29, 192] + ldr w1, [x29, 176] + ldrb w24, [x23, 17] + add w0, w0, w1 + str w0, [x29, 192] +.L4331: + ldr w0, [x29, 176] + add w25, w0, w25 + and w25, w25, 65535 + b .L4318 +.L4330: + ldr x0, [x29, 176] + mov w2, w25 + ldr w1, [x29, 148] + ldp w3, w4, [x29, 240] + ubfiz x0, x0, 9, 16 + add x23, x23, x0 + adrp x0, .LC321 + add x0, x0, :lo12:.LC321 + bl printk + str wzr, [x29, 200] + b .L4331 +.L4335: + ldr x2, [x29, 216] + ldr w3, [x22, x1, lsl 2] + add x1, x1, 1 + add x2, x2, x1, lsl 2 + ldr w2, [x2, -4] + cmp w3, w2 + beq .L4334 + mov w2, 512 + mov w1, 0 + mov x0, x22 + bl ftl_memset + mov w1, w21 + mov w0, 0 + bl flash_erase_block + b .L4299 + .size write_idblock, .-write_idblock + .align 2 + .global write_loader_lba + .type write_loader_lba, %function +write_loader_lba: + stp x29, x30, [sp, -112]! + cmp w0, 64 + add x29, sp, 0 + stp x19, x20, [sp, 16] + mov w19, w0 + stp x21, x22, [sp, 32] + adrp x20, .LANCHOR5 + stp x23, x24, [sp, 48] + mov w21, w1 + mov x24, x2 + bne .L4403 + ldr w0, [x2] + mov w1, 35899 + movk w1, 0xfcdc, lsl 16 + cmp w0, w1 + mov w1, 19282 + movk w1, 0x534e, lsl 16 + ccmp w0, w1, 4, ne + beq .L4404 + add w1, w1, 327680 + cmp w0, w1 + bne .L4403 +.L4404: + add x22, x20, :lo12:.LANCHOR5 + mov w0, 1 + strb w0, [x22, 524] + mov w0, 59392 + movk w0, 0x3, lsl 16 + bl ftl_malloc + mov w2, 59392 + mov w1, 0 + movk w2, 0x3, lsl 16 + str x0, [x22, 528] + bl ftl_memset + mov w0, 64 + str w0, [x22, 536] +.L4403: + add x23, x20, :lo12:.LANCHOR5 + ldr w2, [x24] + mov w4, w21 + mov w3, w19 + adrp x0, .LC322 + add x0, x0, :lo12:.LC322 + ldr x1, [x23, 528] + bl printk + ldrb w0, [x23, 524] + cbz w0, .L4402 + ldr x22, [x23, 528] + cbz x22, .L4402 + sub w0, w19, #64 + cmp w0, 499 + bhi .L4406 + mov w2, 564 + sub w2, w2, w19 + cmp w21, w2 + ubfiz x0, x0, 9, 25 + csel w2, w21, w2, ls + mov x1, x24 + lsl w2, w2, 9 + add x0, x22, x0 + bl ftl_memcpy +.L4407: + add x23, x20, :lo12:.LANCHOR5 + ldr w0, [x23, 536] + cmp w19, w0 + beq .L4416 + strb wzr, [x23, 524] + mov x0, x22 + bl ftl_free + str xzr, [x23, 528] + b .L4416 +.L4406: + cmp w19, 563 + bls .L4407 + ldr w0, [x23, 536] + mov w1, 500 + sub w0, w0, #64 + cmp w0, 500 + csel w0, w0, w1, ls + adrp x1, .LANCHOR0+1144 + ldr x1, [x1, #:lo12:.LANCHOR0+1144] + ldrb w1, [x1, 9] + cmp w1, 4 + beq .L4408 + mov w1, 2 + str w1, [x29, 72] + mov w1, 3 + str w1, [x29, 76] + mov w1, 4 + str w1, [x29, 80] + mov w1, 5 + str w1, [x29, 84] + mov w1, 6 + str w1, [x29, 88] +.L4409: + add x2, x22, 245760 + mov w1, 61952 + add x2, x2, 2048 +.L4415: + ldr w3, [x2] + cbz w3, .L4413 + add w0, w1, 2048 + lsl w0, w0, 2 +.L4414: + mov x1, x22 + add x22, x20, :lo12:.LANCHOR5 + add x2, x29, 72 + bl write_idblock + ldr x0, [x22, 528] + strb wzr, [x22, 524] + bl ftl_free + str xzr, [x22, 528] +.L4416: + add x20, x20, :lo12:.LANCHOR5 + add w19, w19, w21 + str w19, [x20, 536] +.L4402: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x29, x30, [sp], 112 + ret +.L4408: + add x2, x29, 72 + mov x1, 0 +.L4412: + cmp w0, 256 + bls .L4410 + lsl w3, w1, 1 + str w3, [x2, x1, lsl 2] +.L4411: + add x1, x1, 1 + cmp x1, 5 + bne .L4412 + b .L4409 +.L4410: + str w1, [x2, x1, lsl 2] + b .L4411 +.L4413: + sub w1, w1, #1 + sub x2, x2, #4 + cmp w1, 4096 + bne .L4415 + lsl w0, w0, 9 + b .L4414 + .size write_loader_lba, .-write_loader_lba + .align 2 + .global FtlWrite + .type FtlWrite, %function +FtlWrite: + stp x29, x30, [sp, -48]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + and w20, w0, 255 + stp x21, x22, [sp, 32] + sub w0, w1, #64 + mov w19, w1 + mov w21, w2 + mov x22, x3 + cmp w0, 1983 + bhi .L4428 + cbnz w20, .L4428 + mov x2, x3 + mov w1, w21 + mov w0, w19 + bl write_loader_lba +.L4428: + adrp x0, .LANCHOR5+232 + mov x3, x22 + mov w2, w21 + mov w1, w19 + ldr x0, [x0, #:lo12:.LANCHOR5+232] + ldr x4, [x0, 48] + mov w0, w20 + blr x4 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x29, x30, [sp], 48 + ret + .size FtlWrite, .-FtlWrite + .align 2 + .global rknand_sys_storage_ioctl + .type rknand_sys_storage_ioctl, %function +rknand_sys_storage_ioctl: + mov w0, 25364 + movk w0, 0x4004, lsl 16 + cmp w1, w0 + bne .L4434 + stp x29, x30, [sp, -16]! + add x29, sp, 0 + bl rknand_dev_flush + mov x1, 0 + adrp x0, .LC323 + add x0, x0, :lo12:.LC323 + bl printk + mov x0, 0 + ldp x29, x30, [sp], 16 + ret +.L4434: + mov x0, -22 + ret + .size rknand_sys_storage_ioctl, .-rknand_sys_storage_ioctl + .align 2 + .global rk_ftl_storage_sys_init + .type rk_ftl_storage_sys_init, %function +rk_ftl_storage_sys_init: + stp x29, x30, [sp, -16]! + adrp x0, .LANCHOR5 + add x0, x0, :lo12:.LANCHOR5 + mov w1, -1 + add x29, sp, 0 + str w1, [x0, 536] + strb wzr, [x0, 524] + str xzr, [x0, 528] + str xzr, [x0, 544] + bl rknand_sys_storage_init + ldp x29, x30, [sp], 16 + ret + .size rk_ftl_storage_sys_init, .-rk_ftl_storage_sys_init + .align 2 + .global StorageSysDataDeInit + .type StorageSysDataDeInit, %function +StorageSysDataDeInit: + mov w0, 0 + ret + .size StorageSysDataDeInit, .-StorageSysDataDeInit + .align 2 + .global rk_ftl_vendor_storage_init + .type rk_ftl_vendor_storage_init, %function +rk_ftl_vendor_storage_init: + stp x29, x30, [sp, -80]! + add x29, sp, 0 + stp x19, x20, [sp, 16] + adrp x19, .LANCHOR5 + add x20, x19, :lo12:.LANCHOR5 + stp x21, x22, [sp, 32] + stp x23, x24, [sp, 48] + str x25, [sp, 64] + ldr x0, [x20, 552] + cbnz x0, .L4443 + mov w0, 65536 + bl ftl_malloc + str x0, [x20, 552] +.L4443: + add x19, x19, :lo12:.LANCHOR5 + ldr x0, [x19, 552] + cbz x0, .L4448 + adrp x23, .LC324 + mov w25, 22084 + add x23, x23, :lo12:.LC324 + mov w24, 0 + mov w22, 0 + mov w21, 0 + movk w25, 0x524b, lsl 16 +.L4446: + ldr x2, [x19, 552] + mov w1, 128 + lsl w0, w21, 7 + bl FlashBootVendorRead + cbnz w0, .L4449 + ldr x0, [x19, 552] + add x1, x0, 61440 + ldr w3, [x0, 4] + ldr w2, [x1, 4092] + ldr w1, [x0] + mov x0, x23 + bl printk + ldr x20, [x19, 552] + ldr w0, [x20] + cmp w0, w25 + bne .L4445 + add x0, x20, 61440 + ldr w1, [x20, 4] + ldr w0, [x0, 4092] + cmp w0, w1 + bne .L4445 + cmp w0, w22 + bls .L4445 + mov w24, w21 + mov w22, w0 +.L4445: + add w21, w21, 1 + cmp w21, 2 + bne .L4446 + cbz w22, .L4447 + mov x2, x20 + mov w1, 128 + lsl w0, w24, 7 + bl FlashBootVendorRead + cmp w0, 0 + csetm w0, ne +.L4442: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldr x25, [sp, 64] + ldp x29, x30, [sp], 80 + ret +.L4447: + mov w1, 0 + mov x2, 65536 + mov x0, x20 + bl memset + mov w1, 22084 + mov w0, 1 + movk w1, 0x524b, lsl 16 + stp w1, w0, [x20] + add x1, x20, 61440 + str w0, [x1, 4092] + mov w0, -1032 + strh w0, [x20, 14] + mov w0, 0 + b .L4442 +.L4448: + mov w0, -12 + b .L4442 +.L4449: + mov w0, -1 + b .L4442 + .size rk_ftl_vendor_storage_init, .-rk_ftl_vendor_storage_init + .align 2 + .global rk_ftl_vendor_read + .type rk_ftl_vendor_read, %function +rk_ftl_vendor_read: + adrp x3, .LANCHOR5+552 + ldr x4, [x3, #:lo12:.LANCHOR5+552] + cbz x4, .L4457 + ldrh w6, [x4, 10] + add x5, x4, 16 + mov w3, 0 +.L4454: + cmp w3, w6 + bcc .L4456 +.L4457: + mov w0, -1 + ret +.L4456: + ldrh w7, [x5], 8 + cmp w7, w0 + bne .L4455 + stp x29, x30, [sp, -32]! + add x3, x4, w3, uxtw 3 + mov x0, x1 + add x29, sp, 0 + str x19, [sp, 16] + ldrh w19, [x3, 20] + ldrh w1, [x3, 18] + cmp w19, w2 + csel w19, w19, w2, ls + add x1, x1, 1024 + uxtw x2, w19 + add x1, x4, x1 + bl memcpy + mov w0, w19 + ldr x19, [sp, 16] + ldp x29, x30, [sp], 32 + ret +.L4455: + add w3, w3, 1 + b .L4454 + .size rk_ftl_vendor_read, .-rk_ftl_vendor_read + .align 2 + .global rk_ftl_vendor_write + .type rk_ftl_vendor_write, %function +rk_ftl_vendor_write: + stp x29, x30, [sp, -112]! + adrp x3, .LANCHOR5+552 + add x29, sp, 0 + stp x19, x20, [sp, 16] + ldr x19, [x3, #:lo12:.LANCHOR5+552] + stp x21, x22, [sp, 32] + stp x23, x24, [sp, 48] + stp x25, x26, [sp, 64] + stp x27, x28, [sp, 80] + cbz x19, .L4477 + add w4, w2, 63 + ldrh w3, [x19, 10] + ldrh w24, [x19, 8] + mov x28, x1 + mov w26, w2 + and w22, w4, -64 + add x1, x19, 16 + mov w20, 0 +.L4464: + cmp w20, w3 + bcc .L4472 + ldrh w1, [x19, 14] + cmp w22, w1 + bhi .L4477 + add x3, x19, w3, uxth 3 + strh w0, [x3, 16] + and w0, w22, 65535 + ldrh w2, [x19, 12] + strh w2, [x3, 18] + strh w26, [x3, 20] + add w2, w2, w0 + sub w0, w1, w0 + strh w2, [x19, 12] + strh w0, [x19, 14] + uxtw x2, w26 + mov x1, x28 + ldrh w0, [x3, 18] + add x0, x0, 1024 + add x0, x19, x0 + bl memcpy + ldrh w0, [x19, 10] + add w0, w0, 1 + strh w0, [x19, 10] + b .L4479 +.L4472: + ldrh w6, [x1], 8 + cmp w6, w0 + bne .L4465 + uxtw x23, w20 + add x5, x19, 1024 + add x21, x19, x23, lsl 3 + ldrh w25, [x21, 20] + add w25, w25, 63 + and w25, w25, -64 + cmp w26, w25 + bls .L4466 + ldrh w0, [x19, 14] + cmp w22, w0 + bhi .L4477 + add x23, x23, 2 + ldrh w21, [x21, 18] + add x23, x19, x23, lsl 3 + sub w3, w3, #1 +.L4467: + cmp w20, w3 + bcc .L4468 + add x20, x19, w20, uxtw 3 + and w21, w21, 65535 + add x0, x5, w21, uxth + uxtw x2, w26 + mov x1, x28 + strh w21, [x20, 18] + strh w6, [x20, 16] + strh w26, [x20, 20] + bl memcpy + ldrh w0, [x19, 14] + and w4, w22, 65535 + add w21, w21, w4 + strh w21, [x19, 12] + sub w0, w0, w4 + add w25, w0, w25 + strh w25, [x19, 14] +.L4479: + ldr w0, [x19, 4] + add x1, x19, 61440 + mov x2, x19 + add w0, w0, 1 + str w0, [x19, 4] + str w0, [x1, 4092] + mov w1, 128 + ldrh w0, [x19, 8] + add w0, w0, 1 + and w0, w0, 65535 + cmp w0, 1 + csel w0, w0, wzr, ls + strh w0, [x19, 8] + lsl w0, w24, 7 + bl FlashBootVendorWrite + mov w0, 0 +.L4462: + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 112 + ret +.L4468: + add w20, w20, 1 + stp w3, w6, [x29, 96] + add x0, x19, w20, uxtw 3 + str x5, [x29, 104] + add x23, x23, 8 + ldrh w1, [x0, 16] + strh w1, [x23, -8] + ldrh w1, [x0, 20] + strh w1, [x23, -4] + strh w21, [x23, -6] + ldrh w27, [x0, 20] + ldrh w1, [x0, 18] + add x0, x5, w21, uxtw + add w27, w27, 63 + and w27, w27, -64 + add x1, x5, x1 + and x2, x27, 131008 + bl memcpy + add w21, w21, w27 + ldr x5, [x29, 104] + ldp w3, w6, [x29, 96] + b .L4467 +.L4466: + ldrh w0, [x21, 18] + uxtw x2, w26 + mov x1, x28 + add x0, x5, x0 + bl memcpy + strh w26, [x21, 20] + b .L4479 +.L4465: + add w20, w20, 1 + b .L4464 +.L4477: + mov w0, -1 + b .L4462 + .size rk_ftl_vendor_write, .-rk_ftl_vendor_write + .align 2 + .global rk_ftl_vendor_storage_ioctl + .type rk_ftl_vendor_storage_ioctl, %function +rk_ftl_vendor_storage_ioctl: + stp x29, x30, [sp, -48]! + mov w0, 9216 + add x29, sp, 0 + stp x19, x20, [sp, 16] + mov x20, x2 + str x21, [sp, 32] + mov w21, w1 + bl ftl_malloc + cbz x0, .L4488 + mov w1, 30209 + mov x19, x0 + movk w1, 0x4004, lsl 16 + cmp w21, w1 + beq .L4483 + add w1, w1, 1 + cmp w21, w1 + beq .L4484 +.L4494: + mov x20, -14 + b .L4482 +.L4483: + mov x2, 8 + mov x1, x20 + bl rk_copy_from_user + cbnz x0, .L4494 + ldr w1, [x19] + mov w0, 17745 + movk w0, 0x5652, lsl 16 + cmp w1, w0 + beq .L4486 +.L4487: + mov x20, -1 +.L4482: + mov x0, x19 + bl kfree +.L4480: + mov x0, x20 + ldr x21, [sp, 32] + ldp x19, x20, [sp, 16] + ldp x29, x30, [sp], 48 + ret +.L4486: + ldrh w2, [x19, 6] + add x1, x19, 8 + ldrh w0, [x19, 4] + bl rk_ftl_vendor_read + cmn w0, #1 + beq .L4487 + strh w0, [x19, 6] + and x0, x0, 65535 + add x2, x0, 8 + mov x1, x19 + mov x0, x20 + bl rk_copy_to_user + cbnz x0, .L4494 + mov x20, 0 + b .L4482 +.L4484: + mov x2, 8 + mov x1, x20 + bl rk_copy_from_user + cbnz x0, .L4494 + ldr w1, [x19] + mov w0, 17745 + movk w0, 0x5652, lsl 16 + cmp w1, w0 + bne .L4487 + ldrh w2, [x19, 6] + cmp w2, 4087 + bhi .L4487 + add w2, w2, 8 + mov x1, x20 + sxtw x2, w2 + mov x0, x19 + bl rk_copy_from_user + cbnz x0, .L4494 + ldrh w2, [x19, 6] + add x1, x19, 8 + ldrh w0, [x19, 4] + bl rk_ftl_vendor_write + sxtw x20, w0 + b .L4482 +.L4488: + mov x20, -1 + b .L4480 + .size rk_ftl_vendor_storage_ioctl, .-rk_ftl_vendor_storage_ioctl + .global SecureBootUnlockTryCount + .global SecureBootCheckOK + .global SecureBootEn + .global gpVendor1Info + .global gpVendor0Info + .global g_idb_buffer + .global gSnSectorData + .global gpDrmKeyInfo + .global gpBootConfig + .global ftl_dma32_buffer_size + .global ftl_dma32_buffer + .global gLoaderBootInfo + .global RK29_NANDC1_REG_BASE + .global RK29_NANDC_REG_BASE + .global gp_ftl_api + .global rk_zftl_enable + .global g_pm_spare + .global pm_first_write + .global pm_force_gc + .global pm_gc_enable + .global pm_last_load_ram_id + .global pm_last_update_ram_id + .global pm_ram_info + .global sblk_gc_write_completed_queue_head + .global sblk_read_completed_queue_head + .global sblk_write_completed_queue_head + .global sblk_queue_head + .global slc_cache_sblk + .global xlc_data_sblk + .global slc_data_sblk + .global free_mix_sblk + .global free_xlc_sblk + .global free_slc_sblk + .global gp_data_xlc_data_head + .global gp_data_slc_data_head + .global gp_data_slc_cache_head + .global gp_free_mix_head + .global gp_free_xlc_head + .global gp_free_slc_head + .global gp_sblk_list_tbl + .global zftl_print_list_count + .global ftl_ext_info_first_write + .global ftl_sys_info_first_write + .global ftl_low_format_cur_blk + .global ftl_power_lost_flag + .global ftl_vpn_update_count + .global ftl_sblk_update_list_offset + .global ftl_sblk_update_list + .global ftl_sblk_vpn_update_id + .global ftl_sblk_lpa_tbl + .global ftl_sblk_vpn + .global gp_ftl_ext_info + .global gp_ftl_info + .global gp_blk_info + .global ftl_tmp_buffer + .global ftl_ext_info_data_buffer + .global ftl_info_data_buffer + .global ftl_tmp_spare + .global ftl_info_spare + .global g_ftl_info_blk + .global tlc_b05a_prog_tbl + .global tlc_prog_order + .global gc_des_ppa_tbl + .global gc_valid_page_ppa + .global gc_page_buf_id + .global gc_pre_ppa_tbl + .global gc_lpa_tbl + .global g_gc_info + .global gc_xlc_search_index + .global gc_xlc_data_index + .global gc_slc_cache_index + .global gc_slc_data_index + .global gc_free_slc_sblk_th + .global gc_slc_mode_vpn_th + .global gc_slc_mode_slc_vpn_th + .global gc_slc_mode_tlc_vpn_th + .global gc_tlc_mode_tlc_vpn_th + .global gc_tlc_mode_slc_vpn_th + .global gc_state + .global gc_mode + .global p_read_ahead_ext_buf + .global discard_sector_count + .global read_ahead_lpa + .global _ftl_gc_tag_page_num + .global read_buf_count + .global read_buf_head + .global write_commit_count + .global write_commit_head + .global write_buf_count + .global write_buf_head + .global ftl_flush_jiffies + .global lpa_hash + .global lpa_hash_index + .global _c_slc_to_xlc_ec_ratio + .global _c_mix_max_xlc_ec_count + .global _c_mix_max_slc_ec_count + .global _c_swl_xlc_gc_th + .global _c_swl_slc_gc_th + .global _gc_after_discard_en + .global _last_write_time + .global _last_read_time + .global _min_slc_super_block + .global _max_xlc_super_block + .global _c_max_pm_sblk + .global _c_ftl_pm_page_num + .global _c_totle_log_page + .global _c_totle_data_density + .global _c_user_data_density + .global _c_totle_phy_density + .global _c_ftl_block_addr_log2 + .global _c_ftl_block_align_addr + .global _c_ftl_byte_pre_page + .global _c_ftl_nand_blks_per_die + .global _c_ftl_page_pre_slc_blk + .global _c_ftl_page_pre_blk + .global _c_ftl_blk_pre_plane + .global _c_ftl_nand_planes_num + .global _c_ftl_planes_per_die + .global _c_ftl_sec_per_page + .global _c_ftl_nand_die_num + .global _c_ftl_nand_type + .global zftl_debug + .global g_flash_blk_info + .global gp_flash_info + .global p_free_buf_head + .global free_buf_count + .global g_buf + .global nandc_ecc_sts + .global g_nandc_v6_master_info + .global nandc_randomizer_en + .global nandc_hw_seed + .global fill_spare_size + .global g_nandc_ecc_bits + .global g_nandc_tran_timeout + .global g_nandc_ver + .global gp_nandc + .global hy_f26_ref_value + .global sd15_tlc_rr + .global sd15_slc_rr + .global g_nand_para_info + .global gp_nand_para_info + .global g_nand_opt_para + .global g_msb_page_tbl + .global g_lsb_page_tbl + .global g_die_addr + .global g_die_cs_idx + .global IDByte + .global flash_read_retry + .global _c_ftl_cs_bits + .global g_maxRetryCount + .global g_maxRegNum + .global g_retryMode + .global g_flash_toggle_mode_en + .global g_flash_ymtc_3d_tlc_flag + .global g_flash_micron_3d_tlc_b16a + .global g_flash_micron_3d_tlc_b05a + .global g_flash_micron_3d_tlc_flag + .global g_flash_3d_mlc_flag + .global g_flash_3d_tlc_flag + .global g_flash_multi_page_prog_en + .global g_flash_multi_page_read_en + .global g_flash_interface_mode + .global g_idb_ecc_bits + .global g_idb_slc_mode_enable + .global g_one_pass_program + .global g_slc_mode_addr2 + .global g_slc_mode_enable + .global g_flash_cur_mode + .global g_flash_six_addr + .global g_flash_slc_mode + .global g_slc_page_num + .global g_totle_phy_block + .global g_block_align_addr + .global g_flash_reversd_blks + .global g_nand_max_die + .global g_flash_tmp_spare_buffer + .global g_flash_tmp_page_buffer + .global g_flash_sys_spare_buffer + .global g_flash_spare_buffer + .global g_flash_page_buffer + .data + .align 3 + .set .LANCHOR2,. + 0 + .type zftl_debug, %object + .size zftl_debug, 4 +zftl_debug: + .word 17476 + .zero 4 + .type g_nand_para_info, %object + .size g_nand_para_info, 32 +g_nand_para_info: + .byte 6 + .byte -104 + .byte 58 + .byte -104 + .byte -77 + .byte 118 + .byte 114 + .byte 1 + .byte 1 + .byte 32 + .hword 768 + .byte 3 + .byte 2 + .hword 758 + .hword 5593 + .byte 0 + .byte 37 + .byte 60 + .byte 32 + .byte 2 + .byte 1 + .byte 4 + .byte 0 + .hword 256 + .byte 1 + .byte -94 + .byte 0 + .byte 0 + .type sd15_tlc_rr, %object + .size sd15_tlc_rr, 329 +sd15_tlc_rr: + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte -8 + .byte 0 + .byte 16 + .byte 8 + .byte 8 + .byte 0 + .byte -8 + .byte -8 + .byte -8 + .byte -16 + .byte -8 + .byte -8 + .byte -8 + .byte -8 + .byte -24 + .byte 0 + .byte 0 + .byte 0 + .byte -8 + .byte -16 + .byte -32 + .byte 0 + .byte 8 + .byte -8 + .byte 8 + .byte 8 + .byte 0 + .byte 0 + .byte -16 + .byte -8 + .byte -8 + .byte -8 + .byte 0 + .byte -16 + .byte -24 + .byte -16 + .byte 8 + .byte 8 + .byte -8 + .byte -16 + .byte -16 + .byte 0 + .byte 8 + .byte 8 + .byte 8 + .byte 8 + .byte -8 + .byte -8 + .byte -24 + .byte 0 + .byte -16 + .byte 0 + .byte -8 + .byte -16 + .byte -8 + .byte -8 + .byte 0 + .byte 8 + .byte 0 + .byte 0 + .byte -8 + .byte 0 + .byte -24 + .byte -8 + .byte 0 + .byte 0 + .byte -8 + .byte -24 + .byte -8 + .byte 8 + .byte -8 + .byte 0 + .byte -8 + .byte 8 + .byte -16 + .byte -8 + .byte -8 + .byte -8 + .byte 8 + .byte 8 + .byte 0 + .byte 0 + .byte -8 + .byte -8 + .byte 8 + .byte -8 + .byte -8 + .byte 0 + .byte 0 + .byte -8 + .byte -16 + .byte -16 + .byte -8 + .byte 0 + .byte 0 + .byte -8 + .byte 0 + .byte -16 + .byte 8 + .byte 0 + .byte 8 + .byte 0 + .byte -16 + .byte -8 + .byte -16 + .byte 16 + .byte 0 + .byte 16 + .byte 0 + .byte -8 + .byte 8 + .byte 0 + .byte -24 + .byte 0 + .byte -16 + .byte -8 + .byte -16 + .byte -16 + .byte -16 + .byte -16 + .byte 0 + .byte 8 + .byte -8 + .byte -24 + .byte 0 + .byte 8 + .byte 8 + .byte 16 + .byte 16 + .byte 0 + .byte 8 + .byte -8 + .byte 8 + .byte 16 + .byte -8 + .byte 24 + .byte 0 + .byte 8 + .byte -4 + .byte 0 + .byte 16 + .byte 8 + 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.byte 0 + .byte 8 + .byte -8 + .byte 16 + .byte -16 + .byte 24 + .byte -24 + .byte 32 + .byte -32 + .byte 32 + .byte -40 + .byte 48 + .byte -48 + .byte 56 + .byte -56 + .byte 64 + .byte -64 + .byte 72 + .byte -72 + .byte 80 + .byte -80 + .byte 88 + .byte 96 + .byte 104 + .byte 112 + .zero 7 + .type hy_f26_ref_value, %object + .size hy_f26_ref_value, 28 +hy_f26_ref_value: + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 6 + .byte 10 + .byte 6 + .byte 0 + .byte -3 + .byte -7 + .byte -8 + .byte 0 + .byte -6 + .byte -13 + .byte -15 + .byte 0 + .byte -11 + .byte -20 + .byte -23 + .byte 0 + .byte 0 + .byte -26 + .byte -30 + .byte 0 + .byte 0 + .byte -32 + .byte -37 + .zero 4 + .type zftl_nand_flash_para_tbl, %object + .size zftl_nand_flash_para_tbl, 1568 +zftl_nand_flash_para_tbl: + .byte 6 + .byte -104 + .byte 58 + .byte -104 + .byte -77 + .byte 118 + .byte 114 + .byte 1 + .byte 1 + .byte 32 + .hword 768 + .byte 3 + .byte 2 + .hword 758 + .hword 5593 + .byte 0 + .byte 37 + .byte 60 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256 + .byte 1 + .byte -94 + .byte 0 + .byte 0 + .byte 6 + .byte -104 + .byte -34 + .byte -124 + .byte -109 + .byte 114 + .byte 87 + .byte 1 + .byte 1 + .byte 32 + .hword 256 + .byte 2 + .byte 1 + .hword 2092 + .hword 17857 + .byte 2 + .byte 33 + .byte 40 + .byte 32 + .byte 3 + .byte 1 + .byte 1 + .byte 0 + .hword 256 + .byte 1 + .byte -94 + .byte 0 + .byte 0 + .byte 6 + .byte -104 + .byte 58 + .byte -108 + .byte -109 + .byte 118 + .byte 81 + .byte 1 + .byte 1 + .byte 32 + .hword 256 + .byte 2 + .byte 2 + .hword 2106 + .hword 17881 + .byte 2 + .byte 35 + .byte 40 + .byte 32 + .byte 3 + .byte 1 + .byte 4 + .byte 0 + .hword 256 + .byte 1 + .byte -94 + .byte 0 + .byte 0 + .byte 6 + .byte -104 + .byte -41 + .byte -124 + .byte -109 + .byte 114 + .byte 81 + .byte 1 + .byte 1 + .byte 32 + .hword 256 + .byte 2 + .byte 1 + .hword 1056 + .hword 17857 + .byte 2 + .byte 35 + .byte 40 + .byte 32 + .byte 3 + .byte 1 + .byte 4 + .byte 0 + .hword 256 + .byte 1 + .byte -94 + .byte 0 + .byte 0 + .byte 6 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+ .hword 523 + .hword 545 + .hword 538 + .hword 531 + .hword 553 + .hword 546 + .hword 539 + .hword 561 + .hword 554 + .hword 547 + .hword 569 + .hword 562 + .hword 555 + .hword 577 + .hword 570 + .hword 563 + .hword 585 + .hword 578 + .hword 571 + .hword 593 + .hword 586 + .hword 579 + .hword 601 + .hword 594 + .hword 587 + .hword 609 + .hword 602 + .hword 595 + .hword 617 + .hword 610 + .hword 603 + .hword 625 + .hword 618 + .hword 611 + .hword 633 + .hword 626 + .hword 619 + .hword 641 + .hword 634 + .hword 627 + .hword 649 + .hword 642 + .hword 635 + .hword 657 + .hword 650 + .hword 643 + .hword 665 + .hword 658 + .hword 651 + .hword 673 + .hword 666 + .hword 659 + .hword 681 + .hword 674 + .hword 667 + .hword 689 + .hword 682 + .hword 675 + .hword 697 + .hword 690 + .hword 683 + .hword 705 + .hword 698 + .hword 691 + .hword 713 + .hword 706 + .hword 699 + .hword 721 + .hword 714 + .hword 707 + .hword 729 + .hword 722 + .hword 715 + .hword 737 + .hword 730 + .hword 723 + .hword 745 + .hword 738 + .hword 731 + .hword 753 + .hword 746 + .hword 739 + .hword 761 + .hword 754 + .hword 747 + .hword 769 + .hword 762 + .hword 755 + .hword 777 + .hword 770 + .hword 763 + .hword 785 + .hword 778 + .hword 771 + .hword 793 + .hword 786 + .hword 779 + .hword 801 + .hword 794 + .hword 787 + .hword 809 + .hword 802 + .hword 795 + .hword 817 + .hword 810 + .hword 803 + .hword 825 + .hword 818 + .hword 811 + .hword 833 + .hword 826 + .hword 819 + .hword 841 + .hword 834 + .hword 827 + .hword 849 + .hword 842 + .hword 835 + .hword 857 + .hword 850 + .hword 843 + .hword 865 + .hword 858 + .hword 851 + .hword 873 + .hword 866 + .hword 859 + .hword 881 + .hword 874 + .hword 867 + .hword 889 + .hword 882 + .hword 875 + .hword 897 + .hword 890 + .hword 883 + .hword 905 + .hword 898 + .hword 891 + .hword 913 + .hword 906 + .hword 899 + .hword 921 + .hword 914 + .hword 907 + .hword 929 + .hword 922 + .hword 915 + .hword 937 + .hword 930 + .hword 923 + .hword 945 + .hword 938 + .hword 931 + .hword 953 + .hword 946 + .hword 939 + .hword 961 + .hword 954 + .hword 947 + .hword 969 + .hword 962 + .hword 955 + .hword 977 + .hword 970 + .hword 963 + .hword 985 + .hword 978 + .hword 971 + .hword 993 + .hword 986 + .hword 979 + .hword 1001 + .hword 994 + .hword 987 + .hword 1009 + .hword 1002 + .hword 995 + .hword 1017 + .hword 1010 + .hword 1003 + .hword 1018 + .hword 1011 + .hword 1019 + .bss + .align 6 + .set .LANCHOR0,. + 0 + .set .LANCHOR3,. + 4352 + .set .LANCHOR5,. + 8704 + .type g_flash_slc_mode, %object + .size g_flash_slc_mode, 1 +g_flash_slc_mode: + .zero 1 + .type g_slc_mode_addr2, %object + .size g_slc_mode_addr2, 1 +g_slc_mode_addr2: + .zero 1 + .type g_block_align_addr, %object + .size g_block_align_addr, 2 +g_block_align_addr: + .zero 2 + .type g_lsb_page_tbl, %object + .size g_lsb_page_tbl, 1024 +g_lsb_page_tbl: + .zero 1024 + .type g_nandc_ver, %object + .size g_nandc_ver, 1 +g_nandc_ver: + .zero 1 + .zero 3 + .type _c_user_data_density, %object + .size _c_user_data_density, 4 +_c_user_data_density: + .zero 4 + .zero 4 + .type gp_sblk_list_tbl, %object + .size gp_sblk_list_tbl, 8 +gp_sblk_list_tbl: + .zero 8 + .type gp_flash_info, %object + .size gp_flash_info, 8 +gp_flash_info: + .zero 8 + .type gp_nandc, %object + .size gp_nandc, 8 +gp_nandc: + .zero 8 + .type NANDC_FMCTL, %object + .size NANDC_FMCTL, 4 +NANDC_FMCTL: + .zero 4 + .type NANDC_FMWAIT, %object + .size NANDC_FMWAIT, 4 +NANDC_FMWAIT: + .zero 4 + .type NANDC_FLCTL, %object + .size NANDC_FLCTL, 4 +NANDC_FLCTL: + .zero 4 + .type NANDC_BCHCTL, %object + .size NANDC_BCHCTL, 4 +NANDC_BCHCTL: + .zero 4 + .type NANDC_DLL_CTL_REG0, %object + .size NANDC_DLL_CTL_REG0, 4 +NANDC_DLL_CTL_REG0: + .zero 4 + .type NANDC_DLL_CTL_REG1, %object + .size NANDC_DLL_CTL_REG1, 4 +NANDC_DLL_CTL_REG1: + .zero 4 + .type NANDC_RANDMZ_CFG, %object + .size NANDC_RANDMZ_CFG, 4 +NANDC_RANDMZ_CFG: + .zero 4 + .type NANDC_FMWAIT_SYN, %object + .size NANDC_FMWAIT_SYN, 4 +NANDC_FMWAIT_SYN: + .zero 4 + .type _c_ftl_blk_pre_plane, %object + .size _c_ftl_blk_pre_plane, 2 +_c_ftl_blk_pre_plane: + .zero 2 + .zero 6 + .type gp_blk_info, %object + .size gp_blk_info, 8 +gp_blk_info: + .zero 8 + .type _c_slc_to_xlc_ec_ratio, %object + .size _c_slc_to_xlc_ec_ratio, 2 +_c_slc_to_xlc_ec_ratio: + .zero 2 + .zero 6 + .type ftl_sblk_vpn, %object + .size ftl_sblk_vpn, 8 +ftl_sblk_vpn: + .zero 8 + .type gp_ftl_ext_info, %object + .size gp_ftl_ext_info, 8 +gp_ftl_ext_info: + .zero 8 + .type g_retryMode, %object + .size g_retryMode, 1 +g_retryMode: + .zero 1 + .type g_maxRegNum, %object + .size g_maxRegNum, 1 +g_maxRegNum: + .zero 1 + .zero 6 + .type gp_nand_para_info, %object + .size gp_nand_para_info, 8 +gp_nand_para_info: + .zero 8 + .type g_idb_ecc_bits, %object + .size g_idb_ecc_bits, 1 +g_idb_ecc_bits: + .zero 1 + .type g_nand_max_die, %object + .size g_nand_max_die, 1 +g_nand_max_die: + .zero 1 + .type g_idb_slc_mode_enable, %object + .size g_idb_slc_mode_enable, 1 +g_idb_slc_mode_enable: + .zero 1 + .zero 5 + .type g_nand_opt_para, %object + .size g_nand_opt_para, 32 +g_nand_opt_para: + .zero 32 + .type g_flash_toggle_mode_en, %object + .size g_flash_toggle_mode_en, 1 +g_flash_toggle_mode_en: + .zero 1 + .zero 3 + .type g_die_cs_idx, %object + .size g_die_cs_idx, 8 +g_die_cs_idx: + .zero 8 + .type g_flash_six_addr, %object + .size g_flash_six_addr, 1 +g_flash_six_addr: + .zero 1 + .type _c_ftl_cs_bits, %object + .size _c_ftl_cs_bits, 1 +_c_ftl_cs_bits: + .zero 1 + .zero 2 + .type g_flash_cur_mode, %object + .size g_flash_cur_mode, 4 +g_flash_cur_mode: + .zero 4 + .type g_flash_micron_3d_tlc_flag, %object + .size g_flash_micron_3d_tlc_flag, 1 +g_flash_micron_3d_tlc_flag: + .zero 1 + .type g_flash_ymtc_3d_tlc_flag, %object + .size g_flash_ymtc_3d_tlc_flag, 1 +g_flash_ymtc_3d_tlc_flag: + .zero 1 + .zero 2 + .type IDByte, %object + .size IDByte, 32 +IDByte: + .zero 32 + .type g_flash_interface_mode, %object + .size g_flash_interface_mode, 1 +g_flash_interface_mode: + .zero 1 + .type g_nandc_ecc_bits, %object + .size g_nandc_ecc_bits, 1 +g_nandc_ecc_bits: + .zero 1 + .type g_flash_multi_page_prog_en, %object + .size g_flash_multi_page_prog_en, 1 +g_flash_multi_page_prog_en: + .zero 1 + .type nandc_hw_seed, %object + .size nandc_hw_seed, 1 +nandc_hw_seed: + .zero 1 + .type nandc_randomizer_en, %object + .size nandc_randomizer_en, 1 +nandc_randomizer_en: + .zero 1 + .zero 3 + .type g_nandc_v6_master_info, %object + .size g_nandc_v6_master_info, 40 +g_nandc_v6_master_info: + .zero 40 + .type fill_spare_size, %object + .size fill_spare_size, 2 +fill_spare_size: + .zero 2 + .zero 6 + .type g_buf, %object + .size g_buf, 2048 +g_buf: + .zero 2048 + .type p_free_buf_head, %object + .size p_free_buf_head, 1 +p_free_buf_head: + .zero 1 + .type free_buf_count, %object + .size free_buf_count, 1 +free_buf_count: + .zero 1 + .type sblk_queue_head, %object + .size sblk_queue_head, 1 +sblk_queue_head: + .zero 1 + .type sblk_read_completed_queue_head, %object + .size sblk_read_completed_queue_head, 1 +sblk_read_completed_queue_head: + .zero 1 + .type sblk_gc_write_completed_queue_head, %object + .size sblk_gc_write_completed_queue_head, 1 +sblk_gc_write_completed_queue_head: + .zero 1 + .type sblk_write_completed_queue_head, %object + .size sblk_write_completed_queue_head, 1 +sblk_write_completed_queue_head: + .zero 1 + .zero 2 + .type _c_totle_phy_density, %object + .size _c_totle_phy_density, 4 +_c_totle_phy_density: + .zero 4 + .type _c_totle_log_page, %object + .size _c_totle_log_page, 4 +_c_totle_log_page: + .zero 4 + .type free_slc_sblk, %object + .size free_slc_sblk, 2 +free_slc_sblk: + .zero 2 + .type free_xlc_sblk, %object + .size free_xlc_sblk, 2 +free_xlc_sblk: + .zero 2 + .type free_mix_sblk, %object + .size free_mix_sblk, 2 +free_mix_sblk: + .zero 2 + .type slc_data_sblk, %object + .size slc_data_sblk, 2 +slc_data_sblk: + .zero 2 + .type slc_cache_sblk, %object + .size slc_cache_sblk, 2 +slc_cache_sblk: + .zero 2 + .type xlc_data_sblk, %object + .size xlc_data_sblk, 2 +xlc_data_sblk: + .zero 2 + .type write_commit_count, %object + .size write_commit_count, 1 +write_commit_count: + .zero 1 + .type write_buf_count, %object + .size write_buf_count, 1 +write_buf_count: + .zero 1 + .zero 2 + .type gp_ftl_info, %object + .size gp_ftl_info, 8 +gp_ftl_info: + .zero 8 + .type gc_free_slc_sblk_th, %object + .size gc_free_slc_sblk_th, 2 +gc_free_slc_sblk_th: + .zero 2 + .zero 2 + .type _gc_after_discard_en, %object + .size _gc_after_discard_en, 4 +_gc_after_discard_en: + .zero 4 + .type gc_slc_mode_tlc_vpn_th, %object + .size gc_slc_mode_tlc_vpn_th, 2 +gc_slc_mode_tlc_vpn_th: + .zero 2 + .type gc_slc_mode_vpn_th, %object + .size gc_slc_mode_vpn_th, 2 +gc_slc_mode_vpn_th: + .zero 2 + .type gc_tlc_mode_slc_vpn_th, %object + .size gc_tlc_mode_slc_vpn_th, 2 +gc_tlc_mode_slc_vpn_th: + .zero 2 + .type gc_tlc_mode_tlc_vpn_th, %object + .size gc_tlc_mode_tlc_vpn_th, 2 +gc_tlc_mode_tlc_vpn_th: + .zero 2 + .type write_buf_head, %object + .size write_buf_head, 1 +write_buf_head: + .zero 1 + .zero 7 + .type g_gc_info, %object + .size g_gc_info, 2216 +g_gc_info: + .zero 2216 + .type ftl_sblk_vpn_update_id, %object + .size ftl_sblk_vpn_update_id, 2 +ftl_sblk_vpn_update_id: + .zero 2 + .zero 6 + .type ftl_sblk_update_list, %object + .size ftl_sblk_update_list, 16 +ftl_sblk_update_list: + .zero 16 + .type _c_ftl_block_addr_log2, %object + .size _c_ftl_block_addr_log2, 2 +_c_ftl_block_addr_log2: + .zero 2 + .type _c_ftl_planes_per_die, %object + .size _c_ftl_planes_per_die, 1 +_c_ftl_planes_per_die: + .zero 1 + .zero 5 + .type gc_valid_page_ppa, %object + .size gc_valid_page_ppa, 8 +gc_valid_page_ppa: + .zero 8 + .type _c_ftl_nand_type, %object + .size _c_ftl_nand_type, 1 +_c_ftl_nand_type: + .zero 1 + .type _c_ftl_nand_planes_num, %object + .size _c_ftl_nand_planes_num, 1 +_c_ftl_nand_planes_num: + .zero 1 + .type g_flash_3d_mlc_flag, %object + .size g_flash_3d_mlc_flag, 1 +g_flash_3d_mlc_flag: + .zero 1 + .type g_one_pass_program, %object + .size g_one_pass_program, 1 +g_one_pass_program: + .zero 1 + .zero 4 + .type gc_page_buf_id, %object + .size gc_page_buf_id, 8 +gc_page_buf_id: + .zero 8 + .type g_flash_3d_tlc_flag, %object + .size g_flash_3d_tlc_flag, 1 +g_flash_3d_tlc_flag: + .zero 1 + .type gc_mode, %object + .size gc_mode, 1 +gc_mode: + .zero 1 + .type _c_ftl_page_pre_blk, %object + .size _c_ftl_page_pre_blk, 2 +_c_ftl_page_pre_blk: + .zero 2 + .zero 4 + .type gp_data_slc_data_head, %object + .size gp_data_slc_data_head, 8 +gp_data_slc_data_head: + .zero 8 + .type gc_slc_data_index, %object + .size gc_slc_data_index, 2 +gc_slc_data_index: + .zero 2 + .type gc_slc_cache_index, %object + .size gc_slc_cache_index, 2 +gc_slc_cache_index: + .zero 2 + .type gc_xlc_data_index, %object + .size gc_xlc_data_index, 2 +gc_xlc_data_index: + .zero 2 + .zero 2 + .type gp_data_slc_cache_head, %object + .size gp_data_slc_cache_head, 8 +gp_data_slc_cache_head: + .zero 8 + .type gp_data_xlc_data_head, %object + .size gp_data_xlc_data_head, 8 +gp_data_xlc_data_head: + .zero 8 + .type _c_ftl_page_pre_slc_blk, %object + .size _c_ftl_page_pre_slc_blk, 2 +_c_ftl_page_pre_slc_blk: + .zero 2 + .type gc_xlc_search_index, %object + .size gc_xlc_search_index, 2 +gc_xlc_search_index: + .zero 2 + .type _min_slc_super_block, %object + .size _min_slc_super_block, 2 +_min_slc_super_block: + .zero 2 + .type _max_xlc_super_block, %object + .size _max_xlc_super_block, 2 +_max_xlc_super_block: + .zero 2 + .type gp_free_slc_head, %object + .size gp_free_slc_head, 8 +gp_free_slc_head: + .zero 8 + .type gp_free_xlc_head, %object + .size gp_free_xlc_head, 8 +gp_free_xlc_head: + .zero 8 + .type gp_free_mix_head, %object + .size gp_free_mix_head, 8 +gp_free_mix_head: + .zero 8 + .type zftl_print_list_count, %object + .size zftl_print_list_count, 2 +zftl_print_list_count: + .zero 2 + .type _c_ftl_block_align_addr, %object + .size _c_ftl_block_align_addr, 2 +_c_ftl_block_align_addr: + .zero 2 + .type _c_ftl_nand_die_num, %object + .size _c_ftl_nand_die_num, 1 +_c_ftl_nand_die_num: + .zero 1 + .zero 3 + .type lpa_hash, %object + .size lpa_hash, 512 +lpa_hash: + .zero 512 + .type ftl_sblk_lpa_tbl, %object + .size ftl_sblk_lpa_tbl, 8 +ftl_sblk_lpa_tbl: + .zero 8 + .type lpa_hash_index, %object + .size lpa_hash_index, 8 +lpa_hash_index: + .zero 8 + .type ftl_vpn_update_count, %object + .size ftl_vpn_update_count, 2 +ftl_vpn_update_count: + .zero 2 + .type _c_ftl_sec_per_page, %object + .size _c_ftl_sec_per_page, 1 +_c_ftl_sec_per_page: + .zero 1 + .zero 1 + .type ftl_sblk_update_list_offset, %object + .size ftl_sblk_update_list_offset, 2 +ftl_sblk_update_list_offset: + .zero 2 + .type g_flash_micron_3d_tlc_b05a, %object + .size g_flash_micron_3d_tlc_b05a, 1 +g_flash_micron_3d_tlc_b05a: + .zero 1 + .zero 1 + .type _c_mix_max_xlc_ec_count, %object + .size _c_mix_max_xlc_ec_count, 2 +_c_mix_max_xlc_ec_count: + .zero 2 + .type _c_mix_max_slc_ec_count, %object + .size _c_mix_max_slc_ec_count, 2 +_c_mix_max_slc_ec_count: + .zero 2 + .type read_buf_head, %object + .size read_buf_head, 1 +read_buf_head: + .zero 1 + .type read_buf_count, %object + .size read_buf_count, 1 +read_buf_count: + .zero 1 + .zero 2 + .type pm_ram_info, %object + .size pm_ram_info, 512 +pm_ram_info: + .zero 512 + .type pm_last_update_ram_id, %object + .size pm_last_update_ram_id, 1 +pm_last_update_ram_id: + .zero 1 + .zero 3 + .type g_msb_page_tbl, %object + .size g_msb_page_tbl, 2048 +g_msb_page_tbl: + .zero 2048 + .type g_slc_page_num, %object + .size g_slc_page_num, 2 +g_slc_page_num: + .zero 2 + .zero 2 + .type g_die_addr, %object + .size g_die_addr, 32 +g_die_addr: + .zero 32 + .type g_totle_phy_block, %object + .size g_totle_phy_block, 2 +g_totle_phy_block: + .zero 2 + .zero 2 + .type pm_force_gc, %object + .size pm_force_gc, 4 +pm_force_gc: + .zero 4 + .type _c_swl_slc_gc_th, %object + .size _c_swl_slc_gc_th, 2 +_c_swl_slc_gc_th: + .zero 2 + .type _c_swl_xlc_gc_th, %object + .size _c_swl_xlc_gc_th, 2 +_c_swl_xlc_gc_th: + .zero 2 + .type _c_max_pm_sblk, %object + .size _c_max_pm_sblk, 2 +_c_max_pm_sblk: + .zero 2 + .zero 2 + .type power_on_init_jiffies, %object + .size power_on_init_jiffies, 8 +power_on_init_jiffies: + .zero 8 + .type gp_ftl_api, %object + .size gp_ftl_api, 8 +gp_ftl_api: + .zero 8 + .type RK29_NANDC_REG_BASE, %object + .size RK29_NANDC_REG_BASE, 8 +RK29_NANDC_REG_BASE: + .zero 8 + .type ftl_dma32_buffer_size, %object + .size ftl_dma32_buffer_size, 4 +ftl_dma32_buffer_size: + .zero 4 + .zero 4 + .type ftl_dma32_buffer, %object + .size ftl_dma32_buffer, 8 +ftl_dma32_buffer: + .zero 8 + .type gc_state, %object + .size gc_state, 1 +gc_state: + .zero 1 + .zero 3 + .type gc_search_count, %object + .size gc_search_count, 4 +gc_search_count: + .zero 4 + .type gc_slc_mode_slc_vpn_th, %object + .size gc_slc_mode_slc_vpn_th, 2 +gc_slc_mode_slc_vpn_th: + .zero 2 + .zero 6 + .type gc_lpa_tbl, %object + .size gc_lpa_tbl, 8 +gc_lpa_tbl: + .zero 8 + .type gc_pre_ppa_tbl, %object + .size gc_pre_ppa_tbl, 8 +gc_pre_ppa_tbl: + .zero 8 + .type gc_des_ppa_tbl, %object + .size gc_des_ppa_tbl, 8 +gc_des_ppa_tbl: + .zero 8 + .type g_flash_tmp_page_buffer, %object + .size g_flash_tmp_page_buffer, 8 +g_flash_tmp_page_buffer: + .zero 8 + .type g_nandc_tran_timeout, %object + .size g_nandc_tran_timeout, 1 +g_nandc_tran_timeout: + .zero 1 + .zero 7 + .type g_flash_tmp_spare_buffer, %object + .size g_flash_tmp_spare_buffer, 8 +g_flash_tmp_spare_buffer: + .zero 8 + .type g_maxRetryCount, %object + .size g_maxRetryCount, 1 +g_maxRetryCount: + .zero 1 + .zero 3 + .type flash_ddr_tuning_sdr_read_count, %object + .size flash_ddr_tuning_sdr_read_count, 4 +flash_ddr_tuning_sdr_read_count: + .zero 4 + .type flash_read_retry, %object + .size flash_read_retry, 8 +flash_read_retry: + .zero 8 + .type g_flash_spare_buffer, %object + .size g_flash_spare_buffer, 8 +g_flash_spare_buffer: + .zero 8 + .type g_flash_page_buffer, %object + .size g_flash_page_buffer, 8 +g_flash_page_buffer: + .zero 8 + .type write_commit_head, %object + .size write_commit_head, 1 +write_commit_head: + .zero 1 + .zero 3 + .type ftl_flush_jiffies, %object + .size ftl_flush_jiffies, 4 +ftl_flush_jiffies: + .zero 4 + .type g_flash_multi_page_read_en, %object + .size g_flash_multi_page_read_en, 1 +g_flash_multi_page_read_en: + .zero 1 + .zero 7 + .type ftl_info_spare, %object + .size ftl_info_spare, 8 +ftl_info_spare: + .zero 8 + .type g_ftl_info_blk, %object + .size g_ftl_info_blk, 4 +g_ftl_info_blk: + .zero 4 + .zero 4 + .type ftl_info_data_buffer, %object + .size ftl_info_data_buffer, 8 +ftl_info_data_buffer: + .zero 8 + .type ftl_sys_info_first_write, %object + .size ftl_sys_info_first_write, 1 +ftl_sys_info_first_write: + .zero 1 + .type ftl_power_lost_flag, %object + .size ftl_power_lost_flag, 1 +ftl_power_lost_flag: + .zero 1 + .type ftl_ext_info_first_write, %object + .size ftl_ext_info_first_write, 1 +ftl_ext_info_first_write: + .zero 1 + .zero 5 + .type ftl_ext_info_data_buffer, %object + .size ftl_ext_info_data_buffer, 8 +ftl_ext_info_data_buffer: + .zero 8 + .type ftl_tmp_spare, %object + .size ftl_tmp_spare, 8 +ftl_tmp_spare: + .zero 8 + .type pm_gc_enable, %object + .size pm_gc_enable, 4 +pm_gc_enable: + .zero 4 + .zero 4 + .type g_pm_spare, %object + .size g_pm_spare, 8 +g_pm_spare: + .zero 8 + .type pm_first_write, %object + .size pm_first_write, 1 +pm_first_write: + .zero 1 + .zero 7 + .type g_flash_sys_spare_buffer, %object + .size g_flash_sys_spare_buffer, 8 +g_flash_sys_spare_buffer: + .zero 8 + .type g_flash_blk_info, %object + .size g_flash_blk_info, 4 +g_flash_blk_info: + .zero 4 + .type g_flash_reversd_blks, %object + .size g_flash_reversd_blks, 1 +g_flash_reversd_blks: + .zero 1 + .type g_flash_micron_3d_tlc_b16a, %object + .size g_flash_micron_3d_tlc_b16a, 1 +g_flash_micron_3d_tlc_b16a: + .zero 1 + .type _c_ftl_byte_pre_page, %object + .size _c_ftl_byte_pre_page, 2 +_c_ftl_byte_pre_page: + .zero 2 + .type pm_last_load_ram_id, %object + .size pm_last_load_ram_id, 1 +pm_last_load_ram_id: + .zero 1 + .type _ftl_gc_tag_page_num, %object + .size _ftl_gc_tag_page_num, 1 +_ftl_gc_tag_page_num: + .zero 1 + .zero 2 + .type _last_read_time, %object + .size _last_read_time, 4 +_last_read_time: + .zero 4 + .type _last_write_time, %object + .size _last_write_time, 4 +_last_write_time: + .zero 4 + .type read_ahead_lpa, %object + .size read_ahead_lpa, 4 +read_ahead_lpa: + .zero 4 + .type _c_totle_data_density, %object + .size _c_totle_data_density, 4 +_c_totle_data_density: + .zero 4 + .type _c_ftl_pm_page_num, %object + .size _c_ftl_pm_page_num, 2 +_c_ftl_pm_page_num: + .zero 2 + .zero 2 + .type ftl_tmp_buffer, %object + .size ftl_tmp_buffer, 8 +ftl_tmp_buffer: + .zero 8 + .type rk_zftl_enable, %object + .size rk_zftl_enable, 1 +rk_zftl_enable: + .zero 1 + .zero 7 + .type gLoaderBootInfo, %object + .size gLoaderBootInfo, 8 +gLoaderBootInfo: + .zero 8 + .type RK29_NANDC1_REG_BASE, %object + .size RK29_NANDC1_REG_BASE, 8 +RK29_NANDC1_REG_BASE: + .zero 8 + .type discard_sector_count, %object + .size discard_sector_count, 4 +discard_sector_count: + .zero 4 + .type idb_write_enable, %object + .size idb_write_enable, 1 +idb_write_enable: + .zero 1 + .zero 3 + .type idb_buf, %object + .size idb_buf, 8 +idb_buf: + .zero 8 + .type idb_last_lba, %object + .size idb_last_lba, 4 +idb_last_lba: + .zero 4 + .zero 4 + .type g_idb_buffer, %object + .size g_idb_buffer, 8 +g_idb_buffer: + .zero 8 + .type g_vendor, %object + .size g_vendor, 8 +g_vendor: + .zero 8 + .type SecureBootUnlockTryCount, %object + .size SecureBootUnlockTryCount, 4 +SecureBootUnlockTryCount: + .zero 4 + .type SecureBootCheckOK, %object + .size SecureBootCheckOK, 4 +SecureBootCheckOK: + .zero 4 + .type SecureBootEn, %object + .size SecureBootEn, 4 +SecureBootEn: + .zero 4 + .zero 4 + .type gpVendor1Info, %object + .size gpVendor1Info, 8 +gpVendor1Info: + .zero 8 + .type gpVendor0Info, %object + .size gpVendor0Info, 8 +gpVendor0Info: + .zero 8 + .type gSnSectorData, %object + .size gSnSectorData, 512 +gSnSectorData: + .zero 512 + .type gpDrmKeyInfo, %object + .size gpDrmKeyInfo, 8 +gpDrmKeyInfo: + .zero 8 + .type gpBootConfig, %object + .size gpBootConfig, 8 +gpBootConfig: + .zero 8 + .type ftl_low_format_cur_blk, %object + .size ftl_low_format_cur_blk, 2 +ftl_low_format_cur_blk: + .zero 2 + .zero 6 + .type p_read_ahead_ext_buf, %object + .size p_read_ahead_ext_buf, 8 +p_read_ahead_ext_buf: + .zero 8 + .type _c_ftl_nand_blks_per_die, %object + .size _c_ftl_nand_blks_per_die, 2 +_c_ftl_nand_blks_per_die: + .zero 2 + .zero 6 + .type nandc_ecc_sts, %object + .size nandc_ecc_sts, 16 +nandc_ecc_sts: + .zero 16 + .type g_slc_mode_enable, %object + .size g_slc_mode_enable, 1 +g_slc_mode_enable: + .zero 1 + .section .rodata + .align 3 + .set .LANCHOR1,. + 0 + .type __func__.46344, %object + .size __func__.46344, 18 +__func__.46344: + .string "_list_remove_node" + .zero 6 + .type __func__.46369, %object + .size __func__.46369, 23 +__func__.46369: + .string "_list_update_data_list" + .zero 1 + .type toshiba_15ref_value, %object + .size toshiba_15ref_value, 95 +toshiba_15ref_value: + .byte 4 + .byte 5 + .byte 6 + .byte 7 + .byte 13 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 2 + .byte 4 + .byte 2 + .byte 0 + .byte 0 + .byte 8 + .byte 8 + .byte 0 + .byte 0 + .byte 0 + .byte 124 + .byte 0 + .byte 124 + .byte 124 + .byte 0 + .byte 122 + .byte 0 + .byte 122 + .byte 122 + .byte 0 + .byte 11 + .byte 126 + .byte 118 + .byte 116 + .byte 0 + .byte 120 + .byte 2 + .byte 120 + .byte 122 + .byte 0 + .byte 126 + .byte 4 + .byte 126 + .byte 122 + .byte 0 + .byte 16 + .byte 118 + .byte 114 + .byte 112 + .byte 0 + .byte 118 + .byte 4 + .byte 118 + .byte 120 + .byte 0 + .byte 4 + .byte 4 + .byte 4 + .byte 118 + .byte 0 + .byte 2 + .byte 0 + .byte 126 + .byte 124 + .byte 0 + .byte 6 + .byte 10 + .byte 6 + .byte 2 + .byte 0 + .byte 116 + .byte 124 + .byte 116 + .byte 118 + .byte 0 + .byte 4 + .byte 4 + .byte 124 + .byte 126 + .byte 0 + .byte 0 + .byte 124 + .byte 120 + .byte 120 + .byte 0 + .byte 124 + .byte 118 + .byte 116 + .byte 114 + .byte 0 + .zero 1 + .type toshiba_A19ref_value, %object + .size toshiba_A19ref_value, 45 +toshiba_A19ref_value: + .byte 4 + .byte 5 + .byte 6 + .byte 7 + .byte 13 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 4 + .byte 4 + .byte 124 + .byte 126 + .byte 0 + .byte 0 + .byte 124 + .byte 120 + .byte 120 + .byte 0 + .byte 124 + .byte 118 + .byte 116 + .byte 114 + .byte 0 + .byte 8 + .byte 8 + .byte 0 + .byte 0 + .byte 0 + .byte 11 + .byte 126 + .byte 118 + .byte 116 + .byte 0 + .byte 16 + .byte 118 + .byte 114 + .byte 112 + .byte 0 + .byte 2 + .byte 0 + .byte 126 + .byte 124 + .byte 0 + .zero 3 + .type toshiba_ref_value, %object + .size toshiba_ref_value, 8 +toshiba_ref_value: + .byte 0 + .byte 4 + .byte 124 + .byte 120 + .byte 116 + .byte 8 + .byte 12 + .byte 112 + .type __func__.26714, %object + .size __func__.26714, 22 +__func__.26714: + .string "nand_flash_print_info" + .zero 2 + .type __func__.26187, %object + .size __func__.26187, 28 +__func__.26187: + .string "flash_wait_device_ready_raw" + .zero 4 + .type __func__.26251, %object + .size __func__.26251, 22 +__func__.26251: + .string "flash_start_page_read" + .zero 2 + .type toshiba_3D_tlc_value, %object + .size toshiba_3D_tlc_value, 399 +toshiba_3D_tlc_value: + .byte -119 + .byte -119 + .byte -119 + .byte -119 + .byte -118 + .byte -118 + .byte -118 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 5 + .byte -2 + .byte -1 + .byte 0 + .byte -3 + .byte -2 + .byte 6 + .byte -9 + .byte -12 + .byte -9 + .byte -7 + .byte -13 + .byte -12 + .byte -7 + .byte -6 + .byte -15 + .byte -15 + .byte -2 + .byte -12 + .byte -16 + .byte -6 + .byte -2 + .byte -19 + .byte -19 + .byte -6 + .byte -4 + .byte -12 + .byte -14 + .byte -2 + .byte -11 + .byte -23 + .byte -34 + .byte -4 + .byte -20 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%object + .size toshiba_3D_slc_value, 11 +toshiba_3D_slc_value: + .byte -117 + .byte 0 + .byte -8 + .byte 8 + .byte -16 + .byte -24 + .byte 24 + .byte -40 + .byte 40 + .byte -56 + .byte 56 + .zero 5 + .type ymtc_3D_tlc_value, %object + .size ymtc_3D_tlc_value, 357 +ymtc_3D_tlc_value: + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte -10 + .byte -10 + .byte -6 + .byte -6 + .byte -2 + .byte 2 + .byte 2 + .byte -6 + .byte -6 + .byte -4 + .byte -4 + .byte -4 + .byte -6 + .byte -8 + .byte 6 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte -2 + .byte -2 + .byte -2 + .byte -4 + .byte -4 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -11 + .byte -2 + .byte 2 + .byte 4 + .byte 4 + .byte 6 + .byte 6 + .byte 6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -8 + .byte -14 + .byte -6 + .byte -15 + .byte -11 + .byte 2 + .byte -12 + .byte -8 + .byte -2 + .byte 2 + .byte -3 + .byte -7 + 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.byte 6 + .byte 8 + .byte 9 + .byte 9 + .byte 6 + .byte 8 + .byte 8 + .byte 6 + .byte 10 + .byte 13 + .byte 9 + .byte 6 + .byte 8 + .byte 12 + .byte 10 + .byte 2 + .byte 5 + .byte 1 + .byte -2 + .byte 0 + .byte 0 + .byte 6 + .byte 12 + .byte 1 + .byte 13 + .byte 2 + .byte 12 + .byte 12 + .byte 14 + .byte -12 + .byte -14 + .byte -20 + .byte -18 + .byte -16 + .byte -16 + .byte -14 + .byte -12 + .byte -10 + .byte -21 + .byte -14 + .byte -12 + .byte -12 + .byte -10 + .byte -12 + .byte -18 + .byte -22 + .byte -24 + .byte -18 + .byte -18 + .byte -18 + .byte -12 + .byte -14 + .byte -23 + .byte -20 + .byte -20 + .byte -20 + .byte -20 + .byte 16 + .byte 16 + .byte 8 + .byte 8 + .byte 12 + .byte 12 + .byte 12 + .byte 18 + .byte 18 + .byte 10 + .byte 8 + .byte 14 + .byte 14 + .byte 14 + .byte 16 + .byte 14 + .byte 6 + .byte 6 + .byte 12 + .byte 14 + .byte 8 + .byte 10 + .byte 13 + .byte 5 + .byte 2 + .byte 14 + .byte 8 + .byte 6 + .byte 6 + .byte 13 + .byte 9 + .byte 4 + .byte 14 + .byte 10 + .byte 10 + .byte 10 + .byte 13 + .byte 9 + .byte 6 + .byte 8 + .byte 12 + .byte 10 + .byte 2 + .byte 5 + .byte 1 + .byte -2 + .byte 0 + .byte 0 + .byte 6 + .byte 12 + .byte 1 + .byte 13 + .byte 2 + .byte 12 + .byte 12 + .byte 14 + .zero 3 + .type ymtc_3D_slc_value, %object + .size ymtc_3D_slc_value, 10 +ymtc_3D_slc_value: + .byte 0 + .byte -8 + .byte 8 + .byte -16 + .byte -20 + .byte 24 + .byte -26 + .byte 40 + .byte -12 + .byte 56 + .zero 6 + .type __func__.26276, %object + .size __func__.26276, 23 +__func__.26276: + .string "flash_start_plane_read" + .zero 1 + .type __func__.26162, %object + .size __func__.26162, 26 +__func__.26162: + .string "flash_erase_duplane_block" + .zero 6 + .type __func__.26173, %object + .size __func__.26173, 21 +__func__.26173: + .string "flash_erase_block_en" + .zero 3 + .type random_seed, %object + .size random_seed, 256 +random_seed: + .hword 22378 + .hword 1512 + .hword 25245 + .hword 17827 + .hword 25756 + .hword 19440 + .hword 9026 + .hword 10030 + .hword 29528 + .hword 20467 + .hword 29676 + .hword 24432 + .hword 31328 + .hword 6872 + .hword 13426 + .hword 13842 + .hword 8783 + .hword 1108 + .hword 782 + .hword 28837 + .hword 30729 + .hword 9505 + .hword 18676 + .hword 23085 + .hword 18730 + .hword 1085 + .hword 32609 + .hword 14697 + .hword 20858 + .hword 15170 + .hword 30365 + .hword 1607 + .hword 32298 + .hword 4995 + .hword 18905 + .hword 1976 + .hword 9592 + .hword 20204 + .hword 17443 + .hword 13615 + .hword 23330 + .hword 29369 + .hword 13947 + .hword 9398 + .hword 32398 + .hword 8984 + .hword 27600 + .hword 21785 + .hword 6019 + .hword 6311 + .hword 31598 + .hword 30210 + .hword 19327 + .hword 13896 + .hword 11347 + .hword 27545 + .hword 3107 + .hword 26575 + .hword 32270 + .hword 19852 + .hword 20601 + .hword 8349 + .hword 9290 + .hword 29819 + .hword 13579 + .hword 3661 + .hword 28676 + .hword 27331 + .hword 32574 + .hword 8693 + .hword 31253 + .hword 9081 + .hword 5399 + .hword 6842 + .hword 20087 + .hword 5537 + .hword 1274 + .hword 11617 + .hword 9530 + .hword 4866 + .hword 8035 + .hword 23219 + .hword 1178 + .hword 23272 + .hword 7383 + .hword 18944 + .hword 12488 + .hword 12871 + .hword 29340 + .hword 20532 + .hword 11022 + .hword 22514 + .hword 228 + .hword 22363 + .hword 24978 + .hword 14584 + .hword 12138 + .hword 3092 + .hword 17916 + .hword 16863 + .hword 14554 + .hword 31457 + .hword 29474 + .hword 25311 + .hword 24121 + .hword 3684 + .hword 28037 + .hword 22865 + .hword 22839 + .hword 25217 + .hword 13217 + .hword 27186 + .hword 14938 + .hword 11180 + .hword 29754 + .hword 24180 + .hword 15150 + .hword 32455 + .hword 20434 + .hword 23848 + .hword 29983 + .hword 16120 + .hword 14769 + .hword 20041 + .hword 29803 + .hword 28406 + .hword 17598 + .hword 28087 + .type __func__.26979, %object + .size __func__.26979, 13 +__func__.26979: + .string "buf_add_tail" + .zero 3 + .type __func__.26992, %object + .size __func__.26992, 10 +__func__.26992: + .string "buf_alloc" + .zero 6 + .type __func__.27006, %object + .size __func__.27006, 16 +__func__.27006: + .string "buf_remove_free" + .type zftl_debug_proc_fops, %object + .size zftl_debug_proc_fops, 96 +zftl_debug_proc_fops: + .zero 8 + .xword zftl_debug_proc_open + .xword seq_read + .zero 8 + .xword zftl_debug_proc_write + .xword seq_lseek + .xword single_release + .zero 40 + .type __func__.45877, %object + .size __func__.45877, 12 +__func__.45877: + .string "gc_add_sblk" + .zero 4 + .type __func__.45969, %object + .size __func__.45969, 19 +__func__.45969: + .string "gc_write_completed" + .zero 5 + .type __func__.46575, %object + .size __func__.46575, 18 +__func__.46575: + .string "ftl_alloc_sys_blk" + .zero 6 + .type __func__.46585, %object + .size __func__.46585, 17 +__func__.46585: + .string "ftl_free_sys_blk" + .zero 7 + .type __func__.46706, %object + .size __func__.46706, 23 +__func__.46706: + .string "ftl_get_ppa_from_index" + .zero 1 + .type __func__.46746, %object + .size __func__.46746, 22 +__func__.46746: + .string "ftl_get_new_free_page" + .zero 2 + .type __func__.46757, %object + .size __func__.46757, 22 +__func__.46757: + .string "ftl_ext_alloc_new_blk" + .zero 2 + .type __func__.46026, %object + .size __func__.46026, 16 +__func__.46026: + .string "gc_free_src_blk" + .type __func__.45620, %object + .size __func__.45620, 14 +__func__.45620: + .string "ftl_write_buf" + .zero 2 + .type __func__.45665, %object + .size __func__.45665, 18 +__func__.45665: + .string "zftl_add_read_buf" + .align 3 + .set .LANCHOR4,. + 0 + .type __func__.47179, %object + .size __func__.47179, 21 +__func__.47179: + .string "pm_select_ram_region" + .zero 3 + .type __func__.26704, %object + .size __func__.26704, 20 +__func__.26704: + .string "flash_die_info_init" + .zero 4 + .type __func__.45552, %object + .size __func__.45552, 17 +__func__.45552: + .string "lpa_rebuild_hash" + .zero 7 + .type __func__.46444, %object + .size __func__.46444, 20 +__func__.46444: + .string "zftl_sblk_list_init" + .zero 4 + .type __func__.47111, %object + .size __func__.47111, 13 +__func__.47111: + .string "pm_free_sblk" + .zero 3 + .type __func__.27042, %object + .size __func__.27042, 21 +__func__.27042: + .string "flash_info_data_init" + .zero 3 + .type __func__.26800, %object + .size __func__.26800, 11 +__func__.26800: + .string "nandc_init" + .zero 5 + .type samsung_14nm_slc_rr, %object + .size samsung_14nm_slc_rr, 26 +samsung_14nm_slc_rr: + .byte 0 + .byte 10 + .byte -10 + .byte 20 + .byte -20 + .byte 30 + .byte -30 + .byte 40 + .byte -40 + .byte 50 + .byte -50 + .byte 60 + .byte -60 + .byte -70 + .byte -80 + .byte -90 + .byte -100 + .byte -110 + .byte -120 + .byte -9 + .byte 70 + .byte 80 + .byte 90 + .byte -125 + .byte -115 + .byte 100 + .zero 6 + .type samsung_14nm_mlc_rr, %object + .size samsung_14nm_mlc_rr, 104 +samsung_14nm_mlc_rr: + .byte 0 + .byte 0 + .byte 0 + .byte 0 + .byte -4 + .byte 3 + .byte -4 + .byte -6 + .byte 6 + .byte 0 + .byte 6 + .byte -10 + .byte -10 + .byte 4 + .byte -10 + .byte 16 + .byte 12 + .byte -4 + .byte 12 + .byte 8 + .byte -16 + .byte 10 + .byte -16 + .byte 24 + .byte 18 + .byte -14 + .byte 18 + .byte -4 + .byte -22 + .byte -16 + .byte -22 + .byte -8 + .byte 24 + .byte -9 + .byte 24 + .byte 8 + .byte -28 + .byte -4 + .byte -28 + .byte 16 + .byte 30 + .byte 10 + .byte 30 + .byte 10 + .byte -34 + .byte 6 + .byte -34 + .byte 0 + .byte 36 + .byte -8 + .byte 36 + .byte -8 + .byte -40 + .byte -2 + .byte -40 + .byte -20 + .byte -46 + .byte -4 + .byte -46 + .byte -30 + .byte 3 + .byte 0 + .byte 3 + .byte -3 + .byte -2 + .byte -4 + .byte -2 + .byte -6 + .byte -4 + .byte -4 + .byte -4 + .byte -10 + .byte -6 + .byte -8 + .byte -6 + .byte -14 + .byte -9 + .byte -8 + .byte -9 + .byte -18 + .byte -52 + .byte 22 + .byte -52 + .byte 10 + .byte 42 + .byte 4 + .byte 42 + .byte 4 + .byte 48 + .byte -9 + .byte 48 + .byte 4 + .byte -58 + .byte 12 + .byte -58 + .byte 0 + .byte -64 + .byte -24 + .byte -64 + .byte -6 + .byte 9 + .byte 18 + .byte 9 + .byte 8 + .type __func__.26085, %object + .size __func__.26085, 19 +__func__.26085: + .string "flash_read_page_en" + .zero 5 + .type __func__.26211, %object + .size __func__.26211, 26 +__func__.26211: + .string "flash_start_tlc_page_prog" + .zero 6 + .type __func__.26222, %object + .size __func__.26222, 29 +__func__.26222: + .string "flash_start_3d_mlc_page_prog" + .zero 3 + .type __func__.26240, %object + .size __func__.26240, 22 +__func__.26240: + .string "flash_start_page_prog" + .zero 2 + .type __func__.26264, %object + .size __func__.26264, 31 +__func__.26264: + .string "flash_complete_plane_page_read" + .zero 1 + .type __func__.26289, %object + .size __func__.26289, 25 +__func__.26289: + .string "flash_complete_page_read" + .zero 7 + .type __func__.46944, %object + .size __func__.46944, 31 +__func__.46944: + .string "queue_wait_first_req_completed" + .zero 1 + .type __func__.46998, %object + .size __func__.46998, 15 +__func__.46998: + .string "sblk_prog_page" + .zero 1 + .type __func__.47025, %object + .size __func__.47025, 15 +__func__.47025: + .string "sblk_read_page" + .zero 1 + .type __func__.45924, %object + .size __func__.45924, 21 +__func__.45924: + .string "gc_check_data_one_wl" + .zero 3 + .type __func__.26146, %object + .size __func__.26146, 19 +__func__.26146: + .string "flash_prog_page_en" + .zero 5 + .type __func__.46821, %object + .size __func__.46821, 14 +__func__.46821: + .string "ftl_prog_page" + .zero 2 + .type __func__.46478, %object + .size __func__.46478, 15 +__func__.46478: + .string "ftl_info_flush" + .zero 1 + .type __func__.46783, %object + .size __func__.46783, 19 +__func__.46783: + .string "ftl_ext_info_flush" + .zero 5 + .type __func__.46795, %object + .size __func__.46795, 18 +__func__.46795: + .string "ftl_ext_info_init" + .zero 6 + .type __func__.46533, %object + .size __func__.46533, 15 +__func__.46533: + .string "ftl_alloc_sblk" + .zero 1 + .type __func__.47151, %object + .size __func__.47151, 17 +__func__.47151: + .string "pm_alloc_new_blk" + .zero 7 + .type __func__.47161, %object + .size __func__.47161, 14 +__func__.47161: + .string "pm_write_page" + .zero 2 + .type __func__.27064, %object + .size __func__.27064, 17 +__func__.27064: + .string "flash_info_flush" + .zero 7 + .type __func__.27027, %object + .size __func__.27027, 20 +__func__.27027: + .string "flash_info_blk_init" + .zero 4 + .type __func__.26759, %object + .size __func__.26759, 16 +__func__.26759: + .string "nand_flash_init" + .type __func__.46648, %object + .size __func__.46648, 16 +__func__.46648: + .string "ftl_sysblk_dump" + .type __func__.46673, %object + .size __func__.46673, 23 +__func__.46673: + .string "ftl_open_sblk_recovery" + .zero 1 + .type __func__.47095, %object + .size __func__.47095, 16 +__func__.47095: + .string "load_l2p_region" + .type __func__.47135, %object + .size __func__.47135, 6 +__func__.47135: + .string "pm_gc" + .zero 2 + .type __func__.45867, %object + .size __func__.45867, 12 +__func__.45867: + .string "gc_recovery" + .zero 4 + .type __func__.45956, %object + .size __func__.45956, 22 +__func__.45956: + .string "gc_update_l2p_map_new" + .zero 2 + .type __func__.46070, %object + .size __func__.46070, 16 +__func__.46070: + .string "gc_scan_src_blk" + .type __func__.46131, %object + .size __func__.46131, 20 +__func__.46131: + .string "gc_scan_static_data" + .zero 4 + .type __func__.46194, %object + .size __func__.46194, 18 +__func__.46194: + .string "gc_block_vpn_scan" + .zero 6 + .type __func__.46624, %object + .size __func__.46624, 14 +__func__.46624: + .string "ftl_sblk_dump" + .zero 2 + .type __func__.45698, %object + .size __func__.45698, 10 +__func__.45698: + .string "zftl_read" + .zero 6 + .type __func__.46727, %object + .size __func__.46727, 19 +__func__.46727: + .string "ftl_update_l2p_map" + .zero 5 + .type __func__.45602, %object + .size __func__.45602, 17 +__func__.45602: + .string "ftl_write_commit" + .zero 7 + .type __func__.45999, %object + .size __func__.45999, 16 +__func__.45999: + .string "gc_do_copy_back" + .type __func__.46249, %object + .size __func__.46249, 11 +__func__.46249: + .string "zftl_do_gc" + .zero 5 + .type __func__.45730, %object + .size __func__.45730, 13 +__func__.45730: + .string "_ftl_discard" + .section .rodata.str1.1,"aMS",@progbits,1 +.LC0: + .string "\n!!!!! error @ func:%s - line:%d\n" +.LC1: + .string "FTL version: 6.0.24 20210716" +.LC2: + .string "%s\n" +.LC3: + .string "zftl_debug:0x%x\n" +.LC4: + .string "...%s enter...\n" +.LC5: + .string "No.0 FLASH ID: %x %x %x %x %x %x\n" +.LC6: + .string "DiePerChip: %x\n" +.LC7: + .string "SectPerPage: %x\n" +.LC8: + .string "PagePerBlk: %x\n" +.LC9: + .string "Cell: %x\n" +.LC10: + .string "PlanePerDie: %x\n" +.LC11: + .string "BlkPerPlane: %x\n" +.LC12: + .string "die gap: %x\n" +.LC13: + .string "lsbMode: %x\n" +.LC14: + .string "ReadRetryMode: %x\n" +.LC15: + .string "ecc: %x\n" +.LC16: + .string "idb ecc: %x\n" +.LC17: + .string "OptMode: %x\n" +.LC18: + .string "g_nand_max_die: %x\n" +.LC19: + .string "Cache read enable: %x\n" +.LC20: + .string "Cache random read enable: %x\n" +.LC21: + .string "Cache prog enable: %x\n" +.LC22: + .string "multi read enable: %x\n" +.LC23: + .string "multi prog enable: %x\n" +.LC24: + .string "interleave enable: %x\n" +.LC25: + .string "read retry enable: %x\n" +.LC26: + .string "randomizer enable: %x\n" +.LC27: + .string "SDR enable: %x\n" +.LC28: + .string "ONFI enable: %x\n" +.LC29: + .string "TOGGLE enable: %x\n" +.LC30: + .string "g_flash_slc_mode: %x %x\n" +.LC31: + .string "MultiPlaneProgCmd: %x %x\n" +.LC32: + .string "MultiPlaneReadCmd: %x %x\n" +.LC33: + .string "g_flash_toggle_mode_en: %x\n" +.LC34: + .string "nand sdr mode %x\n" +.LC35: + .string "nand ddr mode %x\n" +.LC36: + .string "No.%d FLASH ID:%x %x %x %x %x %x\n" +.LC37: + .string "otp:%x %x %x %x\n" +.LC38: + .string "bad block test:%x %x\n" +.LC39: + .string "flash_erase_duplane_block %x %x %x\n" +.LC40: + .string "flash_erase_duplane_block pageadd = %x status = %x\n" +.LC41: + .string "flash_erase_block %x %x %x\n" +.LC42: + .string "flash_erase_block %d block = %x status = %x\n" +.LC43: + .string "erase done: %x\n" +.LC44: + .string "sblk_queue_head = %d\n" +.LC45: + .string "sblk_read_completed_queue_head = %d\n" +.LC46: + .string "sblk_gc_write_completed_queue_head = %d\n" +.LC47: + .string "sblk_write_completed_queue_head = %d\n" +.LC48: + .string "p_free_buf_head = %d\n" +.LC49: + .string "free_buf_count = %d\n" +.LC50: + .string "buf = %d, next=%d, flag=%d gc_write_flag=%d, lun_state=%d, op_status = %d lpa=%x, ppa=%x\n" +.LC51: + .string "flash_mask_bad_block %d %d\n" +.LC52: + .string "zftl_debug" +.LC53: + .string "FLASH ID: %x %x %x %x %x %x\n" +.LC54: + .string "density: %d MB\n" +.LC55: + .string "device density: %d MB\n" +.LC56: + .string "FTL INFO:\n" +.LC57: + .string "max_lpn = 0x%x\n" +.LC58: + .string "density = 0x%x\n" +.LC59: + .string "slc vpn = 0x%x\n" +.LC60: + .string "xlc vpn = 0x%x\n" +.LC61: + .string "free slc blk = 0x%x\n" +.LC62: + .string "free xlc blk = 0x%x\n" +.LC63: + .string "free mix blk = 0x%x\n" +.LC64: + .string "slc data blk = 0x%x\n" +.LC65: + .string "slc cache blk = 0x%x\n" +.LC66: + .string "xlc data blk = 0x%x\n" +.LC67: + .string "free buf = %d, %d, %d\n" +.LC68: + .string "bad blk = %d %d\n" +.LC69: + .string "TBW = %d MB\n" +.LC70: + .string "TBR = %d MB\n" +.LC71: + .string "POC = %d\n" +.LC72: + .string "PLC = %d\n" +.LC73: + .string "sys run time = %d S\n" +.LC74: + .string "slc mode = %x %x %x\n" +.LC75: + .string "prog err = %d\n" +.LC76: + .string "read err = %d\n" +.LC77: + .string "GC XLC page = %d\n" +.LC78: + .string "GC SLC page = %d\n" +.LC79: + .string "discard page = 0x%x\n" +.LC80: + .string "version = %d\n" +.LC81: + .string "acblk = 0x%x %d %d\n" +.LC82: + .string "tmblk = 0x%x %d %d\n" +.LC83: + .string "gcblk = 0x%x %d %d\n" +.LC84: + .string "slc ec = %d, %d, %d, %d, %d\n" +.LC85: + .string "xlc ec = %d, %d, %d, %d, %d\n" +.LC86: + .string "gc free blk th = %d\n" +.LC87: + .string "gc vpn th = %d %d %d %d %d\n" +.LC88: + .string "swl blk = %x %x %x %x\n" +.LC89: + .string "rf info = %x %x %x %x %x\n" +.LC90: + .string "gc_add_sblk = %d, %d, %d, %d, %d, %d, %d\n" +.LC91: + .string "gc_add_sblk = %d, %d, %d\n" +.LC92: + .string "gc_add_sblk = %d, %d, %d,last update:%d, %d\n" +.LC93: + .string "gc_add_sblk = %d, %d, %d, %d, %d, %d\n" +.LC94: + .string "gc_mark_bad_ppa %d %x %x\n" +.LC95: + .string "status: %x, ppa: %x\n" +.LC96: + .string "%d gc_free_temp_buf buf id= %x\n" +.LC97: + .string "gc: b:%x,p:%x,i:%x; free buf=%d %d free slc th: %d\n" +.LC98: + .string "zftl_get_gc_node cache = %x index = %d vpn = %x\n" +.LC99: + .string "gc_search_src_blk mode = %x, src mode = %x, count= %d %d\n" +.LC100: + .string "swl_tlc_free_mini_ec_blk alloc sblk %x\n" +.LC101: + .string "zftl_get_free_sblk %x %d, %p %d %d\n" +.LC102: + .string "zftl_gc_get_free_sblk %x %x %x, %d %d %d\n" +.LC103: + .string "swl_slc_free_mini_ec_blk alloc sblk %x\n" +.LC104: + .string "list count:%p %d\n" +.LC105: + .string "%d: node:%x %x %x %x, %d %d %d %d %d\n" +.LC106: + .string "ftl_vpn_decrement %x = %d, %d\n" +.LC107: + .string "mask bad block:cs %x %x block: %x %x\n" +.LC108: + .string "gc_free_bad_sblk 0x%x\n" +.LC109: + .string "swl_slc_free_mini_ec_blk sblk %x\n" +.LC110: + .string "gc_free_src_blk = %x, vpn = %d\n" +.LC111: + .string "gc_free_src_blk %x, %d\n" +.LC112: + .string "bad blk = %x, %x free blk: s:%x,t:%x,m:%x, data blk:s:%x,%x,t%x vpn: s:%x t:%x, max_vpn: %x\n" +.LC113: + .string "totle w: %d MB,r: %d MB %d dv:0x%X,poc:%d\n" +.LC114: + .string "gc xlc page: %d,gc slc page: %d, tmp w: %d MB\n" +.LC115: + .string "slc ec: %d,%d,%d,%d,%d,tlc ec: %d,%d,%d,%d,%d\n" +.LC116: + .string "gc th: tlc_tlc: %d tlc_slc: %d slc_slc: %d slc_tlc:%d free_th: %d\n" +.LC117: + .string "swl : %x %x %x %x %x %x\n" +.LC118: + .string "ftl prog error =%x, lpa = %x, ppa= %x\n" +.LC119: + .string "ftl re prog: lpa = %x, ppa= %x\n" +.LC120: + .string "dump_sblk_queue: %d\n" +.LC121: + .string "buf id= %d state = %d ppa = %x\n" +.LC122: + .string "%s %d %d\n" +.LC123: + .string "gc_static_wearleveling: min blk: %x,sec=%d,xec = %d ,mode=%d, func=%x, bbt=%x vpn = %d\n" +.LC124: + .string "gc_static_wearleveling: min slc blk: %x,sec=%d,xec = %d ,mode=%d, func=%x, bbt=%x vpn = %d\n" +.LC125: + .string "gc_static_wearleveling: min tlc blk: %x,sec=%d,xec = %d ,mode=%d, func=%x, bbt=%x vpn = %d\n" +.LC126: + .string "gc_static_wearleveling: max slc blk: %x,sec=%d,xec = %d ,mode=%d, func=%x, bbt=%x vpn = %d\n" +.LC127: + .string "gc_static_wearleveling: max xlc blk: %x,sec=%d,xec = %d ,mode=%d, func=%x, bbt=%x vpn = %d\n" +.LC128: + .string "gc_static_wearleveling: slc blk: %x, tlc blk: %d avg slc ec: %d, avg tlc ec: %d \n" +.LC129: + .string "gc_static_wearleveling: min slc ec: %x, min tlc ec: %d max slc ec: %d, max tlc ec: %d; %d %d\n" +.LC130: + .string "swl add tlc gc = %x, %d, %d, %d, %d, %d\n" +.LC131: + .string "swl add slc gc = %x, %d, %d, %d, %d, %d\n" +.LC132: + .string "free blk vpn error: %x %x\n" +.LC133: + .string "GC PM block %x %x %x %d\n" +.LC134: + .string "ftl_free_no_use_map_blk %x %x %x %d\n" +.LC135: + .string "...%d @ %s\n" +.LC136: + .string "...%s enter... %p\n" +.LC137: + .string "0:%x %x %x %x %x\n" +.LC138: + .string "g_nandc_ver...%d\n" +.LC139: + .string "rk_ftl_de_init %x\n" +.LC140: + .string "\0013" +.LC141: + .string "otp error! %d" +.LC142: + .string "rr" +.LC143: + .string "flash_abort_clear = %d\n" +.LC144: + .string "%d mtrans_cnt = %d page_num = %d\n" +.LC145: + .string "%d flReg.d32=%x %x\n" +.LC146: + .string "nandc:" +.LC147: + .string "nandc_xfer_done read error %x\n" +.LC148: + .string "dqs data abort %x\n" +.LC149: + .string "dqs data timeout %x\n" +.LC150: + .string "xfer error %x\n" +.LC151: + .string "MT %d row=%x,last status %d,status = %d\n" +.LC152: + .string "MT RR %d row=%x,count %d,status=%d\n" +.LC153: + .string "toshiba SRR %d row=%x, status=%d\n" +.LC154: + .string "toshiba TRR %d row=%x, status=%d\n" +.LC155: + .string "toshiba RR %d row=%x,count %d,status=%d\n" +.LC156: + .string "YMTC RR %d row=%x,count %d,status=%d\n" +.LC157: + .string "samsung SRR %d row=%x, status=%d\n" +.LC158: + .string "samsung TRR %d row=%x, status=%d\n" +.LC159: + .string "samsung RR %d row=%x,count %d,status=%d\n" +.LC160: + .string "hynix RR %d row=%x, count %d, status=%d\n" +.LC161: + .string "%d flash_ddr_tuning_read %x ecc=%d\n" +.LC162: + .string "sync para %d\n" +.LC163: + .string "DDR mode Read error %x %x\n" +.LC164: + .string "SDR mode Read %x %x ecc:%x\n" +.LC165: + .string "flash_read_page_en %x %x %x %x\n" +.LC166: + .string "flash_read_page_en %x %x error_ecc %d %d\n" +.LC167: + .string "flash_get_last_written_page: %x %x %x\n" +.LC168: + .string "flash_prog_page page_addr = %x status = %x\n" +.LC169: + .string "flash_prog_page %x %x %x\n" +.LC170: + .string "ymtc_flash_tlc_page_prog page_addr = %x status = %x\n" +.LC171: + .string "sblk_mlc_dump_prog wl_addr= %x ppa = %x ppa = %x\n" +.LC172: + .string "flash_complete_page_read %x %x error_ecc %d %d\n" +.LC173: + .string "read: %x %x %x %x\n" +.LC174: + .string "0set buf %d,status = %x, ppa = %x lun state = %d\n" +.LC175: + .string "prog end %x %x error_ecc %d %d\n" +.LC176: + .string "1set buf %d,status = %x, ppa = %x lun state = %d\n" +.LC177: + .string "dp prog end %x %x error_ecc %d %d\n" +.LC178: + .string "sblk_prog_page ppa = %x, count = %d\n" +.LC179: + .string "err: ppa = %x, status = %x, %x %x spare: %x %x %x %x\n" +.LC180: + .string "flash_prog_page_en:%x %x %x\n" +.LC181: + .string "w d:" +.LC182: + .string "w s:" +.LC183: + .string "spare" +.LC184: + .string "data" +.LC185: + .string "write error: %x\n" +.LC186: + .string "g_ftl_info_blk blk = %x, page = %x version = %d\n" +.LC187: + .string "%d %x @%d %x\n" +.LC188: + .string "ftl_info_blk_init %d %d %x\n" +.LC189: + .string "ftl info hash %x error\n" +.LC190: + .string "ink flag: %x\n" +.LC191: + .string "%s %d %d %x %x\n" +.LC192: + .string "ext info hash %x error\n" +.LC193: + .string "%s %x %x %x\n" +.LC194: + .string "ftl_sblk_dump_write = %x %d %d %d %d\n" +.LC195: + .string "blk= %x, page=%x, ppa = %x, status = %x, data:%x %x %x %x, spare: %x %x %x %x\n" +.LC196: + .string "ftl_sblk_dump_write2 = %x %d %d %d\n" +.LC197: + .string "ftl_sblk_dump_write = %x %x\n" +.LC198: + .string "ftl_sblk_dump_write done = %x\n" +.LC199: + .string "%x: ink_scaned_blk_num %x\n" +.LC200: + .string "ftl_ink_check_sblk = %x %d %d\n" +.LC201: + .string "ftl_ink_check_sblk = %x %d %d end\n" +.LC202: + .string "alloc sblk %x %d\n" +.LC203: + .string "blk %x is bad block\n" +.LC204: + .string "pm_alloc_new_blk: %x %x %x %x\n" +.LC205: + .string "pm_write_page write error: %x\n" +.LC206: + .string "finfo:" +.LC207: + .string "flash_info_flush id = %x, page = %x\n" +.LC208: + .string "sys_info_flush error:%x\n" +.LC209: + .string "...%d @ %s %d %p\n" +.LC210: + .string "no sys info %x\n" +.LC211: + .string "l2p:" +.LC212: + .string "saved_active_page = %x\n" +.LC213: + .string "saved_active_plane = %x\n" +.LC214: + .string "sblk = %x\n" +.LC215: + .string "phy_blk = %x %x\n" +.LC216: + .string "num_planes = %x\n" +.LC217: + .string "recovery blk=%x, page=%x, ppa = %x, status = %x, hash:%x\n" +.LC218: + .string "data:" +.LC219: + .string "sblk = %x, vpn0 = %d, vpn1 = %d\n" +.LC220: + .string "dump_write_lpa = %x %x %x %x\n" +.LC221: + .string "dump write new ppa = %x, last ppa = %x lpa = %x\n" +.LC222: + .string "dump write = %x %x %x\n" +.LC223: + .string "dump write hash update = %x %x %x\n" +.LC224: + .string "free_buf_count: %d\n" +.LC225: + .string "g_ftl_info_blk blk:0x%x, index:0x%x, page:0x%x\n" +.LC226: + .string "ftl_ext_info_blk blk:0x%x, page:0x%x\n" +.LC227: + .string "ac_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n" +.LC228: + .string "tmp_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n" +.LC229: + .string "gc_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n" +.LC230: + .string "lpa:" +.LC231: + .string "vpn:" +.LC232: + .string "sblk:" +.LC233: + .string "lpa_hash:" +.LC234: + .string "lpa_hash_index:" +.LC235: + .string "%s w error lpn = %x, max ppa = %d\n" +.LC236: + .string "region_id = %d, pm_max_region = %d\n" +.LC237: + .string "load_l2p_region no ppa = %x , %x, all setting 0xff....\n" +.LC238: + .string "load_l2p_region = %x,%x,%x, %x\n" +.LC239: + .string "pm_ppa:" +.LC240: + .string "spare:" +.LC241: + .string "pm_init posr %x %x %x\n" +.LC242: + .string "pm_init recovery %x %x %x\n" +.LC243: + .string "pm_init hash %x error\n" +.LC244: + .string "pm_log2phys lpn = %d, max lpn = %d\n" +.LC245: + .string "ppa = %x, status = %x, data:%x %x %x %x, spare: %x %x %x %x\n" +.LC246: + .string "ppa = %x, status = %x, %x %x spare: %x %x %x %x\n" +.LC247: + .string "gc_recovery: %x vpn = %x\n" +.LC248: + .string "gc_update_l2p_map_new sblk %x\n" +.LC249: + .string "gc_update_l2p_map_new: %x %x %x\n" +.LC250: + .string "lpa: %x %x %x\n" +.LC251: + .string "gc_update_l2p_map_new: %x vpn = %x vpn1 = %x done\n" +.LC252: + .string "gc_scan_src_blk = %x, vpn = %d\n" +.LC253: + .string "js hash error:%x %x %x\n" +.LC254: + .string "gc_scan_src_blk = %x, s vpn0 = %d, c vpn1 = %d\n" +.LC255: + .string "gc_block_vpn_scan = %x, s vpn0 = %d, c vpn1 = %d f:%d\n" +.LC256: + .string "ftl_sblk_dump = %x %d %d %d %d\n" +.LC257: + .string "ftl_sblk_dump = %x %x %x %x\n" +.LC258: + .string "page_addr = %x, lpa=%x vpn = %d\n" +.LC259: + .string "index= %x, lpa=%x\n" +.LC260: + .string "block = %x, vpn=%x check vpn = %x\n" +.LC261: + .string "ftl_read %x %x %x\n" +.LC262: + .string "ftl_read refresh =%x, lpa = %x, ppa= %x\n" +.LC263: + .string "id=%d, status = %x, lpa = %x, ppa = %x spare = %x %x %x %x\n" +.LC264: + .string "zftl debug cmd: %s\n" +.LC265: + .string "cmd:" +.LC266: + .string "dumpl2p" +.LC267: + .string "pm l2p:" +.LC268: + .string "pm blk:" +.LC269: + .string "dumppm:" +.LC270: + .string "p_cmd: %s\n" +.LC271: + .string "pm ram = %x, %x\n" +.LC272: + .string "ram:" +.LC273: + .string "pm:" +.LC274: + .string "dumpsys" +.LC275: + .string "dumplist:" +.LC276: + .string "vpncheck" +.LC277: + .string "dumpppa:" +.LC278: + .string "dumpblk:" +.LC279: + .string "setzdebug:" +.LC280: + .string "lpa2ppa:" +.LC281: + .string "lpa: %x--> ppa: %x\n" +.LC282: + .string "help:\n" +.LC283: + .string "1. echo dumpl2p > /proc/zftl_debug\n" +.LC284: + .string "2. echo dumppm:x > /proc/zftl_debug\n" +.LC285: + .string "3. echo dumpsys > /proc/zftl_debug\n" +.LC286: + .string "4. echo dumpppa:x > /proc/zftl_debug\n" +.LC287: + .string "5. echo vpncheck > /proc/zftl_debug\n" +.LC288: + .string "6. echo setzdebug:x > /proc/zftl_debug\n" +.LC289: + .string "7. echo dumplist:x > /proc/zftl_debug\n" +.LC290: + .string "8. echo lpa2ppa:x> /proc/zftl_debug\n" +.LC291: + .string "ftl_update_l2p_map: %x %x %x\n" +.LC292: + .string "ftl_update_l2p_map" +.LC293: + .string "lpa_tbl:" +.LC294: + .string "sblk %x vpn: %d %d\n" +.LC295: + .string "error gc_add_sblk: %x\n" +.LC296: + .string "%d read error: ppa:%x, lpa:%x, status:%x\n" +.LC297: + .string "gc page in buf: lpa %x ppa = %x pageindex= %x\n" +.LC298: + .string "gc_do_copy_back: lpa %x des_ppa = %x %x gc_ppa= %x page_index= %d\n" +.LC299: + .string "gc %d: %d %d %d %d %d %d %d\n" +.LC300: + .string "GC_STATE_SCAN_ALL_PAGE = %x, vpn0 = %d, vpn1 = %d\n" +.LC301: + .string "gc free %x, %d\n" +.LC302: + .string "_c_user_data_density := %d\n" +.LC303: + .string "_c_totle_phy_density := %d\n" +.LC304: + .string "_c_totle_log_page := %d\n" +.LC305: + .string "_c_totle_data_density := %d\n" +.LC306: + .string "_c_ftl_pm_page_num := %d\n" +.LC307: + .string "_c_ftl_byte_pre_page := %d\n" +.LC308: + .string "_c_max_pm_sblk := %d\n" +.LC309: + .string "_min_slc_super_block := %d\n" +.LC310: + .string "_max_xlc_super_block := %d\n" +.LC311: + .string "gp_ftl_ext_info %p %p %p\n" +.LC312: + .string "flash info size: %d %d %d\n" +.LC313: + .string "ftl_init %x\n" +.LC314: + .string "ftlwrite %x %x %x %x\n" +.LC315: + .string "ftl_discard:(%x, %x, %x, %x)\n" +.LC316: + .string "id_block_prog_msb_ff_data slc page = %d pageadd=%x %x\n" +.LC317: + .string "write_idblock fix data %x %x\n" +.LC318: + .string "idblk:" +.LC319: + .string "write_idblock totle_sec %x %x\n" +.LC320: + .string "prog page: %x %x %x, %p %x %x %x\n" +.LC321: + .string "read page: %x %x %x %x\n" +.LC322: + .string "wl_lba %p %x %x %x\n" +.LC323: + .string "return ret = %lx\n" +.LC324: + .string "\0013vendor storage %x,%x,%x\n" diff --git a/include/linux/soc/rockchip/rk_vendor_storage.h b/include/linux/soc/rockchip/rk_vendor_storage.h new file mode 100644 index 00000000000..33033a4cfe9 --- /dev/null +++ b/include/linux/soc/rockchip/rk_vendor_storage.h @@ -0,0 +1,58 @@ +/* + * Copyright (c) 2016, Fuzhou Rockchip Electronics Co., Ltd + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or (at + * your option) any later version. + */ + +#ifndef __PLAT_RK_VENDOR_STORAGE_H +#define __PLAT_RK_VENDOR_STORAGE_H + +#define RSV_ID 0 +#define SN_ID 1 +#define WIFI_MAC_ID 2 +#define LAN_MAC_ID 3 +#define BT_MAC_ID 4 +#define HDCP_14_HDMI_ID 5 +#define HDCP_14_DP_ID 6 +#define HDCP_2X_ID 7 +#define DRM_KEY_ID 8 +#define PLAYREADY_CERT_ID 9 +#define ATTENTION_KEY_ID 10 +#define PLAYREADY_ROOT_KEY_0_ID 11 +#define PLAYREADY_ROOT_KEY_1_ID 12 +#define SENSOR_CALIBRATION_ID 13 +#define IMEI_ID 15 +#define LAN_RGMII_DL_ID 16 +#define EINK_VCOM_ID 17 + +#if IS_ENABLED(CONFIG_ROCKCHIP_VENDOR_STORAGE) +int rk_vendor_read(u32 id, void *pbuf, u32 size); +int rk_vendor_write(u32 id, void *pbuf, u32 size); +int rk_vendor_register(void *read, void *write); +bool is_rk_vendor_ready(void); +#else +static inline int rk_vendor_read(u32 id, void *pbuf, u32 size) +{ + return -1; +} + +static inline int rk_vendor_write(u32 id, void *pbuf, u32 size) +{ + return -1; +} + +static inline int rk_vendor_register(void *read, void *write) +{ + return -1; +} + +static inline bool is_rk_vendor_ready(void) +{ + return false; +} +#endif + +#endif -- 2.30.2