diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h b/arch/arm/include/asm/arch-sunxi/gpio.h index 40a3f845..f37a2759 100644 --- a/arch/arm/include/asm/arch-sunxi/gpio.h +++ b/arch/arm/include/asm/arch-sunxi/gpio.h @@ -188,6 +188,7 @@ enum sunxi_gpio_number { #define SUN8I_GPG_SDC1 2 #define SUN6I_GPG_TWI3 2 #define SUN5I_GPG_UART1 4 +#define SUN8I_H3_GPG_UART1 2 #define SUN6I_GPH_PWM 2 #define SUN8I_GPH_PWM 2 diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c index f17b8029..c1901cbb 100644 --- a/arch/arm/mach-sunxi/board.c +++ b/arch/arm/mach-sunxi/board.c @@ -27,6 +27,10 @@ #include +#if (CONFIG_CONS_INDEX > 1) && defined(CONFIG_MACH_SUN8I_H3) +#include +#endif + struct fel_stash { uint32_t sp; uint32_t lr; @@ -133,6 +137,10 @@ static int gpio_init(void) sunxi_gpio_set_cfgpin(SUNXI_GPG(3), SUN5I_GPG_UART1); sunxi_gpio_set_cfgpin(SUNXI_GPG(4), SUN5I_GPG_UART1); sunxi_gpio_set_pull(SUNXI_GPG(4), SUNXI_GPIO_PULL_UP); +#elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_MACH_SUN8I_H3) + sunxi_gpio_set_cfgpin(SUNXI_GPG(6), SUN8I_H3_GPG_UART1); + sunxi_gpio_set_cfgpin(SUNXI_GPG(7), SUN8I_H3_GPG_UART1); + sunxi_gpio_set_pull(SUNXI_GPG(7), SUNXI_GPIO_PULL_UP); #elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN8I) sunxi_gpio_set_cfgpin(SUNXI_GPB(0), SUN8I_GPB_UART2); sunxi_gpio_set_cfgpin(SUNXI_GPB(1), SUN8I_GPB_UART2); @@ -277,6 +285,18 @@ void board_init_f(ulong dummy) i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); #endif sunxi_board_init(); + +#if (CONFIG_CONS_INDEX > 1) && defined(CONFIG_MACH_SUN8I_H3) + /* the sunxi kernel needs uart0 to be initialized by the bootloader */ + + /* configure uart0 GPIOs */ + sunxi_gpio_set_cfgpin(SUNXI_GPA(4), SUN8I_H3_GPA_UART0); + sunxi_gpio_set_cfgpin(SUNXI_GPA(5), SUN8I_H3_GPA_UART0); + sunxi_gpio_set_pull(SUNXI_GPA(5), SUNXI_GPIO_PULL_UP); + + /* initialize uart0 */ + NS16550_init((NS16550_t)(SUNXI_UART0_BASE), CONFIG_SYS_NS16550_CLK / 16 / CONFIG_BAUDRATE); +#endif } #endif diff --git a/arch/arm/mach-sunxi/clock_sun6i.c b/arch/arm/mach-sunxi/clock_sun6i.c index ca2b982b..9b9df521 100644 --- a/arch/arm/mach-sunxi/clock_sun6i.c +++ b/arch/arm/mach-sunxi/clock_sun6i.c @@ -100,6 +100,17 @@ void clock_init_uart(void) setbits_le32(&ccm->apb2_reset_cfg, 1 << (APB2_RESET_UART_SHIFT + CONFIG_CONS_INDEX - 1)); + +#if (CONFIG_CONS_INDEX > 1) && defined(CONFIG_MACH_SUN8I_H3) + /* the sunxi kernel requires uart0 to be initialized by the bootloader */ + + /* open the clock for uart0 */ + setbits_le32(&ccm->apb2_gate, CLK_GATE_OPEN << APB2_GATE_UART_SHIFT); + + /* deassert uart0 reset */ + setbits_le32(&ccm->apb2_reset_cfg, 1 << APB2_RESET_UART_SHIFT); +#endif + #else /* enable R_PIO and R_UART clocks, and de-assert resets */ prcm_apb0_enable(PRCM_APB0_GATE_PIO | PRCM_APB0_GATE_UART); diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index d8109439..3247c614 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -242,7 +242,7 @@ extern int soft_i2c_gpio_scl; #else #define OF_STDOUT_PATH "/soc@01c00000/serial@01c28000:115200" #endif -#elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_MACH_SUN5I) +#elif CONFIG_CONS_INDEX == 2 && (defined(CONFIG_MACH_SUN5I) || defined(CONFIG_MACH_SUN8I)) #define OF_STDOUT_PATH "/soc@01c00000/serial@01c28400:115200" #elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN8I) #define OF_STDOUT_PATH "/soc@01c00000/serial@01c28800:115200"