From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 From: amazingfate Date: Sun, 28 Jul 2024 14:35:34 +0800 Subject: [ARCHEOLOGY] rockchip64-edge: add rkvdec2 for rk356x > X-Git-Archeology: - Revision e1a64270fa9aad808afd6dd5b4bb0b63e4295d20: https://github.com/armbian/build/commit/e1a64270fa9aad808afd6dd5b4bb0b63e4295d20 > X-Git-Archeology: Date: Sun, 28 Jul 2024 14:35:34 +0800 > X-Git-Archeology: From: amazingfate > X-Git-Archeology: Subject: rockchip64-edge: add rkvdec2 for rk356x > X-Git-Archeology: --- arch/arm64/boot/dts/rockchip/rk356x.dtsi | 35 +++++++++- 1 file changed, 34 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi index 111111111111..222222222222 100644 --- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi @@ -449,6 +449,19 @@ usb2phy1_grf: syscon@fdca8000 { reg = <0x0 0xfdca8000 0x0 0x8000>; }; + sram@fdcc0000 { + compatible = "mmio-sram"; + reg = <0x0 0xfdcc0000 0x0 0xb000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x0 0xfdcc0000 0xb000>; + + vdec_sram: rkvdec-sram@0 { + reg = <0x0 0xb000>; + pool; + }; + }; + pmucru: clock-controller@fdd00000 { compatible = "rockchip,rk3568-pmucru"; reg = <0x0 0xfdd00000 0x0 0x1000>; @@ -635,7 +648,7 @@ gpu: gpu@fde60000 { }; vpu: video-codec@fdea0400 { - compatible = "rockchip,rk3568-vpu"; + compatible = "rockchip,rk3328-vpu"; reg = <0x0 0xfdea0000 0x0 0x800>; interrupts = ; interrupt-names = "vdpu"; @@ -686,6 +699,26 @@ vepu_mmu: iommu@fdee0800 { #iommu-cells = <0>; }; + vdec: video-codec@fdf80200 { + compatible = "rockchip,rk3588-vdec"; + reg = <0x0 0xfdf80100 0x0 0x100>, <0x0 0xfdf80200 0x0 0x500>, <0x0 0xfdf80700 0x0 0x100>; + reg-names = "link", "function", "cache"; + interrupts = ; + clocks = <&cru ACLK_RKVDEC>, <&cru HCLK_RKVDEC>, <&cru CLK_RKVDEC_CA>, + <&cru CLK_RKVDEC_CORE>, <&cru CLK_RKVDEC_HEVC_CA>; + clock-names = "axi", "ahb", "cabac", "core", "hevc_cabac"; + assigned-clocks = <&cru ACLK_RKVDEC>, <&cru CLK_RKVDEC_CORE>, + <&cru CLK_RKVDEC_CA>, <&cru CLK_RKVDEC_HEVC_CA>; + assigned-clock-rates = <297000000>, <297000000>, + <297000000>, <297000000>; + resets = <&cru SRST_A_RKVDEC>, <&cru SRST_H_RKVDEC>, <&cru SRST_RKVDEC_CA>, + <&cru SRST_RKVDEC_CORE>, <&cru SRST_RKVDEC_HEVC_CA>; + reset-names = "rst_axi", "rst_ahb", "rst_cabac", + "rst_core", "rst_hevc_cabac"; + power-domains = <&power RK3568_PD_RKVDEC>; + sram = <&vdec_sram>; + }; + sdmmc2: mmc@fe000000 { compatible = "rockchip,rk3568-dw-mshc", "rockchip,rk3288-dw-mshc"; reg = <0x0 0xfe000000 0x0 0x4000>; -- Armbian