From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 From: Paolo Sabatino Date: Sun, 21 Jul 2024 14:18:30 +0200 Subject: add missing i2s controllers --- arch/arm64/boot/dts/rockchip/rk3308.dtsi | 59 ++++++++++ 1 file changed, 59 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3308.dtsi b/arch/arm64/boot/dts/rockchip/rk3308.dtsi index 111111111111..222222222222 100644 --- a/arch/arm64/boot/dts/rockchip/rk3308.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3308.dtsi @@ -608,6 +608,65 @@ dmac1: dma-controller@ff2d0000 { #dma-cells = <1>; }; + i2s_8ch_0: i2s@ff300000 { + compatible = "rockchip,rk3308-i2s-tdm"; + reg = <0x0 0xff300000 0x0 0x1000>; + interrupts = ; + clocks = <&cru SCLK_I2S0_8CH_TX>, <&cru SCLK_I2S0_8CH_RX>, <&cru HCLK_I2S0_8CH>, + <&cru SCLK_I2S0_8CH_TX_SRC>, + <&cru SCLK_I2S0_8CH_RX_SRC>, + <&cru PLL_VPLL0>, + <&cru PLL_VPLL1>; + clock-names = "mclk_tx", "mclk_rx", "hclk", + "mclk_tx_src", "mclk_rx_src", + "mclk_root0", "mclk_root1"; + dmas = <&dmac1 0>, <&dmac1 1>; + dma-names = "tx", "rx"; + resets = <&cru SRST_I2S0_8CH_TX_M>, <&cru SRST_I2S0_8CH_RX_M>; + reset-names = "tx-m", "rx-m"; + rockchip,cru = <&cru>; + rockchip,grf = <&grf>; + rockchip,mclk-calibrate; + pinctrl-names = "default"; + pinctrl-0 = <&i2s_8ch_0_sclktx + &i2s_8ch_0_sclkrx + &i2s_8ch_0_lrcktx + &i2s_8ch_0_lrckrx + &i2s_8ch_0_sdi0 + &i2s_8ch_0_sdi1 + &i2s_8ch_0_sdi2 + &i2s_8ch_0_sdi3 + &i2s_8ch_0_sdo0 + &i2s_8ch_0_sdo1 + &i2s_8ch_0_sdo2 + &i2s_8ch_0_sdo3 + &i2s_8ch_0_mclk>; + status = "disabled"; + }; + + i2s_8ch_1: i2s@ff310000 { + compatible = "rockchip,rk3308-i2s-tdm"; + reg = <0x0 0xff310000 0x0 0x1000>; + interrupts = ; + clocks = <&cru SCLK_I2S1_8CH_TX>, <&cru SCLK_I2S1_8CH_RX>, <&cru HCLK_I2S1_8CH>, + <&cru SCLK_I2S1_8CH_TX_SRC>, + <&cru SCLK_I2S1_8CH_RX_SRC>, + <&cru PLL_VPLL0>, + <&cru PLL_VPLL1>; + clock-names = "mclk_tx", "mclk_rx", "hclk", + "mclk_tx_src", "mclk_rx_src", + "mclk_root0", "mclk_root1"; + dmas = <&dmac1 2>, <&dmac1 3>; + dma-names = "tx", "rx"; + resets = <&cru SRST_I2S1_8CH_TX_M>, <&cru SRST_I2S1_8CH_RX_M>; + reset-names = "tx-m", "rx-m"; + rockchip,cru = <&cru>; + rockchip,grf = <&grf>; + rockchip,mclk-calibrate; + rockchip,io-multiplex; + status = "disabled"; + }; + /* * - can be clock producer or consumer * - up to 8 capture channels and 2 playback channels -- Armbian