From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 From: Martin Blumenstingl Date: Sat, 28 Aug 2021 18:50:10 +0200 Subject: ARM: dts: meson: Add #address-cells, #size-cells and ranges to hhi The HHI node has multiple child-nodes. Add #address-cells, #size-cells and ranges properties to the hhi node itself so the child-nodes can get their own offset and register sizes. Also add the reg property to the clock and power domain controllers inside the hhi region. Signed-off-by: Martin Blumenstingl --- arch/arm/boot/dts/amlogic/meson.dtsi | 3 +++ arch/arm/boot/dts/amlogic/meson8.dtsi | 6 ++++-- arch/arm/boot/dts/amlogic/meson8b.dtsi | 6 ++++-- 3 files changed, 11 insertions(+), 4 deletions(-) diff --git a/arch/arm/boot/dts/amlogic/meson.dtsi b/arch/arm/boot/dts/amlogic/meson.dtsi index 111111111111..222222222222 100644 --- a/arch/arm/boot/dts/amlogic/meson.dtsi +++ b/arch/arm/boot/dts/amlogic/meson.dtsi @@ -35,6 +35,9 @@ hhi: system-controller@4000 { "simple-mfd", "syscon"; reg = <0x4000 0x400>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x4000 0x400>; }; aiu: audio-controller@5400 { diff --git a/arch/arm/boot/dts/amlogic/meson8.dtsi b/arch/arm/boot/dts/amlogic/meson8.dtsi index 111111111111..222222222222 100644 --- a/arch/arm/boot/dts/amlogic/meson8.dtsi +++ b/arch/arm/boot/dts/amlogic/meson8.dtsi @@ -625,16 +625,18 @@ &gpio_intc { }; &hhi { - clkc: clock-controller { + clkc: clock-controller@0 { compatible = "amlogic,meson8-clkc"; + reg = <0x0 0x39c>; clocks = <&xtal>, <&ddr_clkc DDR_CLKID_DDR_PLL>; clock-names = "xtal", "ddr_pll"; #clock-cells = <1>; #reset-cells = <1>; }; - pwrc: power-controller { + pwrc: power-controller@100 { compatible = "amlogic,meson8-pwrc"; + reg = <0x100 0x10>; #power-domain-cells = <1>; amlogic,ao-sysctrl = <&pmu>; clocks = <&clkc CLKID_VPU>; diff --git a/arch/arm/boot/dts/amlogic/meson8b.dtsi b/arch/arm/boot/dts/amlogic/meson8b.dtsi index 111111111111..222222222222 100644 --- a/arch/arm/boot/dts/amlogic/meson8b.dtsi +++ b/arch/arm/boot/dts/amlogic/meson8b.dtsi @@ -586,16 +586,18 @@ &gpio_intc { }; &hhi { - clkc: clock-controller { + clkc: clock-controller@0 { compatible = "amlogic,meson8b-clkc"; + reg = <0x0 0x39c>; clocks = <&xtal>, <&ddr_clkc DDR_CLKID_DDR_PLL>; clock-names = "xtal", "ddr_pll"; #clock-cells = <1>; #reset-cells = <1>; }; - pwrc: power-controller { + pwrc: power-controller@100 { compatible = "amlogic,meson8b-pwrc"; + reg = <0x100 0x10>; #power-domain-cells = <1>; amlogic,ao-sysctrl = <&pmu>; resets = <&reset RESET_DBLK>, -- Armbian