From e9413f3f1b4f234c76072c49588f3d16549f2d73 Mon Sep 17 00:00:00 2001 From: chraac Date: Fri, 15 Mar 2024 12:30:26 +0800 Subject: orangepi-zero2w add dtb --- arch/arm64/boot/dts/allwinner/Makefile | 1 + .../arm64/boot/dts/allwinner/sun50i-h616.dtsi | 25 +- .../allwinner/sun50i-h618-orangepi-zero2w.dts | 491 ++++++++++++++++++ 3 files changed, 509 insertions(+), 8 deletions(-) create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile index 468d3f235490..812685d6740f 100644 --- a/arch/arm64/boot/dts/allwinner/Makefile +++ b/arch/arm64/boot/dts/allwinner/Makefile @@ -57,5 +57,6 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-bigtreetech-cb1-sd.dtb dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-bigtreetech-cb1-emmc.dtb dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h618-bananapi-m4-zero.dtb dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h618-orangepi-zero3.dtb +dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h618-orangepi-zero2w.dtb subdir-y := $(dts-dirs) overlay diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi index 362c43d5eb9f..ccaca20eb10b 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi @@ -209,7 +209,7 @@ video-codec@1c0e000 { syscon: syscon@3000000 { compatible = "allwinner,sun50i-h616-system-control"; - reg = <0x03000000 0x1000>; + reg = <0x03000000 0x30>,<0x03000038 0x0fc8>; #address-cells = <1>; #size-cells = <1>; ranges; @@ -690,19 +690,28 @@ mdio0: mdio { }; emac1: ethernet@5030000 { - compatible = "allwinner,sun50i-h616-emac"; - syscon = <&syscon 1>; - reg = <0x05030000 0x10000>; + compatible = "allwinner,sunxi-gmac"; + reg = <0x05030000 0x10000>, + <0x03000034 0x4>; + reg-names = "gmac1_reg","ephy_reg"; interrupts = ; - interrupt-names = "macirq"; + interrupt-names = "gmacirq"; resets = <&ccu RST_BUS_EMAC1>; reset-names = "stmmaceth"; - clocks = <&ccu CLK_BUS_EMAC1>; - clock-names = "stmmaceth"; + clocks = <&ccu CLK_BUS_EMAC1>,<&ccu CLK_EMAC_25M>; + clock-names = "bus-emac1","emac-25m"; + pinctrl-0 = <&rmii_pins>; + pinctrl-names = "default"; + tx-delay = <7>; + rx-delay = <31>; + phy-rst; + gmac-power0; + gmac-power1; + gmac-power2; status = "disabled"; mdio1: mdio { - compatible = "snps,dwmac-mdio"; + compatible = "ethernet-phy-ieee802.3-c22"; #address-cells = <1>; #size-cells = <0>; }; diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts b/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts new file mode 100644 index 000000000000..b224902f5684 --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts @@ -0,0 +1,491 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (C) 2023 Arm Ltd. + */ + +/dts-v1/; + +#include "sun50i-h616.dtsi" +#include "sun50i-h616-cpu-opp.dtsi" +#include "sun50i-h618-cpu-dvfs.dtsi" + +#include +#include +#include + +/ { + model = "OrangePi Zero 2W"; + compatible = "xunlong,orangepi-zero2w", "allwinner,sun50i-h618"; + + aliases { + serial0 = &uart0; + serial2 = &uart2; + serial3 = &uart3; + serial4 = &uart4; + serial5 = &uart5; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + connector { + compatible = "hdmi-connector"; + type = "d"; + + port { + hdmi_con_in: endpoint { + remote-endpoint = <&hdmi_out_con>; + }; + }; + }; + + leds { + compatible = "gpio-leds"; + + led-0 { + function = LED_FUNCTION_STATUS; + color = ; + label = "green_led"; + gpios = <&pio 2 13 GPIO_ACTIVE_HIGH>; /* PC13 */ + linux,default-trigger = "heartbeat"; + }; + + 100m_link { + label = "100m_link"; + gpios = <&pio 2 15 GPIO_ACTIVE_HIGH>; /* PC15 */ + default-state = "off"; + }; + + 100m_act { + label = "100m_act"; + gpios = <&pio 2 16 GPIO_ACTIVE_HIGH>; /* PC16 */ + default-state = "off"; + }; + }; + + reg_vcc5v: vcc5v { + /* board wide 5V supply directly from the USB-C socket */ + compatible = "regulator-fixed"; + regulator-name = "vcc-5v"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + }; + + reg_vcc3v3: vcc3v3 { + /* SY8089 DC/DC converter */ + compatible = "regulator-fixed"; + regulator-name = "vcc-3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <®_vcc5v>; + regulator-always-on; + }; + + reg_vcc_wifi_io: vcc-wifi-io { + /* Always on 1.8V/300mA regulator for WiFi and BT IO */ + compatible = "regulator-fixed"; + regulator-name = "vcc-wifi-io"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + vin-supply = <®_vcc3v3>; + }; + + wifi_pwrseq: wifi-pwrseq { + compatible = "mmc-pwrseq-simple"; + clocks = <&rtc 1>; + clock-names = "osc32k-out"; + reset-gpios = <&pio 6 18 GPIO_ACTIVE_LOW>; /* PG18 */ + post-power-on-delay-ms = <200>; + }; + + ac200_pwm_clk: ac200_clk { + compatible = "pwm-clock"; + #clock-cells = <0>; + // pwm5 period_ns = 500 > 334 for select 24M clock. + pwms = <&pwm 5 500 0>; + clock-frequency = <2000000>; + status = "okay"; + }; + + soc { + pwm: pwm@300a000 { + compatible = "allwinner,sun50i-h616-pwm"; + reg = <0x0300a000 0x400>; + clocks = <&osc24M>, <&ccu CLK_BUS_PWM>; + clock-names = "mod", "bus"; + resets = <&ccu RST_BUS_PWM>; + pwm-number = <6>; + pwm-base = <0x0>; + sunxi-pwms = <&pwm0>, <&pwm1>, <&pwm2>, <&pwm3>, <&pwm4>, <&pwm5>; + #pwm-cells = <3>; + status = "okay"; + }; + + pwm0: pwm0@0300a000 { + compatible = "allwinner,sunxi-pwm0"; + }; + + pwm1: pwm1@0300a000 { + compatible = "allwinner,sunxi-pwm1"; + pinctrl-names = "default"; + pinctrl-0 = <&pwm1_ph_pin>; + }; + + pwm2: pwm2@0300a000 { + compatible = "allwinner,sunxi-pwm2"; + pinctrl-names = "default"; + pinctrl-0 = <&pwm2_ph_pin>; + }; + + pwm3: pwm3@0300a000 { + compatible = "allwinner,sunxi-pwm3"; + pinctrl-names = "default"; + pinctrl-0 = <&pwm3_ph_pin>; + }; + + pwm4: pwm4@0300a000 { + compatible = "allwinner,sunxi-pwm4"; + pinctrl-names = "default"; + pinctrl-0 = <&pwm4_ph_pin>; + }; + + pwm5: pwm5@0300a000 { + compatible = "allwinner,sunxi-pwm5"; + pinctrl-names = "default"; + pinctrl-0 = <&pwm5_pin>; + clk_bypass_output = <0x1>; + status = "okay"; + }; + }; +}; + +&de { + status = "okay"; +}; + +&hdmi { + status = "okay"; +}; + +&hdmi_out { + hdmi_out_con: endpoint { + remote-endpoint = <&hdmi_con_in>; + }; +}; + +&gpu { + mali-supply = <®_dcdc1>; + status = "disabled"; +}; + +&mmc0 { + cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ + bus-width = <4>; + vmmc-supply = <®_dldo1>; + max-frequency = <50000000>; + status = "okay"; +}; + +&mmc1 { + vmmc-supply = <®_vcc3v3>; + vqmmc-supply = <®_vcc_wifi_io>; + mmc-pwrseq = <&wifi_pwrseq>; + bus-width = <4>; + non-removable; + mmc-ddr-1_8v; + status = "okay"; +}; + +&emac0 { + status = "disabled"; +}; + +&emac1 { + pinctrl-names = "default"; + pinctrl-0 = <&rmii_pins>; + phy-mode = "rmii"; + phy-handle = <&rmii_phy>; + phy-supply = <®_dldo1>; + allwinner,rx-delay-ps = <3100>; + allwinner,tx-delay-ps = <700>; + status = "okay"; +}; + +&mdio1 { + rmii_phy: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <1>; + }; +}; + +&ehci0 { + status = "disabled"; +}; + +&ehci1 { + status = "okay"; +}; + +&ehci2 { + status = "okay"; +}; + +&ehci3 { + status = "okay"; +}; + +&ohci0 { + status = "disabled"; +}; + +&ohci1 { + status = "okay"; +}; + +&ohci2 { + status = "okay"; +}; + +&ohci3 { + status = "okay"; +}; + +&ir { + pinctrl-names = "default"; + pinctrl-0 = <&ir_rx_pin>; + status = "okay"; +}; + +&spi0 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&spi0_pins>, <&spi0_cs0_pin>; + + flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <40000000>; + }; +}; + +&spi1 { + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&spi1_pins>, <&spi1_cs1_pin>; + + spidev@1 { + compatible = "rohm,dh2228fv"; + status = "disabled"; + reg = <1>; + spi-max-frequency = <1000000>; + }; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_ph_pins>; + status = "okay"; +}; + +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&uart2_pi_pins>; + status = "disabled"; +}; + +&uart3 { + pinctrl-names = "default"; + pinctrl-0 = <&uart3_pi_pins>; + status = "disabled"; +}; + +&uart4 { + pinctrl-names = "default"; + pinctrl-0 = <&uart4_pi_pins>; + status = "disabled"; +}; + +&uart5 { + pinctrl-names = "default"; + pinctrl-0 = <&uart5_ph_pins>; + status = "disabled"; +}; + +&i2c3 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c3_pa_pins>; + + ac200_x: mfd@10 { + compatible = "x-powers,ac200-sunxi"; + reg = <0x10>; + clocks = <&ac200_pwm_clk>; + // ephy id + nvmem-cells = <&ephy_calibration>; + nvmem-cell-names = "calibration"; + + ac200_ephy: phy { + compatible = "x-powers,ac200-ephy-sunxi"; + status = "okay"; + }; + }; +}; + +&i2c4 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c4_ph_pins>; + status = "disabled"; +}; + +&usbotg { + /* + * PHY0 pins are connected to a USB-C socket, but a role switch + * is not implemented: both CC pins are pulled to GND. + * The VBUS pins power the device, so a fixed peripheral mode + * is the best choice. + * The board can be powered via GPIOs, in this case port0 *can* + * act as a host (with a cable/adapter ignoring CC), as VBUS is + * then provided by the GPIOs. Any user of this setup would + * need to adjust the DT accordingly: dr_mode set to "host", + * enabling OHCI0 and EHCI0. + */ + dr_mode = "peripheral"; + status = "okay"; +}; + +&usbphy { + usb1_vbus-supply = <®_vcc5v>; + status = "okay"; +}; + +&cpu0 { + cpu-supply = <®_dcdc2>; + status = "okay"; +}; + +&sid { + ephy_calibration: ephy-calibration@2c { + reg = <0x2c 0x2>; + }; +}; + +&cpu_temp_critical { + temperature = <100000>; +}; + +&gpu_temp_critical { + temperature = <100000>; +}; + +&ve_temp_critical { + temperature = <100000>; +}; + +&ddr_temp_critical { + temperature = <100000>; +}; + +&pio { + vcc-pc-supply = <®_dldo1>; + vcc-pf-supply = <®_dldo1>; + vcc-pg-supply = <®_aldo1>; + vcc-ph-supply = <®_dldo1>; + vcc-pi-supply = <®_dldo1>; + + /omit-if-no-ref/ + i2c0_pi_pins: i2c0-pi-pins { + pins = "PI5", "PI6"; + function = "i2c0"; + }; + + /omit-if-no-ref/ + i2c1_pi_pins: i2c1-pi-pins { + pins = "PI7", "PI8"; + function = "i2c1"; + }; + + /omit-if-no-ref/ + i2c2_pi_pins: i2c2-pi-pins { + pins = "PI9", "PI10"; + function = "i2c2"; + }; + + i2c3_pa_pins: i2c3-pa-pins { + pins = "PA10", "PA11"; + function = "i2c3"; + bias-pull-up; + }; + + /omit-if-no-ref/ + i2c4_ph_pins: i2c4-ph-pins { + pins = "PH6", "PH7"; + function = "i2c4"; + }; + + /omit-if-no-ref/ + uart2_pi_pins: uart2-pi-pins { + pins = "PI5", "PI6"; + function = "uart2"; + }; + + /omit-if-no-ref/ + uart3_pi_pins: uart3-pi-pins { + pins = "PI9", "PI10"; + function = "uart3"; + }; + + /omit-if-no-ref/ + uart4_pi_pins: uart4-pi-pins { + pins = "PI13", "PI14"; + function = "uart4"; + }; + + /omit-if-no-ref/ + uart5_ph_pins: uart5-ph-pins { + pins = "PH2", "PH3"; + function = "uart5"; + }; + + /omit-if-no-ref/ + spi1_cs1_pin: spi1-cs1-pin { + pins = "PH9"; + function = "spi1"; + }; + + /omit-if-no-ref/ + pwm1_ph_pin: pwm1-ph-pin { + pins = "PH3"; + function = "pwm1"; + }; + + /omit-if-no-ref/ + pwm2_ph_pin: pwm2-ph-pin { + pins = "PH2"; + function = "pwm2"; + }; + + /omit-if-no-ref/ + pwm3_ph_pin: pwm3-ph-pin { + pins = "PH0"; + function = "pwm3"; + }; + + /omit-if-no-ref/ + pwm4_ph_pin: pwm4-ph-pin { + pins = "PH1"; + function = "pwm4"; + }; + + /omit-if-no-ref/ + pwm5_pin: pwm5-pin { + pins = "PA12"; + function = "pwm5"; + }; +}; -- 2.35.3