The chraac BSP patch (driver-allwinner-h618-emac / 0203) introduced
conflicting out-of-tree drivers (sunxi-gmac, sunxi-ephy, sunxi-ac200)
that clash with the correct mainline AC200 stack already in place:
- sunxi-ac200.c conflicts with the mainline ac200.c (0201)
- sunxi-ephy.c conflicts with the mainline ac200-phy.c (0202)
- sunxi-gmac.c is an unnecessary BSP replacement for dwmac-sun8i
- removes of_gpio_flags enum from gpiolib-of.c, breaking other drivers
- depends on PWM_SUNXI_ENHANCE which doesn't exist in mainline
H6 internal EMAC is correctly handled by the mainline stack:
ac200.c + ac200-ephy-ctl.c (ac200-v3) + ac200-phy.c + DTS patches.
H618 EMAC is covered by dwmac-sun8i + drv-net-stmmac-dwmac-sun8i-
add-second-emac-clock patch.
Remove the patch from sunxi-6.12, 6.18 and 7.0, and drop the leftover
CONFIG_SUNXI_GMAC=m from the legacy kernel config. Also align
CONFIG_SUN4I_EMAC to =m (matching current/edge) in legacy config.
Signed-off-by: Igor Pecovnik <igor@armbian.com>
Fix ethernet PHY not being detected on the NanoPi Zero2. The MDIO bus
scan was failing because the PHY reset GPIO was only defined on the
PHY child node inside the MDIO bus. The kernel processes this reset
after the MDIO scan, but the PHY needs reset released before it will
respond on the bus.
Move the reset control to the gmac1 node using snps,reset-gpios and
snps,reset-delays-us properties. The stmmac driver handles these
during MDIO bus registration, before scanning for PHY devices.
Also change CONFIG_MOTORCOMM_PHY from module (m) to built-in (y) in
the rockchip64 kernel config. As a module, the PHY driver loads too
late for the MDIO bus scan to find the PHY during boot.
Tested on hardware: ethernet link at 1000Mbps full duplex confirmed.
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
Enable USB OTG/gadget mode on the NanoPi Zero2 USB-C port by adding
extcon binding and snps,dis_u2_susphy_quirk to the DWC3 node. The
extcon binding coordinates role switching between the DWC3 and USB2
PHY OTG state machines, which previously conflicted and caused memory
corruption.
Also fix a use-after-free in the inno-usb2 PHY driver where the OTG
state machine delayed works (otg_sm_work, chg_work, sm_work) were not
canceled on driver removal. This caused a kernel panic ~2 seconds
after boot when dr_mode was set to "otg" or "peripheral". The fix
registers devm cleanup actions to cancel the works automatically.
Tested on hardware: USB-A host port, USB-C gadget (NCM ethernet),
and USB-C OTG mode all verified working.
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
This commit introduces a patch for the rockchip64 kernel (current 6.18 and
edge 7.0 branches) to fix audio routing issues affecting the ES8328 codec.
The patch modifies the ASoC es8328 driver to explicitly allow sharing the
LRCK (Left/Right Clock) between the microphone and playback interfaces.
This is required for hardware designs where capture and playback must share
the same clock line.
Signed-off-by: c127dev <contact@c127.dev>
This commit enables full support for the Orange Pi 5 Pro on the edge
Linux kernel (rockchip64-7.0). It synchronizes the device tree additions
with the current kernel and includes the necessary eFUSE MAC address fix for
the Motorcomm Ethernet controller.
Key additions and modifications:
1. Device Tree Updates (rk3588s-orangepi-5-pro.dts):
- Added support for DisplayPort 1.4 to HDMI 2.0 (DP0/VP2).
- Configured USB3 Type-A ports (with USB2 OTG PHY) and explicitly set the
USB-C port to power-delivery only (no FUSB302/data/alt-mode).
- Configured combphy2_psu for NVMe M.2 slot support by disabling
conflicting USB3 modes.
- Re-mapped fan to PWM2 and LEDs to PWM3/PWM15.
- Added full AP6256 Wi-Fi/Bluetooth support (SDIO and UART9).
2. Motorcomm YT6801 Ethernet Support (Patches):
- Included fix for Motorcomm YT6801 eFUSE MAC address read failures
on the 7.0 kernel.
Signed-off-by: c127dev <contact@c127.dev>
This commit enables full support for the Orange Pi 5 Pro on the current
Linux kernel (rockchip64-6.18). It includes a comprehensive device tree,
board configuration updates, and a series of patches for the PCIe Motorcomm
YT6801 Ethernet controller.
Key additions and modifications:
1. Device Tree Updates (rk3588s-orangepi-5-pro.dts):
- Added support for DisplayPort 1.4 to HDMI 2.0 (DP0/VP2).
- Configured USB3 Type-A ports (with USB2 OTG PHY) and explicitly set the
USB-C port to power-delivery only (no FUSB302/data/alt-mode).
- Configured combphy2_psu for NVMe M.2 slot support by disabling
conflicting USB3 modes.
- Re-mapped fan to PWM2 and LEDs to PWM3/PWM15.
- Added full AP6256 Wi-Fi/Bluetooth support (SDIO and UART9).
2. Motorcomm YT6801 Ethernet Support (Patches 1-5):
- Added generic suspend/resume helper for PCI-based controllers.
- Backported glue driver for Motorcomm YT6801 and YT8531S PHY support.
- Included fixes for eFUSE MAC address read failures.
- Resolved specific stmmac/motorcomm driver compilation errors and
panics on kernel 6.18.
3. Board Configuration (orangepi5pro.csc):
- Refactored U-Boot configuration selection logic, segregating mainline
and vendor branches correctly.
- Configured the Armbian build system to automatically enable the newly
added Motorcomm PHY, STMMAC_ETH, and STMMAC_PLATFORM kernel configs
for the "current" and "edge" branches.
Signed-off-by: c127dev <contact@c127.dev>
Remove patch 1003 which incorrectly changes exit() to pass struct device *
instead of struct platform_device *. In kernel 6.12, the signature is:
void (*exit)(struct platform_device *pdev, void *priv);
Remove incompatible patches that try to use non-existent kernel APIs:
- 1001: stmmac_axi_blen_to_mask() and axi_blen_regval don't exist in 6.12
- 1002: plat->core_type and DWMAC_CORE_GMAC don't exist in 6.12
The base patch (1000) already uses the correct 6.12 APIs:
- axi->axi_blen array
- plat->has_gmac field
- Fix the issue that downstream MSM sdhc driver cannot work on 6.18.14
or newer kernel
- Switch back to downstream MSM sdhc driver for Ayn Odin2 devices to
fix the IO performance regression brought by upstream driver.
Before this fix, average sequential read bandwidth on a UHS-I SDR104
card is 16.8MiB/s. After this fix applied, it is 85.1MiB/s.
It fixes commit f785a6d9fdd2f6751f739d6863e1beec6d98484b
Signed-off-by: Alex Ling <ling_kasim@hotmail.com>
* rockchip64: add USB support for RK3528 / NanoPi Zero2 (6.18 + 7.0)
Add three kernel patches for USB support on the RK3528 SoC:
- phy-rockchip-inno-usb2: Add RK3528 USB2 PHY driver support
- rk3528.dtsi: Add xHCI, EHCI, OHCI and USB2 PHY device tree nodes
- nanopi-zero2: Enable USB host and OTG ports
Tested on hardware: USB storage, PCIe (AX210 WiFi) all working.
* rockchip64: fix USB patches for RK3528 (6.18 + 7.0)
- Fix error handling in USB2 PHY tuning: use individual return checks
instead of ret |= pattern (thanks @coderabbitai)
- Remove power-domains properties from USB DTS nodes: causes kernel
panic (synchronous external abort in rockchip_pmu_set_idle_request)
as RK3528 PMU idle request registers are not ready for these domains
- Fix patch hunk headers to match updated line counts
Tested on hardware: both current (6.18) and edge (6.19) boot
successfully with working USB.
* rockchip64: rk3528: change USB-C dr_mode from host to otg (6.18 + 7.0)
The DWC3 controller on the NanoPi Zero2 USB-C port was set to
host-only mode, preventing USB gadget functionality. Change to
OTG mode to support both host and peripheral use cases.
* rockchip64: rk3528: fix USB PHY regmap and revert dr_mode to host (6.18 + 7.0)
Fix the USB2 PHY driver probe to use phy_base for port register access
instead of the vo_grf syscon. The RK3528 PHY port registers (UTMI
status, VBUS detection, etc.) reside in the PHY register space, not
in the Video Output GRF. Using the wrong regmap caused register
accesses to hit unrelated hardware when the OTG state machine runs.
Revert dr_mode back to "host" as OTG/peripheral mode triggers a kernel
panic from timer corruption during DWC3 gadget initialization. This
needs further investigation before OTG support can be enabled.
* change regulator-min-microvolt to 1.4V
* adapt new voltage regulator values
* revert vdd_arm regulator due to boot time errors
* revert vdd_arm min voltage due to errors
* Generic aic8800-dkms.sh extension
* fix typo in filename
* remove file
Voltages for "gpu_opp_table" and "vdd_arm" were wrongly using default
values instead of the customized values from the vendor image, leading
to dmesg errors like
[ 19.709834] core: _opp_supported_by_regulators: OPP minuV: 1075000 maxuV: 1075000, not supported by regulator
[ 19.710075] lima ff300000.gpu: _opp_add: OPP not supported by regulators (200000000) 0xBEBC200
Thanks to Shadowrom2020 for noticing.
Update the I2S MCLK output gate clock patches to match the upstream v3
series. Changes from previous version:
- Split into 4 patches (was 3): added separate patch for
RK3588_SYSGRF_SOC_CON6 define in rk3588_grf.h
- Use named constant RK3588_SYSGRF_SOC_CON6 instead of magic 0x0318
- Add u-boot patch for clock ID bindings (needed by board DTS files)
6.18 uses kzalloc(sizeof(...)) as kzalloc_obj is not available.
7.0 uses kzalloc_obj as recommended by upstream reviewer.
Upstream: https://lore.kernel.org/linux-rockchip/20260320-rk3588-mclk-gate-grf-v3-0-980338eacd2c@superkali.me/
