From 8648dde23ff090b5fb704adab036ed14cd944ba3 Mon Sep 17 00:00:00 2001 From: aiamadeus <42570690+aiamadeus@users.noreply.github.com> Date: Thu, 22 Sep 2022 16:25:28 +0800 Subject: [PATCH] rockchip: fixes support for orangepi-r1plus (#4215) * rockchip: replace r8152 patches with openwrt * rockchip: fixes support for orangepi-r1plus Co-authored-by: AmadeusGhost <42570690+AmadeusGhost@users.noreply.github.com> --- ...angepi-r1plus.csc => orangepi-r1plus.conf} | 3 +- config/targets.conf | 6 + .../add-board-nanopi-r2s.patch | 23 +- .../add-board-orangepi-r1plus.patch | 444 ++++++++++++++- ...oard-nanopi-r2s-r8152-customise-leds.patch | 36 -- .../board-nanopi-r2s-r8152-mac-from-dt.patch | 40 -- ...-r8152-add-LED-configuration-from-OF.patch | 74 +++ .../add-board-orangepi-r1plus.patch | 444 ++++++++++++++- .../add-board-orangepi-r1plus.patch | 444 ++++++++++++++- .../board-nanopi-r2s-r8152-mac-from-dt.patch | 40 -- ...proper-adjustement-for-reading-MAC-f.patch | 42 -- .../add-board-nanopi-r2s.patch | 23 +- .../add-board-orangepi-r1plus.patch | 437 +++++++++++++- ...oard-nanopi-r2s-r8152-customise-leds.patch | 36 -- .../board-nanopi-r2s-r8152-mac-from-dt.patch | 40 -- ...-r8152-add-LED-configuration-from-OF.patch | 74 +++ ...proper-adjustement-for-reading-MAC-f.patch | 42 -- .../add-board-nanopi-r2s.patch | 30 +- .../add-board-orangepi-r1-plus.patch | 416 ++++++++++++++ .../add-board-orangepi-r1plus.patch | 35 -- ...oard-nanopi-r2s-r8152-customise-leds.patch | 36 -- .../board-nanopi-r2s-r8152-mac-from-dt.patch | 40 -- ...-r8152-add-LED-configuration-from-OF.patch | 74 +++ ...proper-adjustement-for-reading-MAC-f.patch | 42 -- .../add-board-nanopi-r2s.patch | 30 +- .../add-board-orangepi-r1-plus.patch | 416 ++++++++++++++ .../add-board-orangepi-r1plus.patch | 35 -- ...oard-nanopi-r2s-r8152-customise-leds.patch | 36 -- .../board-nanopi-r2s-r8152-mac-from-dt.patch | 40 -- ...-r8152-add-LED-configuration-from-OF.patch | 74 +++ ...proper-adjustement-for-reading-MAC-f.patch | 42 -- .../add-board-nanopi-r2s.patch | 30 +- .../add-board-orangepi-r1-plus.patch | 416 ++++++++++++++ .../add-board-orangepi-r1plus.patch | 35 -- ...oard-nanopi-r2s-r8152-customise-leds.patch | 36 -- .../board-nanopi-r2s-r8152-mac-from-dt.patch | 40 -- ...-r8152-add-LED-configuration-from-OF.patch | 74 +++ ...proper-adjustement-for-reading-MAC-f.patch | 42 -- .../add-board-nanopi-r2s.patch | 30 +- .../add-board-orangepi-r1-plus.patch | 416 ++++++++++++++ .../add-board-orangepi-r1plus.patch | 35 -- ...oard-nanopi-r2s-r8152-customise-leds.patch | 36 -- .../board-nanopi-r2s-r8152-mac-from-dt.patch | 40 -- ...-r8152-add-LED-configuration-from-OF.patch | 74 +++ ...proper-adjustement-for-reading-MAC-f.patch | 42 -- .../add-board-orangepi-r1-plus-.patch | 188 ------ .../add-board-orangepi-r1-plus-0.patch | 533 ++++++++++++++++++ 47 files changed, 4370 insertions(+), 1291 deletions(-) rename config/boards/{orangepi-r1plus.csc => orangepi-r1plus.conf} (75%) delete mode 100644 patch/kernel/archive/rockchip64-5.10/board-nanopi-r2s-r8152-customise-leds.patch delete mode 100644 patch/kernel/archive/rockchip64-5.10/board-nanopi-r2s-r8152-mac-from-dt.patch create mode 100644 patch/kernel/archive/rockchip64-5.10/net-usb-r8152-add-LED-configuration-from-OF.patch delete mode 100644 patch/kernel/archive/rockchip64-5.13/board-nanopi-r2s-r8152-mac-from-dt.patch delete mode 100644 patch/kernel/archive/rockchip64-5.13/workaround-need-proper-adjustement-for-reading-MAC-f.patch delete mode 100644 patch/kernel/archive/rockchip64-5.14/board-nanopi-r2s-r8152-customise-leds.patch delete mode 100644 patch/kernel/archive/rockchip64-5.14/board-nanopi-r2s-r8152-mac-from-dt.patch create mode 100644 patch/kernel/archive/rockchip64-5.14/net-usb-r8152-add-LED-configuration-from-OF.patch delete mode 100644 patch/kernel/archive/rockchip64-5.14/workaround-need-proper-adjustement-for-reading-MAC-f.patch create mode 100644 patch/kernel/archive/rockchip64-5.15/add-board-orangepi-r1-plus.patch delete mode 100644 patch/kernel/archive/rockchip64-5.15/add-board-orangepi-r1plus.patch delete mode 100644 patch/kernel/archive/rockchip64-5.15/board-nanopi-r2s-r8152-customise-leds.patch delete mode 100644 patch/kernel/archive/rockchip64-5.15/board-nanopi-r2s-r8152-mac-from-dt.patch create mode 100644 patch/kernel/archive/rockchip64-5.15/net-usb-r8152-add-LED-configuration-from-OF.patch delete mode 100644 patch/kernel/archive/rockchip64-5.15/workaround-need-proper-adjustement-for-reading-MAC-f.patch create mode 100644 patch/kernel/archive/rockchip64-5.17/add-board-orangepi-r1-plus.patch delete mode 100644 patch/kernel/archive/rockchip64-5.17/add-board-orangepi-r1plus.patch delete mode 100644 patch/kernel/archive/rockchip64-5.17/board-nanopi-r2s-r8152-customise-leds.patch delete mode 100644 patch/kernel/archive/rockchip64-5.17/board-nanopi-r2s-r8152-mac-from-dt.patch create mode 100644 patch/kernel/archive/rockchip64-5.17/net-usb-r8152-add-LED-configuration-from-OF.patch delete mode 100644 patch/kernel/archive/rockchip64-5.17/workaround-need-proper-adjustement-for-reading-MAC-f.patch create mode 100644 patch/kernel/archive/rockchip64-5.18/add-board-orangepi-r1-plus.patch delete mode 100644 patch/kernel/archive/rockchip64-5.18/add-board-orangepi-r1plus.patch delete mode 100644 patch/kernel/archive/rockchip64-5.18/board-nanopi-r2s-r8152-customise-leds.patch delete mode 100644 patch/kernel/archive/rockchip64-5.18/board-nanopi-r2s-r8152-mac-from-dt.patch create mode 100644 patch/kernel/archive/rockchip64-5.18/net-usb-r8152-add-LED-configuration-from-OF.patch delete mode 100644 patch/kernel/archive/rockchip64-5.18/workaround-need-proper-adjustement-for-reading-MAC-f.patch create mode 100644 patch/kernel/archive/rockchip64-5.19/add-board-orangepi-r1-plus.patch delete mode 100644 patch/kernel/archive/rockchip64-5.19/add-board-orangepi-r1plus.patch delete mode 100644 patch/kernel/archive/rockchip64-5.19/board-nanopi-r2s-r8152-customise-leds.patch delete mode 100644 patch/kernel/archive/rockchip64-5.19/board-nanopi-r2s-r8152-mac-from-dt.patch create mode 100644 patch/kernel/archive/rockchip64-5.19/net-usb-r8152-add-LED-configuration-from-OF.patch delete mode 100644 patch/kernel/archive/rockchip64-5.19/workaround-need-proper-adjustement-for-reading-MAC-f.patch delete mode 100644 patch/u-boot/u-boot-rockchip64/add-board-orangepi-r1-plus-.patch create mode 100644 patch/u-boot/u-boot-rockchip64/add-board-orangepi-r1-plus-0.patch diff --git a/config/boards/orangepi-r1plus.csc b/config/boards/orangepi-r1plus.conf similarity index 75% rename from config/boards/orangepi-r1plus.csc rename to config/boards/orangepi-r1plus.conf index 64ecef757..3a1202fcd 100644 --- a/config/boards/orangepi-r1plus.csc +++ b/config/boards/orangepi-r1plus.conf @@ -1,4 +1,4 @@ -# Rockchip RK3328 quad core 1GB 2xGBE USB2 SPI +# Rockchip RK3328 quad core 1GB 2 x GBE USB2 SPI BOARD_NAME="Orange Pi R1 Plus" BOARDFAMILY="rockchip64" BOOTCONFIG="orangepi_r1_plus_rk3328_defconfig" @@ -8,3 +8,4 @@ MODULES="g_serial" MODULES_BLACKLIST="rockchipdrm analogix_dp dw_mipi_dsi dw_hdmi gpu_sched lima hantro_vpu" SERIALCON="ttyS2:1500000,ttyGS0" HAS_VIDEO_OUTPUT="no" +BOOT_FDT_FILE="rockchip/rk3328-orangepi-r1-plus.dtb" diff --git a/config/targets.conf b/config/targets.conf index 20d2dcfa6..4920ac387 100644 --- a/config/targets.conf +++ b/config/targets.conf @@ -498,6 +498,12 @@ orangepi-r1 current jammy cli s orangepi-r1 edge sid cli stable yes +# orangepi R1+ +orangepi-r1plus current bullseye cli stable adv +orangepi-r1plus current jammy cli stable adv +orangepi-r1plus edge sid cli stable yes + + # Orangepi R1+ LTS orangepi-r1plus-lts current bullseye cli stable adv orangepi-r1plus-lts current jammy cli stable adv diff --git a/patch/kernel/archive/rockchip64-5.10/add-board-nanopi-r2s.patch b/patch/kernel/archive/rockchip64-5.10/add-board-nanopi-r2s.patch index 563beecf5..37d49b57d 100644 --- a/patch/kernel/archive/rockchip64-5.10/add-board-nanopi-r2s.patch +++ b/patch/kernel/archive/rockchip64-5.10/add-board-nanopi-r2s.patch @@ -320,7 +320,7 @@ new file mode 100644 index 000000000..36890bb7f --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2-common.dtsi -@@ -0,0 +1,625 @@ +@@ -0,0 +1,610 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2018 FriendlyElec Computer Tech. Co., Ltd. @@ -906,19 +906,6 @@ index 000000000..36890bb7f + status = "okay"; +}; + -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ +&usb20_otg { + status = "okay"; +}; @@ -931,18 +918,16 @@ index 000000000..36890bb7f + status = "okay"; +}; + -+ -+ -+ -+ +&usbdrd3 { ++ dr_mode = "host"; + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; -+ dr_mode = "host"; ++ + r8153: device@2 { + compatible = "usbbda,8153"; + reg = <2>; ++ realtek,led-data = <0x87>; + local-mac-address = [00 00 00 00 00 00]; + }; +}; diff --git a/patch/kernel/archive/rockchip64-5.10/add-board-orangepi-r1plus.patch b/patch/kernel/archive/rockchip64-5.10/add-board-orangepi-r1plus.patch index 0506e3b79..f22734989 100644 --- a/patch/kernel/archive/rockchip64-5.10/add-board-orangepi-r1plus.patch +++ b/patch/kernel/archive/rockchip64-5.10/add-board-orangepi-r1plus.patch @@ -3,50 +3,448 @@ new file mode 100644 index 000000000..2ee07d15a --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts -@@ -0,0 +1,46 @@ +@@ -0,0 +1,444 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+/* -+ * Copyright (c) 2020 Shenzhen Xunlong Software CO.,Limited -+ * Copyright (c) 2021 AmadeusGhost -+ * -+ * Based on Nanopi R2S -+ */ + -+#include "rk3328-nanopi-r2-rev00.dts" ++/dts-v1/; ++ ++#include ++#include ++#include "rk3328-dram-default-timing.dtsi" ++#include "rk3328.dtsi" + +/ { + model = "Xunlong Orange Pi R1 Plus"; + compatible = "xunlong,orangepi-r1-plus", "rockchip,rk3328"; -+}; + -+&leds_gpio { -+ rockchip,pins = <3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; -+}; ++ aliases { ++ ethernet1 = &rtl8153; ++ mmc0 = &sdmmc; ++ }; + -+&leds { -+ led@1 { -+ gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>; ++ chosen { ++ stdout-path = "serial2:1500000n8"; ++ }; ++ ++ gmac_clk: gmac-clock { ++ compatible = "fixed-clock"; ++ clock-frequency = <125000000>; ++ clock-output-names = "gmac_clkin"; ++ #clock-cells = <0>; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ pinctrl-0 = <&lan_led_pin>, <&sys_led_pin>, <&wan_led_pin>; ++ pinctrl-names = "default"; ++ ++ lan_led: led-0 { ++ gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>; ++ label = "orangepi-r1-plus:green:lan"; ++ }; ++ ++ sys_led: led-1 { ++ gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>; ++ label = "orangepi-r1-plus:red:status"; ++ linux,default-trigger = "heartbeat"; ++ }; ++ ++ wan_led: led-2 { ++ gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>; ++ label = "orangepi-r1-plus:green:wan"; ++ }; ++ }; ++ ++ vcc_sd: sdmmc-regulator { ++ compatible = "regulator-fixed"; ++ gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>; ++ pinctrl-0 = <&sdmmc0m1_pin>; ++ pinctrl-names = "default"; ++ regulator-name = "vcc_sd"; ++ regulator-boot-on; ++ vin-supply = <&vcc_io_33>; ++ }; ++ ++ vdd_5v: vdd-5v { ++ compatible = "regulator-fixed"; ++ regulator-name = "vdd_5v"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ }; ++ ++ vdd_5v_lan: vdd-5v-lan { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_HIGH>; ++ pinctrl-0 = <&lan_vdd_pin>; ++ pinctrl-names = "default"; ++ regulator-name = "vdd_5v_lan"; ++ regulator-always-on; ++ regulator-boot-on; ++ vin-supply = <&vdd_5v>; ++ }; ++ ++ dfi: dfi@ff790000 { ++ reg = <0x00 0xff790000 0x00 0x400>; ++ compatible = "rockchip,rk3328-dfi"; ++ rockchip,grf = <&grf>; ++ }; ++ ++ dmc: dmc { ++ compatible = "rockchip,rk3328-dmc"; ++ devfreq-events = <&dfi>; ++ center-supply = <&vdd_log>; ++ clocks = <&cru SCLK_DDRCLK>; ++ clock-names = "dmc_clk"; ++ operating-points-v2 = <&dmc_opp_table>; ++ ddr_timing = <&ddr_timing>; ++ upthreshold = <40>; ++ downdifferential = <20>; ++ auto-min-freq = <786000>; ++ auto-freq-en = <0>; ++ #cooling-cells = <2>; ++ ++ ddr_power_model: ddr_power_model { ++ compatible = "ddr_power_model"; ++ dynamic-power-coefficient = <120>; ++ static-power-coefficient = <200>; ++ ts = <32000 4700 (-80) 2>; ++ thermal-zone = "soc-thermal"; ++ }; ++ }; ++ ++ dmc_opp_table: dmc-opp-table { ++ compatible = "operating-points-v2"; ++ ++ rockchip,leakage-voltage-sel = < ++ 1 10 0 ++ 11 254 1 ++ >; ++ nvmem-cells = <&logic_leakage>; ++ nvmem-cell-names = "ddr_leakage"; ++ ++ opp-786000000 { ++ opp-hz = /bits/ 64 <786000000>; ++ opp-microvolt = <1075000>; ++ opp-microvolt-L0 = <1075000>; ++ opp-microvolt-L1 = <1050000>; ++ }; ++ opp-798000000 { ++ opp-hz = /bits/ 64 <798000000>; ++ opp-microvolt = <1075000>; ++ opp-microvolt-L0 = <1075000>; ++ opp-microvolt-L1 = <1050000>; ++ }; ++ opp-840000000 { ++ opp-hz = /bits/ 64 <840000000>; ++ opp-microvolt = <1075000>; ++ opp-microvolt-L0 = <1075000>; ++ opp-microvolt-L1 = <1050000>; ++ }; ++ opp-924000000 { ++ opp-hz = /bits/ 64 <924000000>; ++ opp-microvolt = <1100000>; ++ opp-microvolt-L0 = <1100000>; ++ opp-microvolt-L1 = <1075000>; ++ }; ++ opp-1056000000 { ++ opp-hz = /bits/ 64 <1056000000>; ++ opp-microvolt = <1175000>; ++ opp-microvolt-L0 = <1175000>; ++ opp-microvolt-L1 = <1150000>; ++ }; + }; +}; + -+&mach { -+ compatible = "orangepi,board"; -+ hwrev = <2>; -+ machine = "ORANGEPI-R1PLUS"; -+ model = "OrangePi R1PLUS"; ++&cpu0 { ++ cpu-supply = <&vdd_arm>; ++}; ++ ++&cpu1 { ++ cpu-supply = <&vdd_arm>; ++}; ++ ++&cpu2 { ++ cpu-supply = <&vdd_arm>; ++}; ++ ++&cpu3 { ++ cpu-supply = <&vdd_arm>; ++}; ++ ++&display_subsystem { ++ status = "disabled"; ++}; ++ ++&gmac2io { ++ assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>; ++ assigned-clock-parents = <&gmac_clk>, <&gmac_clk>; ++ clock_in_out = "input"; ++ phy-handle = <&rtl8211e>; ++ phy-mode = "rgmii"; ++ phy-supply = <&vcc_io_33>; ++ pinctrl-0 = <&rgmiim1_pins>; ++ pinctrl-names = "default"; ++ snps,aal; ++ rx_delay = <0x18>; ++ tx_delay = <0x24>; ++ status = "okay"; ++ ++ mdio { ++ compatible = "snps,dwmac-mdio"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ rtl8211e: ethernet-phy@1 { ++ reg = <1>; ++ pinctrl-0 = <ð_phy_reset_pin>; ++ pinctrl-names = "default"; ++ reset-assert-us = <10000>; ++ reset-deassert-us = <50000>; ++ reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; ++ }; ++ }; ++}; ++ ++&i2c0 { ++ status = "okay"; ++}; ++ ++&i2c1 { ++ status = "okay"; ++ ++ rk805: pmic@18 { ++ compatible = "rockchip,rk805"; ++ reg = <0x18>; ++ interrupt-parent = <&gpio1>; ++ interrupts = <24 IRQ_TYPE_LEVEL_LOW>; ++ #clock-cells = <1>; ++ clock-output-names = "xin32k", "rk805-clkout2"; ++ gpio-controller; ++ #gpio-cells = <2>; ++ pinctrl-0 = <&pmic_int_l>; ++ pinctrl-names = "default"; ++ rockchip,system-power-controller; ++ wakeup-source; ++ ++ vcc1-supply = <&vdd_5v>; ++ vcc2-supply = <&vdd_5v>; ++ vcc3-supply = <&vdd_5v>; ++ vcc4-supply = <&vdd_5v>; ++ vcc5-supply = <&vcc_io_33>; ++ vcc6-supply = <&vdd_5v>; ++ ++ regulators { ++ vdd_log: DCDC_REG1 { ++ regulator-name = "vdd_log"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-init-microvolt = <1075000>; ++ regulator-min-microvolt = <712500>; ++ regulator-max-microvolt = <1450000>; ++ regulator-ramp-delay = <12500>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1000000>; ++ }; ++ }; ++ ++ vdd_arm: DCDC_REG2 { ++ regulator-name = "vdd_arm"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-init-microvolt = <1225000>; ++ regulator-min-microvolt = <712500>; ++ regulator-max-microvolt = <1450000>; ++ regulator-ramp-delay = <12500>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <950000>; ++ }; ++ }; ++ ++ vcc_ddr: DCDC_REG3 { ++ regulator-name = "vcc_ddr"; ++ regulator-always-on; ++ regulator-boot-on; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ }; ++ }; ++ ++ vcc_io_33: DCDC_REG4 { ++ regulator-name = "vcc_io_33"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <3300000>; ++ }; ++ }; ++ ++ vcc_18: LDO_REG1 { ++ regulator-name = "vcc_18"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vcc18_emmc: LDO_REG2 { ++ regulator-name = "vcc18_emmc"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vdd_10: LDO_REG3 { ++ regulator-name = "vdd_10"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1000000>; ++ regulator-max-microvolt = <1000000>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1000000>; ++ }; ++ }; ++ }; ++ }; ++}; ++ ++&io_domains { ++ pmuio-supply = <&vcc_io_33>; ++ vccio1-supply = <&vcc_io_33>; ++ vccio2-supply = <&vcc18_emmc>; ++ vccio3-supply = <&vcc_io_33>; ++ vccio4-supply = <&vcc_io_33>; ++ vccio5-supply = <&vcc_io_33>; ++ vccio6-supply = <&vcc_io_33>; ++ status = "okay"; ++}; ++ ++&pinctrl { ++ gmac2io { ++ eth_phy_reset_pin: eth-phy-reset-pin { ++ rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>; ++ }; ++ }; ++ ++ leds { ++ lan_led_pin: lan-led-pin { ++ rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ sys_led_pin: sys-led-pin { ++ rockchip,pins = <3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ wan_led_pin: wan-led-pin { ++ rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ lan { ++ lan_vdd_pin: lan-vdd-pin { ++ rockchip,pins = <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ pmic { ++ pmic_int_l: pmic-int-l { ++ rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++}; ++ ++&pwm2 { ++ status = "okay"; ++}; ++ ++&sdmmc { ++ bus-width = <4>; ++ cap-sd-highspeed; ++ disable-wp; ++ pinctrl-0 = <&sdmmc0_clk>, <&sdmmc0_cmd>, <&sdmmc0_dectn>, <&sdmmc0_bus4>; ++ pinctrl-names = "default"; ++ vmmc-supply = <&vcc_sd>; ++ status = "okay"; +}; + +&spi0 { -+ max-freq = <48000000>; + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; -+ spi-max-frequency = <10000000>; ++ spi-max-frequency = <50000000>; + }; +}; + -+&uart1 { ++&tsadc { ++ rockchip,hw-tshut-mode = <0>; ++ rockchip,hw-tshut-polarity = <0>; ++ status = "okay"; ++}; ++ ++&u2phy { ++ status = "okay"; ++}; ++ ++&u2phy_host { ++ status = "okay"; ++}; ++ ++&u2phy_otg { ++ status = "okay"; ++}; ++ ++&uart2 { ++ status = "okay"; ++}; ++ ++&usb20_otg { ++ status = "okay"; ++ dr_mode = "host"; ++}; ++ ++&usbdrd3 { ++ dr_mode = "host"; ++ status = "okay"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ rtl8153: device@2 { ++ compatible = "usbbda,8153"; ++ reg = <2>; ++ realtek,led-data = <0x87>; ++ }; ++}; ++ ++&usb_host0_ehci { ++ status = "okay"; ++}; ++ ++&usb_host0_ohci { + status = "okay"; +}; diff --git a/patch/kernel/archive/rockchip64-5.10/board-nanopi-r2s-r8152-customise-leds.patch b/patch/kernel/archive/rockchip64-5.10/board-nanopi-r2s-r8152-customise-leds.patch deleted file mode 100644 index eea0c9763..000000000 --- a/patch/kernel/archive/rockchip64-5.10/board-nanopi-r2s-r8152-customise-leds.patch +++ /dev/null @@ -1,36 +0,0 @@ -From 2d4f786f94b331904682c24a792462726d474007 Mon Sep 17 00:00:00 2001 -From: hmz007 -Date: Mon, 23 Dec 2019 13:10:06 +0800 -Subject: [PATCH] r8152: Add module param for customized LEDs - -Signed-off-by: hmz007 ---- - drivers/net/usb/r8152.c | 8 ++++++++ - 1 file changed, 8 insertions(+) - -diff --git a/drivers/net/usb/r8152.c b/drivers/net/usb/r8152.c -index eb78f6d9390c..ec737fffcded 100644 ---- a/drivers/net/usb/r8152.c -+++ b/drivers/net/usb/r8152.c -@@ -37,6 +37,11 @@ - #define DRIVER_DESC "Realtek RTL8152/RTL8153 Based USB Ethernet Adapters" - #define MODULENAME "r8152" - -+/* LED0: Activity, LED1: Link */ -+static int ledsel = 0x78; -+module_param(ledsel, int, 0); -+MODULE_PARM_DESC(ledsel, "Override default LED configuration"); -+ - #define R8152_PHY_ID 32 - - #define PLA_IDR 0xc000 -@@ -4545,6 +4550,9 @@ static void r8153b_init(struct r8152 *tp) - ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN); - ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data); - -+ /* set customized led */ -+ ocp_write_word(tp, MCU_TYPE_PLA, PLA_LEDSEL, ledsel); -+ - rtl_tally_reset(tp); - - tp->coalesce = 15000; /* 15 us */ diff --git a/patch/kernel/archive/rockchip64-5.10/board-nanopi-r2s-r8152-mac-from-dt.patch b/patch/kernel/archive/rockchip64-5.10/board-nanopi-r2s-r8152-mac-from-dt.patch deleted file mode 100644 index 4040e88f0..000000000 --- a/patch/kernel/archive/rockchip64-5.10/board-nanopi-r2s-r8152-mac-from-dt.patch +++ /dev/null @@ -1,40 +0,0 @@ -From 27dfe6f4347e883fd618d5a37500c7f6d3652fb9 Mon Sep 17 00:00:00 2001 -From: hmz007 -Date: Fri, 22 Nov 2019 19:03:00 +0800 -Subject: [PATCH] r8152: support to get MAC address from device tree - -Signed-off-by: hmz007 ---- - drivers/net/usb/r8152.c | 12 ++++++++++++ - 1 file changed, 12 insertions(+) - -diff --git a/drivers/net/usb/r8152.c b/drivers/net/usb/r8152.c -index b2507c59ba8b..eb78f6d9390c 100644 ---- a/drivers/net/usb/r8152.c -+++ b/drivers/net/usb/r8152.c -@@ -6,6 +6,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -1298,6 +1299,17 @@ static int determine_ethernet_addr(struct r8152 *tp, struct sockaddr *sa) - if (ret < 0) { - netif_err(tp, probe, dev, "Get ether addr fail\n"); - } else if (!is_valid_ether_addr(sa->sa_data)) { -+ /* try to get MAC address from DT */ -+ if (tp->udev->dev.of_node) { -+ const u8 *mac = of_get_mac_address(tp->udev->dev.of_node); -+ if (!IS_ERR(mac) && is_valid_ether_addr(mac)) { -+ ether_addr_copy(sa->sa_data, mac); -+ netif_info(tp, probe, dev, "DT mac addr %pM\n", -+ sa->sa_data); -+ return 0; -+ } -+ } -+ - netif_err(tp, probe, dev, "Invalid ether addr %pM\n", - sa->sa_data); - eth_hw_addr_random(dev); diff --git a/patch/kernel/archive/rockchip64-5.10/net-usb-r8152-add-LED-configuration-from-OF.patch b/patch/kernel/archive/rockchip64-5.10/net-usb-r8152-add-LED-configuration-from-OF.patch new file mode 100644 index 000000000..79e8f55e5 --- /dev/null +++ b/patch/kernel/archive/rockchip64-5.10/net-usb-r8152-add-LED-configuration-from-OF.patch @@ -0,0 +1,74 @@ +From 82985725e071f2a5735052f18e109a32aeac3a0b Mon Sep 17 00:00:00 2001 +From: David Bauer +Date: Sun, 26 Jul 2020 02:38:31 +0200 +Subject: [PATCH] net: usb: r8152: add LED configuration from OF + +This adds the ability to configure the LED configuration register using +OF. This way, the correct value for board specific LED configuration can +be determined. + +Signed-off-by: David Bauer +--- + drivers/net/usb/r8152.c | 23 +++++++++++++++++++++++ + 1 file changed, 23 insertions(+) + +--- a/drivers/net/usb/r8152.c ++++ b/drivers/net/usb/r8152.c +@@ -11,6 +11,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -6780,6 +6781,22 @@ static void rtl_tally_reset(struct r8152 + ocp_write_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY, ocp_data); + } + ++static int r8152_led_configuration(struct r8152 *tp) ++{ ++ u32 led_data; ++ int ret; ++ ++ ret = of_property_read_u32(tp->udev->dev.of_node, "realtek,led-data", ++ &led_data); ++ ++ if (ret) ++ return ret; ++ ++ ocp_write_word(tp, MCU_TYPE_PLA, PLA_LEDSEL, led_data); ++ ++ return 0; ++} ++ + static void r8152b_init(struct r8152 *tp) + { + u32 ocp_data; +@@ -6821,6 +6838,8 @@ static void r8152b_init(struct r8152 *tp + ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL); + ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN); + ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data); ++ ++ r8152_led_configuration(tp); + } + + static void r8153_init(struct r8152 *tp) +@@ -6961,6 +6980,8 @@ static void r8153_init(struct r8152 *tp) + tp->coalesce = COALESCE_SLOW; + break; + } ++ ++ r8152_led_configuration(tp); + } + + static void r8153b_init(struct r8152 *tp) +@@ -7043,6 +7064,8 @@ static void r8153b_init(struct r8152 *tp + rtl_tally_reset(tp); + + tp->coalesce = 15000; /* 15 us */ ++ ++ r8152_led_configuration(tp); + } + + static void r8153c_init(struct r8152 *tp) diff --git a/patch/kernel/archive/rockchip64-5.12/add-board-orangepi-r1plus.patch b/patch/kernel/archive/rockchip64-5.12/add-board-orangepi-r1plus.patch index 0506e3b79..41d41f74f 100644 --- a/patch/kernel/archive/rockchip64-5.12/add-board-orangepi-r1plus.patch +++ b/patch/kernel/archive/rockchip64-5.12/add-board-orangepi-r1plus.patch @@ -3,50 +3,448 @@ new file mode 100644 index 000000000..2ee07d15a --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts -@@ -0,0 +1,46 @@ +@@ -0,0 +1,444 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+/* -+ * Copyright (c) 2020 Shenzhen Xunlong Software CO.,Limited -+ * Copyright (c) 2021 AmadeusGhost -+ * -+ * Based on Nanopi R2S -+ */ + -+#include "rk3328-nanopi-r2-rev00.dts" ++/dts-v1/; ++ ++#include ++#include ++#include "rk3328-dram-default-timing.dtsi" ++#include "rk3328.dtsi" + +/ { + model = "Xunlong Orange Pi R1 Plus"; + compatible = "xunlong,orangepi-r1-plus", "rockchip,rk3328"; -+}; + -+&leds_gpio { -+ rockchip,pins = <3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; -+}; ++ aliases { ++ ethernet1 = &rtl8153; ++ mmc0 = &sdmmc; ++ }; + -+&leds { -+ led@1 { -+ gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>; ++ chosen { ++ stdout-path = "serial2:1500000n8"; ++ }; ++ ++ gmac_clk: gmac-clock { ++ compatible = "fixed-clock"; ++ clock-frequency = <125000000>; ++ clock-output-names = "gmac_clkin"; ++ #clock-cells = <0>; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ pinctrl-0 = <&lan_led_pin>, <&sys_led_pin>, <&wan_led_pin>; ++ pinctrl-names = "default"; ++ ++ lan_led: led-0 { ++ gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>; ++ label = "orangepi-r1-plus:green:lan"; ++ }; ++ ++ sys_led: led-1 { ++ gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>; ++ label = "orangepi-r1-plus:red:status"; ++ linux,default-trigger = "heartbeat"; ++ }; ++ ++ wan_led: led-2 { ++ gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>; ++ label = "orangepi-r1-plus:green:wan"; ++ }; ++ }; ++ ++ vcc_sd: sdmmc-regulator { ++ compatible = "regulator-fixed"; ++ gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>; ++ pinctrl-0 = <&sdmmc0m1_pin>; ++ pinctrl-names = "default"; ++ regulator-name = "vcc_sd"; ++ regulator-boot-on; ++ vin-supply = <&vcc_io_33>; ++ }; ++ ++ vdd_5v: vdd-5v { ++ compatible = "regulator-fixed"; ++ regulator-name = "vdd_5v"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ }; ++ ++ vdd_5v_lan: vdd-5v-lan { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_HIGH>; ++ pinctrl-0 = <&lan_vdd_pin>; ++ pinctrl-names = "default"; ++ regulator-name = "vdd_5v_lan"; ++ regulator-always-on; ++ regulator-boot-on; ++ vin-supply = <&vdd_5v>; ++ }; ++ ++ dfi: dfi@ff790000 { ++ reg = <0x00 0xff790000 0x00 0x400>; ++ compatible = "rockchip,rk3328-dfi"; ++ rockchip,grf = <&grf>; ++ }; ++ ++ dmc: dmc { ++ compatible = "rockchip,rk3328-dmc"; ++ devfreq-events = <&dfi>; ++ center-supply = <&vdd_log>; ++ clocks = <&cru SCLK_DDRCLK>; ++ clock-names = "dmc_clk"; ++ operating-points-v2 = <&dmc_opp_table>; ++ ddr_timing = <&ddr_timing>; ++ upthreshold = <40>; ++ downdifferential = <20>; ++ auto-min-freq = <786000>; ++ auto-freq-en = <0>; ++ #cooling-cells = <2>; ++ ++ ddr_power_model: ddr_power_model { ++ compatible = "ddr_power_model"; ++ dynamic-power-coefficient = <120>; ++ static-power-coefficient = <200>; ++ ts = <32000 4700 (-80) 2>; ++ thermal-zone = "soc-thermal"; ++ }; ++ }; ++ ++ dmc_opp_table: dmc-opp-table { ++ compatible = "operating-points-v2"; ++ ++ rockchip,leakage-voltage-sel = < ++ 1 10 0 ++ 11 254 1 ++ >; ++ nvmem-cells = <&logic_leakage>; ++ nvmem-cell-names = "ddr_leakage"; ++ ++ opp-786000000 { ++ opp-hz = /bits/ 64 <786000000>; ++ opp-microvolt = <1075000>; ++ opp-microvolt-L0 = <1075000>; ++ opp-microvolt-L1 = <1050000>; ++ }; ++ opp-798000000 { ++ opp-hz = /bits/ 64 <798000000>; ++ opp-microvolt = <1075000>; ++ opp-microvolt-L0 = <1075000>; ++ opp-microvolt-L1 = <1050000>; ++ }; ++ opp-840000000 { ++ opp-hz = /bits/ 64 <840000000>; ++ opp-microvolt = <1075000>; ++ opp-microvolt-L0 = <1075000>; ++ opp-microvolt-L1 = <1050000>; ++ }; ++ opp-924000000 { ++ opp-hz = /bits/ 64 <924000000>; ++ opp-microvolt = <1100000>; ++ opp-microvolt-L0 = <1100000>; ++ opp-microvolt-L1 = <1075000>; ++ }; ++ opp-1056000000 { ++ opp-hz = /bits/ 64 <1056000000>; ++ opp-microvolt = <1175000>; ++ opp-microvolt-L0 = <1175000>; ++ opp-microvolt-L1 = <1150000>; ++ }; + }; +}; + -+&mach { -+ compatible = "orangepi,board"; -+ hwrev = <2>; -+ machine = "ORANGEPI-R1PLUS"; -+ model = "OrangePi R1PLUS"; ++&cpu0 { ++ cpu-supply = <&vdd_arm>; ++}; ++ ++&cpu1 { ++ cpu-supply = <&vdd_arm>; ++}; ++ ++&cpu2 { ++ cpu-supply = <&vdd_arm>; ++}; ++ ++&cpu3 { ++ cpu-supply = <&vdd_arm>; ++}; ++ ++&display_subsystem { ++ status = "disabled"; ++}; ++ ++&gmac2io { ++ assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>; ++ assigned-clock-parents = <&gmac_clk>, <&gmac_clk>; ++ clock_in_out = "input"; ++ phy-handle = <&rtl8211e>; ++ phy-mode = "rgmii"; ++ phy-supply = <&vcc_io_33>; ++ pinctrl-0 = <&rgmiim1_pins>; ++ pinctrl-names = "default"; ++ snps,aal; ++ rx_delay = <0x18>; ++ tx_delay = <0x24>; ++ status = "okay"; ++ ++ mdio { ++ compatible = "snps,dwmac-mdio"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ rtl8211e: ethernet-phy@1 { ++ reg = <1>; ++ pinctrl-0 = <ð_phy_reset_pin>; ++ pinctrl-names = "default"; ++ reset-assert-us = <10000>; ++ reset-deassert-us = <50000>; ++ reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; ++ }; ++ }; ++}; ++ ++&i2c1 { ++ status = "okay"; ++ ++ rk805: pmic@18 { ++ compatible = "rockchip,rk805"; ++ reg = <0x18>; ++ interrupt-parent = <&gpio1>; ++ interrupts = <24 IRQ_TYPE_LEVEL_LOW>; ++ #clock-cells = <1>; ++ clock-output-names = "xin32k", "rk805-clkout2"; ++ gpio-controller; ++ #gpio-cells = <2>; ++ pinctrl-0 = <&pmic_int_l>; ++ pinctrl-names = "default"; ++ rockchip,system-power-controller; ++ wakeup-source; ++ ++ vcc1-supply = <&vdd_5v>; ++ vcc2-supply = <&vdd_5v>; ++ vcc3-supply = <&vdd_5v>; ++ vcc4-supply = <&vdd_5v>; ++ vcc5-supply = <&vcc_io_33>; ++ vcc6-supply = <&vdd_5v>; ++ ++ regulators { ++ vdd_log: DCDC_REG1 { ++ regulator-name = "vdd_log"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-init-microvolt = <1075000>; ++ regulator-min-microvolt = <712500>; ++ regulator-max-microvolt = <1450000>; ++ regulator-ramp-delay = <12500>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1000000>; ++ }; ++ }; ++ ++ vdd_arm: DCDC_REG2 { ++ regulator-name = "vdd_arm"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-init-microvolt = <1225000>; ++ regulator-min-microvolt = <712500>; ++ regulator-max-microvolt = <1450000>; ++ regulator-ramp-delay = <12500>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <950000>; ++ }; ++ }; ++ ++ vcc_ddr: DCDC_REG3 { ++ regulator-name = "vcc_ddr"; ++ regulator-always-on; ++ regulator-boot-on; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ }; ++ }; ++ ++ vcc_io_33: DCDC_REG4 { ++ regulator-name = "vcc_io_33"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <3300000>; ++ }; ++ }; ++ ++ vcc_18: LDO_REG1 { ++ regulator-name = "vcc_18"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vcc18_emmc: LDO_REG2 { ++ regulator-name = "vcc18_emmc"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vdd_10: LDO_REG3 { ++ regulator-name = "vdd_10"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1000000>; ++ regulator-max-microvolt = <1000000>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1000000>; ++ }; ++ }; ++ }; ++ }; ++}; ++ ++&io_domains { ++ pmuio-supply = <&vcc_io_33>; ++ vccio1-supply = <&vcc_io_33>; ++ vccio2-supply = <&vcc18_emmc>; ++ vccio3-supply = <&vcc_io_33>; ++ vccio4-supply = <&vcc_io_33>; ++ vccio5-supply = <&vcc_io_33>; ++ vccio6-supply = <&vcc_io_33>; ++ status = "okay"; ++}; ++ ++&pinctrl { ++ gmac2io { ++ eth_phy_reset_pin: eth-phy-reset-pin { ++ rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>; ++ }; ++ }; ++ ++ leds { ++ lan_led_pin: lan-led-pin { ++ rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ sys_led_pin: sys-led-pin { ++ rockchip,pins = <3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ wan_led_pin: wan-led-pin { ++ rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ lan { ++ lan_vdd_pin: lan-vdd-pin { ++ rockchip,pins = <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ pmic { ++ pmic_int_l: pmic-int-l { ++ rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++}; ++ ++&pwm2 { ++ status = "okay"; ++}; ++ ++&sdmmc { ++ bus-width = <4>; ++ cap-sd-highspeed; ++ disable-wp; ++ pinctrl-0 = <&sdmmc0_clk>, <&sdmmc0_cmd>, <&sdmmc0_dectn>, <&sdmmc0_bus4>; ++ pinctrl-names = "default"; ++ vmmc-supply = <&vcc_sd>; ++ status = "okay"; +}; + +&spi0 { -+ max-freq = <48000000>; + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; -+ spi-max-frequency = <10000000>; ++ spi-max-frequency = <50000000>; + }; +}; + -+&uart1 { ++&tsadc { ++ rockchip,hw-tshut-mode = <0>; ++ rockchip,hw-tshut-polarity = <0>; ++ status = "okay"; ++}; ++ ++&u2phy { ++ status = "okay"; ++}; ++ ++&u2phy_host { ++ status = "okay"; ++}; ++ ++&u2phy_otg { ++ status = "okay"; ++}; ++ ++&uart2 { ++ status = "okay"; ++}; ++ ++&usb20_otg { ++ status = "okay"; ++ dr_mode = "host"; ++}; ++ ++&usbdrd3 { ++ status = "okay"; ++}; ++ ++&usbdrd_dwc3 { ++ dr_mode = "host"; ++ status = "okay"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ rtl8153: device@2 { ++ compatible = "usbbda,8153"; ++ reg = <2>; ++ realtek,led-data = <0x87>; ++ }; ++}; ++ ++&usb_host0_ehci { ++ status = "okay"; ++}; ++ ++&usb_host0_ohci { + status = "okay"; +}; diff --git a/patch/kernel/archive/rockchip64-5.13/add-board-orangepi-r1plus.patch b/patch/kernel/archive/rockchip64-5.13/add-board-orangepi-r1plus.patch index 0506e3b79..41d41f74f 100644 --- a/patch/kernel/archive/rockchip64-5.13/add-board-orangepi-r1plus.patch +++ b/patch/kernel/archive/rockchip64-5.13/add-board-orangepi-r1plus.patch @@ -3,50 +3,448 @@ new file mode 100644 index 000000000..2ee07d15a --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts -@@ -0,0 +1,46 @@ +@@ -0,0 +1,444 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+/* -+ * Copyright (c) 2020 Shenzhen Xunlong Software CO.,Limited -+ * Copyright (c) 2021 AmadeusGhost -+ * -+ * Based on Nanopi R2S -+ */ + -+#include "rk3328-nanopi-r2-rev00.dts" ++/dts-v1/; ++ ++#include ++#include ++#include "rk3328-dram-default-timing.dtsi" ++#include "rk3328.dtsi" + +/ { + model = "Xunlong Orange Pi R1 Plus"; + compatible = "xunlong,orangepi-r1-plus", "rockchip,rk3328"; -+}; + -+&leds_gpio { -+ rockchip,pins = <3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; -+}; ++ aliases { ++ ethernet1 = &rtl8153; ++ mmc0 = &sdmmc; ++ }; + -+&leds { -+ led@1 { -+ gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>; ++ chosen { ++ stdout-path = "serial2:1500000n8"; ++ }; ++ ++ gmac_clk: gmac-clock { ++ compatible = "fixed-clock"; ++ clock-frequency = <125000000>; ++ clock-output-names = "gmac_clkin"; ++ #clock-cells = <0>; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ pinctrl-0 = <&lan_led_pin>, <&sys_led_pin>, <&wan_led_pin>; ++ pinctrl-names = "default"; ++ ++ lan_led: led-0 { ++ gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>; ++ label = "orangepi-r1-plus:green:lan"; ++ }; ++ ++ sys_led: led-1 { ++ gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>; ++ label = "orangepi-r1-plus:red:status"; ++ linux,default-trigger = "heartbeat"; ++ }; ++ ++ wan_led: led-2 { ++ gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>; ++ label = "orangepi-r1-plus:green:wan"; ++ }; ++ }; ++ ++ vcc_sd: sdmmc-regulator { ++ compatible = "regulator-fixed"; ++ gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>; ++ pinctrl-0 = <&sdmmc0m1_pin>; ++ pinctrl-names = "default"; ++ regulator-name = "vcc_sd"; ++ regulator-boot-on; ++ vin-supply = <&vcc_io_33>; ++ }; ++ ++ vdd_5v: vdd-5v { ++ compatible = "regulator-fixed"; ++ regulator-name = "vdd_5v"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ }; ++ ++ vdd_5v_lan: vdd-5v-lan { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_HIGH>; ++ pinctrl-0 = <&lan_vdd_pin>; ++ pinctrl-names = "default"; ++ regulator-name = "vdd_5v_lan"; ++ regulator-always-on; ++ regulator-boot-on; ++ vin-supply = <&vdd_5v>; ++ }; ++ ++ dfi: dfi@ff790000 { ++ reg = <0x00 0xff790000 0x00 0x400>; ++ compatible = "rockchip,rk3328-dfi"; ++ rockchip,grf = <&grf>; ++ }; ++ ++ dmc: dmc { ++ compatible = "rockchip,rk3328-dmc"; ++ devfreq-events = <&dfi>; ++ center-supply = <&vdd_log>; ++ clocks = <&cru SCLK_DDRCLK>; ++ clock-names = "dmc_clk"; ++ operating-points-v2 = <&dmc_opp_table>; ++ ddr_timing = <&ddr_timing>; ++ upthreshold = <40>; ++ downdifferential = <20>; ++ auto-min-freq = <786000>; ++ auto-freq-en = <0>; ++ #cooling-cells = <2>; ++ ++ ddr_power_model: ddr_power_model { ++ compatible = "ddr_power_model"; ++ dynamic-power-coefficient = <120>; ++ static-power-coefficient = <200>; ++ ts = <32000 4700 (-80) 2>; ++ thermal-zone = "soc-thermal"; ++ }; ++ }; ++ ++ dmc_opp_table: dmc-opp-table { ++ compatible = "operating-points-v2"; ++ ++ rockchip,leakage-voltage-sel = < ++ 1 10 0 ++ 11 254 1 ++ >; ++ nvmem-cells = <&logic_leakage>; ++ nvmem-cell-names = "ddr_leakage"; ++ ++ opp-786000000 { ++ opp-hz = /bits/ 64 <786000000>; ++ opp-microvolt = <1075000>; ++ opp-microvolt-L0 = <1075000>; ++ opp-microvolt-L1 = <1050000>; ++ }; ++ opp-798000000 { ++ opp-hz = /bits/ 64 <798000000>; ++ opp-microvolt = <1075000>; ++ opp-microvolt-L0 = <1075000>; ++ opp-microvolt-L1 = <1050000>; ++ }; ++ opp-840000000 { ++ opp-hz = /bits/ 64 <840000000>; ++ opp-microvolt = <1075000>; ++ opp-microvolt-L0 = <1075000>; ++ opp-microvolt-L1 = <1050000>; ++ }; ++ opp-924000000 { ++ opp-hz = /bits/ 64 <924000000>; ++ opp-microvolt = <1100000>; ++ opp-microvolt-L0 = <1100000>; ++ opp-microvolt-L1 = <1075000>; ++ }; ++ opp-1056000000 { ++ opp-hz = /bits/ 64 <1056000000>; ++ opp-microvolt = <1175000>; ++ opp-microvolt-L0 = <1175000>; ++ opp-microvolt-L1 = <1150000>; ++ }; + }; +}; + -+&mach { -+ compatible = "orangepi,board"; -+ hwrev = <2>; -+ machine = "ORANGEPI-R1PLUS"; -+ model = "OrangePi R1PLUS"; ++&cpu0 { ++ cpu-supply = <&vdd_arm>; ++}; ++ ++&cpu1 { ++ cpu-supply = <&vdd_arm>; ++}; ++ ++&cpu2 { ++ cpu-supply = <&vdd_arm>; ++}; ++ ++&cpu3 { ++ cpu-supply = <&vdd_arm>; ++}; ++ ++&display_subsystem { ++ status = "disabled"; ++}; ++ ++&gmac2io { ++ assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>; ++ assigned-clock-parents = <&gmac_clk>, <&gmac_clk>; ++ clock_in_out = "input"; ++ phy-handle = <&rtl8211e>; ++ phy-mode = "rgmii"; ++ phy-supply = <&vcc_io_33>; ++ pinctrl-0 = <&rgmiim1_pins>; ++ pinctrl-names = "default"; ++ snps,aal; ++ rx_delay = <0x18>; ++ tx_delay = <0x24>; ++ status = "okay"; ++ ++ mdio { ++ compatible = "snps,dwmac-mdio"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ rtl8211e: ethernet-phy@1 { ++ reg = <1>; ++ pinctrl-0 = <ð_phy_reset_pin>; ++ pinctrl-names = "default"; ++ reset-assert-us = <10000>; ++ reset-deassert-us = <50000>; ++ reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; ++ }; ++ }; ++}; ++ ++&i2c1 { ++ status = "okay"; ++ ++ rk805: pmic@18 { ++ compatible = "rockchip,rk805"; ++ reg = <0x18>; ++ interrupt-parent = <&gpio1>; ++ interrupts = <24 IRQ_TYPE_LEVEL_LOW>; ++ #clock-cells = <1>; ++ clock-output-names = "xin32k", "rk805-clkout2"; ++ gpio-controller; ++ #gpio-cells = <2>; ++ pinctrl-0 = <&pmic_int_l>; ++ pinctrl-names = "default"; ++ rockchip,system-power-controller; ++ wakeup-source; ++ ++ vcc1-supply = <&vdd_5v>; ++ vcc2-supply = <&vdd_5v>; ++ vcc3-supply = <&vdd_5v>; ++ vcc4-supply = <&vdd_5v>; ++ vcc5-supply = <&vcc_io_33>; ++ vcc6-supply = <&vdd_5v>; ++ ++ regulators { ++ vdd_log: DCDC_REG1 { ++ regulator-name = "vdd_log"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-init-microvolt = <1075000>; ++ regulator-min-microvolt = <712500>; ++ regulator-max-microvolt = <1450000>; ++ regulator-ramp-delay = <12500>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1000000>; ++ }; ++ }; ++ ++ vdd_arm: DCDC_REG2 { ++ regulator-name = "vdd_arm"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-init-microvolt = <1225000>; ++ regulator-min-microvolt = <712500>; ++ regulator-max-microvolt = <1450000>; ++ regulator-ramp-delay = <12500>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <950000>; ++ }; ++ }; ++ ++ vcc_ddr: DCDC_REG3 { ++ regulator-name = "vcc_ddr"; ++ regulator-always-on; ++ regulator-boot-on; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ }; ++ }; ++ ++ vcc_io_33: DCDC_REG4 { ++ regulator-name = "vcc_io_33"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <3300000>; ++ }; ++ }; ++ ++ vcc_18: LDO_REG1 { ++ regulator-name = "vcc_18"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vcc18_emmc: LDO_REG2 { ++ regulator-name = "vcc18_emmc"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vdd_10: LDO_REG3 { ++ regulator-name = "vdd_10"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1000000>; ++ regulator-max-microvolt = <1000000>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1000000>; ++ }; ++ }; ++ }; ++ }; ++}; ++ ++&io_domains { ++ pmuio-supply = <&vcc_io_33>; ++ vccio1-supply = <&vcc_io_33>; ++ vccio2-supply = <&vcc18_emmc>; ++ vccio3-supply = <&vcc_io_33>; ++ vccio4-supply = <&vcc_io_33>; ++ vccio5-supply = <&vcc_io_33>; ++ vccio6-supply = <&vcc_io_33>; ++ status = "okay"; ++}; ++ ++&pinctrl { ++ gmac2io { ++ eth_phy_reset_pin: eth-phy-reset-pin { ++ rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>; ++ }; ++ }; ++ ++ leds { ++ lan_led_pin: lan-led-pin { ++ rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ sys_led_pin: sys-led-pin { ++ rockchip,pins = <3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ wan_led_pin: wan-led-pin { ++ rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ lan { ++ lan_vdd_pin: lan-vdd-pin { ++ rockchip,pins = <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ pmic { ++ pmic_int_l: pmic-int-l { ++ rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++}; ++ ++&pwm2 { ++ status = "okay"; ++}; ++ ++&sdmmc { ++ bus-width = <4>; ++ cap-sd-highspeed; ++ disable-wp; ++ pinctrl-0 = <&sdmmc0_clk>, <&sdmmc0_cmd>, <&sdmmc0_dectn>, <&sdmmc0_bus4>; ++ pinctrl-names = "default"; ++ vmmc-supply = <&vcc_sd>; ++ status = "okay"; +}; + +&spi0 { -+ max-freq = <48000000>; + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; -+ spi-max-frequency = <10000000>; ++ spi-max-frequency = <50000000>; + }; +}; + -+&uart1 { ++&tsadc { ++ rockchip,hw-tshut-mode = <0>; ++ rockchip,hw-tshut-polarity = <0>; ++ status = "okay"; ++}; ++ ++&u2phy { ++ status = "okay"; ++}; ++ ++&u2phy_host { ++ status = "okay"; ++}; ++ ++&u2phy_otg { ++ status = "okay"; ++}; ++ ++&uart2 { ++ status = "okay"; ++}; ++ ++&usb20_otg { ++ status = "okay"; ++ dr_mode = "host"; ++}; ++ ++&usbdrd3 { ++ status = "okay"; ++}; ++ ++&usbdrd_dwc3 { ++ dr_mode = "host"; ++ status = "okay"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ rtl8153: device@2 { ++ compatible = "usbbda,8153"; ++ reg = <2>; ++ realtek,led-data = <0x87>; ++ }; ++}; ++ ++&usb_host0_ehci { ++ status = "okay"; ++}; ++ ++&usb_host0_ohci { + status = "okay"; +}; diff --git a/patch/kernel/archive/rockchip64-5.13/board-nanopi-r2s-r8152-mac-from-dt.patch b/patch/kernel/archive/rockchip64-5.13/board-nanopi-r2s-r8152-mac-from-dt.patch deleted file mode 100644 index 4040e88f0..000000000 --- a/patch/kernel/archive/rockchip64-5.13/board-nanopi-r2s-r8152-mac-from-dt.patch +++ /dev/null @@ -1,40 +0,0 @@ -From 27dfe6f4347e883fd618d5a37500c7f6d3652fb9 Mon Sep 17 00:00:00 2001 -From: hmz007 -Date: Fri, 22 Nov 2019 19:03:00 +0800 -Subject: [PATCH] r8152: support to get MAC address from device tree - -Signed-off-by: hmz007 ---- - drivers/net/usb/r8152.c | 12 ++++++++++++ - 1 file changed, 12 insertions(+) - -diff --git a/drivers/net/usb/r8152.c b/drivers/net/usb/r8152.c -index b2507c59ba8b..eb78f6d9390c 100644 ---- a/drivers/net/usb/r8152.c -+++ b/drivers/net/usb/r8152.c -@@ -6,6 +6,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -1298,6 +1299,17 @@ static int determine_ethernet_addr(struct r8152 *tp, struct sockaddr *sa) - if (ret < 0) { - netif_err(tp, probe, dev, "Get ether addr fail\n"); - } else if (!is_valid_ether_addr(sa->sa_data)) { -+ /* try to get MAC address from DT */ -+ if (tp->udev->dev.of_node) { -+ const u8 *mac = of_get_mac_address(tp->udev->dev.of_node); -+ if (!IS_ERR(mac) && is_valid_ether_addr(mac)) { -+ ether_addr_copy(sa->sa_data, mac); -+ netif_info(tp, probe, dev, "DT mac addr %pM\n", -+ sa->sa_data); -+ return 0; -+ } -+ } -+ - netif_err(tp, probe, dev, "Invalid ether addr %pM\n", - sa->sa_data); - eth_hw_addr_random(dev); diff --git a/patch/kernel/archive/rockchip64-5.13/workaround-need-proper-adjustement-for-reading-MAC-f.patch b/patch/kernel/archive/rockchip64-5.13/workaround-need-proper-adjustement-for-reading-MAC-f.patch deleted file mode 100644 index fa61ca657..000000000 --- a/patch/kernel/archive/rockchip64-5.13/workaround-need-proper-adjustement-for-reading-MAC-f.patch +++ /dev/null @@ -1,42 +0,0 @@ -From c89579702f2848b9870ae78481a2a89bb06d7837 Mon Sep 17 00:00:00 2001 -From: Igor Pecovnik -Date: Wed, 21 Jul 2021 20:35:07 +0000 -Subject: [PATCH] Workaround - need proper adjustement for reading MAC from DT - -Signed-off-by: Igor Pecovnik ---- - drivers/net/usb/r8152.c | 18 +++++++++--------- - 1 file changed, 9 insertions(+), 9 deletions(-) - -diff --git a/drivers/net/usb/r8152.c b/drivers/net/usb/r8152.c -index 02ac27bd3..d6f05d590 100644 ---- a/drivers/net/usb/r8152.c -+++ b/drivers/net/usb/r8152.c -@@ -1691,15 +1691,15 @@ static int determine_ethernet_addr(struct r8152 *tp, struct sockaddr *sa) - netif_err(tp, probe, dev, "Get ether addr fail\n"); - } else if (!is_valid_ether_addr(sa->sa_data)) { - /* try to get MAC address from DT */ -- if (tp->udev->dev.of_node) { -- const u8 *mac = of_get_mac_address(tp->udev->dev.of_node); -- if (!IS_ERR(mac) && is_valid_ether_addr(mac)) { -- ether_addr_copy(sa->sa_data, mac); -- netif_info(tp, probe, dev, "DT mac addr %pM\n", -- sa->sa_data); -- return 0; -- } -- } -+// if (tp->udev->dev.of_node) { -+// const u8 *mac = of_get_mac_address(tp->udev->dev.of_node); -+// if (!IS_ERR(mac) && is_valid_ether_addr(mac)) { -+// ether_addr_copy(sa->sa_data, mac); -+// netif_info(tp, probe, dev, "DT mac addr %pM\n", -+// sa->sa_data); -+// return 0; -+// } -+// } - - netif_err(tp, probe, dev, "Invalid ether addr %pM\n", - sa->sa_data); --- -Created with Armbian build tools https://github.com/armbian/build - diff --git a/patch/kernel/archive/rockchip64-5.14/add-board-nanopi-r2s.patch b/patch/kernel/archive/rockchip64-5.14/add-board-nanopi-r2s.patch index 563beecf5..37d49b57d 100644 --- a/patch/kernel/archive/rockchip64-5.14/add-board-nanopi-r2s.patch +++ b/patch/kernel/archive/rockchip64-5.14/add-board-nanopi-r2s.patch @@ -320,7 +320,7 @@ new file mode 100644 index 000000000..36890bb7f --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2-common.dtsi -@@ -0,0 +1,625 @@ +@@ -0,0 +1,610 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2018 FriendlyElec Computer Tech. Co., Ltd. @@ -906,19 +906,6 @@ index 000000000..36890bb7f + status = "okay"; +}; + -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ +&usb20_otg { + status = "okay"; +}; @@ -931,18 +918,16 @@ index 000000000..36890bb7f + status = "okay"; +}; + -+ -+ -+ -+ +&usbdrd3 { ++ dr_mode = "host"; + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; -+ dr_mode = "host"; ++ + r8153: device@2 { + compatible = "usbbda,8153"; + reg = <2>; ++ realtek,led-data = <0x87>; + local-mac-address = [00 00 00 00 00 00]; + }; +}; diff --git a/patch/kernel/archive/rockchip64-5.14/add-board-orangepi-r1plus.patch b/patch/kernel/archive/rockchip64-5.14/add-board-orangepi-r1plus.patch index 37ef88ae4..f22734989 100644 --- a/patch/kernel/archive/rockchip64-5.14/add-board-orangepi-r1plus.patch +++ b/patch/kernel/archive/rockchip64-5.14/add-board-orangepi-r1plus.patch @@ -3,33 +3,448 @@ new file mode 100644 index 000000000..2ee07d15a --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts -@@ -0,0 +1,29 @@ +@@ -0,0 +1,444 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+/* -+ * Copyright (c) 2020 Shenzhen Xunlong Software CO.,Limited -+ * Copyright (c) 2021 AmadeusGhost -+ * -+ * Based on Nanopi R2S -+ */ + -+#include "rk3328-nanopi-r2s.dts" ++/dts-v1/; ++ ++#include ++#include ++#include "rk3328-dram-default-timing.dtsi" ++#include "rk3328.dtsi" + +/ { + model = "Xunlong Orange Pi R1 Plus"; + compatible = "xunlong,orangepi-r1-plus", "rockchip,rk3328"; ++ ++ aliases { ++ ethernet1 = &rtl8153; ++ mmc0 = &sdmmc; ++ }; ++ ++ chosen { ++ stdout-path = "serial2:1500000n8"; ++ }; ++ ++ gmac_clk: gmac-clock { ++ compatible = "fixed-clock"; ++ clock-frequency = <125000000>; ++ clock-output-names = "gmac_clkin"; ++ #clock-cells = <0>; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ pinctrl-0 = <&lan_led_pin>, <&sys_led_pin>, <&wan_led_pin>; ++ pinctrl-names = "default"; ++ ++ lan_led: led-0 { ++ gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>; ++ label = "orangepi-r1-plus:green:lan"; ++ }; ++ ++ sys_led: led-1 { ++ gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>; ++ label = "orangepi-r1-plus:red:status"; ++ linux,default-trigger = "heartbeat"; ++ }; ++ ++ wan_led: led-2 { ++ gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>; ++ label = "orangepi-r1-plus:green:wan"; ++ }; ++ }; ++ ++ vcc_sd: sdmmc-regulator { ++ compatible = "regulator-fixed"; ++ gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>; ++ pinctrl-0 = <&sdmmc0m1_pin>; ++ pinctrl-names = "default"; ++ regulator-name = "vcc_sd"; ++ regulator-boot-on; ++ vin-supply = <&vcc_io_33>; ++ }; ++ ++ vdd_5v: vdd-5v { ++ compatible = "regulator-fixed"; ++ regulator-name = "vdd_5v"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ }; ++ ++ vdd_5v_lan: vdd-5v-lan { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_HIGH>; ++ pinctrl-0 = <&lan_vdd_pin>; ++ pinctrl-names = "default"; ++ regulator-name = "vdd_5v_lan"; ++ regulator-always-on; ++ regulator-boot-on; ++ vin-supply = <&vdd_5v>; ++ }; ++ ++ dfi: dfi@ff790000 { ++ reg = <0x00 0xff790000 0x00 0x400>; ++ compatible = "rockchip,rk3328-dfi"; ++ rockchip,grf = <&grf>; ++ }; ++ ++ dmc: dmc { ++ compatible = "rockchip,rk3328-dmc"; ++ devfreq-events = <&dfi>; ++ center-supply = <&vdd_log>; ++ clocks = <&cru SCLK_DDRCLK>; ++ clock-names = "dmc_clk"; ++ operating-points-v2 = <&dmc_opp_table>; ++ ddr_timing = <&ddr_timing>; ++ upthreshold = <40>; ++ downdifferential = <20>; ++ auto-min-freq = <786000>; ++ auto-freq-en = <0>; ++ #cooling-cells = <2>; ++ ++ ddr_power_model: ddr_power_model { ++ compatible = "ddr_power_model"; ++ dynamic-power-coefficient = <120>; ++ static-power-coefficient = <200>; ++ ts = <32000 4700 (-80) 2>; ++ thermal-zone = "soc-thermal"; ++ }; ++ }; ++ ++ dmc_opp_table: dmc-opp-table { ++ compatible = "operating-points-v2"; ++ ++ rockchip,leakage-voltage-sel = < ++ 1 10 0 ++ 11 254 1 ++ >; ++ nvmem-cells = <&logic_leakage>; ++ nvmem-cell-names = "ddr_leakage"; ++ ++ opp-786000000 { ++ opp-hz = /bits/ 64 <786000000>; ++ opp-microvolt = <1075000>; ++ opp-microvolt-L0 = <1075000>; ++ opp-microvolt-L1 = <1050000>; ++ }; ++ opp-798000000 { ++ opp-hz = /bits/ 64 <798000000>; ++ opp-microvolt = <1075000>; ++ opp-microvolt-L0 = <1075000>; ++ opp-microvolt-L1 = <1050000>; ++ }; ++ opp-840000000 { ++ opp-hz = /bits/ 64 <840000000>; ++ opp-microvolt = <1075000>; ++ opp-microvolt-L0 = <1075000>; ++ opp-microvolt-L1 = <1050000>; ++ }; ++ opp-924000000 { ++ opp-hz = /bits/ 64 <924000000>; ++ opp-microvolt = <1100000>; ++ opp-microvolt-L0 = <1100000>; ++ opp-microvolt-L1 = <1075000>; ++ }; ++ opp-1056000000 { ++ opp-hz = /bits/ 64 <1056000000>; ++ opp-microvolt = <1175000>; ++ opp-microvolt-L0 = <1175000>; ++ opp-microvolt-L1 = <1150000>; ++ }; ++ }; ++}; ++ ++&cpu0 { ++ cpu-supply = <&vdd_arm>; ++}; ++ ++&cpu1 { ++ cpu-supply = <&vdd_arm>; ++}; ++ ++&cpu2 { ++ cpu-supply = <&vdd_arm>; ++}; ++ ++&cpu3 { ++ cpu-supply = <&vdd_arm>; ++}; ++ ++&display_subsystem { ++ status = "disabled"; ++}; ++ ++&gmac2io { ++ assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>; ++ assigned-clock-parents = <&gmac_clk>, <&gmac_clk>; ++ clock_in_out = "input"; ++ phy-handle = <&rtl8211e>; ++ phy-mode = "rgmii"; ++ phy-supply = <&vcc_io_33>; ++ pinctrl-0 = <&rgmiim1_pins>; ++ pinctrl-names = "default"; ++ snps,aal; ++ rx_delay = <0x18>; ++ tx_delay = <0x24>; ++ status = "okay"; ++ ++ mdio { ++ compatible = "snps,dwmac-mdio"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ rtl8211e: ethernet-phy@1 { ++ reg = <1>; ++ pinctrl-0 = <ð_phy_reset_pin>; ++ pinctrl-names = "default"; ++ reset-assert-us = <10000>; ++ reset-deassert-us = <50000>; ++ reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; ++ }; ++ }; ++}; ++ ++&i2c0 { ++ status = "okay"; ++}; ++ ++&i2c1 { ++ status = "okay"; ++ ++ rk805: pmic@18 { ++ compatible = "rockchip,rk805"; ++ reg = <0x18>; ++ interrupt-parent = <&gpio1>; ++ interrupts = <24 IRQ_TYPE_LEVEL_LOW>; ++ #clock-cells = <1>; ++ clock-output-names = "xin32k", "rk805-clkout2"; ++ gpio-controller; ++ #gpio-cells = <2>; ++ pinctrl-0 = <&pmic_int_l>; ++ pinctrl-names = "default"; ++ rockchip,system-power-controller; ++ wakeup-source; ++ ++ vcc1-supply = <&vdd_5v>; ++ vcc2-supply = <&vdd_5v>; ++ vcc3-supply = <&vdd_5v>; ++ vcc4-supply = <&vdd_5v>; ++ vcc5-supply = <&vcc_io_33>; ++ vcc6-supply = <&vdd_5v>; ++ ++ regulators { ++ vdd_log: DCDC_REG1 { ++ regulator-name = "vdd_log"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-init-microvolt = <1075000>; ++ regulator-min-microvolt = <712500>; ++ regulator-max-microvolt = <1450000>; ++ regulator-ramp-delay = <12500>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1000000>; ++ }; ++ }; ++ ++ vdd_arm: DCDC_REG2 { ++ regulator-name = "vdd_arm"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-init-microvolt = <1225000>; ++ regulator-min-microvolt = <712500>; ++ regulator-max-microvolt = <1450000>; ++ regulator-ramp-delay = <12500>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <950000>; ++ }; ++ }; ++ ++ vcc_ddr: DCDC_REG3 { ++ regulator-name = "vcc_ddr"; ++ regulator-always-on; ++ regulator-boot-on; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ }; ++ }; ++ ++ vcc_io_33: DCDC_REG4 { ++ regulator-name = "vcc_io_33"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <3300000>; ++ }; ++ }; ++ ++ vcc_18: LDO_REG1 { ++ regulator-name = "vcc_18"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vcc18_emmc: LDO_REG2 { ++ regulator-name = "vcc18_emmc"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vdd_10: LDO_REG3 { ++ regulator-name = "vdd_10"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1000000>; ++ regulator-max-microvolt = <1000000>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1000000>; ++ }; ++ }; ++ }; ++ }; ++}; ++ ++&io_domains { ++ pmuio-supply = <&vcc_io_33>; ++ vccio1-supply = <&vcc_io_33>; ++ vccio2-supply = <&vcc18_emmc>; ++ vccio3-supply = <&vcc_io_33>; ++ vccio4-supply = <&vcc_io_33>; ++ vccio5-supply = <&vcc_io_33>; ++ vccio6-supply = <&vcc_io_33>; ++ status = "okay"; ++}; ++ ++&pinctrl { ++ gmac2io { ++ eth_phy_reset_pin: eth-phy-reset-pin { ++ rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>; ++ }; ++ }; ++ ++ leds { ++ lan_led_pin: lan-led-pin { ++ rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ sys_led_pin: sys-led-pin { ++ rockchip,pins = <3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ wan_led_pin: wan-led-pin { ++ rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ lan { ++ lan_vdd_pin: lan-vdd-pin { ++ rockchip,pins = <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ pmic { ++ pmic_int_l: pmic-int-l { ++ rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++}; ++ ++&pwm2 { ++ status = "okay"; ++}; ++ ++&sdmmc { ++ bus-width = <4>; ++ cap-sd-highspeed; ++ disable-wp; ++ pinctrl-0 = <&sdmmc0_clk>, <&sdmmc0_cmd>, <&sdmmc0_dectn>, <&sdmmc0_bus4>; ++ pinctrl-names = "default"; ++ vmmc-supply = <&vcc_sd>; ++ status = "okay"; +}; + +&spi0 { -+ max-freq = <48000000>; + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; -+ spi-max-frequency = <10000000>; ++ spi-max-frequency = <50000000>; + }; +}; + -+&uart1 { ++&tsadc { ++ rockchip,hw-tshut-mode = <0>; ++ rockchip,hw-tshut-polarity = <0>; ++ status = "okay"; ++}; ++ ++&u2phy { ++ status = "okay"; ++}; ++ ++&u2phy_host { ++ status = "okay"; ++}; ++ ++&u2phy_otg { ++ status = "okay"; ++}; ++ ++&uart2 { ++ status = "okay"; ++}; ++ ++&usb20_otg { ++ status = "okay"; ++ dr_mode = "host"; ++}; ++ ++&usbdrd3 { ++ dr_mode = "host"; ++ status = "okay"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ rtl8153: device@2 { ++ compatible = "usbbda,8153"; ++ reg = <2>; ++ realtek,led-data = <0x87>; ++ }; ++}; ++ ++&usb_host0_ehci { ++ status = "okay"; ++}; ++ ++&usb_host0_ohci { + status = "okay"; +}; diff --git a/patch/kernel/archive/rockchip64-5.14/board-nanopi-r2s-r8152-customise-leds.patch b/patch/kernel/archive/rockchip64-5.14/board-nanopi-r2s-r8152-customise-leds.patch deleted file mode 100644 index eea0c9763..000000000 --- a/patch/kernel/archive/rockchip64-5.14/board-nanopi-r2s-r8152-customise-leds.patch +++ /dev/null @@ -1,36 +0,0 @@ -From 2d4f786f94b331904682c24a792462726d474007 Mon Sep 17 00:00:00 2001 -From: hmz007 -Date: Mon, 23 Dec 2019 13:10:06 +0800 -Subject: [PATCH] r8152: Add module param for customized LEDs - -Signed-off-by: hmz007 ---- - drivers/net/usb/r8152.c | 8 ++++++++ - 1 file changed, 8 insertions(+) - -diff --git a/drivers/net/usb/r8152.c b/drivers/net/usb/r8152.c -index eb78f6d9390c..ec737fffcded 100644 ---- a/drivers/net/usb/r8152.c -+++ b/drivers/net/usb/r8152.c -@@ -37,6 +37,11 @@ - #define DRIVER_DESC "Realtek RTL8152/RTL8153 Based USB Ethernet Adapters" - #define MODULENAME "r8152" - -+/* LED0: Activity, LED1: Link */ -+static int ledsel = 0x78; -+module_param(ledsel, int, 0); -+MODULE_PARM_DESC(ledsel, "Override default LED configuration"); -+ - #define R8152_PHY_ID 32 - - #define PLA_IDR 0xc000 -@@ -4545,6 +4550,9 @@ static void r8153b_init(struct r8152 *tp) - ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN); - ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data); - -+ /* set customized led */ -+ ocp_write_word(tp, MCU_TYPE_PLA, PLA_LEDSEL, ledsel); -+ - rtl_tally_reset(tp); - - tp->coalesce = 15000; /* 15 us */ diff --git a/patch/kernel/archive/rockchip64-5.14/board-nanopi-r2s-r8152-mac-from-dt.patch b/patch/kernel/archive/rockchip64-5.14/board-nanopi-r2s-r8152-mac-from-dt.patch deleted file mode 100644 index 4040e88f0..000000000 --- a/patch/kernel/archive/rockchip64-5.14/board-nanopi-r2s-r8152-mac-from-dt.patch +++ /dev/null @@ -1,40 +0,0 @@ -From 27dfe6f4347e883fd618d5a37500c7f6d3652fb9 Mon Sep 17 00:00:00 2001 -From: hmz007 -Date: Fri, 22 Nov 2019 19:03:00 +0800 -Subject: [PATCH] r8152: support to get MAC address from device tree - -Signed-off-by: hmz007 ---- - drivers/net/usb/r8152.c | 12 ++++++++++++ - 1 file changed, 12 insertions(+) - -diff --git a/drivers/net/usb/r8152.c b/drivers/net/usb/r8152.c -index b2507c59ba8b..eb78f6d9390c 100644 ---- a/drivers/net/usb/r8152.c -+++ b/drivers/net/usb/r8152.c -@@ -6,6 +6,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -1298,6 +1299,17 @@ static int determine_ethernet_addr(struct r8152 *tp, struct sockaddr *sa) - if (ret < 0) { - netif_err(tp, probe, dev, "Get ether addr fail\n"); - } else if (!is_valid_ether_addr(sa->sa_data)) { -+ /* try to get MAC address from DT */ -+ if (tp->udev->dev.of_node) { -+ const u8 *mac = of_get_mac_address(tp->udev->dev.of_node); -+ if (!IS_ERR(mac) && is_valid_ether_addr(mac)) { -+ ether_addr_copy(sa->sa_data, mac); -+ netif_info(tp, probe, dev, "DT mac addr %pM\n", -+ sa->sa_data); -+ return 0; -+ } -+ } -+ - netif_err(tp, probe, dev, "Invalid ether addr %pM\n", - sa->sa_data); - eth_hw_addr_random(dev); diff --git a/patch/kernel/archive/rockchip64-5.14/net-usb-r8152-add-LED-configuration-from-OF.patch b/patch/kernel/archive/rockchip64-5.14/net-usb-r8152-add-LED-configuration-from-OF.patch new file mode 100644 index 000000000..c315dcf8f --- /dev/null +++ b/patch/kernel/archive/rockchip64-5.14/net-usb-r8152-add-LED-configuration-from-OF.patch @@ -0,0 +1,74 @@ +From 82985725e071f2a5735052f18e109a32aeac3a0b Mon Sep 17 00:00:00 2001 +From: David Bauer +Date: Sun, 26 Jul 2020 02:38:31 +0200 +Subject: [PATCH] net: usb: r8152: add LED configuration from OF + +This adds the ability to configure the LED configuration register using +OF. This way, the correct value for board specific LED configuration can +be determined. + +Signed-off-by: David Bauer +--- + drivers/net/usb/r8152.c | 23 +++++++++++++++++++++++ + 1 file changed, 23 insertions(+) + +--- a/drivers/net/usb/r8152.c ++++ b/drivers/net/usb/r8152.c +@@ -11,6 +11,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -6864,6 +6865,22 @@ static void rtl_tally_reset(struct r8152 + ocp_write_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY, ocp_data); + } + ++static int r8152_led_configuration(struct r8152 *tp) ++{ ++ u32 led_data; ++ int ret; ++ ++ ret = of_property_read_u32(tp->udev->dev.of_node, "realtek,led-data", ++ &led_data); ++ ++ if (ret) ++ return ret; ++ ++ ocp_write_word(tp, MCU_TYPE_PLA, PLA_LEDSEL, led_data); ++ ++ return 0; ++} ++ + static void r8152b_init(struct r8152 *tp) + { + u32 ocp_data; +@@ -6905,6 +6922,8 @@ static void r8152b_init(struct r8152 *tp + ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL); + ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN); + ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data); ++ ++ r8152_led_configuration(tp); + } + + static void r8153_init(struct r8152 *tp) +@@ -7045,6 +7064,8 @@ static void r8153_init(struct r8152 *tp) + tp->coalesce = COALESCE_SLOW; + break; + } ++ ++ r8152_led_configuration(tp); + } + + static void r8153b_init(struct r8152 *tp) +@@ -7127,6 +7148,8 @@ static void r8153b_init(struct r8152 *tp + rtl_tally_reset(tp); + + tp->coalesce = 15000; /* 15 us */ ++ ++ r8152_led_configuration(tp); + } + + static void r8153c_init(struct r8152 *tp) diff --git a/patch/kernel/archive/rockchip64-5.14/workaround-need-proper-adjustement-for-reading-MAC-f.patch b/patch/kernel/archive/rockchip64-5.14/workaround-need-proper-adjustement-for-reading-MAC-f.patch deleted file mode 100644 index fa61ca657..000000000 --- a/patch/kernel/archive/rockchip64-5.14/workaround-need-proper-adjustement-for-reading-MAC-f.patch +++ /dev/null @@ -1,42 +0,0 @@ -From c89579702f2848b9870ae78481a2a89bb06d7837 Mon Sep 17 00:00:00 2001 -From: Igor Pecovnik -Date: Wed, 21 Jul 2021 20:35:07 +0000 -Subject: [PATCH] Workaround - need proper adjustement for reading MAC from DT - -Signed-off-by: Igor Pecovnik ---- - drivers/net/usb/r8152.c | 18 +++++++++--------- - 1 file changed, 9 insertions(+), 9 deletions(-) - -diff --git a/drivers/net/usb/r8152.c b/drivers/net/usb/r8152.c -index 02ac27bd3..d6f05d590 100644 ---- a/drivers/net/usb/r8152.c -+++ b/drivers/net/usb/r8152.c -@@ -1691,15 +1691,15 @@ static int determine_ethernet_addr(struct r8152 *tp, struct sockaddr *sa) - netif_err(tp, probe, dev, "Get ether addr fail\n"); - } else if (!is_valid_ether_addr(sa->sa_data)) { - /* try to get MAC address from DT */ -- if (tp->udev->dev.of_node) { -- const u8 *mac = of_get_mac_address(tp->udev->dev.of_node); -- if (!IS_ERR(mac) && is_valid_ether_addr(mac)) { -- ether_addr_copy(sa->sa_data, mac); -- netif_info(tp, probe, dev, "DT mac addr %pM\n", -- sa->sa_data); -- return 0; -- } -- } -+// if (tp->udev->dev.of_node) { -+// const u8 *mac = of_get_mac_address(tp->udev->dev.of_node); -+// if (!IS_ERR(mac) && is_valid_ether_addr(mac)) { -+// ether_addr_copy(sa->sa_data, mac); -+// netif_info(tp, probe, dev, "DT mac addr %pM\n", -+// sa->sa_data); -+// return 0; -+// } -+// } - - netif_err(tp, probe, dev, "Invalid ether addr %pM\n", - sa->sa_data); --- -Created with Armbian build tools https://github.com/armbian/build - diff --git a/patch/kernel/archive/rockchip64-5.15/add-board-nanopi-r2s.patch b/patch/kernel/archive/rockchip64-5.15/add-board-nanopi-r2s.patch index 3e0e3de6b..29683e729 100644 --- a/patch/kernel/archive/rockchip64-5.15/add-board-nanopi-r2s.patch +++ b/patch/kernel/archive/rockchip64-5.15/add-board-nanopi-r2s.patch @@ -17,7 +17,7 @@ new file mode 100644 index 000000000..99b698f64 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2-common.dtsi -@@ -0,0 +1,583 @@ +@@ -0,0 +1,566 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2018 FriendlyElec Computer Tech. Co., Ltd. @@ -157,6 +157,7 @@ index 000000000..99b698f64 + }; + + /delete-node/ dmc-opp-table; ++ + dmc_opp_table: dmc_opp_table { + compatible = "operating-points-v2"; + @@ -181,11 +182,8 @@ index 000000000..99b698f64 + opp-microvolt = <1175000 1175000 1200000>; + }; + }; -+ +}; + -+ -+ +&cpu0 { + cpu-supply = <&vdd_arm>; +}; @@ -561,19 +559,6 @@ index 000000000..99b698f64 + status = "okay"; +}; + -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ +&usb20_otg { + status = "okay"; +}; @@ -586,18 +571,16 @@ index 000000000..99b698f64 + status = "okay"; +}; + -+ -+ -+ -+ +&usbdrd3 { ++ dr_mode = "host"; + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; -+ dr_mode = "host"; ++ + r8153: device@2 { + compatible = "usbbda,8153"; + reg = <2>; ++ realtek,led-data = <0x87>; + local-mac-address = [00 00 00 00 00 00]; + }; +}; @@ -606,7 +589,7 @@ new file mode 100644 index 000000000..717b1b2ed --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2-rev00.dts -@@ -0,0 +1,127 @@ +@@ -0,0 +1,126 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2019 FriendlyElec Computer Tech. Co., Ltd. @@ -678,7 +661,6 @@ index 000000000..717b1b2ed + led@3 { + gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>; + label = "wan_led"; -+ linux,default-trigger = "stmmac-0:00:link"; + }; +}; + diff --git a/patch/kernel/archive/rockchip64-5.15/add-board-orangepi-r1-plus.patch b/patch/kernel/archive/rockchip64-5.15/add-board-orangepi-r1-plus.patch new file mode 100644 index 000000000..4a0ce3715 --- /dev/null +++ b/patch/kernel/archive/rockchip64-5.15/add-board-orangepi-r1-plus.patch @@ -0,0 +1,416 @@ +diff --git a/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts +new file mode 100644 +index 000000000..2ee07d15a +--- /dev/null ++++ b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts +@@ -0,0 +1,410 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++ ++/dts-v1/; ++ ++#include ++#include ++#include "rk3328-dram-default-timing.dtsi" ++#include "rk3328.dtsi" ++ ++/ { ++ model = "Xunlong Orange Pi R1 Plus"; ++ compatible = "xunlong,orangepi-r1-plus", "rockchip,rk3328"; ++ ++ aliases { ++ ethernet1 = &rtl8153; ++ mmc0 = &sdmmc; ++ }; ++ ++ chosen { ++ stdout-path = "serial2:1500000n8"; ++ }; ++ ++ gmac_clk: gmac-clock { ++ compatible = "fixed-clock"; ++ clock-frequency = <125000000>; ++ clock-output-names = "gmac_clkin"; ++ #clock-cells = <0>; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ pinctrl-0 = <&lan_led_pin>, <&sys_led_pin>, <&wan_led_pin>; ++ pinctrl-names = "default"; ++ ++ lan_led: led-0 { ++ gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>; ++ label = "orangepi-r1-plus:green:lan"; ++ }; ++ ++ sys_led: led-1 { ++ gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>; ++ label = "orangepi-r1-plus:red:status"; ++ linux,default-trigger = "heartbeat"; ++ }; ++ ++ wan_led: led-2 { ++ gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>; ++ label = "orangepi-r1-plus:green:wan"; ++ }; ++ }; ++ ++ vcc_sd: sdmmc-regulator { ++ compatible = "regulator-fixed"; ++ gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>; ++ pinctrl-0 = <&sdmmc0m1_pin>; ++ pinctrl-names = "default"; ++ regulator-name = "vcc_sd"; ++ regulator-boot-on; ++ vin-supply = <&vcc_io_33>; ++ }; ++ ++ vdd_5v: vdd-5v { ++ compatible = "regulator-fixed"; ++ regulator-name = "vdd_5v"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ }; ++ ++ vdd_5v_lan: vdd-5v-lan { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_HIGH>; ++ pinctrl-0 = <&lan_vdd_pin>; ++ pinctrl-names = "default"; ++ regulator-name = "vdd_5v_lan"; ++ regulator-always-on; ++ regulator-boot-on; ++ vin-supply = <&vdd_5v>; ++ }; ++ ++ /delete-node/ dmc-opp-table; ++ ++ dmc_opp_table: dmc_opp_table { ++ compatible = "operating-points-v2"; ++ ++ opp-786000000 { ++ opp-hz = /bits/ 64 <786000000>; ++ opp-microvolt = <1075000 1075000 1200000>; ++ }; ++ opp-798000000 { ++ opp-hz = /bits/ 64 <798000000>; ++ opp-microvolt = <1075000 1075000 1200000>; ++ }; ++ opp-840000000 { ++ opp-hz = /bits/ 64 <840000000>; ++ opp-microvolt = <1075000 1075000 1200000>; ++ }; ++ opp-924000000 { ++ opp-hz = /bits/ 64 <924000000>; ++ opp-microvolt = <1100000 1100000 1200000>; ++ }; ++ opp-1056000000 { ++ opp-hz = /bits/ 64 <1056000000>; ++ opp-microvolt = <1175000 1175000 1200000>; ++ }; ++ }; ++}; ++ ++&cpu0 { ++ cpu-supply = <&vdd_arm>; ++}; ++ ++&cpu1 { ++ cpu-supply = <&vdd_arm>; ++}; ++ ++&cpu2 { ++ cpu-supply = <&vdd_arm>; ++}; ++ ++&cpu3 { ++ cpu-supply = <&vdd_arm>; ++}; ++ ++&dfi { ++ status = "okay"; ++}; ++ ++&dmc { ++ center-supply = <&vdd_log>; ++ ddr_timing = <&ddr_timing>; ++ status = "okay"; ++}; ++ ++&display_subsystem { ++ status = "disabled"; ++}; ++ ++&gmac2io { ++ assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>; ++ assigned-clock-parents = <&gmac_clk>, <&gmac_clk>; ++ clock_in_out = "input"; ++ phy-handle = <&rtl8211e>; ++ phy-mode = "rgmii"; ++ phy-supply = <&vcc_io_33>; ++ pinctrl-0 = <&rgmiim1_pins>; ++ pinctrl-names = "default"; ++ snps,aal; ++ rx_delay = <0x18>; ++ tx_delay = <0x24>; ++ status = "okay"; ++ ++ mdio { ++ compatible = "snps,dwmac-mdio"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ rtl8211e: ethernet-phy@1 { ++ reg = <1>; ++ pinctrl-0 = <ð_phy_reset_pin>; ++ pinctrl-names = "default"; ++ reset-assert-us = <10000>; ++ reset-deassert-us = <50000>; ++ reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; ++ }; ++ }; ++}; ++ ++&i2c0 { ++ status = "okay"; ++}; ++ ++&i2c1 { ++ status = "okay"; ++ ++ rk805: pmic@18 { ++ compatible = "rockchip,rk805"; ++ reg = <0x18>; ++ interrupt-parent = <&gpio1>; ++ interrupts = <24 IRQ_TYPE_LEVEL_LOW>; ++ #clock-cells = <1>; ++ clock-output-names = "xin32k", "rk805-clkout2"; ++ gpio-controller; ++ #gpio-cells = <2>; ++ pinctrl-0 = <&pmic_int_l>; ++ pinctrl-names = "default"; ++ rockchip,system-power-controller; ++ wakeup-source; ++ ++ vcc1-supply = <&vdd_5v>; ++ vcc2-supply = <&vdd_5v>; ++ vcc3-supply = <&vdd_5v>; ++ vcc4-supply = <&vdd_5v>; ++ vcc5-supply = <&vcc_io_33>; ++ vcc6-supply = <&vdd_5v>; ++ ++ regulators { ++ vdd_log: DCDC_REG1 { ++ regulator-name = "vdd_log"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-init-microvolt = <1075000>; ++ regulator-min-microvolt = <712500>; ++ regulator-max-microvolt = <1450000>; ++ regulator-ramp-delay = <12500>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1000000>; ++ }; ++ }; ++ ++ vdd_arm: DCDC_REG2 { ++ regulator-name = "vdd_arm"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-init-microvolt = <1225000>; ++ regulator-min-microvolt = <712500>; ++ regulator-max-microvolt = <1450000>; ++ regulator-ramp-delay = <12500>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <950000>; ++ }; ++ }; ++ ++ vcc_ddr: DCDC_REG3 { ++ regulator-name = "vcc_ddr"; ++ regulator-always-on; ++ regulator-boot-on; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ }; ++ }; ++ ++ vcc_io_33: DCDC_REG4 { ++ regulator-name = "vcc_io_33"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <3300000>; ++ }; ++ }; ++ ++ vcc_18: LDO_REG1 { ++ regulator-name = "vcc_18"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vcc18_emmc: LDO_REG2 { ++ regulator-name = "vcc18_emmc"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vdd_10: LDO_REG3 { ++ regulator-name = "vdd_10"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1000000>; ++ regulator-max-microvolt = <1000000>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1000000>; ++ }; ++ }; ++ }; ++ }; ++}; ++ ++&io_domains { ++ pmuio-supply = <&vcc_io_33>; ++ vccio1-supply = <&vcc_io_33>; ++ vccio2-supply = <&vcc18_emmc>; ++ vccio3-supply = <&vcc_io_33>; ++ vccio4-supply = <&vcc_io_33>; ++ vccio5-supply = <&vcc_io_33>; ++ vccio6-supply = <&vcc_io_33>; ++ status = "okay"; ++}; ++ ++&pinctrl { ++ gmac2io { ++ eth_phy_reset_pin: eth-phy-reset-pin { ++ rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>; ++ }; ++ }; ++ ++ leds { ++ lan_led_pin: lan-led-pin { ++ rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ sys_led_pin: sys-led-pin { ++ rockchip,pins = <3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ wan_led_pin: wan-led-pin { ++ rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ lan { ++ lan_vdd_pin: lan-vdd-pin { ++ rockchip,pins = <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ pmic { ++ pmic_int_l: pmic-int-l { ++ rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++}; ++ ++&pwm2 { ++ status = "okay"; ++}; ++ ++&sdmmc { ++ bus-width = <4>; ++ cap-sd-highspeed; ++ disable-wp; ++ pinctrl-0 = <&sdmmc0_clk>, <&sdmmc0_cmd>, <&sdmmc0_dectn>, <&sdmmc0_bus4>; ++ pinctrl-names = "default"; ++ vmmc-supply = <&vcc_sd>; ++ status = "okay"; ++}; ++ ++&spi0 { ++ status = "okay"; ++ ++ flash@0 { ++ compatible = "jedec,spi-nor"; ++ reg = <0>; ++ spi-max-frequency = <50000000>; ++ }; ++}; ++ ++&tsadc { ++ rockchip,hw-tshut-mode = <0>; ++ rockchip,hw-tshut-polarity = <0>; ++ status = "okay"; ++}; ++ ++&u2phy { ++ status = "okay"; ++}; ++ ++&u2phy_host { ++ status = "okay"; ++}; ++ ++&u2phy_otg { ++ status = "okay"; ++}; ++ ++&uart2 { ++ status = "okay"; ++}; ++ ++&usb20_otg { ++ status = "okay"; ++ dr_mode = "host"; ++}; ++ ++&usbdrd3 { ++ dr_mode = "host"; ++ status = "okay"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ rtl8153: device@2 { ++ compatible = "usbbda,8153"; ++ reg = <2>; ++ realtek,led-data = <0x87>; ++ }; ++}; ++ ++&usb_host0_ehci { ++ status = "okay"; ++}; ++ ++&usb_host0_ohci { ++ status = "okay"; ++}; diff --git a/patch/kernel/archive/rockchip64-5.15/add-board-orangepi-r1plus.patch b/patch/kernel/archive/rockchip64-5.15/add-board-orangepi-r1plus.patch deleted file mode 100644 index 37ef88ae4..000000000 --- a/patch/kernel/archive/rockchip64-5.15/add-board-orangepi-r1plus.patch +++ /dev/null @@ -1,35 +0,0 @@ -diff --git a/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts -new file mode 100644 -index 000000000..2ee07d15a ---- /dev/null -+++ b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts -@@ -0,0 +1,29 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+/* -+ * Copyright (c) 2020 Shenzhen Xunlong Software CO.,Limited -+ * Copyright (c) 2021 AmadeusGhost -+ * -+ * Based on Nanopi R2S -+ */ -+ -+#include "rk3328-nanopi-r2s.dts" -+ -+/ { -+ model = "Xunlong Orange Pi R1 Plus"; -+ compatible = "xunlong,orangepi-r1-plus", "rockchip,rk3328"; -+}; -+ -+&spi0 { -+ max-freq = <48000000>; -+ status = "okay"; -+ -+ flash@0 { -+ compatible = "jedec,spi-nor"; -+ reg = <0>; -+ spi-max-frequency = <10000000>; -+ }; -+}; -+ -+&uart1 { -+ status = "okay"; -+}; diff --git a/patch/kernel/archive/rockchip64-5.15/board-nanopi-r2s-r8152-customise-leds.patch b/patch/kernel/archive/rockchip64-5.15/board-nanopi-r2s-r8152-customise-leds.patch deleted file mode 100644 index eea0c9763..000000000 --- a/patch/kernel/archive/rockchip64-5.15/board-nanopi-r2s-r8152-customise-leds.patch +++ /dev/null @@ -1,36 +0,0 @@ -From 2d4f786f94b331904682c24a792462726d474007 Mon Sep 17 00:00:00 2001 -From: hmz007 -Date: Mon, 23 Dec 2019 13:10:06 +0800 -Subject: [PATCH] r8152: Add module param for customized LEDs - -Signed-off-by: hmz007 ---- - drivers/net/usb/r8152.c | 8 ++++++++ - 1 file changed, 8 insertions(+) - -diff --git a/drivers/net/usb/r8152.c b/drivers/net/usb/r8152.c -index eb78f6d9390c..ec737fffcded 100644 ---- a/drivers/net/usb/r8152.c -+++ b/drivers/net/usb/r8152.c -@@ -37,6 +37,11 @@ - #define DRIVER_DESC "Realtek RTL8152/RTL8153 Based USB Ethernet Adapters" - #define MODULENAME "r8152" - -+/* LED0: Activity, LED1: Link */ -+static int ledsel = 0x78; -+module_param(ledsel, int, 0); -+MODULE_PARM_DESC(ledsel, "Override default LED configuration"); -+ - #define R8152_PHY_ID 32 - - #define PLA_IDR 0xc000 -@@ -4545,6 +4550,9 @@ static void r8153b_init(struct r8152 *tp) - ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN); - ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data); - -+ /* set customized led */ -+ ocp_write_word(tp, MCU_TYPE_PLA, PLA_LEDSEL, ledsel); -+ - rtl_tally_reset(tp); - - tp->coalesce = 15000; /* 15 us */ diff --git a/patch/kernel/archive/rockchip64-5.15/board-nanopi-r2s-r8152-mac-from-dt.patch b/patch/kernel/archive/rockchip64-5.15/board-nanopi-r2s-r8152-mac-from-dt.patch deleted file mode 100644 index 4040e88f0..000000000 --- a/patch/kernel/archive/rockchip64-5.15/board-nanopi-r2s-r8152-mac-from-dt.patch +++ /dev/null @@ -1,40 +0,0 @@ -From 27dfe6f4347e883fd618d5a37500c7f6d3652fb9 Mon Sep 17 00:00:00 2001 -From: hmz007 -Date: Fri, 22 Nov 2019 19:03:00 +0800 -Subject: [PATCH] r8152: support to get MAC address from device tree - -Signed-off-by: hmz007 ---- - drivers/net/usb/r8152.c | 12 ++++++++++++ - 1 file changed, 12 insertions(+) - -diff --git a/drivers/net/usb/r8152.c b/drivers/net/usb/r8152.c -index b2507c59ba8b..eb78f6d9390c 100644 ---- a/drivers/net/usb/r8152.c -+++ b/drivers/net/usb/r8152.c -@@ -6,6 +6,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -1298,6 +1299,17 @@ static int determine_ethernet_addr(struct r8152 *tp, struct sockaddr *sa) - if (ret < 0) { - netif_err(tp, probe, dev, "Get ether addr fail\n"); - } else if (!is_valid_ether_addr(sa->sa_data)) { -+ /* try to get MAC address from DT */ -+ if (tp->udev->dev.of_node) { -+ const u8 *mac = of_get_mac_address(tp->udev->dev.of_node); -+ if (!IS_ERR(mac) && is_valid_ether_addr(mac)) { -+ ether_addr_copy(sa->sa_data, mac); -+ netif_info(tp, probe, dev, "DT mac addr %pM\n", -+ sa->sa_data); -+ return 0; -+ } -+ } -+ - netif_err(tp, probe, dev, "Invalid ether addr %pM\n", - sa->sa_data); - eth_hw_addr_random(dev); diff --git a/patch/kernel/archive/rockchip64-5.15/net-usb-r8152-add-LED-configuration-from-OF.patch b/patch/kernel/archive/rockchip64-5.15/net-usb-r8152-add-LED-configuration-from-OF.patch new file mode 100644 index 000000000..c315dcf8f --- /dev/null +++ b/patch/kernel/archive/rockchip64-5.15/net-usb-r8152-add-LED-configuration-from-OF.patch @@ -0,0 +1,74 @@ +From 82985725e071f2a5735052f18e109a32aeac3a0b Mon Sep 17 00:00:00 2001 +From: David Bauer +Date: Sun, 26 Jul 2020 02:38:31 +0200 +Subject: [PATCH] net: usb: r8152: add LED configuration from OF + +This adds the ability to configure the LED configuration register using +OF. This way, the correct value for board specific LED configuration can +be determined. + +Signed-off-by: David Bauer +--- + drivers/net/usb/r8152.c | 23 +++++++++++++++++++++++ + 1 file changed, 23 insertions(+) + +--- a/drivers/net/usb/r8152.c ++++ b/drivers/net/usb/r8152.c +@@ -11,6 +11,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -6864,6 +6865,22 @@ static void rtl_tally_reset(struct r8152 + ocp_write_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY, ocp_data); + } + ++static int r8152_led_configuration(struct r8152 *tp) ++{ ++ u32 led_data; ++ int ret; ++ ++ ret = of_property_read_u32(tp->udev->dev.of_node, "realtek,led-data", ++ &led_data); ++ ++ if (ret) ++ return ret; ++ ++ ocp_write_word(tp, MCU_TYPE_PLA, PLA_LEDSEL, led_data); ++ ++ return 0; ++} ++ + static void r8152b_init(struct r8152 *tp) + { + u32 ocp_data; +@@ -6905,6 +6922,8 @@ static void r8152b_init(struct r8152 *tp + ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL); + ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN); + ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data); ++ ++ r8152_led_configuration(tp); + } + + static void r8153_init(struct r8152 *tp) +@@ -7045,6 +7064,8 @@ static void r8153_init(struct r8152 *tp) + tp->coalesce = COALESCE_SLOW; + break; + } ++ ++ r8152_led_configuration(tp); + } + + static void r8153b_init(struct r8152 *tp) +@@ -7127,6 +7148,8 @@ static void r8153b_init(struct r8152 *tp + rtl_tally_reset(tp); + + tp->coalesce = 15000; /* 15 us */ ++ ++ r8152_led_configuration(tp); + } + + static void r8153c_init(struct r8152 *tp) diff --git a/patch/kernel/archive/rockchip64-5.15/workaround-need-proper-adjustement-for-reading-MAC-f.patch b/patch/kernel/archive/rockchip64-5.15/workaround-need-proper-adjustement-for-reading-MAC-f.patch deleted file mode 100644 index fa61ca657..000000000 --- a/patch/kernel/archive/rockchip64-5.15/workaround-need-proper-adjustement-for-reading-MAC-f.patch +++ /dev/null @@ -1,42 +0,0 @@ -From c89579702f2848b9870ae78481a2a89bb06d7837 Mon Sep 17 00:00:00 2001 -From: Igor Pecovnik -Date: Wed, 21 Jul 2021 20:35:07 +0000 -Subject: [PATCH] Workaround - need proper adjustement for reading MAC from DT - -Signed-off-by: Igor Pecovnik ---- - drivers/net/usb/r8152.c | 18 +++++++++--------- - 1 file changed, 9 insertions(+), 9 deletions(-) - -diff --git a/drivers/net/usb/r8152.c b/drivers/net/usb/r8152.c -index 02ac27bd3..d6f05d590 100644 ---- a/drivers/net/usb/r8152.c -+++ b/drivers/net/usb/r8152.c -@@ -1691,15 +1691,15 @@ static int determine_ethernet_addr(struct r8152 *tp, struct sockaddr *sa) - netif_err(tp, probe, dev, "Get ether addr fail\n"); - } else if (!is_valid_ether_addr(sa->sa_data)) { - /* try to get MAC address from DT */ -- if (tp->udev->dev.of_node) { -- const u8 *mac = of_get_mac_address(tp->udev->dev.of_node); -- if (!IS_ERR(mac) && is_valid_ether_addr(mac)) { -- ether_addr_copy(sa->sa_data, mac); -- netif_info(tp, probe, dev, "DT mac addr %pM\n", -- sa->sa_data); -- return 0; -- } -- } -+// if (tp->udev->dev.of_node) { -+// const u8 *mac = of_get_mac_address(tp->udev->dev.of_node); -+// if (!IS_ERR(mac) && is_valid_ether_addr(mac)) { -+// ether_addr_copy(sa->sa_data, mac); -+// netif_info(tp, probe, dev, "DT mac addr %pM\n", -+// sa->sa_data); -+// return 0; -+// } -+// } - - netif_err(tp, probe, dev, "Invalid ether addr %pM\n", - sa->sa_data); --- -Created with Armbian build tools https://github.com/armbian/build - diff --git a/patch/kernel/archive/rockchip64-5.17/add-board-nanopi-r2s.patch b/patch/kernel/archive/rockchip64-5.17/add-board-nanopi-r2s.patch index 3e0e3de6b..29683e729 100644 --- a/patch/kernel/archive/rockchip64-5.17/add-board-nanopi-r2s.patch +++ b/patch/kernel/archive/rockchip64-5.17/add-board-nanopi-r2s.patch @@ -17,7 +17,7 @@ new file mode 100644 index 000000000..99b698f64 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2-common.dtsi -@@ -0,0 +1,583 @@ +@@ -0,0 +1,566 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2018 FriendlyElec Computer Tech. Co., Ltd. @@ -157,6 +157,7 @@ index 000000000..99b698f64 + }; + + /delete-node/ dmc-opp-table; ++ + dmc_opp_table: dmc_opp_table { + compatible = "operating-points-v2"; + @@ -181,11 +182,8 @@ index 000000000..99b698f64 + opp-microvolt = <1175000 1175000 1200000>; + }; + }; -+ +}; + -+ -+ +&cpu0 { + cpu-supply = <&vdd_arm>; +}; @@ -561,19 +559,6 @@ index 000000000..99b698f64 + status = "okay"; +}; + -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ +&usb20_otg { + status = "okay"; +}; @@ -586,18 +571,16 @@ index 000000000..99b698f64 + status = "okay"; +}; + -+ -+ -+ -+ +&usbdrd3 { ++ dr_mode = "host"; + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; -+ dr_mode = "host"; ++ + r8153: device@2 { + compatible = "usbbda,8153"; + reg = <2>; ++ realtek,led-data = <0x87>; + local-mac-address = [00 00 00 00 00 00]; + }; +}; @@ -606,7 +589,7 @@ new file mode 100644 index 000000000..717b1b2ed --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2-rev00.dts -@@ -0,0 +1,127 @@ +@@ -0,0 +1,126 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2019 FriendlyElec Computer Tech. Co., Ltd. @@ -678,7 +661,6 @@ index 000000000..717b1b2ed + led@3 { + gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>; + label = "wan_led"; -+ linux,default-trigger = "stmmac-0:00:link"; + }; +}; + diff --git a/patch/kernel/archive/rockchip64-5.17/add-board-orangepi-r1-plus.patch b/patch/kernel/archive/rockchip64-5.17/add-board-orangepi-r1-plus.patch new file mode 100644 index 000000000..4a0ce3715 --- /dev/null +++ b/patch/kernel/archive/rockchip64-5.17/add-board-orangepi-r1-plus.patch @@ -0,0 +1,416 @@ +diff --git a/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts +new file mode 100644 +index 000000000..2ee07d15a +--- /dev/null ++++ b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts +@@ -0,0 +1,410 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++ ++/dts-v1/; ++ ++#include ++#include ++#include "rk3328-dram-default-timing.dtsi" ++#include "rk3328.dtsi" ++ ++/ { ++ model = "Xunlong Orange Pi R1 Plus"; ++ compatible = "xunlong,orangepi-r1-plus", "rockchip,rk3328"; ++ ++ aliases { ++ ethernet1 = &rtl8153; ++ mmc0 = &sdmmc; ++ }; ++ ++ chosen { ++ stdout-path = "serial2:1500000n8"; ++ }; ++ ++ gmac_clk: gmac-clock { ++ compatible = "fixed-clock"; ++ clock-frequency = <125000000>; ++ clock-output-names = "gmac_clkin"; ++ #clock-cells = <0>; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ pinctrl-0 = <&lan_led_pin>, <&sys_led_pin>, <&wan_led_pin>; ++ pinctrl-names = "default"; ++ ++ lan_led: led-0 { ++ gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>; ++ label = "orangepi-r1-plus:green:lan"; ++ }; ++ ++ sys_led: led-1 { ++ gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>; ++ label = "orangepi-r1-plus:red:status"; ++ linux,default-trigger = "heartbeat"; ++ }; ++ ++ wan_led: led-2 { ++ gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>; ++ label = "orangepi-r1-plus:green:wan"; ++ }; ++ }; ++ ++ vcc_sd: sdmmc-regulator { ++ compatible = "regulator-fixed"; ++ gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>; ++ pinctrl-0 = <&sdmmc0m1_pin>; ++ pinctrl-names = "default"; ++ regulator-name = "vcc_sd"; ++ regulator-boot-on; ++ vin-supply = <&vcc_io_33>; ++ }; ++ ++ vdd_5v: vdd-5v { ++ compatible = "regulator-fixed"; ++ regulator-name = "vdd_5v"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ }; ++ ++ vdd_5v_lan: vdd-5v-lan { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_HIGH>; ++ pinctrl-0 = <&lan_vdd_pin>; ++ pinctrl-names = "default"; ++ regulator-name = "vdd_5v_lan"; ++ regulator-always-on; ++ regulator-boot-on; ++ vin-supply = <&vdd_5v>; ++ }; ++ ++ /delete-node/ dmc-opp-table; ++ ++ dmc_opp_table: dmc_opp_table { ++ compatible = "operating-points-v2"; ++ ++ opp-786000000 { ++ opp-hz = /bits/ 64 <786000000>; ++ opp-microvolt = <1075000 1075000 1200000>; ++ }; ++ opp-798000000 { ++ opp-hz = /bits/ 64 <798000000>; ++ opp-microvolt = <1075000 1075000 1200000>; ++ }; ++ opp-840000000 { ++ opp-hz = /bits/ 64 <840000000>; ++ opp-microvolt = <1075000 1075000 1200000>; ++ }; ++ opp-924000000 { ++ opp-hz = /bits/ 64 <924000000>; ++ opp-microvolt = <1100000 1100000 1200000>; ++ }; ++ opp-1056000000 { ++ opp-hz = /bits/ 64 <1056000000>; ++ opp-microvolt = <1175000 1175000 1200000>; ++ }; ++ }; ++}; ++ ++&cpu0 { ++ cpu-supply = <&vdd_arm>; ++}; ++ ++&cpu1 { ++ cpu-supply = <&vdd_arm>; ++}; ++ ++&cpu2 { ++ cpu-supply = <&vdd_arm>; ++}; ++ ++&cpu3 { ++ cpu-supply = <&vdd_arm>; ++}; ++ ++&dfi { ++ status = "okay"; ++}; ++ ++&dmc { ++ center-supply = <&vdd_log>; ++ ddr_timing = <&ddr_timing>; ++ status = "okay"; ++}; ++ ++&display_subsystem { ++ status = "disabled"; ++}; ++ ++&gmac2io { ++ assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>; ++ assigned-clock-parents = <&gmac_clk>, <&gmac_clk>; ++ clock_in_out = "input"; ++ phy-handle = <&rtl8211e>; ++ phy-mode = "rgmii"; ++ phy-supply = <&vcc_io_33>; ++ pinctrl-0 = <&rgmiim1_pins>; ++ pinctrl-names = "default"; ++ snps,aal; ++ rx_delay = <0x18>; ++ tx_delay = <0x24>; ++ status = "okay"; ++ ++ mdio { ++ compatible = "snps,dwmac-mdio"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ rtl8211e: ethernet-phy@1 { ++ reg = <1>; ++ pinctrl-0 = <ð_phy_reset_pin>; ++ pinctrl-names = "default"; ++ reset-assert-us = <10000>; ++ reset-deassert-us = <50000>; ++ reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; ++ }; ++ }; ++}; ++ ++&i2c0 { ++ status = "okay"; ++}; ++ ++&i2c1 { ++ status = "okay"; ++ ++ rk805: pmic@18 { ++ compatible = "rockchip,rk805"; ++ reg = <0x18>; ++ interrupt-parent = <&gpio1>; ++ interrupts = <24 IRQ_TYPE_LEVEL_LOW>; ++ #clock-cells = <1>; ++ clock-output-names = "xin32k", "rk805-clkout2"; ++ gpio-controller; ++ #gpio-cells = <2>; ++ pinctrl-0 = <&pmic_int_l>; ++ pinctrl-names = "default"; ++ rockchip,system-power-controller; ++ wakeup-source; ++ ++ vcc1-supply = <&vdd_5v>; ++ vcc2-supply = <&vdd_5v>; ++ vcc3-supply = <&vdd_5v>; ++ vcc4-supply = <&vdd_5v>; ++ vcc5-supply = <&vcc_io_33>; ++ vcc6-supply = <&vdd_5v>; ++ ++ regulators { ++ vdd_log: DCDC_REG1 { ++ regulator-name = "vdd_log"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-init-microvolt = <1075000>; ++ regulator-min-microvolt = <712500>; ++ regulator-max-microvolt = <1450000>; ++ regulator-ramp-delay = <12500>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1000000>; ++ }; ++ }; ++ ++ vdd_arm: DCDC_REG2 { ++ regulator-name = "vdd_arm"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-init-microvolt = <1225000>; ++ regulator-min-microvolt = <712500>; ++ regulator-max-microvolt = <1450000>; ++ regulator-ramp-delay = <12500>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <950000>; ++ }; ++ }; ++ ++ vcc_ddr: DCDC_REG3 { ++ regulator-name = "vcc_ddr"; ++ regulator-always-on; ++ regulator-boot-on; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ }; ++ }; ++ ++ vcc_io_33: DCDC_REG4 { ++ regulator-name = "vcc_io_33"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <3300000>; ++ }; ++ }; ++ ++ vcc_18: LDO_REG1 { ++ regulator-name = "vcc_18"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vcc18_emmc: LDO_REG2 { ++ regulator-name = "vcc18_emmc"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vdd_10: LDO_REG3 { ++ regulator-name = "vdd_10"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1000000>; ++ regulator-max-microvolt = <1000000>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1000000>; ++ }; ++ }; ++ }; ++ }; ++}; ++ ++&io_domains { ++ pmuio-supply = <&vcc_io_33>; ++ vccio1-supply = <&vcc_io_33>; ++ vccio2-supply = <&vcc18_emmc>; ++ vccio3-supply = <&vcc_io_33>; ++ vccio4-supply = <&vcc_io_33>; ++ vccio5-supply = <&vcc_io_33>; ++ vccio6-supply = <&vcc_io_33>; ++ status = "okay"; ++}; ++ ++&pinctrl { ++ gmac2io { ++ eth_phy_reset_pin: eth-phy-reset-pin { ++ rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>; ++ }; ++ }; ++ ++ leds { ++ lan_led_pin: lan-led-pin { ++ rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ sys_led_pin: sys-led-pin { ++ rockchip,pins = <3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ wan_led_pin: wan-led-pin { ++ rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ lan { ++ lan_vdd_pin: lan-vdd-pin { ++ rockchip,pins = <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ pmic { ++ pmic_int_l: pmic-int-l { ++ rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++}; ++ ++&pwm2 { ++ status = "okay"; ++}; ++ ++&sdmmc { ++ bus-width = <4>; ++ cap-sd-highspeed; ++ disable-wp; ++ pinctrl-0 = <&sdmmc0_clk>, <&sdmmc0_cmd>, <&sdmmc0_dectn>, <&sdmmc0_bus4>; ++ pinctrl-names = "default"; ++ vmmc-supply = <&vcc_sd>; ++ status = "okay"; ++}; ++ ++&spi0 { ++ status = "okay"; ++ ++ flash@0 { ++ compatible = "jedec,spi-nor"; ++ reg = <0>; ++ spi-max-frequency = <50000000>; ++ }; ++}; ++ ++&tsadc { ++ rockchip,hw-tshut-mode = <0>; ++ rockchip,hw-tshut-polarity = <0>; ++ status = "okay"; ++}; ++ ++&u2phy { ++ status = "okay"; ++}; ++ ++&u2phy_host { ++ status = "okay"; ++}; ++ ++&u2phy_otg { ++ status = "okay"; ++}; ++ ++&uart2 { ++ status = "okay"; ++}; ++ ++&usb20_otg { ++ status = "okay"; ++ dr_mode = "host"; ++}; ++ ++&usbdrd3 { ++ dr_mode = "host"; ++ status = "okay"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ rtl8153: device@2 { ++ compatible = "usbbda,8153"; ++ reg = <2>; ++ realtek,led-data = <0x87>; ++ }; ++}; ++ ++&usb_host0_ehci { ++ status = "okay"; ++}; ++ ++&usb_host0_ohci { ++ status = "okay"; ++}; diff --git a/patch/kernel/archive/rockchip64-5.17/add-board-orangepi-r1plus.patch b/patch/kernel/archive/rockchip64-5.17/add-board-orangepi-r1plus.patch deleted file mode 100644 index 37ef88ae4..000000000 --- a/patch/kernel/archive/rockchip64-5.17/add-board-orangepi-r1plus.patch +++ /dev/null @@ -1,35 +0,0 @@ -diff --git a/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts -new file mode 100644 -index 000000000..2ee07d15a ---- /dev/null -+++ b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts -@@ -0,0 +1,29 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+/* -+ * Copyright (c) 2020 Shenzhen Xunlong Software CO.,Limited -+ * Copyright (c) 2021 AmadeusGhost -+ * -+ * Based on Nanopi R2S -+ */ -+ -+#include "rk3328-nanopi-r2s.dts" -+ -+/ { -+ model = "Xunlong Orange Pi R1 Plus"; -+ compatible = "xunlong,orangepi-r1-plus", "rockchip,rk3328"; -+}; -+ -+&spi0 { -+ max-freq = <48000000>; -+ status = "okay"; -+ -+ flash@0 { -+ compatible = "jedec,spi-nor"; -+ reg = <0>; -+ spi-max-frequency = <10000000>; -+ }; -+}; -+ -+&uart1 { -+ status = "okay"; -+}; diff --git a/patch/kernel/archive/rockchip64-5.17/board-nanopi-r2s-r8152-customise-leds.patch b/patch/kernel/archive/rockchip64-5.17/board-nanopi-r2s-r8152-customise-leds.patch deleted file mode 100644 index eea0c9763..000000000 --- a/patch/kernel/archive/rockchip64-5.17/board-nanopi-r2s-r8152-customise-leds.patch +++ /dev/null @@ -1,36 +0,0 @@ -From 2d4f786f94b331904682c24a792462726d474007 Mon Sep 17 00:00:00 2001 -From: hmz007 -Date: Mon, 23 Dec 2019 13:10:06 +0800 -Subject: [PATCH] r8152: Add module param for customized LEDs - -Signed-off-by: hmz007 ---- - drivers/net/usb/r8152.c | 8 ++++++++ - 1 file changed, 8 insertions(+) - -diff --git a/drivers/net/usb/r8152.c b/drivers/net/usb/r8152.c -index eb78f6d9390c..ec737fffcded 100644 ---- a/drivers/net/usb/r8152.c -+++ b/drivers/net/usb/r8152.c -@@ -37,6 +37,11 @@ - #define DRIVER_DESC "Realtek RTL8152/RTL8153 Based USB Ethernet Adapters" - #define MODULENAME "r8152" - -+/* LED0: Activity, LED1: Link */ -+static int ledsel = 0x78; -+module_param(ledsel, int, 0); -+MODULE_PARM_DESC(ledsel, "Override default LED configuration"); -+ - #define R8152_PHY_ID 32 - - #define PLA_IDR 0xc000 -@@ -4545,6 +4550,9 @@ static void r8153b_init(struct r8152 *tp) - ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN); - ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data); - -+ /* set customized led */ -+ ocp_write_word(tp, MCU_TYPE_PLA, PLA_LEDSEL, ledsel); -+ - rtl_tally_reset(tp); - - tp->coalesce = 15000; /* 15 us */ diff --git a/patch/kernel/archive/rockchip64-5.17/board-nanopi-r2s-r8152-mac-from-dt.patch b/patch/kernel/archive/rockchip64-5.17/board-nanopi-r2s-r8152-mac-from-dt.patch deleted file mode 100644 index 4040e88f0..000000000 --- a/patch/kernel/archive/rockchip64-5.17/board-nanopi-r2s-r8152-mac-from-dt.patch +++ /dev/null @@ -1,40 +0,0 @@ -From 27dfe6f4347e883fd618d5a37500c7f6d3652fb9 Mon Sep 17 00:00:00 2001 -From: hmz007 -Date: Fri, 22 Nov 2019 19:03:00 +0800 -Subject: [PATCH] r8152: support to get MAC address from device tree - -Signed-off-by: hmz007 ---- - drivers/net/usb/r8152.c | 12 ++++++++++++ - 1 file changed, 12 insertions(+) - -diff --git a/drivers/net/usb/r8152.c b/drivers/net/usb/r8152.c -index b2507c59ba8b..eb78f6d9390c 100644 ---- a/drivers/net/usb/r8152.c -+++ b/drivers/net/usb/r8152.c -@@ -6,6 +6,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -1298,6 +1299,17 @@ static int determine_ethernet_addr(struct r8152 *tp, struct sockaddr *sa) - if (ret < 0) { - netif_err(tp, probe, dev, "Get ether addr fail\n"); - } else if (!is_valid_ether_addr(sa->sa_data)) { -+ /* try to get MAC address from DT */ -+ if (tp->udev->dev.of_node) { -+ const u8 *mac = of_get_mac_address(tp->udev->dev.of_node); -+ if (!IS_ERR(mac) && is_valid_ether_addr(mac)) { -+ ether_addr_copy(sa->sa_data, mac); -+ netif_info(tp, probe, dev, "DT mac addr %pM\n", -+ sa->sa_data); -+ return 0; -+ } -+ } -+ - netif_err(tp, probe, dev, "Invalid ether addr %pM\n", - sa->sa_data); - eth_hw_addr_random(dev); diff --git a/patch/kernel/archive/rockchip64-5.17/net-usb-r8152-add-LED-configuration-from-OF.patch b/patch/kernel/archive/rockchip64-5.17/net-usb-r8152-add-LED-configuration-from-OF.patch new file mode 100644 index 000000000..c315dcf8f --- /dev/null +++ b/patch/kernel/archive/rockchip64-5.17/net-usb-r8152-add-LED-configuration-from-OF.patch @@ -0,0 +1,74 @@ +From 82985725e071f2a5735052f18e109a32aeac3a0b Mon Sep 17 00:00:00 2001 +From: David Bauer +Date: Sun, 26 Jul 2020 02:38:31 +0200 +Subject: [PATCH] net: usb: r8152: add LED configuration from OF + +This adds the ability to configure the LED configuration register using +OF. This way, the correct value for board specific LED configuration can +be determined. + +Signed-off-by: David Bauer +--- + drivers/net/usb/r8152.c | 23 +++++++++++++++++++++++ + 1 file changed, 23 insertions(+) + +--- a/drivers/net/usb/r8152.c ++++ b/drivers/net/usb/r8152.c +@@ -11,6 +11,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -6864,6 +6865,22 @@ static void rtl_tally_reset(struct r8152 + ocp_write_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY, ocp_data); + } + ++static int r8152_led_configuration(struct r8152 *tp) ++{ ++ u32 led_data; ++ int ret; ++ ++ ret = of_property_read_u32(tp->udev->dev.of_node, "realtek,led-data", ++ &led_data); ++ ++ if (ret) ++ return ret; ++ ++ ocp_write_word(tp, MCU_TYPE_PLA, PLA_LEDSEL, led_data); ++ ++ return 0; ++} ++ + static void r8152b_init(struct r8152 *tp) + { + u32 ocp_data; +@@ -6905,6 +6922,8 @@ static void r8152b_init(struct r8152 *tp + ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL); + ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN); + ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data); ++ ++ r8152_led_configuration(tp); + } + + static void r8153_init(struct r8152 *tp) +@@ -7045,6 +7064,8 @@ static void r8153_init(struct r8152 *tp) + tp->coalesce = COALESCE_SLOW; + break; + } ++ ++ r8152_led_configuration(tp); + } + + static void r8153b_init(struct r8152 *tp) +@@ -7127,6 +7148,8 @@ static void r8153b_init(struct r8152 *tp + rtl_tally_reset(tp); + + tp->coalesce = 15000; /* 15 us */ ++ ++ r8152_led_configuration(tp); + } + + static void r8153c_init(struct r8152 *tp) diff --git a/patch/kernel/archive/rockchip64-5.17/workaround-need-proper-adjustement-for-reading-MAC-f.patch b/patch/kernel/archive/rockchip64-5.17/workaround-need-proper-adjustement-for-reading-MAC-f.patch deleted file mode 100644 index fa61ca657..000000000 --- a/patch/kernel/archive/rockchip64-5.17/workaround-need-proper-adjustement-for-reading-MAC-f.patch +++ /dev/null @@ -1,42 +0,0 @@ -From c89579702f2848b9870ae78481a2a89bb06d7837 Mon Sep 17 00:00:00 2001 -From: Igor Pecovnik -Date: Wed, 21 Jul 2021 20:35:07 +0000 -Subject: [PATCH] Workaround - need proper adjustement for reading MAC from DT - -Signed-off-by: Igor Pecovnik ---- - drivers/net/usb/r8152.c | 18 +++++++++--------- - 1 file changed, 9 insertions(+), 9 deletions(-) - -diff --git a/drivers/net/usb/r8152.c b/drivers/net/usb/r8152.c -index 02ac27bd3..d6f05d590 100644 ---- a/drivers/net/usb/r8152.c -+++ b/drivers/net/usb/r8152.c -@@ -1691,15 +1691,15 @@ static int determine_ethernet_addr(struct r8152 *tp, struct sockaddr *sa) - netif_err(tp, probe, dev, "Get ether addr fail\n"); - } else if (!is_valid_ether_addr(sa->sa_data)) { - /* try to get MAC address from DT */ -- if (tp->udev->dev.of_node) { -- const u8 *mac = of_get_mac_address(tp->udev->dev.of_node); -- if (!IS_ERR(mac) && is_valid_ether_addr(mac)) { -- ether_addr_copy(sa->sa_data, mac); -- netif_info(tp, probe, dev, "DT mac addr %pM\n", -- sa->sa_data); -- return 0; -- } -- } -+// if (tp->udev->dev.of_node) { -+// const u8 *mac = of_get_mac_address(tp->udev->dev.of_node); -+// if (!IS_ERR(mac) && is_valid_ether_addr(mac)) { -+// ether_addr_copy(sa->sa_data, mac); -+// netif_info(tp, probe, dev, "DT mac addr %pM\n", -+// sa->sa_data); -+// return 0; -+// } -+// } - - netif_err(tp, probe, dev, "Invalid ether addr %pM\n", - sa->sa_data); --- -Created with Armbian build tools https://github.com/armbian/build - diff --git a/patch/kernel/archive/rockchip64-5.18/add-board-nanopi-r2s.patch b/patch/kernel/archive/rockchip64-5.18/add-board-nanopi-r2s.patch index 3e0e3de6b..29683e729 100644 --- a/patch/kernel/archive/rockchip64-5.18/add-board-nanopi-r2s.patch +++ b/patch/kernel/archive/rockchip64-5.18/add-board-nanopi-r2s.patch @@ -17,7 +17,7 @@ new file mode 100644 index 000000000..99b698f64 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2-common.dtsi -@@ -0,0 +1,583 @@ +@@ -0,0 +1,566 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2018 FriendlyElec Computer Tech. Co., Ltd. @@ -157,6 +157,7 @@ index 000000000..99b698f64 + }; + + /delete-node/ dmc-opp-table; ++ + dmc_opp_table: dmc_opp_table { + compatible = "operating-points-v2"; + @@ -181,11 +182,8 @@ index 000000000..99b698f64 + opp-microvolt = <1175000 1175000 1200000>; + }; + }; -+ +}; + -+ -+ +&cpu0 { + cpu-supply = <&vdd_arm>; +}; @@ -561,19 +559,6 @@ index 000000000..99b698f64 + status = "okay"; +}; + -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ +&usb20_otg { + status = "okay"; +}; @@ -586,18 +571,16 @@ index 000000000..99b698f64 + status = "okay"; +}; + -+ -+ -+ -+ +&usbdrd3 { ++ dr_mode = "host"; + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; -+ dr_mode = "host"; ++ + r8153: device@2 { + compatible = "usbbda,8153"; + reg = <2>; ++ realtek,led-data = <0x87>; + local-mac-address = [00 00 00 00 00 00]; + }; +}; @@ -606,7 +589,7 @@ new file mode 100644 index 000000000..717b1b2ed --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2-rev00.dts -@@ -0,0 +1,127 @@ +@@ -0,0 +1,126 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2019 FriendlyElec Computer Tech. Co., Ltd. @@ -678,7 +661,6 @@ index 000000000..717b1b2ed + led@3 { + gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>; + label = "wan_led"; -+ linux,default-trigger = "stmmac-0:00:link"; + }; +}; + diff --git a/patch/kernel/archive/rockchip64-5.18/add-board-orangepi-r1-plus.patch b/patch/kernel/archive/rockchip64-5.18/add-board-orangepi-r1-plus.patch new file mode 100644 index 000000000..4a0ce3715 --- /dev/null +++ b/patch/kernel/archive/rockchip64-5.18/add-board-orangepi-r1-plus.patch @@ -0,0 +1,416 @@ +diff --git a/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts +new file mode 100644 +index 000000000..2ee07d15a +--- /dev/null ++++ b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts +@@ -0,0 +1,410 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++ ++/dts-v1/; ++ ++#include ++#include ++#include "rk3328-dram-default-timing.dtsi" ++#include "rk3328.dtsi" ++ ++/ { ++ model = "Xunlong Orange Pi R1 Plus"; ++ compatible = "xunlong,orangepi-r1-plus", "rockchip,rk3328"; ++ ++ aliases { ++ ethernet1 = &rtl8153; ++ mmc0 = &sdmmc; ++ }; ++ ++ chosen { ++ stdout-path = "serial2:1500000n8"; ++ }; ++ ++ gmac_clk: gmac-clock { ++ compatible = "fixed-clock"; ++ clock-frequency = <125000000>; ++ clock-output-names = "gmac_clkin"; ++ #clock-cells = <0>; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ pinctrl-0 = <&lan_led_pin>, <&sys_led_pin>, <&wan_led_pin>; ++ pinctrl-names = "default"; ++ ++ lan_led: led-0 { ++ gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>; ++ label = "orangepi-r1-plus:green:lan"; ++ }; ++ ++ sys_led: led-1 { ++ gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>; ++ label = "orangepi-r1-plus:red:status"; ++ linux,default-trigger = "heartbeat"; ++ }; ++ ++ wan_led: led-2 { ++ gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>; ++ label = "orangepi-r1-plus:green:wan"; ++ }; ++ }; ++ ++ vcc_sd: sdmmc-regulator { ++ compatible = "regulator-fixed"; ++ gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>; ++ pinctrl-0 = <&sdmmc0m1_pin>; ++ pinctrl-names = "default"; ++ regulator-name = "vcc_sd"; ++ regulator-boot-on; ++ vin-supply = <&vcc_io_33>; ++ }; ++ ++ vdd_5v: vdd-5v { ++ compatible = "regulator-fixed"; ++ regulator-name = "vdd_5v"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ }; ++ ++ vdd_5v_lan: vdd-5v-lan { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_HIGH>; ++ pinctrl-0 = <&lan_vdd_pin>; ++ pinctrl-names = "default"; ++ regulator-name = "vdd_5v_lan"; ++ regulator-always-on; ++ regulator-boot-on; ++ vin-supply = <&vdd_5v>; ++ }; ++ ++ /delete-node/ dmc-opp-table; ++ ++ dmc_opp_table: dmc_opp_table { ++ compatible = "operating-points-v2"; ++ ++ opp-786000000 { ++ opp-hz = /bits/ 64 <786000000>; ++ opp-microvolt = <1075000 1075000 1200000>; ++ }; ++ opp-798000000 { ++ opp-hz = /bits/ 64 <798000000>; ++ opp-microvolt = <1075000 1075000 1200000>; ++ }; ++ opp-840000000 { ++ opp-hz = /bits/ 64 <840000000>; ++ opp-microvolt = <1075000 1075000 1200000>; ++ }; ++ opp-924000000 { ++ opp-hz = /bits/ 64 <924000000>; ++ opp-microvolt = <1100000 1100000 1200000>; ++ }; ++ opp-1056000000 { ++ opp-hz = /bits/ 64 <1056000000>; ++ opp-microvolt = <1175000 1175000 1200000>; ++ }; ++ }; ++}; ++ ++&cpu0 { ++ cpu-supply = <&vdd_arm>; ++}; ++ ++&cpu1 { ++ cpu-supply = <&vdd_arm>; ++}; ++ ++&cpu2 { ++ cpu-supply = <&vdd_arm>; ++}; ++ ++&cpu3 { ++ cpu-supply = <&vdd_arm>; ++}; ++ ++&dfi { ++ status = "okay"; ++}; ++ ++&dmc { ++ center-supply = <&vdd_log>; ++ ddr_timing = <&ddr_timing>; ++ status = "okay"; ++}; ++ ++&display_subsystem { ++ status = "disabled"; ++}; ++ ++&gmac2io { ++ assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>; ++ assigned-clock-parents = <&gmac_clk>, <&gmac_clk>; ++ clock_in_out = "input"; ++ phy-handle = <&rtl8211e>; ++ phy-mode = "rgmii"; ++ phy-supply = <&vcc_io_33>; ++ pinctrl-0 = <&rgmiim1_pins>; ++ pinctrl-names = "default"; ++ snps,aal; ++ rx_delay = <0x18>; ++ tx_delay = <0x24>; ++ status = "okay"; ++ ++ mdio { ++ compatible = "snps,dwmac-mdio"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ rtl8211e: ethernet-phy@1 { ++ reg = <1>; ++ pinctrl-0 = <ð_phy_reset_pin>; ++ pinctrl-names = "default"; ++ reset-assert-us = <10000>; ++ reset-deassert-us = <50000>; ++ reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; ++ }; ++ }; ++}; ++ ++&i2c0 { ++ status = "okay"; ++}; ++ ++&i2c1 { ++ status = "okay"; ++ ++ rk805: pmic@18 { ++ compatible = "rockchip,rk805"; ++ reg = <0x18>; ++ interrupt-parent = <&gpio1>; ++ interrupts = <24 IRQ_TYPE_LEVEL_LOW>; ++ #clock-cells = <1>; ++ clock-output-names = "xin32k", "rk805-clkout2"; ++ gpio-controller; ++ #gpio-cells = <2>; ++ pinctrl-0 = <&pmic_int_l>; ++ pinctrl-names = "default"; ++ rockchip,system-power-controller; ++ wakeup-source; ++ ++ vcc1-supply = <&vdd_5v>; ++ vcc2-supply = <&vdd_5v>; ++ vcc3-supply = <&vdd_5v>; ++ vcc4-supply = <&vdd_5v>; ++ vcc5-supply = <&vcc_io_33>; ++ vcc6-supply = <&vdd_5v>; ++ ++ regulators { ++ vdd_log: DCDC_REG1 { ++ regulator-name = "vdd_log"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-init-microvolt = <1075000>; ++ regulator-min-microvolt = <712500>; ++ regulator-max-microvolt = <1450000>; ++ regulator-ramp-delay = <12500>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1000000>; ++ }; ++ }; ++ ++ vdd_arm: DCDC_REG2 { ++ regulator-name = "vdd_arm"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-init-microvolt = <1225000>; ++ regulator-min-microvolt = <712500>; ++ regulator-max-microvolt = <1450000>; ++ regulator-ramp-delay = <12500>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <950000>; ++ }; ++ }; ++ ++ vcc_ddr: DCDC_REG3 { ++ regulator-name = "vcc_ddr"; ++ regulator-always-on; ++ regulator-boot-on; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ }; ++ }; ++ ++ vcc_io_33: DCDC_REG4 { ++ regulator-name = "vcc_io_33"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <3300000>; ++ }; ++ }; ++ ++ vcc_18: LDO_REG1 { ++ regulator-name = "vcc_18"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vcc18_emmc: LDO_REG2 { ++ regulator-name = "vcc18_emmc"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vdd_10: LDO_REG3 { ++ regulator-name = "vdd_10"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1000000>; ++ regulator-max-microvolt = <1000000>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1000000>; ++ }; ++ }; ++ }; ++ }; ++}; ++ ++&io_domains { ++ pmuio-supply = <&vcc_io_33>; ++ vccio1-supply = <&vcc_io_33>; ++ vccio2-supply = <&vcc18_emmc>; ++ vccio3-supply = <&vcc_io_33>; ++ vccio4-supply = <&vcc_io_33>; ++ vccio5-supply = <&vcc_io_33>; ++ vccio6-supply = <&vcc_io_33>; ++ status = "okay"; ++}; ++ ++&pinctrl { ++ gmac2io { ++ eth_phy_reset_pin: eth-phy-reset-pin { ++ rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>; ++ }; ++ }; ++ ++ leds { ++ lan_led_pin: lan-led-pin { ++ rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ sys_led_pin: sys-led-pin { ++ rockchip,pins = <3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ wan_led_pin: wan-led-pin { ++ rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ lan { ++ lan_vdd_pin: lan-vdd-pin { ++ rockchip,pins = <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ pmic { ++ pmic_int_l: pmic-int-l { ++ rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++}; ++ ++&pwm2 { ++ status = "okay"; ++}; ++ ++&sdmmc { ++ bus-width = <4>; ++ cap-sd-highspeed; ++ disable-wp; ++ pinctrl-0 = <&sdmmc0_clk>, <&sdmmc0_cmd>, <&sdmmc0_dectn>, <&sdmmc0_bus4>; ++ pinctrl-names = "default"; ++ vmmc-supply = <&vcc_sd>; ++ status = "okay"; ++}; ++ ++&spi0 { ++ status = "okay"; ++ ++ flash@0 { ++ compatible = "jedec,spi-nor"; ++ reg = <0>; ++ spi-max-frequency = <50000000>; ++ }; ++}; ++ ++&tsadc { ++ rockchip,hw-tshut-mode = <0>; ++ rockchip,hw-tshut-polarity = <0>; ++ status = "okay"; ++}; ++ ++&u2phy { ++ status = "okay"; ++}; ++ ++&u2phy_host { ++ status = "okay"; ++}; ++ ++&u2phy_otg { ++ status = "okay"; ++}; ++ ++&uart2 { ++ status = "okay"; ++}; ++ ++&usb20_otg { ++ status = "okay"; ++ dr_mode = "host"; ++}; ++ ++&usbdrd3 { ++ dr_mode = "host"; ++ status = "okay"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ rtl8153: device@2 { ++ compatible = "usbbda,8153"; ++ reg = <2>; ++ realtek,led-data = <0x87>; ++ }; ++}; ++ ++&usb_host0_ehci { ++ status = "okay"; ++}; ++ ++&usb_host0_ohci { ++ status = "okay"; ++}; diff --git a/patch/kernel/archive/rockchip64-5.18/add-board-orangepi-r1plus.patch b/patch/kernel/archive/rockchip64-5.18/add-board-orangepi-r1plus.patch deleted file mode 100644 index 37ef88ae4..000000000 --- a/patch/kernel/archive/rockchip64-5.18/add-board-orangepi-r1plus.patch +++ /dev/null @@ -1,35 +0,0 @@ -diff --git a/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts -new file mode 100644 -index 000000000..2ee07d15a ---- /dev/null -+++ b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts -@@ -0,0 +1,29 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+/* -+ * Copyright (c) 2020 Shenzhen Xunlong Software CO.,Limited -+ * Copyright (c) 2021 AmadeusGhost -+ * -+ * Based on Nanopi R2S -+ */ -+ -+#include "rk3328-nanopi-r2s.dts" -+ -+/ { -+ model = "Xunlong Orange Pi R1 Plus"; -+ compatible = "xunlong,orangepi-r1-plus", "rockchip,rk3328"; -+}; -+ -+&spi0 { -+ max-freq = <48000000>; -+ status = "okay"; -+ -+ flash@0 { -+ compatible = "jedec,spi-nor"; -+ reg = <0>; -+ spi-max-frequency = <10000000>; -+ }; -+}; -+ -+&uart1 { -+ status = "okay"; -+}; diff --git a/patch/kernel/archive/rockchip64-5.18/board-nanopi-r2s-r8152-customise-leds.patch b/patch/kernel/archive/rockchip64-5.18/board-nanopi-r2s-r8152-customise-leds.patch deleted file mode 100644 index eea0c9763..000000000 --- a/patch/kernel/archive/rockchip64-5.18/board-nanopi-r2s-r8152-customise-leds.patch +++ /dev/null @@ -1,36 +0,0 @@ -From 2d4f786f94b331904682c24a792462726d474007 Mon Sep 17 00:00:00 2001 -From: hmz007 -Date: Mon, 23 Dec 2019 13:10:06 +0800 -Subject: [PATCH] r8152: Add module param for customized LEDs - -Signed-off-by: hmz007 ---- - drivers/net/usb/r8152.c | 8 ++++++++ - 1 file changed, 8 insertions(+) - -diff --git a/drivers/net/usb/r8152.c b/drivers/net/usb/r8152.c -index eb78f6d9390c..ec737fffcded 100644 ---- a/drivers/net/usb/r8152.c -+++ b/drivers/net/usb/r8152.c -@@ -37,6 +37,11 @@ - #define DRIVER_DESC "Realtek RTL8152/RTL8153 Based USB Ethernet Adapters" - #define MODULENAME "r8152" - -+/* LED0: Activity, LED1: Link */ -+static int ledsel = 0x78; -+module_param(ledsel, int, 0); -+MODULE_PARM_DESC(ledsel, "Override default LED configuration"); -+ - #define R8152_PHY_ID 32 - - #define PLA_IDR 0xc000 -@@ -4545,6 +4550,9 @@ static void r8153b_init(struct r8152 *tp) - ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN); - ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data); - -+ /* set customized led */ -+ ocp_write_word(tp, MCU_TYPE_PLA, PLA_LEDSEL, ledsel); -+ - rtl_tally_reset(tp); - - tp->coalesce = 15000; /* 15 us */ diff --git a/patch/kernel/archive/rockchip64-5.18/board-nanopi-r2s-r8152-mac-from-dt.patch b/patch/kernel/archive/rockchip64-5.18/board-nanopi-r2s-r8152-mac-from-dt.patch deleted file mode 100644 index 4040e88f0..000000000 --- a/patch/kernel/archive/rockchip64-5.18/board-nanopi-r2s-r8152-mac-from-dt.patch +++ /dev/null @@ -1,40 +0,0 @@ -From 27dfe6f4347e883fd618d5a37500c7f6d3652fb9 Mon Sep 17 00:00:00 2001 -From: hmz007 -Date: Fri, 22 Nov 2019 19:03:00 +0800 -Subject: [PATCH] r8152: support to get MAC address from device tree - -Signed-off-by: hmz007 ---- - drivers/net/usb/r8152.c | 12 ++++++++++++ - 1 file changed, 12 insertions(+) - -diff --git a/drivers/net/usb/r8152.c b/drivers/net/usb/r8152.c -index b2507c59ba8b..eb78f6d9390c 100644 ---- a/drivers/net/usb/r8152.c -+++ b/drivers/net/usb/r8152.c -@@ -6,6 +6,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -1298,6 +1299,17 @@ static int determine_ethernet_addr(struct r8152 *tp, struct sockaddr *sa) - if (ret < 0) { - netif_err(tp, probe, dev, "Get ether addr fail\n"); - } else if (!is_valid_ether_addr(sa->sa_data)) { -+ /* try to get MAC address from DT */ -+ if (tp->udev->dev.of_node) { -+ const u8 *mac = of_get_mac_address(tp->udev->dev.of_node); -+ if (!IS_ERR(mac) && is_valid_ether_addr(mac)) { -+ ether_addr_copy(sa->sa_data, mac); -+ netif_info(tp, probe, dev, "DT mac addr %pM\n", -+ sa->sa_data); -+ return 0; -+ } -+ } -+ - netif_err(tp, probe, dev, "Invalid ether addr %pM\n", - sa->sa_data); - eth_hw_addr_random(dev); diff --git a/patch/kernel/archive/rockchip64-5.18/net-usb-r8152-add-LED-configuration-from-OF.patch b/patch/kernel/archive/rockchip64-5.18/net-usb-r8152-add-LED-configuration-from-OF.patch new file mode 100644 index 000000000..c315dcf8f --- /dev/null +++ b/patch/kernel/archive/rockchip64-5.18/net-usb-r8152-add-LED-configuration-from-OF.patch @@ -0,0 +1,74 @@ +From 82985725e071f2a5735052f18e109a32aeac3a0b Mon Sep 17 00:00:00 2001 +From: David Bauer +Date: Sun, 26 Jul 2020 02:38:31 +0200 +Subject: [PATCH] net: usb: r8152: add LED configuration from OF + +This adds the ability to configure the LED configuration register using +OF. This way, the correct value for board specific LED configuration can +be determined. + +Signed-off-by: David Bauer +--- + drivers/net/usb/r8152.c | 23 +++++++++++++++++++++++ + 1 file changed, 23 insertions(+) + +--- a/drivers/net/usb/r8152.c ++++ b/drivers/net/usb/r8152.c +@@ -11,6 +11,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -6864,6 +6865,22 @@ static void rtl_tally_reset(struct r8152 + ocp_write_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY, ocp_data); + } + ++static int r8152_led_configuration(struct r8152 *tp) ++{ ++ u32 led_data; ++ int ret; ++ ++ ret = of_property_read_u32(tp->udev->dev.of_node, "realtek,led-data", ++ &led_data); ++ ++ if (ret) ++ return ret; ++ ++ ocp_write_word(tp, MCU_TYPE_PLA, PLA_LEDSEL, led_data); ++ ++ return 0; ++} ++ + static void r8152b_init(struct r8152 *tp) + { + u32 ocp_data; +@@ -6905,6 +6922,8 @@ static void r8152b_init(struct r8152 *tp + ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL); + ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN); + ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data); ++ ++ r8152_led_configuration(tp); + } + + static void r8153_init(struct r8152 *tp) +@@ -7045,6 +7064,8 @@ static void r8153_init(struct r8152 *tp) + tp->coalesce = COALESCE_SLOW; + break; + } ++ ++ r8152_led_configuration(tp); + } + + static void r8153b_init(struct r8152 *tp) +@@ -7127,6 +7148,8 @@ static void r8153b_init(struct r8152 *tp + rtl_tally_reset(tp); + + tp->coalesce = 15000; /* 15 us */ ++ ++ r8152_led_configuration(tp); + } + + static void r8153c_init(struct r8152 *tp) diff --git a/patch/kernel/archive/rockchip64-5.18/workaround-need-proper-adjustement-for-reading-MAC-f.patch b/patch/kernel/archive/rockchip64-5.18/workaround-need-proper-adjustement-for-reading-MAC-f.patch deleted file mode 100644 index fa61ca657..000000000 --- a/patch/kernel/archive/rockchip64-5.18/workaround-need-proper-adjustement-for-reading-MAC-f.patch +++ /dev/null @@ -1,42 +0,0 @@ -From c89579702f2848b9870ae78481a2a89bb06d7837 Mon Sep 17 00:00:00 2001 -From: Igor Pecovnik -Date: Wed, 21 Jul 2021 20:35:07 +0000 -Subject: [PATCH] Workaround - need proper adjustement for reading MAC from DT - -Signed-off-by: Igor Pecovnik ---- - drivers/net/usb/r8152.c | 18 +++++++++--------- - 1 file changed, 9 insertions(+), 9 deletions(-) - -diff --git a/drivers/net/usb/r8152.c b/drivers/net/usb/r8152.c -index 02ac27bd3..d6f05d590 100644 ---- a/drivers/net/usb/r8152.c -+++ b/drivers/net/usb/r8152.c -@@ -1691,15 +1691,15 @@ static int determine_ethernet_addr(struct r8152 *tp, struct sockaddr *sa) - netif_err(tp, probe, dev, "Get ether addr fail\n"); - } else if (!is_valid_ether_addr(sa->sa_data)) { - /* try to get MAC address from DT */ -- if (tp->udev->dev.of_node) { -- const u8 *mac = of_get_mac_address(tp->udev->dev.of_node); -- if (!IS_ERR(mac) && is_valid_ether_addr(mac)) { -- ether_addr_copy(sa->sa_data, mac); -- netif_info(tp, probe, dev, "DT mac addr %pM\n", -- sa->sa_data); -- return 0; -- } -- } -+// if (tp->udev->dev.of_node) { -+// const u8 *mac = of_get_mac_address(tp->udev->dev.of_node); -+// if (!IS_ERR(mac) && is_valid_ether_addr(mac)) { -+// ether_addr_copy(sa->sa_data, mac); -+// netif_info(tp, probe, dev, "DT mac addr %pM\n", -+// sa->sa_data); -+// return 0; -+// } -+// } - - netif_err(tp, probe, dev, "Invalid ether addr %pM\n", - sa->sa_data); --- -Created with Armbian build tools https://github.com/armbian/build - diff --git a/patch/kernel/archive/rockchip64-5.19/add-board-nanopi-r2s.patch b/patch/kernel/archive/rockchip64-5.19/add-board-nanopi-r2s.patch index 3e0e3de6b..29683e729 100644 --- a/patch/kernel/archive/rockchip64-5.19/add-board-nanopi-r2s.patch +++ b/patch/kernel/archive/rockchip64-5.19/add-board-nanopi-r2s.patch @@ -17,7 +17,7 @@ new file mode 100644 index 000000000..99b698f64 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2-common.dtsi -@@ -0,0 +1,583 @@ +@@ -0,0 +1,566 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2018 FriendlyElec Computer Tech. Co., Ltd. @@ -157,6 +157,7 @@ index 000000000..99b698f64 + }; + + /delete-node/ dmc-opp-table; ++ + dmc_opp_table: dmc_opp_table { + compatible = "operating-points-v2"; + @@ -181,11 +182,8 @@ index 000000000..99b698f64 + opp-microvolt = <1175000 1175000 1200000>; + }; + }; -+ +}; + -+ -+ +&cpu0 { + cpu-supply = <&vdd_arm>; +}; @@ -561,19 +559,6 @@ index 000000000..99b698f64 + status = "okay"; +}; + -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ +&usb20_otg { + status = "okay"; +}; @@ -586,18 +571,16 @@ index 000000000..99b698f64 + status = "okay"; +}; + -+ -+ -+ -+ +&usbdrd3 { ++ dr_mode = "host"; + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; -+ dr_mode = "host"; ++ + r8153: device@2 { + compatible = "usbbda,8153"; + reg = <2>; ++ realtek,led-data = <0x87>; + local-mac-address = [00 00 00 00 00 00]; + }; +}; @@ -606,7 +589,7 @@ new file mode 100644 index 000000000..717b1b2ed --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2-rev00.dts -@@ -0,0 +1,127 @@ +@@ -0,0 +1,126 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2019 FriendlyElec Computer Tech. Co., Ltd. @@ -678,7 +661,6 @@ index 000000000..717b1b2ed + led@3 { + gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>; + label = "wan_led"; -+ linux,default-trigger = "stmmac-0:00:link"; + }; +}; + diff --git a/patch/kernel/archive/rockchip64-5.19/add-board-orangepi-r1-plus.patch b/patch/kernel/archive/rockchip64-5.19/add-board-orangepi-r1-plus.patch new file mode 100644 index 000000000..4a0ce3715 --- /dev/null +++ b/patch/kernel/archive/rockchip64-5.19/add-board-orangepi-r1-plus.patch @@ -0,0 +1,416 @@ +diff --git a/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts +new file mode 100644 +index 000000000..2ee07d15a +--- /dev/null ++++ b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts +@@ -0,0 +1,410 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++ ++/dts-v1/; ++ ++#include ++#include ++#include "rk3328-dram-default-timing.dtsi" ++#include "rk3328.dtsi" ++ ++/ { ++ model = "Xunlong Orange Pi R1 Plus"; ++ compatible = "xunlong,orangepi-r1-plus", "rockchip,rk3328"; ++ ++ aliases { ++ ethernet1 = &rtl8153; ++ mmc0 = &sdmmc; ++ }; ++ ++ chosen { ++ stdout-path = "serial2:1500000n8"; ++ }; ++ ++ gmac_clk: gmac-clock { ++ compatible = "fixed-clock"; ++ clock-frequency = <125000000>; ++ clock-output-names = "gmac_clkin"; ++ #clock-cells = <0>; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ pinctrl-0 = <&lan_led_pin>, <&sys_led_pin>, <&wan_led_pin>; ++ pinctrl-names = "default"; ++ ++ lan_led: led-0 { ++ gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>; ++ label = "orangepi-r1-plus:green:lan"; ++ }; ++ ++ sys_led: led-1 { ++ gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>; ++ label = "orangepi-r1-plus:red:status"; ++ linux,default-trigger = "heartbeat"; ++ }; ++ ++ wan_led: led-2 { ++ gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>; ++ label = "orangepi-r1-plus:green:wan"; ++ }; ++ }; ++ ++ vcc_sd: sdmmc-regulator { ++ compatible = "regulator-fixed"; ++ gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>; ++ pinctrl-0 = <&sdmmc0m1_pin>; ++ pinctrl-names = "default"; ++ regulator-name = "vcc_sd"; ++ regulator-boot-on; ++ vin-supply = <&vcc_io_33>; ++ }; ++ ++ vdd_5v: vdd-5v { ++ compatible = "regulator-fixed"; ++ regulator-name = "vdd_5v"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ }; ++ ++ vdd_5v_lan: vdd-5v-lan { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_HIGH>; ++ pinctrl-0 = <&lan_vdd_pin>; ++ pinctrl-names = "default"; ++ regulator-name = "vdd_5v_lan"; ++ regulator-always-on; ++ regulator-boot-on; ++ vin-supply = <&vdd_5v>; ++ }; ++ ++ /delete-node/ dmc-opp-table; ++ ++ dmc_opp_table: dmc_opp_table { ++ compatible = "operating-points-v2"; ++ ++ opp-786000000 { ++ opp-hz = /bits/ 64 <786000000>; ++ opp-microvolt = <1075000 1075000 1200000>; ++ }; ++ opp-798000000 { ++ opp-hz = /bits/ 64 <798000000>; ++ opp-microvolt = <1075000 1075000 1200000>; ++ }; ++ opp-840000000 { ++ opp-hz = /bits/ 64 <840000000>; ++ opp-microvolt = <1075000 1075000 1200000>; ++ }; ++ opp-924000000 { ++ opp-hz = /bits/ 64 <924000000>; ++ opp-microvolt = <1100000 1100000 1200000>; ++ }; ++ opp-1056000000 { ++ opp-hz = /bits/ 64 <1056000000>; ++ opp-microvolt = <1175000 1175000 1200000>; ++ }; ++ }; ++}; ++ ++&cpu0 { ++ cpu-supply = <&vdd_arm>; ++}; ++ ++&cpu1 { ++ cpu-supply = <&vdd_arm>; ++}; ++ ++&cpu2 { ++ cpu-supply = <&vdd_arm>; ++}; ++ ++&cpu3 { ++ cpu-supply = <&vdd_arm>; ++}; ++ ++&dfi { ++ status = "okay"; ++}; ++ ++&dmc { ++ center-supply = <&vdd_log>; ++ ddr_timing = <&ddr_timing>; ++ status = "okay"; ++}; ++ ++&display_subsystem { ++ status = "disabled"; ++}; ++ ++&gmac2io { ++ assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>; ++ assigned-clock-parents = <&gmac_clk>, <&gmac_clk>; ++ clock_in_out = "input"; ++ phy-handle = <&rtl8211e>; ++ phy-mode = "rgmii"; ++ phy-supply = <&vcc_io_33>; ++ pinctrl-0 = <&rgmiim1_pins>; ++ pinctrl-names = "default"; ++ snps,aal; ++ rx_delay = <0x18>; ++ tx_delay = <0x24>; ++ status = "okay"; ++ ++ mdio { ++ compatible = "snps,dwmac-mdio"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ rtl8211e: ethernet-phy@1 { ++ reg = <1>; ++ pinctrl-0 = <ð_phy_reset_pin>; ++ pinctrl-names = "default"; ++ reset-assert-us = <10000>; ++ reset-deassert-us = <50000>; ++ reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; ++ }; ++ }; ++}; ++ ++&i2c0 { ++ status = "okay"; ++}; ++ ++&i2c1 { ++ status = "okay"; ++ ++ rk805: pmic@18 { ++ compatible = "rockchip,rk805"; ++ reg = <0x18>; ++ interrupt-parent = <&gpio1>; ++ interrupts = <24 IRQ_TYPE_LEVEL_LOW>; ++ #clock-cells = <1>; ++ clock-output-names = "xin32k", "rk805-clkout2"; ++ gpio-controller; ++ #gpio-cells = <2>; ++ pinctrl-0 = <&pmic_int_l>; ++ pinctrl-names = "default"; ++ rockchip,system-power-controller; ++ wakeup-source; ++ ++ vcc1-supply = <&vdd_5v>; ++ vcc2-supply = <&vdd_5v>; ++ vcc3-supply = <&vdd_5v>; ++ vcc4-supply = <&vdd_5v>; ++ vcc5-supply = <&vcc_io_33>; ++ vcc6-supply = <&vdd_5v>; ++ ++ regulators { ++ vdd_log: DCDC_REG1 { ++ regulator-name = "vdd_log"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-init-microvolt = <1075000>; ++ regulator-min-microvolt = <712500>; ++ regulator-max-microvolt = <1450000>; ++ regulator-ramp-delay = <12500>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1000000>; ++ }; ++ }; ++ ++ vdd_arm: DCDC_REG2 { ++ regulator-name = "vdd_arm"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-init-microvolt = <1225000>; ++ regulator-min-microvolt = <712500>; ++ regulator-max-microvolt = <1450000>; ++ regulator-ramp-delay = <12500>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <950000>; ++ }; ++ }; ++ ++ vcc_ddr: DCDC_REG3 { ++ regulator-name = "vcc_ddr"; ++ regulator-always-on; ++ regulator-boot-on; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ }; ++ }; ++ ++ vcc_io_33: DCDC_REG4 { ++ regulator-name = "vcc_io_33"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <3300000>; ++ }; ++ }; ++ ++ vcc_18: LDO_REG1 { ++ regulator-name = "vcc_18"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vcc18_emmc: LDO_REG2 { ++ regulator-name = "vcc18_emmc"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vdd_10: LDO_REG3 { ++ regulator-name = "vdd_10"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1000000>; ++ regulator-max-microvolt = <1000000>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1000000>; ++ }; ++ }; ++ }; ++ }; ++}; ++ ++&io_domains { ++ pmuio-supply = <&vcc_io_33>; ++ vccio1-supply = <&vcc_io_33>; ++ vccio2-supply = <&vcc18_emmc>; ++ vccio3-supply = <&vcc_io_33>; ++ vccio4-supply = <&vcc_io_33>; ++ vccio5-supply = <&vcc_io_33>; ++ vccio6-supply = <&vcc_io_33>; ++ status = "okay"; ++}; ++ ++&pinctrl { ++ gmac2io { ++ eth_phy_reset_pin: eth-phy-reset-pin { ++ rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>; ++ }; ++ }; ++ ++ leds { ++ lan_led_pin: lan-led-pin { ++ rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ sys_led_pin: sys-led-pin { ++ rockchip,pins = <3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ wan_led_pin: wan-led-pin { ++ rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ lan { ++ lan_vdd_pin: lan-vdd-pin { ++ rockchip,pins = <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ pmic { ++ pmic_int_l: pmic-int-l { ++ rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++}; ++ ++&pwm2 { ++ status = "okay"; ++}; ++ ++&sdmmc { ++ bus-width = <4>; ++ cap-sd-highspeed; ++ disable-wp; ++ pinctrl-0 = <&sdmmc0_clk>, <&sdmmc0_cmd>, <&sdmmc0_dectn>, <&sdmmc0_bus4>; ++ pinctrl-names = "default"; ++ vmmc-supply = <&vcc_sd>; ++ status = "okay"; ++}; ++ ++&spi0 { ++ status = "okay"; ++ ++ flash@0 { ++ compatible = "jedec,spi-nor"; ++ reg = <0>; ++ spi-max-frequency = <50000000>; ++ }; ++}; ++ ++&tsadc { ++ rockchip,hw-tshut-mode = <0>; ++ rockchip,hw-tshut-polarity = <0>; ++ status = "okay"; ++}; ++ ++&u2phy { ++ status = "okay"; ++}; ++ ++&u2phy_host { ++ status = "okay"; ++}; ++ ++&u2phy_otg { ++ status = "okay"; ++}; ++ ++&uart2 { ++ status = "okay"; ++}; ++ ++&usb20_otg { ++ status = "okay"; ++ dr_mode = "host"; ++}; ++ ++&usbdrd3 { ++ dr_mode = "host"; ++ status = "okay"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ rtl8153: device@2 { ++ compatible = "usbbda,8153"; ++ reg = <2>; ++ realtek,led-data = <0x87>; ++ }; ++}; ++ ++&usb_host0_ehci { ++ status = "okay"; ++}; ++ ++&usb_host0_ohci { ++ status = "okay"; ++}; diff --git a/patch/kernel/archive/rockchip64-5.19/add-board-orangepi-r1plus.patch b/patch/kernel/archive/rockchip64-5.19/add-board-orangepi-r1plus.patch deleted file mode 100644 index 37ef88ae4..000000000 --- a/patch/kernel/archive/rockchip64-5.19/add-board-orangepi-r1plus.patch +++ /dev/null @@ -1,35 +0,0 @@ -diff --git a/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts -new file mode 100644 -index 000000000..2ee07d15a ---- /dev/null -+++ b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts -@@ -0,0 +1,29 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+/* -+ * Copyright (c) 2020 Shenzhen Xunlong Software CO.,Limited -+ * Copyright (c) 2021 AmadeusGhost -+ * -+ * Based on Nanopi R2S -+ */ -+ -+#include "rk3328-nanopi-r2s.dts" -+ -+/ { -+ model = "Xunlong Orange Pi R1 Plus"; -+ compatible = "xunlong,orangepi-r1-plus", "rockchip,rk3328"; -+}; -+ -+&spi0 { -+ max-freq = <48000000>; -+ status = "okay"; -+ -+ flash@0 { -+ compatible = "jedec,spi-nor"; -+ reg = <0>; -+ spi-max-frequency = <10000000>; -+ }; -+}; -+ -+&uart1 { -+ status = "okay"; -+}; diff --git a/patch/kernel/archive/rockchip64-5.19/board-nanopi-r2s-r8152-customise-leds.patch b/patch/kernel/archive/rockchip64-5.19/board-nanopi-r2s-r8152-customise-leds.patch deleted file mode 100644 index eea0c9763..000000000 --- a/patch/kernel/archive/rockchip64-5.19/board-nanopi-r2s-r8152-customise-leds.patch +++ /dev/null @@ -1,36 +0,0 @@ -From 2d4f786f94b331904682c24a792462726d474007 Mon Sep 17 00:00:00 2001 -From: hmz007 -Date: Mon, 23 Dec 2019 13:10:06 +0800 -Subject: [PATCH] r8152: Add module param for customized LEDs - -Signed-off-by: hmz007 ---- - drivers/net/usb/r8152.c | 8 ++++++++ - 1 file changed, 8 insertions(+) - -diff --git a/drivers/net/usb/r8152.c b/drivers/net/usb/r8152.c -index eb78f6d9390c..ec737fffcded 100644 ---- a/drivers/net/usb/r8152.c -+++ b/drivers/net/usb/r8152.c -@@ -37,6 +37,11 @@ - #define DRIVER_DESC "Realtek RTL8152/RTL8153 Based USB Ethernet Adapters" - #define MODULENAME "r8152" - -+/* LED0: Activity, LED1: Link */ -+static int ledsel = 0x78; -+module_param(ledsel, int, 0); -+MODULE_PARM_DESC(ledsel, "Override default LED configuration"); -+ - #define R8152_PHY_ID 32 - - #define PLA_IDR 0xc000 -@@ -4545,6 +4550,9 @@ static void r8153b_init(struct r8152 *tp) - ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN); - ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data); - -+ /* set customized led */ -+ ocp_write_word(tp, MCU_TYPE_PLA, PLA_LEDSEL, ledsel); -+ - rtl_tally_reset(tp); - - tp->coalesce = 15000; /* 15 us */ diff --git a/patch/kernel/archive/rockchip64-5.19/board-nanopi-r2s-r8152-mac-from-dt.patch b/patch/kernel/archive/rockchip64-5.19/board-nanopi-r2s-r8152-mac-from-dt.patch deleted file mode 100644 index 4040e88f0..000000000 --- a/patch/kernel/archive/rockchip64-5.19/board-nanopi-r2s-r8152-mac-from-dt.patch +++ /dev/null @@ -1,40 +0,0 @@ -From 27dfe6f4347e883fd618d5a37500c7f6d3652fb9 Mon Sep 17 00:00:00 2001 -From: hmz007 -Date: Fri, 22 Nov 2019 19:03:00 +0800 -Subject: [PATCH] r8152: support to get MAC address from device tree - -Signed-off-by: hmz007 ---- - drivers/net/usb/r8152.c | 12 ++++++++++++ - 1 file changed, 12 insertions(+) - -diff --git a/drivers/net/usb/r8152.c b/drivers/net/usb/r8152.c -index b2507c59ba8b..eb78f6d9390c 100644 ---- a/drivers/net/usb/r8152.c -+++ b/drivers/net/usb/r8152.c -@@ -6,6 +6,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -1298,6 +1299,17 @@ static int determine_ethernet_addr(struct r8152 *tp, struct sockaddr *sa) - if (ret < 0) { - netif_err(tp, probe, dev, "Get ether addr fail\n"); - } else if (!is_valid_ether_addr(sa->sa_data)) { -+ /* try to get MAC address from DT */ -+ if (tp->udev->dev.of_node) { -+ const u8 *mac = of_get_mac_address(tp->udev->dev.of_node); -+ if (!IS_ERR(mac) && is_valid_ether_addr(mac)) { -+ ether_addr_copy(sa->sa_data, mac); -+ netif_info(tp, probe, dev, "DT mac addr %pM\n", -+ sa->sa_data); -+ return 0; -+ } -+ } -+ - netif_err(tp, probe, dev, "Invalid ether addr %pM\n", - sa->sa_data); - eth_hw_addr_random(dev); diff --git a/patch/kernel/archive/rockchip64-5.19/net-usb-r8152-add-LED-configuration-from-OF.patch b/patch/kernel/archive/rockchip64-5.19/net-usb-r8152-add-LED-configuration-from-OF.patch new file mode 100644 index 000000000..c315dcf8f --- /dev/null +++ b/patch/kernel/archive/rockchip64-5.19/net-usb-r8152-add-LED-configuration-from-OF.patch @@ -0,0 +1,74 @@ +From 82985725e071f2a5735052f18e109a32aeac3a0b Mon Sep 17 00:00:00 2001 +From: David Bauer +Date: Sun, 26 Jul 2020 02:38:31 +0200 +Subject: [PATCH] net: usb: r8152: add LED configuration from OF + +This adds the ability to configure the LED configuration register using +OF. This way, the correct value for board specific LED configuration can +be determined. + +Signed-off-by: David Bauer +--- + drivers/net/usb/r8152.c | 23 +++++++++++++++++++++++ + 1 file changed, 23 insertions(+) + +--- a/drivers/net/usb/r8152.c ++++ b/drivers/net/usb/r8152.c +@@ -11,6 +11,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -6864,6 +6865,22 @@ static void rtl_tally_reset(struct r8152 + ocp_write_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY, ocp_data); + } + ++static int r8152_led_configuration(struct r8152 *tp) ++{ ++ u32 led_data; ++ int ret; ++ ++ ret = of_property_read_u32(tp->udev->dev.of_node, "realtek,led-data", ++ &led_data); ++ ++ if (ret) ++ return ret; ++ ++ ocp_write_word(tp, MCU_TYPE_PLA, PLA_LEDSEL, led_data); ++ ++ return 0; ++} ++ + static void r8152b_init(struct r8152 *tp) + { + u32 ocp_data; +@@ -6905,6 +6922,8 @@ static void r8152b_init(struct r8152 *tp + ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL); + ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN); + ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data); ++ ++ r8152_led_configuration(tp); + } + + static void r8153_init(struct r8152 *tp) +@@ -7045,6 +7064,8 @@ static void r8153_init(struct r8152 *tp) + tp->coalesce = COALESCE_SLOW; + break; + } ++ ++ r8152_led_configuration(tp); + } + + static void r8153b_init(struct r8152 *tp) +@@ -7127,6 +7148,8 @@ static void r8153b_init(struct r8152 *tp + rtl_tally_reset(tp); + + tp->coalesce = 15000; /* 15 us */ ++ ++ r8152_led_configuration(tp); + } + + static void r8153c_init(struct r8152 *tp) diff --git a/patch/kernel/archive/rockchip64-5.19/workaround-need-proper-adjustement-for-reading-MAC-f.patch b/patch/kernel/archive/rockchip64-5.19/workaround-need-proper-adjustement-for-reading-MAC-f.patch deleted file mode 100644 index fa61ca657..000000000 --- a/patch/kernel/archive/rockchip64-5.19/workaround-need-proper-adjustement-for-reading-MAC-f.patch +++ /dev/null @@ -1,42 +0,0 @@ -From c89579702f2848b9870ae78481a2a89bb06d7837 Mon Sep 17 00:00:00 2001 -From: Igor Pecovnik -Date: Wed, 21 Jul 2021 20:35:07 +0000 -Subject: [PATCH] Workaround - need proper adjustement for reading MAC from DT - -Signed-off-by: Igor Pecovnik ---- - drivers/net/usb/r8152.c | 18 +++++++++--------- - 1 file changed, 9 insertions(+), 9 deletions(-) - -diff --git a/drivers/net/usb/r8152.c b/drivers/net/usb/r8152.c -index 02ac27bd3..d6f05d590 100644 ---- a/drivers/net/usb/r8152.c -+++ b/drivers/net/usb/r8152.c -@@ -1691,15 +1691,15 @@ static int determine_ethernet_addr(struct r8152 *tp, struct sockaddr *sa) - netif_err(tp, probe, dev, "Get ether addr fail\n"); - } else if (!is_valid_ether_addr(sa->sa_data)) { - /* try to get MAC address from DT */ -- if (tp->udev->dev.of_node) { -- const u8 *mac = of_get_mac_address(tp->udev->dev.of_node); -- if (!IS_ERR(mac) && is_valid_ether_addr(mac)) { -- ether_addr_copy(sa->sa_data, mac); -- netif_info(tp, probe, dev, "DT mac addr %pM\n", -- sa->sa_data); -- return 0; -- } -- } -+// if (tp->udev->dev.of_node) { -+// const u8 *mac = of_get_mac_address(tp->udev->dev.of_node); -+// if (!IS_ERR(mac) && is_valid_ether_addr(mac)) { -+// ether_addr_copy(sa->sa_data, mac); -+// netif_info(tp, probe, dev, "DT mac addr %pM\n", -+// sa->sa_data); -+// return 0; -+// } -+// } - - netif_err(tp, probe, dev, "Invalid ether addr %pM\n", - sa->sa_data); --- -Created with Armbian build tools https://github.com/armbian/build - diff --git a/patch/u-boot/u-boot-rockchip64/add-board-orangepi-r1-plus-.patch b/patch/u-boot/u-boot-rockchip64/add-board-orangepi-r1-plus-.patch deleted file mode 100644 index 8f8a539e0..000000000 --- a/patch/u-boot/u-boot-rockchip64/add-board-orangepi-r1-plus-.patch +++ /dev/null @@ -1,188 +0,0 @@ -diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile -index 06ccc03e..a2657ebe 100644 ---- a/arch/arm/dts/Makefile -+++ b/arch/arm/dts/Makefile -@@ -109,6 +109,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3308) += \ - dtb-$(CONFIG_ROCKCHIP_RK3328) += \ - rk3328-evb.dtb \ - rk3328-nanopi-r2s.dtb \ -+ rk3328-orangepi-r1-plus.dtb \ - rk3328-roc-cc.dtb \ - rk3328-rock64.dtb \ - rk3328-rock-pi-e.dtb -diff --git a/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi b/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi -new file mode 100644 -index 00000000..cf3452ea ---- /dev/null -+++ b/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi -@@ -0,0 +1,16 @@ -+// SPDX-License-Identifier: GPL-2.0+ -+/* -+ * (C) Copyright 2018-2019 Rockchip Electronics Co., Ltd -+ */ -+ -+#include "rk3328-u-boot.dtsi" -+#include "rk3328-sdram-ddr4-666.dtsi" -+/ { -+ chosen { -+ u-boot,spl-boot-order = "same-as-spl", &sdmmc, &emmc; -+ }; -+}; -+ -+&usb_host0_xhci { -+ status = "okay"; -+}; -diff --git a/arch/arm/dts/rk3328-orangepi-r1-plus.dts b/arch/arm/dts/rk3328-orangepi-r1-plus.dts -new file mode 100644 -index 00000000..23023ad0 ---- /dev/null -+++ b/arch/arm/dts/rk3328-orangepi-r1-plus.dts -@@ -0,0 +1,45 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+/* -+ * Copyright (c) 2020 Shenzhen Xunlong Software CO.,Limited -+ * Copyright (c) 2021 AmadeusGhost -+ * -+ * Based on Nanopi R2S -+ */ -+ -+#include "rk3328-nanopi-r2s.dts" -+ -+/ { -+ model = "Xunlong Orange Pi R1 Plus"; -+ compatible = "xunlong,orangepi-r1-plus", "rockchip,rk3328"; -+}; -+ -+&sys_led_pin { -+ rockchip,pins = <3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; -+}; -+ -+&sys_led { -+ gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>; -+}; -+ -+/* No support in mainline u-boot for mach node -+&mach { -+ compatible = "orangepi,board"; -+ hwrev = <2>; -+ machine = "ORANGEPI-R1PLUS"; -+ model = "OrangePi R1PLUS"; -+}; -+*/ -+ -+&spi0 { -+ status = "okay"; -+ -+ spiflash@0 { -+ compatible = "jedec,spi-nor"; -+ reg = <0>; -+ spi-max-frequency = <10000000>; -+ }; -+}; -+ -+&uart1 { -+ status = "okay"; -+}; -diff --git a/configs/orangepi_r1_plus_rk3328_defconfig b/configs/orangepi_r1_plus_rk3328_defconfig -new file mode 100644 -index 00000000..ddbe9715 -@@ -0,0 +1,98 @@ -+CONFIG_ARM=y -+CONFIG_SKIP_LOWLEVEL_INIT=y -+CONFIG_ARCH_ROCKCHIP=y -+CONFIG_SYS_TEXT_BASE=0x00200000 -+CONFIG_ROCKCHIP_RK3328=y -+CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y -+CONFIG_TPL_LIBCOMMON_SUPPORT=y -+CONFIG_TPL_LIBGENERIC_SUPPORT=y -+#CONFIG_SPL_DRIVERS_MISC_SUPPORT=y -+CONFIG_SPL_DRIVERS_MISC=y -+CONFIG_ENV_OFFSET=0x3F8000 -+CONFIG_SPL_STACK_R_ADDR=0x600000 -+CONFIG_NR_DRAM_BANKS=1 -+CONFIG_DEBUG_UART_BASE=0xFF130000 -+CONFIG_DEBUG_UART_CLOCK=24000000 -+CONFIG_SMBIOS_PRODUCT_NAME="rock64_rk3328" -+CONFIG_DEBUG_UART=y -+CONFIG_TPL_SYS_MALLOC_F_LEN=0x800 -+CONFIG_SYS_LOAD_ADDR=0x800800 -+# CONFIG_ANDROID_BOOT_IMAGE is not set -+CONFIG_FIT=y -+CONFIG_FIT_VERBOSE=y -+CONFIG_SPL_LOAD_FIT=y -+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-orangepi-r1-plus.dtb" -+CONFIG_MISC_INIT_R=y -+# CONFIG_DISPLAY_CPUINFO is not set -+CONFIG_DISPLAY_BOARDINFO_LATE=y -+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set -+CONFIG_TPL_SYS_MALLOC_SIMPLE=y -+CONFIG_SPL_STACK_R=y -+CONFIG_SPL_ATF=y -+CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y -+CONFIG_CMD_BOOTZ=y -+CONFIG_CMD_GPT=y -+CONFIG_CMD_MMC=y -+CONFIG_CMD_USB=y -+# CONFIG_CMD_SETEXPR is not set -+CONFIG_CMD_TIME=y -+CONFIG_SPL_OF_CONTROL=y -+CONFIG_TPL_OF_CONTROL=y -+CONFIG_DEFAULT_DEVICE_TREE="rk3328-orangepi-r1-plus" -+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" -+CONFIG_TPL_OF_PLATDATA=y -+CONFIG_ENV_IS_IN_MMC=y -+CONFIG_SYS_RELOC_GD_ENV_ADDR=y -+CONFIG_NET_RANDOM_ETHADDR=y -+CONFIG_TPL_DM=y -+CONFIG_REGMAP=y -+CONFIG_SPL_REGMAP=y -+CONFIG_TPL_REGMAP=y -+CONFIG_SYSCON=y -+CONFIG_SPL_SYSCON=y -+CONFIG_TPL_SYSCON=y -+CONFIG_CLK=y -+CONFIG_SPL_CLK=y -+CONFIG_FASTBOOT_BUF_ADDR=0x800800 -+CONFIG_FASTBOOT_CMD_OEM_FORMAT=y -+CONFIG_ROCKCHIP_GPIO=y -+CONFIG_SYS_I2C_ROCKCHIP=y -+CONFIG_MMC_DW=y -+CONFIG_MMC_DW_ROCKCHIP=y -+CONFIG_SF_DEFAULT_SPEED=20000000 -+CONFIG_DM_ETH=y -+CONFIG_ETH_DESIGNWARE=y -+CONFIG_GMAC_ROCKCHIP=y -+CONFIG_PHY=y -+CONFIG_PINCTRL=y -+CONFIG_SPL_PINCTRL=y -+CONFIG_DM_PMIC=y -+CONFIG_PMIC_RK8XX=y -+CONFIG_SPL_PMIC_RK8XX=y -+CONFIG_REGULATOR_PWM=y -+CONFIG_DM_REGULATOR_FIXED=y -+CONFIG_REGULATOR_RK8XX=y -+CONFIG_PWM_ROCKCHIP=y -+CONFIG_RAM=y -+CONFIG_SPL_RAM=y -+CONFIG_TPL_RAM=y -+CONFIG_DM_RESET=y -+CONFIG_BAUDRATE=1500000 -+CONFIG_DEBUG_UART_SHIFT=2 -+CONFIG_SYSRESET=y -+# CONFIG_TPL_SYSRESET is not set -+CONFIG_USB=y -+CONFIG_USB_XHCI_HCD=y -+CONFIG_USB_XHCI_DWC3=y -+CONFIG_USB_EHCI_HCD=y -+CONFIG_USB_EHCI_GENERIC=y -+CONFIG_USB_OHCI_HCD=y -+CONFIG_USB_OHCI_GENERIC=y -+CONFIG_USB_DWC2=y -+CONFIG_USB_DWC3=y -+# CONFIG_USB_DWC3_GADGET is not set -+CONFIG_USB_GADGET=y -+CONFIG_USB_GADGET_DWC2_OTG=y -+CONFIG_SPL_TINY_MEMSET=y -+CONFIG_TPL_TINY_MEMSET=y -+CONFIG_ERRNO_STR=y -+CONFIG_SMBIOS_MANUFACTURER="pine64" diff --git a/patch/u-boot/u-boot-rockchip64/add-board-orangepi-r1-plus-0.patch b/patch/u-boot/u-boot-rockchip64/add-board-orangepi-r1-plus-0.patch new file mode 100644 index 000000000..f391f48d9 --- /dev/null +++ b/patch/u-boot/u-boot-rockchip64/add-board-orangepi-r1-plus-0.patch @@ -0,0 +1,533 @@ +diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile +index 06ccc03e..a2657ebe 100644 +--- a/arch/arm/dts/Makefile ++++ b/arch/arm/dts/Makefile +@@ -109,6 +109,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3308) += \ + dtb-$(CONFIG_ROCKCHIP_RK3328) += \ + rk3328-evb.dtb \ + rk3328-nanopi-r2s.dtb \ ++ rk3328-orangepi-r1-plus.dtb \ + rk3328-roc-cc.dtb \ + rk3328-rock64.dtb \ + rk3328-rock-pi-e.dtb +diff --git a/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi b/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi +new file mode 100644 +index 00000000..cf3452ea +--- /dev/null ++++ b/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi +@@ -0,0 +1,38 @@ ++// SPDX-License-Identifier: GPL-2.0+ ++/* ++ * (C) Copyright 2018-2019 Rockchip Electronics Co., Ltd ++ */ ++ ++#include "rk3328-u-boot.dtsi" ++#include "rk3328-sdram-ddr4-666.dtsi" ++/ { ++ chosen { ++ u-boot,spl-boot-order = "same-as-spl", &sdmmc, &emmc; ++ }; ++}; ++ ++&gpio0 { ++ u-boot,dm-spl; ++}; ++ ++&pinctrl { ++ u-boot,dm-spl; ++}; ++ ++&sdmmc0m1_pin { ++ u-boot,dm-spl; ++}; ++ ++&pcfg_pull_up_4ma { ++ u-boot,dm-spl; ++}; ++ ++&vcc_sd { ++ u-boot,dm-spl; ++}; ++ ++&gmac2io { ++ snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; ++ snps,reset-active-low; ++ snps,reset-delays-us = <0 10000 50000>; ++}; +diff --git a/arch/arm/dts/rk3328-orangepi-r1-plus.dts b/arch/arm/dts/rk3328-orangepi-r1-plus.dts +new file mode 100644 +index 00000000..23023ad0 +--- /dev/null ++++ b/arch/arm/dts/rk3328-orangepi-r1-plus.dts +@@ -0,0 +1,366 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++ ++/dts-v1/; ++ ++#include ++#include ++#include "rk3328.dtsi" ++ ++/ { ++ model = "Xunlong Orange Pi R1 Plus"; ++ compatible = "xunlong,orangepi-r1-plus", "rockchip,rk3328"; ++ ++ aliases { ++ ethernet1 = &rtl8153; ++ mmc0 = &sdmmc; ++ }; ++ ++ chosen { ++ stdout-path = "serial2:1500000n8"; ++ }; ++ ++ gmac_clk: gmac-clock { ++ compatible = "fixed-clock"; ++ clock-frequency = <125000000>; ++ clock-output-names = "gmac_clkin"; ++ #clock-cells = <0>; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ pinctrl-0 = <&lan_led_pin>, <&sys_led_pin>, <&wan_led_pin>; ++ pinctrl-names = "default"; ++ ++ lan_led: led-0 { ++ gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>; ++ label = "orangepi-r1-plus:green:lan"; ++ }; ++ ++ sys_led: led-1 { ++ gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>; ++ label = "orangepi-r1-plus:red:status"; ++ linux,default-trigger = "heartbeat"; ++ }; ++ ++ wan_led: led-2 { ++ gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>; ++ label = "orangepi-r1-plus:green:wan"; ++ }; ++ }; ++ ++ vcc_sd: sdmmc-regulator { ++ compatible = "regulator-fixed"; ++ gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>; ++ pinctrl-0 = <&sdmmc0m1_pin>; ++ pinctrl-names = "default"; ++ regulator-name = "vcc_sd"; ++ regulator-boot-on; ++ vin-supply = <&vcc_io_33>; ++ }; ++ ++ vdd_5v: vdd-5v { ++ compatible = "regulator-fixed"; ++ regulator-name = "vdd_5v"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ }; ++ ++ vdd_5v_lan: vdd-5v-lan { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_HIGH>; ++ pinctrl-0 = <&lan_vdd_pin>; ++ pinctrl-names = "default"; ++ regulator-name = "vdd_5v_lan"; ++ regulator-always-on; ++ regulator-boot-on; ++ vin-supply = <&vdd_5v>; ++ }; ++}; ++ ++&cpu0 { ++ cpu-supply = <&vdd_arm>; ++}; ++ ++&cpu1 { ++ cpu-supply = <&vdd_arm>; ++}; ++ ++&cpu2 { ++ cpu-supply = <&vdd_arm>; ++}; ++ ++&cpu3 { ++ cpu-supply = <&vdd_arm>; ++}; ++ ++&display_subsystem { ++ status = "disabled"; ++}; ++ ++&gmac2io { ++ assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>; ++ assigned-clock-parents = <&gmac_clk>, <&gmac_clk>; ++ clock_in_out = "input"; ++ phy-handle = <&rtl8211e>; ++ phy-mode = "rgmii"; ++ phy-supply = <&vcc_io_33>; ++ pinctrl-0 = <&rgmiim1_pins>; ++ pinctrl-names = "default"; ++ rx_delay = <0x18>; ++ snps,aal; ++ tx_delay = <0x24>; ++ status = "okay"; ++ ++ mdio { ++ compatible = "snps,dwmac-mdio"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ rtl8211e: ethernet-phy@1 { ++ reg = <1>; ++ pinctrl-0 = <ð_phy_reset_pin>; ++ pinctrl-names = "default"; ++ reset-assert-us = <10000>; ++ reset-deassert-us = <50000>; ++ reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; ++ }; ++ }; ++}; ++ ++&i2c1 { ++ status = "okay"; ++ ++ rk805: pmic@18 { ++ compatible = "rockchip,rk805"; ++ reg = <0x18>; ++ interrupt-parent = <&gpio1>; ++ interrupts = <24 IRQ_TYPE_LEVEL_LOW>; ++ #clock-cells = <1>; ++ clock-output-names = "xin32k", "rk805-clkout2"; ++ gpio-controller; ++ #gpio-cells = <2>; ++ pinctrl-0 = <&pmic_int_l>; ++ pinctrl-names = "default"; ++ rockchip,system-power-controller; ++ wakeup-source; ++ ++ vcc1-supply = <&vdd_5v>; ++ vcc2-supply = <&vdd_5v>; ++ vcc3-supply = <&vdd_5v>; ++ vcc4-supply = <&vdd_5v>; ++ vcc5-supply = <&vcc_io_33>; ++ vcc6-supply = <&vdd_5v>; ++ ++ regulators { ++ vdd_log: DCDC_REG1 { ++ regulator-name = "vdd_log"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <712500>; ++ regulator-max-microvolt = <1450000>; ++ regulator-ramp-delay = <12500>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1000000>; ++ }; ++ }; ++ ++ vdd_arm: DCDC_REG2 { ++ regulator-name = "vdd_arm"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <712500>; ++ regulator-max-microvolt = <1450000>; ++ regulator-ramp-delay = <12500>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <950000>; ++ }; ++ }; ++ ++ vcc_ddr: DCDC_REG3 { ++ regulator-name = "vcc_ddr"; ++ regulator-always-on; ++ regulator-boot-on; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ }; ++ }; ++ ++ vcc_io_33: DCDC_REG4 { ++ regulator-name = "vcc_io_33"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <3300000>; ++ }; ++ }; ++ ++ vcc_18: LDO_REG1 { ++ regulator-name = "vcc_18"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vcc18_emmc: LDO_REG2 { ++ regulator-name = "vcc18_emmc"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vdd_10: LDO_REG3 { ++ regulator-name = "vdd_10"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1000000>; ++ regulator-max-microvolt = <1000000>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1000000>; ++ }; ++ }; ++ }; ++ }; ++}; ++ ++&io_domains { ++ pmuio-supply = <&vcc_io_33>; ++ vccio1-supply = <&vcc_io_33>; ++ vccio2-supply = <&vcc18_emmc>; ++ vccio3-supply = <&vcc_io_33>; ++ vccio4-supply = <&vcc_io_33>; ++ vccio5-supply = <&vcc_io_33>; ++ vccio6-supply = <&vcc_io_33>; ++ status = "okay"; ++}; ++ ++&pinctrl { ++ gmac2io { ++ eth_phy_reset_pin: eth-phy-reset-pin { ++ rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>; ++ }; ++ }; ++ ++ leds { ++ lan_led_pin: lan-led-pin { ++ rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ sys_led_pin: sys-led-pin { ++ rockchip,pins = <3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ wan_led_pin: wan-led-pin { ++ rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ lan { ++ lan_vdd_pin: lan-vdd-pin { ++ rockchip,pins = <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ pmic { ++ pmic_int_l: pmic-int-l { ++ rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++}; ++ ++&pwm2 { ++ status = "okay"; ++}; ++ ++&sdmmc { ++ bus-width = <4>; ++ cap-sd-highspeed; ++ disable-wp; ++ pinctrl-0 = <&sdmmc0_clk>, <&sdmmc0_cmd>, <&sdmmc0_dectn>, <&sdmmc0_bus4>; ++ pinctrl-names = "default"; ++ vmmc-supply = <&vcc_sd>; ++ status = "okay"; ++}; ++ ++&spi0 { ++ status = "okay"; ++ ++ flash@0 { ++ compatible = "jedec,spi-nor"; ++ reg = <0>; ++ spi-max-frequency = <50000000>; ++ }; ++}; ++ ++&tsadc { ++ rockchip,hw-tshut-mode = <0>; ++ rockchip,hw-tshut-polarity = <0>; ++ status = "okay"; ++}; ++ ++&u2phy { ++ status = "okay"; ++}; ++ ++&u2phy_host { ++ status = "okay"; ++}; ++ ++&u2phy_otg { ++ status = "okay"; ++}; ++ ++&uart2 { ++ status = "okay"; ++}; ++ ++&usb20_otg { ++ status = "okay"; ++ dr_mode = "host"; ++}; ++ ++&usbdrd3 { ++ dr_mode = "host"; ++ status = "okay"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ /* Second port is for USB 3.0 */ ++ rtl8153: device@2 { ++ compatible = "usbbda,8153"; ++ reg = <2>; ++ }; ++}; ++ ++&usb_host0_ehci { ++ status = "okay"; ++}; ++ ++&usb_host0_ohci { ++ status = "okay"; ++}; +diff --git a/configs/orangepi_r1_plus_rk3328_defconfig b/configs/orangepi_r1_plus_rk3328_defconfig +new file mode 100644 +index 00000000..ddbe9715 +@@ -0,0 +1,101 @@ ++CONFIG_ARM=y ++CONFIG_SKIP_LOWLEVEL_INIT=y ++CONFIG_ARCH_ROCKCHIP=y ++CONFIG_SYS_TEXT_BASE=0x00200000 ++CONFIG_SPL_GPIO=y ++CONFIG_NR_DRAM_BANKS=1 ++CONFIG_ENV_OFFSET=0x3F8000 ++CONFIG_DEFAULT_DEVICE_TREE="rk3328-orangepi-r1-plus" ++CONFIG_ROCKCHIP_RK3328=y ++CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y ++CONFIG_TPL_LIBCOMMON_SUPPORT=y ++CONFIG_TPL_LIBGENERIC_SUPPORT=y ++CONFIG_SPL_DRIVERS_MISC=y ++CONFIG_SPL_STACK_R_ADDR=0x600000 ++CONFIG_DEBUG_UART_BASE=0xFF130000 ++CONFIG_DEBUG_UART_CLOCK=24000000 ++CONFIG_DEBUG_UART=y ++CONFIG_TPL_SYS_MALLOC_F_LEN=0x800 ++CONFIG_SYS_LOAD_ADDR=0x800800 ++# CONFIG_ANDROID_BOOT_IMAGE is not set ++CONFIG_FIT=y ++CONFIG_FIT_VERBOSE=y ++CONFIG_SPL_LOAD_FIT=y ++CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-orangepi-r1-plus.dtb" ++# CONFIG_DISPLAY_CPUINFO is not set ++CONFIG_DISPLAY_BOARDINFO_LATE=y ++CONFIG_MISC_INIT_R=y ++# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set ++CONFIG_TPL_SYS_MALLOC_SIMPLE=y ++CONFIG_SPL_STACK_R=y ++CONFIG_SPL_I2C=y ++CONFIG_SPL_POWER=y ++CONFIG_SPL_ATF=y ++CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y ++CONFIG_CMD_BOOTZ=y ++CONFIG_CMD_GPT=y ++CONFIG_CMD_MMC=y ++CONFIG_CMD_USB=y ++# CONFIG_CMD_SETEXPR is not set ++CONFIG_CMD_TIME=y ++CONFIG_SPL_OF_CONTROL=y ++CONFIG_TPL_OF_CONTROL=y ++CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" ++CONFIG_TPL_OF_PLATDATA=y ++CONFIG_ENV_IS_IN_MMC=y ++CONFIG_SYS_RELOC_GD_ENV_ADDR=y ++CONFIG_NET_RANDOM_ETHADDR=y ++CONFIG_TPL_DM=y ++CONFIG_REGMAP=y ++CONFIG_SPL_REGMAP=y ++CONFIG_TPL_REGMAP=y ++CONFIG_SYSCON=y ++CONFIG_SPL_SYSCON=y ++CONFIG_TPL_SYSCON=y ++CONFIG_CLK=y ++CONFIG_SPL_CLK=y ++CONFIG_FASTBOOT_BUF_ADDR=0x800800 ++CONFIG_FASTBOOT_CMD_OEM_FORMAT=y ++CONFIG_ROCKCHIP_GPIO=y ++CONFIG_SYS_I2C_ROCKCHIP=y ++CONFIG_MMC_DW=y ++CONFIG_MMC_DW_ROCKCHIP=y ++CONFIG_SF_DEFAULT_SPEED=20000000 ++CONFIG_DM_ETH=y ++CONFIG_ETH_DESIGNWARE=y ++CONFIG_GMAC_ROCKCHIP=y ++CONFIG_PINCTRL=y ++CONFIG_SPL_PINCTRL=y ++CONFIG_DM_PMIC=y ++CONFIG_PMIC_RK8XX=y ++CONFIG_SPL_PMIC_RK8XX=y ++CONFIG_SPL_DM_REGULATOR=y ++CONFIG_REGULATOR_PWM=y ++CONFIG_DM_REGULATOR_FIXED=y ++CONFIG_SPL_DM_REGULATOR_FIXED=y ++CONFIG_REGULATOR_RK8XX=y ++CONFIG_PWM_ROCKCHIP=y ++CONFIG_RAM=y ++CONFIG_SPL_RAM=y ++CONFIG_TPL_RAM=y ++CONFIG_DM_RESET=y ++CONFIG_BAUDRATE=1500000 ++CONFIG_DEBUG_UART_SHIFT=2 ++CONFIG_SYSINFO=y ++CONFIG_SYSRESET=y ++# CONFIG_TPL_SYSRESET is not set ++CONFIG_USB=y ++CONFIG_USB_XHCI_HCD=y ++CONFIG_USB_XHCI_DWC3=y ++CONFIG_USB_EHCI_HCD=y ++CONFIG_USB_EHCI_GENERIC=y ++CONFIG_USB_OHCI_HCD=y ++CONFIG_USB_OHCI_GENERIC=y ++CONFIG_USB_DWC2=y ++CONFIG_USB_DWC3=y ++# CONFIG_USB_DWC3_GADGET is not set ++CONFIG_USB_GADGET=y ++CONFIG_USB_GADGET_DWC2_OTG=y ++CONFIG_SPL_TINY_MEMSET=y ++CONFIG_TPL_TINY_MEMSET=y ++CONFIG_ERRNO_STR=y