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https://github.com/ARM-software/arm-trusted-firmware.git
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d83c1db15c
This port can be compiled to boot an AArch64 or AArch32 payload with the build option `RPI3_BL33_AARCH32`. Note: This is not a secure port of the Trusted Firmware. This port is only meant to be a reference implementation to experiment with an inexpensive board in real hardware. Change-Id: Ide58114299289bf765ef1366199eb05c46f81903 Co-authored-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
52 lines
1.4 KiB
C
52 lines
1.4 KiB
C
/*
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* Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef __RPI3_HW__
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#define __RPI3_HW__
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#include <utils_def.h>
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/*
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* Peripherals
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*/
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#define RPI3_IO_BASE ULL(0x3F000000)
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#define RPI3_IO_SIZE ULL(0x01000000)
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/*
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* Serial port (called 'Mini UART' in the BCM docucmentation).
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*/
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#define RPI3_IO_MINI_UART_OFFSET ULL(0x00215040)
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#define RPI3_MINI_UART_BASE (RPI3_IO_BASE + RPI3_IO_MINI_UART_OFFSET)
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#define RPI3_MINI_UART_CLK_IN_HZ ULL(500000000)
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/*
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* Power management, reset controller, watchdog.
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*/
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#define RPI3_IO_PM_OFFSET ULL(0x00100000)
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#define RPI3_PM_BASE (RPI3_IO_BASE + RPI3_IO_PM_OFFSET)
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/* Registers on top of RPI3_PM_BASE. */
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#define RPI3_PM_RSTC_OFFSET ULL(0x0000001C)
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#define RPI3_PM_WDOG_OFFSET ULL(0x00000024)
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/* Watchdog constants */
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#define RPI3_PM_PASSWORD ULL(0x5A000000)
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#define RPI3_PM_RSTC_WRCFG_MASK ULL(0x00000030)
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#define RPI3_PM_RSTC_WRCFG_FULL_RESET ULL(0x00000020)
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/*
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* Local interrupt controller
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*/
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#define RPI3_INTC_BASE_ADDRESS ULL(0x40000000)
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/* Registers on top of RPI3_INTC_BASE_ADDRESS */
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#define RPI3_INTC_CONTROL_OFFSET ULL(0x00000000)
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#define RPI3_INTC_PRESCALER_OFFSET ULL(0x00000008)
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#define RPI3_INTC_MBOX_CONTROL_OFFSET ULL(0x00000050)
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#define RPI3_INTC_MBOX_CONTROL_SLOT3_FIQ ULL(0x00000080)
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#define RPI3_INTC_PENDING_FIQ_OFFSET ULL(0x00000070)
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#define RPI3_INTC_PENDING_FIQ_MBOX3 ULL(0x00000080)
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#endif /* __RPI3_HW__ */
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