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https://github.com/ARM-software/arm-trusted-firmware.git
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33d4af47b0
This patch introduce TF-A support for NXP's ls1043a platform. more details information of ls1043a chip and ls1043ardb board can be found at docs/plat/ls1043a.rst. Boot sequence on ls1043a is: bootrom loads bl1 firstly, then bl1 loads bl2, bl2 will load bl31, bl32 and bl33, bl31 will boot bl32(tee os) and bl33(u-boot or uefi), bl33 boot Linux kernel. Now TF-A on ls1043ardb platform has the following features in this patch: * Support boot from Nor flash. * TF-A can boot bl33 which runs in el2 of non-secure world. * TF-A boot OPTee OS. * Support PSCI Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com> Signed-off-by: Chenyin.Ha <Chenyin.Ha@nxp.com> Signed-off-by: Chenhui Zhao <chenhui.zhao@nxp.com> Signed-off-by: jiaheng.fan <jiaheng.fan@nxp.com> Signed-off-by: Wen He <wen.he_1@nxp.com>
75 lines
1.9 KiB
C
75 lines
1.9 KiB
C
/*
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* Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <debug.h>
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#include <mmio.h>
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#include <endian.h>
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#include "platform_def.h"
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#include "soc_tzasc.h"
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int tzc380_set_region(unsigned int tzasc_base, unsigned int region_id,
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unsigned int enabled, unsigned int low_addr,
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unsigned int high_addr, unsigned int size,
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unsigned int security, unsigned int subreg_disable_mask)
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{
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unsigned int reg;
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unsigned int reg_base;
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unsigned int attr_value;
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reg_base = (tzasc_base + TZASC_REGIONS_REG + (region_id << 4));
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if (region_id == 0) {
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reg = (reg_base + TZASC_REGION_ATTR_OFFSET);
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mmio_write_32((uintptr_t)reg, ((security & 0xF) << 28));
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} else {
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reg = reg_base + TZASC_REGION_LOWADDR_OFFSET;
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mmio_write_32((uintptr_t)reg,
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(low_addr & TZASC_REGION_LOWADDR_MASK));
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reg = reg_base + TZASC_REGION_HIGHADDR_OFFSET;
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mmio_write_32((uintptr_t)reg, high_addr);
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reg = reg_base + TZASC_REGION_ATTR_OFFSET;
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attr_value = ((security & 0xF) << 28) |
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((subreg_disable_mask & 0xFF) << 8) |
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((size & 0x3F) << 1) | (enabled & 0x1);
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mmio_write_32((uintptr_t)reg, attr_value);
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}
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return 0;
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}
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int tzc380_setup(void)
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{
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int reg_id = 0;
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INFO("Configuring TZASC-380\n");
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/*
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* Configure CCI control override register to terminate all barrier
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* transactions
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*/
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mmio_write_32(PLAT_LS1043_CCI_BASE, CCI_TERMINATE_BARRIER_TX);
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/* Configure CSU secure access register to disable TZASC bypass mux */
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mmio_write_32((uintptr_t)(CONFIG_SYS_FSL_CSU_ADDR +
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CSU_SEC_ACCESS_REG_OFFSET),
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bswap32(TZASC_BYPASS_MUX_DISABLE));
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for (reg_id = 0; reg_id < MAX_NUM_TZC_REGION; reg_id++) {
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tzc380_set_region(CONFIG_SYS_FSL_TZASC_ADDR,
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reg_id,
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tzc380_reg_list[reg_id].enabled,
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tzc380_reg_list[reg_id].low_addr,
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tzc380_reg_list[reg_id].high_addr,
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tzc380_reg_list[reg_id].size,
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tzc380_reg_list[reg_id].secure,
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tzc380_reg_list[reg_id].sub_mask);
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}
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return 0;
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}
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