mirror of
https://github.com/ARM-software/arm-trusted-firmware.git
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33d4af47b0
This patch introduce TF-A support for NXP's ls1043a platform. more details information of ls1043a chip and ls1043ardb board can be found at docs/plat/ls1043a.rst. Boot sequence on ls1043a is: bootrom loads bl1 firstly, then bl1 loads bl2, bl2 will load bl31, bl32 and bl33, bl31 will boot bl32(tee os) and bl33(u-boot or uefi), bl33 boot Linux kernel. Now TF-A on ls1043ardb platform has the following features in this patch: * Support boot from Nor flash. * TF-A can boot bl33 which runs in el2 of non-secure world. * TF-A boot OPTee OS. * Support PSCI Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com> Signed-off-by: Chenyin.Ha <Chenyin.Ha@nxp.com> Signed-off-by: Chenhui Zhao <chenhui.zhao@nxp.com> Signed-off-by: jiaheng.fan <jiaheng.fan@nxp.com> Signed-off-by: Wen He <wen.he_1@nxp.com>
90 lines
2.4 KiB
C
90 lines
2.4 KiB
C
/*
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* Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <debug.h>
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#include "ls_16550.h"
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#include "plat_ls.h"
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#include "../../../bl1/bl1_private.h"
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/* Data structure which holds the extents of the trusted SRAM for BL1*/
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static meminfo_t bl1_tzram_layout;
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meminfo_t *bl1_plat_sec_mem_layout(void)
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{
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return &bl1_tzram_layout;
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}
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/*******************************************************************************
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* BL1 specific platform actions shared between ARM standard platforms.
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******************************************************************************/
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void ls_bl1_early_platform_setup(void)
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{
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static console_ls_16550_t console;
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#if !LS1043_DISABLE_TRUSTED_WDOG
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/* TODO: Enable watchdog */
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#endif
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/* Initialize the console to provide early debug support */
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console_ls_16550_register(LS_TF_UART_BASE, LS_TF_UART_CLOCK,
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LS_TF_UART_BAUDRATE, &console);
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/* Allow BL1 to see the whole Trusted RAM */
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bl1_tzram_layout.total_base = LS_SRAM_BASE;
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bl1_tzram_layout.total_size = LS_SRAM_SIZE;
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}
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/******************************************************************************
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* Perform the very early platform specific architecture setup shared between
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* ARM standard platforms. This only does basic initialization. Later
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* architectural setup (bl1_arch_setup()) does not do anything platform
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* specific.
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*****************************************************************************/
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void ls_bl1_plat_arch_setup(void)
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{
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ls_setup_page_tables(bl1_tzram_layout.total_base,
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bl1_tzram_layout.total_size,
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BL_CODE_BASE,
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BL1_CODE_END,
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BL1_RO_DATA_BASE,
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BL1_RO_DATA_END
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#if USE_COHERENT_MEM
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, BL_COHERENT_RAM_BASE,
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BL_COHERENT_RAM_END
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#endif
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);
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VERBOSE("After setup the page tables\n");
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#ifdef AARCH32
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enable_mmu_secure(0);
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#else
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enable_mmu_el3(0);
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#endif /* AARCH32 */
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VERBOSE("After MMU enabled\n");
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}
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void bl1_plat_arch_setup(void)
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{
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ls_bl1_plat_arch_setup();
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}
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/*
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* Perform the platform specific architecture setup shared between
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* ARM standard platforms.
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*/
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void ls_bl1_platform_setup(void)
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{
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/* Initialise the IO layer and register platform IO devices */
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plat_ls_io_setup();
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}
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void bl1_plat_prepare_exit(entry_point_info_t *ep_info)
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{
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#if !LS1043_DISABLE_TRUSTED_WDOG
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/*TODO: Disable watchdog before leaving BL1 */
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#endif
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}
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