mirror of
https://github.com/ARM-software/arm-trusted-firmware.git
synced 2025-08-17 09:57:01 +02:00
33d4af47b0
This patch introduce TF-A support for NXP's ls1043a platform. more details information of ls1043a chip and ls1043ardb board can be found at docs/plat/ls1043a.rst. Boot sequence on ls1043a is: bootrom loads bl1 firstly, then bl1 loads bl2, bl2 will load bl31, bl32 and bl33, bl31 will boot bl32(tee os) and bl33(u-boot or uefi), bl33 boot Linux kernel. Now TF-A on ls1043ardb platform has the following features in this patch: * Support boot from Nor flash. * TF-A can boot bl33 which runs in el2 of non-secure world. * TF-A boot OPTee OS. * Support PSCI Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com> Signed-off-by: Chenyin.Ha <Chenyin.Ha@nxp.com> Signed-off-by: Chenhui Zhao <chenhui.zhao@nxp.com> Signed-off-by: jiaheng.fan <jiaheng.fan@nxp.com> Signed-off-by: Wen He <wen.he_1@nxp.com>
47 lines
1.1 KiB
C
47 lines
1.1 KiB
C
/*
|
|
* Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
|
|
*
|
|
* SPDX-License-Identifier: BSD-3-Clause
|
|
*/
|
|
|
|
#include <mmio.h>
|
|
#include <debug.h>
|
|
#include <endian.h>
|
|
#include "platform_def.h"
|
|
#include "soc.h"
|
|
|
|
/*
|
|
* Get GIC offset
|
|
* For LS1043a rev1.0, GIC base address align with 4k.
|
|
* For LS1043a rev1.1, if DCFG_GIC400_ALIGN[GIC_ADDR_BIT]
|
|
* is set, GIC base address align with 4K, or else align
|
|
* with 64k.
|
|
*/
|
|
void get_gic_offset(uint32_t *gicc_base, uint32_t *gicd_base)
|
|
{
|
|
|
|
uint32_t *ccsr_svr = (uint32_t *)DCFG_CCSR_SVR;
|
|
uint32_t *gic_align = (uint32_t *)SCFG_GIC400_ALIGN;
|
|
uint32_t val;
|
|
uint32_t soc_dev_id;
|
|
|
|
val = be32toh(mmio_read_32((uintptr_t)ccsr_svr));
|
|
soc_dev_id = val & (SVR_WO_E << 8);
|
|
|
|
if ((soc_dev_id == (SVR_LS1043A << 8) ||
|
|
soc_dev_id == (SVR_LS1043AE << 8)) &&
|
|
((val & 0xff) == REV1_1)) {
|
|
val = be32toh(mmio_read_32((uintptr_t)gic_align));
|
|
if (val & (1 << GIC_ADDR_BIT)) {
|
|
*gicc_base = GICC_BASE;
|
|
*gicd_base = GICD_BASE;
|
|
} else {
|
|
*gicc_base = GICC_BASE_64K;
|
|
*gicd_base = GICD_BASE_64K;
|
|
}
|
|
} else {
|
|
*gicc_base = GICC_BASE;
|
|
*gicd_base = GICD_BASE;
|
|
}
|
|
}
|