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https://github.com/ARM-software/arm-trusted-firmware.git
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bf4698fdef
This reverts commit 2f18aa1fa3.
It is causing some tests to fail. Until the cause is found and fixed, it
is needed to remove this commit from master.
Change-Id: Ic5ff7a841903a15613e00379e87cbbd8a0e85152
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
67 lines
1.8 KiB
C
67 lines
1.8 KiB
C
/*
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* Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <arm_def.h>
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#include <bl_common.h>
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#include <console.h>
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#include <plat_arm.h>
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#include <platform_def.h>
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#include <platform_tsp.h>
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#define BL32_END (unsigned long)(&__BL32_END__)
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/* Weak definitions may be overridden in specific ARM standard platform */
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#pragma weak tsp_early_platform_setup
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#pragma weak tsp_platform_setup
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#pragma weak tsp_plat_arch_setup
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/*******************************************************************************
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* Initialize the UART
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******************************************************************************/
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void arm_tsp_early_platform_setup(void)
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{
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/*
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* Initialize a different console than already in use to display
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* messages from TSP
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*/
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console_init(PLAT_ARM_TSP_UART_BASE, PLAT_ARM_TSP_UART_CLK_IN_HZ,
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ARM_CONSOLE_BAUDRATE);
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}
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void tsp_early_platform_setup(void)
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{
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arm_tsp_early_platform_setup();
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}
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/*******************************************************************************
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* Perform platform specific setup placeholder
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******************************************************************************/
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void tsp_platform_setup(void)
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{
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plat_arm_gic_driver_init();
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}
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/*******************************************************************************
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* Perform the very early platform specific architectural setup here. At the
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* moment this is only intializes the MMU
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******************************************************************************/
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void tsp_plat_arch_setup(void)
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{
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arm_setup_page_tables(BL32_BASE,
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(BL32_END - BL32_BASE),
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BL_CODE_BASE,
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BL_CODE_END,
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BL_RO_DATA_BASE,
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BL_RO_DATA_END
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#if USE_COHERENT_MEM
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, BL_COHERENT_RAM_BASE,
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BL_COHERENT_RAM_END
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#endif
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);
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enable_mmu_el1(0);
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}
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