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Previously, Juno used to depend on the SSC_GPRETN register to inform about the reset syndrome. This method was removed when SCP migrated to the SDS framework. But even the SDS framework doesn't report the reset syndrome correctly and hence Juno failed to enter Firmware update mode if BL2 authentication failed. In addition to that, the error code populated in V2M_SYS_NVFLAGS register does not seem to be retained any more on Juno across resets. This could be down to the motherboard firmware not doing the necessary to preserve the value. Hence this patch modifies the Juno platform to use the same mechanism to trigger firmware update as FVP which is to corrupt the FIP TOC on authentication failure. The implementation in `fvp_err.c` is made common for ARM platforms and is moved to the new `arm_err.c` file in plat/arm/common folder. The BL1 and BL2 mmap table entries for Juno are modified to allow write to the Flash memory address. Change-Id: Ica7d49a3e8a46a90efd4cf340f19fda3b549e945 Signed-off-by: Soby Mathew <soby.mathew@arm.com>
57 lines
1.6 KiB
C
57 lines
1.6 KiB
C
/*
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* Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <bl_common.h>
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#include <errno.h>
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#include <plat_arm.h>
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#include <platform.h>
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#include <sp805.h>
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#include <tbbr_img_def.h>
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#include <v2m_def.h>
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void juno_reset_to_aarch32_state(void);
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/*******************************************************************************
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* On JUNO update the arg2 with address of SCP_BL2U image info.
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******************************************************************************/
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void bl1_plat_set_ep_info(unsigned int image_id,
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entry_point_info_t *ep_info)
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{
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if (image_id == BL2U_IMAGE_ID) {
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image_desc_t *image_desc = bl1_plat_get_image_desc(SCP_BL2U_IMAGE_ID);
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ep_info->args.arg2 = (unsigned long)&image_desc->image_info;
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}
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}
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/*******************************************************************************
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* On Juno clear SYS_NVFLAGS and wait for watchdog reset.
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******************************************************************************/
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__dead2 void bl1_plat_fwu_done(void *client_cookie, void *reserved)
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{
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unsigned int *nv_flags_clr = (unsigned int *)
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(V2M_SYSREGS_BASE + V2M_SYS_NVFLAGSCLR);
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unsigned int *nv_flags_ptr = (unsigned int *)
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(V2M_SYSREGS_BASE + V2M_SYS_NVFLAGS);
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/* Clear the NV flags register. */
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*nv_flags_clr = *nv_flags_ptr;
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while (1)
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wfi();
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}
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#if JUNO_AARCH32_EL3_RUNTIME
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void bl1_plat_prepare_exit(entry_point_info_t *ep_info)
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{
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#if !ARM_DISABLE_TRUSTED_WDOG
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/* Disable watchdog before leaving BL1 */
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sp805_stop(ARM_SP805_TWDG_BASE);
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#endif
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juno_reset_to_aarch32_state();
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}
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#endif /* JUNO_AARCH32_EL3_RUNTIME */
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