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ebf1ca10e4
During system suspend, the GICv3 Distributor and Redistributor context can be lost due to power gating of the system power domain. This means that the GICv3 context needs to be saved prior to system suspend and restored on wakeup. Currently the consensus is that the Firmware should be in charge of this. See tf-issues#464 for more details. This patch introduces helper APIs in the GICv3 driver to save and restore the Distributor and Redistributor contexts. The GICv3 ITS context is not considered in this patch because the specification says that the details of ITS power management is implementation-defined. These APIs are expected to be appropriately invoked by the platform layer during system suspend. Fixes ARM-software/tf-issues#464 Change-Id: Iebb9c6770ab8c4d522546f161fa402d2fe02ec00 Signed-off-by: Soby Mathew <soby.mathew@arm.com> Signed-off-by: Douglas Raillard <douglas.raillard@arm.com>
127 lines
2.9 KiB
C
127 lines
2.9 KiB
C
/*
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* Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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/*
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* Driver for GIC600-specific features. This driver only overrides APIs that are
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* different to those generic ones in GICv3 driver.
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*
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* GIC600 supports independently power-gating redistributor interface.
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*/
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#include <arch_helpers.h>
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#include <assert.h>
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#include <gicv3.h>
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#include "gicv3_private.h"
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/* GIC600-specific register offsets */
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#define GICR_PWRR 0x24
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/* GICR_PWRR fields */
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#define PWRR_RDPD_SHIFT 0
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#define PWRR_RDGPD_SHIFT 2
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#define PWRR_RDGPO_SHIFT 3
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#define PWRR_RDGPD (1 << PWRR_RDGPD_SHIFT)
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#define PWRR_RDGPO (1 << PWRR_RDGPO_SHIFT)
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/* Values to write to GICR_PWRR register to power redistributor */
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#define PWRR_ON (0 << PWRR_RDPD_SHIFT)
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#define PWRR_OFF (1 << PWRR_RDPD_SHIFT)
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/* GIC600-specific accessor functions */
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static void gicr_write_pwrr(uintptr_t base, unsigned int val)
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{
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mmio_write_32(base + GICR_PWRR, val);
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}
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static uint32_t gicr_read_pwrr(uintptr_t base)
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{
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return mmio_read_32(base + GICR_PWRR);
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}
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static int gicr_group_powering_down(uint32_t pwrr)
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{
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/*
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* Whether the redistributor group power down operation is in transit:
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* i.e. it's intending to, but not finished yet.
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*/
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return ((pwrr & PWRR_RDGPD) && !(pwrr & PWRR_RDGPO));
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}
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static void gic600_pwr_on(uintptr_t base)
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{
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/* Power on redistributor */
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gicr_write_pwrr(base, PWRR_ON);
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/* Wait until the power on state is reflected */
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while (gicr_read_pwrr(base) & PWRR_RDGPO)
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;
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}
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static void gic600_pwr_off(uintptr_t base)
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{
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/* Power off redistributor */
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gicr_write_pwrr(base, PWRR_OFF);
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/*
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* If this is the last man, turning this redistributor frame off will
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* result in the group itself being powered off. In that case, wait as
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* long as it's in transition, or has aborted the transition altogether
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* for any reason.
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*/
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if (gicr_read_pwrr(base) & PWRR_RDGPD) {
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while (gicr_group_powering_down(gicr_read_pwrr(base)))
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;
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}
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}
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void gicv3_distif_pre_save(unsigned int proc_num)
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{
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arm_gicv3_distif_pre_save(proc_num);
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}
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void gicv3_distif_post_restore(unsigned int proc_num)
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{
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arm_gicv3_distif_post_restore(proc_num);
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}
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/*
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* Power off GIC600 redistributor
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*/
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void gicv3_rdistif_off(unsigned int proc_num)
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{
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uintptr_t gicr_base;
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assert(gicv3_driver_data);
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assert(proc_num < gicv3_driver_data->rdistif_num);
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assert(gicv3_driver_data->rdistif_base_addrs);
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gicr_base = gicv3_driver_data->rdistif_base_addrs[proc_num];
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assert(gicr_base);
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/* Attempt to power redistributor off */
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gic600_pwr_off(gicr_base);
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}
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/*
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* Power on GIC600 redistributor
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*/
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void gicv3_rdistif_on(unsigned int proc_num)
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{
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uintptr_t gicr_base;
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assert(gicv3_driver_data);
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assert(proc_num < gicv3_driver_data->rdistif_num);
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assert(gicv3_driver_data->rdistif_base_addrs);
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gicr_base = gicv3_driver_data->rdistif_base_addrs[proc_num];
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assert(gicr_base);
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/* Power redistributor on */
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gic600_pwr_on(gicr_base);
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}
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