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09d40e0e08
Enforce full include path for includes. Deprecate old paths.
The following folders inside include/lib have been left unchanged:
- include/lib/cpus/${ARCH}
- include/lib/el3_runtime/${ARCH}
The reason for this change is that having a global namespace for
includes isn't a good idea. It defeats one of the advantages of having
folders and it introduces problems that are sometimes subtle (because
you may not know the header you are actually including if there are two
of them).
For example, this patch had to be created because two headers were
called the same way: e0ea0928d5b7 ("Fix gpio includes of mt8173 platform
to avoid collision."). More recently, this patch has had similar
problems: 46f9b2c3a282 ("drivers: add tzc380 support").
This problem was introduced in commit 4ecca33988b9 ("Move include and
source files to logical locations"). At that time, there weren't too
many headers so it wasn't a real issue. However, time has shown that
this creates problems.
Platforms that want to preserve the way they include headers may add the
removed paths to PLAT_INCLUDES, but this is discouraged.
Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
89 lines
2.1 KiB
C
89 lines
2.1 KiB
C
/*
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* Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <common/debug.h>
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#include <lib/mmio.h>
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#include <lib/psci/psci.h>
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#include <plat/common/platform.h>
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#include "versal_private.h"
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static uintptr_t versal_sec_entry;
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static int versal_nopmc_pwr_domain_on(u_register_t mpidr)
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{
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uint32_t r;
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unsigned int cpu_id = plat_core_pos_by_mpidr(mpidr);
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VERBOSE("%s: mpidr: 0x%lx\n", __func__, mpidr);
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if (cpu_id == -1)
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return PSCI_E_INTERN_FAIL;
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/*
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* program RVBAR
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*/
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mmio_write_32(FPD_APU_RVBAR_L_0 + (cpu_id << 3), versal_sec_entry);
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mmio_write_32(FPD_APU_RVBAR_H_0 + (cpu_id << 3), versal_sec_entry >> 32);
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/*
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* clear VINITHI
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*/
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r = mmio_read_32(FPD_APU_CONFIG_0);
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r &= ~(1 << FPD_APU_CONFIG_0_VINITHI_SHIFT << cpu_id);
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mmio_write_32(FPD_APU_CONFIG_0, r);
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/*
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* FIXME: Add power up sequence, By default it works
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* now without the need of it as it was powered up by
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* default.
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*/
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/*
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* clear power down request
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*/
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r = mmio_read_32(FPD_APU_PWRCTL);
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r &= ~(1 << cpu_id);
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mmio_write_32(FPD_APU_PWRCTL, r);
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/*
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* release core reset
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*/
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r = mmio_read_32(CRF_RST_APU);
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r &= ~((CRF_RST_APU_ACPU_PWRON_RESET |
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CRF_RST_APU_ACPU_RESET) << cpu_id);
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mmio_write_32(CRF_RST_APU, r);
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return PSCI_E_SUCCESS;
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}
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void versal_pwr_domain_on_finish(const psci_power_state_t *target_state)
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{
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/* Enable the gic cpu interface */
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plat_versal_gic_pcpu_init();
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/* Program the gic per-cpu distributor or re-distributor interface */
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plat_versal_gic_cpuif_enable();
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}
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static const struct plat_psci_ops versal_nopmc_psci_ops = {
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.pwr_domain_on = versal_nopmc_pwr_domain_on,
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.pwr_domain_on_finish = versal_pwr_domain_on_finish,
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};
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/*******************************************************************************
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* Export the platform specific power ops.
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******************************************************************************/
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int plat_setup_psci_ops(uintptr_t sec_entrypoint,
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const struct plat_psci_ops **psci_ops)
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{
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versal_sec_entry = sec_entrypoint;
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*psci_ops = &versal_nopmc_psci_ops;
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return 0;
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}
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