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https://github.com/ARM-software/arm-trusted-firmware.git
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Enforce full include path for includes. Deprecate old paths. The following folders inside include/lib have been left unchanged: - include/lib/cpus/${ARCH} - include/lib/el3_runtime/${ARCH} The reason for this change is that having a global namespace for includes isn't a good idea. It defeats one of the advantages of having folders and it introduces problems that are sometimes subtle (because you may not know the header you are actually including if there are two of them). For example, this patch had to be created because two headers were called the same way:e0ea0928d5
("Fix gpio includes of mt8173 platform to avoid collision."). More recently, this patch has had similar problems:46f9b2c3a2
("drivers: add tzc380 support"). This problem was introduced in commit4ecca33988
("Move include and source files to logical locations"). At that time, there weren't too many headers so it wasn't a real issue. However, time has shown that this creates problems. Platforms that want to preserve the way they include headers may add the removed paths to PLAT_INCLUDES, but this is discouraged. Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
228 lines
6.7 KiB
C
228 lines
6.7 KiB
C
/*
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* Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <assert.h>
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#include <common/bl_common.h>
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#include <common/interrupt_props.h>
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#include <drivers/arm/gicv2.h>
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#include <drivers/console.h>
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#include <lib/mmio.h>
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#include "ls_16550.h"
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#include "plat_ls.h"
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#include "soc.h"
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/*
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* Placeholder variables for copying the arguments that have been passed to
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* BL31 from BL2.
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*/
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static entry_point_info_t bl32_image_ep_info;
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static entry_point_info_t bl33_image_ep_info;
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static const interrupt_prop_t g0_interrupt_props[] = {
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INTR_PROP_DESC(9, GIC_HIGHEST_SEC_PRIORITY,
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GICV2_INTR_GROUP0, GIC_INTR_CFG_LEVEL),
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};
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gicv2_driver_data_t ls_gic_data = {
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.gicd_base = GICD_BASE,
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.gicc_base = GICC_BASE,
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.interrupt_props = g0_interrupt_props,
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.interrupt_props_num = ARRAY_SIZE(g0_interrupt_props),
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};
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/*******************************************************************************
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* Return a pointer to the 'entry_point_info' structure of the next image for the
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* security state specified. BL33 corresponds to the non-secure image type
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* while BL32 corresponds to the secure image type. A NULL pointer is returned
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* if the image does not exist.
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******************************************************************************/
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entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type)
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{
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entry_point_info_t *next_image_info;
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assert(sec_state_is_valid(type));
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next_image_info = (type == NON_SECURE)
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? &bl33_image_ep_info : &bl32_image_ep_info;
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if (next_image_info->pc)
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return next_image_info;
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else
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return NULL;
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}
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/*******************************************************************************
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* Perform any BL31 early platform setup common to Layerscape platforms.
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* Here is an opportunity to copy parameters passed by the calling EL (S-EL1
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* in BL2 & EL3 in BL1) before they are lost (potentially). This needs to be
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* done before the MMU is initialized so that the memory layout can be used
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* while creating page tables. BL2 has flushed this information to memory, so
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* we are guaranteed to pick up good data.
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******************************************************************************/
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void ls_bl31_early_platform_setup(void *from_bl2,
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void *plat_params_from_bl2)
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{
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static console_ls_16550_t console;
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/* Initialize the console to provide early debug support */
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console_ls_16550_register(LS_TF_UART_BASE, LS_TF_UART_CLOCK,
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LS_TF_UART_BAUDRATE, &console);
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#if RESET_TO_BL31
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/* There are no parameters from BL2 if BL31 is a reset vector */
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assert(from_bl2 == NULL);
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assert(plat_params_from_bl2 == NULL);
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#ifdef BL32_BASE
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/* Populate entry point information for BL32 */
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SET_PARAM_HEAD(&bl32_image_ep_info,
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PARAM_EP,
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VERSION_1,
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0);
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SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE);
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bl32_image_ep_info.pc = BL32_BASE;
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bl32_image_ep_info.spsr = ls_get_spsr_for_bl32_entry();
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#endif /* BL32_BASE */
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/* Populate entry point information for BL33 */
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SET_PARAM_HEAD(&bl33_image_ep_info,
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PARAM_EP,
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VERSION_1,
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0);
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/*
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* Tell BL31 where the non-trusted software image
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* is located and the entry state information
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*/
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bl33_image_ep_info.pc = plat_get_ns_image_entrypoint();
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bl33_image_ep_info.spsr = ls_get_spsr_for_bl33_entry();
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SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE);
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#else /* RESET_TO_BL31 */
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/*
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* In debug builds, we pass a special value in 'plat_params_from_bl2'
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* to verify platform parameters from BL2 to BL31.
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* In release builds, it's not used.
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*/
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assert(((unsigned long long)plat_params_from_bl2) ==
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LS_BL31_PLAT_PARAM_VAL);
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/*
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* Check params passed from BL2 should not be NULL,
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*/
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bl_params_t *params_from_bl2 = (bl_params_t *)from_bl2;
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assert(params_from_bl2 != NULL);
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assert(params_from_bl2->h.type == PARAM_BL_PARAMS);
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assert(params_from_bl2->h.version >= VERSION_2);
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bl_params_node_t *bl_params = params_from_bl2->head;
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/*
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* Copy BL33 and BL32 (if present), entry point information.
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* They are stored in Secure RAM, in BL2's address space.
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*/
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while (bl_params) {
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if (bl_params->image_id == BL32_IMAGE_ID)
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bl32_image_ep_info = *bl_params->ep_info;
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if (bl_params->image_id == BL33_IMAGE_ID)
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bl33_image_ep_info = *bl_params->ep_info;
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bl_params = bl_params->next_params_info;
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}
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if (bl33_image_ep_info.pc == 0)
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panic();
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#endif /* RESET_TO_BL31 */
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}
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/*******************************************************************************
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* Perform any BL31 platform setup common to Layerscape platforms
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******************************************************************************/
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void ls_bl31_platform_setup(void)
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{
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uint32_t gicc_base, gicd_base;
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NOTICE(FIRMWARE_WELCOME_STR_LS1043_BL31);
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/* Initialize the GIC driver, cpu and distributor interfaces */
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get_gic_offset(&gicc_base, &gicd_base);
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ls_gic_data.gicd_base = (uintptr_t)gicd_base;
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ls_gic_data.gicc_base = (uintptr_t)gicc_base;
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gicv2_driver_init(&ls_gic_data);
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gicv2_distif_init();
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gicv2_pcpu_distif_init();
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gicv2_cpuif_enable();
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#if RESET_TO_BL31
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/*
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* Do initial security configuration to allow DRAM/device access
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* (if earlier BL has not already done so).
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*/
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plat_ls_security_setup();
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#endif /* RESET_TO_BL31 */
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/* Enable and initialize the System level generic timer */
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mmio_write_32(LS1043_SYS_CNTCTL_BASE + CNTCR_OFF,
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CNTCR_FCREQ(0U) | CNTCR_EN);
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VERBOSE("Leave arm_bl31_platform_setup\n");
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}
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/*******************************************************************************
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* Perform any BL31 platform runtime setup prior to BL31 exit common to Layerscape
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* platforms
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******************************************************************************/
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void ls_bl31_plat_runtime_setup(void)
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{
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static console_ls_16550_t console;
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/* Initialize the runtime console */
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console_ls_16550_register(PLAT_LS1043_UART_BASE, PLAT_LS1043_UART_CLOCK,
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PLAT_LS1043_UART_BAUDRATE, &console);
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}
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void bl31_platform_setup(void)
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{
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ls_bl31_platform_setup();
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}
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void bl31_plat_runtime_setup(void)
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{
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ls_bl31_plat_runtime_setup();
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}
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/*******************************************************************************
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* Perform the very early platform specific architectural setup shared between
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* Layerscape platforms. This only does basic initialization. Later
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* architectural setup (bl31_arch_setup()) does not do anything platform
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* specific.
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******************************************************************************/
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void ls_bl31_plat_arch_setup(void)
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{
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ls_setup_page_tables(BL31_BASE,
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BL31_END - BL31_BASE,
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BL_CODE_BASE,
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BL_CODE_END,
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BL_RO_DATA_BASE,
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BL_RO_DATA_END
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#if USE_COHERENT_MEM
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, BL_COHERENT_RAM_BASE,
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BL_COHERENT_RAM_END
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#endif
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);
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enable_mmu_el3(0);
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}
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void bl31_plat_arch_setup(void)
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{
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ls_bl31_plat_arch_setup();
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}
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