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The i.MX 8MP Media Applications Processor is part of the growing i.MX8M family targeting the consumer and industrial market. It brings an effective Machine Learning and AI accelerator that enables a new class of applications. It is built in 14LPP to achieve both high performance and low power consumption and relies on a powerful fully coherent core complex based on a quad core Arm Cortex-A53 cluster and Cortex-M7 low-power coprocessor, audio digital signal processor, machine learning and graphics accelerators. Signed-off-by: Jacky Bai <ping.bai@nxp.com> Change-Id: I98311ebc32bee20af05031492e9fc24d06e55f4a
73 lines
2.3 KiB
C
73 lines
2.3 KiB
C
/*
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* Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef IMX8M_GPC_H
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#define IMX8M_GPC_H
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#include <gpc_reg.h>
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/* helper macro */
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#define A53_LPM_MASK U(0xF)
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#define A53_LPM_WAIT U(0x5)
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#define A53_LPM_STOP U(0xA)
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#define LPM_MODE(local_state) ((local_state) == PLAT_WAIT_RET_STATE ? A53_LPM_WAIT : A53_LPM_STOP)
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#define DSM_MODE_MASK BIT(31)
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#define CORE_WKUP_FROM_GIC (IRQ_SRC_C0 | IRQ_SRC_C1 | IRQ_SRC_C2 | IRQ_SRC_C3)
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#define A53_CORE_WUP_SRC(core_id) (1 << ((core_id) < 2 ? 28 + (core_id) : 22 + (core_id) - 2))
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#define COREx_PGC_PCR(core_id) (0x800 + (core_id) * 0x40)
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#define COREx_WFI_PDN(core_id) (1 << ((core_id) < 2 ? (core_id) * 2 : ((core_id) - 2) * 2 + 16))
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#define COREx_IRQ_WUP(core_id) ((core_id) < 2 ? (1 << ((core_id) * 2 + 8)) : (1 << ((core_id) * 2 + 20)))
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#define COREx_LPM_PUP(core_id) ((core_id) < 2 ? (1 << ((core_id) * 2 + 9)) : (1 << ((core_id) * 2 + 21)))
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#define SLTx_CFG(n) ((SLT0_CFG + ((n) * 4)))
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#define SLT_COREx_PUP(core_id) (0x2 << ((core_id) * 2))
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#define IRQ_IMR_NUM 4
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#define IMR_MASK_ALL 0xffffffff
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#define IMX_PD_DOMAIN(name, on) \
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{ \
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.pwr_req = name##_PWR_REQ, \
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.pgc_offset = name##_PGC, \
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.need_sync = false, \
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.always_on = true, \
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}
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#define IMX_MIX_DOMAIN(name, on) \
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{ \
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.pwr_req = name##_PWR_REQ, \
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.pgc_offset = name##_PGC, \
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.adb400_sync = name##_ADB400_SYNC, \
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.adb400_ack = name##_ADB400_ACK, \
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.need_sync = true, \
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.always_on = true, \
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}
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struct imx_pwr_domain {
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uint32_t pwr_req;
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uint32_t adb400_sync;
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uint32_t adb400_ack;
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uint32_t pgc_offset;
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bool need_sync;
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bool always_on;
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};
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/* function declare */
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void imx_gpc_init(void);
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void imx_set_cpu_secure_entry(unsigned int core_index, uintptr_t sec_entrypoint);
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void imx_set_cpu_pwr_off(unsigned int core_index);
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void imx_set_cpu_pwr_on(unsigned int core_index);
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void imx_set_cpu_lpm(unsigned int core_index, bool pdn);
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void imx_set_cluster_standby(bool retention);
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void imx_set_cluster_powerdown(unsigned int last_core, uint8_t power_state);
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void imx_noc_slot_config(bool pdn);
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void imx_set_sys_wakeup(unsigned int last_core, bool pdn);
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void imx_set_sys_lpm(unsigned last_core, bool retention);
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void imx_set_rbc_count(void);
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void imx_clear_rbc_count(void);
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#endif /*IMX8M_GPC_H */
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