mirror of
https://github.com/ARM-software/arm-trusted-firmware.git
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579d1e90d4
This patch adds code to parse memory range information passed by coreboot, and a simple helper to test whether a specific address belongs to a range. This may be useful for coreboot-using platforms that need to know information about the system's memory layout (e.g. to check whether an address passed in via SMC targets valid DRAM). Signed-off-by: Julius Werner <jwerner@chromium.org> Change-Id: I3bea326c426db27d1a8b7d6e17418e4850e884b4
46 lines
1.1 KiB
C
46 lines
1.1 KiB
C
/*
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* Copyright (c) 2017-2020, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef COREBOOT_H
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#define COREBOOT_H
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#include <stdint.h>
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typedef struct {
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uint32_t type; /* always 2 (memory-mapped) on ARM */
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uint32_t baseaddr;
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uint32_t baud;
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uint32_t regwidth; /* in bytes, i.e. usually 4 */
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uint32_t input_hertz;
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uint32_t uart_pci_addr; /* unused on current ARM systems */
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} coreboot_serial_t;
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extern coreboot_serial_t coreboot_serial;
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#define COREBOOT_MAX_MEMRANGES 32 /* libpayload also uses this limit */
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typedef struct __packed {
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uint64_t start;
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uint64_t size;
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uint32_t type;
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} coreboot_memrange_t;
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extern coreboot_memrange_t coreboot_memranges[COREBOOT_MAX_MEMRANGES];
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typedef enum {
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CB_MEM_NONE = 0, /* coreboot will never report this */
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CB_MEM_RAM = 1,
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CB_MEM_RESERVED = 2,
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CB_MEM_ACPI = 3,
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CB_MEM_NVS = 4,
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CB_MEM_UNUSABLE = 5,
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CB_MEM_VENDOR_RSVD = 6,
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CB_MEM_TABLE = 16,
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} coreboot_memory_t;
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coreboot_memory_t coreboot_get_memory_type(uintptr_t address);
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void coreboot_table_setup(void *base);
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#endif /* COREBOOT_H */
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