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https://github.com/ARM-software/arm-trusted-firmware.git
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ee1ebbd18e
This fix modifies the order of system includes to meet the ARM TF coding standard. There are some exceptions to this change in order to retain header groupings and where there are headers within #if statements. Change-Id: Ib5b668c992d817cc860e97b29e16ef106d17e404 Signed-off-by: Isla Mitchell <isla.mitchell@arm.com>
118 lines
2.3 KiB
C
118 lines
2.3 KiB
C
/*
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* Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <arch_helpers.h>
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#include <arm_gic.h>
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#include <bl_common.h>
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#include <cci.h>
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#include <console.h>
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#include <debug.h>
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#include <mmio.h>
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#include <mtk_plat_common.h>
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#include <mtk_sip_svc.h>
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#include <plat_private.h>
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#include <platform.h>
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#include <xlat_tables.h>
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struct atf_arg_t gteearg;
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void clean_top_32b_of_param(uint32_t smc_fid,
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uint64_t *px1,
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uint64_t *px2,
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uint64_t *px3,
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uint64_t *px4)
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{
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/* if parameters from SMC32. Clean top 32 bits */
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if (0 == (smc_fid & SMC_AARCH64_BIT)) {
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*px1 = *px1 & SMC32_PARAM_MASK;
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*px2 = *px2 & SMC32_PARAM_MASK;
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*px3 = *px3 & SMC32_PARAM_MASK;
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*px4 = *px4 & SMC32_PARAM_MASK;
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}
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}
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#if MTK_SIP_KERNEL_BOOT_ENABLE
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static struct kernel_info k_info;
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static void save_kernel_info(uint64_t pc,
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uint64_t r0,
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uint64_t r1,
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uint64_t k32_64)
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{
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k_info.k32_64 = k32_64;
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k_info.pc = pc;
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if (LINUX_KERNEL_32 == k32_64) {
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/* for 32 bits kernel */
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k_info.r0 = 0;
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/* machtype */
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k_info.r1 = r0;
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/* tags */
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k_info.r2 = r1;
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} else {
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/* for 64 bits kernel */
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k_info.r0 = r0;
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k_info.r1 = r1;
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}
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}
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uint64_t get_kernel_info_pc(void)
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{
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return k_info.pc;
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}
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uint64_t get_kernel_info_r0(void)
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{
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return k_info.r0;
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}
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uint64_t get_kernel_info_r1(void)
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{
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return k_info.r1;
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}
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uint64_t get_kernel_info_r2(void)
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{
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return k_info.r2;
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}
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void boot_to_kernel(uint64_t x1, uint64_t x2, uint64_t x3, uint64_t x4)
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{
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static uint8_t kernel_boot_once_flag;
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/* only support in booting flow */
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if (0 == kernel_boot_once_flag) {
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kernel_boot_once_flag = 1;
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console_init(gteearg.atf_log_port,
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UART_CLOCK, UART_BAUDRATE);
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INFO("save kernel info\n");
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save_kernel_info(x1, x2, x3, x4);
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bl31_prepare_kernel_entry(x4);
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INFO("el3_exit\n");
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console_uninit();
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}
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}
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#endif
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uint32_t plat_get_spsr_for_bl33_entry(void)
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{
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unsigned int mode;
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uint32_t spsr;
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unsigned int ee;
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unsigned long daif;
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INFO("Secondary bootloader is AArch32\n");
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mode = MODE32_svc;
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ee = 0;
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/*
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* TODO: Choose async. exception bits if HYP mode is not
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* implemented according to the values of SCR.{AW, FW} bits
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*/
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daif = DAIF_ABT_BIT | DAIF_IRQ_BIT | DAIF_FIQ_BIT;
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spsr = SPSR_MODE32(mode, 0, ee, daif);
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return spsr;
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}
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