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b09ba056c4
On ARM platforms, the maximum size of the address space is limited to 32-bits as defined in arm_def.h. In order to access DRAM2, which is defined beyond the 32-bit address space, the maximum address space is increased to 36-bits in AArch64. It is possible to increase the virtual space for AArch32, but it is more difficult and not supported for now. NOTE - the actual maximum memory address space is platform dependent and is checked at run-time by querying the PARange field in the ID_AA64MMFR0_EL1 register. Change-Id: I6cb05c78a63b1fed96db9a9773faca04a5b93d67 Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
85 lines
1.5 KiB
C
85 lines
1.5 KiB
C
/*
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* Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <arm_def.h>
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#include <plat_arm.h>
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/*
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* Table of memory regions for different BL stages to map using the MMU.
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* This doesn't include Trusted SRAM as arm_setup_page_tables() already
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* takes care of mapping it.
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*/
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#ifdef IMAGE_BL1
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const mmap_region_t plat_arm_mmap[] = {
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ARM_MAP_SHARED_RAM,
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V2M_MAP_FLASH0_RO,
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V2M_MAP_IOFPGA,
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CSS_MAP_DEVICE,
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SOC_CSS_MAP_DEVICE,
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#if TRUSTED_BOARD_BOOT
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/* Map DRAM to authenticate NS_BL2U image. */
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ARM_MAP_NS_DRAM1,
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#endif
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{0}
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};
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#endif
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#ifdef IMAGE_BL2
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const mmap_region_t plat_arm_mmap[] = {
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ARM_MAP_SHARED_RAM,
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V2M_MAP_FLASH0_RO,
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#ifdef PLAT_ARM_MEM_PROT_ADDR
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ARM_V2M_MAP_MEM_PROTECT,
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#endif
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V2M_MAP_IOFPGA,
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CSS_MAP_DEVICE,
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SOC_CSS_MAP_DEVICE,
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ARM_MAP_NS_DRAM1,
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#ifdef AARCH64
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ARM_MAP_DRAM2,
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#endif
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#ifdef SPD_tspd
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ARM_MAP_TSP_SEC_MEM,
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#endif
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#ifdef SPD_opteed
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ARM_MAP_OPTEE_CORE_MEM,
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ARM_OPTEE_PAGEABLE_LOAD_MEM,
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#endif
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{0}
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};
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#endif
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#ifdef IMAGE_BL2U
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const mmap_region_t plat_arm_mmap[] = {
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ARM_MAP_SHARED_RAM,
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CSS_MAP_DEVICE,
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SOC_CSS_MAP_DEVICE,
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{0}
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};
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#endif
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#ifdef IMAGE_BL31
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const mmap_region_t plat_arm_mmap[] = {
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ARM_MAP_SHARED_RAM,
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V2M_MAP_IOFPGA,
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CSS_MAP_DEVICE,
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#ifdef PLAT_ARM_MEM_PROT_ADDR
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ARM_V2M_MAP_MEM_PROTECT,
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#endif
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SOC_CSS_MAP_DEVICE,
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{0}
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};
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#endif
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#ifdef IMAGE_BL32
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const mmap_region_t plat_arm_mmap[] = {
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#ifdef AARCH32
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ARM_MAP_SHARED_RAM,
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#endif
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V2M_MAP_IOFPGA,
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CSS_MAP_DEVICE,
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SOC_CSS_MAP_DEVICE,
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{0}
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};
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#endif
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ARM_CASSERT_MMAP
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