mirror of
https://github.com/ARM-software/arm-trusted-firmware.git
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62f9134de0
This reverts commit 4d9b9b2352.
Timeout in IPI ack was added for functional safety reason.
Functional safety is not criteria for ATF. However, this
creates issues for APIs that take long or non-deterministic
duration like FPGA load. So revert this patch for now to fix
FPGA loading issue. Need to add support for non-blocking API
for FPGA loading with callback when API completes.
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: I940e798f1e2f7d0dfca1da5caaf8b94036d440c6
217 lines
4.9 KiB
C
217 lines
4.9 KiB
C
/*
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* Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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/*
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* Xilinx IPI agent registers access management
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*/
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#include <errno.h>
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#include <string.h>
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#include <common/debug.h>
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#include <common/runtime_svc.h>
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#include <lib/bakery_lock.h>
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#include <lib/mmio.h>
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#include <ipi.h>
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#include <plat_ipi.h>
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#include <plat_private.h>
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/*********************************************************************
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* Macros definitions
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********************************************************************/
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/* IPI registers offsets macros */
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#define IPI_TRIG_OFFSET 0x00U
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#define IPI_OBR_OFFSET 0x04U
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#define IPI_ISR_OFFSET 0x10U
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#define IPI_IMR_OFFSET 0x14U
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#define IPI_IER_OFFSET 0x18U
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#define IPI_IDR_OFFSET 0x1CU
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/* IPI register start offset */
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#define IPI_REG_BASE(I) (ipi_table[(I)].ipi_reg_base)
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/* IPI register bit mask */
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#define IPI_BIT_MASK(I) (ipi_table[(I)].ipi_bit_mask)
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/* IPI configuration table */
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const static struct ipi_config *ipi_table;
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/* Total number of IPI */
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static uint32_t ipi_total;
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/**
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* ipi_config_init() - Initialize IPI configuration data
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*
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* @ipi_config_table - IPI configuration table
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* @ipi_total - Total number of IPI available
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*
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*/
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void ipi_config_table_init(const struct ipi_config *ipi_config_table,
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uint32_t total_ipi)
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{
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ipi_table = ipi_config_table;
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ipi_total = total_ipi;
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}
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/* is_ipi_mb_within_range() - verify if IPI mailbox is within range
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*
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* @local - local IPI ID
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* @remote - remote IPI ID
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*
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* return - 1 if within range, 0 if not
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*/
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static inline int is_ipi_mb_within_range(uint32_t local, uint32_t remote)
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{
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int ret = 1;
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if (remote >= ipi_total || local >= ipi_total)
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ret = 0;
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return ret;
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}
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/**
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* ipi_mb_validate() - validate IPI mailbox access
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*
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* @local - local IPI ID
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* @remote - remote IPI ID
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* @is_secure - indicate if the requester is from secure software
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*
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* return - 0 success, negative value for errors
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*/
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int ipi_mb_validate(uint32_t local, uint32_t remote, unsigned int is_secure)
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{
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int ret = 0;
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if (!is_ipi_mb_within_range(local, remote))
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ret = -EINVAL;
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else if (IPI_IS_SECURE(local) && !is_secure)
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ret = -EPERM;
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else if (IPI_IS_SECURE(remote) && !is_secure)
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ret = -EPERM;
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return ret;
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}
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/**
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* ipi_mb_open() - Open IPI mailbox.
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*
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* @local - local IPI ID
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* @remote - remote IPI ID
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*
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*/
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void ipi_mb_open(uint32_t local, uint32_t remote)
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{
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mmio_write_32(IPI_REG_BASE(local) + IPI_IDR_OFFSET,
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IPI_BIT_MASK(remote));
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mmio_write_32(IPI_REG_BASE(local) + IPI_ISR_OFFSET,
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IPI_BIT_MASK(remote));
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}
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/**
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* ipi_mb_release() - Open IPI mailbox.
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*
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* @local - local IPI ID
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* @remote - remote IPI ID
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*
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*/
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void ipi_mb_release(uint32_t local, uint32_t remote)
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{
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mmio_write_32(IPI_REG_BASE(local) + IPI_IDR_OFFSET,
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IPI_BIT_MASK(remote));
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}
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/**
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* ipi_mb_enquire_status() - Enquire IPI mailbox status
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*
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* @local - local IPI ID
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* @remote - remote IPI ID
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*
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* return - 0 idle, positive value for pending sending or receiving,
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* negative value for errors
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*/
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int ipi_mb_enquire_status(uint32_t local, uint32_t remote)
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{
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int ret = 0;
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uint32_t status;
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status = mmio_read_32(IPI_REG_BASE(local) + IPI_OBR_OFFSET);
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if (status & IPI_BIT_MASK(remote))
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ret |= IPI_MB_STATUS_SEND_PENDING;
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status = mmio_read_32(IPI_REG_BASE(local) + IPI_ISR_OFFSET);
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if (status & IPI_BIT_MASK(remote))
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ret |= IPI_MB_STATUS_RECV_PENDING;
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return ret;
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}
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/* ipi_mb_notify() - Trigger IPI mailbox notification
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*
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* @local - local IPI ID
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* @remote - remote IPI ID
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* @is_blocking - if to trigger the notification in blocking mode or not.
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*
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* It sets the remote bit in the IPI agent trigger register.
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*
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*/
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void ipi_mb_notify(uint32_t local, uint32_t remote, uint32_t is_blocking)
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{
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uint32_t status;
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mmio_write_32(IPI_REG_BASE(local) + IPI_TRIG_OFFSET,
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IPI_BIT_MASK(remote));
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if (is_blocking) {
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do {
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status = mmio_read_32(IPI_REG_BASE(local) +
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IPI_OBR_OFFSET);
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} while (status & IPI_BIT_MASK(remote));
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}
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}
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/* ipi_mb_ack() - Ack IPI mailbox notification from the other end
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*
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* @local - local IPI ID
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* @remote - remote IPI ID
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*
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* It will clear the remote bit in the isr register.
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*
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*/
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void ipi_mb_ack(uint32_t local, uint32_t remote)
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{
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mmio_write_32(IPI_REG_BASE(local) + IPI_ISR_OFFSET,
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IPI_BIT_MASK(remote));
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}
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/* ipi_mb_disable_irq() - Disable IPI mailbox notification interrupt
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*
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* @local - local IPI ID
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* @remote - remote IPI ID
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*
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* It will mask the remote bit in the idr register.
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*
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*/
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void ipi_mb_disable_irq(uint32_t local, uint32_t remote)
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{
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mmio_write_32(IPI_REG_BASE(local) + IPI_IDR_OFFSET,
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IPI_BIT_MASK(remote));
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}
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/* ipi_mb_enable_irq() - Enable IPI mailbox notification interrupt
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*
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* @local - local IPI ID
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* @remote - remote IPI ID
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*
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* It will mask the remote bit in the idr register.
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*
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*/
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void ipi_mb_enable_irq(uint32_t local, uint32_t remote)
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{
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mmio_write_32(IPI_REG_BASE(local) + IPI_IER_OFFSET,
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IPI_BIT_MASK(remote));
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}
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