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76a21174d2
By default the Arm Ethos-N NPU will boot up in secure mode. In this mode the non-secure world cannot access the registers needed to use the NPU. To still allow the non-secure world to use the NPU, a SiP service has been added that can delegate non-secure access to the registers needed to use it. Only the HW_CONFIG for the Arm Juno platform has been updated to include the device tree for the NPU and the platform currently only loads the HW_CONFIG in AArch64 builds. Signed-off-by: Mikael Olsson <mikael.olsson@arm.com> Change-Id: I65dfd864042ed43faae0a259dcf319cbadb5f3d2
36 lines
787 B
C
36 lines
787 B
C
/*
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* Copyright (c) 2021, Arm Limited. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef FCONF_ETHOSN_GETTER_H
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#define FCONF_ETHOSN_GETTER_H
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#include <assert.h>
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#include <lib/fconf/fconf.h>
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#define hw_config__ethosn_config_getter(prop) ethosn_config.prop
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#define hw_config__ethosn_core_addr_getter(idx) __extension__ ({ \
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assert(idx < ethosn_config.num_cores); \
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ethosn_config.core_addr[idx]; \
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})
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#define ETHOSN_STATUS_DISABLED U(0)
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#define ETHOSN_STATUS_ENABLED U(1)
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#define ETHOSN_CORE_NUM_MAX U(64)
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struct ethosn_config_t {
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uint8_t status;
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uint32_t num_cores;
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uint64_t core_addr[ETHOSN_CORE_NUM_MAX];
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};
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int fconf_populate_arm_ethosn(uintptr_t config);
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extern struct ethosn_config_t ethosn_config;
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#endif /* FCONF_ETHOSN_GETTER_H */
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