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https://github.com/ARM-software/arm-trusted-firmware.git
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f3ff9f77d3
The Amlogic Meson S905 is a SoC with a quad core Arm Cortex-A53 running at 1.5Ghz. It also contains a Cortex-M3 used as SCP. This port is a minimal implementation of BL31 capable of booting mainline U-Boot and Linux: - Partial SCPI support. - Basic PSCI support (CPU_ON, SYSTEM_RESET, SYSTEM_OFF). - GICv2 driver set up. - Basic SIP services (read efuse data, enable/disable JTAG). This port has been tested in an ODROID-C2. Change-Id: Ia4bc82d7aca42a69d6b118b947279f82b3f6c6da Tested-by: Amit Singh Tomar <amittomer25@gmail.com> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
53 lines
898 B
C
53 lines
898 B
C
/*
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* Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <bakery_lock.h>
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#include <mmio.h>
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#include <platform_def.h>
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static DEFINE_BAKERY_LOCK(mhu_lock);
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void mhu_secure_message_start(void)
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{
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bakery_lock_get(&mhu_lock);
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while (mmio_read_32(GXBB_HIU_MAILBOX_STAT_3) != 0)
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;
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}
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void mhu_secure_message_send(uint32_t msg)
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{
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mmio_write_32(GXBB_HIU_MAILBOX_SET_3, msg);
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while (mmio_read_32(GXBB_HIU_MAILBOX_STAT_3) != 0)
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;
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}
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uint32_t mhu_secure_message_wait(void)
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{
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uint32_t val;
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do {
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val = mmio_read_32(GXBB_HIU_MAILBOX_STAT_0);
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} while (val == 0);
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return val;
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}
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void mhu_secure_message_end(void)
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{
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mmio_write_32(GXBB_HIU_MAILBOX_CLR_0, 0xFFFFFFFF);
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bakery_lock_release(&mhu_lock);
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}
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void mhu_secure_init(void)
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{
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bakery_lock_init(&mhu_lock);
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mmio_write_32(GXBB_HIU_MAILBOX_CLR_3, 0xFFFFFFFF);
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}
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